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[/] [uart2bus_testbench/] [trunk/] [tb/] [uvm_src/] [tlm1/] [uvm_sqr_connections.svh] - Blame information for rev 16

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1 16 HanySalah
//
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//-----------------------------------------------------------------------------
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//   Copyright 2007-2011 Mentor Graphics Corporation
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//   Copyright 2007-2010 Cadence Design Systems, Inc.
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//   Copyright 2010 Synopsys, Inc.
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//   All Rights Reserved Worldwide
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//
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//   Licensed under the Apache License, Version 2.0 (the
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//   "License"); you may not use this file except in
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//   compliance with the License.  You may obtain a copy of
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//   the License at
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//
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//       http://www.apache.org/licenses/LICENSE-2.0
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//
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//   Unless required by applicable law or agreed to in
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//   writing, software distributed under the License is
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//   distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
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//   CONDITIONS OF ANY KIND, either express or implied.  See
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//   the License for the specific language governing
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//   permissions and limitations under the License.
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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// Title: Sequence Item Pull Ports
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//
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// This section defines the port, export, and imp port classes for
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// communicating sequence items between  and
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// .
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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//
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// Class: uvm_seq_item_pull_port #(REQ,RSP)
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//
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// UVM provides a port, export, and imp connector for use in sequencer-driver
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// communication. All have standard port connector constructors, except that
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// uvm_seq_item_pull_port's default min_size argument is 0; it can be left
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// unconnected.
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//
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//-----------------------------------------------------------------------------
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class uvm_seq_item_pull_port #(type REQ=int, type RSP=REQ)
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  extends uvm_port_base #(uvm_sqr_if_base #(REQ, RSP));
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  `UVM_SEQ_PORT(`UVM_SEQ_ITEM_PULL_MASK, "uvm_seq_item_pull_port")
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  `UVM_SEQ_ITEM_PULL_IMP(this.m_if, REQ, RSP, t, t)
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  bit print_enabled;
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endclass
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//-----------------------------------------------------------------------------
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//
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// Class: uvm_seq_item_pull_export #(REQ,RSP)
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//
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// This export type is used in sequencer-driver communication. It has the
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// standard constructor for exports.
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//
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//-----------------------------------------------------------------------------
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class uvm_seq_item_pull_export #(type REQ=int, type RSP=REQ)
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  extends uvm_port_base #(uvm_sqr_if_base #(REQ, RSP));
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  `UVM_EXPORT_COMMON(`UVM_SEQ_ITEM_PULL_MASK, "uvm_seq_item_pull_export")
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  `UVM_SEQ_ITEM_PULL_IMP(this.m_if, REQ, RSP, t, t)
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endclass
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//-----------------------------------------------------------------------------
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//
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// Class: uvm_seq_item_pull_imp #(REQ,RSP,IMP)
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//
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// This imp type is used in sequencer-driver communication. It has the
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// standard constructor for imp-type ports.
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//
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//-----------------------------------------------------------------------------
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class uvm_seq_item_pull_imp #(type REQ=int, type RSP=REQ, type IMP=int)
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  extends uvm_port_base #(uvm_sqr_if_base #(REQ, RSP));
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   // Function: new
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  `UVM_IMP_COMMON(`UVM_SEQ_ITEM_PULL_MASK, "uvm_seq_item_pull_imp",IMP)
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  `UVM_SEQ_ITEM_PULL_IMP(m_imp, REQ, RSP, t, t)
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endclass

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