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[/] [unconfuser/] [trunk/] [unConfuser.v] - Blame information for rev 2

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/***************************************************************************************/
2
/*                                                                                                                                                    */
3
/* Author:- Pratik Mahajan                                                                                                               */
4
/* Create Date:- Spring 2009                                                                                                           */
5
/* Project Name:- Unconfuser for 32 bit data                                                                                  */
6
/* Target Devices: ASIC                                                                                                                       */
7
/*Project Description: To build an unconfuser for 32 bit confused data with around 700                     */
8
/* bits of confusion                                                                                                                         */
9
 
10
module unConfuser(Clk, Reset, PushIn, Din, Caddr, Cdata, Cpush, PushOut, StopIn, Dout, inMdin, inAddrw, inWrite, inMdout, inAddrr, opMdin, opAddrw, opWrite, opMdout, opAddrr);
11
 
12
/*Port list for unConfuser */
13
   input[7:0] Din, Cdata;
14
   input[6:0] Caddr;
15
   output[7:0] Dout;
16
   input PushIn, Clk, Reset, StopIn, Cpush;
17
   output PushOut;
18
 
19
/* Port list for Fifo and memory interfacing */
20
   output inWrite, opWrite;
21
   output [7:0] inMdin, opMdin;
22
   output [15:0] inAddrr, inAddrw, opAddrr, opAddrw;
23
   input [7:0] inMdout, opMdout;
24
 
25
/*/Variables and parameters declaration*/
26
/*Registers being used for CRCs*/
27
   reg[159:0] rDataPad0;
28
   reg[160:0] rDataPad1;
29
   reg[161:0] rDataPad2;
30
   reg[162:0] rDataPad3;
31
   reg[31:0]  rDataInjector;
32
   reg[39:0]  rDataPadSel;
33
   reg[31:0]  rDataCDATA;
34
 
35
/*Wires/Nets Representing combinational logic (XORing) - i.e. (D input to F/F)*/
36
   wire[159:0] wXorPad0FW, wXorPad0BW, wXorPad0, wLoadPad0;
37
   wire[160:0] wXorPad1FW, wXorPad1BW, wXorPad1, wLoadPad1;
38
   wire[161:0] wXorPad2FW, wXorPad2BW, wXorPad2, wLoadPad2;
39
   wire[162:0] wXorPad3FW, wXorPad3BW, wXorPad3, wLoadPad3;
40
   wire[39:0]  wXorPadSelFW, wXorPadSelBW, wXorPadSel, wLoadPadSel;
41
   wire[31:0]  wXorCDATAFW, wXorCDATABW, wXorCDATABW0, wXorCDATA; //---> Forward moving CDATA is Never been used
42
   wire[31:0]  wXorInjectorFW, wXorInjectorBW, wXorInjector, wLoadInjector;   //---> Backword moving injector is Never been used
43
 
44
 
45
/*Control signals for controlling CRCs*/
46
   reg rIdle, rDirection, rIdleInjector, rIdleCDATA, rIsBW;
47
 
48
/*Internal signals for design like PRN select lines for pad select MUX etc.*/
49
   wire[4:0] wSelectPadBit;
50
   wire[5:0] wPadAmount;
51
   wire wPRN;
52
   reg rPRN;
53
   reg rDataOut;
54
/*Variables used in for loops and etc*/
55
   integer unConfuserCnt, ipFifoLoadCnt, opFifoLoadCnt, PadCounter, injectorCounter;
56
   reg[2:0] nextState;
57
   reg[5:0] rPadAmount;
58
 
59
/*FIFO signals declaration*/
60
   wire inPull, inEmpty, inWrite, opWrite;
61
   wire[7:0] inDout, inMdin, inMdout;
62
   wire[15:0] inAddrw, inAddrr;
63
   wire opPull, opPush, opEmpty, opFull;
64
   wire[7:0] wopDin, opMdin, opMdout;
65
   wire[15:0] opAddrw, opAddrr;
66
   reg[7:0] opDin;
67
 
68
/*Parameters representing Polynomials for all CRCs*/
69
 
70
/* X^160+X^139+X^119+X^98+X^79+X^40+X^20+1     -> Pad0 polynomial*/
71
   parameter [159:0] pPolyPad0 = 160'H00000800_00800004_00008000_00000100_00100001;
72
 
73
/*  X161+X140+X121+X100+X80+X60+X40+X20+1                 -> Pad1 polynomial*/
74
   parameter [160:0] pPolyPad1 = 161'H0_00001000_02000010_00010000_10000100_00100001;
75
 
76
/*  X162+X141+X121+X100 +X80+X60+X40+X20+1                -> Pad2 polynomial*/
77
   parameter [161:0] pPolyPad2 = 162'H0_00002000_02000010_00010000_10000100_00100001;
78
 
79
/*  X163+X142+X122+X102+X82+X61+X41+X20+1                 -> Pad3 polynomial*/
80
   parameter [162:0] pPolyPad3 = 162'H0_00004000_04000040_00040000_20000200_00100001;
81
 
82
/* X32+X27+X21+X16+X10+X5+1                               -> Injector polynomial*/
83
   parameter [31:0]  pPolyInjector = 32'H0821_0421;
84
 
85
/* X40+X34+X27+X19+X12+X6+1                               -> PadSelect Polynomial*/
86
   parameter [39:0] pPolyPadSel = 40'H04_0808_1041;
87
 
88
/* X32+X31+X29+X28+X26+X25+X24+X22+X21+X13+X11+X9+X8+X5+1 -> CRC (unConfuser) polynomial*/
89
   parameter [31:0] pPolyCDATA = 32'HB760_2B21;
90
 
91
/*Parameters for State Machine*/
92
   parameter stateReset     = 3'b000;
93
   parameter stateLoadPads  = 3'b001;
94
   parameter stateLoad      = 3'b010;
95
   parameter stateStepFW    = 3'b011;
96
   parameter stateStepBW    = 3'b100;
97
   parameter stateCDATABW   = 3'b101;
98
   parameter stateLoadOut   = 3'b110;
99
   parameter stateFinalFW   = 3'b111;
100
 
101
/* Forward and Backward flags as parameters*/
102
   parameter pFW            = 1'b1;
103
   parameter pBW            = 1'b0;
104
 
105
/*Instatiate input and output fifos*/
106
   fifooneflag ipfifo (Clk, Reset, PushIn, Din, inPull, inEmpty, inDout, inAddrw, inMdin, inWrite, inAddrr, inMdout);
107
   assign inPull          = (inEmpty == 1'b0 && nextState == stateLoad); //When CDATA is begin loaded
108
   fifotwoflag opfifo (Clk, Reset, opPush, opFull, opDin, opPull, opEmpty, Dout, opAddrw, opMdin, opWrite, opAddrr, opMdout);
109
   assign opPush          = (opFull == 1'b0 && rDataOut == 1'b1);             //when not full
110
   assign opPull          = (StopIn == 1'b0);
111
 
112
   assign PushOut         = (opEmpty == 1'b0);
113
   assign wopDin          = (opPush==1'b1 && opFifoLoadCnt==1) ? rDataCDATA[31:24] :
114
                            ((opPush==1'b1 && opFifoLoadCnt==2) ? rDataCDATA[23:16] :
115
                            ((opPush==1'b1 && opFifoLoadCnt==3) ? rDataCDATA[15:8]  :
116
                            ((opPush==1'b1 && opFifoLoadCnt==4) ? rDataCDATA[7:0] : opDin)));
117
 
118
                         /*Logic starts here*/
119
                         /*All CRC going forward :-*/
120
   assign wXorPad0FW      = {rDataPad0[158:0],1'b0}   ^ (rDataPad0[159] ? pPolyPad0  : 160'h0);
121
   assign wXorPad1FW      = {rDataPad1[159:0],1'b0}   ^ (rDataPad1[160] ? pPolyPad1  : 161'h0);
122
   assign wXorPad2FW      = {rDataPad2[160:0],1'b0}   ^ (rDataPad2[161] ? pPolyPad2  : 162'h0);
123
   assign wXorPad3FW      = {rDataPad3[161:0],1'b0}   ^ (rDataPad3[162] ? pPolyPad3  : 163'h0);
124
   assign wXorPadSelFW    = {rDataPadSel[38:0],1'b0}  ^ (rDataPadSel[39]? pPolyPadSel : 40'h0);
125
/*CDATA will never move forward*/
126
   assign wXorCDATAFW     = {rDataCDATA[30:0],1'b0}   ^ (rDataCDATA[31] ? pPolyCDATA : 32'h0);
127
   assign wXorInjectorFW  = {rDataInjector[30:0],1'b0}^ (rDataInjector[31] ? pPolyInjector : 32'h0);
128
 
129
/*All CRC going Backword*/
130
   assign wXorPad0BW[158:0]    = {rDataPad0[159:1]}   ^ (rDataPad0[0] ? pPolyPad0[159:1]  : 159'h0); assign wXorPad0BW[159] = rDataPad0[0];
131
   assign wXorPad1BW[159:0]    = {rDataPad1[160:1]}   ^ (rDataPad1[0] ? pPolyPad1[160:1]  : 160'h0); assign wXorPad1BW[160] = rDataPad1[0];
132
   assign wXorPad2BW[160:0]    = {rDataPad2[161:1]}   ^ (rDataPad2[0] ? pPolyPad2[161:1]  : 161'h0); assign wXorPad2BW[161] = rDataPad2[0];
133
   assign wXorPad3BW[161:0]    = {rDataPad3[162:1]}   ^ (rDataPad3[0] ? pPolyPad3[162:1]  : 162'h0); assign wXorPad3BW[162] = rDataPad3[0];
134
   assign wXorPadSelBW[38:0]   = {rDataPadSel[39:1]}  ^ (rDataPadSel[0]? pPolyPadSel[39:1]: 39'h0); assign wXorPadSelBW[39]= rDataPadSel[0];
135
   assign wXorCDATABW[30:0]    = {rDataCDATA[31:1]}   ^ ((rDataCDATA[0] ^ wPRN) ? pPolyCDATA[31:1] : 31'h0); assign wXorCDATABW[31] = (rDataCDATA[0] ^ wPRN); /*We need datain(wPRN) input to provide PRN from MUX*/
136
   assign wXorCDATABW0[30:0]   = {rDataCDATA[31:1]}   ^ (rDataCDATA[0] ? pPolyCDATA[31:1] : 31'h0); assign wXorCDATABW0[31] = rDataCDATA[0];
137
/*Injector Backward never need to be used*/
138
   assign wXorInjectorBW[30:0] = {rDataInjector[31:1]}^ (rDataInjector[0] ? pPolyInjector[31:1] : 31'h0); assign wXorInjectorBW[31] = rDataInjector[0];
139
 
140
/*Chosing out of Reset, Idle, Forward or Backward Condition Make RESET asynchronous*/
141
   assign wXorPad0         = Cpush ? wLoadPad0 : (rIdle ? rDataPad0 : (rDirection ? wXorPad0FW : wXorPad0BW));
142
   assign wXorPad1         = Cpush ? wLoadPad1 : (rIdle ? rDataPad1 : (rDirection ? wXorPad1FW : wXorPad1BW));
143
   assign wXorPad2         = Cpush ? wLoadPad2 : (rIdle ? rDataPad2 : (rDirection ? wXorPad2FW : wXorPad2BW));
144
   assign wXorPad3         = Cpush ? wLoadPad3 : (rIdle ? rDataPad3 : (rDirection ? wXorPad3FW : wXorPad3BW));
145
   assign wXorPadSel       = Cpush ? wLoadPadSel : (rIdle ? rDataPadSel : (rDirection ? wXorPadSelFW : wXorPadSelBW));
146
   assign wXorCDATA        = rIdleCDATA ? rDataCDATA : (rIsBW ? wXorCDATABW0 : wXorCDATABW);            //Direction will always be Backward
147
   assign wXorInjector     = Cpush ? wLoadInjector : (rIdleInjector ? rDataInjector : wXorInjectorFW );             //Direction will always be Forward
148
 
149
/*Implementation of configuration register for loading each register*/
150
   //loadPad0:
151
     assign wLoadPad0      = {Caddr=='d19 ? Cdata : rDataPad0[159:152],
152
                         Caddr=='d18 ? Cdata : rDataPad0[151:144],
153
                         Caddr=='d17 ? Cdata : rDataPad0[143:136],
154
                         Caddr=='d16 ? Cdata : rDataPad0[135:128],
155
                         Caddr=='d15 ? Cdata : rDataPad0[127:120],
156
                         Caddr=='d14 ? Cdata : rDataPad0[119:112],
157
                         Caddr=='d13 ? Cdata : rDataPad0[111:104],
158
                         Caddr=='d12 ? Cdata : rDataPad0[103:96],
159
                         Caddr=='d11 ? Cdata : rDataPad0[95:88],
160
                         Caddr=='d10 ? Cdata : rDataPad0[87:80],
161
                         Caddr=='d09 ? Cdata : rDataPad0[79:72],
162
                         Caddr=='d08 ? Cdata : rDataPad0[71:64],
163
                         Caddr=='d07 ? Cdata : rDataPad0[63:56],
164
                         Caddr=='d06 ? Cdata : rDataPad0[55:48],
165
                         Caddr=='d05 ? Cdata : rDataPad0[47:40],
166
                         Caddr=='d04 ? Cdata : rDataPad0[39:32],
167
                         Caddr=='d03 ? Cdata : rDataPad0[31:24],
168
                         Caddr=='d02 ? Cdata : rDataPad0[23:16],
169
                         Caddr=='d01 ? Cdata : rDataPad0[15:08],
170
                         Caddr=='d00 ? Cdata : rDataPad0[07:00]};
171
 
172
   //loadPad1:
173
     assign wLoadPad1      = {Caddr=='d41 ? Cdata[0] : rDataPad1[160],
174
                         Caddr=='d40 ? Cdata : rDataPad1[159:152],
175
                         Caddr=='d39 ? Cdata : rDataPad1[151:144],
176
                         Caddr=='d38 ? Cdata : rDataPad1[143:136],
177
                         Caddr=='d37 ? Cdata : rDataPad1[135:128],
178
                         Caddr=='d36 ? Cdata : rDataPad1[127:120],
179
                         Caddr=='d35 ? Cdata : rDataPad1[119:112],
180
                         Caddr=='d34 ? Cdata : rDataPad1[111:104],
181
                         Caddr=='d33 ? Cdata : rDataPad1[103:96],
182
                         Caddr=='d32 ? Cdata : rDataPad1[95:88],
183
                         Caddr=='d31 ? Cdata : rDataPad1[87:80],
184
                         Caddr=='d30 ? Cdata : rDataPad1[79:72],
185
                         Caddr=='d29 ? Cdata : rDataPad1[71:64],
186
                         Caddr=='d28 ? Cdata : rDataPad1[63:56],
187
                         Caddr=='d27 ? Cdata : rDataPad1[55:48],
188
                         Caddr=='d26 ? Cdata : rDataPad1[47:40],
189
                         Caddr=='d25 ? Cdata : rDataPad1[39:32],
190
                         Caddr=='d24 ? Cdata : rDataPad1[31:24],
191
                         Caddr=='d23 ? Cdata : rDataPad1[23:16],
192
                         Caddr=='d22 ? Cdata : rDataPad1[15:08],
193
                         Caddr=='d21 ? Cdata : rDataPad1[07:00]};
194
 
195
   //loadPad2:
196
     assign wLoadPad2      = {Caddr=='d62 ? Cdata[1:0] : rDataPad2[161:160],
197
                         Caddr=='d61 ? Cdata : rDataPad2[159:152],
198
                         Caddr=='d60 ? Cdata : rDataPad2[151:144],
199
                         Caddr=='d59 ? Cdata : rDataPad2[143:136],
200
                         Caddr=='d58 ? Cdata : rDataPad2[135:128],
201
                         Caddr=='d57 ? Cdata : rDataPad2[127:120],
202
                         Caddr=='d56 ? Cdata : rDataPad2[119:112],
203
                         Caddr=='d55 ? Cdata : rDataPad2[111:104],
204
                         Caddr=='d54 ? Cdata : rDataPad2[103:96],
205
                         Caddr=='d53 ? Cdata : rDataPad2[95:88],
206
                         Caddr=='d52 ? Cdata : rDataPad2[87:80],
207
                         Caddr=='d51 ? Cdata : rDataPad2[79:72],
208
                         Caddr=='d50 ? Cdata : rDataPad2[71:64],
209
                         Caddr=='d49 ? Cdata : rDataPad2[63:56],
210
                         Caddr=='d48 ? Cdata : rDataPad2[55:48],
211
                         Caddr=='d47 ? Cdata : rDataPad2[47:40],
212
                         Caddr=='d46 ? Cdata : rDataPad2[39:32],
213
                         Caddr=='d45 ? Cdata : rDataPad2[31:24],
214
                         Caddr=='d44 ? Cdata : rDataPad2[23:16],
215
                         Caddr=='d43 ? Cdata : rDataPad2[15:08],
216
                         Caddr=='d42 ? Cdata : rDataPad2[07:00]};
217
 
218
   //loadPad3:
219
     assign wLoadPad3      = {Caddr=='d83 ? Cdata[2:0] : rDataPad3[162:160],
220
                         Caddr=='d82 ? Cdata : rDataPad3[159:152],
221
                         Caddr=='d81 ? Cdata : rDataPad3[151:144],
222
                         Caddr=='d80 ? Cdata : rDataPad3[143:136],
223
                         Caddr=='d79 ? Cdata : rDataPad3[135:128],
224
                         Caddr=='d78 ? Cdata : rDataPad3[127:120],
225
                         Caddr=='d77 ? Cdata : rDataPad3[119:112],
226
                         Caddr=='d76 ? Cdata : rDataPad3[111:104],
227
                         Caddr=='d75 ? Cdata : rDataPad3[103:96],
228
                         Caddr=='d74 ? Cdata : rDataPad3[95:88],
229
                         Caddr=='d73 ? Cdata : rDataPad3[87:80],
230
                         Caddr=='d72 ? Cdata : rDataPad3[79:72],
231
                         Caddr=='d71 ? Cdata : rDataPad3[71:64],
232
                         Caddr=='d70 ? Cdata : rDataPad3[63:56],
233
                         Caddr=='d69 ? Cdata : rDataPad3[55:48],
234
                         Caddr=='d68 ? Cdata : rDataPad3[47:40],
235
                         Caddr=='d67 ? Cdata : rDataPad3[39:32],
236
                         Caddr=='d66 ? Cdata : rDataPad3[31:24],
237
                         Caddr=='d65 ? Cdata : rDataPad3[23:16],
238
                         Caddr=='d64 ? Cdata : rDataPad3[15:08],
239
                         Caddr=='d63 ? Cdata : rDataPad3[07:00]};
240
 
241
   //loadInjector:
242
     assign wLoadInjector  = {
243
                         Caddr=='d87 ? Cdata : rDataInjector[31:24],
244
                         Caddr=='d86 ? Cdata : rDataInjector[23:16],
245
                         Caddr=='d85 ? Cdata : rDataInjector[15:08],
246
                         Caddr=='d84 ? Cdata : rDataInjector[07:00]};
247
 
248
 
249
   //loadPadSel:
250
     assign wLoadPadSel    = {
251
                         Caddr=='d92 ? Cdata : rDataPadSel[39:32],
252
                         Caddr=='d91 ? Cdata : rDataPadSel[31:24],
253
                         Caddr=='d90 ? Cdata : rDataPadSel[23:16],
254
                         Caddr=='d89 ? Cdata : rDataPadSel[15:08],
255
                         Caddr=='d88 ? Cdata : rDataPadSel[07:00]};
256
 
257
/*Logic for generating PRN by selcting pad values with the help of pad select*/
258
   assign wSelectPadBit    = {rDataPadSel[31], rDataPadSel[3], rDataPadSel[5], rDataPadSel[19], rDataPadSel[8]};
259
   assign wPadAmount       = {1'b1, rDataInjector[30], rDataInjector[5], rDataInjector[9], rDataInjector[2], rDataInjector[27]};
260
 
261
assign wPRN =
262
      (wSelectPadBit == 5'd00) ? rDataPad1[15] :
263
      (wSelectPadBit == 5'd01) ? rDataPad0[37] :
264
      (wSelectPadBit == 5'd02) ? rDataPad2[73] :
265
      (wSelectPadBit == 5'd03) ? rDataPad3[99] :
266
      (wSelectPadBit == 5'd04) ? rDataPad0[121] :
267
      (wSelectPadBit == 5'd05) ? rDataPad1[130] :
268
      (wSelectPadBit == 5'd06) ? rDataPad3[15] :
269
      (wSelectPadBit == 5'd07) ? rDataPad2[9] :
270
      (wSelectPadBit == 5'd08) ? rDataPad3[97] :
271
      (wSelectPadBit == 5'd09) ? rDataPad2[140] :
272
      (wSelectPadBit == 5'd10) ? rDataPad1[4] :
273
      (wSelectPadBit == 5'd11) ? rDataPad0[88] :
274
      (wSelectPadBit == 5'd12) ? rDataPad0[33] :
275
      (wSelectPadBit == 5'd13) ? rDataPad1[75] :
276
      (wSelectPadBit == 5'd14) ? rDataPad2[35] :
277
      (wSelectPadBit == 5'd15) ? rDataPad3[155] :
278
      (wSelectPadBit == 5'd16) ? rDataPad2[28] :
279
      (wSelectPadBit == 5'd17) ? rDataPad1[150] :
280
      (wSelectPadBit == 5'd18) ? rDataPad3[29] :
281
      (wSelectPadBit == 5'd19) ? rDataPad0[144] :
282
      (wSelectPadBit == 5'd20) ? rDataPad0[127] :
283
      (wSelectPadBit == 5'd21) ? rDataPad1[125] :
284
      (wSelectPadBit == 5'd22) ? rDataPad2[0] :
285
      (wSelectPadBit == 5'd23) ? rDataPad3[5] :
286
      (wSelectPadBit == 5'd24) ? rDataPad0[110] :
287
      (wSelectPadBit == 5'd25) ? rDataPad3[87] :
288
      (wSelectPadBit == 5'd26) ? rDataPad1[19] :
289
      (wSelectPadBit == 5'd27) ? rDataPad2[82] :
290
      (wSelectPadBit == 5'd28) ? rDataPad0[48] :
291
      (wSelectPadBit == 5'd29) ? rDataPad1[47] :
292
      (wSelectPadBit == 5'd30) ? rDataPad2[46] :
293
                                 rDataPad3[51];
294
 
295
always @(posedge Clk or posedge Reset) begin
296
  if(Reset == 1'b1) begin
297
     rDataPad0      <= 'b0;
298
     rDataPad1      <= 'b0;
299
     rDataPad2      <= 'b0;
300
     rDataPad3      <= 'b0;
301
     rDataPadSel    <= 'b0;
302
     rDataCDATA     <= 'b0;
303
     rDataInjector  <= 'b0;
304
     nextState <= stateReset;
305
  end
306
  else
307
  begin
308
      rDataPad0     <= wXorPad0;
309
      rDataPad1     <= wXorPad1;
310
      rDataPad2     <= wXorPad2;
311
      rDataPad3     <= wXorPad3;
312
      rDataPadSel   <= wXorPadSel;
313
      rDataCDATA    <= wXorCDATA;
314
      rDataInjector <= wXorInjector;
315
      opDin         <= wopDin;
316
/*State Machine code*/
317
 
318
    case(nextState)
319
 
320
      stateReset: begin
321
         rIdle         <= 1'b1;
322
         rIdleInjector <= 1'b1;
323
         rIdleCDATA    <= 1'b1;
324
         rIsBW         <= 1'b0;
325
         rDataOut      <= 1'b0;
326
         nextState     <= stateLoadPads;
327
      end
328
 
329
      stateLoadPads: begin
330
         rIdle            <= 1'b1;
331
         rIdleInjector    <= 1'b1;
332
         rIdleCDATA       <= 1'b1;
333
         rIsBW            <= 1'b0;
334
         if(inEmpty == 1'b1)
335
           nextState      <= stateLoadPads;
336
         else begin
337
            ipFifoLoadCnt  = 0;
338
            nextState     <= stateLoad;
339
         end
340
 
341
         end
342
 
343
       stateLoad: begin
344
          rIdle         <= 1'b1;
345
          rIdleInjector <= 1'b1;
346
          rIdleCDATA    <= 1'b1;
347
          rIsBW         <= 1'b0;
348
          rPadAmount    <= wPadAmount;
349
          if(inEmpty == 1'b0) begin
350
             case(ipFifoLoadCnt)
351
               0: rDataCDATA[31:24] <= inDout;
352
               1: rDataCDATA[23:16] <= inDout;
353
               2: rDataCDATA[15:8]  <= inDout;
354
               3: rDataCDATA[7:0]   <= inDout;
355
             endcase // case (ipFifoLoadCnt)
356
          ipFifoLoadCnt = ipFifoLoadCnt+1;
357
          end
358
          if(ipFifoLoadCnt == 4) begin
359
            nextState     <= stateStepFW;
360
            PadCounter     = 0;
361
            injectorCounter= 0;
362
            rIdle         <= 1'b0;
363
            rDirection    <= 1'b1;
364
            rIdleCDATA    <= 1'b1;
365
            rIdleInjector <= 1'b0;
366
            rIsBW         <= 1'b0;
367
          end
368
          else
369
            nextState <= stateLoad;
370
 
371
       end // case: (stateLoad)
372
 
373
      stateStepFW: begin
374
         ipFifoLoadCnt  = 0;
375
         rIdle         <= 1'b0;
376
         rDirection    <= 1'b1;
377
         rIdleCDATA    <= 1'b1;
378
         rIsBW         <= 1'b0;
379
         unConfuserCnt  = 0;
380
         if(PadCounter == rPadAmount-1) begin
381
           nextState   <= stateStepBW;
382
           rDirection  <= 1'b0;
383
           rIsBW       <= 1'b1;
384
           rPRN        <= 1'b0;
385
//         rIdleCDATA  <= 1'b0;
386
           PadCounter   = PadCounter-1;
387
         end
388
         else
389
           nextState   <= stateStepFW;
390
         if(injectorCounter >= 38) begin
391
           rIdleInjector <= 1'b1;
392
         end
393
         else rIdleInjector <= 1'b0;
394
         PadCounter     = PadCounter+1;
395
         injectorCounter= injectorCounter+1;
396
      end // case: (stateStepFW)
397
 
398
      stateStepBW: begin
399
         rIdle         <= 1'b0;
400
         if(PadCounter == rPadAmount-1) begin
401
          rIsBW        <= 1'b0;
402
          rPRN         <= 1'b0;
403
         end
404
         else begin
405
          rIsBW        <= 1'b0;
406
          rPRN         <= wPRN;
407
         end
408
         if(injectorCounter >= 38) begin
409
          rIdleInjector <= 1'b1;
410
          //injectorCounter = injectorCounter+1;
411
         end
412
         else begin
413
          rIdleInjector <= 1'b0;
414
          injectorCounter= injectorCounter+1;
415
         end
416
         rDirection    <= 1'b0;
417
         rIsBW         <= 1'b0;
418
         rIdleCDATA  <= 1'b0;
419
         PadCounter = PadCounter - 1;
420
         unConfuserCnt     = unConfuserCnt+1;
421
         if(PadCounter == -1) begin
422
            nextState     <= stateCDATABW;
423
            opFifoLoadCnt  = 0;
424
            rIdle         <= 1'b1;
425
            rIdleInjector <= 1'b1;
426
            rIdleCDATA    <= 1'b0;
427
            rIsBW         <= 1'b0;
428
         end
429
         else
430
           nextState      <= stateStepBW;
431
      end // case: (stateStepBW)
432
 
433
      stateCDATABW: begin
434
         rIdle         <= 1'b1;
435
         rIdleCDATA    <= 1'b1;
436
         rIdleInjector <= 1'b1;
437
         rIsBW         <= 1'b0;
438
         nextState     <= stateLoadOut;
439
      end
440
 
441
      stateLoadOut: begin
442
         rIdle         <= 1'b1;
443
         rIdleCDATA    <= 1'b1;
444
         rIdleInjector <= 1'b1;
445
         rIsBW         <= 1'b0;
446
         rDataOut      <= 1'b1;
447
         if(opFull == 1'b0)
448
           opFifoLoadCnt = opFifoLoadCnt+1;
449
 
450
         if(opFifoLoadCnt == 4) begin
451
          rIdle        <= 1'b0;
452
          rDirection   <= 1'b1;
453
          PadCounter    = 0;
454
          rIdleCDATA   <= 1'b1;
455
          rIdleInjector<= 1'b1;
456
          nextState    <= stateFinalFW;
457
         end
458
      end // case: (stateLoadOut)
459
 
460
      stateFinalFW: begin
461
         rIdle         <= 1'b0;
462
         rDirection    <= 1'b1;
463
         rIdleCDATA    <= 1'b1;
464
         rIdleInjector <= 1'b1;
465
         rDataOut      <= 1'b0;
466
         if(PadCounter == rPadAmount-2) begin
467
          if(inEmpty == 1'b1)
468
           nextState   <= stateLoadPads;
469
          else begin
470
           ipFifoLoadCnt = 0;
471
           nextState    <= stateLoad; end
472
         end
473
         else
474
           nextState   <= stateFinalFW;
475
        PadCounter = PadCounter+1;
476
       end
477
      default: $display("Wrong CHoice");
478
 
479
    endcase // case (nextState)
480
   end
481
 end // always @ (posedge Clk or wReset)
482
endmodule

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