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[/] [usb_fpga_2_04/] [trunk/] [include/] [ztex-descriptors.h] - Blame information for rev 2

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1 2 ZTEX 
/*!
2 
   ZTEX Firmware Kit for EZ-USB FX2 Microcontrollers
3 
   Copyright (C) 2009-2014 ZTEX GmbH.
4 
   http://www.ztex.de
5 
 
6 
   This program is free software; you can redistribute it and/or modify
7 
   it under the terms of the GNU General Public License version 3 as
8 
   published by the Free Software Foundation.
9 
 
10 
   This program is distributed in the hope that it will be useful, but
11 
   WITHOUT ANY WARRANTY; without even the implied warranty of
12 
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 
   General Public License for more details.
14 
 
15 
   You should have received a copy of the GNU General Public License
16 
   along with this program; if not, see http://www.gnu.org/licenses/.
17 
!*/
18 
 
19 
/*
20 
   Defines the USB descriptors
21 
*/
22 
 
23 
#ifndef[ZTEX_DESCRIPTORS_H]
24 
#define[ZTEX_DESCRIPTORS_H]
25 
 
26 
#define[ZTEX_DESCRIPTOR_OFFS][0x06c]
27 
#define[ZTEX_DESCRIPTOR_LEN][40]
28 
 
29 
__xdata __at ZTEX_DESCRIPTOR_OFFS BYTE ZTEX_DESCRIPTOR;
30 
 
31 
/* ZTEX descriptor version. Must be 1. */
32 
__xdata __at ZTEX_DESCRIPTOR_OFFS+1 BYTE ZTEX_DESCRIPTOR_VERSION;
33 
 
34 
/* Must not be modified, ID="ZTEX" */
35 
__xdata __at ZTEX_DESCRIPTOR_OFFS+2 BYTE ZTEXID[4];
36 
 
37 
/*
38 
   Product ID and firmware compatibility information.
39 
 
40 
   A firmware can overwrite an installed one if
41 
   if ( INSTALLED.PRODUCTID[0]==0 || PRODUCTID[0]==0 || INSTALLED.PRODUCTID[0]==PRODUCTID[0] ) &&
42 
      ( INSTALLED.PRODUCTID[1]==0 || PRODUCTID[1]==0 || INSTALLED.PRODUCTID[1]==PRODUCTID[1] ) &&
43 
      ( INSTALLED.PRODUCTID[2]==0 || PRODUCTID[2]==0 || INSTALLED.PRODUCTID[2]==PRODUCTID[2] ) &&
44 
      ( INSTALLED.PRODUCTID[3]==0 || PRODUCTID[3]==0 || INSTALLED.PRODUCTID[3]==PRODUCTID[3] )
45 
 
46 
   Reserved Product ID's:
47 
 
48 
   0.0.0.0              // default Product ID (no product specified)
49 
   1.*.*.*              // may be used for experimental purposes
50 
   10.*.*.*             // used for ZTEX products
51 
   10.11.*.*            // ZTEX USB-FPGA-Module 1.2
52 
   10.12.*.*            // ZTEX USB-FPGA-Module 1.11
53 
   10.12.2.1..4         // NIT (http://www.niteurope.com/)
54 
   10.13.*.*            // ZTEX USB-FPGA-Module 1.15 (not 1.15y)
55 
   10.14.*.*            // ZTEX USB-FPGA-Module 1.15x
56 
   10.15.*.*            // ZTEX USB-FPGA-Module 1.15y
57 
   10.16.*.*            // ZTEX USB-FPGA-Module 2.16
58 
   10.17.*.*            // ZTEX USB-FPGA-Module 2.13
59 
   10.18.*.*            // ZTEX USB-FPGA-Module 2.01
60 
   10.19.*.*            // ZTEX USB-FPGA-Module 2.04
61 
   10.20.*.*            // ZTEX USB-Module 1.0
62 
   10.30.*.*            // ZTEX USB-XMEGA-Module 1.0
63 
   10.0.1.1             // ZTEX bitminer firmware
64 
 
65 
   Please contact us (http://www.ztex.de/contact.e.html) if you want to register/reserve a Product ID (range).
66 
*/
67 
__xdata __at ZTEX_DESCRIPTOR_OFFS+6 BYTE PRODUCT_ID[4];
68 
 
69 
/* Firmware version, may be used to distinguish seveveral firmware versions */
70 
__xdata __at ZTEX_DESCRIPTOR_OFFS+10 BYTE FW_VERSION;
71 
 
72 
/* Interface version. Must be 1. */
73 
__xdata __at ZTEX_DESCRIPTOR_OFFS+11 BYTE INTERFACE_VERSION;
74 
 
75 
/*
76 
    Standard interface capabilities:
77 
        0.0  : EEPROM read/write, see ztex-eeprom.h
78 
        0.1  : FPGA configuration, see ztex-fpga.h
79 
        0.2  : Flash memory support, see ztex-flash1.h
80 
        0.3  : Debug helper, see ztex-debug.h
81 
        0.4  : AVR XMEGA support, see ztex-xmega.h
82 
        0.5  : High speed FPGA configuration support
83 
        0.6  : MAC EEPROM support
84 
        0.7  : Multi-FPGA support
85 
        1.0  : Temperature sensor support
86 
*/
87 
__xdata __at ZTEX_DESCRIPTOR_OFFS+12 BYTE INTERFACE_CAPABILITIES[6];
88 
 
89 
/* Space for settings which depends on PRODUCT_ID, e.g extra capabilities */
90 
__xdata __at ZTEX_DESCRIPTOR_OFFS+18 BYTE MODULE_RESERVED[12];
91 
 
92 
/*
93 
   Serial number string
94 
   default: "0000000000"
95 
   Should only be modified by the the firmware upload software
96 
*/
97 
__xdata __at ZTEX_DESCRIPTOR_OFFS+30 BYTE SN_STRING[10];
98 
 
99 
/* Are Vendor ID and Product ID defined? */
100 
#ifndef[USB_VENDOR_ID]
101 
#error[No USB Vendor ID defined]
102 
#endif
103 
 
104 
#ifndef[USB_PRODUCT_ID]
105 
#error[No USB Product ID defined]
106 
#endif
107 
 
108 
/* Prepare the Interfaces, i.e. check which interfaces are defined */
109 
#define[CONFIGURE_INTERFACE(][);][
110 
#define[CONFIG_INTERFACE$0]
111 
#ifeq[EP1IN_INTERFACE][$0]
112 
#elifeq[EP1OUT_INTERFACE][$0]
113 
#elifeq[EP2_INTERFACE][$0]
114 
#elifeq[EP4_INTERFACE][$0]
115 
#elifeq[EP6_INTERFACE][$0]
116 
#elifneq[EP8_INTERFACE][$0]
117 
#udefine[CONFIG_INTERFACE$0]
118 
#endif
119 
#ifdef[CONFIG_INTERFACE$0]
120 
//Interface $0: YES
121 
#else
122 
//Interface $0: NO
123 
#endif]
124 
 
125 
CONFIGURE_INTERFACE(0);
126 
CONFIGURE_INTERFACE(1);
127 
CONFIGURE_INTERFACE(2);
128 
CONFIGURE_INTERFACE(3);
129 
 
130 
/* define the ZTEX descriptor */
131 
void abscode_identity()// _naked
132 
{
133 
    __asm
134 
    .area ABSCODE (ABS,CODE)
135 
 
136 
    .org ZTEX_DESCRIPTOR_OFFS
137 
    .db ZTEX_DESCRIPTOR_LEN
138 
 
139 
    .org _ZTEX_DESCRIPTOR_VERSION
140 
    .db 1
141 
 
142 
    .org _ZTEXID
143 
    .ascii "ZTEX"
144 
 
145 
    .org _PRODUCT_ID
146 
    .db PRODUCT_ID_0
147 
    .db PRODUCT_ID_1
148 
    .db PRODUCT_ID_2
149 
    .db PRODUCT_ID_3
150 
 
151 
    .org _FW_VERSION
152 
    .db FWVER
153 
 
154 
    .org _INTERFACE_VERSION
155 
    .db 1
156 
 
157 
    .org _INTERFACE_CAPABILITIES
158 
    .db 0
159 
#ifdef[@CAPABILITY_EEPROM;]
160 
#nolf
161 
 + 1
162 
#endif
163 
#ifdef[@CAPABILITY_FPGA;]
164 
#nolf
165 
 + 2
166 
#endif
167 
#ifdef[@CAPABILITY_FLASH;]
168 
#nolf
169 
 + 4
170 
#endif
171 
#ifdef[@CAPABILITY_DEBUG;]
172 
#nolf
173 
 + 8
174 
#endif
175 
#ifdef[@CAPABILITY_XMEGA;]
176 
#nolf
177 
 + 16
178 
#endif
179 
#ifdef[@CAPABILITY_HS_FPGA;]
180 
#nolf
181 
 + 32
182 
#endif
183 
#ifdef[@CAPABILITY_MAC_EEPROM;]
184 
#nolf
185 
 + 64
186 
#endif
187 
#ifdef[@CAPABILITY_MULTI_FPGA;]
188 
#nolf
189 
 + 128
190 
#endif
191 
    .db 0
192 
    .db 0
193 
    .db 0
194 
    .db 0
195 
    .db 0
196 
 
197 
    .org _MODULE_RESERVED
198 
    .db MODULE_RESERVED_00
199 
    .db MODULE_RESERVED_01
200 
    .db MODULE_RESERVED_02
201 
    .db MODULE_RESERVED_03
202 
    .db MODULE_RESERVED_04
203 
    .db MODULE_RESERVED_05
204 
    .db MODULE_RESERVED_06
205 
    .db MODULE_RESERVED_07
206 
    .db MODULE_RESERVED_08
207 
    .db MODULE_RESERVED_09
208 
    .db MODULE_RESERVED_10
209 
    .db MODULE_RESERVED_11
210 
 
211 
    .org _SN_STRING
212 
    .ascii "0000000000"
213 
 
214 
    .area CSEG    (CODE)
215 
    __endasm;
216 
}
217 
 
218 
/* *********************************************************************
219 
   ***** strings *******************************************************
220 
   ********************************************************************* */
221 
__code char manufacturerString[] = MANUFACTURER_STRING;
222 
__code char productString[] = PRODUCT_STRING;
223 
__code char configurationString[] = CONFIGURATION_STRING;
224 
 
225 
 
226 
/* *********************************************************************
227 
   ***** descriptors ***************************************************
228 
   ********************************************************************* */
229 
#define[EP_DESCRIPTOR(][);][
230 
                                // Endpoint $0 descriptor
231 
        ,7                      // 0, Descriptor length
232 
        ,5                      // 1, Descriptor type
233 
#ifeq[$0][1IN]
234 
        ,0x81                   // 2, direction=output, address=1
235 
#elifeq[$0][1OUT]
236 
        ,0x01                   // 2, direction=output, address=1
237 
#elifeq[EP$0_DIR][IN]
238 
        ,0x80+$0                 // 2, direction=output, address=$0
239 
#elifeq[EP$0_DIR][OUT]
240 
        ,$0                      // 2, direction=input, address=$0
241 
#else
242 
#error[Invalid direction for endpoint $0 (`IN' or `ÒUT' expected)]
243 
#endif
244 
#ifeq[EP$0_TYPE][ISO]
245 
        ,1                      // 3, ISO transferns
246 
#elifeq[EP$0_TYPE][BULK]
247 
        ,2                      // 3, BULK transferns
248 
#elifeq[EP$0_TYPE][INT]
249 
        ,3                      // 3, INT transferns
250 
#else
251 
#error[Invalid type for endpoint $0: `EP$0_TYPE' (`ISO', 'BULK' or `INT' expected)]
252 
#endif
253 
#ifdef[HIGH_SPEED]
254 
        ,EP$0_SIZE & 0xff        // 4, max. packet size (L)
255 
        ,EP$0_SIZE >> 8  // 5, max. packet size (H)
256 
#ifneq[EP$0_TYPE][BULK]
257 
            | ( (EP$0_PPMF-1) << 3 )
258 
#endif
259 
#else
260 
        ,64                     // 4, max. packet size (L)
261 
        ,0                       // 5, max. packet size (H)
262 
#endif
263 
#ifeq[EP$0_TYPE][BULK]
264 
        ,0                       // 6, Polling interval
265 
#elifeq[EP$0_TYPE][ISO]
266 
        ,1                      // 6, Polling interval (1ms if Full Speed mode, 125µs in High Speed Mode)
267 
#else
268 
        ,EP$0_POLL               // 6, Polling interval (1ms if Full Speed mode, 125µs in High Speed Mode)
269 
#endif
270 
]
271 
 
272 
#define[INTERFACE_DESCRIPTOR(][);][
273 
                // Interface $0 descriptor
274 
        ,9      // 0, Descriptor length
275 
        ,0x04   // 1, Descriptor type
276 
        ,0       // 2, Zero-based index of this interface
277 
#ifneq[$0][0]
278 
#ifdef[CONFIG_INTERFACE0]
279 
          +1
280 
#endif
281 
#ifneq[$0][1]
282 
#ifdef[CONFIG_INTERFACE1]
283 
          +1
284 
#endif
285 
#ifneq[$0][2]
286 
#ifdef[CONFIG_INTERFACE2]
287 
          +1
288 
#endif
289 
#endif
290 
#endif
291 
#endif
292 
        ,0       // 3, Alternate setting 0
293 
        ,0       // 4, Number of end points
294 
#ifeq[EP1IN_INTERFACE][$0]
295 
          +1
296 
#endif
297 
#ifeq[EP1OUT_INTERFACE][$0]
298 
          +1
299 
#endif
300 
#ifeq[EP2_INTERFACE][$0]
301 
          +1
302 
#endif
303 
#ifeq[EP4_INTERFACE][$0]
304 
          +1
305 
#endif
306 
#ifeq[EP6_INTERFACE][$0]
307 
          +1
308 
#endif
309 
#ifeq[EP8_INTERFACE][$0]
310 
          +1
311 
#endif
312 
        ,0xff   // 5, Interface class
313 
        ,0xff   // 6, Interface sub class
314 
        ,0xff   // 7, Interface protocol
315 
        ,0       // 8, Index of interface string descriptor
316 
#ifeq[EP1IN_INTERFACE][$0]
317 
         EP_DESCRIPTOR(1IN);
318 
#endif
319 
#ifeq[EP1OUT_INTERFACE][$0]
320 
         EP_DESCRIPTOR(1OUT);
321 
#endif
322 
#ifeq[EP2_INTERFACE][$0]
323 
         EP_DESCRIPTOR(2);
324 
#endif
325 
#ifeq[EP4_INTERFACE][$0]
326 
         EP_DESCRIPTOR(4);
327 
#endif
328 
#ifeq[EP6_INTERFACE][$0]
329 
         EP_DESCRIPTOR(6);
330 
#endif
331 
#ifeq[EP8_INTERFACE][$0]
332 
         EP_DESCRIPTOR(8);
333 
#endif
334 
]
335 
 
336 
#define[APPEND_PADBYTE(][);][__code BYTE $0_PadByte[2-(sizeof($0) & 1)] = { 0 };]
337 
 
338 
#ifdef[PAD_BYTE]                // to ensure word alignment of the descriptors; PAD_BYTE is defined automatically by bmpsdcc script
339 
__code BYTE PadByte = 0;
340 
#endif
341 
 
342 
__code BYTE DeviceDescriptor[] =
343 
    {
344 
        18,     // 0, Descriptor length
345 
        0x01,   // 1, Descriptor type
346 
        0x00,   // 2, Specification Version (L)
347 
        0x02,   // 3, Specification Version (H)
348 
        0xff,   // 4, Device class
349 
        0xff,   // 5, Device sub-class
350 
        0xff,   // 6, Device protocol
351 
        64,     // 7, Maximum packet size for EP0
352 
        (USB_VENDOR_ID) & 255,  // 8, VENDOR_ID (L)
353 
        (USB_VENDOR_ID) >> 8,   // 9, VENDOR_ID (H)
354 
        (USB_PRODUCT_ID) & 255, // 10, PRODUCT_ID (L)
355 
        (USB_PRODUCT_ID) >> 8,  // 11, PRODUCT_ID (H)
356 
        0x00,   // 12, device release number (BCD, L)
357 
        0x00,   // 13, device release number (BCD, H)
358 
        1,      // 14, Manufacturer string index
359 
        2,      // 15, Product string index
360 
        3,      // 16, Serial number string index
361 
        1       // 17, Number of configurations
362 
    };
363 
 
364 
__code BYTE DeviceQualifierDescriptor[] =
365 
    {
366 
        10,     // 0, Descriptor length
367 
        0x06,   // 1, Decriptor type
368 
        0x00,   // 2, Specification Version (L)
369 
        0x02,   // 3, Specification Version (H)
370 
        0xff,   // 4, Device class
371 
        0xff,   // 5, Device sub-class
372 
        0xff,   // 6, Device protocol
373 
        64,     // 7, Maximum packet size (EP0?)
374 
        1,      // 8, Number of configurations
375 
        0,       // 9, Reserved, must be zero
376 
    };
377 
 
378 
__code BYTE HighSpeedConfigDescriptor[] =
379 
    {
380 
#define[HIGH_SPEED]
381 
        9       // 0, Descriptor length
382 
        ,0x02   // 1, Decriptor type
383 
        ,sizeof(HighSpeedConfigDescriptor) & 0xff       // 2, Total length (LSB)
384 
//      ,sizeof(HighSpeedConfigDescriptor) >> 8         // 3, Total length (MB)
385 
        ,0                                               // 3, To avoid warnings, descriptor length will never exceed 255 bytes
386 
        ,0       // 4, Number of Interfaces
387 
#ifdef[CONFIG_INTERFACE0]
388 
          +1
389 
#endif
390 
#ifdef[CONFIG_INTERFACE1]
391 
          +1
392 
#endif
393 
#ifdef[CONFIG_INTERFACE2]
394 
          +1
395 
#endif
396 
#ifdef[CONFIG_INTERFACE3]
397 
          +1
398 
#endif
399 
 
400 
        ,1      // 5, Configuration number
401 
        ,4      // 6, Configuration string
402 
        ,0xc0   // 7, Attributes: bus and self powered
403 
        ,50     // Maximum bus power 100 mA
404 
#ifdef[CONFIG_INTERFACE0]
405 
        INTERFACE_DESCRIPTOR(0);
406 
#endif
407 
#ifdef[CONFIG_INTERFACE1]
408 
        INTERFACE_DESCRIPTOR(1);
409 
#endif
410 
#ifdef[CONFIG_INTERFACE2]
411 
        INTERFACE_DESCRIPTOR(2);
412 
#endif
413 
#ifdef[CONFIG_INTERFACE3]
414 
        INTERFACE_DESCRIPTOR(3);
415 
#endif
416 
#udefine[HIGH_SPEED]
417 
    };
418 
APPEND_PADBYTE(HighSpeedConfigDescriptor);
419 
 
420 
__code BYTE FullSpeedConfigDescriptor[] =
421 
    {
422 
        9       // 0, Descriptor length
423 
        ,0x02   // 1, Decriptor type
424 
        ,sizeof(FullSpeedConfigDescriptor) & 0xff       // 2, Total length (LSB)
425 
//      ,sizeof(FullSpeedConfigDescriptor) >> 8         // 3, Total length (MSB)
426 
        ,0                                               // 3, To avoid warnings, descriptor length will never exceed 255 bytes
427 
        ,0       // 4, Number of Interfaces
428 
#ifdef[CONFIG_INTERFACE0]
429 
          +1
430 
#endif
431 
#ifdef[CONFIG_INTERFACE1]
432 
          +1
433 
#endif
434 
#ifdef[CONFIG_INTERFACE2]
435 
          +1
436 
#endif
437 
#ifdef[CONFIG_INTERFACE3]
438 
          +1
439 
#endif
440 
 
441 
        ,1      // 5, Configuration number
442 
        ,4      // 6, Configuration string
443 
        ,0xc0   // 7, Attributes: bus and self powered
444 
        ,50     // Maximum bus power 100 mA
445 
#ifdef[CONFIG_INTERFACE0]
446 
        INTERFACE_DESCRIPTOR(0);
447 
#endif
448 
#ifdef[CONFIG_INTERFACE1]
449 
        INTERFACE_DESCRIPTOR(1);
450 
#endif
451 
#ifdef[CONFIG_INTERFACE2]
452 
        INTERFACE_DESCRIPTOR(2);
453 
#endif
454 
#ifdef[CONFIG_INTERFACE3]
455 
        INTERFACE_DESCRIPTOR(3);
456 
#endif
457 
    };
458 
APPEND_PADBYTE(FullSpeedConfigDescriptor);
459 
 
460 
__code BYTE EmptyStringDescriptor[] =
461 
    {
462 
        sizeof(EmptyStringDescriptor),          // Length
463 
        0x03,                                   // Descriptor type
464 
        0, 0
465 
    };
466 
 
467 
#endif  /*ZTEX_DESCRIPTORS_H*/

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