URL
https://opencores.org/ocsvn/usb_fpga_2_13/usb_fpga_2_13/trunk
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ZTEX |
# CLKOUT/FXCLK
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NET "clk" TNM_NET = "clk";
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TIMESPEC "ts_clk" = PERIOD "clk" 48 MHz HIGH 50 %;
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NET "clk" LOC = "J16" | IOSTANDARD = LVCMOS33 ;
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NET "PB<0>" LOC = "D16" | IOSTANDARD = LVCMOS33 ; # PB0/FD0
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NET "PB<1>" LOC = "F15" | IOSTANDARD = LVCMOS33 ; # PB1/FD1
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NET "PB<2>" LOC = "E15" | IOSTANDARD = LVCMOS33 ; # PB2/FD2
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NET "PB<3>" LOC = "D14" | IOSTANDARD = LVCMOS33 ; # PB3/FD3
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NET "PB<4>" LOC = "F13" | IOSTANDARD = LVCMOS33 ; # PB4/FD4
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NET "PB<5>" LOC = "E12" | IOSTANDARD = LVCMOS33 ; # PB5/FD5
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NET "PB<6>" LOC = "F12" | IOSTANDARD = LVCMOS33 ; # PB6/FD6
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NET "PB<7>" LOC = "G12" | IOSTANDARD = LVCMOS33 ; # PB7/FD7
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| 15 |
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NET "PC<0>" LOC = "P10" | IOSTANDARD = LVCMOS33 ; # PC0/GPIFADR0
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NET "PC<1>" LOC = "N12" | IOSTANDARD = LVCMOS33 ; # PC1/GPIFADR1
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NET "PC<2>" LOC = "P12" | IOSTANDARD = LVCMOS33 ; # PC2/GPIFADR2
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NET "PC<3>" LOC = "N5" | IOSTANDARD = LVCMOS33 ; # PC3/GPIFADR3
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NET "PC<4>" LOC = "P5" | IOSTANDARD = LVCMOS33 ; # PC4/GPIFADR4
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NET "PC<5>" LOC = "L8" | IOSTANDARD = LVCMOS33 ; # PC5/GPIFADR5
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NET "PC<6>" LOC = "L7" | IOSTANDARD = LVCMOS33 ; # PC6/GPIFADR6
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| 22 |
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NET "PC<7>" LOC = "R5" | IOSTANDARD = LVCMOS33 ; # PC7/GPIFADR7
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