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Subversion Repositories usb_fpga_2_13

[/] [usb_fpga_2_13/] [trunk/] [include/] [ztex-flash2.h] - Blame information for rev 2

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/*!
   ZTEX Firmware Kit for EZ-USB FX2 Microcontrollers
   Copyright (C) 2009-2014 ZTEX GmbH.
   http://www.ztex.de
 
   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License version 3 as
   published by the Free Software Foundation.
 
   This program is distributed in the hope that it will be useful, but
   WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
   General Public License for more details.
 
   You should have received a copy of the GNU General Public License
   along with this program; if not, see http://www.gnu.org/licenses/.
!*/
 
/*
    Support for standard SPI flash.
*/
 
#ifeq[SPI_PORT][A]
#elifeq[SPI_PORT][B]
#elifeq[SPI_PORT][C]
#elifneq[SPI_PORT][D]
#error[Macro `SPI_PORT' is not defined correctly. Valid values are: `A', `B', `C' and `D'.]
#endif
 
#ifndef[ZTEX_FLASH1_H]
#define[ZTEX_FLASH1_H]
 
#define[@CAPABILITY_FLASH;]
 
#ifndef[SPI_PORT]
#error[SPI_PORT not defined]
#endif
 
#ifndef[SPI_BIT_CS]
#error[SPI_BIT_CS not defined]
#endif
 
#ifndef[SPI_BIT_DI]
#error[SPI_BIT_DI not defined]
#endif
 
#ifndef[SPI_BIT_DO]
#error[SPI_BIT_DO not defined]
#endif
 
#ifndef[SPI_BIT_CLK]
#error[SPI_BIT_CLK not defined]
#endif
 
#ifndef[SPI_OPORT]
#define[SPI_OPORT][SPI_PORT]
#endif
 
#define[SPI_IO@][IOSPI_PORT]
#define[SPI_OIO@][IOSPI_OPORT]
 
#define[SPI_CS][SPI_IO@SPI_BIT_CS]
#define[SPI_CLK][SPI_IO@SPI_BIT_CLK]
#define[SPI_DI][SPI_IO@SPI_BIT_DI]
#define[SPI_DO][SPI_OIO@SPI_BIT_DO]
 
// may be redefined if the first sectors are reserved (e.g. for a FPGA bitstream)
#define[FLASH_FIRST_FREE_SECTOR][0]
 
__xdata BYTE flash_enabled;     // 0    1: enabled, 0:disabled
__xdata WORD flash_sector_size; // 1    sector size <sector size> = MSB==0 : flash_sector_size and 0x7fff ? 1<<(flash_sector_size and 0x7fff)
__xdata DWORD flash_sectors;    // 3    number of sectors
__xdata BYTE flash_ec;          // 7    error code
 
__xdata BYTE spi_vendor;        // 0
__xdata BYTE spi_device;        // 1
__xdata BYTE spi_memtype;       // 2
__xdata BYTE spi_erase_cmd;     // 3
__xdata BYTE spi_last_cmd;      // 4
__xdata BYTE spi_buffer[4];     // 5
 
__xdata WORD spi_write_addr_hi;
__xdata BYTE spi_write_addr_lo;
__xdata BYTE spi_need_pp;
__xdata WORD spi_write_sector;
__xdata BYTE ep0_read_mode;
__xdata BYTE ep0_write_mode;
 
#define[FLASH_EC_TIMEOUT][2]
#define[FLASH_EC_BUSY][3]
#define[FLASH_EC_PENDING][4]
#define[FLASH_EC_NOTSUPPORTED][7]
 
/* *********************************************************************
   ***** spi_clocks ****************************************************
   ********************************************************************* */
// perform c (256 if c=0) clocks
void spi_clocks (BYTE c) {
        c;                                      // this avoids stupid warnings
__asm
        mov     r2,dpl
010014$:
        setb    _SPI_CLK        // 1
        nop                     // 1
        nop                     // 1
        nop                     // 1
        clr     _SPI_CLK        // 1
        djnz    r2,010014$      // 3
__endasm;
}
 
 
/* *********************************************************************
   ***** flash_read_byte ***********************************************
   ********************************************************************* */
// read a single byte from the flash
BYTE flash_read_byte() { // uses r2,r3,r4
__asm
        // 8*7 + 6 = 62 clocks 
        mov     c,_SPI_DO       // 7
        setb    _SPI_CLK
        rlc     a
        clr     _SPI_CLK
 
        mov     c,_SPI_DO       // 6
        setb    _SPI_CLK
        rlc     a
        clr     _SPI_CLK
 
        mov     c,_SPI_DO       // 5
        setb    _SPI_CLK
        rlc     a
        clr     _SPI_CLK
 
        mov     c,_SPI_DO       // 4
        setb    _SPI_CLK
        rlc     a
        clr     _SPI_CLK
 
        mov     c,_SPI_DO       // 3
        setb    _SPI_CLK
        rlc     a
        clr     _SPI_CLK
 
        mov     c,_SPI_DO       // 2
        setb    _SPI_CLK
        rlc     a
        clr     _SPI_CLK
 
        mov     c,_SPI_DO       // 1
        setb    _SPI_CLK
        rlc     a
        clr     _SPI_CLK
 
        mov     c,_SPI_DO       // 0
        setb    _SPI_CLK
        rlc     a
        clr     _SPI_CLK
        mov     dpl,a
        ret
__endasm;
        return 0;                // never ever called (just to avoid warnings)
}
 
/* *********************************************************************
   ***** flash_read ****************************************************
   ********************************************************************* */
// read len (256 if len=0) bytes from the flash to the buffer
void flash_read(__xdata BYTE *buf, BYTE len) {
        *buf;                                   // this avoids stupid warnings
        len;                                    // this too
__asm                                           // *buf is in dptr, len is in _flash_read_PARM_2
        mov     r2,_flash_read_PARM_2
010012$:
        // 2 + len*(8*7 + 9) + 4 = 6 + len*65 clocks
        mov     c,_SPI_DO       // 7
        setb    _SPI_CLK
        rlc     a
        clr     _SPI_CLK
 
        mov     c,_SPI_DO       // 6
        setb    _SPI_CLK
        rlc     a
        clr     _SPI_CLK
 
        mov     c,_SPI_DO       // 5
        setb    _SPI_CLK
        rlc     a
        clr     _SPI_CLK
 
        mov     c,_SPI_DO       // 4
        setb    _SPI_CLK
        rlc     a
        clr     _SPI_CLK
 
        mov     c,_SPI_DO       // 3
        setb    _SPI_CLK
        rlc     a
        clr     _SPI_CLK
 
        mov     c,_SPI_DO       // 2
        setb    _SPI_CLK
        rlc     a
        clr     _SPI_CLK
 
        mov     c,_SPI_DO       // 1
        setb    _SPI_CLK
        rlc     a
        clr     _SPI_CLK
 
        mov     c,_SPI_DO       // 0
        setb    _SPI_CLK
        rlc     a
        clr     _SPI_CLK
 
        movx    @dptr,a
        inc     dptr
        djnz    r2,010012$
__endasm;
}
 
/* *********************************************************************
   ***** spi_write_byte ************************************************
   ********************************************************************* */
// send one bytes from buffer buf to the card
void spi_write_byte (BYTE b) {  // b is in dpl
        b;                              // this avoids stupid warnings
__asm
        // 3 + 8*7 + 4 = 63 clocks 
        mov     a,dpl
        rlc     a               // 7
 
        mov     _SPI_DI,c
        setb    _SPI_CLK
        rlc     a               // 6
        clr     _SPI_CLK
 
        mov     _SPI_DI,c
        setb    _SPI_CLK
        rlc     a               // 5
        clr     _SPI_CLK
 
        mov     _SPI_DI,c
        setb    _SPI_CLK
        rlc     a               // 4
        clr     _SPI_CLK
 
        mov     _SPI_DI,c
        setb    _SPI_CLK
        rlc     a               // 3
        clr     _SPI_CLK
 
        mov     _SPI_DI,c
        setb    _SPI_CLK
        rlc     a               // 2
        clr     _SPI_CLK
 
        mov     _SPI_DI,c
        setb    _SPI_CLK
        rlc     a               // 1
        clr     _SPI_CLK
 
        mov     _SPI_DI,c
        setb    _SPI_CLK
        rlc     a               // 0
        clr     _SPI_CLK
 
        mov     _SPI_DI,c
        setb    _SPI_CLK
        nop
        clr     _SPI_CLK
__endasm;
}
 
/* *********************************************************************
   ***** spi_write *****************************************************
   ********************************************************************* */
// write len (256 if len=0) bytes from the buffer to the flash
void spi_write(__xdata BYTE *buf, BYTE len) {
        *buf;                                   // this avoids stupid warnings
        len;                                    // this too
__asm                                           // *buf is in dptr, len is in _flash_read_PARM_2
        mov     r2,_flash_read_PARM_2
010013$:
        // 2 + len*(3 + 8*7 - 1 + 7 ) + 4 = 6 + len*65 clocks
        movx    a,@dptr
        rlc     a               // 7
 
        mov     _SPI_DI,c
        setb    _SPI_CLK
        rlc     a               // 6
        clr     _SPI_CLK
 
        mov     _SPI_DI,c
        setb    _SPI_CLK
        rlc     a               // 5
        clr     _SPI_CLK
 
        mov     _SPI_DI,c
        setb    _SPI_CLK
        rlc     a               // 4
        clr     _SPI_CLK
 
        mov     _SPI_DI,c
        setb    _SPI_CLK
        rlc     a               // 3
        clr     _SPI_CLK
 
        mov     _SPI_DI,c
        setb    _SPI_CLK
        rlc     a               // 2
        clr     _SPI_CLK
 
        mov     _SPI_DI,c
        setb    _SPI_CLK
        rlc     a               // 1
        clr     _SPI_CLK
 
        mov     _SPI_DI,c
        setb    _SPI_CLK
        rlc     a               // 0
        clr     _SPI_CLK
 
        mov     _SPI_DI,c
        setb    _SPI_CLK
        inc     dptr
        clr     _SPI_CLK
 
        djnz    r2,010013$
__endasm;
}
 
/* *********************************************************************
   ***** spi_select ****************************************************
   ********************************************************************* */
/*
   select the flash (CS)
*/
void spi_select() {
    SPI_CS = 1;                                 // CS = 1;
    spi_clocks(8);                              // 8 dummy clocks to finish a previous command
    SPI_CS = 0;
}
 
/* *********************************************************************
   ***** spi_deselect **************************************************
   ********************************************************************* */
// de-select the flash (CS)
void spi_deselect() {
    SPI_CS = 1;                                 // CS = 1;
    spi_clocks(8);                              // 8 dummy clocks to finish a previous command
}
 
/* *********************************************************************
   ***** spi_start_cmd *************************************************
   ********************************************************************* */
// send a command   
#define[spi_start_cmd(][);][{                   // send a command, argument=0
    spi_last_cmd = $0;
    spi_select();                               // select
    spi_write_byte($0);                          // CMD 90h
}]
 
/* *********************************************************************
   ***** spi_wait ******************************************************
   ********************************************************************* */
/*
   wait if prvious read/write command is still prcessed
   result is flash_ec (FLASH_EC_TIMEOUT or 0)
*/
BYTE spi_wait() {
    WORD i;
    // wait up to 11s
    spi_start_cmd(0x05);
    for (i=0; (flash_read_byte() & bmBIT0) && i<65535; i++ ) {
        spi_clocks(0);                           // 256 dummy clocks
//      uwait(20);
    }
    flash_ec = flash_read_byte() & bmBIT0 ? FLASH_EC_TIMEOUT : 0;
    spi_deselect();
    return flash_ec;
}
 
/* *********************************************************************
   ***** flash_read_init ***********************************************
   ********************************************************************* */
/*
   Start the initialization sequence for reading sector s.
   returns an error code (FLASH_EC_*). 0 means no error.
*/
BYTE flash_read_init(WORD s) {
    if ( (SPI_CS) == 0 ) {
        flash_ec = FLASH_EC_PENDING;
        return FLASH_EC_PENDING;                // we interrupted a pending Flash operation
    }
    OESPI_OPORT &= ~bmBITSPI_BIT_DO;
    OESPI_PORT |= bmBITSPI_BIT_CS | bmBITSPI_BIT_DI | bmBITSPI_BIT_CLK;
    if ( spi_wait() ) {
        return flash_ec;
    }
 
    s = s << ((BYTE)flash_sector_size - 8);
    spi_start_cmd(0x0b);                        // read command
    spi_write_byte(s >> 8);                     // 24 byte address
    spi_write_byte(s & 255);
    spi_write_byte(0);
    spi_clocks(8);                              // 8 dummy clocks
    return 0;
}
 
/* *********************************************************************
   ***** flash_read_next ***********************************************
   ********************************************************************* */
/*
   dummy function for compatibilty
*/
BYTE flash_read_next() {
    return 0;
}
 
 
/* *********************************************************************
   ***** flash_read_finish *********************************************
   ********************************************************************* */
/*
    Runs the finalization sequence for the read operation.
*/
void flash_read_finish(WORD n) {
   n;                                   // avoids warnings
   spi_deselect();
}
 
 
/* *********************************************************************
   ***** spi_pp ********************************************************
   ********************************************************************* */
BYTE spi_pp () {
    spi_deselect();                             // finish previous write cmd
 
    spi_need_pp = 0;
 
    if ( spi_wait() ) {
        return flash_ec;
    }
    spi_start_cmd(0x06);                        // write enable command
    spi_deselect();
 
    spi_start_cmd(0x02);                        // page write
    spi_write_byte(spi_write_addr_hi >> 8);     // 24 byte address
    spi_write_byte(spi_write_addr_hi & 255);
    spi_write_byte(0);
    return 0;
}
 
 
/* *********************************************************************
   ***** flash_write_byte **********************************************
   ********************************************************************* */
BYTE flash_write_byte (BYTE b) {
    if ( spi_need_pp && spi_pp() ) return flash_ec;
    spi_write_byte(b);
    spi_write_addr_lo++;
    if ( spi_write_addr_lo == 0 ) {
        spi_write_addr_hi++;
        spi_deselect();                         // finish write cmd
        spi_need_pp = 1;
    }
    return 0;
}
 
 
/* *********************************************************************
   ***** flash_write ***************************************************
   ********************************************************************* */
// write len (256 if len=0) bytes from the buffer to the flash
BYTE flash_write(__xdata BYTE *buf, BYTE len) {
    BYTE b;
    if ( spi_need_pp && spi_pp() ) return flash_ec;
 
    if ( spi_write_addr_lo == 0 ) {
        spi_write(buf,len);
    }
    else {
        b = (~spi_write_addr_lo) + 1;
        if ( len==0 || len>b ) {
            spi_write(buf,b);
            len-=b;
            spi_write_addr_hi++;
            spi_write_addr_lo=0;
            buf+=b;
            if ( spi_pp() ) return flash_ec;
        }
        spi_write(buf,len);
    }
 
    spi_write_addr_lo+=len;
 
    if ( spi_write_addr_lo == 0 ) {
        spi_write_addr_hi++;
        spi_deselect();                         // finish write cmd
        spi_need_pp = 1;
    }
 
    return 0;
}
 
 
/* *********************************************************************
   ***** flash_write_init **********************************************
   ********************************************************************* */
/*
   Start the initialization sequence for writing sector s
   The whole sector will be modified
   returns an error code (FLASH_EC_*). 0 means no error.
*/
BYTE flash_write_init(WORD s) {
    if ( !SPI_CS ) {
        flash_ec = FLASH_EC_PENDING;
        return FLASH_EC_PENDING;                // we interrupted a pending Flash operation
    }
    OESPI_OPORT &= ~bmBITSPI_BIT_DO;
    OESPI_PORT |= bmBITSPI_BIT_CS | bmBITSPI_BIT_DI | bmBITSPI_BIT_CLK;
    if ( spi_wait() ) {
        return flash_ec;
    }
    spi_write_sector = s;
    s = s << ((BYTE)flash_sector_size - 8);
    spi_write_addr_hi = s;
    spi_write_addr_lo = 0;
 
    spi_start_cmd(0x06);                        // write enable command
    spi_deselect();
 
    spi_start_cmd(spi_erase_cmd);               // erase command
    spi_write_byte(s >> 8);                     // 24 byte address
    spi_write_byte(s & 255);
    spi_write_byte(0);
    spi_deselect();
 
    spi_need_pp = 1;
    return 0;
}
 
 
/* *********************************************************************
   ***** flash_write_finish_sector *************************************
   ********************************************************************* */
/*
   Dummy function for compatibilty.
*/
BYTE flash_write_finish_sector (WORD n) {
    n;
    spi_deselect();
    return 0;
}
 
 
/* *********************************************************************
   ***** flash_write_finish ********************************************
   ********************************************************************* */
/*
   Dummy function for compatibilty.
*/
void flash_write_finish () {
    spi_deselect();
}
 
 
/* *********************************************************************
   ***** flash_write_next **********************************************
   ********************************************************************* */
/*
   Prepare the next sector for writing, see flash_write_finish1.
*/
BYTE flash_write_next () {
    spi_deselect();
    return flash_write_init(spi_write_sector+1);
}
 
 
/* *********************************************************************
   ***** flash_init ****************************************************
   ********************************************************************* */
// init the flash
void flash_init() {
    BYTE i;
 
    PORTCCFG = 0;
 
    flash_enabled = 1;
    flash_ec = 0;
    flash_sector_size = 0x8010;  // 64 KByte
    spi_erase_cmd = 0xd8;
 
    OESPI_OPORT &= ~bmBITSPI_BIT_DO;
    OESPI_PORT |= bmBITSPI_BIT_CS | bmBITSPI_BIT_DI | bmBITSPI_BIT_CLK;
    SPI_CS = 1;
    spi_clocks(0);                               // 256 clocks
 
    spi_start_cmd(0x90);                        // CMD 90h, not supported by all chips
    spi_clocks(24);                             // ADDR=0
    spi_device = flash_read_byte();
    spi_deselect();                             // deselect
 
    spi_start_cmd(0x9F);                        // CMD 9Fh
    flash_read(spi_buffer,3);                   // read data
    spi_deselect();                             // deselect
    if ( spi_buffer[2]<16 || spi_buffer[2]>24 ) {
        goto  disable;
    }
    spi_vendor = spi_buffer[0];
    spi_memtype = spi_buffer[1];
 
#ifeq[USE_4KSECTORS_ENABLED][1]
    if ( ( spi_vendor==1 && spi_memtype == 0x40 ) ||
         ( spi_vendor==0x20 && spi_memtype == 0xba )
       ) {
        // support of uniform 4 kbyte (logical) sectors
        flash_sector_size = 0x800C;  // 4 KByte
        spi_erase_cmd = 0x20;
        i=spi_buffer[2]-12;
    }
    else {
        // support of uniform 64 kbyte (logical) sectors
        i=spi_buffer[2]-16;
    }
#else    
    i=spi_buffer[2]-16;
#endif    
    flash_sectors = 1 << i;
 
    return;
 
disable:
    flash_enabled = 0;
    flash_ec = FLASH_EC_NOTSUPPORTED;
    OESPI_PORT &= ~( bmBITSPI_BIT_CS | bmBITSPI_BIT_DI | bmBITSPI_BIT_CLK );
}
 
 
/* *********************************************************************
   ***** EP0 vendor request 0x40 ***************************************
   ********************************************************************* */
// send flash information structure (card size, error status,  ...) to the host
ADD_EP0_VENDOR_REQUEST((0x40,,
    if ( flash_ec == 0 && SPI_CS == 0 ) {
        flash_ec = FLASH_EC_PENDING;
    }
    MEM_COPY1(flash_enabled,EP0BUF,8);
    EP0BCH = 0;
    EP0BCL = 8;
,,
));;
 
/* *********************************************************************
   ***** EP0 vendor request 0x41 ***************************************
   ********************************************************************* */
/* read modes (ep0_read_mode)
        0: start read
        1: continue read
        2: finish read
*/
void spi_read_ep0 () {
    flash_read(EP0BUF, ep0_payload_transfer);
    if ( ep0_read_mode==2 && ep0_payload_remaining==0 ) {
        spi_deselect();
    }
}
 
ADD_EP0_VENDOR_REQUEST((0x41,,                  // read data
    ep0_read_mode = SETUPDAT[5];
    if ( (ep0_read_mode==0) && flash_read_init((SETUPDAT[3] << 8) | SETUPDAT[2]) ) {
        EP0_STALL;
    }
    spi_read_ep0();
    EP0BCH = 0;
    EP0BCL = ep0_payload_transfer;
,,
    if ( ep0_payload_transfer != 0 ) {
        flash_ec = 0;
        spi_read_ep0();
    }
    EP0BCH = 0;
    EP0BCL = ep0_payload_transfer;
));;
 
/* *********************************************************************
   ***** EP0 vendor command 0x42 ***************************************
   ********************************************************************* */
void spi_send_ep0 () {
    flash_write(EP0BUF, ep0_payload_transfer);
    if ( ep0_write_mode==2 && ep0_payload_remaining==0 ) {
        spi_deselect();
    }
}
 
ADD_EP0_VENDOR_COMMAND((0x42,,                  // write integer number of sectors
    ep0_write_mode = SETUPDAT[5];
    if ( (ep0_write_mode == 0) && flash_write_init((SETUPDAT[3] << 8) | SETUPDAT[2]) ) {
        EP0_STALL;
    }
,,
    if ( ep0_payload_transfer != 0 ) {
        flash_ec = 0;
        spi_send_ep0();
        if ( flash_ec != 0 ) {
            spi_deselect();
            EP0_STALL;
        }
    }
));;
 
/* *********************************************************************
   ***** EP0 vendor request 0x43 ***************************************
   ********************************************************************* */
// send detailed SPI status plus debug information
ADD_EP0_VENDOR_REQUEST((0x43,,
    MEM_COPY1(flash_ec,EP0BUF,10);
    EP0BCH = 0;
    EP0BCL = 10;
,,
));;
 
#endif  /*ZTEX_FLASH1_H*/

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Subversion Repositories usb_fpga_2_13

[/] [usb_fpga_2_13/] [trunk/] [include/] [ztex-flash2.h] - Blame information for rev 2

Line No.	Rev	Author	Line
1	2	ZTEX	`/*!`
2			`ZTEX Firmware Kit for EZ-USB FX2 Microcontrollers`
3			`Copyright (C) 2009-2014 ZTEX GmbH.`
4			`http://www.ztex.de`
5
6			`This program is free software; you can redistribute it and/or modify`
7			`it under the terms of the GNU General Public License version 3 as`
8			`published by the Free Software Foundation.`
9
10			`This program is distributed in the hope that it will be useful, but`
11			`WITHOUT ANY WARRANTY; without even the implied warranty of`
12			`MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU`
13			`General Public License for more details.`
14
15			`You should have received a copy of the GNU General Public License`
16			`along with this program; if not, see http://www.gnu.org/licenses/.`
17			`!*/`
18
19			`/*`
20			`Support for standard SPI flash.`
21			`*/`
22
23			`#ifeq[SPI_PORT][A]`
24			`#elifeq[SPI_PORT][B]`
25			`#elifeq[SPI_PORT][C]`
26			`#elifneq[SPI_PORT][D]`
27			#error[Macro `SPI_PORT' is not defined correctly. Valid values are: `A', `B', `C' and `D'.]
28			`#endif`
29
30			`#ifndef[ZTEX_FLASH1_H]`
31			`#define[ZTEX_FLASH1_H]`
32
33			`#define[@CAPABILITY_FLASH;]`
34
35			`#ifndef[SPI_PORT]`
36			`#error[SPI_PORT not defined]`
37			`#endif`
38
39			`#ifndef[SPI_BIT_CS]`
40			`#error[SPI_BIT_CS not defined]`
41			`#endif`
42
43			`#ifndef[SPI_BIT_DI]`
44			`#error[SPI_BIT_DI not defined]`
45			`#endif`
46
47			`#ifndef[SPI_BIT_DO]`
48			`#error[SPI_BIT_DO not defined]`
49			`#endif`
50
51			`#ifndef[SPI_BIT_CLK]`
52			`#error[SPI_BIT_CLK not defined]`
53			`#endif`
54
55			`#ifndef[SPI_OPORT]`
56			`#define[SPI_OPORT][SPI_PORT]`
57			`#endif`
58
59			`#define[SPI_IO@][IOSPI_PORT]`
60			`#define[SPI_OIO@][IOSPI_OPORT]`
61
62			`#define[SPI_CS][SPI_IO@SPI_BIT_CS]`
63			`#define[SPI_CLK][SPI_IO@SPI_BIT_CLK]`
64			`#define[SPI_DI][SPI_IO@SPI_BIT_DI]`
65			`#define[SPI_DO][SPI_OIO@SPI_BIT_DO]`
66
67			`// may be redefined if the first sectors are reserved (e.g. for a FPGA bitstream)`
68			`#define[FLASH_FIRST_FREE_SECTOR][0]`
69
70			`__xdata BYTE flash_enabled; // 0 1: enabled, 0:disabled`
71			`__xdata WORD flash_sector_size; // 1 sector size <sector size> = MSB==0 : flash_sector_size and 0x7fff ? 1<<(flash_sector_size and 0x7fff)`
72			`__xdata DWORD flash_sectors; // 3 number of sectors`
73			`__xdata BYTE flash_ec; // 7 error code`
74
75			`__xdata BYTE spi_vendor; // 0`
76			`__xdata BYTE spi_device; // 1`
77			`__xdata BYTE spi_memtype; // 2`
78			`__xdata BYTE spi_erase_cmd; // 3`
79			`__xdata BYTE spi_last_cmd; // 4`
80			`__xdata BYTE spi_buffer[4]; // 5`
81
82			`__xdata WORD spi_write_addr_hi;`
83			`__xdata BYTE spi_write_addr_lo;`
84			`__xdata BYTE spi_need_pp;`
85			`__xdata WORD spi_write_sector;`
86			`__xdata BYTE ep0_read_mode;`
87			`__xdata BYTE ep0_write_mode;`
88
89			`#define[FLASH_EC_TIMEOUT][2]`
90			`#define[FLASH_EC_BUSY][3]`
91			`#define[FLASH_EC_PENDING][4]`
92			`#define[FLASH_EC_NOTSUPPORTED][7]`
93
94			`/* *********************************************************************`
95			`*** spi_clocks **************************************************`
96			`********************************************************************* */`
97			`// perform c (256 if c=0) clocks`
98			`void spi_clocks (BYTE c) {`
99			`c; // this avoids stupid warnings`
100			`__asm`
101			`mov r2,dpl`
102			`010014$:`
103			`setb _SPI_CLK // 1`
104			`nop // 1`
105			`nop // 1`
106			`nop // 1`
107			`clr _SPI_CLK // 1`
108			`djnz r2,010014$ // 3`
109			`__endasm;`
110			`}`
111
112
113			`/* *********************************************************************`
114			`*** flash_read_byte *********************************************`
115			`********************************************************************* */`
116			`// read a single byte from the flash`
117			`BYTE flash_read_byte() { // uses r2,r3,r4`
118			`__asm`
119			`// 8*7 + 6 = 62 clocks`
120			`mov c,_SPI_DO // 7`
121			`setb _SPI_CLK`
122			`rlc a`
123			`clr _SPI_CLK`
124
125			`mov c,_SPI_DO // 6`
126			`setb _SPI_CLK`
127			`rlc a`
128			`clr _SPI_CLK`
129
130			`mov c,_SPI_DO // 5`
131			`setb _SPI_CLK`
132			`rlc a`
133			`clr _SPI_CLK`
134
135			`mov c,_SPI_DO // 4`
136			`setb _SPI_CLK`
137			`rlc a`
138			`clr _SPI_CLK`
139
140			`mov c,_SPI_DO // 3`
141			`setb _SPI_CLK`
142			`rlc a`
143			`clr _SPI_CLK`
144
145			`mov c,_SPI_DO // 2`
146			`setb _SPI_CLK`
147			`rlc a`
148			`clr _SPI_CLK`
149
150			`mov c,_SPI_DO // 1`
151			`setb _SPI_CLK`
152			`rlc a`
153			`clr _SPI_CLK`
154
155			`mov c,_SPI_DO // 0`
156			`setb _SPI_CLK`
157			`rlc a`
158			`clr _SPI_CLK`
159			`mov dpl,a`
160			`ret`
161			`__endasm;`
162			`return 0; // never ever called (just to avoid warnings)`
163			`}`
164
165			`/* *********************************************************************`
166			`*** flash_read **************************************************`
167			`********************************************************************* */`
168			`// read len (256 if len=0) bytes from the flash to the buffer`
169			`void flash_read(__xdata BYTE *buf, BYTE len) {`
170			`*buf; // this avoids stupid warnings`
171			`len; // this too`
172			`__asm // *buf is in dptr, len is in _flash_read_PARM_2`
173			`mov r2,_flash_read_PARM_2`
174			`010012$:`
175			`// 2 + len(87 + 9) + 4 = 6 + len*65 clocks`
176			`mov c,_SPI_DO // 7`
177			`setb _SPI_CLK`
178			`rlc a`
179			`clr _SPI_CLK`
180
181			`mov c,_SPI_DO // 6`
182			`setb _SPI_CLK`
183			`rlc a`
184			`clr _SPI_CLK`
185
186			`mov c,_SPI_DO // 5`
187			`setb _SPI_CLK`
188			`rlc a`
189			`clr _SPI_CLK`
190
191			`mov c,_SPI_DO // 4`
192			`setb _SPI_CLK`
193			`rlc a`
194			`clr _SPI_CLK`
195
196			`mov c,_SPI_DO // 3`
197			`setb _SPI_CLK`
198			`rlc a`
199			`clr _SPI_CLK`
200
201			`mov c,_SPI_DO // 2`
202			`setb _SPI_CLK`
203			`rlc a`
204			`clr _SPI_CLK`
205
206			`mov c,_SPI_DO // 1`
207			`setb _SPI_CLK`
208			`rlc a`
209			`clr _SPI_CLK`
210
211			`mov c,_SPI_DO // 0`
212			`setb _SPI_CLK`
213			`rlc a`
214			`clr _SPI_CLK`
215
216			`movx @dptr,a`
217			`inc dptr`
218			`djnz r2,010012$`
219			`__endasm;`
220			`}`
221
222			`/* *********************************************************************`
223			`*** spi_write_byte **********************************************`
224			`********************************************************************* */`
225			`// send one bytes from buffer buf to the card`
226			`void spi_write_byte (BYTE b) { // b is in dpl`
227			`b; // this avoids stupid warnings`
228			`__asm`
229			`// 3 + 8*7 + 4 = 63 clocks`
230			`mov a,dpl`
231			`rlc a // 7`
232
233			`mov _SPI_DI,c`
234			`setb _SPI_CLK`
235			`rlc a // 6`
236			`clr _SPI_CLK`
237
238			`mov _SPI_DI,c`
239			`setb _SPI_CLK`
240			`rlc a // 5`
241			`clr _SPI_CLK`
242
243			`mov _SPI_DI,c`
244			`setb _SPI_CLK`
245			`rlc a // 4`
246			`clr _SPI_CLK`
247
248			`mov _SPI_DI,c`
249			`setb _SPI_CLK`
250			`rlc a // 3`
251			`clr _SPI_CLK`
252
253			`mov _SPI_DI,c`
254			`setb _SPI_CLK`
255			`rlc a // 2`
256			`clr _SPI_CLK`
257
258			`mov _SPI_DI,c`
259			`setb _SPI_CLK`
260			`rlc a // 1`
261			`clr _SPI_CLK`
262
263			`mov _SPI_DI,c`
264			`setb _SPI_CLK`
265			`rlc a // 0`
266			`clr _SPI_CLK`
267
268			`mov _SPI_DI,c`
269			`setb _SPI_CLK`
270			`nop`
271			`clr _SPI_CLK`
272			`__endasm;`
273			`}`
274
275			`/* *********************************************************************`
276			`*** spi_write ***************************************************`
277			`********************************************************************* */`
278			`// write len (256 if len=0) bytes from the buffer to the flash`
279			`void spi_write(__xdata BYTE *buf, BYTE len) {`
280			`*buf; // this avoids stupid warnings`
281			`len; // this too`
282			`__asm // *buf is in dptr, len is in _flash_read_PARM_2`
283			`mov r2,_flash_read_PARM_2`
284			`010013$:`
285			`// 2 + len(3 + 87 - 1 + 7 ) + 4 = 6 + len*65 clocks`
286			`movx a,@dptr`
287			`rlc a // 7`
288
289			`mov _SPI_DI,c`
290			`setb _SPI_CLK`
291			`rlc a // 6`
292			`clr _SPI_CLK`
293
294			`mov _SPI_DI,c`
295			`setb _SPI_CLK`
296			`rlc a // 5`
297			`clr _SPI_CLK`
298
299			`mov _SPI_DI,c`
300			`setb _SPI_CLK`
301			`rlc a // 4`
302			`clr _SPI_CLK`
303
304			`mov _SPI_DI,c`
305			`setb _SPI_CLK`
306			`rlc a // 3`
307			`clr _SPI_CLK`
308
309			`mov _SPI_DI,c`
310			`setb _SPI_CLK`
311			`rlc a // 2`
312			`clr _SPI_CLK`
313
314			`mov _SPI_DI,c`
315			`setb _SPI_CLK`
316			`rlc a // 1`
317			`clr _SPI_CLK`
318
319			`mov _SPI_DI,c`
320			`setb _SPI_CLK`
321			`rlc a // 0`
322			`clr _SPI_CLK`
323
324			`mov _SPI_DI,c`
325			`setb _SPI_CLK`
326			`inc dptr`
327			`clr _SPI_CLK`
328
329			`djnz r2,010013$`
330			`__endasm;`
331			`}`
332
333			`/* *********************************************************************`
334			`*** spi_select **************************************************`
335			`********************************************************************* */`
336			`/*`
337			`select the flash (CS)`
338			`*/`
339			`void spi_select() {`
340			`SPI_CS = 1; // CS = 1;`
341			`spi_clocks(8); // 8 dummy clocks to finish a previous command`
342			`SPI_CS = 0;`
343			`}`
344
345			`/* *********************************************************************`
346			`*** spi_deselect ************************************************`
347			`********************************************************************* */`
348			`// de-select the flash (CS)`
349			`void spi_deselect() {`
350			`SPI_CS = 1; // CS = 1;`
351			`spi_clocks(8); // 8 dummy clocks to finish a previous command`
352			`}`
353
354			`/* *********************************************************************`
355			`*** spi_start_cmd ***********************************************`
356			`********************************************************************* */`
357			`// send a command`
358			`#define[spi_start_cmd(][);][{ // send a command, argument=0`
359			`spi_last_cmd = $0;`
360			`spi_select(); // select`
361			`spi_write_byte($0); // CMD 90h`
362			`}]`
363
364			`/* *********************************************************************`
365			`*** spi_wait ****************************************************`
366			`********************************************************************* */`
367			`/*`
368			`wait if prvious read/write command is still prcessed`
369			`result is flash_ec (FLASH_EC_TIMEOUT or 0)`
370			`*/`
371			`BYTE spi_wait() {`
372			`WORD i;`
373			`// wait up to 11s`
374			`spi_start_cmd(0x05);`
375			`for (i=0; (flash_read_byte() & bmBIT0) && i<65535; i++ ) {`
376			`spi_clocks(0); // 256 dummy clocks`
377			`// uwait(20);`
378			`}`
379			`flash_ec = flash_read_byte() & bmBIT0 ? FLASH_EC_TIMEOUT : 0;`
380			`spi_deselect();`
381			`return flash_ec;`
382			`}`
383
384			`/* *********************************************************************`
385			`*** flash_read_init *********************************************`
386			`********************************************************************* */`
387			`/*`
388			`Start the initialization sequence for reading sector s.`
389			`returns an error code (FLASH_EC_*). 0 means no error.`
390			`*/`
391			`BYTE flash_read_init(WORD s) {`
392			`if ( (SPI_CS) == 0 ) {`
393			`flash_ec = FLASH_EC_PENDING;`
394			`return FLASH_EC_PENDING; // we interrupted a pending Flash operation`
395			`}`
396			`OESPI_OPORT &= ~bmBITSPI_BIT_DO;`
397			`OESPI_PORT \|= bmBITSPI_BIT_CS \| bmBITSPI_BIT_DI \| bmBITSPI_BIT_CLK;`
398			`if ( spi_wait() ) {`
399			`return flash_ec;`
400			`}`
401
402			`s = s << ((BYTE)flash_sector_size - 8);`
403			`spi_start_cmd(0x0b); // read command`
404			`spi_write_byte(s >> 8); // 24 byte address`
405			`spi_write_byte(s & 255);`
406			`spi_write_byte(0);`
407			`spi_clocks(8); // 8 dummy clocks`
408			`return 0;`
409			`}`
410
411			`/* *********************************************************************`
412			`*** flash_read_next *********************************************`
413			`********************************************************************* */`
414			`/*`
415			`dummy function for compatibilty`
416			`*/`
417			`BYTE flash_read_next() {`
418			`return 0;`
419			`}`
420
421
422			`/* *********************************************************************`
423			`*** flash_read_finish *******************************************`
424			`********************************************************************* */`
425			`/*`
426			`Runs the finalization sequence for the read operation.`
427			`*/`
428			`void flash_read_finish(WORD n) {`
429			`n; // avoids warnings`
430			`spi_deselect();`
431			`}`
432
433
434			`/* *********************************************************************`
435			`*** spi_pp ******************************************************`
436			`********************************************************************* */`
437			`BYTE spi_pp () {`
438			`spi_deselect(); // finish previous write cmd`
439
440			`spi_need_pp = 0;`
441
442			`if ( spi_wait() ) {`
443			`return flash_ec;`
444			`}`
445			`spi_start_cmd(0x06); // write enable command`
446			`spi_deselect();`
447
448			`spi_start_cmd(0x02); // page write`
449			`spi_write_byte(spi_write_addr_hi >> 8); // 24 byte address`
450			`spi_write_byte(spi_write_addr_hi & 255);`
451			`spi_write_byte(0);`
452			`return 0;`
453			`}`
454
455
456			`/* *********************************************************************`
457			`*** flash_write_byte ********************************************`
458			`********************************************************************* */`
459			`BYTE flash_write_byte (BYTE b) {`
460			`if ( spi_need_pp && spi_pp() ) return flash_ec;`
461			`spi_write_byte(b);`
462			`spi_write_addr_lo++;`
463			`if ( spi_write_addr_lo == 0 ) {`
464			`spi_write_addr_hi++;`
465			`spi_deselect(); // finish write cmd`
466			`spi_need_pp = 1;`
467			`}`
468			`return 0;`
469			`}`
470
471
472			`/* *********************************************************************`
473			`*** flash_write *************************************************`
474			`********************************************************************* */`
475			`// write len (256 if len=0) bytes from the buffer to the flash`
476			`BYTE flash_write(__xdata BYTE *buf, BYTE len) {`
477			`BYTE b;`
478			`if ( spi_need_pp && spi_pp() ) return flash_ec;`
479
480			`if ( spi_write_addr_lo == 0 ) {`
481			`spi_write(buf,len);`
482			`}`
483			`else {`
484			`b = (~spi_write_addr_lo) + 1;`
485			`if ( len==0 \|\| len>b ) {`
486			`spi_write(buf,b);`
487			`len-=b;`
488			`spi_write_addr_hi++;`
489			`spi_write_addr_lo=0;`
490			`buf+=b;`
491			`if ( spi_pp() ) return flash_ec;`
492			`}`
493			`spi_write(buf,len);`
494			`}`
495
496			`spi_write_addr_lo+=len;`
497
498			`if ( spi_write_addr_lo == 0 ) {`
499			`spi_write_addr_hi++;`
500			`spi_deselect(); // finish write cmd`
501			`spi_need_pp = 1;`
502			`}`
503
504			`return 0;`
505			`}`
506
507
508			`/* *********************************************************************`
509			`*** flash_write_init ********************************************`
510			`********************************************************************* */`
511			`/*`
512			`Start the initialization sequence for writing sector s`
513			`The whole sector will be modified`
514			`returns an error code (FLASH_EC_*). 0 means no error.`
515			`*/`
516			`BYTE flash_write_init(WORD s) {`
517			`if ( !SPI_CS ) {`
518			`flash_ec = FLASH_EC_PENDING;`
519			`return FLASH_EC_PENDING; // we interrupted a pending Flash operation`
520			`}`
521			`OESPI_OPORT &= ~bmBITSPI_BIT_DO;`
522			`OESPI_PORT \|= bmBITSPI_BIT_CS \| bmBITSPI_BIT_DI \| bmBITSPI_BIT_CLK;`
523			`if ( spi_wait() ) {`
524			`return flash_ec;`
525			`}`
526			`spi_write_sector = s;`
527			`s = s << ((BYTE)flash_sector_size - 8);`
528			`spi_write_addr_hi = s;`
529			`spi_write_addr_lo = 0;`
530
531			`spi_start_cmd(0x06); // write enable command`
532			`spi_deselect();`
533
534			`spi_start_cmd(spi_erase_cmd); // erase command`
535			`spi_write_byte(s >> 8); // 24 byte address`
536			`spi_write_byte(s & 255);`
537			`spi_write_byte(0);`
538			`spi_deselect();`
539
540			`spi_need_pp = 1;`
541			`return 0;`
542			`}`
543
544
545			`/* *********************************************************************`
546			`*** flash_write_finish_sector ***********************************`
547			`********************************************************************* */`
548			`/*`
549			`Dummy function for compatibilty.`
550			`*/`
551			`BYTE flash_write_finish_sector (WORD n) {`
552			`n;`
553			`spi_deselect();`
554			`return 0;`
555			`}`
556
557
558			`/* *********************************************************************`
559			`*** flash_write_finish ******************************************`
560			`********************************************************************* */`
561			`/*`
562			`Dummy function for compatibilty.`
563			`*/`
564			`void flash_write_finish () {`
565			`spi_deselect();`
566			`}`
567
568
569			`/* *********************************************************************`
570			`*** flash_write_next ********************************************`
571			`********************************************************************* */`
572			`/*`
573			`Prepare the next sector for writing, see flash_write_finish1.`
574			`*/`
575			`BYTE flash_write_next () {`
576			`spi_deselect();`
577			`return flash_write_init(spi_write_sector+1);`
578			`}`
579
580
581			`/* *********************************************************************`
582			`*** flash_init **************************************************`
583			`********************************************************************* */`
584			`// init the flash`
585			`void flash_init() {`
586			`BYTE i;`
587
588			`PORTCCFG = 0;`
589
590			`flash_enabled = 1;`
591			`flash_ec = 0;`
592			`flash_sector_size = 0x8010; // 64 KByte`
593			`spi_erase_cmd = 0xd8;`
594
595			`OESPI_OPORT &= ~bmBITSPI_BIT_DO;`
596			`OESPI_PORT \|= bmBITSPI_BIT_CS \| bmBITSPI_BIT_DI \| bmBITSPI_BIT_CLK;`
597			`SPI_CS = 1;`
598			`spi_clocks(0); // 256 clocks`
599
600			`spi_start_cmd(0x90); // CMD 90h, not supported by all chips`
601			`spi_clocks(24); // ADDR=0`
602			`spi_device = flash_read_byte();`
603			`spi_deselect(); // deselect`
604
605			`spi_start_cmd(0x9F); // CMD 9Fh`
606			`flash_read(spi_buffer,3); // read data`
607			`spi_deselect(); // deselect`
608			`if ( spi_buffer[2]<16 \|\| spi_buffer[2]>24 ) {`
609			`goto disable;`
610			`}`
611			`spi_vendor = spi_buffer[0];`
612			`spi_memtype = spi_buffer[1];`
613
614			`#ifeq[USE_4KSECTORS_ENABLED][1]`
615			`if ( ( spi_vendor==1 && spi_memtype == 0x40 ) \|\|`
616			`( spi_vendor==0x20 && spi_memtype == 0xba )`
617			`) {`
618			`// support of uniform 4 kbyte (logical) sectors`
619			`flash_sector_size = 0x800C; // 4 KByte`
620			`spi_erase_cmd = 0x20;`
621			`i=spi_buffer[2]-12;`
622			`}`
623			`else {`
624			`// support of uniform 64 kbyte (logical) sectors`
625			`i=spi_buffer[2]-16;`
626			`}`
627			`#else`
628			`i=spi_buffer[2]-16;`
629			`#endif`
630			`flash_sectors = 1 << i;`
631
632			`return;`
633
634			`disable:`
635			`flash_enabled = 0;`
636			`flash_ec = FLASH_EC_NOTSUPPORTED;`
637			`OESPI_PORT &= ~( bmBITSPI_BIT_CS \| bmBITSPI_BIT_DI \| bmBITSPI_BIT_CLK );`
638			`}`
639
640
641			`/* *********************************************************************`
642			`*** EP0 vendor request 0x40 *************************************`
643			`********************************************************************* */`
644			`// send flash information structure (card size, error status, ...) to the host`
645			`ADD_EP0_VENDOR_REQUEST((0x40,,`
646			`if ( flash_ec == 0 && SPI_CS == 0 ) {`
647			`flash_ec = FLASH_EC_PENDING;`
648			`}`
649			`MEM_COPY1(flash_enabled,EP0BUF,8);`
650			`EP0BCH = 0;`
651			`EP0BCL = 8;`
652			`,,`
653			`));;`
654
655			`/* *********************************************************************`
656			`*** EP0 vendor request 0x41 *************************************`
657			`********************************************************************* */`
658			`/* read modes (ep0_read_mode)`
659			`0: start read`
660			`1: continue read`
661			`2: finish read`
662			`*/`
663			`void spi_read_ep0 () {`
664			`flash_read(EP0BUF, ep0_payload_transfer);`
665			`if ( ep0_read_mode==2 && ep0_payload_remaining==0 ) {`
666			`spi_deselect();`
667			`}`
668			`}`
669
670			`ADD_EP0_VENDOR_REQUEST((0x41,, // read data`
671			`ep0_read_mode = SETUPDAT[5];`
672			`if ( (ep0_read_mode==0) && flash_read_init((SETUPDAT[3] << 8) \| SETUPDAT[2]) ) {`
673			`EP0_STALL;`
674			`}`
675			`spi_read_ep0();`
676			`EP0BCH = 0;`
677			`EP0BCL = ep0_payload_transfer;`
678			`,,`
679			`if ( ep0_payload_transfer != 0 ) {`
680			`flash_ec = 0;`
681			`spi_read_ep0();`
682			`}`
683			`EP0BCH = 0;`
684			`EP0BCL = ep0_payload_transfer;`
685			`));;`
686
687			`/* *********************************************************************`
688			`*** EP0 vendor command 0x42 *************************************`
689			`********************************************************************* */`
690			`void spi_send_ep0 () {`
691			`flash_write(EP0BUF, ep0_payload_transfer);`
692			`if ( ep0_write_mode==2 && ep0_payload_remaining==0 ) {`
693			`spi_deselect();`
694			`}`
695			`}`
696
697			`ADD_EP0_VENDOR_COMMAND((0x42,, // write integer number of sectors`
698			`ep0_write_mode = SETUPDAT[5];`
699			`if ( (ep0_write_mode == 0) && flash_write_init((SETUPDAT[3] << 8) \| SETUPDAT[2]) ) {`
700			`EP0_STALL;`
701			`}`
702			`,,`
703			`if ( ep0_payload_transfer != 0 ) {`
704			`flash_ec = 0;`
705			`spi_send_ep0();`
706			`if ( flash_ec != 0 ) {`
707			`spi_deselect();`
708			`EP0_STALL;`
709			`}`
710			`}`
711			`));;`
712
713			`/* *********************************************************************`
714			`*** EP0 vendor request 0x43 *************************************`
715			`********************************************************************* */`
716			`// send detailed SPI status plus debug information`
717			`ADD_EP0_VENDOR_REQUEST((0x43,,`
718			`MEM_COPY1(flash_ec,EP0BUF,10);`
719			`EP0BCH = 0;`
720			`EP0BCL = 10;`
721			`,,`
722			`));;`
723
724			`#endif /ZTEX_FLASH1_H/`