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Subversion Repositories usb_fpga_2_13

[/] [usb_fpga_2_13/] [trunk/] [include/] [ztex.h] - Blame information for rev 2

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1 2 ZTEX 
/*!
2 
   ZTEX Firmware Kit for EZ-USB FX2 Microcontrollers
3 
   Copyright (C) 2009-2014 ZTEX GmbH.
4 
   http://www.ztex.de
5 
 
6 
   This program is free software; you can redistribute it and/or modify
7 
   it under the terms of the GNU General Public License version 3 as
8 
   published by the Free Software Foundation.
9 
 
10 
   This program is distributed in the hope that it will be useful, but
11 
   WITHOUT ANY WARRANTY; without even the implied warranty of
12 
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 
   General Public License for more details.
14 
 
15 
   You should have received a copy of the GNU General Public License
16 
   along with this program; if not, see http://www.gnu.org/licenses/.
17 
!*/
18 
 
19 
/*
20 
   Puts everything together.
21 
*/
22 
 
23 
#ifndef[ZTEX_H]
24 
#define[ZTEX_H]
25 
 
26 
#define[INIT_CMDS;][]
27 
 
28 
#ifneq[PRODUCT_IS][UFM-1_15]
29 
#define[UFM_1_15X_DETECTION_ENABLED][0]
30 
#endif
31 
 
32 
#ifeq[UFM_1_15X_DETECTION_ENABLED][1]
33 
__xdata BYTE is_ufm_1_15x;
34 
#endif
35 
 
36 
/* *********************************************************************
37 
   ***** include the basic functions ***********************************
38 
   ********************************************************************* */
39 
#include[ztex-utils.h]
40 
 
41 
/* *********************************************************************
42 
   ***** I2C helper functions, EEPROM and MAC EEPROM support ***********
43 
   ********************************************************************* */
44 
#ifneq[EEPROM_DISABLED][1]
45 
 
46 
#ifneq[EEPROM_MAC_DISABLED][1]
47 
#ifeq[PRODUCT_IS][UFM-1_15]
48 
#define[MAC_EEPROM_ENABLED]
49 
#endif // PRODUCT_IS=UFM-1_15
50 
#ifeq[PRODUCT_IS][UFM-1_15Y]
51 
#define[MAC_EEPROM_ENABLED]
52 
#endif // PRODUCT_IS=UFM-1_15Y
53 
#ifeq[PRODUCT_IS][UFM-2_16]
54 
#define[MAC_EEPROM_ENABLED]
55 
#endif // PRODUCT_IS=UFM-2_16
56 
#ifeq[PRODUCT_IS][UFM-2_13]
57 
#define[MAC_EEPROM_ENABLED]
58 
#endif // PRODUCT_IS=UFM-2_13
59 
#ifeq[PRODUCT_IS][UFM-2_01]
60 
#define[MAC_EEPROM_ENABLED]
61 
#endif // PRODUCT_IS=UFM-2_01
62 
#ifeq[PRODUCT_IS][UFM-2_04]
63 
#define[MAC_EEPROM_ENABLED]
64 
#endif // PRODUCT_IS=UFM-2_04
65 
#endif // EEPROM_MAC_DISABLED
66 
 
67 
#include[ztex-eeprom.h]
68 
 
69 
#endif // EEPROM_DISABLED
70 
 
71 
 
72 
/* *********************************************************************
73 
   ***** Flash memory support ******************************************
74 
   ********************************************************************* */
75 
#ifeq[FLASH_ENABLED][1]
76 
 
77 
 
78 
#ifeq[FLASH_OVERRIDE][1]
79 
#include[ztex-flash1.h]
80 
 
81 
#elifeq[FLASH_OVERRIDE][2]
82 
#include[ztex-flash2.h]
83 
 
84 
#elifeq[PRODUCT_IS][UFM-1_1]
85 
#define[MMC_PORT][E]
86 
#define[MMC_BIT_CS][7]
87 
#define[MMC_BIT_DI][6]
88 
#define[MMC_BIT_DO][4]
89 
#define[MMC_BIT_CLK][5]
90 
#include[ztex-flash1.h]
91 
 
92 
#elifeq[PRODUCT_IS][UFM-1_2]
93 
#define[MMC_PORT][E]
94 
#define[MMC_BIT_CS][7]
95 
#define[MMC_BIT_DI][6]
96 
#define[MMC_BIT_DO][4]
97 
#define[MMC_BIT_CLK][5]
98 
#include[ztex-flash1.h]
99 
 
100 
#elifeq[PRODUCT_IS][UM-1_0]
101 
#define[MMC_PORT][C]
102 
#define[MMC_BIT_CS][7]
103 
#define[MMC_BIT_DI][6]
104 
#define[MMC_BIT_DO][4]
105 
#define[MMC_BIT_CLK][5]
106 
#include[ztex-flash1.h]
107 
 
108 
#elifeq[PRODUCT_IS][UFM-1_10]
109 
#define[MMC_PORT][A]
110 
#define[MMC__PORT_DO][D]
111 
#define[MMC_BIT_DO][0]
112 
#define[MMC_BIT_CS][5]
113 
#define[MMC_BIT_DI][6]
114 
#define[MMC_BIT_CLK][7]
115 
#include[ztex-flash1.h]
116 
 
117 
#elifeq[PRODUCT_IS][UFM-1_11]
118 
#define[MMC_PORT][C]
119 
#define[MMC__PORT_DO][D]
120 
#define[MMC_BIT_DO][0]
121 
#define[MMC_BIT_CS][5]
122 
#define[MMC_BIT_DI][7]
123 
#define[MMC_BIT_CLK][6]
124 
#include[ztex-flash1.h]
125 
 
126 
#elifeq[PRODUCT_IS][UFM-1_15]
127 
#define[MMC_PORT][C]
128 
#define[MMC_BIT_DO][4]
129 
#define[MMC_BIT_CS][5]
130 
#define[MMC_BIT_DI][7]
131 
#define[MMC_BIT_CLK][6]
132 
#include[ztex-flash1.h]
133 
 
134 
#elifeq[PRODUCT_IS][UXM-1_0]
135 
#define[MMC_PORT][C]
136 
#define[MMC_BIT_CS][7]
137 
#define[MMC_BIT_DI][6]
138 
#define[MMC_BIT_DO][4]
139 
#define[MMC_BIT_CLK][5]
140 
#include[ztex-flash1.h]
141 
 
142 
#elifeq[PRODUCT_IS][UFM-2_16]
143 
#define[SPI_PORT][C]
144 
#define[SPI_BIT_DO][4]
145 
#define[SPI_BIT_CS][5]
146 
#define[SPI_BIT_CLK][6]
147 
#define[SPI_BIT_DI][7]
148 
#include[ztex-flash2.h]
149 
 
150 
#elifeq[PRODUCT_IS][UFM-2_13]
151 
#define[SPI_PORT][C]
152 
#define[SPI_BIT_DO][4]
153 
#define[SPI_BIT_CS][5]
154 
#define[SPI_BIT_CLK][6]
155 
#define[SPI_BIT_DI][7]
156 
#include[ztex-flash2.h]
157 
 
158 
#elifeq[PRODUCT_IS][UFM-2_01]
159 
#define[SPI_PORT][A]
160 
#define[SPI_OPORT][C]
161 
#define[SPI_BIT_DO][0]
162 
#define[SPI_BIT_CS][3]
163 
#define[SPI_BIT_CLK][0]
164 
#define[SPI_BIT_DI][1]
165 
#include[ztex-flash2.h]
166 
 
167 
#elifeq[PRODUCT_IS][UFM-2_04]
168 
#define[SPI_PORT][A]
169 
#define[SPI_OPORT][C]
170 
#define[SPI_BIT_DO][0]
171 
#define[SPI_BIT_CS][3]
172 
#define[SPI_BIT_CLK][0]
173 
#define[SPI_BIT_DI][1]
174 
#include[ztex-flash2.h]
175 
 
176 
#else
177 
#warning[Flash memory access is not supported by this product]
178 
#define[FLASH_ENABLED][0]
179 
#endif
180 
#endif
181 
 
182 
/* *********************************************************************
183 
   ***** FPGA configuration support ************************************
184 
   ********************************************************************* */
185 
#ifeq[PRODUCT_IS][UFM-1_0]
186 
#include[ztex-fpga1.h]
187 
#elifeq[PRODUCT_IS][UFM-1_1]
188 
#include[ztex-fpga1.h]
189 
#elifeq[PRODUCT_IS][UFM-1_2]
190 
#include[ztex-fpga1.h]
191 
#elifeq[PRODUCT_IS][UFM-1_10]
192 
#include[ztex-fpga2.h]
193 
#elifeq[PRODUCT_IS][UFM-1_11]
194 
#include[ztex-fpga3.h]
195 
#elifeq[PRODUCT_IS][UFM-1_15]
196 
#include[ztex-fpga4.h]
197 
#elifeq[PRODUCT_IS][UFM-1_15Y]
198 
#include[ztex-fpga5.h]
199 
#elifeq[PRODUCT_IS][UFM-2_16]
200 
#include[ztex-fpga6.h]
201 
#elifeq[PRODUCT_IS][UFM-2_13]
202 
#include[ztex-fpga6.h]
203 
#elifeq[PRODUCT_IS][UFM-2_01]
204 
#include[ztex-fpga7.h]
205 
#elifeq[PRODUCT_IS][UFM-2_04]
206 
#include[ztex-fpga7.h]
207 
#endif
208 
 
209 
 
210 
/* *********************************************************************
211 
   ***** DEBUG helper functions ****************************************
212 
   ********************************************************************* */
213 
#ifeq[DEBUG_ENABLED][1]
214 
#include[ztex-debug.h]
215 
#endif
216 
 
217 
 
218 
/* *********************************************************************
219 
   ***** XMEGA support *************************************************
220 
   ********************************************************************* */
221 
#ifneq[XMEGA_DISABLED][1]
222 
 
223 
#ifeq[PRODUCT_IS][UXM-1_0]
224 
#define[PDI_PORT][A]
225 
#define[PDI_BIT_CLK][0]
226 
#define[PDI_BIT_DATA][1]
227 
#include[ztex-xmega.h]
228 
#endif
229 
 
230 
#ifeq[EXP_1_10_ENABLED][1]
231 
#ifneq[PRODUCT_IS][UFM-1_0]
232 
#elifneq[PRODUCT_IS][UFM-1_1]
233 
#elifneq[PRODUCT_IS][UFM-1_2]
234 
#elifneq[PRODUCT_IS][UFM-1_10]
235 
#elifneq[PRODUCT_IS][UFM-1_11]
236 
#elifneq[PRODUCT_IS][UFM-1_15]
237 
#warning[ZTEX Experimental Board 1.10 is not supported by this product.]
238 
#endif
239 
#define[PDI_PORT][E]
240 
#define[PDI_BIT_CLK][5]
241 
#define[PDI_BIT_DATA][4]
242 
#include[ztex-xmega.h]
243 
#endif
244 
 
245 
#endif
246 
 
247 
/* *********************************************************************
248 
   ***** define the descriptors ****************************************
249 
   ********************************************************************* */
250 
#include[ztex-descriptors.h]
251 
 
252 
 
253 
/* *********************************************************************
254 
   ***** Temperature sensor support ************************************
255 
   ********************************************************************* */
256 
#ifneq[EEPROM_DISABLED][1]
257 
#ifneq[TEMP_SENSOR_DISABLED][1]
258 
#ifeq[PRODUCT_IS][UFM-1_15Y]
259 
#include[ztex-temp1.h]
260 
#endif
261 
 
262 
#endif // TEMP_SENSOR_DISABLED
263 
#endif // EEPROM_DISABLED
264 
 
265 
 
266 
/* *********************************************************************
267 
   ***** interrupt routines ********************************************
268 
   ********************************************************************* */
269 
#include[ztex-isr.h]
270 
 
271 
 
272 
/* *********************************************************************
273 
   ***** mac_eeprom_init ***********************************************
274 
   ********************************************************************* */
275 
#ifdef[@CAPABILITY_MAC_EEPROM;]
276 
void mac_eeprom_init ( ) {
277 
    BYTE b,c,d;
278 
    __xdata BYTE buf[5];
279 
    __code char hexdigits[] = "0123456789ABCDEF";
280 
 
281 
    mac_eeprom_read ( buf, 0, 3 );       // read signature
282 
    if ( buf[0]==67 && buf[1]==68 && buf[2]==48 ) {
283 
        config_data_valid = 1;
284 
        mac_eeprom_read ( SN_STRING, 16, 10 );  // copy serial number
285 
    }
286 
    else {
287 
        config_data_valid = 0;
288 
    }
289 
 
290 
    for (b=0; b<10; b++) {       // abort if SN != "0000000000"
291 
        if ( SN_STRING[b] != 48 )
292 
            return;
293 
    }
294 
 
295 
    mac_eeprom_read ( buf, 0xfb, 5 );   // read the last 5 MAC digits
296 
 
297 
    c=0;
298 
    for (b=0; b<5; b++) {        // convert to MAC to SN string
299 
        d = buf[b];
300 
        SN_STRING[c] = hexdigits[d>>4];
301 
        c++;
302 
        SN_STRING[c] = hexdigits[d & 15];
303 
        c++;
304 
    }
305 
}
306 
#endif
307 
 
308 
 
309 
/* *********************************************************************
310 
   ***** init_USB ******************************************************
311 
   ********************************************************************* */
312 
#define[EPXCFG(][);][    EP$0CFG =
313 
#ifeq[EP$0_DIR][IN]
314 
        bmBIT7 | bmBIT6
315 
#elifeq[EP$0_DIR][OUT]
316 
        bmBIT7
317 
#else
318 
 
319 
#endif
320 
#ifeq[EP$0_TYPE][BULK]
321 
        | bmBIT5
322 
#elifeq[EP$0_TYPE][ISO]
323 
        | bmBIT4
324 
#elifeq[EP$0_TYPE][INT]
325 
        | bmBIT5 | bmBIT4
326 
#endif
327 
#ifeq[EP$0_SIZE][1024]
328 
        | bmBIT3
329 
#endif
330 
#ifeq[EP$0_BUFFERS][2]
331 
        | bmBIT1
332 
#elifeq[EP$0_BUFFERS][3]
333 
        | bmBIT1 | bmBIT0
334 
#endif
335 
        ;
336 
        SYNCDELAY;
337 
]
338 
 
339 
#define[EP1XCFG(][);][#ifeq[EP$0_TYPE][BULK]
340 
        EP$0CFG = bmBIT7 | bmBIT5;
341 
#elifeq[EP$0_TYPE][ISO]
342 
        EP$0CFG = bmBIT7 | bmBIT4;
343 
#elifeq[EP$0_TYPE][INT]
344 
        EP$0CFG = bmBIT7 | bmBIT5 | bmBIT4;
345 
#else
346 
        EP$0CFG = 0;
347 
#endif
348 
        SYNCDELAY;
349 
]
350 
 
351 
 
352 
void init_USB ()
353 
{
354 
    USBCS |= bmBIT3;
355 
 
356 
    CPUCS = bmBIT4 | bmBIT1;
357 
    wait(2);
358 
    CKCON &= ~7;
359 
 
360 
#ifeq[PRODUCT_IS][UFM-1_0]
361 
    IOA1 = 1;
362 
    OEA |= bmBIT1;
363 
#elifeq[PRODUCT_IS][UFM-1_1]
364 
    IOA1 = 1;
365 
    OEA |= bmBIT1;
366 
#elifeq[PRODUCT_IS][UFM-1_2]
367 
    IOA1 = 1;
368 
    OEA |= bmBIT1;
369 
#elifeq[PRODUCT_IS][UFM-1_10]
370 
    IOA1 = 1;
371 
    OEA |= bmBIT1;
372 
#elifeq[PRODUCT_IS][UFM-1_11]
373 
    IOA1 = 1;
374 
    OEA |= bmBIT1;
375 
#elifeq[PRODUCT_IS][UFM-1_15]
376 
    IOA1 = 1;
377 
    OEA |= bmBIT1;
378 
#elifeq[PRODUCT_IS][UFM-1_15Y]
379 
    init_fpga();
380 
#elifeq[PRODUCT_IS][UFM-2_16]
381 
    init_fpga();
382 
#elifeq[PRODUCT_IS][UFM-2_13]
383 
    init_fpga();
384 
#elifeq[PRODUCT_IS][UFM-2_01]
385 
    init_fpga();
386 
#elifeq[PRODUCT_IS][UFM-2_04]
387 
    init_fpga();
388 
#endif
389 
 
390 
    INIT_CMDS;
391 
 
392 
    EA = 0;
393 
    EUSB = 0;
394 
 
395 
    ENABLE_AVUSB;
396 
 
397 
    INIT_INTERRUPT_VECTOR(INTVEC_SUDAV, SUDAV_ISR);
398 
    INIT_INTERRUPT_VECTOR(INTVEC_SOF, SOF_ISR);
399 
    INIT_INTERRUPT_VECTOR(INTVEC_SUTOK, SUTOK_ISR);
400 
    INIT_INTERRUPT_VECTOR(INTVEC_SUSPEND, SUSP_ISR);
401 
    INIT_INTERRUPT_VECTOR(INTVEC_USBRESET, URES_ISR);
402 
    INIT_INTERRUPT_VECTOR(INTVEC_HISPEED, HSGRANT_ISR);
403 
    INIT_INTERRUPT_VECTOR(INTVEC_EP0ACK, EP0ACK_ISR);
404 
 
405 
    INIT_INTERRUPT_VECTOR(INTVEC_EP0IN, EP0IN_ISR);
406 
    INIT_INTERRUPT_VECTOR(INTVEC_EP0OUT, EP0OUT_ISR);
407 
    INIT_INTERRUPT_VECTOR(INTVEC_EP1IN, EP1IN_ISR);
408 
    INIT_INTERRUPT_VECTOR(INTVEC_EP1OUT, EP1OUT_ISR);
409 
    INIT_INTERRUPT_VECTOR(INTVEC_EP2, EP2_ISR);
410 
    INIT_INTERRUPT_VECTOR(INTVEC_EP4, EP4_ISR);
411 
    INIT_INTERRUPT_VECTOR(INTVEC_EP6, EP6_ISR);
412 
    INIT_INTERRUPT_VECTOR(INTVEC_EP8, EP8_ISR);
413 
 
414 
    EXIF &= ~bmBIT4;
415 
    USBIRQ = 0x7f;
416 
    USBIE |= 0x7f;
417 
    EPIRQ = 0xff;
418 
    EPIE = 0xff;
419 
 
420 
    EUSB = 1;
421 
    EA = 1;
422 
 
423 
    EP1XCFG(1IN);
424 
    EP1XCFG(1OUT);
425 
    EPXCFG(2);
426 
    EPXCFG(4);
427 
    EPXCFG(6);
428 
    EPXCFG(8);
429 
 
430 
#ifeq[UFM_1_15X_DETECTION_ENABLED][1]
431 
    OEA &= ~bmBIT3;
432 
    if ( IOA3 ) {
433 
        is_ufm_1_15x = 0;
434 
    } else {
435 
        is_ufm_1_15x = 1;
436 
//      INTERFACE_CAPABILITIES[0] &= ~32;
437 
    }
438 
#endif
439 
 
440 
#ifeq[FLASH_ENABLED][1]
441 
    flash_init();
442 
    if ( !flash_enabled ) {
443 
        wait(250);
444 
        flash_init();
445 
    }
446 
#endif
447 
#ifeq[DEBUG_ENABLED][1]
448 
    debug_init();
449 
#endif
450 
#ifeq[XMEGA_ENABLED][1]
451 
    xmega_init();
452 
#endif
453 
#ifdef[@CAPABILITY_MAC_EEPROM;]
454 
    mac_eeprom_init();
455 
#endif
456 
#ifeq[TEMP1_ENABLED][1]
457 
    temp1_init();
458 
#endif
459 
#ifeq[FLASH_BITSTREAM_ENABLED][1]
460 
    fpga_configure_from_flash_init();
461 
#endif
462 
 
463 
    USBCS |= bmBIT7 | bmBIT1;
464 
    wait(10);
465 
//    wait(250);
466 
    USBCS &= ~bmBIT3;
467 
}
468 
 
469 
 
470 
#endif   /* ZTEX_H */

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