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URL https://opencores.org/ocsvn/usb_fpga_2_14/usb_fpga_2_14/trunk

Subversion Repositories usb_fpga_2_14

[/] [usb_fpga_2_14/] [trunk/] [constraints/] [convert.repl] - Blame information for rev 2

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Line No. Rev Author Line
1 2 ZTEX 
PB0/FD0 PB[0]
2 
PB1/FD1 PB[1]
3 
PB2/FD2 PB[2]
4 
PB3/FD3 PB[3]
5 
PB4/FD4 PB[4]
6 
PB5/FD5 PB[5]
7 
PB6/FD6 PB[6]
8 
PB7/FD7 PB[7]
9 
 
10 
PD0/FD8         PD[0]
11 
PD1/FD9         PD[1]
12 
PD2/FD10        PD[2]
13 
PD3/FD11        PD[3]
14 
PD4/FD12        PD[4]
15 
PD5/FD13        PD[5]
16 
PD6/FD14        PD[6]
17 
PD7/FD15        PD[7]
18 
 
19 
PA0/INT0#       PA[0]
20 
PA1/INT1#       PA[1]
21 
PA2/SLOE        PA[2]
22 
PA3/WU2         PA[3]
23 
PA4/FIFOADR0    PA[4]
24 
PA5/FIFOADR1    PA[5]
25 
PA6/PKTEND      PA[6]
26 
PA7/FLAGD/SLCS# PA[7]
27 
 
28 
PC0/GPIFADR0    PC[0]
29 
PC1/GPIFADR1    PC[1]
30 
PC2/GPIFADR2    PC[2]
31 
PC3/GPIFADR3    PC[3]
32 
PC4/GPIFADR4    PC[4]
33 
PC5/GPIFADR5    PC[5]
34 
PC6/GPIFADR6    PC[6]
35 
PC7/GPIFADR7    PC[7]
36 
 
37 
PE0/T0OUT       PE[0]
38 
PE1/T1OUT       PE[1]
39 
PE2/T2OUT       PE[2]
40 
PE3/RXD0OUT     PE[3]
41 
PE4/RXD1OUT     PE[4]
42 
PE5/INT6        PE[5]
43 
PE6/T2EX        PE[6]
44 
PE7/GPIFADR8    PE[7]
45 
 
46 
RDY0/SLRD       SLRD
47 
RDY1/SLWR       SLWR
48 
RDY2    RDY2
49 
RDY3    RDY3
50 
RDY4    RDY4
51 
RDY5    RDY5
52 
 
53 
CTL0/FLAGA      FLAGA
54 
CTL1/FLAGB      FLAGB
55 
CTL2/FLAGC      FLAGC
56 
CTL3    CTL3
57 
CTL4    CTL4
58 
CTL5    CTL5
59 
 
60 
INT4    INT4
61 
INT5#   INT5_N
62 
 
63 
T0      T0
64 
 
65 
SCL     SCL
66 
SDA     SDA
67 
 
68 
RxD0    RxD0
69 
TxD0    TxD0
70 
RxD1    RxD1
71 
TxD1    TxD1
72 
 
73 
A0      MM_A[0]
74 
A1      MM_A[1]
75 
A2      MM_A[2]
76 
A3      MM_A[3]
77 
A4      MM_A[4]
78 
A5      MM_A[5]
79 
A6      MM_A[6]
80 
A7      MM_A[7]
81 
A8      MM_A[8]
82 
A9      MM_A[9]
83 
A10     MM_A[10]
84 
A11     MM_A[11]
85 
A12     MM_A[12]
86 
A13     MM_A[13]
87 
A14     MM_A[14]
88 
A15     MM_A[15]
89 
D0      MM_D[0]
90 
D1      MM_D[1]
91 
D2      MM_D[2]
92 
D3      MM_D[3]
93 
D4      MM_D[4]
94 
D5      MM_D[5]
95 
D6      MM_D[6]
96 
D7      MM_D[7]
97 
WR_N    MM_WR_N
98 
RD_N    MM_RD_N
99 
PSEN_N  MM_PSEN_N
100 
 
101 
SPI_CLK         SPI_CLK
102 
SPI_DIN         SPI_DIN
103 
SPI_DOUT        SPI_DOUT
104 
SPI_CS_N        SPI_CS_N
105 
SPI_CS1_N       SPI_CS1_N
106 
SPI_CS2_N       SPI_CS2_N
107 
 
108 
MR_N    MR_N
109 
 
110 
SD_DAT1 SD_DAT1
111 
SD_DAT2 SD_DAT2
112 
 
113 
DQ0     DQ[0]
114 
DQ1     DQ[1]
115 
DQ2     DQ[2]
116 
DQ3     DQ[3]
117 
DQ4     DQ[4]
118 
DQ5     DQ[5]
119 
DQ6     DQ[6]
120 
DQ7     DQ[7]
121 
DQ8     DQ[8]
122 
DQ9     DQ[9]
123 
DQ10    DQ[10]
124 
DQ11    DQ[11]
125 
DQ12    DQ[12]
126 
DQ13    DQ[13]
127 
DQ14    DQ[14]
128 
DQ15    DQ[15]
129 
 
130 
GPIO38/RDWR_B   GPIO38
131 
GPIO39/CSI_B    GPIO39
132 
GPIO46/UART_RTS GPIO46
133 
GPIO47/UART_CTS GPIO47
134 
GPIO48/UART_TX  GPIO48
135 
GPIO49/UART_RX  GPIO49
136 
 
137 
CTL0/SLCS#/GPIO17       CTL0
138 
CTL1/SLWR#/GPIO18       CTL1
139 
CTL2/SLOE#/GPIO19       CTL2
140 
CTL3/SLRD#/GPIO20       CTL3
141 
CTL4/FLAGA/GPIO21       CTL4
142 
CTL5/FLAGB/GPIO22       CTL5
143 
CTL6/GPIO23     CTL6
144 
CTL7/PKTEND#/GPIO24     CTL7
145 
CTL8/GPIO25     CTL8
146 
CTL9/GPIO26     CTL9
147 
CTL11/A1/GPIO28 CTL11
148 
CTL12/A0/GPIO29 CTL12
149 
INT#/CTL15      CTL15
150 
 
151 
FPGA_CLK        SPI_CLK
152 
FPGA_CS#        SPI_CS_N
153 
FPGA_MISO       SPI_MISO
154 
FPGA_MOSI       SPI_MOSI
155 
 
156 
LED1:red        LED1_red

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