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URL https://opencores.org/ocsvn/usb_ft232h_avalon-mm_interface/usb_ft232h_avalon-mm_interface/trunk

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[/] [usb_ft232h_avalon-mm_interface/] [trunk/] [hw/] [ft232h_fifos_interface.sv] - Blame information for rev 6

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1 6 melman701
module ft232h_fifos_interface (
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  reset_i,
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  // FT232H
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  usb_clk_i,
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  usb_data_io,
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  usb_rxf_n_i,
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  usb_txe_n_i,
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  usb_rd_n_o,
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  usb_wr_n_o,
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  usb_oe_n_o,
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  // RX FIFO
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  rxf_wrclk_o,
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  rxf_wrfull_i,
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  rxf_wrreq_o,
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  rxf_wrdata_o,
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  // TX FIFO
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  txf_rdclk_o,
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  txf_rdempty_i,
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  txf_rdreq_o,
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  txf_rddata_i
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);
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parameter READ_LATENCY = 1;
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parameter WRITE_LATENCY = 1;
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input  logic        reset_i;
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input  logic        usb_clk_i;
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inout  logic [7:0]  usb_data_io;
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input  logic        usb_rxf_n_i;
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input  logic        usb_txe_n_i;
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output logic        usb_rd_n_o;
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output logic        usb_wr_n_o;
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output logic        usb_oe_n_o;
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output logic        rxf_wrclk_o;
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input  logic        rxf_wrfull_i;
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output logic        rxf_wrreq_o;
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output logic [7:0]  rxf_wrdata_o;
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output logic        txf_rdclk_o;
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input  logic        txf_rdempty_i;
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output logic        txf_rdreq_o;
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input  logic [7:0]  txf_rddata_i;
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logic [7:0] usb_data_in;
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logic [7:0] usb_data_out;
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logic       rx_ready;
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logic       receiving;
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logic       receive;
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logic       tx_ready;
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logic       sending;
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logic       send;
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assign usb_data_io = usb_oe_n_o ? usb_data_out : {8{1'bZ}};
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assign usb_data_in = usb_data_io;
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ft232h_receiver rx_inst (
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  .reset_i        (reset_i),
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  .ready_o        (rx_ready),
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  .receive_i      (receive),
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  .receiving_o    (receiving),
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  // USB
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  .usb_clk_i      (usb_clk_i),
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  .usb_rxf_n_i    (usb_rxf_n_i),
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  .usb_rd_n_o     (usb_rd_n_o),
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  .usb_oe_n_o     (usb_oe_n_o),
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  .usb_data_i     (usb_data_in),
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  // FIFO
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  .fifo_wrfull_i  (rxf_wrfull_i),
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  .fifo_wrclk_o   (rxf_wrclk_o),
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  .fifo_wrreq_o   (rxf_wrreq_o),
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  .fifo_data_o    (rxf_wrdata_o)
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  );
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  defparam
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    rx_inst.LATENCY = READ_LATENCY;
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ft232h_transmitter tx_inst (
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  .reset_i        (reset_i),
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  .ready_o        (tx_ready),
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  .transmit_i     (send),
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  .sending_o      (sending),
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  // FT232H
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  .usb_clk_i      (usb_clk_i),
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  .usb_txe_n_i    (usb_txe_n_i),
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  .usb_wr_n_o     (usb_wr_n_o),
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  .usb_data_o     (usb_data_out),
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  // FIFO
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  .fifo_rdclk_o   (txf_rdclk_o),
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  .fifo_rdempty_i (txf_rdempty_i),
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  .fifo_rdreq_o   (txf_rdreq_o),
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  .fifo_rddata_i  (txf_rddata_i)
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  );
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  defparam
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    tx_inst.LATENCY = WRITE_LATENCY;
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always_ff @(posedge usb_clk_i or posedge reset_i)
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begin
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  if (reset_i)
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    begin
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      send <= 1'b0;
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      receive <= 1'b0;
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    end
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  else
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    begin
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      if (tx_ready & ~receiving & ~(receive & rx_ready))
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        begin
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          send <= 1'b1;
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          receive <= 1'b0;
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        end
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      else if (rx_ready & ~sending)
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        begin
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          send <= 1'b0;
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          receive <= 1'b1;
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        end
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    end
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end
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endmodule

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