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melman701 |
# -------------------------------------------------------------------------- #
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#
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# Copyright (C) 1991-2016 Altera Corporation. All rights reserved.
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# Your use of Altera Corporation's design tools, logic functions
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# and other software and tools, and its AMPP partner logic
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# functions, and any output files from any of the foregoing
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# (including device programming or simulation files), and any
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# associated documentation or information are expressly subject
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# to the terms and conditions of the Altera Program License
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# Subscription Agreement, the Altera Quartus Prime License Agreement,
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# the Altera MegaCore Function License Agreement, or other
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# applicable license agreement, including, without limitation,
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# that your use is for the sole purpose of programming logic
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# devices manufactured by Altera and sold by Altera or its
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# authorized distributors. Please refer to the applicable
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# agreement for further details.
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#
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# -------------------------------------------------------------------------- #
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#
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# Quartus Prime
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# Version 16.0.2 Build 222 07/20/2016 SJ Lite Edition
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# Date created = 15:14:22 March 14, 2017
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#
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# -------------------------------------------------------------------------- #
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#
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# Notes:
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#
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# 1) The default values for assignments are stored in the file:
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# test_usb_ft232h_assignment_defaults.qdf
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# If this file doesn't exist, see file:
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# assignment_defaults.qdf
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#
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# 2) Altera recommends that you do not modify this file. This
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# file is updated automatically by the Quartus Prime software
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# and any changes you make may be lost or overwritten.
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#
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# -------------------------------------------------------------------------- #
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set_global_assignment -name FAMILY "Cyclone IV E"
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set_global_assignment -name DEVICE EP4CE22E22C8
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set_global_assignment -name TOP_LEVEL_ENTITY test_usb_ft232h
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set_global_assignment -name ORIGINAL_QUARTUS_VERSION 16.0.2
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set_global_assignment -name PROJECT_CREATION_TIME_DATE "15:14:22 MARCH 14, 2017"
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set_global_assignment -name LAST_QUARTUS_VERSION "16.1.2 Lite Edition"
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set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
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set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
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set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
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set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1
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set_global_assignment -name NOMINAL_CORE_SUPPLY_VOLTAGE 1.2V
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set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (Verilog)"
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set_global_assignment -name EDA_TIME_SCALE "1 ps" -section_id eda_simulation
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set_global_assignment -name EDA_OUTPUT_DATA_FORMAT "VERILOG HDL" -section_id eda_simulation
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set_location_assignment PIN_114 -to USB_DATA[0]
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set_location_assignment PIN_115 -to USB_DATA[1]
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set_location_assignment PIN_120 -to USB_DATA[2]
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set_location_assignment PIN_121 -to USB_DATA[3]
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set_location_assignment PIN_132 -to USB_DATA[4]
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set_location_assignment PIN_133 -to USB_DATA[5]
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set_location_assignment PIN_135 -to USB_DATA[6]
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set_location_assignment PIN_137 -to USB_DATA[7]
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set_location_assignment PIN_49 -to DRAM_DQ[0]
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set_location_assignment PIN_50 -to DRAM_DQ[1]
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set_location_assignment PIN_51 -to DRAM_DQ[2]
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set_location_assignment PIN_58 -to DRAM_DQ[3]
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set_location_assignment PIN_59 -to DRAM_DQ[4]
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set_location_assignment PIN_60 -to DRAM_DQ[5]
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set_location_assignment PIN_66 -to DRAM_DQ[6]
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set_location_assignment PIN_67 -to DRAM_DQ[7]
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set_location_assignment PIN_126 -to USB_CLK
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set_location_assignment PIN_136 -to USB_OE_N
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set_location_assignment PIN_127 -to USB_RXF_N
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set_location_assignment PIN_128 -to USB_TXE_N
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set_location_assignment PIN_125 -to USB_RD_N
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set_location_assignment PIN_141 -to USB_WR_N
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set_location_assignment PIN_119 -to USB_SIWU_N
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set_location_assignment PIN_129 -to USB_PWREN_N
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set_location_assignment PIN_52 -to CLOCK_IN
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set_location_assignment PIN_68 -to DRAM_ADDR[1]
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set_location_assignment PIN_69 -to DRAM_ADDR[2]
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set_location_assignment PIN_71 -to DRAM_ADDR[3]
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set_location_assignment PIN_72 -to DRAM_ADDR[4]
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set_location_assignment PIN_76 -to DRAM_ADDR[5]
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set_location_assignment PIN_77 -to DRAM_ADDR[6]
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set_location_assignment PIN_80 -to DRAM_ADDR[7]
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set_location_assignment PIN_83 -to DRAM_ADDR[8]
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set_location_assignment PIN_85 -to DRAM_ADDR[9]
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set_location_assignment PIN_86 -to DRAM_ADDR[10]
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set_location_assignment PIN_87 -to DRAM_ADDR[11]
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set_location_assignment PIN_65 -to DRAM_ADDR[0]
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set_location_assignment PIN_42 -to DRAM_CKE
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set_location_assignment PIN_43 -to DRAM_CLK
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set_location_assignment PIN_44 -to DRAM_CS_N
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set_location_assignment PIN_64 -to DRAM_RAS_N
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set_location_assignment PIN_46 -to DRAM_DQM
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set_location_assignment PIN_31 -to DRAM_WE_N
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set_location_assignment PIN_39 -to DRAM_CAS_N
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set_location_assignment PIN_32 -to DRAM_BA[0]
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set_location_assignment PIN_33 -to DRAM_BA[1]
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set_location_assignment PIN_53 -to RESET_N
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set_location_assignment PIN_100 -to DAC_SPI_CS_N[1]
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set_location_assignment PIN_106 -to DAC_SPI_CS_N[2]
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set_location_assignment PIN_105 -to DAC_SPI_CS_N[3]
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set_location_assignment PIN_104 -to DAC_SPI_CS_N[4]
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set_location_assignment PIN_103 -to DAC_SPI_CS_N[5]
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set_location_assignment PIN_98 -to DAC_SPI_MOSI
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set_location_assignment PIN_99 -to DAC_SPI_CS_N[0]
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set_location_assignment PIN_91 -to MCU_MISO
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set_location_assignment PIN_111 -to MCU_MOSI
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set_location_assignment PIN_112 -to MCU_SCLK
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set_location_assignment PIN_110 -to MCU_SS_N
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set_location_assignment PIN_28 -to ADC_SDI
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set_location_assignment PIN_25 -to ADC_SDO
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set_location_assignment PIN_24 -to ADC_SDOFS
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set_location_assignment PIN_23 -to ADC_SCLK
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set_location_assignment PIN_113 -to MCU_CLOCK
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set_location_assignment PIN_144 -to FLASH_SCLK
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set_location_assignment PIN_143 -to FLASH_MOSI
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set_location_assignment PIN_142 -to FLASH_MISO
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set_location_assignment PIN_7 -to FLASH_CS_N
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set_location_assignment PIN_10 -to STATUS_LED
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set_location_assignment PIN_54 -to AD_DATA[0]
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set_location_assignment PIN_55 -to AD_DATA[1]
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set_location_assignment PIN_88 -to AD_DATA[2]
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set_location_assignment PIN_89 -to AD_DATA[3]
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set_location_assignment PIN_90 -to AD_DATA[4]
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set_location_assignment PIN_11 -to AD_DATA[5]
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set_location_assignment PIN_101 -to AD_CS_N
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set_location_assignment PIN_30 -to AD_SCK
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set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
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set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
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set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
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set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
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set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
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set_instance_assignment -name FAST_INPUT_REGISTER ON -to USB_DATA -disable
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to USB_DATA -disable
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set_instance_assignment -name FAST_INPUT_REGISTER ON -to USB_RXF_N -disable
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set_instance_assignment -name FAST_INPUT_REGISTER ON -to USB_TXE_N -disable
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set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to USB_OE_N -disable
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to USB_RD_N -disable
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set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to USB_WR_N -disable
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set_instance_assignment -name GLOBAL_SIGNAL GLOBAL_CLOCK -to USB_CLK
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set_instance_assignment -name GLOBAL_SIGNAL GLOBAL_CLOCK -to "pll2:inst1|c1"
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set_instance_assignment -name GLOBAL_SIGNAL GLOBAL_CLOCK -to "pll2:inst1|c0"
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set_global_assignment -name VERILOG_INPUT_VERSION SYSTEMVERILOG_2005
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set_global_assignment -name VERILOG_SHOW_LMF_MAPPING_MESSAGES OFF
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set_global_assignment -name ENABLE_SIGNALTAP OFF
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set_global_assignment -name USE_SIGNALTAP_FILE stp1.stp
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set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS ON
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set_global_assignment -name QSYS_FILE sopc.qsys
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set_global_assignment -name SYSTEMVERILOG_FILE usb_fifos_avalon_mm_interface.sv
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set_global_assignment -name SYSTEMVERILOG_FILE ft232h_transmitter.sv
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set_global_assignment -name SYSTEMVERILOG_FILE ft232h_receiver.sv
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set_global_assignment -name SYSTEMVERILOG_FILE pipeline.sv
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set_global_assignment -name SYSTEMVERILOG_FILE ft232h_fifos_interface.sv
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set_global_assignment -name SIGNALTAP_FILE stp1.stp
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set_global_assignment -name SYSTEMVERILOG_FILE usb_ft232h.sv
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set_global_assignment -name SDC_FILE test_usb_ft232h.out.sdc
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set_global_assignment -name BDF_FILE test_usb_ft232h.bdf
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set_global_assignment -name QIP_FILE pll1.qip
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set_global_assignment -name QIP_FILE pll2.qip
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set_global_assignment -name CDF_FILE test_usb_ft232h.cdf
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set_global_assignment -name QIP_FILE pll_stp.qip
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set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
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