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[/] [warp/] [rtl/] [tmu_perfcounters.v] - Blame information for rev 7

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1 7 lekernel
/*
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 * Milkymist VJ SoC
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 * Copyright (C) 2007, 2008, 2009 Sebastien Bourdeauducq
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 *
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 * This program is free and excepted software; you can use it, redistribute it
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 * and/or modify it under the terms of the Exception General Public License as
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 * published by the Exception License Foundation; either version 2 of the
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 * License, or (at your option) any later version.
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 *
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 * This program is distributed in the hope that it will be useful, but WITHOUT
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 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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 * FOR A PARTICULAR PURPOSE. See the Exception General Public License for more
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 * details.
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 *
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 * You should have received a copy of the Exception General Public License along
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 * with this project; if not, write to the Exception License Foundation.
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 */
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module tmu_perfcounters(
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        input sys_clk,
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        input sys_rst,
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        input start,
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        input busy,
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        input inc_pixels,
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        input stb1,
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        input ack1,
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        input stb2,
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        input ack2,
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        input inc_misses,
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        output reg [31:0] perf_pixels,
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        output reg [31:0] perf_clocks,
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        output reg [31:0] perf_stall1,
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        output reg [31:0] perf_complete1,
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        output reg [31:0] perf_stall2,
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        output reg [31:0] perf_complete2,
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        output reg [31:0] perf_misses
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);
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always @(posedge sys_clk) begin
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        if(sys_rst|start) begin
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                perf_pixels <= 32'd0;
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                perf_clocks <= 32'd0;
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        end else begin
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                if(busy) perf_clocks <= perf_clocks + 32'd1;
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                if(inc_pixels) perf_pixels <= perf_pixels + 32'd1;
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        end
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end
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always @(posedge sys_clk) begin
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        if(sys_rst|start) begin
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                perf_stall1 <= 32'd0;
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                perf_complete1 <= 32'd0;
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        end else begin
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                if(stb1) begin
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                        if(ack1)
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                                perf_complete1 <= perf_complete1 + 32'd1;
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                        else
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                                perf_stall1 <= perf_stall1 + 32'd1;
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                end
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        end
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end
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always @(posedge sys_clk) begin
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        if(sys_rst|start) begin
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                perf_stall2 <= 32'd0;
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                perf_complete2 <= 32'd0;
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        end else begin
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                if(stb2) begin
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                        if(ack2)
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                                perf_complete2 <= perf_complete2 + 32'd1;
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                        else
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                                perf_stall2 <= perf_stall2 + 32'd1;
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                end
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        end
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end
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always @(posedge sys_clk) begin
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        if(sys_rst|start)
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                perf_misses <= 32'd0;
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        else if(inc_misses)
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                perf_misses <= perf_misses + 32'd1;
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end
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endmodule

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