URL https://opencores.org/ocsvn/wb_lcd/wb_lcd/trunk

Subversion Repositories wb_lcd

[/] [wb_lcd/] [trunk/] [verilog/] [wb_lcd_ramless/] [boards/] [s3esk-wb_lcd/] [rtl/] [glbl.v] - Blame information for rev 2


`timescale  1 ns / 1 ps
 
module glbl ();
 
    wire GR;
    wire GSR;
    wire GTS;
    wire PRLD;
 
endmodule