OpenCores
URL https://opencores.org/ocsvn/xge_mac/xge_mac/trunk

Subversion Repositories xge_mac

[/] [xge_mac/] [trunk/] [rtl/] [include/] [defines.v] - Blame information for rev 24

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 antanguay
//////////////////////////////////////////////////////////////////////
2
////                                                              ////
3
////  File name "defines.v"                                       ////
4
////                                                              ////
5
////  This file is part of the "10GE MAC" project                 ////
6
////  http://www.opencores.org/cores/xge_mac/                     ////
7
////                                                              ////
8
////  Author(s):                                                  ////
9
////      - A. Tanguay (antanguay@opencores.org)                  ////
10
////                                                              ////
11
//////////////////////////////////////////////////////////////////////
12
////                                                              ////
13
//// Copyright (C) 2008 AUTHORS. All rights reserved.             ////
14
////                                                              ////
15
//// This source file may be used and distributed without         ////
16
//// restriction provided that this copyright statement is not    ////
17
//// removed from the file and that any derivative work contains  ////
18
//// the original copyright notice and the associated disclaimer. ////
19
////                                                              ////
20
//// This source file is free software; you can redistribute it   ////
21
//// and/or modify it under the terms of the GNU Lesser General   ////
22
//// Public License as published by the Free Software Foundation; ////
23
//// either version 2.1 of the License, or (at your option) any   ////
24
//// later version.                                               ////
25
////                                                              ////
26
//// This source is distributed in the hope that it will be       ////
27
//// useful, but WITHOUT ANY WARRANTY; without even the implied   ////
28
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      ////
29
//// PURPOSE.  See the GNU Lesser General Public License for more ////
30
//// details.                                                     ////
31
////                                                              ////
32
//// You should have received a copy of the GNU Lesser General    ////
33
//// Public License along with this source; if not, download it   ////
34
//// from http://www.opencores.org/lgpl.shtml                     ////
35
////                                                              ////
36
//////////////////////////////////////////////////////////////////////
37
 
38 22 antanguay
// Different synthesis option for FIFOs
39
// `define XIL
40 2 antanguay
 
41
// CPU Registers
42
 
43 24 antanguay
`define CPUREG_CONFIG0       8'h00
44
`define CPUREG_INT_PENDING   8'h08
45
`define CPUREG_INT_STATUS    8'h0c
46
`define CPUREG_INT_MASK      8'h10
47 2 antanguay
 
48 24 antanguay
`define CPUREG_STATSTXOCTETS 8'h80
49
`define CPUREG_STATSTXPKTS   8'h84
50 2 antanguay
 
51 24 antanguay
`define CPUREG_STATSRXOCTETS 8'h90
52
`define CPUREG_STATSRXPKTS   8'h94
53
 
54 2 antanguay
// Ethernet codes
55
 
56
`define IDLE       8'h07
57
`define PREAMBLE   8'h55
58
`define SEQUENCE   8'h9c
59
`define SFD        8'hd5
60
`define START      8'hfb
61 12 antanguay
`define TERMINATE  8'hfd
62 2 antanguay
`define ERROR      8'hfe
63
 
64
 
65
 
66
`define LINK_FAULT_OK      2'd0
67
`define LINK_FAULT_LOCAL   2'd1
68
`define LINK_FAULT_REMOTE  2'd2
69
 
70
`define FAULT_SEQ_LOCAL  1'b0
71
`define FAULT_SEQ_REMOTE 1'b1
72
 
73
`define LOCAL_FAULT   8'd1
74
`define REMOTE_FAULT  8'd2
75
 
76
`define PAUSE_FRAME   48'h010000c28001
77
 
78
`define LANE0        7:0
79
`define LANE1       15:8
80
`define LANE2      23:16
81
`define LANE3      31:24
82
`define LANE4      39:32
83
`define LANE5      47:40
84
`define LANE6      55:48
85
`define LANE7      63:56
86
 
87
 
88 6 antanguay
`define TXSTATUS_NONE       8'h0
89
`define TXSTATUS_EOP        3'd6
90
`define TXSTATUS_SOP        3'd7
91 2 antanguay
 
92 6 antanguay
`define RXSTATUS_NONE       8'h0
93
`define RXSTATUS_ERR        3'd5
94
`define RXSTATUS_EOP        3'd6
95
`define RXSTATUS_SOP        3'd7
96 2 antanguay
 
97
 
98
//
99
// FIFO Size: 8 * (2^AWIDTH) will be the size in bytes
100
//            7 --> 128 entries, 1024 bytes for data fifo
101
//
102
`define TX_DATA_FIFO_AWIDTH 7
103
`define RX_DATA_FIFO_AWIDTH 7
104
 
105
//
106
// FIFO Size: Holding FIFOs are 16 deep
107
//
108
`define TX_HOLD_FIFO_AWIDTH 4
109
`define RX_HOLD_FIFO_AWIDTH 4
110
 
111
 
112 24 antanguay
//
113
// FIFO Size: Statistics FIFOs are 16 deep
114
//
115
`define TX_STAT_FIFO_AWIDTH 4
116
`define RX_STAT_FIFO_AWIDTH 4
117
 
118
 
119 2 antanguay
// Memory types
120
`define MEM_AUTO_SMALL 1
121
`define MEM_AUTO_MEDIUM 2
122
 
123
 
124 12 antanguay
// Changed system packet interface to big endian (12/12/2009)
125
// Comment out to use legacy mode
126
`define BIGENDIAN

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.