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[/] [xge_mac/] [trunk/] [rtl/] [verilog/] [rx_data_fifo.v] - Blame information for rev 12

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1 2 antanguay
//////////////////////////////////////////////////////////////////////
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////                                                              ////
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////  File name "rx_data_fifo.v"                                  ////
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////                                                              ////
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////  This file is part of the "10GE MAC" project                 ////
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////  http://www.opencores.org/cores/xge_mac/                     ////
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////                                                              ////
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////  Author(s):                                                  ////
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////      - A. Tanguay (antanguay@opencores.org)                  ////
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////                                                              ////
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//////////////////////////////////////////////////////////////////////
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////                                                              ////
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//// Copyright (C) 2008 AUTHORS. All rights reserved.             ////
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////                                                              ////
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//// This source file may be used and distributed without         ////
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//// restriction provided that this copyright statement is not    ////
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//// removed from the file and that any derivative work contains  ////
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//// the original copyright notice and the associated disclaimer. ////
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////                                                              ////
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//// This source file is free software; you can redistribute it   ////
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//// and/or modify it under the terms of the GNU Lesser General   ////
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//// Public License as published by the Free Software Foundation; ////
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//// either version 2.1 of the License, or (at your option) any   ////
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//// later version.                                               ////
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////                                                              ////
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//// This source is distributed in the hope that it will be       ////
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//// useful, but WITHOUT ANY WARRANTY; without even the implied   ////
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//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      ////
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//// PURPOSE.  See the GNU Lesser General Public License for more ////
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//// details.                                                     ////
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////                                                              ////
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//// You should have received a copy of the GNU Lesser General    ////
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//// Public License along with this source; if not, download it   ////
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//// from http://www.opencores.org/lgpl.shtml                     ////
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////                                                              ////
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//////////////////////////////////////////////////////////////////////
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`include "defines.v"
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module rx_data_fifo(/*AUTOARG*/
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  // Outputs
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  rxdfifo_wfull, rxdfifo_rdata, rxdfifo_rstatus, rxdfifo_rempty,
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  rxdfifo_ralmost_empty,
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  // Inputs
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  clk_xgmii_rx, clk_156m25, reset_xgmii_rx_n, reset_156m25_n,
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  rxdfifo_wdata, rxdfifo_wstatus, rxdfifo_wen, rxdfifo_ren
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  );
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input         clk_xgmii_rx;
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input         clk_156m25;
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input         reset_xgmii_rx_n;
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input         reset_156m25_n;
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input [63:0]  rxdfifo_wdata;
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input [7:0]   rxdfifo_wstatus;
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input         rxdfifo_wen;
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input         rxdfifo_ren;
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output        rxdfifo_wfull;
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output [63:0] rxdfifo_rdata;
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output [7:0]  rxdfifo_rstatus;
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output        rxdfifo_rempty;
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output        rxdfifo_ralmost_empty;
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generic_fifo #(
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  .DWIDTH (72),
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  .AWIDTH (`RX_DATA_FIFO_AWIDTH),
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  .REGISTER_READ (0),
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  .EARLY_READ (1),
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  .CLOCK_CROSSING (1),
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  .ALMOST_EMPTY_THRESH (4),
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  .MEM_TYPE (`MEM_AUTO_MEDIUM)
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)
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fifo0(
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    .wclk (clk_xgmii_rx),
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    .wrst_n (reset_xgmii_rx_n),
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    .wen (rxdfifo_wen),
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    .wdata ({rxdfifo_wstatus, rxdfifo_wdata}),
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    .wfull (rxdfifo_wfull),
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    .walmost_full (),
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    .rclk (clk_156m25),
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    .rrst_n (reset_156m25_n),
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    .ren (rxdfifo_ren),
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    .rdata ({rxdfifo_rstatus, rxdfifo_rdata}),
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    .rempty (rxdfifo_rempty),
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    .ralmost_empty (rxdfifo_ralmost_empty)
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);
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endmodule
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