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[/] [xge_mac/] [trunk/] [tbench/] [systemc/] [sc_cpu_if.h] - Blame information for rev 17

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//////////////////////////////////////////////////////////////////////
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////                                                              ////
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////  File name "sc_cpu_if.h"                                     ////
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////                                                              ////
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////  This file is part of the "10GE MAC" project                 ////
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////  http://www.opencores.org/cores/xge_mac/                     ////
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////                                                              ////
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////  Author(s):                                                  ////
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////      - A. Tanguay (antanguay@opencores.org)                  ////
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////                                                              ////
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//////////////////////////////////////////////////////////////////////
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////                                                              ////
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//// Copyright (C) 2008 AUTHORS. All rights reserved.             ////
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////                                                              ////
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//// This source file may be used and distributed without         ////
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//// restriction provided that this copyright statement is not    ////
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//// removed from the file and that any derivative work contains  ////
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//// the original copyright notice and the associated disclaimer. ////
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////                                                              ////
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//// This source file is free software; you can redistribute it   ////
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//// and/or modify it under the terms of the GNU Lesser General   ////
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//// Public License as published by the Free Software Foundation; ////
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//// either version 2.1 of the License, or (at your option) any   ////
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//// later version.                                               ////
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////                                                              ////
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//// This source is distributed in the hope that it will be       ////
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//// useful, but WITHOUT ANY WARRANTY; without even the implied   ////
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//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      ////
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//// PURPOSE.  See the GNU Lesser General Public License for more ////
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//// details.                                                     ////
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////                                                              ////
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//// You should have received a copy of the GNU Lesser General    ////
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//// Public License along with this source; if not, download it   ////
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//// from http://www.opencores.org/lgpl.shtml                     ////
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////                                                              ////
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//////////////////////////////////////////////////////////////////////
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#ifndef CPU_IF_H
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#define CPU_IF_H
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#include "systemc.h"
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#include "sc_scoreboard.h"
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#include "sc_cpu_if.h"
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SC_MODULE(cpu_if) {
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  public:
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    //---
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    // Ports
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    sc_in<bool> wb_clk_i;
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    sc_in<bool> wb_rst_i;
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    sc_in<bool> wb_ack_o;
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    sc_in<unsigned int> wb_dat_o;
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    sc_in<bool> wb_int_o;
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    sc_out<unsigned int> wb_adr_i;
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    sc_out<bool> wb_cyc_i;
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    sc_out<unsigned int> wb_dat_i;
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    sc_out<bool> wb_stb_i;
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    sc_out<bool> wb_we_i;
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    //---
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    // Types
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    enum paramId {
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        TX_ENABLE,
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    };
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    enum intId {
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        INT_TXD_FIFO_OVFLOW = 0,
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        INT_TXD_FIFO_UDFLOW = 1,
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        INT_RXD_FIFO_OVFLOW = 2,
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        INT_RXD_FIFO_UDFLOW = 3,
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        INT_LOCAL_FAULT = 4,
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        INT_REMOTE_FAULT = 5,
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        INT_PAUSE_FRAME = 6,
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        INT_CRC_ERROR = 7,
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        INT_FRAGMENT_ERROR = 8,
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    };
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    enum regId {
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        CPUREG_CONFIG0 = 0x0,
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        CPUREG_INT_PENDING = 0x8,
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        CPUREG_INT_STATUS = 0xc,
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        CPUREG_INT_MASK = 0x10,
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    };
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  private:
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    //---
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    // Variables
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    scoreboard *sb;
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    scoreboard::sbSourceId sb_id;
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    sc_mutex bus_lock;
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    sc_semaphore bus_start;
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    sc_semaphore bus_done;
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    uint bus_addr;
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    uint bus_data;
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    bool bus_write;
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  public:
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    //---
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    // Variables
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    //---
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    // Functions
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    void init();
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    void connect_scoreboard(scoreboard *sbptr, scoreboard::sbSourceId sid);
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    void set_param(cpu_if::paramId param, int value);
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    void set_interrupt(cpu_if::intId intr);
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    void set_interrupt_mask(cpu_if::intId intr, bool value);
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    void enable_all_interrupts(void);
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    uint read(uint addr);
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    void write(uint addr, uint data);
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    void writebits(uint addr, uint hbit, uint lbit, uint value);
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    //---
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    // Threads
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    void transactor();
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    void monitor();
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    SC_CTOR(cpu_if): bus_start(0), bus_done(0) {
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        SC_CTHREAD (monitor, wb_clk_i.pos());
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        SC_CTHREAD (transactor, wb_clk_i.pos());
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    }
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};
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#endif

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