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[/] [xmatchpro/] [trunk/] [xmw4-comdec/] [xmatch_sim7/] [ipcore_dir/] [DP_RAM_XILINX_MASK/] [simulation/] [timing/] [wave_ncsim.sv] - Blame information for rev 9

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Line No. Rev Author Line
1 9 eejlny 
 
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window new WaveWindow  -name  "Waves for BMG Example Design"
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waveform  using  "Waves for BMG Example Design"
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      waveform add -signals /DP_RAM_XILINX_MASK_tb/status
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      waveform add -signals /DP_RAM_XILINX_MASK_tb/DP_RAM_XILINX_MASK_synth_inst/bmg_port/CLKA
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      waveform add -signals /DP_RAM_XILINX_MASK_tb/DP_RAM_XILINX_MASK_synth_inst/bmg_port/ADDRA
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      waveform add -signals /DP_RAM_XILINX_MASK_tb/DP_RAM_XILINX_MASK_synth_inst/bmg_port/DINA
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      waveform add -signals /DP_RAM_XILINX_MASK_tb/DP_RAM_XILINX_MASK_synth_inst/bmg_port/WEA
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      waveform add -signals /DP_RAM_XILINX_MASK_tb/DP_RAM_XILINX_MASK_synth_inst/bmg_port/DOUTA
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      waveform add -signals /DP_RAM_XILINX_MASK_tb/DP_RAM_XILINX_MASK_synth_inst/bmg_port/CLKB
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      waveform add -signals /DP_RAM_XILINX_MASK_tb/DP_RAM_XILINX_MASK_synth_inst/bmg_port/ADDRB
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      waveform add -signals /DP_RAM_XILINX_MASK_tb/DP_RAM_XILINX_MASK_synth_inst/bmg_port/ENB
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      waveform add -signals /DP_RAM_XILINX_MASK_tb/DP_RAM_XILINX_MASK_synth_inst/bmg_port/DINB
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      waveform add -signals /DP_RAM_XILINX_MASK_tb/DP_RAM_XILINX_MASK_synth_inst/bmg_port/WEB
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      waveform add -signals /DP_RAM_XILINX_MASK_tb/DP_RAM_XILINX_MASK_synth_inst/bmg_port/DOUTB
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console submit -using simulator -wait no "run"

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