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[/] [xmatchpro/] [trunk/] [xmw4-comdec/] [xmatch_sim7/] [isim/] [testbench_isim_beh.exe.sim/] [xilinxcorelib/] [a_2386599890_1709443946.c] - Blame information for rev 9

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Line No. Rev Author Line
1 9 eejlny
/**********************************************************************/
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/*   ____  ____                                                       */
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/*  /   /\/   /                                                       */
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/* /___/  \  /                                                        */
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/* \   \   \/                                                       */
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/*  \   \        Copyright (c) 2003-2009 Xilinx, Inc.                */
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/*  /   /          All Right Reserved.                                 */
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/* /---/   /\                                                         */
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/* \   \  /  \                                                      */
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/*  \___\/\___\                                                    */
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/***********************************************************************/
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/* This file is designed for use with ISim build 0x7708f090 */
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#define XSI_HIDE_SYMBOL_SPEC true
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#include "xsi.h"
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#include <memory.h>
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#ifdef __GNUC__
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#include <stdlib.h>
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#else
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#include <malloc.h>
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#define alloca _alloca
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#endif
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static void xilinxcorelib_a_2386599890_1709443946_p_0(char *t0)
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{
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    char *t1;
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    char *t2;
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    char *t3;
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    char *t4;
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    char *t5;
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    char *t6;
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    char *t7;
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LAB0:
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LAB3:    t1 = (t0 + 1456U);
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    t2 = *((char **)t1);
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    t1 = (t0 + 6168);
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    t3 = (t1 + 56U);
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    t4 = *((char **)t3);
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    t5 = (t4 + 56U);
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    t6 = *((char **)t5);
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    memcpy(t6, t2, 32U);
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    xsi_driver_first_trans_fast_port(t1);
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LAB2:    t7 = (t0 + 6040);
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    *((int *)t7) = 1;
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LAB1:    return;
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LAB4:    goto LAB2;
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}
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static void xilinxcorelib_a_2386599890_1709443946_p_1(char *t0)
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{
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    char *t1;
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    char *t2;
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    unsigned char t3;
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    char *t4;
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    char *t5;
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    char *t6;
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    char *t7;
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    char *t8;
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LAB0:
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LAB3:    t1 = (t0 + 1776U);
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    t2 = *((char **)t1);
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    t3 = *((unsigned char *)t2);
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    t1 = (t0 + 6232);
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    t4 = (t1 + 56U);
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    t5 = *((char **)t4);
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    t6 = (t5 + 56U);
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    t7 = *((char **)t6);
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    *((unsigned char *)t7) = t3;
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    xsi_driver_first_trans_fast_port(t1);
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LAB2:    t8 = (t0 + 6056);
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    *((int *)t8) = 1;
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LAB1:    return;
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LAB4:    goto LAB2;
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}
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static void xilinxcorelib_a_2386599890_1709443946_p_2(char *t0)
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{
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    char *t1;
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    char *t2;
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    unsigned char t3;
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    char *t4;
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    char *t5;
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    char *t6;
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    char *t7;
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    char *t8;
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LAB0:
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LAB3:    t1 = (t0 + 1936U);
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    t2 = *((char **)t1);
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    t3 = *((unsigned char *)t2);
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    t1 = (t0 + 6296);
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    t4 = (t1 + 56U);
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    t5 = *((char **)t4);
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    t6 = (t5 + 56U);
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    t7 = *((char **)t6);
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    *((unsigned char *)t7) = t3;
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    xsi_driver_first_trans_fast_port(t1);
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LAB2:    t8 = (t0 + 6072);
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    *((int *)t8) = 1;
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LAB1:    return;
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LAB4:    goto LAB2;
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}
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static void xilinxcorelib_a_2386599890_1709443946_p_3(char *t0)
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{
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    char *t1;
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    char *t2;
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    char *t3;
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    char *t4;
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    char *t5;
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    char *t6;
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    char *t7;
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LAB0:
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LAB3:    t1 = (t0 + 2416U);
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    t2 = *((char **)t1);
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    t1 = (t0 + 6360);
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    t3 = (t1 + 56U);
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    t4 = *((char **)t3);
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    t5 = (t4 + 56U);
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    t6 = *((char **)t5);
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    memcpy(t6, t2, 8U);
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    xsi_driver_first_trans_fast_port(t1);
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LAB2:    t7 = (t0 + 6088);
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    *((int *)t7) = 1;
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LAB1:    return;
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LAB4:    goto LAB2;
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}
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extern void xilinxcorelib_a_2386599890_1709443946_init()
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{
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        static char *pe[] = {(void *)xilinxcorelib_a_2386599890_1709443946_p_0,(void *)xilinxcorelib_a_2386599890_1709443946_p_1,(void *)xilinxcorelib_a_2386599890_1709443946_p_2,(void *)xilinxcorelib_a_2386599890_1709443946_p_3};
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        xsi_register_didat("xilinxcorelib_a_2386599890_1709443946", "isim/testbench_isim_beh.exe.sim/xilinxcorelib/a_2386599890_1709443946.didat");
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        xsi_register_executes(pe);
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}

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