URL https://opencores.org/ocsvn/xmatchpro/xmatchpro/trunk

Subversion Repositories xmatchpro

[/] [xmatchpro/] [trunk/] [xmw4-comdec/] [xmatch_sim7/] [isim/] [testbench_isim_beh.exe.sim/] [xilinxcorelib/] [a_3585000111_2959432447.c] - Blame information for rev 9

Details | Compare with Previous | View Log


/**********************************************************************/
/*   ____  ____                                                       */
/*  /   /\/   /                                                       */
/* /___/  \  /                                                        */
/* \   \   \/                                                       */
/*  \   \        Copyright (c) 2003-2009 Xilinx, Inc.                */
/*  /   /          All Right Reserved.                                 */
/* /---/   /\                                                         */
/* \   \  /  \                                                      */
/*  \___\/\___\                                                    */
/***********************************************************************/
 
/* This file is designed for use with ISim build 0x7708f090 */
 
#define XSI_HIDE_SYMBOL_SPEC true
#include "xsi.h"
#include <memory.h>
#ifdef __GNUC__
#include <stdlib.h>
#else
#include <malloc.h>
#define alloca _alloca
#endif
extern char *STD_STANDARD;
extern char *IEEE_P_2592010699;
 
unsigned char ieee_p_2592010699_sub_1605435078_503743352(char *, unsigned char , unsigned char );
unsigned char ieee_p_2592010699_sub_1690584930_503743352(char *, unsigned char );
unsigned char ieee_p_2592010699_sub_2545490612_503743352(char *, unsigned char , unsigned char );
 
 
int xilinxcorelib_a_3585000111_2959432447_sub_1430772697_1702280263(char *t1, int t2)
{
    char t3[128];
    char t4[8];
    char t8[8];
    int t0;
    char *t5;
    char *t6;
    char *t7;
    char *t9;
    char *t10;
    char *t11;
    unsigned char t12;
    char *t13;
    char *t14;
    int t15;
 
LAB0:    t5 = (t3 + 4U);
    t6 = ((STD_STANDARD) + 384);
    t7 = (t5 + 88U);
    *((char **)t7) = t6;
    t9 = (t5 + 56U);
    *((char **)t9) = t8;
    *((int *)t8) = 0;
    t10 = (t5 + 80U);
    *((unsigned int *)t10) = 4U;
    t11 = (t4 + 4U);
    *((int *)t11) = t2;
    t12 = (t2 == 0);
    if (t12 != 0)
        goto LAB2;
 
LAB4:    t15 = (t2 - 1);
    t6 = (t5 + 56U);
    t7 = *((char **)t6);
    t6 = (t7 + 0);
    *((int *)t6) = t15;
 
LAB3:    t6 = (t5 + 56U);
    t7 = *((char **)t6);
    t15 = *((int *)t7);
    t0 = t15;
 
LAB1:    return t0;
LAB2:    t13 = (t5 + 56U);
    t14 = *((char **)t13);
    t13 = (t14 + 0);
    *((int *)t13) = 0;
    goto LAB3;
 
LAB5:;
}
 
unsigned char xilinxcorelib_a_3585000111_2959432447_sub_4126348946_1702280263(char *t1, int t2)
{
    char t3[128];
    char t4[8];
    char t8[8];
    unsigned char t0;
    char *t5;
    char *t6;
    char *t7;
    char *t9;
    char *t10;
    char *t11;
    unsigned char t12;
    char *t13;
    char *t14;
 
LAB0:    t5 = (t3 + 4U);
    t6 = ((IEEE_P_2592010699) + 3320);
    t7 = (t5 + 88U);
    *((char **)t7) = t6;
    t9 = (t5 + 56U);
    *((char **)t9) = t8;
    xsi_type_set_default_value(t6, t8, 0);
    t10 = (t5 + 80U);
    *((unsigned int *)t10) = 1U;
    t11 = (t4 + 4U);
    *((int *)t11) = t2;
    t12 = (t2 == 0);
    if (t12 != 0)
        goto LAB2;
 
LAB4:    t6 = (t5 + 56U);
    t7 = *((char **)t6);
    t6 = (t7 + 0);
    *((unsigned char *)t6) = (unsigned char)3;
 
LAB3:    t6 = (t5 + 56U);
    t7 = *((char **)t6);
    t12 = *((unsigned char *)t7);
    t0 = t12;
 
LAB1:    return t0;
LAB2:    t13 = (t5 + 56U);
    t14 = *((char **)t13);
    t13 = (t14 + 0);
    *((unsigned char *)t13) = (unsigned char)2;
    goto LAB3;
 
LAB5:;
}
 
static void xilinxcorelib_a_3585000111_2959432447_p_0(char *t0)
{
    char *t1;
    char *t2;
    unsigned char t3;
    char *t4;
    unsigned char t5;
    unsigned char t6;
    unsigned char t7;
    char *t8;
    char *t9;
    char *t10;
    char *t11;
    char *t12;
 
LAB0:
LAB3:    t1 = (t0 + 1616U);
    t2 = *((char **)t1);
    t3 = *((unsigned char *)t2);
    t1 = (t0 + 6552U);
    t4 = *((char **)t1);
    t5 = *((unsigned char *)t4);
    t6 = ieee_p_2592010699_sub_1690584930_503743352(IEEE_P_2592010699, t5);
    t7 = ieee_p_2592010699_sub_2545490612_503743352(IEEE_P_2592010699, t3, t6);
    t1 = (t0 + 10576);
    t8 = (t1 + 56U);
    t9 = *((char **)t8);
    t10 = (t9 + 56U);
    t11 = *((char **)t10);
    *((unsigned char *)t11) = t7;
    xsi_driver_first_trans_fast(t1);
 
LAB2:    t12 = (t0 + 10400);
    *((int *)t12) = 1;
 
LAB1:    return;
LAB4:    goto LAB2;
 
}
 
static void xilinxcorelib_a_3585000111_2959432447_p_1(char *t0)
{
    char *t1;
    char *t2;
    unsigned char t3;
    char *t4;
    unsigned char t5;
    unsigned char t6;
    char *t7;
    unsigned char t8;
    unsigned char t9;
    char *t10;
    unsigned char t11;
    unsigned char t12;
    unsigned char t13;
    char *t14;
    char *t15;
    char *t16;
    char *t17;
    char *t18;
 
LAB0:
LAB3:    t1 = (t0 + 6672U);
    t2 = *((char **)t1);
    t3 = *((unsigned char *)t2);
    t1 = (t0 + 1776U);
    t4 = *((char **)t1);
    t5 = *((unsigned char *)t4);
    t6 = ieee_p_2592010699_sub_1605435078_503743352(IEEE_P_2592010699, t3, t5);
    t1 = (t0 + 6672U);
    t7 = *((char **)t1);
    t8 = *((unsigned char *)t7);
    t9 = ieee_p_2592010699_sub_1690584930_503743352(IEEE_P_2592010699, t8);
    t1 = (t0 + 3856U);
    t10 = *((char **)t1);
    t11 = *((unsigned char *)t10);
    t12 = ieee_p_2592010699_sub_1605435078_503743352(IEEE_P_2592010699, t9, t11);
    t13 = ieee_p_2592010699_sub_2545490612_503743352(IEEE_P_2592010699, t6, t12);
    t1 = (t0 + 10640);
    t14 = (t1 + 56U);
    t15 = *((char **)t14);
    t16 = (t15 + 56U);
    t17 = *((char **)t16);
    *((unsigned char *)t17) = t13;
    xsi_driver_first_trans_fast(t1);
 
LAB2:    t18 = (t0 + 10416);
    *((int *)t18) = 1;
 
LAB1:    return;
LAB4:    goto LAB2;
 
}
 
static void xilinxcorelib_a_3585000111_2959432447_p_2(char *t0)
{
    char *t1;
    char *t2;
    unsigned char t3;
    char *t4;
    unsigned char t5;
    unsigned char t6;
    char *t7;
    char *t8;
    char *t9;
    char *t10;
    char *t11;
 
LAB0:
LAB3:    t1 = (t0 + 1456U);
    t2 = *((char **)t1);
    t3 = *((unsigned char *)t2);
    t1 = (t0 + 6792U);
    t4 = *((char **)t1);
    t5 = *((unsigned char *)t4);
    t6 = ieee_p_2592010699_sub_1605435078_503743352(IEEE_P_2592010699, t3, t5);
    t1 = (t0 + 10704);
    t7 = (t1 + 56U);
    t8 = *((char **)t7);
    t9 = (t8 + 56U);
    t10 = *((char **)t9);
    *((unsigned char *)t10) = t6;
    xsi_driver_first_trans_fast(t1);
 
LAB2:    t11 = (t0 + 10432);
    *((int *)t11) = 1;
 
LAB1:    return;
LAB4:    goto LAB2;
 
}
 
static void xilinxcorelib_a_3585000111_2959432447_p_3(char *t0)
{
    char *t1;
    char *t2;
    char *t3;
    char *t4;
    char *t5;
    char *t6;
    char *t7;
 
LAB0:
LAB3:    t1 = (t0 + 1936U);
    t2 = *((char **)t1);
    t1 = (t0 + 10768);
    t3 = (t1 + 56U);
    t4 = *((char **)t3);
    t5 = (t4 + 56U);
    t6 = *((char **)t5);
    memcpy(t6, t2, 32U);
    xsi_driver_first_trans_fast_port(t1);
 
LAB2:    t7 = (t0 + 10448);
    *((int *)t7) = 1;
 
LAB1:    return;
LAB4:    goto LAB2;
 
}
 
static void xilinxcorelib_a_3585000111_2959432447_p_4(char *t0)
{
    char *t1;
    char *t2;
    unsigned char t3;
    char *t4;
    char *t5;
    char *t6;
    char *t7;
    char *t8;
 
LAB0:
LAB3:    t1 = (t0 + 2256U);
    t2 = *((char **)t1);
    t3 = *((unsigned char *)t2);
    t1 = (t0 + 10832);
    t4 = (t1 + 56U);
    t5 = *((char **)t4);
    t6 = (t5 + 56U);
    t7 = *((char **)t6);
    *((unsigned char *)t7) = t3;
    xsi_driver_first_trans_fast_port(t1);
 
LAB2:    t8 = (t0 + 10464);
    *((int *)t8) = 1;
 
LAB1:    return;
LAB4:    goto LAB2;
 
}
 
static void xilinxcorelib_a_3585000111_2959432447_p_5(char *t0)
{
    char *t1;
    char *t2;
    unsigned char t3;
    char *t4;
    char *t5;
    char *t6;
    char *t7;
    char *t8;
 
LAB0:
LAB3:    t1 = (t0 + 2416U);
    t2 = *((char **)t1);
    t3 = *((unsigned char *)t2);
    t1 = (t0 + 10896);
    t4 = (t1 + 56U);
    t5 = *((char **)t4);
    t6 = (t5 + 56U);
    t7 = *((char **)t6);
    *((unsigned char *)t7) = t3;
    xsi_driver_first_trans_fast_port(t1);
 
LAB2:    t8 = (t0 + 10480);
    *((int *)t8) = 1;
 
LAB1:    return;
LAB4:    goto LAB2;
 
}
 
static void xilinxcorelib_a_3585000111_2959432447_p_6(char *t0)
{
    char *t1;
    char *t2;
    char *t3;
    char *t4;
    char *t5;
    char *t6;
    char *t7;
 
LAB0:
LAB3:    t1 = (t0 + 2896U);
    t2 = *((char **)t1);
    t1 = (t0 + 10960);
    t3 = (t1 + 56U);
    t4 = *((char **)t3);
    t5 = (t4 + 56U);
    t6 = *((char **)t5);
    memcpy(t6, t2, 8U);
    xsi_driver_first_trans_fast_port(t1);
 
LAB2:    t7 = (t0 + 10496);
    *((int *)t7) = 1;
 
LAB1:    return;
LAB4:    goto LAB2;
 
}
 
 
extern void xilinxcorelib_a_3585000111_2959432447_init()
{
        static char *pe[] = {(void *)xilinxcorelib_a_3585000111_2959432447_p_0,(void *)xilinxcorelib_a_3585000111_2959432447_p_1,(void *)xilinxcorelib_a_3585000111_2959432447_p_2,(void *)xilinxcorelib_a_3585000111_2959432447_p_3,(void *)xilinxcorelib_a_3585000111_2959432447_p_4,(void *)xilinxcorelib_a_3585000111_2959432447_p_5,(void *)xilinxcorelib_a_3585000111_2959432447_p_6};
        static char *se[] = {(void *)xilinxcorelib_a_3585000111_2959432447_sub_1430772697_1702280263,(void *)xilinxcorelib_a_3585000111_2959432447_sub_4126348946_1702280263};
        xsi_register_didat("xilinxcorelib_a_3585000111_2959432447", "isim/testbench_isim_beh.exe.sim/xilinxcorelib/a_3585000111_2959432447.didat");
        xsi_register_executes(pe);
        xsi_register_subprogram_executes(se);
}

Browse

Tools

Subversion Repositories xmatchpro

[/] [xmatchpro/] [trunk/] [xmw4-comdec/] [xmatch_sim7/] [isim/] [testbench_isim_beh.exe.sim/] [xilinxcorelib/] [a_3585000111_2959432447.c] - Blame information for rev 9

Line No.	Rev	Author	Line
1	9	eejlny	`/**********************************************************************/`
2			`/* ____ ____ */`
3			`/* / /\/ / */`
4			`/* /___/ \ / */`
5			`/* \ \ \/ */`
6			`/* \ \ Copyright (c) 2003-2009 Xilinx, Inc. */`
7			`/* / / All Right Reserved. */`
8			`/* /---/ /\ */`
9			`/* \ \ / \ */`
10			`/* \___\/\___\ */`
11			`/***********************************************************************/`
12
13			`/* This file is designed for use with ISim build 0x7708f090 */`
14
15			`#define XSI_HIDE_SYMBOL_SPEC true`
16			`#include "xsi.h"`
17			`#include <memory.h>`
18			`#ifdef __GNUC__`
19			`#include <stdlib.h>`
20			`#else`
21			`#include <malloc.h>`
22			`#define alloca _alloca`
23			`#endif`
24			`extern char *STD_STANDARD;`
25			`extern char *IEEE_P_2592010699;`
26
27			`unsigned char ieee_p_2592010699_sub_1605435078_503743352(char *, unsigned char , unsigned char );`
28			`unsigned char ieee_p_2592010699_sub_1690584930_503743352(char *, unsigned char );`
29			`unsigned char ieee_p_2592010699_sub_2545490612_503743352(char *, unsigned char , unsigned char );`
30
31
32			`int xilinxcorelib_a_3585000111_2959432447_sub_1430772697_1702280263(char *t1, int t2)`
33			`{`
34			`char t3[128];`
35			`char t4[8];`
36			`char t8[8];`
37			`int t0;`
38			`char *t5;`
39			`char *t6;`
40			`char *t7;`
41			`char *t9;`
42			`char *t10;`
43			`char *t11;`
44			`unsigned char t12;`
45			`char *t13;`
46			`char *t14;`
47			`int t15;`
48
49			`LAB0: t5 = (t3 + 4U);`
50			`t6 = ((STD_STANDARD) + 384);`
51			`t7 = (t5 + 88U);`
52			`((char *)t7) = t6;`
53			`t9 = (t5 + 56U);`
54			`((char *)t9) = t8;`
55			`((int )t8) = 0;`
56			`t10 = (t5 + 80U);`
57			`((unsigned int )t10) = 4U;`
58			`t11 = (t4 + 4U);`
59			`((int )t11) = t2;`
60			`t12 = (t2 == 0);`
61			`if (t12 != 0)`
62			`goto LAB2;`
63
64			`LAB4: t15 = (t2 - 1);`
65			`t6 = (t5 + 56U);`
66			`t7 = ((char *)t6);`
67			`t6 = (t7 + 0);`
68			`((int )t6) = t15;`
69
70			`LAB3: t6 = (t5 + 56U);`
71			`t7 = ((char *)t6);`
72			`t15 = ((int )t7);`
73			`t0 = t15;`
74
75			`LAB1: return t0;`
76			`LAB2: t13 = (t5 + 56U);`
77			`t14 = ((char *)t13);`
78			`t13 = (t14 + 0);`
79			`((int )t13) = 0;`
80			`goto LAB3;`
81
82			`LAB5:;`
83			`}`
84
85			`unsigned char xilinxcorelib_a_3585000111_2959432447_sub_4126348946_1702280263(char *t1, int t2)`
86			`{`
87			`char t3[128];`
88			`char t4[8];`
89			`char t8[8];`
90			`unsigned char t0;`
91			`char *t5;`
92			`char *t6;`
93			`char *t7;`
94			`char *t9;`
95			`char *t10;`
96			`char *t11;`
97			`unsigned char t12;`
98			`char *t13;`
99			`char *t14;`
100
101			`LAB0: t5 = (t3 + 4U);`
102			`t6 = ((IEEE_P_2592010699) + 3320);`
103			`t7 = (t5 + 88U);`
104			`((char *)t7) = t6;`
105			`t9 = (t5 + 56U);`
106			`((char *)t9) = t8;`
107			`xsi_type_set_default_value(t6, t8, 0);`
108			`t10 = (t5 + 80U);`
109			`((unsigned int )t10) = 1U;`
110			`t11 = (t4 + 4U);`
111			`((int )t11) = t2;`
112			`t12 = (t2 == 0);`
113			`if (t12 != 0)`
114			`goto LAB2;`
115
116			`LAB4: t6 = (t5 + 56U);`
117			`t7 = ((char *)t6);`
118			`t6 = (t7 + 0);`
119			`((unsigned char )t6) = (unsigned char)3;`
120
121			`LAB3: t6 = (t5 + 56U);`
122			`t7 = ((char *)t6);`
123			`t12 = ((unsigned char )t7);`
124			`t0 = t12;`
125
126			`LAB1: return t0;`
127			`LAB2: t13 = (t5 + 56U);`
128			`t14 = ((char *)t13);`
129			`t13 = (t14 + 0);`
130			`((unsigned char )t13) = (unsigned char)2;`
131			`goto LAB3;`
132
133			`LAB5:;`
134			`}`
135
136			`static void xilinxcorelib_a_3585000111_2959432447_p_0(char *t0)`
137			`{`
138			`char *t1;`
139			`char *t2;`
140			`unsigned char t3;`
141			`char *t4;`
142			`unsigned char t5;`
143			`unsigned char t6;`
144			`unsigned char t7;`
145			`char *t8;`
146			`char *t9;`
147			`char *t10;`
148			`char *t11;`
149			`char *t12;`
150
151			`LAB0:`
152			`LAB3: t1 = (t0 + 1616U);`
153			`t2 = ((char *)t1);`
154			`t3 = ((unsigned char )t2);`
155			`t1 = (t0 + 6552U);`
156			`t4 = ((char *)t1);`
157			`t5 = ((unsigned char )t4);`
158			`t6 = ieee_p_2592010699_sub_1690584930_503743352(IEEE_P_2592010699, t5);`
159			`t7 = ieee_p_2592010699_sub_2545490612_503743352(IEEE_P_2592010699, t3, t6);`
160			`t1 = (t0 + 10576);`
161			`t8 = (t1 + 56U);`
162			`t9 = ((char *)t8);`
163			`t10 = (t9 + 56U);`
164			`t11 = ((char *)t10);`
165			`((unsigned char )t11) = t7;`
166			`xsi_driver_first_trans_fast(t1);`
167
168			`LAB2: t12 = (t0 + 10400);`
169			`((int )t12) = 1;`
170
171			`LAB1: return;`
172			`LAB4: goto LAB2;`
173
174			`}`
175
176			`static void xilinxcorelib_a_3585000111_2959432447_p_1(char *t0)`
177			`{`
178			`char *t1;`
179			`char *t2;`
180			`unsigned char t3;`
181			`char *t4;`
182			`unsigned char t5;`
183			`unsigned char t6;`
184			`char *t7;`
185			`unsigned char t8;`
186			`unsigned char t9;`
187			`char *t10;`
188			`unsigned char t11;`
189			`unsigned char t12;`
190			`unsigned char t13;`
191			`char *t14;`
192			`char *t15;`
193			`char *t16;`
194			`char *t17;`
195			`char *t18;`
196
197			`LAB0:`
198			`LAB3: t1 = (t0 + 6672U);`
199			`t2 = ((char *)t1);`
200			`t3 = ((unsigned char )t2);`
201			`t1 = (t0 + 1776U);`
202			`t4 = ((char *)t1);`
203			`t5 = ((unsigned char )t4);`
204			`t6 = ieee_p_2592010699_sub_1605435078_503743352(IEEE_P_2592010699, t3, t5);`
205			`t1 = (t0 + 6672U);`
206			`t7 = ((char *)t1);`
207			`t8 = ((unsigned char )t7);`
208			`t9 = ieee_p_2592010699_sub_1690584930_503743352(IEEE_P_2592010699, t8);`
209			`t1 = (t0 + 3856U);`
210			`t10 = ((char *)t1);`
211			`t11 = ((unsigned char )t10);`
212			`t12 = ieee_p_2592010699_sub_1605435078_503743352(IEEE_P_2592010699, t9, t11);`
213			`t13 = ieee_p_2592010699_sub_2545490612_503743352(IEEE_P_2592010699, t6, t12);`
214			`t1 = (t0 + 10640);`
215			`t14 = (t1 + 56U);`
216			`t15 = ((char *)t14);`
217			`t16 = (t15 + 56U);`
218			`t17 = ((char *)t16);`
219			`((unsigned char )t17) = t13;`
220			`xsi_driver_first_trans_fast(t1);`
221
222			`LAB2: t18 = (t0 + 10416);`
223			`((int )t18) = 1;`
224
225			`LAB1: return;`
226			`LAB4: goto LAB2;`
227
228			`}`
229
230			`static void xilinxcorelib_a_3585000111_2959432447_p_2(char *t0)`
231			`{`
232			`char *t1;`
233			`char *t2;`
234			`unsigned char t3;`
235			`char *t4;`
236			`unsigned char t5;`
237			`unsigned char t6;`
238			`char *t7;`
239			`char *t8;`
240			`char *t9;`
241			`char *t10;`
242			`char *t11;`
243
244			`LAB0:`
245			`LAB3: t1 = (t0 + 1456U);`
246			`t2 = ((char *)t1);`
247			`t3 = ((unsigned char )t2);`
248			`t1 = (t0 + 6792U);`
249			`t4 = ((char *)t1);`
250			`t5 = ((unsigned char )t4);`
251			`t6 = ieee_p_2592010699_sub_1605435078_503743352(IEEE_P_2592010699, t3, t5);`
252			`t1 = (t0 + 10704);`
253			`t7 = (t1 + 56U);`
254			`t8 = ((char *)t7);`
255			`t9 = (t8 + 56U);`
256			`t10 = ((char *)t9);`
257			`((unsigned char )t10) = t6;`
258			`xsi_driver_first_trans_fast(t1);`
259
260			`LAB2: t11 = (t0 + 10432);`
261			`((int )t11) = 1;`
262
263			`LAB1: return;`
264			`LAB4: goto LAB2;`
265
266			`}`
267
268			`static void xilinxcorelib_a_3585000111_2959432447_p_3(char *t0)`
269			`{`
270			`char *t1;`
271			`char *t2;`
272			`char *t3;`
273			`char *t4;`
274			`char *t5;`
275			`char *t6;`
276			`char *t7;`
277
278			`LAB0:`
279			`LAB3: t1 = (t0 + 1936U);`
280			`t2 = ((char *)t1);`
281			`t1 = (t0 + 10768);`
282			`t3 = (t1 + 56U);`
283			`t4 = ((char *)t3);`
284			`t5 = (t4 + 56U);`
285			`t6 = ((char *)t5);`
286			`memcpy(t6, t2, 32U);`
287			`xsi_driver_first_trans_fast_port(t1);`
288
289			`LAB2: t7 = (t0 + 10448);`
290			`((int )t7) = 1;`
291
292			`LAB1: return;`
293			`LAB4: goto LAB2;`
294
295			`}`
296
297			`static void xilinxcorelib_a_3585000111_2959432447_p_4(char *t0)`
298			`{`
299			`char *t1;`
300			`char *t2;`
301			`unsigned char t3;`
302			`char *t4;`
303			`char *t5;`
304			`char *t6;`
305			`char *t7;`
306			`char *t8;`
307
308			`LAB0:`
309			`LAB3: t1 = (t0 + 2256U);`
310			`t2 = ((char *)t1);`
311			`t3 = ((unsigned char )t2);`
312			`t1 = (t0 + 10832);`
313			`t4 = (t1 + 56U);`
314			`t5 = ((char *)t4);`
315			`t6 = (t5 + 56U);`
316			`t7 = ((char *)t6);`
317			`((unsigned char )t7) = t3;`
318			`xsi_driver_first_trans_fast_port(t1);`
319
320			`LAB2: t8 = (t0 + 10464);`
321			`((int )t8) = 1;`
322
323			`LAB1: return;`
324			`LAB4: goto LAB2;`
325
326			`}`
327
328			`static void xilinxcorelib_a_3585000111_2959432447_p_5(char *t0)`
329			`{`
330			`char *t1;`
331			`char *t2;`
332			`unsigned char t3;`
333			`char *t4;`
334			`char *t5;`
335			`char *t6;`
336			`char *t7;`
337			`char *t8;`
338
339			`LAB0:`
340			`LAB3: t1 = (t0 + 2416U);`
341			`t2 = ((char *)t1);`
342			`t3 = ((unsigned char )t2);`
343			`t1 = (t0 + 10896);`
344			`t4 = (t1 + 56U);`
345			`t5 = ((char *)t4);`
346			`t6 = (t5 + 56U);`
347			`t7 = ((char *)t6);`
348			`((unsigned char )t7) = t3;`
349			`xsi_driver_first_trans_fast_port(t1);`
350
351			`LAB2: t8 = (t0 + 10480);`
352			`((int )t8) = 1;`
353
354			`LAB1: return;`
355			`LAB4: goto LAB2;`
356
357			`}`
358
359			`static void xilinxcorelib_a_3585000111_2959432447_p_6(char *t0)`
360			`{`
361			`char *t1;`
362			`char *t2;`
363			`char *t3;`
364			`char *t4;`
365			`char *t5;`
366			`char *t6;`
367			`char *t7;`
368
369			`LAB0:`
370			`LAB3: t1 = (t0 + 2896U);`
371			`t2 = ((char *)t1);`
372			`t1 = (t0 + 10960);`
373			`t3 = (t1 + 56U);`
374			`t4 = ((char *)t3);`
375			`t5 = (t4 + 56U);`
376			`t6 = ((char *)t5);`
377			`memcpy(t6, t2, 8U);`
378			`xsi_driver_first_trans_fast_port(t1);`
379
380			`LAB2: t7 = (t0 + 10496);`
381			`((int )t7) = 1;`
382
383			`LAB1: return;`
384			`LAB4: goto LAB2;`
385
386			`}`
387
388
389			`extern void xilinxcorelib_a_3585000111_2959432447_init()`
390			`{`
391			`static char pe[] = {(void )xilinxcorelib_a_3585000111_2959432447_p_0,(void )xilinxcorelib_a_3585000111_2959432447_p_1,(void )xilinxcorelib_a_3585000111_2959432447_p_2,(void )xilinxcorelib_a_3585000111_2959432447_p_3,(void )xilinxcorelib_a_3585000111_2959432447_p_4,(void )xilinxcorelib_a_3585000111_2959432447_p_5,(void )xilinxcorelib_a_3585000111_2959432447_p_6};`
392			`static char se[] = {(void )xilinxcorelib_a_3585000111_2959432447_sub_1430772697_1702280263,(void *)xilinxcorelib_a_3585000111_2959432447_sub_4126348946_1702280263};`
393			`xsi_register_didat("xilinxcorelib_a_3585000111_2959432447", "isim/testbench_isim_beh.exe.sim/xilinxcorelib/a_3585000111_2959432447.didat");`
394			`xsi_register_executes(pe);`
395			`xsi_register_subprogram_executes(se);`
396			`}`