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[/] [xmatchpro/] [trunk/] [xmw4-comdec/] [xmatch_sim7/] [src/] [PIPELINE_R1_D.vhd] - Blame information for rev 9

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1 9 eejlny
--This library is free software; you can redistribute it and/or
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--modify it under the terms of the GNU Lesser General Public
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--License as published by the Free Software Foundation; either
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--version 2.1 of the License, or (at your option) any later version.
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--This library is distributed in the hope that it will be useful,
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--but WITHOUT ANY WARRANTY; without even the implied warranty of
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--MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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--Lesser General Public License for more details.
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--You should have received a copy of the GNU Lesser General Public
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--License along with this library; if not, write to the Free Software
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--Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA
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-- e_mail : j.l.nunez-yanez@byacom.co.uk
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--------------------------------------
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--  ENTITY       = PIPELINE_R1_D      --
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--  version      = 1.0              --
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--  last update  = 1/08/99          --
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--  author       = Jose Nunez       --
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--------------------------------------
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-- FUNCTION
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-- pipeline R1_D for decompression
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library IEEE;
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use IEEE.std_logic_1164.all;
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entity PIPELINE_R1_D is
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                port(
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                        FULL_HIT_IN:in bit;
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                        MATCH_TYPE_IN:in bit_vector(3 downto 0);
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                        MATCH_LOC_IN:in bit_vector(3 downto 0);
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                        LIT_DATA_IN:in bit_vector(31 downto 0);
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                        LIT_MASK_IN : in bit_vector(4 downto 0);
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                        MOVE_ENABLE_D_IN:in bit;
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                        CLEAR:in bit;
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                        RESET : in bit;
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                        CLK:in bit;
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                        FULL_HIT_OUT:out bit;
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                        MATCH_TYPE_OUT:out bit_vector(3 downto 0);
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                        MATCH_LOC_OUT:out bit_vector(3 downto 0);
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                        LIT_DATA_OUT:out bit_vector(31 downto 0);
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                        LIT_MASK_OUT : out bit_vector(4 downto 0);
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                        MOVE_ENABLE_D_OUT:out bit
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                );
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end PIPELINE_R1_D;
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architecture STRUCTURAL of PIPELINE_R1_D is
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signal MOVE_ENABLE_D_OUT_aux : bit;
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begin
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  process(CLK,CLEAR)
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  begin
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    if (CLEAR='0') then
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                MOVE_ENABLE_D_OUT_aux<='1';
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    elsif ((CLK'event) and (CLK='1')) then
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                 if (RESET='0') then
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                            MOVE_ENABLE_D_OUT_aux<='1';
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         else
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                            MOVE_ENABLE_D_OUT_aux<=MOVE_ENABLE_D_IN;
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                 end if;
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    end if;
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 end process;
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 MOVE_ENABLE_D_OUT<=MOVE_ENABLE_D_OUT_aux;
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 FULL_HIT_OUT<=FULL_HIT_IN;
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 MATCH_TYPE_OUT<=MATCH_TYPE_IN;
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 MATCH_LOC_OUT<=MATCH_LOC_IN;
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 LIT_DATA_OUT<=LIT_DATA_IN;
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 LIT_MASK_OUT<= LIT_MASK_IN;
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end structural;
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