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[/] [z80control/] [trunk/] [CII_Starter_USB_API_v1/] [HW/] [CII_Starter_USB_API_assignment_defaults.qdf] - Blame information for rev 12

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Line No. Rev Author Line
1 12 tylerapohl
set_global_assignment -name EQC_BBOX_MERGE On
2
set_global_assignment -name EQC_LVDS_MERGE On
3
set_global_assignment -name EQC_RAM_UNMERGING On
4
set_global_assignment -name EQC_DFF_SS_EMULATION On
5
set_global_assignment -name EQC_IO_BUFFER_CONVERSION On
6
set_global_assignment -name EQC_RAM_REGISTER_UNPACK On
7
set_global_assignment -name EQC_MAC_REGISTER_UNPACK On
8
set_global_assignment -name EQC_SET_PARTITION_BB_TO_VCC_GND On
9
set_global_assignment -name EQC_STRUCTURE_MATCHING On
10
set_global_assignment -name EQC_AUTO_BREAK_CONE On
11
set_global_assignment -name EQC_POWER_UP_COMPARE Off
12
set_global_assignment -name EQC_AUTO_COMP_LOOP_CUT On
13
set_global_assignment -name EQC_AUTO_INVERSION On
14
set_global_assignment -name EQC_AUTO_TERMINATE On
15
set_global_assignment -name EQC_SUB_CONE_REPORT Off
16
set_global_assignment -name EQC_RENAMING_RULES On
17
set_global_assignment -name EQC_PARAMETER_CHECK On
18
set_global_assignment -name EQC_AUTO_PORTSWAP On
19
set_global_assignment -name EQC_DETECT_DONT_CARES On
20
set_global_assignment -name NUMBER_OF_SOURCES_PER_DESTINATION_TO_REPORT 10
21
set_global_assignment -name NUMBER_OF_DESTINATION_TO_REPORT 10
22
set_global_assignment -name NUMBER_OF_PATHS_TO_REPORT 200
23
set_global_assignment -name DO_MIN_ANALYSIS -value OFF
24
set_global_assignment -name DO_MIN_TIMING Off
25
set_global_assignment -name REPORT_IO_PATHS_SEPARATELY Off
26
set_global_assignment -name FLOW_ENABLE_TIMING_CONSTRAINT_CHECK Off
27
set_global_assignment -name DEFAULT_HOLD_MULTICYCLE "Same as Multicycle"
28
set_global_assignment -name CUT_OFF_PATHS_BETWEEN_CLOCK_DOMAINS On
29
set_global_assignment -name CUT_OFF_READ_DURING_WRITE_PATHS On
30
set_global_assignment -name CUT_OFF_IO_PIN_FEEDBACK On
31
set_global_assignment -name DO_COMBINED_ANALYSIS Off
32
set_global_assignment -name IGNORE_CLOCK_SETTINGS Off
33
set_global_assignment -name ANALYZE_LATCHES_AS_SYNCHRONOUS_ELEMENTS -value ON
34
set_global_assignment -name ENABLE_RECOVERY_REMOVAL_ANALYSIS Off
35
set_global_assignment -name ENABLE_CLOCK_LATENCY Off
36
set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER Off
37
set_global_assignment -name START_TIME 0ns
38
set_global_assignment -name SIMULATION_MODE TIMING
39
set_global_assignment -name AUTO_USE_SIMULATION_PDB_NETLIST Off
40
set_global_assignment -name ADD_DEFAULT_PINS_TO_SIMULATION_OUTPUT_WAVEFORMS On
41
set_global_assignment -name SETUP_HOLD_DETECTION Off
42
set_global_assignment -name SETUP_HOLD_DETECTION_INPUT_REGISTERS_BIDIR_PINS_DISABLED Off
43
set_global_assignment -name CHECK_OUTPUTS Off
44
set_global_assignment -name SIMULATION_COVERAGE On
45
set_global_assignment -name SIMULATION_COMPLETE_COVERAGE_REPORT_PANEL On
46
set_global_assignment -name SIMULATION_MISSING_1_VALUE_COVERAGE_REPORT_PANEL On
47
set_global_assignment -name SIMULATION_MISSING_0_VALUE_COVERAGE_REPORT_PANEL On
48
set_global_assignment -name GLITCH_DETECTION Off
49
set_global_assignment -name GLITCH_INTERVAL 1ns
50
set_global_assignment -name SIMULATOR_GENERATE_SIGNAL_ACTIVITY_FILE Off
51
set_global_assignment -name SIMULATION_WITH_GLITCH_FILTERING_WHEN_GENERATING_SAF -value ON
52
set_global_assignment -name SIMULATION_BUS_CHANNEL_GROUPING Off
53
set_global_assignment -name SIMULATION_VDB_RESULT_FLUSH On
54
set_global_assignment -name VECTOR_COMPARE_TRIGGER_MODE INPUT_EDGE
55
set_global_assignment -name SIMULATION_NETLIST_VIEWER Off
56
set_global_assignment -name SIMULATION_WITH_GLITCH_FILTERING_IN_NORMAL_FLOW Off
57
set_global_assignment -name SIGNALPROBE_ALLOW_OVERUSE Off
58
set_global_assignment -name SIGNALPROBE_DURING_NORMAL_COMPILATION Off
59
set_global_assignment -name PROJECT_SHOW_ENTITY_NAME On
60
set_global_assignment -name VER_COMPATIBLE_DB_DIR export_db
61
set_global_assignment -name AUTO_EXPORT_VER_COMPATIBLE_DB Off
62
set_global_assignment -name SMART_RECOMPILE -value OFF
63
set_global_assignment -name FLOW_DISABLE_ASSEMBLER Off
64
set_global_assignment -name FLOW_ENABLE_HCII_COMPARE Off
65
set_global_assignment -name HCII_OUTPUT_DIR hc_output
66
set_global_assignment -name SAVE_MIGRATION_INFO_DURING_COMPILATION Off
67
set_global_assignment -name FLOW_ENABLE_IO_ASSIGNMENT_ANALYSIS Off
68
set_global_assignment -name RUN_FULL_COMPILE_ON_DEVICE_CHANGE On
69
set_global_assignment -name MERGE_HEX_FILE Off
70
set_global_assignment -name GENERATE_SVF_FILE Off
71
set_global_assignment -name GENERATE_ISC_FILE Off
72
set_global_assignment -name GENERATE_JAM_FILE Off
73
set_global_assignment -name GENERATE_JBC_FILE Off
74
set_global_assignment -name GENERATE_JBC_FILE_COMPRESSED On
75
set_global_assignment -name GENERATE_CONFIG_SVF_FILE Off
76
set_global_assignment -name GENERATE_CONFIG_ISC_FILE Off
77
set_global_assignment -name GENERATE_CONFIG_JAM_FILE Off
78
set_global_assignment -name GENERATE_CONFIG_JBC_FILE Off
79
set_global_assignment -name GENERATE_CONFIG_JBC_FILE_COMPRESSED On
80
set_global_assignment -name GENERATE_CONFIG_HEXOUT_FILE Off
81
set_global_assignment -name ISP_CLAMP_STATE_DEFAULT "Tri-state"
82
set_global_assignment -name POWER_DEFAULT_TOGGLE_RATE 12.5%
83
set_global_assignment -name POWER_DEFAULT_INPUT_IO_TOGGLE_RATE 12.5%
84
set_global_assignment -name POWER_USE_PVA On
85
set_global_assignment -name POWER_USE_INPUT_FILE "No File"
86
set_global_assignment -name POWER_USE_INPUT_FILES Off
87
set_global_assignment -name POWER_VCD_FILTER_GLITCHES On
88
set_global_assignment -name POWER_REPORT_SIGNAL_ACTIVITY On
89
set_global_assignment -name POWER_REPORT_POWER_DISSIPATION On
90
set_global_assignment -name POWER_USE_DEVICE_CHARACTERISTICS TYPICAL
91
set_global_assignment -name POWER_USE_VOLTAGE NOMINAL
92
set_global_assignment -name POWER_AUTO_COMPUTE_TJ On
93
set_global_assignment -name POWER_TJ_VALUE 25
94
set_global_assignment -name POWER_USE_TA_VALUE 25
95
set_global_assignment -name POWER_USE_CUSTOM_COOLING_SOLUTION Off
96
set_global_assignment -name POWER_BOARD_TEMPERATURE 25
97
set_global_assignment -name EDA_SIMULATION_TOOL ""
98
set_global_assignment -name EDA_TIMING_ANALYSIS_TOOL ""
99
set_global_assignment -name EDA_BOARD_DESIGN_TIMING_TOOL ""
100
set_global_assignment -name EDA_BOARD_DESIGN_SYMBOL_TOOL ""
101
set_global_assignment -name EDA_BOARD_DESIGN_SIGNAL_INTEGRITY_TOOL ""
102
set_global_assignment -name EDA_BOARD_DESIGN_TOOL ""
103
set_global_assignment -name EDA_FORMAL_VERIFICATION_TOOL ""
104
set_global_assignment -name EDA_RESYNTHESIS_TOOL ""
105
set_global_assignment -name EDA_SIMULATION_VCD_OUTPUT_TCL_FILE Off
106
set_global_assignment -name EDA_SIMULATION_VCD_OUTPUT_SIGNALS_TO_TCL_FILE "All Except Combinational Logic Element Outputs"
107
set_global_assignment -name MUX_RESTRUCTURE AUTO
108
set_global_assignment -name ENABLE_IP_DEBUG Off
109
set_global_assignment -name SAVE_DISK_SPACE On
110
set_global_assignment -name DISABLE_OCP_HW_EVAL Off
111
set_global_assignment -name DEVICE_FILTER_PACKAGE Any
112
set_global_assignment -name DEVICE_FILTER_PIN_COUNT Any
113
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE Any
114
set_global_assignment -name EDA_DESIGN_ENTRY_SYNTHESIS_TOOL ""
115
set_global_assignment -name VERILOG_INPUT_VERSION Verilog_2001
116
set_global_assignment -name VHDL_INPUT_VERSION VHDL93
117
set_global_assignment -name FAMILY Stratix
118
set_global_assignment -name TRUE_WYSIWYG_FLOW Off
119
set_global_assignment -name SMART_COMPILE_IGNORES_TDC_FOR_STRATIX_PLL_CHANGES Off
120
set_global_assignment -name STATE_MACHINE_PROCESSING Auto
121
set_global_assignment -name EXTRACT_VERILOG_STATE_MACHINES On
122
set_global_assignment -name EXTRACT_VHDL_STATE_MACHINES On
123
set_global_assignment -name ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS On
124
set_global_assignment -name DSP_BLOCK_BALANCING Auto
125
set_global_assignment -name MAX_BALANCING_DSP_BLOCKS "-1"
126
set_global_assignment -name NOT_GATE_PUSH_BACK On
127
set_global_assignment -name ALLOW_POWER_UP_DONT_CARE On
128
set_global_assignment -name REMOVE_REDUNDANT_LOGIC_CELLS Off
129
set_global_assignment -name REMOVE_DUPLICATE_REGISTERS On
130
set_global_assignment -name IGNORE_CARRY_BUFFERS Off
131
set_global_assignment -name IGNORE_CASCADE_BUFFERS Off
132
set_global_assignment -name IGNORE_GLOBAL_BUFFERS Off
133
set_global_assignment -name IGNORE_ROW_GLOBAL_BUFFERS Off
134
set_global_assignment -name IGNORE_LCELL_BUFFERS Off
135
set_global_assignment -name MAX7000_IGNORE_LCELL_BUFFERS AUTO
136
set_global_assignment -name IGNORE_SOFT_BUFFERS On
137
set_global_assignment -name MAX7000_IGNORE_SOFT_BUFFERS Off
138
set_global_assignment -name LIMIT_AHDL_INTEGERS_TO_32_BITS Off
139
set_global_assignment -name AUTO_GLOBAL_CLOCK_MAX On
140
set_global_assignment -name AUTO_GLOBAL_OE_MAX On
141
set_global_assignment -name MAX_AUTO_GLOBAL_REGISTER_CONTROLS On
142
set_global_assignment -name AUTO_IMPLEMENT_IN_ROM Off
143
set_global_assignment -name APEX20K_TECHNOLOGY_MAPPER Lut
144
set_global_assignment -name STRATIXII_OPTIMIZATION_TECHNIQUE Balanced
145
set_global_assignment -name CYCLONE_OPTIMIZATION_TECHNIQUE Balanced
146
set_global_assignment -name CYCLONEII_OPTIMIZATION_TECHNIQUE Balanced
147
set_global_assignment -name STRATIX_OPTIMIZATION_TECHNIQUE Balanced
148
set_global_assignment -name MAXII_OPTIMIZATION_TECHNIQUE Balanced
149
set_global_assignment -name MAX7000_OPTIMIZATION_TECHNIQUE Speed
150
set_global_assignment -name APEX20K_OPTIMIZATION_TECHNIQUE Balanced
151
set_global_assignment -name MERCURY_OPTIMIZATION_TECHNIQUE Area
152
set_global_assignment -name FLEX6K_OPTIMIZATION_TECHNIQUE Area
153
set_global_assignment -name FLEX10K_OPTIMIZATION_TECHNIQUE Area
154
set_global_assignment -name ALLOW_XOR_GATE_USAGE On
155
set_global_assignment -name AUTO_LCELL_INSERTION On
156
set_global_assignment -name CARRY_CHAIN_LENGTH 48
157
set_global_assignment -name FLEX6K_CARRY_CHAIN_LENGTH 32
158
set_global_assignment -name FLEX10K_CARRY_CHAIN_LENGTH 32
159
set_global_assignment -name MERCURY_CARRY_CHAIN_LENGTH 48
160
set_global_assignment -name STRATIX_CARRY_CHAIN_LENGTH 70
161
set_global_assignment -name STRATIXII_CARRY_CHAIN_LENGTH 70
162
set_global_assignment -name CASCADE_CHAIN_LENGTH 2
163
set_global_assignment -name PARALLEL_EXPANDER_CHAIN_LENGTH 16
164
set_global_assignment -name MAX7000_PARALLEL_EXPANDER_CHAIN_LENGTH 4
165
set_global_assignment -name AUTO_CARRY_CHAINS On
166
set_global_assignment -name AUTO_CASCADE_CHAINS On
167
set_global_assignment -name AUTO_PARALLEL_EXPANDERS On
168
set_global_assignment -name AUTO_OPEN_DRAIN_PINS On
169
set_global_assignment -name REMOVE_DUPLICATE_LOGIC On
170
set_global_assignment -name ADV_NETLIST_OPT_SYNTH_WYSIWYG_REMAP Off
171
set_global_assignment -name ADV_NETLIST_OPT_SYNTH_GATE_RETIME Off
172
set_global_assignment -name ADV_NETLIST_OPT_RETIME_CORE_AND_IO On
173
set_global_assignment -name AUTO_ROM_RECOGNITION On
174
set_global_assignment -name AUTO_RAM_RECOGNITION On
175
set_global_assignment -name AUTO_DSP_RECOGNITION On
176
set_global_assignment -name AUTO_SHIFT_REGISTER_RECOGNITION On
177
set_global_assignment -name AUTO_CLOCK_ENABLE_RECOGNITION On
178
set_global_assignment -name ALLOW_SYNCH_CTRL_USAGE On
179
set_global_assignment -name FORCE_SYNCH_CLEAR Off
180
set_global_assignment -name AUTO_RAM_BLOCK_BALANCING On
181
set_global_assignment -name AUTO_RESOURCE_SHARING Off
182
set_global_assignment -name ALLOW_ANY_RAM_SIZE_FOR_RECOGNITION Off
183
set_global_assignment -name ALLOW_ANY_ROM_SIZE_FOR_RECOGNITION Off
184
set_global_assignment -name ALLOW_ANY_SHIFT_REGISTER_SIZE_FOR_RECOGNITION Off
185
set_global_assignment -name MAX7000_FANIN_PER_CELL 100
186
set_global_assignment -name IGNORE_DUPLICATE_DESIGN_ENTITY Off
187
set_global_assignment -name MAX_RAM_BLOCKS_M512 "-1"
188
set_global_assignment -name MAX_RAM_BLOCKS_M4K "-1"
189
set_global_assignment -name MAX_RAM_BLOCKS_MRAM "-1"
190
set_global_assignment -name IGNORE_TRANSLATE_OFF Off
191
set_global_assignment -name STRATIXGX_BYPASS_REMAPPING_OF_FORCE_SIGNAL_DETECT_SIGNAL_THRESHOLD_SELECT Off
192
set_global_assignment -name SHOW_PARAMETER_SETTINGS_TABLES_IN_SYNTHESIS_REPORT On
193
set_global_assignment -name IGNORE_MAX_FANOUT_ASSIGNMENTS Off
194
set_global_assignment -name ADV_NETLIST_OPT_METASTABLE_REGS 2
195
set_global_assignment -name OPTIMIZE_POWER_DURING_SYNTHESIS "Normal compilation"
196
set_global_assignment -name HDL_MESSAGE_LEVEL Level2
197
set_global_assignment -name LOGICLOCK_INCREMENTAL_COMPILE_ASSIGNMENT Off
198
set_global_assignment -name INCREMENTAL_COMPILATION Off
199
set_global_assignment -name AUTO_EXPORT_INCREMENTAL_COMPILATION Off
200
set_global_assignment -name INCREMENTAL_COMPILATION_EXPORT_NETLIST_TYPE POST_FIT
201
set_global_assignment -name ROUTER_TIMING_OPTIMIZATION_LEVEL Normal
202
set_global_assignment -name PLACEMENT_EFFORT_MULTIPLIER 1.0
203
set_global_assignment -name ROUTER_EFFORT_MULTIPLIER 1.0
204
set_global_assignment -name ECO_ALLOW_ROUTING_CHANGES Off
205
set_global_assignment -name DEVICE AUTO
206
set_global_assignment -name BASE_PIN_OUT_FILE_ON_SAMEFRAME_DEVICE Off
207
set_global_assignment -name ENABLE_JTAG_BST_SUPPORT Off
208
set_global_assignment -name MAX7000_ENABLE_JTAG_BST_SUPPORT On
209
set_global_assignment -name RESERVE_NCEO_AFTER_CONFIGURATION "Use as regular IO"
210
set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "Use as programming pin"
211
set_global_assignment -name STRATIX_UPDATE_MODE Standard
212
set_global_assignment -name STRATIXII_CONFIGURATION_SCHEME "Passive Serial"
213
set_global_assignment -name CYCLONEII_CONFIGURATION_SCHEME "Active Serial"
214
set_global_assignment -name APEX20K_CONFIGURATION_SCHEME "Passive Serial"
215
set_global_assignment -name STRATIX_CONFIGURATION_SCHEME "Passive Serial"
216
set_global_assignment -name CYCLONE_CONFIGURATION_SCHEME "Active Serial"
217
set_global_assignment -name MERCURY_CONFIGURATION_SCHEME "Passive Serial"
218
set_global_assignment -name FLEX6K_CONFIGURATION_SCHEME "Passive Serial"
219
set_global_assignment -name FLEX10K_CONFIGURATION_SCHEME "Passive Serial"
220
set_global_assignment -name APEXII_CONFIGURATION_SCHEME "Passive Serial"
221
set_global_assignment -name USER_START_UP_CLOCK Off
222
set_global_assignment -name ENABLE_VREFA_PIN Off
223
set_global_assignment -name ENABLE_VREFB_PIN Off
224
set_global_assignment -name ENABLE_DEVICE_WIDE_RESET Off
225
set_global_assignment -name ENABLE_DEVICE_WIDE_OE Off
226
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "As output driving ground"
227
set_global_assignment -name FLEX10K_ENABLE_LOCK_OUTPUT Off
228
set_global_assignment -name ENABLE_INIT_DONE_OUTPUT Off
229
set_global_assignment -name RESERVE_NWS_NRS_NCS_CS_AFTER_CONFIGURATION "Use as regular IO"
230
set_global_assignment -name RESERVE_RDYNBUSY_AFTER_CONFIGURATION "Use as regular IO"
231
set_global_assignment -name RESERVE_DATA7_THROUGH_DATA1_AFTER_CONFIGURATION "Use as regular IO"
232
set_global_assignment -name RESERVE_DATA0_AFTER_CONFIGURATION "As input tri-stated"
233
set_global_assignment -name RESERVE_ASDO_AFTER_CONFIGURATION "Use as regular IO"
234
set_global_assignment -name CRC_ERROR_CHECKING Off
235
set_global_assignment -name OPTIMIZE_HOLD_TIMING "IO Paths and Minimum TPD Paths"
236
set_global_assignment -name OPTIMIZE_FAST_CORNER_TIMING Off
237
set_global_assignment -name GUARANTEE_MIN_DELAY_CORNER_IO_ZERO_HOLD_TIME On
238
set_global_assignment -name OPTIMIZE_POWER_DURING_FITTING "Normal compilation"
239
set_global_assignment -name OPTIMIZE_TIMING "Normal compilation"
240
set_global_assignment -name OPTIMIZE_IOC_REGISTER_PLACEMENT_FOR_TIMING On
241
set_global_assignment -name FIT_ONLY_ONE_ATTEMPT Off
242
set_global_assignment -name FINAL_PLACEMENT_OPTIMIZATION Automatically
243
set_global_assignment -name FITTER_AGGRESSIVE_ROUTABILITY_OPTIMIZATION Automatically
244
set_global_assignment -name SEED 1
245
set_global_assignment -name SLOW_SLEW_RATE Off
246
set_global_assignment -name PCI_IO Off
247
set_global_assignment -name TURBO_BIT On
248
set_global_assignment -name WEAK_PULL_UP_RESISTOR Off
249
set_global_assignment -name ENABLE_BUS_HOLD_CIRCUITRY Off
250
set_global_assignment -name AUTO_GLOBAL_MEMORY_CONTROLS Off
251
set_global_assignment -name MIGRATION_CONSTRAIN_CORE_RESOURCES On
252
set_global_assignment -name AUTO_PACKED_REGISTERS_STRATIXII AUTO
253
set_global_assignment -name AUTO_PACKED_REGISTERS_MAXII AUTO
254
set_global_assignment -name AUTO_PACKED_REGISTERS_CYCLONE Auto
255
set_global_assignment -name AUTO_PACKED_REGISTERS Off
256
set_global_assignment -name AUTO_PACKED_REGISTERS_STRATIX AUTO
257
set_global_assignment -name NORMAL_LCELL_INSERT On
258
set_global_assignment -name CARRY_OUT_PINS_LCELL_INSERT On
259
set_global_assignment -name AUTO_DELAY_CHAINS On
260
set_global_assignment -name AUTO_MERGE_PLLS On
261
set_global_assignment -name IGNORE_MODE_FOR_MERGE Off
262
set_global_assignment -name AUTO_TURBO_BIT ON
263
set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC Off
264
set_global_assignment -name PHYSICAL_SYNTHESIS_LOG_FILE Off
265
set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION Off
266
set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING Off
267
set_global_assignment -name PHYSICAL_SYNTHESIS_ASYNCHRONOUS_SIGNAL_PIPELINING Off
268
set_global_assignment -name IO_PLACEMENT_OPTIMIZATION On
269
set_global_assignment -name ALLOW_LVTTL_LVCMOS_INPUT_LEVELS_TO_OVERDRIVE_INPUT_BUFFER Off
270
set_global_assignment -name OVERRIDE_DEFAULT_ELECTROMIGRATION_PARAMETERS Off
271
set_global_assignment -name FITTER_EFFORT -value "AUTO FIT"
272
set_global_assignment -name FITTER_AUTO_EFFORT_DESIRED_SLACK_MARGIN 0ns
273
set_global_assignment -name PHYSICAL_SYNTHESIS_EFFORT Normal
274
set_global_assignment -name ROUTER_LCELL_INSERTION_AND_LOGIC_DUPLICATION AUTO
275
set_global_assignment -name ROUTER_REGISTER_DUPLICATION AUTO
276
set_global_assignment -name STRATIXGX_ALLOW_CLOCK_FANOUT_WITH_ANALOG_RESET Off
277
set_global_assignment -name AUTO_GLOBAL_CLOCK On
278
set_global_assignment -name AUTO_GLOBAL_OE On
279
set_global_assignment -name AUTO_GLOBAL_REGISTER_CONTROLS On
280
set_global_assignment -name FITTER_EARLY_TIMING_ESTIMATE_MODE Realistic
281
set_global_assignment -name STRATIXGX_ALLOW_GIGE_UNDER_FULL_DATARATE_RANGE Off
282
set_global_assignment -name STRATIXGX_ALLOW_RX_CORECLK_FROM_NON_RX_CLKOUT_SOURCE_IN_DOUBLE_DATA_WIDTH_MODE Off
283
set_global_assignment -name STRATIXGX_ALLOW_GIGE_IN_DOUBLE_DATA_WIDTH_MODE Off
284
set_global_assignment -name STRATIXGX_ALLOW_PARALLEL_LOOPBACK_IN_DOUBLE_DATA_WIDTH_MODE Off
285
set_global_assignment -name STRATIXGX_ALLOW_XAUI_IN_SINGLE_DATA_WIDTH_MODE Off
286
set_global_assignment -name STRATIXGX_ALLOW_XAUI_WITH_CORECLK_SELECTED_AT_RATE_MATCHER Off
287
set_global_assignment -name STRATIXGX_ALLOW_XAUI_WITH_RX_CORECLK_FROM_NON_TXPLL_SOURCE Off
288
set_global_assignment -name STRATIXGX_ALLOW_GIGE_WITH_CORECLK_SELECTED_AT_RATE_MATCHER Off
289
set_global_assignment -name STRATIXGX_ALLOW_GIGE_WITHOUT_8B10B Off
290
set_global_assignment -name STRATIXGX_ALLOW_GIGE_WITH_RX_CORECLK_FROM_NON_TXPLL_SOURCE Off
291
set_global_assignment -name STRATIXGX_ALLOW_POST8B10B_LOOPBACK Off
292
set_global_assignment -name STRATIXGX_ALLOW_REVERSE_PARALLEL_LOOPBACK Off
293
set_global_assignment -name STRATIXGX_ALLOW_USE_OF_GXB_COUPLED_IOS Off
294
set_global_assignment -name DRC_REPORT_TOP_FANOUT On
295
set_global_assignment -name DRC_TOP_FANOUT 50
296
set_global_assignment -name DRC_REPORT_FANOUT_EXCEEDING On
297
set_global_assignment -name DRC_FANOUT_EXCEEDING 30
298
set_global_assignment -name SIGNALRACE_RULE_TRISTATE On
299
set_global_assignment -name SIGNALRACE_RULE_RESET_RACE On
300
set_global_assignment -name HCPY_PLL_MULTIPLE_CLK_NETWORK_TYPES On
301
set_global_assignment -name NONSYNCHSTRUCT_RULE_ASYN_RAM On
302
set_global_assignment -name HARDCOPY_FLOW_AUTOMATION MIGRATION_ONLY
303
set_global_assignment -name ENABLE_DRC_SETTINGS Off
304
set_global_assignment -name CLK_CAT On
305
set_global_assignment -name CLK_RULE_COMB_CLOCK On
306
set_global_assignment -name CLK_RULE_INV_CLOCK On
307
set_global_assignment -name CLK_RULE_GATING_SCHEME On
308
set_global_assignment -name CLK_RULE_INPINS_CLKNET On
309
set_global_assignment -name CLK_RULE_CLKNET_CLKSPINES On
310
set_global_assignment -name CLK_RULE_CLKNET_CLKSPINES_THRESHOLD 25
311
set_global_assignment -name CLK_RULE_MIX_EDGES On
312
set_global_assignment -name RESET_CAT On
313
set_global_assignment -name RESET_RULE_UNSYNCH_EXRESET On
314
set_global_assignment -name RESET_RULE_IMSYNCH_EXRESET On
315
set_global_assignment -name RESET_RULE_COMB_ASYNCH_RESET On
316
set_global_assignment -name RESET_RULE_UNSYNCH_ASYNCH_DOMAIN On
317
set_global_assignment -name RESET_RULE_IMSYNCH_ASYNCH_DOMAIN On
318
set_global_assignment -name TIMING_CAT On
319
set_global_assignment -name NONSYNCHSTRUCT_RULE_COMB_DRIVES_RAM_WE On
320
set_global_assignment -name NONSYNCHSTRUCT_CAT On
321
set_global_assignment -name NONSYNCHSTRUCT_RULE_COMBLOOP On
322
set_global_assignment -name NONSYNCHSTRUCT_RULE_REG_LOOP On
323
set_global_assignment -name NONSYNCHSTRUCT_RULE_DELAY_CHAIN On
324
set_global_assignment -name NONSYNCHSTRUCT_RULE_RIPPLE_CLK On
325
set_global_assignment -name NONSYNCHSTRUCT_RULE_ILLEGAL_PULSE_GEN On
326
set_global_assignment -name NONSYNCHSTRUCT_RULE_MULTI_VIBRATOR On
327
set_global_assignment -name NONSYNCHSTRUCT_RULE_SRLATCH On
328
set_global_assignment -name NONSYNCHSTRUCT_RULE_LATCH_UNIDENTIFIED On
329
set_global_assignment -name SIGNALRACE_CAT On
330
set_global_assignment -name ACLK_CAT On
331
set_global_assignment -name ACLK_RULE_NO_SZER_ACLK_DOMAIN On
332
set_global_assignment -name ACLK_RULE_SZER_BTW_ACLK_DOMAIN On
333
set_global_assignment -name ACLK_RULE_IMSZER_ADOMAIN On
334
set_global_assignment -name HCPY_CAT On
335
set_global_assignment -name HCPY_VREF_PINS On
336
set_global_assignment -name ON_CHIP_BITSTREAM_DECOMPRESSION On
337
set_global_assignment -name COMPRESSION_MODE Off
338
set_global_assignment -name CLOCK_SOURCE Internal
339
set_global_assignment -name CONFIGURATION_CLOCK_FREQUENCY "10 MHz"
340
set_global_assignment -name CONFIGURATION_CLOCK_DIVISOR 1
341
set_global_assignment -name ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE On
342
set_global_assignment -name FLEX6K_ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE Off
343
set_global_assignment -name FLEX10K_ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE On
344
set_global_assignment -name MAX7000S_JTAG_USER_CODE FFFF
345
set_global_assignment -name STRATIX_JTAG_USER_CODE FFFFFFFF
346
set_global_assignment -name APEX20K_JTAG_USER_CODE FFFFFFFF
347
set_global_assignment -name MERCURY_JTAG_USER_CODE FFFFFFFF
348
set_global_assignment -name FLEX10K_JTAG_USER_CODE 7F
349
set_global_assignment -name MAX7000_JTAG_USER_CODE FFFFFFFF
350
set_global_assignment -name MAX7000_USE_CHECKSUM_AS_USERCODE Off
351
set_global_assignment -name USE_CHECKSUM_AS_USERCODE Off
352
set_global_assignment -name SECURITY_BIT Off
353
set_global_assignment -name USE_CONFIGURATION_DEVICE On
354
set_global_assignment -name STRATIXII_CONFIGURATION_DEVICE Auto
355
set_global_assignment -name APEX20K_CONFIGURATION_DEVICE Auto
356
set_global_assignment -name MERCURY_CONFIGURATION_DEVICE Auto
357
set_global_assignment -name FLEX6K_CONFIGURATION_DEVICE Auto
358
set_global_assignment -name FLEX10K_CONFIGURATION_DEVICE Auto
359
set_global_assignment -name CYCLONE_CONFIGURATION_DEVICE Auto
360
set_global_assignment -name STRATIX_CONFIGURATION_DEVICE Auto
361
set_global_assignment -name APEX20K_CONFIG_DEVICE_JTAG_USER_CODE FFFFFFFF
362
set_global_assignment -name STRATIX_CONFIG_DEVICE_JTAG_USER_CODE FFFFFFFF
363
set_global_assignment -name MERCURY_CONFIG_DEVICE_JTAG_USER_CODE FFFFFFFF
364
set_global_assignment -name FLEX10K_CONFIG_DEVICE_JTAG_USER_CODE FFFFFFFF
365
set_global_assignment -name EPROM_USE_CHECKSUM_AS_USERCODE Off
366
set_global_assignment -name AUTO_INCREMENT_CONFIG_DEVICE_JTAG_USER_CODE On
367
set_global_assignment -name DISABLE_NCS_AND_OE_PULLUPS_ON_CONFIG_DEVICE Off
368
set_global_assignment -name GENERATE_TTF_FILE Off
369
set_global_assignment -name GENERATE_RBF_FILE Off
370
set_global_assignment -name GENERATE_HEX_FILE Off
371
set_global_assignment -name HEXOUT_FILE_START_ADDRESS 0
372
set_global_assignment -name HEXOUT_FILE_COUNT_DIRECTION Up
373
set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "As output driving an unspecified signal"
374
set_global_assignment -name RELEASE_CLEARS_BEFORE_TRI_STATES Off
375
set_global_assignment -name AUTO_RESTART_CONFIGURATION On
376
set_global_assignment -name ALWAYS_ENABLE_INPUT_BUFFERS Off
377
set_global_assignment -name ENABLE_ASMI_FOR_FLASH_LOADER Off
378
set_global_assignment -name HARDCOPYII_POWER_ON_EXTRA_DELAY Off
379
set_global_assignment -name STRATIXII_MRAM_COMPATIBILITY -value OFF
380
set_global_assignment -name CYCLONEII_M4K_COMPATIBILITY On
381
set_global_assignment -name DUTY_CYCLE 50 -section_id ?
382
set_global_assignment -name INVERT_BASE_CLOCK Off -section_id ?
383
set_global_assignment -name MULTIPLY_BASE_CLOCK_PERIOD_BY 1 -section_id ?
384
set_global_assignment -name DIVIDE_BASE_CLOCK_PERIOD_BY 1 -section_id ?
385
set_global_assignment -name SIM_VECTOR_COMPARED_CLOCK_OFFSET 0ns -section_id ?
386
set_global_assignment -name SIM_VECTOR_COMPARED_CLOCK_DUTY_CYCLE 50 -section_id ?
387
set_global_assignment -name EDA_LAUNCH_CMD_LINE_TOOL Off -section_id ?
388
set_global_assignment -name EDA_TRUNCATE_LONG_HIERARCHY_PATHS Off -section_id ?
389
set_global_assignment -name EDA_FLATTEN_BUSES Off -section_id ?
390
set_global_assignment -name EDA_MAP_ILLEGAL_CHARACTERS Off -section_id ?
391
set_global_assignment -name EDA_GENERATE_TIMING_CLOSURE_DATA Off -section_id ?
392
set_global_assignment -name EDA_GENERATE_POWER_INPUT_FILE Off -section_id ?
393
set_global_assignment -name EDA_TEST_BENCH_ENABLE_STATUS NOT_USED -section_id ?
394
set_global_assignment -name EDA_RTL_SIM_MODE NOT_USED -section_id ?
395
set_global_assignment -name EDA_MAINTAIN_DESIGN_HIERARCHY Off -section_id ?
396
set_global_assignment -name EDA_GENERATE_FUNCTIONAL_NETLIST Off -section_id ?
397
set_global_assignment -name EDA_WRITE_DEVICE_CONTROL_PORTS Off -section_id ?
398
set_global_assignment -name EDA_ENABLE_GLITCH_FILTERING Off -section_id ?
399
set_global_assignment -name EDA_WRITE_NODES_FOR_POWER_ESTIMATION OFF -section_id ?
400
set_global_assignment -name EDA_SETUP_HOLD_DETECTION_INPUT_REGISTERS_BIDIR_PINS_DISABLED Off -section_id ?
401
set_global_assignment -name EDA_WRITER_DONT_WRITE_TOP_ENTITY Off -section_id ?
402
set_global_assignment -name EDA_VHDL_ARCH_NAME structure -section_id ?
403
set_global_assignment -name EDA_TEST_BENCH_RUN_SIM_FOR "100 ns" -section_id ?
404
set_global_assignment -name EDA_INPUT_GND_NAME GND -section_id ?
405
set_global_assignment -name EDA_INPUT_VCC_NAME VCC -section_id ?
406
set_global_assignment -name EDA_INPUT_DATA_FORMAT EDIF -section_id ?
407
set_global_assignment -name EDA_SHOW_LMF_MAPPING_MESSAGES Off -section_id ?
408
set_global_assignment -name EDA_RUN_TOOL_AUTOMATICALLY Off -section_id ?
409
set_global_assignment -name RESYNTHESIS_RETIMING FULL -section_id ?
410
set_global_assignment -name RESYNTHESIS_OPTIMIZATION_EFFORT Normal -section_id ?
411
set_global_assignment -name RESYNTHESIS_PHYSICAL_SYNTHESIS Normal -section_id ?
412
set_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS On -section_id ?
413
set_global_assignment -name VCCPD_VOLTAGE 3.3V -section_id ?
414
set_global_assignment -name APEX20K_CLIQUE_TYPE LAB -section_id ? -entity ?
415
set_global_assignment -name MAX7K_CLIQUE_TYPE LAB -section_id ? -entity ?
416
set_global_assignment -name MERCURY_CLIQUE_TYPE LAB -section_id ? -entity ?
417
set_global_assignment -name FLEX6K_CLIQUE_TYPE LAB -section_id ? -entity ?
418
set_global_assignment -name FLEX10K_CLIQUE_TYPE LAB -section_id ? -entity ?
419
set_global_assignment -name PARTITION_IMPORT_ASSIGNMENTS On -section_id ? -entity ?
420
set_global_assignment -name PARTITION_IMPORT_EXISTING_ASSIGNMENTS REPLACE_CONFLICTING -section_id ? -entity ?
421
set_global_assignment -name PARTITION_IMPORT_EXISTING_LOGICLOCK_REGIONS REPLACE_CONFLICTING -section_id ? -entity ?
422
set_global_assignment -name PARTITION_IMPORT_PROMOTE_ASSIGNMENTS On -section_id ? -entity ?

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