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URL https://opencores.org/ocsvn/hdl-deflate/hdl-deflate/trunk

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/hdl-deflate/trunk/Arty-A7-100.xdc
0,0 → 1,217
# This file is a general .xdc for the Arty A7-100 Rev. D
## To use it in a project:
## - uncomment the lines corresponding to used pins
## - rename the used ports (in each line, after get_ports) according to the top level signal names in the project
 
## Clock signal
set_property -dict { PACKAGE_PIN E3 IOSTANDARD LVCMOS33 } [get_ports { clk100 }]; #IO_L12P_T1_MRCC_35 Sch=gclk[100]
create_clock -add -name sys_clk_pin -period 10.00 -waveform {0 5} [get_ports { clk100 }];
 
## Switches
#set_property -dict { PACKAGE_PIN A8 IOSTANDARD LVCMOS33 } [get_ports { sw[0] }]; #IO_L12N_T1_MRCC_16 Sch=sw[0]
#set_property -dict { PACKAGE_PIN C11 IOSTANDARD LVCMOS33 } [get_ports { sw[1] }]; #IO_L13P_T2_MRCC_16 Sch=sw[1]
#set_property -dict { PACKAGE_PIN C10 IOSTANDARD LVCMOS33 } [get_ports { sw[2] }]; #IO_L13N_T2_MRCC_16 Sch=sw[2]
#set_property -dict { PACKAGE_PIN A10 IOSTANDARD LVCMOS33 } [get_ports { sw[3] }]; #IO_L14P_T2_SRCC_16 Sch=sw[3]
 
## RGB LEDs
#set_property -dict { PACKAGE_PIN E1 IOSTANDARD LVCMOS33 } [get_ports { led0_b }]; #IO_L18N_T2_35 Sch=led0_b
set_property -dict { PACKAGE_PIN F6 IOSTANDARD LVCMOS33 } [get_ports { led0_g }]; #IO_L19N_T3_VREF_35 Sch=led0_g
#set_property -dict { PACKAGE_PIN G6 IOSTANDARD LVCMOS33 } [get_ports { led0_r }]; #IO_L19P_T3_35 Sch=led0_r
set_property -dict { PACKAGE_PIN G4 IOSTANDARD LVCMOS33 } [get_ports { led1_b }]; #IO_L20P_T3_35 Sch=led1_b
#set_property -dict { PACKAGE_PIN J4 IOSTANDARD LVCMOS33 } [get_ports { led1_g }]; #IO_L21P_T3_DQS_35 Sch=led1_g
#set_property -dict { PACKAGE_PIN G3 IOSTANDARD LVCMOS33 } [get_ports { led1_r }]; #IO_L20N_T3_35 Sch=led1_r
#set_property -dict { PACKAGE_PIN H4 IOSTANDARD LVCMOS33 } [get_ports { led2_b }]; #IO_L21N_T3_DQS_35 Sch=led2_b
#set_property -dict { PACKAGE_PIN J2 IOSTANDARD LVCMOS33 } [get_ports { led2_g }]; #IO_L22N_T3_35 Sch=led2_g
set_property -dict { PACKAGE_PIN J3 IOSTANDARD LVCMOS33 } [get_ports { led2_r }]; #IO_L22P_T3_35 Sch=led2_r
#set_property -dict { PACKAGE_PIN K2 IOSTANDARD LVCMOS33 } [get_ports { led3_b }]; #IO_L23P_T3_35 Sch=led3_b
#set_property -dict { PACKAGE_PIN H6 IOSTANDARD LVCMOS33 } [get_ports { led3_g }]; #IO_L24P_T3_35 Sch=led3_g
#set_property -dict { PACKAGE_PIN K1 IOSTANDARD LVCMOS33 } [get_ports { led3_r }]; #IO_L23N_T3_35 Sch=led3_r
 
## LEDs
set_property -dict { PACKAGE_PIN H5 IOSTANDARD LVCMOS33 } [get_ports { o_led[0] }]; #IO_L24N_T3_35 Sch=led[4]
set_property -dict { PACKAGE_PIN J5 IOSTANDARD LVCMOS33 } [get_ports { o_led[1] }]; #IO_25_35 Sch=led[5]
set_property -dict { PACKAGE_PIN T9 IOSTANDARD LVCMOS33 } [get_ports { o_led[2] }]; #IO_L24P_T3_A01_D17_14 Sch=led[6]
set_property -dict { PACKAGE_PIN T10 IOSTANDARD LVCMOS33 } [get_ports { o_led[3] }]; #IO_L24N_T3_A00_D16_14 Sch=led[7]
 
## Buttons
#set_property -dict { PACKAGE_PIN D9 IOSTANDARD LVCMOS33 } [get_ports { btn[0] }]; #IO_L6N_T0_VREF_16 Sch=btn[0]
#set_property -dict { PACKAGE_PIN C9 IOSTANDARD LVCMOS33 } [get_ports { btn[1] }]; #IO_L11P_T1_SRCC_16 Sch=btn[1]
#set_property -dict { PACKAGE_PIN B9 IOSTANDARD LVCMOS33 } [get_ports { btn[2] }]; #IO_L11N_T1_SRCC_16 Sch=btn[2]
#set_property -dict { PACKAGE_PIN B8 IOSTANDARD LVCMOS33 } [get_ports { btn[3] }]; #IO_L12P_T1_MRCC_16 Sch=btn[3]
 
## Pmod Header JA
#set_property -dict { PACKAGE_PIN G13 IOSTANDARD LVCMOS33 } [get_ports { ja[0] }]; #IO_0_15 Sch=ja[1]
#set_property -dict { PACKAGE_PIN B11 IOSTANDARD LVCMOS33 } [get_ports { ja[1] }]; #IO_L4P_T0_15 Sch=ja[2]
#set_property -dict { PACKAGE_PIN A11 IOSTANDARD LVCMOS33 } [get_ports { ja[2] }]; #IO_L4N_T0_15 Sch=ja[3]
#set_property -dict { PACKAGE_PIN D12 IOSTANDARD LVCMOS33 } [get_ports { ja[3] }]; #IO_L6P_T0_15 Sch=ja[4]
#set_property -dict { PACKAGE_PIN D13 IOSTANDARD LVCMOS33 } [get_ports { ja[4] }]; #IO_L6N_T0_VREF_15 Sch=ja[7]
#set_property -dict { PACKAGE_PIN B18 IOSTANDARD LVCMOS33 } [get_ports { ja[5] }]; #IO_L10P_T1_AD11P_15 Sch=ja[8]
#set_property -dict { PACKAGE_PIN A18 IOSTANDARD LVCMOS33 } [get_ports { ja[6] }]; #IO_L10N_T1_AD11N_15 Sch=ja[9]
#set_property -dict { PACKAGE_PIN K16 IOSTANDARD LVCMOS33 } [get_ports { ja[7] }]; #IO_25_15 Sch=ja[10]
 
## Pmod Header JB
#set_property -dict { PACKAGE_PIN E15 IOSTANDARD LVCMOS33 } [get_ports { jb[0] }]; #IO_L11P_T1_SRCC_15 Sch=jb_p[1]
#set_property -dict { PACKAGE_PIN E16 IOSTANDARD LVCMOS33 } [get_ports { jb[1] }]; #IO_L11N_T1_SRCC_15 Sch=jb_n[1]
#set_property -dict { PACKAGE_PIN D15 IOSTANDARD LVCMOS33 } [get_ports { jb[2] }]; #IO_L12P_T1_MRCC_15 Sch=jb_p[2]
#set_property -dict { PACKAGE_PIN C15 IOSTANDARD LVCMOS33 } [get_ports { jb[3] }]; #IO_L12N_T1_MRCC_15 Sch=jb_n[2]
#set_property -dict { PACKAGE_PIN J17 IOSTANDARD LVCMOS33 } [get_ports { jb[4] }]; #IO_L23P_T3_FOE_B_15 Sch=jb_p[3]
#set_property -dict { PACKAGE_PIN J18 IOSTANDARD LVCMOS33 } [get_ports { jb[5] }]; #IO_L23N_T3_FWE_B_15 Sch=jb_n[3]
#set_property -dict { PACKAGE_PIN K15 IOSTANDARD LVCMOS33 } [get_ports { jb[6] }]; #IO_L24P_T3_RS1_15 Sch=jb_p[4]
#set_property -dict { PACKAGE_PIN J15 IOSTANDARD LVCMOS33 } [get_ports { jb[7] }]; #IO_L24N_T3_RS0_15 Sch=jb_n[4]
 
## Pmod Header JC
#set_property -dict { PACKAGE_PIN U12 IOSTANDARD LVCMOS33 } [get_ports { jc[0] }]; #IO_L20P_T3_A08_D24_14 Sch=jc_p[1]
#set_property -dict { PACKAGE_PIN V12 IOSTANDARD LVCMOS33 } [get_ports { jc[1] }]; #IO_L20N_T3_A07_D23_14 Sch=jc_n[1]
#set_property -dict { PACKAGE_PIN V10 IOSTANDARD LVCMOS33 } [get_ports { jc[2] }]; #IO_L21P_T3_DQS_14 Sch=jc_p[2]
#set_property -dict { PACKAGE_PIN V11 IOSTANDARD LVCMOS33 } [get_ports { jc[3] }]; #IO_L21N_T3_DQS_A06_D22_14 Sch=jc_n[2]
#set_property -dict { PACKAGE_PIN U14 IOSTANDARD LVCMOS33 } [get_ports { jc[4] }]; #IO_L22P_T3_A05_D21_14 Sch=jc_p[3]
#set_property -dict { PACKAGE_PIN V14 IOSTANDARD LVCMOS33 } [get_ports { jc[5] }]; #IO_L22N_T3_A04_D20_14 Sch=jc_n[3]
#set_property -dict { PACKAGE_PIN T13 IOSTANDARD LVCMOS33 } [get_ports { jc[6] }]; #IO_L23P_T3_A03_D19_14 Sch=jc_p[4]
#set_property -dict { PACKAGE_PIN U13 IOSTANDARD LVCMOS33 } [get_ports { jc[7] }]; #IO_L23N_T3_A02_D18_14 Sch=jc_n[4]
 
## Pmod Header JD
#set_property -dict { PACKAGE_PIN D4 IOSTANDARD LVCMOS33 } [get_ports { jd[0] }]; #IO_L11N_T1_SRCC_35 Sch=jd[1]
#set_property -dict { PACKAGE_PIN D3 IOSTANDARD LVCMOS33 } [get_ports { jd[1] }]; #IO_L12N_T1_MRCC_35 Sch=jd[2]
#set_property -dict { PACKAGE_PIN F4 IOSTANDARD LVCMOS33 } [get_ports { jd[2] }]; #IO_L13P_T2_MRCC_35 Sch=jd[3]
#set_property -dict { PACKAGE_PIN F3 IOSTANDARD LVCMOS33 } [get_ports { jd[3] }]; #IO_L13N_T2_MRCC_35 Sch=jd[4]
#set_property -dict { PACKAGE_PIN E2 IOSTANDARD LVCMOS33 } [get_ports { jd[4] }]; #IO_L14P_T2_SRCC_35 Sch=jd[7]
#set_property -dict { PACKAGE_PIN D2 IOSTANDARD LVCMOS33 } [get_ports { jd[5] }]; #IO_L14N_T2_SRCC_35 Sch=jd[8]
#set_property -dict { PACKAGE_PIN H2 IOSTANDARD LVCMOS33 } [get_ports { jd[6] }]; #IO_L15P_T2_DQS_35 Sch=jd[9]
#set_property -dict { PACKAGE_PIN G2 IOSTANDARD LVCMOS33 } [get_ports { jd[7] }]; #IO_L15N_T2_DQS_35 Sch=jd[10]
 
## USB-UART Interface
#set_property -dict { PACKAGE_PIN D10 IOSTANDARD LVCMOS33 } [get_ports { uart_rxd_out }]; #IO_L19N_T3_VREF_16 Sch=uart_rxd_out
#set_property -dict { PACKAGE_PIN A9 IOSTANDARD LVCMOS33 } [get_ports { uart_txd_in }]; #IO_L14N_T2_SRCC_16 Sch=uart_txd_in
 
## ChipKit Outer Digital Header
#set_property -dict { PACKAGE_PIN V15 IOSTANDARD LVCMOS33 } [get_ports { ck_io0 }]; #IO_L16P_T2_CSI_B_14 Sch=ck_io[0]
#set_property -dict { PACKAGE_PIN U16 IOSTANDARD LVCMOS33 } [get_ports { ck_io1 }]; #IO_L18P_T2_A12_D28_14 Sch=ck_io[1]
#set_property -dict { PACKAGE_PIN P14 IOSTANDARD LVCMOS33 } [get_ports { ck_io2 }]; #IO_L8N_T1_D12_14 Sch=ck_io[2]
#set_property -dict { PACKAGE_PIN T11 IOSTANDARD LVCMOS33 } [get_ports { ck_io3 }]; #IO_L19P_T3_A10_D26_14 Sch=ck_io[3]
#set_property -dict { PACKAGE_PIN R12 IOSTANDARD LVCMOS33 } [get_ports { ck_io4 }]; #IO_L5P_T0_D06_14 Sch=ck_io[4]
#set_property -dict { PACKAGE_PIN T14 IOSTANDARD LVCMOS33 } [get_ports { ck_io5 }]; #IO_L14P_T2_SRCC_14 Sch=ck_io[5]
#set_property -dict { PACKAGE_PIN T15 IOSTANDARD LVCMOS33 } [get_ports { ck_io6 }]; #IO_L14N_T2_SRCC_14 Sch=ck_io[6]
#set_property -dict { PACKAGE_PIN T16 IOSTANDARD LVCMOS33 } [get_ports { ck_io7 }]; #IO_L15N_T2_DQS_DOUT_CSO_B_14 Sch=ck_io[7]
#set_property -dict { PACKAGE_PIN N15 IOSTANDARD LVCMOS33 } [get_ports { ck_io8 }]; #IO_L11P_T1_SRCC_14 Sch=ck_io[8]
#set_property -dict { PACKAGE_PIN M16 IOSTANDARD LVCMOS33 } [get_ports { ck_io9 }]; #IO_L10P_T1_D14_14 Sch=ck_io[9]
#set_property -dict { PACKAGE_PIN V17 IOSTANDARD LVCMOS33 } [get_ports { ck_io10 }]; #IO_L18N_T2_A11_D27_14 Sch=ck_io[10]
#set_property -dict { PACKAGE_PIN U18 IOSTANDARD LVCMOS33 } [get_ports { ck_io11 }]; #IO_L17N_T2_A13_D29_14 Sch=ck_io[11]
#set_property -dict { PACKAGE_PIN R17 IOSTANDARD LVCMOS33 } [get_ports { ck_io12 }]; #IO_L12N_T1_MRCC_14 Sch=ck_io[12]
#set_property -dict { PACKAGE_PIN P17 IOSTANDARD LVCMOS33 } [get_ports { ck_io13 }]; #IO_L12P_T1_MRCC_14 Sch=ck_io[13]
 
## ChipKit Inner Digital Header
#set_property -dict { PACKAGE_PIN U11 IOSTANDARD LVCMOS33 } [get_ports { ck_io26 }]; #IO_L19N_T3_A09_D25_VREF_14 Sch=ck_io[26]
#set_property -dict { PACKAGE_PIN V16 IOSTANDARD LVCMOS33 } [get_ports { ck_io27 }]; #IO_L16N_T2_A15_D31_14 Sch=ck_io[27]
#set_property -dict { PACKAGE_PIN M13 IOSTANDARD LVCMOS33 } [get_ports { ck_io28 }]; #IO_L6N_T0_D08_VREF_14 Sch=ck_io[28]
#set_property -dict { PACKAGE_PIN R10 IOSTANDARD LVCMOS33 } [get_ports { ck_io29 }]; #IO_25_14 Sch=ck_io[29]
#set_property -dict { PACKAGE_PIN R11 IOSTANDARD LVCMOS33 } [get_ports { ck_io30 }]; #IO_0_14 Sch=ck_io[30]
#set_property -dict { PACKAGE_PIN R13 IOSTANDARD LVCMOS33 } [get_ports { ck_io31 }]; #IO_L5N_T0_D07_14 Sch=ck_io[31]
#set_property -dict { PACKAGE_PIN R15 IOSTANDARD LVCMOS33 } [get_ports { ck_io32 }]; #IO_L13N_T2_MRCC_14 Sch=ck_io[32]
#set_property -dict { PACKAGE_PIN P15 IOSTANDARD LVCMOS33 } [get_ports { ck_io33 }]; #IO_L13P_T2_MRCC_14 Sch=ck_io[33]
#set_property -dict { PACKAGE_PIN R16 IOSTANDARD LVCMOS33 } [get_ports { ck_io34 }]; #IO_L15P_T2_DQS_RDWR_B_14 Sch=ck_io[34]
#set_property -dict { PACKAGE_PIN N16 IOSTANDARD LVCMOS33 } [get_ports { ck_io35 }]; #IO_L11N_T1_SRCC_14 Sch=ck_io[35]
#set_property -dict { PACKAGE_PIN N14 IOSTANDARD LVCMOS33 } [get_ports { ck_io36 }]; #IO_L8P_T1_D11_14 Sch=ck_io[36]
#set_property -dict { PACKAGE_PIN U17 IOSTANDARD LVCMOS33 } [get_ports { ck_io37 }]; #IO_L17P_T2_A14_D30_14 Sch=ck_io[37]
#set_property -dict { PACKAGE_PIN T18 IOSTANDARD LVCMOS33 } [get_ports { ck_io38 }]; #IO_L7N_T1_D10_14 Sch=ck_io[38]
#set_property -dict { PACKAGE_PIN R18 IOSTANDARD LVCMOS33 } [get_ports { ck_io39 }]; #IO_L7P_T1_D09_14 Sch=ck_io[39]
#set_property -dict { PACKAGE_PIN P18 IOSTANDARD LVCMOS33 } [get_ports { ck_io40 }]; #IO_L9N_T1_DQS_D13_14 Sch=ck_io[40]
#set_property -dict { PACKAGE_PIN N17 IOSTANDARD LVCMOS33 } [get_ports { ck_io41 }]; #IO_L9P_T1_DQS_14 Sch=ck_io[41]
 
## ChipKit Outer Analog Header - as Single-Ended Analog Inputs
## NOTE: These ports can be used as single-ended analog inputs with voltages from 0-3.3V (ChipKit analog pins A0-A5) or as digital I/O.
## WARNING: Do not use both sets of constraints at the same time!
## NOTE: The following constraints should be used with the XADC IP core when using these ports as analog inputs.
#set_property -dict { PACKAGE_PIN C5 IOSTANDARD LVCMOS33 } [get_ports { vaux4_n }]; #IO_L1N_T0_AD4N_35 Sch=ck_an_n[0] ChipKit pin=A0
#set_property -dict { PACKAGE_PIN C6 IOSTANDARD LVCMOS33 } [get_ports { vaux4_p }]; #IO_L1P_T0_AD4P_35 Sch=ck_an_p[0] ChipKit pin=A0
#set_property -dict { PACKAGE_PIN A5 IOSTANDARD LVCMOS33 } [get_ports { vaux5_n }]; #IO_L3N_T0_DQS_AD5N_35 Sch=ck_an_n[1] ChipKit pin=A1
#set_property -dict { PACKAGE_PIN A6 IOSTANDARD LVCMOS33 } [get_ports { vaux5_p }]; #IO_L3P_T0_DQS_AD5P_35 Sch=ck_an_p[1] ChipKit pin=A1
#set_property -dict { PACKAGE_PIN B4 IOSTANDARD LVCMOS33 } [get_ports { vaux6_n }]; #IO_L7N_T1_AD6N_35 Sch=ck_an_n[2] ChipKit pin=A2
#set_property -dict { PACKAGE_PIN C4 IOSTANDARD LVCMOS33 } [get_ports { vaux6_p }]; #IO_L7P_T1_AD6P_35 Sch=ck_an_p[2] ChipKit pin=A2
#set_property -dict { PACKAGE_PIN A1 IOSTANDARD LVCMOS33 } [get_ports { vaux7_n }]; #IO_L9N_T1_DQS_AD7N_35 Sch=ck_an_n[3] ChipKit pin=A3
#set_property -dict { PACKAGE_PIN B1 IOSTANDARD LVCMOS33 } [get_ports { vaux7_p }]; #IO_L9P_T1_DQS_AD7P_35 Sch=ck_an_p[3] ChipKit pin=A3
#set_property -dict { PACKAGE_PIN B2 IOSTANDARD LVCMOS33 } [get_ports { vaux15_n }]; #IO_L10N_T1_AD15N_35 Sch=ck_an_n[4] ChipKit pin=A4
#set_property -dict { PACKAGE_PIN B3 IOSTANDARD LVCMOS33 } [get_ports { vaux15_p }]; #IO_L10P_T1_AD15P_35 Sch=ck_an_p[4] ChipKit pin=A4
#set_property -dict { PACKAGE_PIN C14 IOSTANDARD LVCMOS33 } [get_ports { vaux0_n }]; #IO_L1N_T0_AD0N_15 Sch=ck_an_n[5] ChipKit pin=A5
#set_property -dict { PACKAGE_PIN D14 IOSTANDARD LVCMOS33 } [get_ports { vaux0_p }]; #IO_L1P_T0_AD0P_15 Sch=ck_an_p[5] ChipKit pin=A5
## ChipKit Outer Analog Header - as Digital I/O
## NOTE: The following constraints should be used when using these ports as digital I/O.
#set_property -dict { PACKAGE_PIN F5 IOSTANDARD LVCMOS33 } [get_ports { ck_a0 }]; #IO_0_35 Sch=ck_a[0]
#set_property -dict { PACKAGE_PIN D8 IOSTANDARD LVCMOS33 } [get_ports { ck_a1 }]; #IO_L4P_T0_35 Sch=ck_a[1]
#set_property -dict { PACKAGE_PIN C7 IOSTANDARD LVCMOS33 } [get_ports { ck_a2 }]; #IO_L4N_T0_35 Sch=ck_a[2]
#set_property -dict { PACKAGE_PIN E7 IOSTANDARD LVCMOS33 } [get_ports { ck_a3 }]; #IO_L6P_T0_35 Sch=ck_a[3]
#set_property -dict { PACKAGE_PIN D7 IOSTANDARD LVCMOS33 } [get_ports { ck_a4 }]; #IO_L6N_T0_VREF_35 Sch=ck_a[4]
#set_property -dict { PACKAGE_PIN D5 IOSTANDARD LVCMOS33 } [get_ports { ck_a5 }]; #IO_L11P_T1_SRCC_35 Sch=ck_a[5]
 
## ChipKit Inner Analog Header - as Differential Analog Inputs
## NOTE: These ports can be used as differential analog inputs with voltages from 0-1.0V (ChipKit analog pins A6-A11) or as digital I/O.
## WARNING: Do not use both sets of constraints at the same time!
## NOTE: The following constraints should be used with the XADC core when using these ports as analog inputs.
#set_property -dict { PACKAGE_PIN B7 IOSTANDARD LVCMOS33 } [get_ports { vaux12_p }]; #IO_L2P_T0_AD12P_35 Sch=ad_p[12] ChipKit pin=A6
#set_property -dict { PACKAGE_PIN B6 IOSTANDARD LVCMOS33 } [get_ports { vaux12_n }]; #IO_L2N_T0_AD12N_35 Sch=ad_n[12] ChipKit pin=A7
#set_property -dict { PACKAGE_PIN E6 IOSTANDARD LVCMOS33 } [get_ports { vaux13_p }]; #IO_L5P_T0_AD13P_35 Sch=ad_p[13] ChipKit pin=A8
#set_property -dict { PACKAGE_PIN E5 IOSTANDARD LVCMOS33 } [get_ports { vaux13_n }]; #IO_L5N_T0_AD13N_35 Sch=ad_n[13] ChipKit pin=A9
#set_property -dict { PACKAGE_PIN A4 IOSTANDARD LVCMOS33 } [get_ports { vaux14_p }]; #IO_L8P_T1_AD14P_35 Sch=ad_p[14] ChipKit pin=A10
#set_property -dict { PACKAGE_PIN A3 IOSTANDARD LVCMOS33 } [get_ports { vaux14_n }]; #IO_L8N_T1_AD14N_35 Sch=ad_n[14] ChipKit pin=A11
## ChipKit Inner Analog Header - as Digital I/O
## NOTE: The following constraints should be used when using the inner analog header ports as digital I/O.
#set_property -dict { PACKAGE_PIN B7 IOSTANDARD LVCMOS33 } [get_ports { ck_a6 }]; #IO_L2P_T0_AD12P_35 Sch=ad_p[12]
#set_property -dict { PACKAGE_PIN B6 IOSTANDARD LVCMOS33 } [get_ports { ck_a7 }]; #IO_L2N_T0_AD12N_35 Sch=ad_n[12]
#set_property -dict { PACKAGE_PIN E6 IOSTANDARD LVCMOS33 } [get_ports { ck_a8 }]; #IO_L5P_T0_AD13P_35 Sch=ad_p[13]
#set_property -dict { PACKAGE_PIN E5 IOSTANDARD LVCMOS33 } [get_ports { ck_a9 }]; #IO_L5N_T0_AD13N_35 Sch=ad_n[13]
#set_property -dict { PACKAGE_PIN A4 IOSTANDARD LVCMOS33 } [get_ports { ck_a10 }]; #IO_L8P_T1_AD14P_35 Sch=ad_p[14]
#set_property -dict { PACKAGE_PIN A3 IOSTANDARD LVCMOS33 } [get_ports { ck_a11 }]; #IO_L8N_T1_AD14N_35 Sch=ad_n[14]
 
## ChipKit SPI
#set_property -dict { PACKAGE_PIN G1 IOSTANDARD LVCMOS33 } [get_ports { ck_miso }]; #IO_L17N_T2_35 Sch=ck_miso
#set_property -dict { PACKAGE_PIN H1 IOSTANDARD LVCMOS33 } [get_ports { ck_mosi }]; #IO_L17P_T2_35 Sch=ck_mosi
#set_property -dict { PACKAGE_PIN F1 IOSTANDARD LVCMOS33 } [get_ports { ck_sck }]; #IO_L18P_T2_35 Sch=ck_sck
#set_property -dict { PACKAGE_PIN C1 IOSTANDARD LVCMOS33 } [get_ports { ck_ss }]; #IO_L16N_T2_35 Sch=ck_ss
 
## ChipKit I2C
#set_property -dict { PACKAGE_PIN L18 IOSTANDARD LVCMOS33 } [get_ports { ck_scl }]; #IO_L4P_T0_D04_14 Sch=ck_scl
#set_property -dict { PACKAGE_PIN M18 IOSTANDARD LVCMOS33 } [get_ports { ck_sda }]; #IO_L4N_T0_D05_14 Sch=ck_sda
#set_property -dict { PACKAGE_PIN A14 IOSTANDARD LVCMOS33 } [get_ports { scl_pup }]; #IO_L9N_T1_DQS_AD3N_15 Sch=scl_pup
#set_property -dict { PACKAGE_PIN A13 IOSTANDARD LVCMOS33 } [get_ports { sda_pup }]; #IO_L9P_T1_DQS_AD3P_15 Sch=sda_pup
 
## Misc. ChipKit Ports
#set_property -dict { PACKAGE_PIN M17 IOSTANDARD LVCMOS33 } [get_ports { ck_ioa }]; #IO_L10N_T1_D15_14 Sch=ck_ioa
#set_property -dict { PACKAGE_PIN C2 IOSTANDARD LVCMOS33 } [get_ports { ck_rst }]; #IO_L16P_T2_35 Sch=ck_rst
 
## SMSC Ethernet PHY
#set_property -dict { PACKAGE_PIN D17 IOSTANDARD LVCMOS33 } [get_ports { eth_col }]; #IO_L16N_T2_A27_15 Sch=eth_col
#set_property -dict { PACKAGE_PIN G14 IOSTANDARD LVCMOS33 } [get_ports { eth_crs }]; #IO_L15N_T2_DQS_ADV_B_15 Sch=eth_crs
#set_property -dict { PACKAGE_PIN F16 IOSTANDARD LVCMOS33 } [get_ports { eth_mdc }]; #IO_L14N_T2_SRCC_15 Sch=eth_mdc
#set_property -dict { PACKAGE_PIN K13 IOSTANDARD LVCMOS33 } [get_ports { eth_mdio }]; #IO_L17P_T2_A26_15 Sch=eth_mdio
#set_property -dict { PACKAGE_PIN G18 IOSTANDARD LVCMOS33 } [get_ports { eth_ref_clk }]; #IO_L22P_T3_A17_15 Sch=eth_ref_clk
#set_property -dict { PACKAGE_PIN C16 IOSTANDARD LVCMOS33 } [get_ports { eth_rstn }]; #IO_L20P_T3_A20_15 Sch=eth_rstn
#set_property -dict { PACKAGE_PIN F15 IOSTANDARD LVCMOS33 } [get_ports { eth_rx_clk }]; #IO_L14P_T2_SRCC_15 Sch=eth_rx_clk
#set_property -dict { PACKAGE_PIN G16 IOSTANDARD LVCMOS33 } [get_ports { eth_rx_dv }]; #IO_L13N_T2_MRCC_15 Sch=eth_rx_dv
#set_property -dict { PACKAGE_PIN D18 IOSTANDARD LVCMOS33 } [get_ports { eth_rxd[0] }]; #IO_L21N_T3_DQS_A18_15 Sch=eth_rxd[0]
#set_property -dict { PACKAGE_PIN E17 IOSTANDARD LVCMOS33 } [get_ports { eth_rxd[1] }]; #IO_L16P_T2_A28_15 Sch=eth_rxd[1]
#set_property -dict { PACKAGE_PIN E18 IOSTANDARD LVCMOS33 } [get_ports { eth_rxd[2] }]; #IO_L21P_T3_DQS_15 Sch=eth_rxd[2]
#set_property -dict { PACKAGE_PIN G17 IOSTANDARD LVCMOS33 } [get_ports { eth_rxd[3] }]; #IO_L18N_T2_A23_15 Sch=eth_rxd[3]
#set_property -dict { PACKAGE_PIN C17 IOSTANDARD LVCMOS33 } [get_ports { eth_rxerr }]; #IO_L20N_T3_A19_15 Sch=eth_rxerr
#set_property -dict { PACKAGE_PIN H16 IOSTANDARD LVCMOS33 } [get_ports { eth_tx_clk }]; #IO_L13P_T2_MRCC_15 Sch=eth_tx_clk
#set_property -dict { PACKAGE_PIN H15 IOSTANDARD LVCMOS33 } [get_ports { eth_tx_en }]; #IO_L19N_T3_A21_VREF_15 Sch=eth_tx_en
#set_property -dict { PACKAGE_PIN H14 IOSTANDARD LVCMOS33 } [get_ports { eth_txd[0] }]; #IO_L15P_T2_DQS_15 Sch=eth_txd[0]
#set_property -dict { PACKAGE_PIN J14 IOSTANDARD LVCMOS33 } [get_ports { eth_txd[1] }]; #IO_L19P_T3_A22_15 Sch=eth_txd[1]
#set_property -dict { PACKAGE_PIN J13 IOSTANDARD LVCMOS33 } [get_ports { eth_txd[2] }]; #IO_L17N_T2_A25_15 Sch=eth_txd[2]
#set_property -dict { PACKAGE_PIN H17 IOSTANDARD LVCMOS33 } [get_ports { eth_txd[3] }]; #IO_L18P_T2_A24_15 Sch=eth_txd[3]
 
## Quad SPI Flash
#set_property -dict { PACKAGE_PIN L13 IOSTANDARD LVCMOS33 } [get_ports { qspi_cs }]; #IO_L6P_T0_FCS_B_14 Sch=qspi_cs
#set_property -dict { PACKAGE_PIN K17 IOSTANDARD LVCMOS33 } [get_ports { qspi_dq[0] }]; #IO_L1P_T0_D00_MOSI_14 Sch=qspi_dq[0]
#set_property -dict { PACKAGE_PIN K18 IOSTANDARD LVCMOS33 } [get_ports { qspi_dq[1] }]; #IO_L1N_T0_D01_DIN_14 Sch=qspi_dq[1]
#set_property -dict { PACKAGE_PIN L14 IOSTANDARD LVCMOS33 } [get_ports { qspi_dq[2] }]; #IO_L2P_T0_D02_14 Sch=qspi_dq[2]
#set_property -dict { PACKAGE_PIN M14 IOSTANDARD LVCMOS33 } [get_ports { qspi_dq[3] }]; #IO_L2N_T0_D03_14 Sch=qspi_dq[3]
 
## Power Measurements
#set_property -dict { PACKAGE_PIN B17 IOSTANDARD LVCMOS33 } [get_ports { vsnsvu_n }]; #IO_L7N_T1_AD2N_15 Sch=ad_n[2]
#set_property -dict { PACKAGE_PIN B16 IOSTANDARD LVCMOS33 } [get_ports { vsnsvu_p }]; #IO_L7P_T1_AD2P_15 Sch=ad_p[2]
#set_property -dict { PACKAGE_PIN B12 IOSTANDARD LVCMOS33 } [get_ports { vsns5v0_n }]; #IO_L3N_T0_DQS_AD1N_15 Sch=ad_n[1]
#set_property -dict { PACKAGE_PIN C12 IOSTANDARD LVCMOS33 } [get_ports { vsns5v0_p }]; #IO_L3P_T0_DQS_AD1P_15 Sch=ad_p[1]
#set_property -dict { PACKAGE_PIN F14 IOSTANDARD LVCMOS33 } [get_ports { isns5v0_n }]; #IO_L5N_T0_AD9N_15 Sch=ad_n[9]
#set_property -dict { PACKAGE_PIN F13 IOSTANDARD LVCMOS33 } [get_ports { isns5v0_p }]; #IO_L5P_T0_AD9P_15 Sch=ad_p[9]
#set_property -dict { PACKAGE_PIN A16 IOSTANDARD LVCMOS33 } [get_ports { isns0v95_n }]; #IO_L8N_T1_AD10N_15 Sch=ad_n[10]
#set_property -dict { PACKAGE_PIN A15 IOSTANDARD LVCMOS33 } [get_ports { isns0v95_p }]; #IO_L8P_T1_AD10P_15 Sch=ad_p[10]
 
/hdl-deflate/trunk/HDL-Deflate.xpr
0,0 → 1,218
<?xml version="1.0" encoding="UTF-8"?>
<!-- Product Version: Vivado v2018.2 (64-bit) -->
<!-- -->
<!-- Copyright 1986-2018 Xilinx, Inc. All Rights Reserved. -->
 
<Project Version="7" Minor="38" Path="/media/swanroot/home/tom/src/xilinx/HDL-deflate/HDL-Deflate.xpr">
<DefaultLaunch Dir="$PRUNDIR"/>
<Configuration>
<Option Name="Id" Val="6a78e9b84b1342dfb429d47d701d43d5"/>
<Option Name="Part" Val="xc7a100tcsg324-1"/>
<Option Name="CompiledLibDir" Val="$PCACHEDIR/compile_simlib"/>
<Option Name="CompiledLibDirXSim" Val=""/>
<Option Name="CompiledLibDirModelSim" Val="$PCACHEDIR/compile_simlib/modelsim"/>
<Option Name="CompiledLibDirQuesta" Val="$PCACHEDIR/compile_simlib/questa"/>
<Option Name="CompiledLibDirIES" Val="$PCACHEDIR/compile_simlib/ies"/>
<Option Name="CompiledLibDirXcelium" Val="$PCACHEDIR/compile_simlib/xcelium"/>
<Option Name="CompiledLibDirVCS" Val="$PCACHEDIR/compile_simlib/vcs"/>
<Option Name="CompiledLibDirRiviera" Val="$PCACHEDIR/compile_simlib/riviera"/>
<Option Name="CompiledLibDirActivehdl" Val="$PCACHEDIR/compile_simlib/activehdl"/>
<Option Name="BoardPart" Val="digilentinc.com:arty-a7-100:part0:1.0"/>
<Option Name="ActiveSimSet" Val="sim_1"/>
<Option Name="DefaultLib" Val="xil_defaultlib"/>
<Option Name="ProjectType" Val="Default"/>
<Option Name="IPOutputRepo" Val="$PCACHEDIR/ip"/>
<Option Name="IPCachePermission" Val="read"/>
<Option Name="IPCachePermission" Val="write"/>
<Option Name="EnableCoreContainer" Val="FALSE"/>
<Option Name="CreateRefXciForCoreContainers" Val="FALSE"/>
<Option Name="IPUserFilesDir" Val="$PIPUSERFILESDIR"/>
<Option Name="IPStaticSourceDir" Val="$PIPUSERFILESDIR/ipstatic"/>
<Option Name="EnableBDX" Val="FALSE"/>
<Option Name="DSAVendor" Val="xilinx"/>
<Option Name="DSABoardId" Val="arty-a7-100"/>
<Option Name="DSANumComputeUnits" Val="60"/>
<Option Name="WTXSimLaunchSim" Val="5"/>
<Option Name="WTModelSimLaunchSim" Val="0"/>
<Option Name="WTQuestaLaunchSim" Val="0"/>
<Option Name="WTIesLaunchSim" Val="0"/>
<Option Name="WTVcsLaunchSim" Val="0"/>
<Option Name="WTRivieraLaunchSim" Val="0"/>
<Option Name="WTActivehdlLaunchSim" Val="0"/>
<Option Name="WTXSimExportSim" Val="0"/>
<Option Name="WTModelSimExportSim" Val="0"/>
<Option Name="WTQuestaExportSim" Val="0"/>
<Option Name="WTIesExportSim" Val="0"/>
<Option Name="WTVcsExportSim" Val="0"/>
<Option Name="WTRivieraExportSim" Val="0"/>
<Option Name="WTActivehdlExportSim" Val="0"/>
<Option Name="GenerateIPUpgradeLog" Val="TRUE"/>
<Option Name="XSimRadix" Val="hex"/>
<Option Name="XSimTimeUnit" Val="ns"/>
<Option Name="XSimArrayDisplayLimit" Val="1024"/>
<Option Name="XSimTraceLimit" Val="65536"/>
<Option Name="SimTypes" Val="rtl"/>
<Option Name="SimTypes" Val="bfm"/>
<Option Name="SimTypes" Val="tlm"/>
<Option Name="SimTypes" Val="tlm_dpi"/>
<Option Name="MEMEnableMemoryMapGeneration" Val="TRUE"/>
</Configuration>
<FileSets Version="1" Minor="31">
<FileSet Name="sources_1" Type="DesignSrcs" RelSrcDir="$PSRCDIR/sources_1">
<Filter Type="Srcs"/>
<File Path="$PPRDIR/test_deflate_bench.v">
<FileInfo>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="implementation"/>
<Attr Name="UsedIn" Val="simulation"/>
</FileInfo>
</File>
<File Path="$PSRCDIR/sources_1/bd/design_1/design_1.bd">
<FileInfo>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="implementation"/>
<Attr Name="UsedIn" Val="simulation"/>
</FileInfo>
<CompFileExtendedInfo CompFileName="design_1.bd" FileRelPathName="ip/design_1_test_deflate_bench_0_0/design_1_test_deflate_bench_0_0.xci">
<Proxy FileSetName="design_1_test_deflate_bench_0_0"/>
</CompFileExtendedInfo>
</File>
<File Path="$PSRCDIR/sources_1/bd/design_1/hdl/design_1_wrapper.v">
<FileInfo>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="implementation"/>
<Attr Name="UsedIn" Val="simulation"/>
</FileInfo>
</File>
<Config>
<Option Name="DesignMode" Val="RTL"/>
<Option Name="TopModule" Val="design_1_wrapper"/>
<Option Name="TopAutoSet" Val="TRUE"/>
</Config>
</FileSet>
<FileSet Name="constrs_1" Type="Constrs" RelSrcDir="$PSRCDIR/constrs_1">
<Filter Type="Constrs"/>
<File Path="$PPRDIR/Arty-A7-100.xdc">
<FileInfo>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="implementation"/>
</FileInfo>
</File>
<Config>
<Option Name="ConstrsType" Val="XDC"/>
</Config>
</FileSet>
<FileSet Name="sim_1" Type="SimulationSrcs" RelSrcDir="$PSRCDIR/sim_1">
<Filter Type="Srcs"/>
<File Path="$PPRDIR/test_fast_bench.v">
<FileInfo>
<Attr Name="AutoDisabled" Val="1"/>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="implementation"/>
<Attr Name="UsedIn" Val="simulation"/>
</FileInfo>
</File>
<Config>
<Option Name="DesignMode" Val="RTL"/>
<Option Name="TopModule" Val="design_1_wrapper"/>
<Option Name="TopLib" Val="xil_defaultlib"/>
<Option Name="TopAutoSet" Val="TRUE"/>
<Option Name="TransportPathDelay" Val="0"/>
<Option Name="TransportIntDelay" Val="0"/>
<Option Name="SimMode" Val="post-implementation"/>
<Option Name="SrcSet" Val="sources_1"/>
<Option Name="NLNetlistMode" Val="funcsim"/>
</Config>
</FileSet>
<FileSet Name="design_1_test_deflate_bench_0_0" Type="BlockSrcs" RelSrcDir="$PSRCDIR/design_1_test_deflate_bench_0_0">
<Config>
<Option Name="TopModule" Val="design_1_test_deflate_bench_0_0"/>
<Option Name="UseBlackboxStub" Val="1"/>
</Config>
</FileSet>
</FileSets>
<Simulators>
<Simulator Name="XSim">
<Option Name="Description" Val="Vivado Simulator"/>
<Option Name="CompiledLib" Val="0"/>
</Simulator>
<Simulator Name="ModelSim">
<Option Name="Description" Val="ModelSim Simulator"/>
</Simulator>
<Simulator Name="Questa">
<Option Name="Description" Val="Questa Advanced Simulator"/>
</Simulator>
<Simulator Name="IES">
<Option Name="Description" Val="Incisive Enterprise Simulator (IES)"/>
</Simulator>
<Simulator Name="Xcelium">
<Option Name="Description" Val="Xcelium Parallel Simulator"/>
</Simulator>
<Simulator Name="VCS">
<Option Name="Description" Val="Verilog Compiler Simulator (VCS)"/>
</Simulator>
<Simulator Name="Riviera">
<Option Name="Description" Val="Riviera-PRO Simulator"/>
</Simulator>
</Simulators>
<Runs Version="1" Minor="10">
<Run Id="synth_1" Type="Ft3:Synth" SrcSet="sources_1" Part="xc7a100tcsg324-1" ConstrsSet="constrs_1" Description="Vivado Synthesis Defaults" WriteIncrSynthDcp="false" State="current" Dir="$PRUNDIR/synth_1" IncludeInArchive="true">
<Strategy Version="1" Minor="2">
<StratHandle Name="Vivado Synthesis Defaults" Flow="Vivado Synthesis 2018"/>
<Step Id="synth_design"/>
</Strategy>
<GeneratedRun Dir="$PRUNDIR" File="gen_run.xml"/>
<ReportStrategy Name="Vivado Synthesis Default Reports" Flow="Vivado Synthesis 2018"/>
<Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
</Run>
<Run Id="design_1_test_deflate_bench_0_0_synth_1" Type="Ft3:Synth" SrcSet="design_1_test_deflate_bench_0_0" Part="xc7a100tcsg324-1" ConstrsSet="design_1_test_deflate_bench_0_0" Description="Vivado Synthesis Defaults" WriteIncrSynthDcp="false" Dir="$PRUNDIR/design_1_test_deflate_bench_0_0_synth_1" IncludeInArchive="true">
<Strategy Version="1" Minor="2">
<StratHandle Name="Vivado Synthesis Defaults" Flow="Vivado Synthesis 2018">
<Desc>Vivado Synthesis Defaults</Desc>
</StratHandle>
<Step Id="synth_design"/>
</Strategy>
<GeneratedRun Dir="$PRUNDIR" File="gen_run.xml"/>
<ReportStrategy Name="Vivado Synthesis Default Reports" Flow="Vivado Synthesis 2018"/>
<Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
</Run>
<Run Id="impl_1" Type="Ft2:EntireDesign" Part="xc7a100tcsg324-1" ConstrsSet="constrs_1" Description="Default settings for Implementation." WriteIncrSynthDcp="false" State="current" Dir="$PRUNDIR/impl_1" SynthRun="synth_1" IncludeInArchive="true" GenFullBitstream="true">
<Strategy Version="1" Minor="2">
<StratHandle Name="Vivado Implementation Defaults" Flow="Vivado Implementation 2018"/>
<Step Id="init_design"/>
<Step Id="opt_design"/>
<Step Id="power_opt_design"/>
<Step Id="place_design"/>
<Step Id="post_place_power_opt_design"/>
<Step Id="phys_opt_design"/>
<Step Id="route_design"/>
<Step Id="post_route_phys_opt_design"/>
<Step Id="write_bitstream"/>
</Strategy>
<GeneratedRun Dir="$PRUNDIR" File="gen_run.xml"/>
<ReportStrategy Name="Vivado Implementation Default Reports" Flow="Vivado Implementation 2018"/>
<Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
</Run>
<Run Id="design_1_test_deflate_bench_0_0_impl_1" Type="Ft2:EntireDesign" Part="xc7a100tcsg324-1" ConstrsSet="design_1_test_deflate_bench_0_0" Description="Default settings for Implementation." WriteIncrSynthDcp="false" SynthRun="design_1_test_deflate_bench_0_0_synth_1" IncludeInArchive="false" GenFullBitstream="true">
<Strategy Version="1" Minor="2">
<StratHandle Name="Vivado Implementation Defaults" Flow="Vivado Implementation 2018">
<Desc>Default settings for Implementation.</Desc>
</StratHandle>
<Step Id="init_design"/>
<Step Id="opt_design"/>
<Step Id="power_opt_design"/>
<Step Id="place_design"/>
<Step Id="post_place_power_opt_design"/>
<Step Id="phys_opt_design"/>
<Step Id="route_design"/>
<Step Id="post_route_phys_opt_design"/>
<Step Id="write_bitstream"/>
</Strategy>
<ReportStrategy Name="Vivado Implementation Default Reports" Flow="Vivado Implementation 2018"/>
<Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
</Run>
</Runs>
<Board>
<Jumpers/>
</Board>
</Project>
/hdl-deflate/trunk/LICENSE
0,0 → 1,674
GNU GENERAL PUBLIC LICENSE
Version 3, 29 June 2007
 
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/hdl-deflate/trunk/Makefile
0,0 → 1,20
PYTHON=python3
 
MODULES=deflate.py test_deflate.py
 
all: build test
 
build: $(MODULES)
for p in $?; do $(PYTHON) $$p; done
 
test: icarus
 
test_fast_bench.v: $(MODULES)
for p in $?; do $(PYTHON) $$p; done
 
icarus: test_fast_bench.v
iverilog -o test_deflate test_fast_bench.v dump.v
vvp test_deflate
 
clean:
rm -f *.vcd
/hdl-deflate/trunk/deflate.py
0,0 → 1,1190
"""
MyHDL FPGA Deflate (de)compressor, see RFC 1950/1951
 
Copyright 2018 by Tom Vijlbrief
 
See: https://github.com/tomtor
 
This MyHDL FPGA implementation is partially inspired by the C++ implementation
from https://create.stephan-brumme.com/deflate-decoder
 
"""
 
from math import log2
 
from myhdl import always, block, Signal, intbv, Error, ResetSignal, \
enum, always_seq, always_comb, concat, ConcatSignal, modbv
 
IDLE, RESET, WRITE, READ, STARTC, STARTD = range(6)
 
CWINDOW = 32 # Search window for compression
 
OBSIZE = 8192 # Size of output buffer (BRAM)
IBSIZE = 4 * CWINDOW # 2048 # Size of input buffer (LUT-RAM)
 
if OBSIZE > IBSIZE:
LBSIZE = log2(OBSIZE)
else:
LBSIZE = log2(IBSIZE)
 
IBS = (1 << int(log2(IBSIZE))) - 1
 
d_state = enum('IDLE', 'HEADER', 'BL', 'READBL', 'REPEAT', 'DISTTREE', 'INIT3',
'HF1', 'HF1INIT', 'HF2', 'HF3', 'HF4', 'HF4_2', 'HF4_3',
'STATIC', 'D_NEXT', 'D_NEXT_2',
'D_INFLATE', 'SPREAD', 'NEXT', 'INFLATE', 'COPY', 'CSTATIC',
'SEARCH', 'DISTANCE', 'CHECKSUM') # , encoding='one_hot')
 
CodeLengthOrder = (16, 17, 18, 0, 8, 7, 9, 6, 10, 5, 11, 4, 12, 3, 13, 2, 14,
1, 15)
 
CopyLength = (3, 4, 5, 6, 7, 8, 9, 10, 11, 13, 15, 17, 19, 23, 27, 31, 35,
43, 51, 59, 67, 83, 99, 115, 131, 163, 195, 227, 258)
 
ExtraLengthBits = (0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 2, 2, 2, 2,
3, 3, 3, 3, 4, 4, 4, 4, 5, 5, 5, 5, 0)
 
CopyDistance = (1, 2, 3, 4, 5, 7, 9, 13, 17, 25, 33, 49, 65, 97, 129, 193,
257, 385, 513, 769, 1025, 1537, 2049, 3073, 4097, 6145, 8193,
12289, 16385, 24577)
 
ExtraDistanceBits = (0, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
 
 
@block
def deflate(i_mode, o_done, i_data, o_iprogress, o_oprogress, o_byte, i_addr,
clk, reset):
 
""" Deflate (de)compress
 
Ports:
 
"""
 
iram = [Signal(intbv()[8:]) for _ in range(IBSIZE)]
oram = [Signal(intbv()[8:]) for _ in range(OBSIZE)]
 
oaddr = Signal(intbv()[LBSIZE:])
oraddr = Signal(intbv()[LBSIZE:])
obyte = Signal(intbv()[8:])
orbyte = Signal(intbv()[8:])
 
isize = Signal(intbv()[LBSIZE:])
state = Signal(d_state.IDLE)
method = Signal(intbv()[3:])
final = Signal(bool())
do_compress = Signal(bool())
 
numLiterals = Signal(intbv()[9:])
numDistance = Signal(intbv()[6:])
numCodeLength = Signal(intbv()[9:])
b_numCodeLength = Signal(intbv()[9:])
 
CodeLengths = 19
MaxCodeLength = 15
InstantMaxBit = 10
EndOfBlock = 256
MaxBitLength = 288
# MaxToken = 285
InvalidToken = 300
 
CODEBITS = 10 # MaxCodeLength
BITBITS = 9
 
codeLength = [Signal(intbv()[4:]) for _ in range(MaxBitLength+2)]
bits = Signal(intbv()[4:])
bitLengthCount = [Signal(intbv()[9:]) for _ in range(MaxCodeLength+1)]
nextCode = [Signal(intbv()[CODEBITS:]) for _ in range(MaxCodeLength)]
reverse = Signal(intbv()[CODEBITS:])
code_bits = [Signal(intbv()[9:]) for _ in range(MaxBitLength)]
distanceLength = [Signal(intbv()[4:]) for _ in range(32)]
 
leaves = [Signal(intbv()[CODEBITS + BITBITS:]) for _ in range(512)]
lwaddr = Signal(intbv()[9:])
# lraddr = Signal(intbv()[9:])
d_leaves = [Signal(intbv()[CODEBITS + BITBITS:]) for _ in range(128)]
# rleaf = Signal(intbv()[CODEBITS + BITBITS:])
wleaf = Signal(intbv()[CODEBITS + BITBITS:])
leaf = Signal(intbv()[CODEBITS + BITBITS:])
 
minBits = Signal(intbv()[5:])
maxBits = Signal(intbv()[5:])
d_maxBits = Signal(intbv()[5:])
instantMaxBit = Signal(intbv()[InstantMaxBit:])
d_instantMaxBit = Signal(intbv()[InstantMaxBit:])
instantMask = Signal(intbv()[MaxCodeLength:])
d_instantMask = Signal(intbv()[MaxCodeLength:])
spread = Signal(intbv()[10:])
step = Signal(intbv()[10:])
 
static = Signal(bool())
 
code = Signal(intbv()[15:])
lastToken = Signal(intbv()[15:])
howOften = Signal(intbv()[9:])
 
cur_i = Signal(intbv()[LBSIZE:])
spread_i = Signal(intbv()[9:])
cur_HF1 = Signal(intbv()[10:])
cur_static = Signal(intbv()[9:])
cur_cstatic = Signal(intbv()[LBSIZE:])
cur_search = Signal(intbv(min=-CWINDOW,max=IBSIZE))
cur_dist = Signal(intbv(min=-CWINDOW,max=IBSIZE))
# cur_next = Signal(intbv()[5:])
cur_next = Signal(bool())
 
length = Signal(intbv()[LBSIZE:])
offset = Signal(intbv()[LBSIZE:])
 
di = Signal(intbv()[LBSIZE:])
old_di = Signal(intbv()[LBSIZE:])
dio = Signal(intbv()[3:])
do = Signal(intbv()[LBSIZE:])
doo = Signal(intbv()[3:])
 
b1 = Signal(intbv()[8:])
b2 = Signal(intbv()[8:])
b3 = Signal(intbv()[8:])
b4 = Signal(intbv()[8:])
 
b41 = ConcatSignal(b4, b3, b2, b1)
b41._markUsed()
 
nb = Signal(intbv()[3:])
 
filled = Signal(bool())
 
ob1 = Signal(intbv()[8:])
copy1 = Signal(intbv()[8:])
flush = Signal(bool(0))
 
adler1 = Signal(intbv()[16:])
adler2 = Signal(intbv()[16:])
ladler1 = Signal(intbv()[16:])
 
 
@always(clk.posedge)
def oramwrite():
oram[oaddr].next = obyte
leaves[lwaddr].next = wleaf
 
@always(clk.posedge)
def oramread():
orbyte.next = oram[oraddr]
# rleaf.next = leaves[lraddr]
 
@always(clk.posedge)
def fill_buf():
if not reset:
print("FILL RESET")
nb.next = 0
b1.next = 0
b2.next = 0
b3.next = 0
b4.next = 0
else:
if isize < 4:
pass
elif i_mode == STARTC or i_mode == STARTD:
nb.next = 0
else:
# print("FILL", di, isize)
nb.next = 4
b1.next = iram[di & IBS]
b2.next = iram[di+1 & IBS]
b3.next = iram[di+2 & IBS]
b4.next = iram[di+3 & IBS]
"""
@always(clk.posedge)
def fill_buf():
if not reset:
print("FILL RESET")
nb.next = 0
old_di.next = 0
b1.next = 0
b2.next = 0
b3.next = 0
b4.next = 0
else:
if isize < 4:
pass
elif i_mode == STARTC or i_mode == STARTD:
nb.next = 0
elif not filled and nb == 4 and di - old_di <= 4:
delta = di - old_di
if delta == 1:
# print("delta == 1")
b1.next = b2
b2.next = b3
b3.next = b4
b4.next = iram[di+3 & IBS]
# nb.next = 4
elif delta == 2:
b1.next = b3
b2.next = b4
b3.next = iram[di+2 & IBS]
nb.next = 3
elif delta == 3:
b1.next = b4
b2.next = iram[di+1 & IBS]
nb.next = 2
elif delta == 4:
b1.next = iram[di & IBS]
nb.next = 1
else:
pass
elif not filled or nb == 0:
# print("nb.next = 1")
b1.next = iram[di & IBS]
nb.next = 1
elif not filled or nb == 1:
b2.next = iram[di+1 & IBS]
nb.next = 2
elif not filled or nb == 2:
b3.next = iram[di+2 & IBS]
nb.next = 3
elif not filled or nb == 3:
b4.next = iram[di+3 & IBS]
nb.next = 4
else:
pass
old_di.next = di
"""
 
def get4(boffset, width):
if nb != 4:
print("----NB----")
raise Error("NB")
return (b41 >> (dio + boffset)) & ((1 << width) - 1)
# return b41[dio + boffset + width: dio + boffset]
 
def adv(width):
# print("adv", width, di, dio, do, doo)
nshift = ((dio + width) >> 3)
# print("nshift: ", nshift)
 
o_iprogress.next = di
dio.next = (dio + width) & 0x7
di.next = di + nshift
 
if nshift != 0:
filled.next = False
 
def put(d, width):
if width > 9:
raise Error("width > 9")
if d > ((1 << width) - 1):
raise Error("too big")
# print("put:", d, width, do, doo, ob1, (ob1 | (d << doo)))
return (ob1 | (d << doo)) & 0xFF
 
def put_adv(d, width):
if width > 9:
raise Error("width > 9")
if d > ((1 << width) - 1):
raise Error("too big")
# print("put_adv:", d, width, do, doo, di, dio)
pshift = (doo + width) > 8
# print("pshift: ", pshift)
if pshift:
carry = width - (8 - doo)
# print("carry:", carry, d >> (8 - carry))
ob1.next = d >> (width - carry)
else:
# print("put_adv:", ob1, d, doo)
ob1.next = ob1 | (d << doo)
# print("ob1.next", ob1 | (d << doo))
do.next = do + pshift
o_oprogress.next = do + pshift
doo_next = (doo + width) & 0x7
if doo_next == 0:
flush.next = True
doo.next = doo_next
 
def do_flush():
# print("FLUSH")
flush.next = False
ob1.next = 0
o_oprogress.next = do + 1
do.next = do + 1
 
def rev_bits(b, nb):
if b >= 1 << nb:
raise Error("too few bits")
print("too few bits")
r = (((b >> 14) & 0x1) << 0) | (((b >> 13) & 0x1) << 1) | \
(((b >> 12) & 0x1) << 2) | (((b >> 11) & 0x1) << 3) | \
(((b >> 10) & 0x1) << 4) | (((b >> 9) & 0x1) << 5) | \
(((b >> 8) & 0x1) << 6) | (((b >> 7) & 0x1) << 7) | \
(((b >> 6) & 0x1) << 8) | (((b >> 5) & 0x1) << 9) | \
(((b >> 4) & 0x1) << 10) | (((b >> 3) & 0x1) << 11) | \
(((b >> 2) & 0x1) << 12) | (((b >> 1) & 0x1) << 13) | \
(((b >> 0) & 0x1) << 14)
r >>= (15 - nb)
return r
 
def makeLeaf(lcode, lbits):
if lcode >= 1 << CODEBITS:
raise Error("code too big")
if lbits >= 1 << BITBITS:
raise Error("bits too big")
return (lcode << BITBITS) | lbits
 
def get_bits(aleaf):
return aleaf & ((1 << BITBITS) - 1)
 
def get_code(aleaf):
return (aleaf >> BITBITS) # & ((1 << CODEBITS) - 1)
 
@always(clk.posedge)
def io_logic():
if i_mode == WRITE:
 
# print("WRITE:", i_addr, i_data)
iram[i_addr & IBS].next = i_data
isize.next = i_addr
 
elif i_mode == READ:
 
# o_data.next = oram[i_addr]
# oraddr.next = i_addr
o_byte.next = oram[i_addr]
 
else:
pass
 
@always(clk.posedge)
def logic():
if not reset:
print("DEFLATE RESET")
state.next = d_state.IDLE
o_done.next = False
# oaddr.next = 0
# obyte.next = 0
else:
 
if state == d_state.IDLE:
 
if i_mode == STARTC:
 
print("STARTC")
do_compress.next = True
method.next = 1
o_done.next = False
o_iprogress.next = 0
o_oprogress.next = 0
di.next = 0
dio.next = 0
do.next = 0
doo.next = 0
filled.next = True
cur_static.next = 0
state.next = d_state.STATIC
 
elif i_mode == STARTD:
 
do_compress.next = False
o_done.next = False
o_iprogress.next = 0
o_oprogress.next = 0
di.next = 0
dio.next = 0
# oaddr.next = 0
do.next = 0
doo.next = 0
filled.next = True
state.next = d_state.HEADER
 
else:
pass
 
elif state == d_state.HEADER:
 
if not filled:
filled.next = True
elif nb < 4:
pass
# Read block header
elif di == 0:
#print(iram[di & IBS])
#if iram[di & IBS] == 0x78:
if b1 == 0x78:
print("deflate mode")
else:
print(di, dio, nb, b1, b2, b3, b4, isize)
raise Error("unexpected mode")
o_done.next = True
state.next = d_state.IDLE
adv(16)
else:
if get4(0, 1):
print("final")
final.next = True
hm = get4(1, 2)
method.next = hm
print("method", hm)
# print(di, dio, nb, b1, b2, b3, b4, hm, isize)
if hm == 2:
state.next = d_state.BL
numCodeLength.next = 0
numLiterals.next = 0
static.next = False
adv(3)
elif hm == 1:
static.next = True
cur_static.next = 0
state.next = d_state.STATIC
adv(3)
elif hm == 0:
state.next = d_state.COPY
skip = 8 - dio
if skip <= 2:
skip = 16 - dio
length.next = get4(skip, 16)
adv(skip + 16)
cur_i.next = 0
offset.next = 7
else:
state.next = d_state.IDLE
print("Bad method")
raise Error("Bad method")
 
elif state == d_state.CSTATIC:
 
# print("CSTATIC", cur_i, ob1, do, doo, isize)
 
no_adv = 0
if not filled:
no_adv = 1
filled.next = True
elif nb < 4:
no_adv = 1
pass
elif cur_cstatic == 0:
flush.next = False
ob1.next = 0
adler1.next = 1
adler2.next = 0
ladler1.next = 0
oaddr.next = 0
obyte.next = 0x78
elif cur_cstatic == 1:
oaddr.next = 1
obyte.next = 0x9c
do.next = 2
elif cur_cstatic == 2:
oaddr.next = do
obyte.next = put(0x3, 3)
put_adv(0x3, 3)
elif flush:
print("flush", do, ob1)
no_adv = 1
oaddr.next = do
obyte.next = ob1
do_flush()
elif cur_cstatic - 3 > isize:
if cur_cstatic - 3 == isize + 1:
print("Put EOF", do)
cs_i = EndOfBlock
outlen = codeLength[cs_i]
outbits = code_bits[cs_i]
print("EOF BITS:", cs_i, outlen, outbits)
oaddr.next = do
obyte.next = put(outbits, outlen)
put_adv(outbits, outlen)
elif cur_cstatic - 3 == isize + 2:
print("calc end adler")
adler2.next = (adler2 + ladler1) % 65521
if doo != 0:
oaddr.next = do
obyte.next = ob1
do.next = do + 1
elif cur_cstatic - 3 == isize + 3:
print("c1")
oaddr.next = do
obyte.next = adler2 >> 8
do.next = do + 1
elif cur_cstatic - 3 == isize + 4:
print("c2")
oaddr.next = do
obyte.next = adler2 & 0xFF
do.next = do + 1
elif cur_cstatic - 3 == isize + 5:
print("c3")
oaddr.next = do
obyte.next = adler1 >> 8
do.next = do + 1
elif cur_cstatic - 3 == isize + 6:
print("c4")
oaddr.next = do
obyte.next = adler1 & 0xFF
elif cur_cstatic - 3 == isize + 7:
print("EOF finish", do)
o_done.next = True
o_oprogress.next = do + 1
state.next = d_state.IDLE
else:
print(cur_cstatic, isize)
raise Error("???")
else:
bdata = iram[di]
# Fix this when > 1 byte output:
# print("cs1", bdata)
adler1_next = (adler1 + bdata) % 65521
adler1.next = adler1_next
adler2.next = (adler2 + ladler1) % 65521
ladler1.next = adler1_next
# print("in: ", bdata, di, isize)
state.next = d_state.SEARCH
cur_search.next = di - 1 # - 3
 
if not no_adv:
cur_cstatic.next = cur_cstatic + 1
 
elif state == d_state.DISTANCE:
 
if flush:
do_flush()
else:
# print("DISTANCE", di, do, cur_i, cur_dist)
nextdist = CopyDistance[cur_i+1]
if nextdist > cur_dist:
copydist = CopyDistance[cur_i]
# print("Found distance", copydist)
extra_dist = cur_dist - copydist
# print("extra dist", extra_dist)
extra_bits = ExtraDistanceBits[cur_i // 2]
# print("extra bits", extra_bits)
if extra_dist > ((1 << extra_bits) - 1):
raise Error("too few extra")
# print("rev", cur_i, rev_bits(cur_i, 5))
outcode = (rev_bits(cur_i, 5) | (extra_dist << 5))
# print("outcode", outcode)
oaddr.next = do
obyte.next = put(outcode, 5 + extra_bits)
put_adv(outcode, 5 + extra_bits)
#state.next = d_state.CSTATIC
cur_i.next = di - length + 1
state.next = d_state.CHECKSUM
else:
cur_i.next = cur_i + 1
 
elif state == d_state.CHECKSUM:
 
if cur_i < di:
# print("CHECKSUM", cur_i, di, iram[cur_i])
bdata = iram[cur_i & IBS]
adler1_next = (adler1 + bdata) % 65521
adler1.next = adler1_next
adler2.next = (adler2 + ladler1) % 65521
ladler1.next = adler1_next
cur_i.next = cur_i.next + 1
else:
state.next = d_state.CSTATIC
 
elif state == d_state.SEARCH:
 
if not filled:
filled.next = True
elif nb < 4:
pass
else:
if cur_search >= 0 \
and cur_search >= di - CWINDOW \
and di < isize - 3:
if iram[cur_search & IBS] == b1 and \
iram[cur_search+1 & IBS] == b2 and \
iram[cur_search+2 & IBS] == b3:
# Length is 3 code
lencode = 257
match = 3
 
if di < isize - 4 and \
iram[cur_search+3 & IBS] == b4: # iram[di + 3 & IBS]:
lencode = 258
match = 4
if di < isize - 5 and \
iram[cur_search+4 & IBS] == iram[di + 4 & IBS]:
lencode = 259
match = 5
"""
if di < isize - 6 and \
iram[cur_search+5 & IBS] == iram[di + 5 & IBS]:
lencode = 260
match = 6
if di < isize - 7 and \
iram[cur_search+6 & IBS] == iram[di + 6 & IBS]:
lencode = 261
match = 7
if di < isize - 8 and \
iram[cur_search+7 & IBS] == iram[di + 7 & IBS]:
lencode = 262
match = 8
if di < isize - 9 and \
iram[cur_search+8 & IBS] == iram[di + 8 & IBS]:
lencode = 263
match = 9
if di < isize - 10 and \
iram[cur_search+9 & IBS] == iram[di + 9 & IBS]:
lencode = 264
match = 10
"""
print("found:", cur_search, di, isize, match)
outlen = codeLength[lencode]
outbits = code_bits[lencode]
# print("BITS:", outlen, outbits)
oaddr.next = do
obyte.next = put(outbits, outlen)
put_adv(outbits, outlen)
 
distance = di - cur_search
# print("distance", distance)
cur_dist.next = distance
cur_i.next = 0
# adv(match * 8)
di.next = di + match
cur_cstatic.next = cur_cstatic + match - 1
length.next = match
state.next = d_state.DISTANCE
else:
cur_search.next = cur_search - 1
else:
bdata = iram[di]
# adv(8)
di.next = di + 1
outlen = codeLength[bdata]
outbits = code_bits[bdata]
# print("CBITS:", bdata, outlen, outbits)
oaddr.next = do
obyte.next = put(outbits, outlen)
put_adv(outbits, outlen)
state.next = d_state.CSTATIC
 
elif state == d_state.STATIC:
 
for stat_i in range(0, 144):
codeLength[stat_i].next = 8
for stat_i in range(144, 256):
codeLength[stat_i].next = 9
for stat_i in range(256, 280):
codeLength[stat_i].next = 7
for stat_i in range(280, 288):
codeLength[stat_i].next = 8
numCodeLength.next = 288
cur_HF1.next = 0
state.next = d_state.HF1
"""
if cur_static < 288:
if cur_static < 144:
codeLength[cur_static].next = 8
elif cur_static < 256:
codeLength[cur_static].next = 9
elif cur_static < 280:
codeLength[cur_static].next = 7
else:
codeLength[cur_static].next = 8
cur_static.next = cur_static + 1
else:
numCodeLength.next = 288
cur_HF1.next = 0
state.next = d_state.HF1
"""
 
elif state == d_state.BL:
 
if not filled:
filled.next = True
elif nb < 4:
pass
elif numLiterals == 0:
numLiterals.next = 257 + get4(0, 5)
print("NL:", 257 + get4(0, 5))
numDistance.next = 1 + get4(5, 5)
print("ND:", 1 + get4(5, 5))
b_numCodeLength.next = 4 + get4(10, 4)
print("NCL:", 4 + get4(10, 4))
numCodeLength.next = 0
adv(14)
else:
if numCodeLength < CodeLengths:
clo_i = CodeLengthOrder[numCodeLength]
# print("CLI: ", clo_i)
if numCodeLength < b_numCodeLength:
codeLength[clo_i].next = get4(0, 3)
adv(3)
else:
# print("SKIP")
codeLength[clo_i].next = 0
numCodeLength.next = numCodeLength + 1
else:
numCodeLength.next = CodeLengths
cur_HF1.next = 0
state.next = d_state.HF1
 
elif state == d_state.READBL:
 
if not filled:
filled.next = True
elif nb < 4:
pass
elif numCodeLength < numLiterals + numDistance:
# print(numLiterals + numDistance, numCodeLength)
n_adv = 0
if code < 16:
howOften.next = 1
lastToken.next = code
elif code == 16:
howOften.next = 3 + get4(0, 2)
n_adv = 2
elif code == 17:
howOften.next = 3 + get4(0, 3)
lastToken.next = 0
n_adv = 3
elif code == 18:
howOften.next = 11 + get4(0, 7)
lastToken.next = 0
n_adv = 7
else:
raise Error("Invalid data")
 
# print(numCodeLength, howOften, code, di, n_adv)
if n_adv != 0:
adv(n_adv)
 
state.next = d_state.REPEAT
else:
print("FILL UP")
 
for dbl_i in range(32):
dbl = 0
if dbl_i + numLiterals < numCodeLength:
dbl = int(codeLength[dbl_i + numLiterals])
# print("dbl:", dbl)
distanceLength[dbl_i].next = dbl
 
# print(numCodeLength, numLiterals, MaxBitLength)
 
cur_i.next = numLiterals
state.next = d_state.INIT3
 
elif state == d_state.INIT3:
 
if cur_i < MaxBitLength:
codeLength[cur_i].next = 0
cur_i.next = cur_i + 1
else:
numCodeLength.next = MaxBitLength
method.next = 3 # Start building bit tree
cur_HF1.next = 0
state.next = d_state.HF1
 
elif state == d_state.DISTTREE:
 
print("DISTTREE")
for dist_i in range(32):
codeLength[dist_i].next = distanceLength[dist_i]
# print(dist_i, distanceLength[dist_i])
numCodeLength.next = 32
method.next = 4 # Start building dist tree
# cur_i.next = 0
cur_HF1.next = 0
state.next = d_state.HF1
 
elif state == d_state.REPEAT:
 
# print("HOWOFTEN: ", numCodeLength, howOften)
if howOften != 0:
codeLength[numCodeLength].next = lastToken
howOften.next = howOften - 1
numCodeLength.next = numCodeLength + 1
elif numCodeLength < numLiterals + numDistance:
cur_next.next = 0
state.next = d_state.NEXT
else:
state.next = d_state.READBL
 
elif state == d_state.HF1:
 
if cur_HF1 < len(bitLengthCount):
bitLengthCount[cur_HF1].next = 0
if cur_HF1 < len(d_leaves):
d_leaves[cur_HF1].next = 0
if method != 4 and cur_HF1 < len(leaves):
lwaddr.next = cur_HF1
wleaf.next = 0
# leaves[cur_HF1].next = 0
limit = len(leaves)
if method == 4:
limit = len(d_leaves)
if cur_HF1 < limit:
cur_HF1.next = cur_HF1 + 1
else:
print("DID HF1 INIT")
cur_i.next = 0
state.next = d_state.HF1INIT
 
elif state == d_state.HF1INIT:
# get frequencies of each bit length and ignore 0's
 
# print("HF1")
if cur_i < numCodeLength:
j = codeLength[cur_i]
bitLengthCount[j].next = bitLengthCount[j] + 1
# print(cur_i, j, bitLengthCount[j] + 1)
cur_i.next = cur_i + 1
else:
bitLengthCount[0].next = 0
state.next = d_state.HF2
cur_i.next = 1
if method == 4:
d_maxBits.next = 0
else:
maxBits.next = 0
minBits.next = MaxCodeLength
 
elif state == d_state.HF2:
# shortest and longest codes
 
# print("HF2")
if cur_i <= MaxCodeLength:
if bitLengthCount[cur_i] != 0:
if cur_i < minBits:
minBits.next = cur_i
if method == 4:
if cur_i > d_maxBits:
d_maxBits.next = cur_i
else:
if cur_i > maxBits:
maxBits.next = cur_i
cur_i.next = cur_i + 1
else:
print(minBits, maxBits)
t = InstantMaxBit
if method == 4:
if t > int(d_maxBits):
t = int(d_maxBits)
d_instantMaxBit.next = t
d_instantMask.next = (1 << t) - 1
else:
if t > int(maxBits):
t = int(maxBits)
instantMaxBit.next = t
instantMask.next = (1 << t) - 1
print((1 << t) - 1)
state.next = d_state.HF3
cur_i.next = minBits
code.next = 0
for hf2_i in range(len(nextCode)):
nextCode[hf2_i].next = 0
print("to HF3")
 
elif state == d_state.HF3:
# find bit code for first element of each bitLength group
 
# print("HF3")
amb = maxBits
if method == 4:
amb = d_maxBits
if cur_i <= amb:
ncode = ((code + bitLengthCount[cur_i - 1]) << 1)
code.next = ncode
nextCode[cur_i].next = ncode
# print(cur_i, ncode)
cur_i.next = cur_i + 1
else:
state.next = d_state.HF4
cur_i.next = 0
spread_i.next = 0
print("to HF4")
 
elif state == d_state.HF4_2:
 
canonical = nextCode[bits]
nextCode[bits].next = nextCode[bits] + 1
if bits > MaxCodeLength:
raise Error("too many bits: %d" % bits)
# print(canonical, bits)
reverse.next = rev_bits(canonical, bits)
# print("LEAF: ", spread_i, bits, reverse, canonical)
leaf.next = makeLeaf(spread_i, bits)
state.next = d_state.HF4_3
 
elif state == d_state.HF4_3:
 
if method == 4:
d_leaves[reverse].next = leaf # makeLeaf(spread_i, bits)
if bits <= d_instantMaxBit:
if reverse + (1 << bits) <= d_instantMask:
step.next = 1 << bits
spread.next = reverse + (1 << bits)
state.next = d_state.SPREAD
else:
spread_i.next = spread_i + 1
state.next = d_state.HF4
else:
state.next = d_state.HF4
spread_i.next = spread_i + 1
else:
wleaf.next = leaf
lwaddr.next = reverse
# leaves[reverse].next = leaf # makeLeaf(spread_i, bits)
code_bits[spread_i].next = reverse
if bits <= instantMaxBit:
if reverse + (1 << bits) <= instantMask:
step.next = 1 << bits
spread.next = reverse + (1 << bits)
state.next = d_state.SPREAD
else:
spread_i.next = spread_i + 1
state.next = d_state.HF4
else:
spread_i.next = spread_i + 1
state.next = d_state.HF4
 
elif state == d_state.HF4:
# create binary codes for each literal
 
if spread_i < numCodeLength:
bits_next = codeLength[spread_i]
if bits_next != 0:
bits.next = bits_next
state.next = d_state.HF4_2
else:
spread_i.next = spread_i + 1
else:
if do_compress:
state.next = d_state.CSTATIC
cur_cstatic.next = 0
elif method == 3:
state.next = d_state.DISTTREE
elif method == 4:
print("DEFLATE m2!")
state.next = d_state.NEXT
elif method == 2:
numCodeLength.next = 0
state.next = d_state.NEXT
else:
state.next = d_state.NEXT
cur_next.next = 0
cur_i.next = 0
 
elif state == d_state.SPREAD:
 
if method == 4:
# print(spread, spread_i)
d_leaves[spread].next = makeLeaf(
spread_i, codeLength[spread_i])
else:
lwaddr.next = spread
wleaf.next = makeLeaf(spread_i, codeLength[spread_i])
# leaves[spread].next = makeLeaf(spread_i, codeLength[spread_i])
# print("SPREAD:", spread, step, instantMask)
aim = instantMask
if method == 4:
aim = d_instantMask
if spread > aim - step:
spread_i.next = spread_i + 1
state.next = d_state.HF4
else:
spread.next = spread + step
 
elif state == d_state.NEXT:
 
if not filled:
filled.next = True
elif nb < 4:
pass
elif cur_next == 0:
# print("INIT:", di, dio, instantMaxBit, maxBits)
cto = get4(0, maxBits)
cur_next.next = 1 # instantMaxBit
mask = (1 << instantMaxBit) - 1
# lraddr.next = (cto & mask)
leaf.next = leaves[cto & mask]
# print(cur_next, mask, leaf, maxBits)
else:
if get_bits(leaf) < 1:
print("< 1 bits: ")
raise Error("< 1 bits: ")
adv(get_bits(leaf))
if get_code(leaf) == 0:
print("leaf 0")
code.next = get_code(leaf)
# print("ADV:", di, get_bits(leaf), get_code(leaf))
if method == 2:
state.next = d_state.READBL
else:
state.next = d_state.INFLATE
 
elif state == d_state.D_NEXT:
 
if not filled:
filled.next = True
elif nb < 4:
pass
else:
# print("D_INIT:", di, dio, d_instantMaxBit, d_maxBits)
token = code - 257
# print("token: ", token)
extraLength = ExtraLengthBits[token]
# print("extra length bits:", extraLength)
cto = get4(extraLength, d_maxBits)
mask = (1 << d_instantMaxBit) - 1
leaf.next = d_leaves[cto & mask]
state.next = d_state.D_NEXT_2
 
elif state == d_state.D_NEXT_2:
 
if get_bits(leaf) == 0:
raise Error("0 bits")
token = code - 257
# print("E2:", token, leaf)
tlength = CopyLength[token]
# print("tlength:", tlength)
extraLength = ExtraLengthBits[token]
# print("extra length bits:", extraLength)
tlength += get4(0, extraLength)
# print("extra length:", tlength)
distanceCode = get_code(leaf)
# print("distance code:", distanceCode)
distance = CopyDistance[distanceCode]
# print("distance:", distance)
moreBits = ExtraDistanceBits[distanceCode >> 1]
# print("more bits:", moreBits)
# print("bits:", get_bits(leaf))
mored = get4(extraLength + get_bits(leaf), moreBits)
# print("mored:", mored)
distance += mored
# print("distance more:", distance)
adv(moreBits + extraLength + get_bits(leaf))
# print("offset:", do - distance)
# print("FAIL?: ", di, dio, do, b1, b2, b3, b4)
offset.next = do - distance
length.next = tlength
# cur_next.next = 0
cur_i.next = 0
oraddr.next = offset
state.next = d_state.COPY
 
elif state == d_state.INFLATE:
 
if not filled:
filled.next = True
elif nb < 4: # nb <= 2 or (nb == 3 and dio > 1):
# print("EXTRA FETCH", nb, dio)
pass # fetch more bytes
elif di > isize - 3: # checksum is 4 bytes
state.next = d_state.IDLE
o_done.next = True
print("NO EOF ", di)
raise Error("NO EOF!")
elif code == EndOfBlock:
print("EOF:", di, do)
if not final:
state.next = d_state.HEADER
else:
o_done.next = True
o_oprogress.next = do
state.next = d_state.IDLE
else:
if code < EndOfBlock:
# print("B:", code, di, do)
oaddr.next = do
obyte.next = code
o_oprogress.next = do + 1
do.next = do + 1
cur_next.next = 0
state.next = d_state.NEXT
# raise Error("DF!")
elif code == InvalidToken:
raise Error("invalid token")
else:
if static:
token = code - 257
# print("E:", token)
tlength = CopyLength[token]
# print("tlength", tlength)
extraLength = ExtraLengthBits[token]
# print("extralengthbits", extraLength)
tlength += get4(0, extraLength)
# print("tlength extra", tlength)
t = get4(extraLength, 5)
distanceCode = rev_bits(t, 5)
# print("dcode", distanceCode)
distance = CopyDistance[distanceCode]
# print("distance", distance)
moreBits = ExtraDistanceBits[distanceCode
>> 1]
distance += get4(extraLength + 5, moreBits)
# print("distance2", distance)
adv(extraLength + 5 + moreBits)
# print("adv", extraLength + 5 + moreBits)
offset.next = do - distance
length.next = tlength
cur_i.next = 0
oraddr.next = offset
state.next = d_state.COPY
else:
# raise Error("TO DO")
state.next = d_state.D_NEXT
cur_next.next = 0
 
elif state == d_state.COPY:
 
if not filled:
filled.next = True
elif nb < 4:
pass
elif method == 0:
if cur_i < length:
oaddr.next = do
obyte.next = b3
adv(8)
cur_i.next = cur_i + 1
do.next = do + 1
o_oprogress.next = do + 1
elif not final:
state.next = d_state.HEADER
else:
o_oprogress.next = do # + 1
o_done.next = True
state.next = d_state.IDLE
elif cur_i < length + 1:
oraddr.next = offset + cur_i
if cur_i == 1:
copy1.next = orbyte
if cur_i > 1:
if offset + cur_i == do + 1:
obyte.next = copy1
else:
obyte.next = orbyte
oaddr.next = do
o_oprogress.next = do + 1
do.next = do + 1
cur_i.next = cur_i + 1
else:
oaddr.next = do
if offset + cur_i == do + 1:
obyte.next = copy1
else:
obyte.next = orbyte
do.next = do + 1
o_oprogress.next = do + 1
cur_next.next = 0
state.next = d_state.NEXT
 
else:
 
print("unknown state?!")
state.next = d_state.IDLE
 
return io_logic, logic, fill_buf, oramwrite, oramread
 
 
if __name__ == "__main__":
d = deflate(Signal(intbv()[3:]), Signal(bool(0)),
Signal(intbv()[8:]), Signal(intbv()[LBSIZE:]),
Signal(intbv()[LBSIZE:]),
Signal(intbv()[8:]), Signal(intbv()[LBSIZE:]),
Signal(bool(0)), ResetSignal(1, 0, True))
d.convert()
/hdl-deflate/trunk/deflate.v
0,0 → 1,2398
// File: deflate.v
// Generated by MyHDL 0.10
// Date: Thu Dec 20 18:23:02 2018
 
 
`timescale 1ns/10ps
 
module deflate (
i_mode,
o_done,
i_data,
o_iprogress,
o_oprogress,
o_byte,
i_addr,
clk,
reset
);
// Deflate (de)compress
//
// Ports:
 
input [2:0] i_mode;
output o_done;
reg o_done;
input [7:0] i_data;
output [12:0] o_iprogress;
reg [12:0] o_iprogress;
output [12:0] o_oprogress;
reg [12:0] o_oprogress;
output [7:0] o_byte;
reg [7:0] o_byte;
input [12:0] i_addr;
input clk;
input reset;
 
reg [18:0] wleaf;
reg [9:0] step;
reg static;
reg [4:0] state;
reg [8:0] spread_i;
reg [9:0] spread;
reg [9:0] reverse;
reg [7:0] orbyte;
reg [12:0] oraddr;
reg [12:0] offset;
reg [7:0] obyte;
reg [7:0] ob1;
reg [12:0] oaddr;
reg [8:0] numLiterals;
reg [5:0] numDistance;
reg [8:0] numCodeLength;
reg [2:0] nb;
reg [4:0] minBits;
reg [2:0] method;
reg [4:0] maxBits;
reg [8:0] lwaddr;
reg [12:0] length;
reg [18:0] leaf;
reg [14:0] lastToken;
reg [15:0] ladler1;
reg [12:0] isize;
reg [9:0] instantMaxBit;
reg [14:0] instantMask;
reg [8:0] howOften;
reg flush;
reg final;
reg filled;
reg [2:0] doo;
reg do_compress;
reg [12:0] do;
reg [2:0] dio;
reg [12:0] di;
reg [4:0] d_maxBits;
reg [9:0] d_instantMaxBit;
reg [14:0] d_instantMask;
reg [8:0] cur_static;
reg signed [7:0] cur_search;
reg cur_next;
reg [12:0] cur_i;
reg signed [7:0] cur_dist;
reg [12:0] cur_cstatic;
reg [9:0] cur_HF1;
reg [7:0] copy1;
reg [14:0] code;
reg [3:0] bits;
reg [8:0] b_numCodeLength;
wire [31:0] b41;
reg [7:0] b4;
reg [7:0] b3;
reg [7:0] b2;
reg [7:0] b1;
reg [15:0] adler2;
reg [15:0] adler1;
reg [7:0] oram [0:8192-1];
reg [9:0] nextCode [0:15-1];
reg [18:0] leaves [0:512-1];
reg [7:0] iram [0:128-1];
reg [3:0] distanceLength [0:32-1];
reg [18:0] d_leaves [0:128-1];
reg [8:0] code_bits [0:288-1];
reg [3:0] codeLength [0:290-1];
reg [8:0] bitLengthCount [0:16-1];
 
assign b41[32-1:24] = b4;
assign b41[24-1:16] = b3;
assign b41[16-1:8] = b2;
assign b41[8-1:0] = b1;
 
task MYHDL3_adv;
input width;
integer width;
integer nshift;
begin: MYHDL77_RETURN
nshift = ((dio + width) >>> 3);
o_iprogress <= di;
dio <= ((dio + width) & 7);
di <= ($signed({1'b0, di}) + nshift);
if ((nshift != 0)) begin
filled <= 1'b0;
end
end
endtask
 
function integer MYHDL4_get4;
input boffset;
input width;
begin: MYHDL78_RETURN
if ((nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL4_get4 = ((b41 >>> (dio + boffset)) & ((1 << width) - 1));
disable MYHDL78_RETURN;
end
endfunction
 
function integer MYHDL5_get4;
input boffset;
input width;
integer width;
begin: MYHDL79_RETURN
if ((nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL5_get4 = ((b41 >>> (dio + boffset)) & ((1 << width) - 1));
disable MYHDL79_RETURN;
end
endfunction
 
task MYHDL6_adv;
input width;
integer width;
integer nshift;
begin: MYHDL80_RETURN
nshift = ((dio + width) >>> 3);
o_iprogress <= di;
dio <= ((dio + width) & 7);
di <= ($signed({1'b0, di}) + nshift);
if ((nshift != 0)) begin
filled <= 1'b0;
end
end
endtask
 
task MYHDL7_adv;
input width;
integer width;
integer nshift;
begin: MYHDL81_RETURN
nshift = ((dio + width) >>> 3);
o_iprogress <= di;
dio <= ((dio + width) & 7);
di <= ($signed({1'b0, di}) + nshift);
if ((nshift != 0)) begin
filled <= 1'b0;
end
end
endtask
 
function integer MYHDL8_get4;
input boffset;
integer boffset;
input width;
integer width;
begin: MYHDL82_RETURN
if ((nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL8_get4 = ($signed($signed({1'b0, b41}) >>> ($signed({1'b0, dio}) + boffset)) & ((1 << width) - 1));
disable MYHDL82_RETURN;
end
endfunction
 
task MYHDL9_adv;
input width;
integer width;
integer nshift;
begin: MYHDL83_RETURN
nshift = $signed(($signed({1'b0, dio}) + width) >>> 3);
o_iprogress <= di;
dio <= (($signed({1'b0, dio}) + width) & 7);
di <= ($signed({1'b0, di}) + nshift);
if ((nshift != 0)) begin
filled <= 1'b0;
end
end
endtask
 
function integer MYHDL10_put;
input d;
integer d;
input width;
integer width;
begin: MYHDL84_RETURN
if ((width > 9)) begin
$finish;
end
if (($signed({1'b0, d}) > ((1 << width) - 1))) begin
$finish;
end
MYHDL10_put = ((ob1 | (d << doo)) & 255);
disable MYHDL84_RETURN;
end
endfunction
 
task MYHDL11_put_adv;
input d;
integer d;
input width;
integer width;
reg pshift;
integer carry;
integer doo_next;
begin: MYHDL85_RETURN
if ((width > 9)) begin
$finish;
end
if (($signed({1'b0, d}) > ((1 << width) - 1))) begin
$finish;
end
pshift = ((doo + width) > 8);
if (pshift) begin
carry = ($signed({1'b0, width}) - (8 - $signed({1'b0, doo})));
ob1 <= $signed($signed({1'b0, d}) >>> ($signed({1'b0, width}) - carry));
end
else begin
ob1 <= (ob1 | (d << doo));
end
do <= (do + pshift);
o_oprogress <= (do + pshift);
doo_next = ((doo + width) & 7);
if ((doo_next == 0)) begin
flush <= 1'b1;
end
doo <= doo_next;
end
endtask
 
task MYHDL12_do_flush;
begin: MYHDL86_RETURN
flush <= 1'b0;
ob1 <= 0;
o_oprogress <= (do + 1);
do <= (do + 1);
end
endtask
 
function integer MYHDL13_put;
input [9-1:0] d;
input [4-1:0] width;
begin: MYHDL87_RETURN
if ((width > 9)) begin
$finish;
end
if (($signed({1'b0, d}) > ((1 << width) - 1))) begin
$finish;
end
MYHDL13_put = ((ob1 | (d << doo)) & 255);
disable MYHDL87_RETURN;
end
endfunction
 
task MYHDL14_put_adv;
input [9-1:0] d;
input [4-1:0] width;
reg pshift;
integer carry;
integer doo_next;
begin: MYHDL88_RETURN
if ((width > 9)) begin
$finish;
end
if (($signed({1'b0, d}) > ((1 << width) - 1))) begin
$finish;
end
pshift = ((doo + width) > 8);
if (pshift) begin
carry = ($signed({1'b0, width}) - (8 - $signed({1'b0, doo})));
ob1 <= $signed($signed({1'b0, d}) >>> ($signed({1'b0, width}) - carry));
end
else begin
ob1 <= (ob1 | (d << doo));
end
do <= (do + pshift);
o_oprogress <= (do + pshift);
doo_next = ((doo + width) & 7);
if ((doo_next == 0)) begin
flush <= 1'b1;
end
doo <= doo_next;
end
endtask
 
task MYHDL15_do_flush;
begin: MYHDL89_RETURN
flush <= 1'b0;
ob1 <= 0;
o_oprogress <= (do + 1);
do <= (do + 1);
end
endtask
 
function integer MYHDL16_rev_bits;
input [13-1:0] b;
input nb;
integer nb;
integer r;
begin: MYHDL90_RETURN
if ((b >= (1 << nb))) begin
$finish;
$write("too few bits");
$write("\n");
end
r = (((((((((((((((((b >>> 14) & 1) << 0) | (((b >>> 13) & 1) << 1)) | (((b >>> 12) & 1) << 2)) | (((b >>> 11) & 1) << 3)) | (((b >>> 10) & 1) << 4)) | (((b >>> 9) & 1) << 5)) | (((b >>> 8) & 1) << 6)) | (((b >>> 7) & 1) << 7)) | (((b >>> 6) & 1) << 8)) | (((b >>> 5) & 1) << 9)) | (((b >>> 4) & 1) << 10)) | (((b >>> 3) & 1) << 11)) | (((b >>> 2) & 1) << 12)) | (((b >>> 1) & 1) << 13)) | (((b >>> 0) & 1) << 14));
r = r >>> (15 - $signed({1'b0, nb}));
MYHDL16_rev_bits = r;
disable MYHDL90_RETURN;
end
endfunction
 
function integer MYHDL17_put;
input d;
integer d;
input width;
integer width;
begin: MYHDL91_RETURN
if ((width > 9)) begin
$finish;
end
if ((d > ((1 << width) - 1))) begin
$finish;
end
MYHDL17_put = (($signed({1'b0, ob1}) | (d << $signed({1'b0, doo}))) & 255);
disable MYHDL91_RETURN;
end
endfunction
 
task MYHDL18_put_adv;
input d;
integer d;
input width;
integer width;
reg pshift;
integer carry;
integer doo_next;
begin: MYHDL92_RETURN
if ((width > 9)) begin
$finish;
end
if ((d > ((1 << width) - 1))) begin
$finish;
end
pshift = (($signed({1'b0, doo}) + width) > 8);
if (pshift) begin
carry = (width - (8 - $signed({1'b0, doo})));
ob1 <= $signed(d >>> (width - carry));
end
else begin
ob1 <= ($signed({1'b0, ob1}) | (d << $signed({1'b0, doo})));
end
do <= (do + pshift);
o_oprogress <= (do + pshift);
doo_next = (($signed({1'b0, doo}) + width) & 7);
if ((doo_next == 0)) begin
flush <= 1'b1;
end
doo <= doo_next;
end
endtask
 
function integer MYHDL19_put;
input [9-1:0] d;
input [4-1:0] width;
begin: MYHDL93_RETURN
if ((width > 9)) begin
$finish;
end
if (($signed({1'b0, d}) > ((1 << width) - 1))) begin
$finish;
end
MYHDL19_put = ((ob1 | (d << doo)) & 255);
disable MYHDL93_RETURN;
end
endfunction
 
task MYHDL20_put_adv;
input [9-1:0] d;
input [4-1:0] width;
reg pshift;
integer carry;
integer doo_next;
begin: MYHDL94_RETURN
if ((width > 9)) begin
$finish;
end
if (($signed({1'b0, d}) > ((1 << width) - 1))) begin
$finish;
end
pshift = ((doo + width) > 8);
if (pshift) begin
carry = ($signed({1'b0, width}) - (8 - $signed({1'b0, doo})));
ob1 <= $signed($signed({1'b0, d}) >>> ($signed({1'b0, width}) - carry));
end
else begin
ob1 <= (ob1 | (d << doo));
end
do <= (do + pshift);
o_oprogress <= (do + pshift);
doo_next = ((doo + width) & 7);
if ((doo_next == 0)) begin
flush <= 1'b1;
end
doo <= doo_next;
end
endtask
 
function integer MYHDL21_put;
input [9-1:0] d;
input [4-1:0] width;
begin: MYHDL95_RETURN
if ((width > 9)) begin
$finish;
end
if (($signed({1'b0, d}) > ((1 << width) - 1))) begin
$finish;
end
MYHDL21_put = ((ob1 | (d << doo)) & 255);
disable MYHDL95_RETURN;
end
endfunction
 
task MYHDL22_put_adv;
input [9-1:0] d;
input [4-1:0] width;
reg pshift;
integer carry;
integer doo_next;
begin: MYHDL96_RETURN
if ((width > 9)) begin
$finish;
end
if (($signed({1'b0, d}) > ((1 << width) - 1))) begin
$finish;
end
pshift = ((doo + width) > 8);
if (pshift) begin
carry = ($signed({1'b0, width}) - (8 - $signed({1'b0, doo})));
ob1 <= $signed($signed({1'b0, d}) >>> ($signed({1'b0, width}) - carry));
end
else begin
ob1 <= (ob1 | (d << doo));
end
do <= (do + pshift);
o_oprogress <= (do + pshift);
doo_next = ((doo + width) & 7);
if ((doo_next == 0)) begin
flush <= 1'b1;
end
doo <= doo_next;
end
endtask
 
function integer MYHDL31_get4;
input boffset;
input width;
integer width;
begin: MYHDL97_RETURN
if ((nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL31_get4 = ((b41 >>> (dio + boffset)) & ((1 << width) - 1));
disable MYHDL97_RETURN;
end
endfunction
 
function integer MYHDL32_get4;
input boffset;
input width;
integer width;
begin: MYHDL98_RETURN
if ((nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL32_get4 = ((b41 >>> (dio + boffset)) & ((1 << width) - 1));
disable MYHDL98_RETURN;
end
endfunction
 
function integer MYHDL33_get4;
input boffset;
integer boffset;
input width;
integer width;
begin: MYHDL99_RETURN
if ((nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL33_get4 = ((b41 >>> (dio + boffset)) & ((1 << width) - 1));
disable MYHDL99_RETURN;
end
endfunction
 
function integer MYHDL34_get4;
input boffset;
integer boffset;
input width;
integer width;
begin: MYHDL100_RETURN
if ((nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL34_get4 = ((b41 >>> (dio + boffset)) & ((1 << width) - 1));
disable MYHDL100_RETURN;
end
endfunction
 
function integer MYHDL35_get4;
input boffset;
integer boffset;
input width;
integer width;
begin: MYHDL101_RETURN
if ((nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL35_get4 = ((b41 >>> (dio + boffset)) & ((1 << width) - 1));
disable MYHDL101_RETURN;
end
endfunction
 
function integer MYHDL36_get4;
input boffset;
integer boffset;
input width;
integer width;
begin: MYHDL102_RETURN
if ((nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL36_get4 = ((b41 >>> (dio + boffset)) & ((1 << width) - 1));
disable MYHDL102_RETURN;
end
endfunction
 
task MYHDL37_adv;
input width;
integer width;
integer nshift;
begin: MYHDL103_RETURN
nshift = ((dio + width) >>> 3);
o_iprogress <= di;
dio <= ((dio + width) & 7);
di <= ($signed({1'b0, di}) + nshift);
if ((nshift != 0)) begin
filled <= 1'b0;
end
end
endtask
 
function integer MYHDL38_get4;
input boffset;
input width;
integer width;
begin: MYHDL104_RETURN
if ((nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL38_get4 = ((b41 >>> (dio + boffset)) & ((1 << width) - 1));
disable MYHDL104_RETURN;
end
endfunction
 
task MYHDL39_adv;
input width;
integer width;
integer nshift;
begin: MYHDL105_RETURN
nshift = ((dio + width) >>> 3);
o_iprogress <= di;
dio <= ((dio + width) & 7);
di <= ($signed({1'b0, di}) + nshift);
if ((nshift != 0)) begin
filled <= 1'b0;
end
end
endtask
 
function integer MYHDL40_get4;
input boffset;
input width;
integer width;
begin: MYHDL106_RETURN
if ((nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL40_get4 = ((b41 >>> (dio + boffset)) & ((1 << width) - 1));
disable MYHDL106_RETURN;
end
endfunction
 
function integer MYHDL41_get4;
input boffset;
input width;
integer width;
begin: MYHDL107_RETURN
if ((nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL41_get4 = ((b41 >>> (dio + boffset)) & ((1 << width) - 1));
disable MYHDL107_RETURN;
end
endfunction
 
function integer MYHDL42_get4;
input boffset;
input width;
integer width;
begin: MYHDL108_RETURN
if ((nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL42_get4 = ((b41 >>> (dio + boffset)) & ((1 << width) - 1));
disable MYHDL108_RETURN;
end
endfunction
 
task MYHDL43_adv;
input width;
integer width;
integer nshift;
begin: MYHDL109_RETURN
nshift = ((dio + width) >>> 3);
o_iprogress <= di;
dio <= ((dio + width) & 7);
di <= ($signed({1'b0, di}) + nshift);
if ((nshift != 0)) begin
filled <= 1'b0;
end
end
endtask
 
function integer MYHDL50_rev_bits;
input [10-1:0] b;
input [4-1:0] nb;
integer r;
begin: MYHDL110_RETURN
if ((b >= (1 << nb))) begin
$finish;
$write("too few bits");
$write("\n");
end
r = (((((((((((((((((b >>> 14) & 1) << 0) | (((b >>> 13) & 1) << 1)) | (((b >>> 12) & 1) << 2)) | (((b >>> 11) & 1) << 3)) | (((b >>> 10) & 1) << 4)) | (((b >>> 9) & 1) << 5)) | (((b >>> 8) & 1) << 6)) | (((b >>> 7) & 1) << 7)) | (((b >>> 6) & 1) << 8)) | (((b >>> 5) & 1) << 9)) | (((b >>> 4) & 1) << 10)) | (((b >>> 3) & 1) << 11)) | (((b >>> 2) & 1) << 12)) | (((b >>> 1) & 1) << 13)) | (((b >>> 0) & 1) << 14));
r = r >>> (15 - $signed({1'b0, nb}));
MYHDL50_rev_bits = r;
disable MYHDL110_RETURN;
end
endfunction
 
function integer MYHDL51_makeLeaf;
input [9-1:0] lcode;
input [4-1:0] lbits;
begin: MYHDL111_RETURN
if ((lcode >= (1 << 10))) begin
$finish;
end
if ((lbits >= (1 << 9))) begin
$finish;
end
MYHDL51_makeLeaf = ((lcode << 9) | lbits);
disable MYHDL111_RETURN;
end
endfunction
 
function integer MYHDL52_makeLeaf;
input [9-1:0] lcode;
input [4-1:0] lbits;
begin: MYHDL112_RETURN
if ((lcode >= (1 << 10))) begin
$finish;
end
if ((lbits >= (1 << 9))) begin
$finish;
end
MYHDL52_makeLeaf = ((lcode << 9) | lbits);
disable MYHDL112_RETURN;
end
endfunction
 
function integer MYHDL53_makeLeaf;
input [9-1:0] lcode;
input [4-1:0] lbits;
begin: MYHDL113_RETURN
if ((lcode >= (1 << 10))) begin
$finish;
end
if ((lbits >= (1 << 9))) begin
$finish;
end
MYHDL53_makeLeaf = ((lcode << 9) | lbits);
disable MYHDL113_RETURN;
end
endfunction
 
function integer MYHDL54_get4;
input boffset;
input [5-1:0] width;
begin: MYHDL114_RETURN
if ((nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL54_get4 = ((b41 >>> (dio + boffset)) & ((1 << width) - 1));
disable MYHDL114_RETURN;
end
endfunction
 
function integer MYHDL55_get_bits;
input [19-1:0] aleaf;
begin: MYHDL115_RETURN
MYHDL55_get_bits = ($signed({1'b0, aleaf}) & ((1 << 9) - 1));
disable MYHDL115_RETURN;
end
endfunction
 
function integer MYHDL56_get_bits;
input [19-1:0] aleaf;
begin: MYHDL116_RETURN
MYHDL56_get_bits = ($signed({1'b0, aleaf}) & ((1 << 9) - 1));
disable MYHDL116_RETURN;
end
endfunction
 
task MYHDL57_adv;
input width;
integer width;
integer nshift;
begin: MYHDL117_RETURN
nshift = $signed(($signed({1'b0, dio}) + width) >>> 3);
o_iprogress <= di;
dio <= (($signed({1'b0, dio}) + width) & 7);
di <= ($signed({1'b0, di}) + nshift);
if ((nshift != 0)) begin
filled <= 1'b0;
end
end
endtask
 
function integer MYHDL58_get_code;
input [19-1:0] aleaf;
begin: MYHDL118_RETURN
MYHDL58_get_code = (aleaf >>> 9);
disable MYHDL118_RETURN;
end
endfunction
 
function integer MYHDL59_get_code;
input [19-1:0] aleaf;
begin: MYHDL119_RETURN
MYHDL59_get_code = (aleaf >>> 9);
disable MYHDL119_RETURN;
end
endfunction
 
function integer MYHDL60_get4;
input boffset;
integer boffset;
input [5-1:0] width;
begin: MYHDL120_RETURN
if ((nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL60_get4 = ($signed($signed({1'b0, b41}) >>> ($signed({1'b0, dio}) + boffset)) & ((1 << width) - 1));
disable MYHDL120_RETURN;
end
endfunction
 
function integer MYHDL61_get_bits;
input [19-1:0] aleaf;
begin: MYHDL121_RETURN
MYHDL61_get_bits = ($signed({1'b0, aleaf}) & ((1 << 9) - 1));
disable MYHDL121_RETURN;
end
endfunction
 
function integer MYHDL62_get4;
input boffset;
input width;
integer width;
begin: MYHDL122_RETURN
if ((nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL62_get4 = ((b41 >>> (dio + boffset)) & ((1 << width) - 1));
disable MYHDL122_RETURN;
end
endfunction
 
function integer MYHDL63_get_code;
input [19-1:0] aleaf;
begin: MYHDL123_RETURN
MYHDL63_get_code = (aleaf >>> 9);
disable MYHDL123_RETURN;
end
endfunction
 
function integer MYHDL64_get_bits;
input [19-1:0] aleaf;
begin: MYHDL124_RETURN
MYHDL64_get_bits = ($signed({1'b0, aleaf}) & ((1 << 9) - 1));
disable MYHDL124_RETURN;
end
endfunction
 
function integer MYHDL65_get4;
input boffset;
integer boffset;
input width;
integer width;
begin: MYHDL125_RETURN
if ((nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL65_get4 = ($signed($signed({1'b0, b41}) >>> ($signed({1'b0, dio}) + boffset)) & ((1 << width) - 1));
disable MYHDL125_RETURN;
end
endfunction
 
function integer MYHDL66_get_bits;
input [19-1:0] aleaf;
begin: MYHDL126_RETURN
MYHDL66_get_bits = ($signed({1'b0, aleaf}) & ((1 << 9) - 1));
disable MYHDL126_RETURN;
end
endfunction
 
task MYHDL67_adv;
input width;
integer width;
integer nshift;
begin: MYHDL127_RETURN
nshift = $signed(($signed({1'b0, dio}) + width) >>> 3);
o_iprogress <= di;
dio <= (($signed({1'b0, dio}) + width) & 7);
di <= ($signed({1'b0, di}) + nshift);
if ((nshift != 0)) begin
filled <= 1'b0;
end
end
endtask
 
function integer MYHDL68_get4;
input boffset;
input width;
integer width;
begin: MYHDL128_RETURN
if ((nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL68_get4 = ((b41 >>> (dio + boffset)) & ((1 << width) - 1));
disable MYHDL128_RETURN;
end
endfunction
 
function integer MYHDL69_get4;
input boffset;
integer boffset;
input width;
integer width;
begin: MYHDL129_RETURN
if ((nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL69_get4 = ($signed($signed({1'b0, b41}) >>> ($signed({1'b0, dio}) + boffset)) & ((1 << width) - 1));
disable MYHDL129_RETURN;
end
endfunction
 
function integer MYHDL70_rev_bits;
input b;
integer b;
input nb;
integer nb;
integer r;
begin: MYHDL130_RETURN
if ((b >= (1 << nb))) begin
$finish;
$write("too few bits");
$write("\n");
end
r = (((((((((((((((((b >>> 14) & 1) << 0) | (((b >>> 13) & 1) << 1)) | (((b >>> 12) & 1) << 2)) | (((b >>> 11) & 1) << 3)) | (((b >>> 10) & 1) << 4)) | (((b >>> 9) & 1) << 5)) | (((b >>> 8) & 1) << 6)) | (((b >>> 7) & 1) << 7)) | (((b >>> 6) & 1) << 8)) | (((b >>> 5) & 1) << 9)) | (((b >>> 4) & 1) << 10)) | (((b >>> 3) & 1) << 11)) | (((b >>> 2) & 1) << 12)) | (((b >>> 1) & 1) << 13)) | (((b >>> 0) & 1) << 14));
r = r >>> (15 - $signed({1'b0, nb}));
MYHDL70_rev_bits = r;
disable MYHDL130_RETURN;
end
endfunction
 
function integer MYHDL71_get4;
input boffset;
integer boffset;
input width;
integer width;
begin: MYHDL131_RETURN
if ((nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL71_get4 = ($signed($signed({1'b0, b41}) >>> ($signed({1'b0, dio}) + boffset)) & ((1 << width) - 1));
disable MYHDL131_RETURN;
end
endfunction
 
task MYHDL72_adv;
input width;
integer width;
integer nshift;
begin: MYHDL132_RETURN
nshift = $signed(($signed({1'b0, dio}) + width) >>> 3);
o_iprogress <= di;
dio <= (($signed({1'b0, dio}) + width) & 7);
di <= ($signed({1'b0, di}) + nshift);
if ((nshift != 0)) begin
filled <= 1'b0;
end
end
endtask
 
task MYHDL73_adv;
input width;
integer width;
integer nshift;
begin: MYHDL133_RETURN
nshift = ((dio + width) >>> 3);
o_iprogress <= di;
dio <= ((dio + width) & 7);
di <= ($signed({1'b0, di}) + nshift);
if ((nshift != 0)) begin
filled <= 1'b0;
end
end
endtask
 
 
always @(posedge clk) begin: DEFLATE_IO_LOGIC
case (i_mode)
'h2: begin
iram[(i_addr & 127)] <= i_data;
isize <= i_addr;
end
'h3: begin
o_byte <= oram[i_addr];
end
default: begin
// pass
end
endcase
end
 
 
always @(posedge clk) begin: DEFLATE_LOGIC
integer hm;
integer skip;
reg no_adv;
integer cs_i;
reg [4-1:0] outlen;
reg [9-1:0] outbits;
reg [8-1:0] bdata;
integer adler1_next;
integer nextdist;
integer copydist;
integer extra_dist;
integer extra_bits;
integer outcode;
integer lencode;
integer match;
integer distance;
integer stat_i;
integer clo_i;
integer n_adv;
integer dbl_i;
integer dbl;
integer dist_i;
integer limit;
reg [4-1:0] j;
integer t;
integer hf2_i;
reg [5-1:0] amb;
integer ncode;
reg [10-1:0] canonical;
reg [4-1:0] bits_next;
reg [15-1:0] aim;
integer cto;
integer mask;
integer token;
integer extraLength;
integer tlength;
integer distanceCode;
integer moreBits;
integer mored;
if ((!reset)) begin
$write("DEFLATE RESET");
$write("\n");
state <= 5'b00000;
o_done <= 1'b0;
end
else begin
case (state)
5'b00000: begin
case (i_mode)
'h4: begin
$write("STARTC");
$write("\n");
do_compress <= 1'b1;
method <= 1;
o_done <= 1'b0;
o_iprogress <= 0;
o_oprogress <= 0;
di <= 0;
dio <= 0;
do <= 0;
doo <= 0;
filled <= 1'b1;
cur_static <= 0;
state <= 5'b01110;
end
'h5: begin
do_compress <= 1'b0;
o_done <= 1'b0;
o_iprogress <= 0;
o_oprogress <= 0;
di <= 0;
dio <= 0;
do <= 0;
doo <= 0;
filled <= 1'b1;
state <= 5'b00001;
end
default: begin
// pass
end
endcase
end
5'b00001: begin
if ((!filled)) begin
filled <= 1'b1;
end
else if ((nb < 4)) begin
// pass
end
else if ((di == 0)) begin
if ((b1 == 120)) begin
$write("deflate mode");
$write("\n");
end
else begin
$write("%h", di);
$write(" ");
$write("%h", dio);
$write(" ");
$write("%h", nb);
$write(" ");
$write("%h", b1);
$write(" ");
$write("%h", b2);
$write(" ");
$write("%h", b3);
$write(" ");
$write("%h", b4);
$write(" ");
$write("%h", isize);
$write("\n");
$finish;
o_done <= 1'b1;
state <= 5'b00000;
end
MYHDL3_adv(16);
end
else begin
if (MYHDL4_get4(0, 1)) begin
$write("final");
$write("\n");
final <= 1'b1;
end
hm = MYHDL5_get4(1, 2);
method <= hm;
$write("method");
$write(" ");
$write("%0d", hm);
$write("\n");
case (hm)
'h2: begin
state <= 5'b00010;
numCodeLength <= 0;
numLiterals <= 0;
static <= 1'b0;
MYHDL6_adv(3);
end
'h1: begin
static <= 1'b1;
cur_static <= 0;
state <= 5'b01110;
MYHDL7_adv(3);
end
'h0: begin
state <= 5'b10101;
skip = (8 - dio);
if ((skip <= 2)) begin
skip = (16 - dio);
end
length <= MYHDL8_get4(skip, 16);
MYHDL9_adv((skip + 16));
cur_i <= 0;
offset <= 7;
end
default: begin
state <= 5'b00000;
$write("Bad method");
$write("\n");
$finish;
end
endcase
end
end
5'b10110: begin
no_adv = 0;
if ((!filled)) begin
no_adv = 1;
filled <= 1'b1;
end
else if ((nb < 4)) begin
no_adv = 1;
// pass
end
else if ((cur_cstatic == 0)) begin
flush <= 1'b0;
ob1 <= 0;
adler1 <= 1;
adler2 <= 0;
ladler1 <= 0;
oaddr <= 0;
obyte <= 120;
end
else if ((cur_cstatic == 1)) begin
oaddr <= 1;
obyte <= 156;
do <= 2;
end
else if ((cur_cstatic == 2)) begin
oaddr <= do;
obyte <= MYHDL10_put(3, 3);
MYHDL11_put_adv(3, 3);
end
else if (flush) begin
$write("flush");
$write(" ");
$write("%h", do);
$write(" ");
$write("%h", ob1);
$write("\n");
no_adv = 1;
oaddr <= do;
obyte <= ob1;
MYHDL12_do_flush;
end
else if ((($signed({1'b0, cur_cstatic}) - 3) > isize)) begin
if ((($signed({1'b0, cur_cstatic}) - 3) == (isize + 1))) begin
$write("Put EOF");
$write(" ");
$write("%h", do);
$write("\n");
cs_i = 256;
outlen = codeLength[cs_i];
outbits = code_bits[cs_i];
$write("EOF BITS:");
$write(" ");
$write("%0d", cs_i);
$write(" ");
$write("%h", outlen);
$write(" ");
$write("%h", outbits);
$write("\n");
oaddr <= do;
obyte <= MYHDL13_put(outbits, outlen);
MYHDL14_put_adv(outbits, outlen);
end
else if ((($signed({1'b0, cur_cstatic}) - 3) == (isize + 2))) begin
$write("calc end adler");
$write("\n");
adler2 <= ((adler2 + ladler1) % 65521);
if ((doo != 0)) begin
oaddr <= do;
obyte <= ob1;
do <= (do + 1);
end
end
else if ((($signed({1'b0, cur_cstatic}) - 3) == (isize + 3))) begin
$write("c1");
$write("\n");
oaddr <= do;
obyte <= (adler2 >>> 8);
do <= (do + 1);
end
else if ((($signed({1'b0, cur_cstatic}) - 3) == (isize + 4))) begin
$write("c2");
$write("\n");
oaddr <= do;
obyte <= (adler2 & 255);
do <= (do + 1);
end
else if ((($signed({1'b0, cur_cstatic}) - 3) == (isize + 5))) begin
$write("c3");
$write("\n");
oaddr <= do;
obyte <= (adler1 >>> 8);
do <= (do + 1);
end
else if ((($signed({1'b0, cur_cstatic}) - 3) == (isize + 6))) begin
$write("c4");
$write("\n");
oaddr <= do;
obyte <= (adler1 & 255);
end
else if ((($signed({1'b0, cur_cstatic}) - 3) == (isize + 7))) begin
$write("EOF finish");
$write(" ");
$write("%h", do);
$write("\n");
o_done <= 1'b1;
o_oprogress <= (do + 1);
state <= 5'b00000;
end
else begin
$write("%h", cur_cstatic);
$write(" ");
$write("%h", isize);
$write("\n");
$finish;
end
end
else begin
bdata = iram[di];
adler1_next = ((adler1 + bdata) % 65521);
adler1 <= adler1_next;
adler2 <= ((adler2 + ladler1) % 65521);
ladler1 <= adler1_next;
state <= 5'b10111;
cur_search <= (di - 1);
end
if ((!no_adv)) begin
cur_cstatic <= (cur_cstatic + 1);
end
end
5'b11000: begin
if (flush) begin
MYHDL15_do_flush;
end
else begin
case ((cur_i + 1))
0: nextdist = 1;
1: nextdist = 2;
2: nextdist = 3;
3: nextdist = 4;
4: nextdist = 5;
5: nextdist = 7;
6: nextdist = 9;
7: nextdist = 13;
8: nextdist = 17;
9: nextdist = 25;
10: nextdist = 33;
11: nextdist = 49;
12: nextdist = 65;
13: nextdist = 97;
14: nextdist = 129;
15: nextdist = 193;
16: nextdist = 257;
17: nextdist = 385;
18: nextdist = 513;
19: nextdist = 769;
20: nextdist = 1025;
21: nextdist = 1537;
22: nextdist = 2049;
23: nextdist = 3073;
24: nextdist = 4097;
25: nextdist = 6145;
26: nextdist = 8193;
27: nextdist = 12289;
28: nextdist = 16385;
default: nextdist = 24577;
endcase
if ((nextdist > cur_dist)) begin
case (cur_i)
0: copydist = 1;
1: copydist = 2;
2: copydist = 3;
3: copydist = 4;
4: copydist = 5;
5: copydist = 7;
6: copydist = 9;
7: copydist = 13;
8: copydist = 17;
9: copydist = 25;
10: copydist = 33;
11: copydist = 49;
12: copydist = 65;
13: copydist = 97;
14: copydist = 129;
15: copydist = 193;
16: copydist = 257;
17: copydist = 385;
18: copydist = 513;
19: copydist = 769;
20: copydist = 1025;
21: copydist = 1537;
22: copydist = 2049;
23: copydist = 3073;
24: copydist = 4097;
25: copydist = 6145;
26: copydist = 8193;
27: copydist = 12289;
28: copydist = 16385;
default: copydist = 24577;
endcase
extra_dist = (cur_dist - copydist);
case ((cur_i / 2))
0: extra_bits = 0;
1: extra_bits = 0;
2: extra_bits = 1;
3: extra_bits = 2;
4: extra_bits = 3;
5: extra_bits = 4;
6: extra_bits = 5;
7: extra_bits = 6;
8: extra_bits = 7;
9: extra_bits = 8;
10: extra_bits = 9;
11: extra_bits = 10;
12: extra_bits = 11;
13: extra_bits = 12;
default: extra_bits = 13;
endcase
if ((extra_dist > ((1 << extra_bits) - 1))) begin
$finish;
end
outcode = (MYHDL16_rev_bits(cur_i, 5) | (extra_dist << 5));
oaddr <= do;
obyte <= MYHDL17_put(outcode, (5 + extra_bits));
MYHDL18_put_adv(outcode, (5 + extra_bits));
cur_i <= (($signed({1'b0, di}) - $signed({1'b0, length})) + 1);
state <= 5'b11001;
end
else begin
cur_i <= (cur_i + 1);
end
end
end
5'b11001: begin
if ((cur_i < di)) begin
bdata = iram[(cur_i & 127)];
adler1_next = ((adler1 + bdata) % 65521);
adler1 <= adler1_next;
adler2 <= ((adler2 + ladler1) % 65521);
ladler1 <= adler1_next;
cur_i <= (cur_i + 1);
end
else begin
state <= 5'b10110;
end
end
5'b10111: begin
if ((!filled)) begin
filled <= 1'b1;
end
else if ((nb < 4)) begin
// pass
end
else begin
if (((cur_search >= 0) && (cur_search >= ($signed({1'b0, di}) - 32)) && ($signed({1'b0, di}) < ($signed({1'b0, isize}) - 3)))) begin
if (((iram[(cur_search & 127)] == b1) && (iram[((cur_search + 1) & 127)] == b2) && (iram[((cur_search + 2) & 127)] == b3))) begin
lencode = 257;
match = 3;
if ((($signed({1'b0, di}) < ($signed({1'b0, isize}) - 4)) && (iram[((cur_search + 3) & 127)] == b4))) begin
lencode = 258;
match = 4;
if ((($signed({1'b0, di}) < ($signed({1'b0, isize}) - 5)) && (iram[((cur_search + 4) & 127)] == iram[((di + 4) & 127)]))) begin
lencode = 259;
match = 5;
end
end
// if di < isize - 6 and iram[cur_search+5 & IBS] == iram[di + 5 & IBS]:
// lencode = 260
// match = 6
// if di < isize - 7 and iram[cur_search+6 & IBS] == iram[di + 6 & IBS]:
// lencode = 261
// match = 7
// if di < isize - 8 and iram[cur_search+7 & IBS] == iram[di + 7 & IBS]:
// lencode = 262
// match = 8
// if di < isize - 9 and iram[cur_search+8 & IBS] == iram[di + 8 & IBS]:
// lencode = 263
// match = 9
// if di < isize - 10 and iram[cur_search+9 & IBS] == iram[di + 9 & IBS]:
// lencode = 264
// match = 10
$write("found:");
$write(" ");
$write("%h", cur_search);
$write(" ");
$write("%h", di);
$write(" ");
$write("%h", isize);
$write(" ");
$write("%0d", match);
$write("\n");
outlen = codeLength[lencode];
outbits = code_bits[lencode];
oaddr <= do;
obyte <= MYHDL19_put(outbits, outlen);
MYHDL20_put_adv(outbits, outlen);
distance = ($signed({1'b0, di}) - cur_search);
cur_dist <= distance;
cur_i <= 0;
di <= (di + match);
cur_cstatic <= ((cur_cstatic + match) - 1);
length <= match;
state <= 5'b11000;
end
else begin
cur_search <= (cur_search - 1);
end
end
else begin
bdata = iram[di];
di <= (di + 1);
outlen = codeLength[bdata];
outbits = code_bits[bdata];
oaddr <= do;
obyte <= MYHDL21_put(outbits, outlen);
MYHDL22_put_adv(outbits, outlen);
state <= 5'b10110;
end
end
end
5'b01110: begin
for (stat_i=0; stat_i<144; stat_i=stat_i+1) begin
codeLength[stat_i] <= 8;
end
for (stat_i=144; stat_i<256; stat_i=stat_i+1) begin
codeLength[stat_i] <= 9;
end
for (stat_i=256; stat_i<280; stat_i=stat_i+1) begin
codeLength[stat_i] <= 7;
end
for (stat_i=280; stat_i<288; stat_i=stat_i+1) begin
codeLength[stat_i] <= 8;
end
numCodeLength <= 288;
cur_HF1 <= 0;
state <= 5'b00111;
// if cur_static < 288:
// if cur_static < 144:
// codeLength[cur_static].next = 8
// elif cur_static < 256:
// codeLength[cur_static].next = 9
// elif cur_static < 280:
// codeLength[cur_static].next = 7
// else:
// codeLength[cur_static].next = 8
// cur_static.next = cur_static + 1
// else:
// numCodeLength.next = 288
// cur_HF1.next = 0
// state.next = d_state.HF1
end
5'b00010: begin
if ((!filled)) begin
filled <= 1'b1;
end
else if ((nb < 4)) begin
// pass
end
else if ((numLiterals == 0)) begin
numLiterals <= (257 + MYHDL31_get4(0, 5));
$write("NL:");
$write(" ");
$write("%0d", (257 + MYHDL32_get4(0, 5)));
$write("\n");
numDistance <= (1 + MYHDL33_get4(5, 5));
$write("ND:");
$write(" ");
$write("%0d", (1 + MYHDL34_get4(5, 5)));
$write("\n");
b_numCodeLength <= (4 + MYHDL35_get4(10, 4));
$write("NCL:");
$write(" ");
$write("%0d", (4 + MYHDL36_get4(10, 4)));
$write("\n");
numCodeLength <= 0;
MYHDL37_adv(14);
end
else begin
if ((numCodeLength < 19)) begin
case (numCodeLength)
0: clo_i = 16;
1: clo_i = 17;
2: clo_i = 18;
3: clo_i = 0;
4: clo_i = 8;
5: clo_i = 7;
6: clo_i = 9;
7: clo_i = 6;
8: clo_i = 10;
9: clo_i = 5;
10: clo_i = 11;
11: clo_i = 4;
12: clo_i = 12;
13: clo_i = 3;
14: clo_i = 13;
15: clo_i = 2;
16: clo_i = 14;
17: clo_i = 1;
default: clo_i = 15;
endcase
if ((numCodeLength < b_numCodeLength)) begin
codeLength[clo_i] <= MYHDL38_get4(0, 3);
MYHDL39_adv(3);
end
else begin
codeLength[clo_i] <= 0;
end
numCodeLength <= (numCodeLength + 1);
end
else begin
numCodeLength <= 19;
cur_HF1 <= 0;
state <= 5'b00111;
end
end
end
5'b00011: begin
if ((!filled)) begin
filled <= 1'b1;
end
else if ((nb < 4)) begin
// pass
end
else if ((numCodeLength < (numLiterals + numDistance))) begin
n_adv = 0;
if ((code < 16)) begin
howOften <= 1;
lastToken <= code;
end
else if ((code == 16)) begin
howOften <= (3 + MYHDL40_get4(0, 2));
n_adv = 2;
end
else if ((code == 17)) begin
howOften <= (3 + MYHDL41_get4(0, 3));
lastToken <= 0;
n_adv = 3;
end
else if ((code == 18)) begin
howOften <= (11 + MYHDL42_get4(0, 7));
lastToken <= 0;
n_adv = 7;
end
else begin
$finish;
end
if ((n_adv != 0)) begin
MYHDL43_adv(n_adv);
end
state <= 5'b00100;
end
else begin
$write("FILL UP");
$write("\n");
for (dbl_i=0; dbl_i<32; dbl_i=dbl_i+1) begin
dbl = 0;
if (((dbl_i + $signed({1'b0, numLiterals})) < numCodeLength)) begin
dbl = codeLength[(dbl_i + $signed({1'b0, numLiterals}))];
end
distanceLength[dbl_i] <= dbl;
end
cur_i <= numLiterals;
state <= 5'b00110;
end
end
default: begin
if ((state == 5'b00110)) begin
if ((cur_i < 288)) begin
codeLength[cur_i] <= 0;
cur_i <= (cur_i + 1);
end
else begin
numCodeLength <= 288;
method <= 3;
cur_HF1 <= 0;
state <= 5'b00111;
end
end
else begin
case (state)
5'b00101: begin
$write("DISTTREE");
$write("\n");
for (dist_i=0; dist_i<32; dist_i=dist_i+1) begin
codeLength[dist_i] <= distanceLength[dist_i];
end
numCodeLength <= 32;
method <= 4;
cur_HF1 <= 0;
state <= 5'b00111;
end
5'b00100: begin
if ((howOften != 0)) begin
codeLength[numCodeLength] <= lastToken;
howOften <= (howOften - 1);
numCodeLength <= (numCodeLength + 1);
end
else if ((numCodeLength < (numLiterals + numDistance))) begin
cur_next <= 0;
state <= 5'b10011;
end
else begin
state <= 5'b00011;
end
end
5'b00111: begin
if ((cur_HF1 < 16)) begin
bitLengthCount[cur_HF1] <= 0;
end
if ((cur_HF1 < 128)) begin
d_leaves[cur_HF1] <= 0;
end
if (((method != 4) && (cur_HF1 < 512))) begin
lwaddr <= cur_HF1;
wleaf <= 0;
end
limit = 512;
if ((method == 4)) begin
limit = 128;
end
if ((cur_HF1 < limit)) begin
cur_HF1 <= (cur_HF1 + 1);
end
else begin
$write("DID HF1 INIT");
$write("\n");
cur_i <= 0;
state <= 5'b01000;
end
end
5'b01000: begin
if ((cur_i < numCodeLength)) begin
j = codeLength[cur_i];
bitLengthCount[j] <= (bitLengthCount[j] + 1);
cur_i <= (cur_i + 1);
end
else begin
bitLengthCount[0] <= 0;
state <= 5'b01001;
cur_i <= 1;
if ((method == 4)) begin
d_maxBits <= 0;
end
else begin
maxBits <= 0;
end
minBits <= 15;
end
end
5'b01001: begin
if ((cur_i <= 15)) begin
if ((bitLengthCount[cur_i] != 0)) begin
if ((cur_i < minBits)) begin
minBits <= cur_i;
end
if ((method == 4)) begin
if ((cur_i > d_maxBits)) begin
d_maxBits <= cur_i;
end
end
else begin
if ((cur_i > maxBits)) begin
maxBits <= cur_i;
end
end
end
cur_i <= (cur_i + 1);
end
else begin
$write("%h", minBits);
$write(" ");
$write("%h", maxBits);
$write("\n");
t = 10;
if ((method == 4)) begin
if ((t > d_maxBits)) begin
t = d_maxBits;
end
d_instantMaxBit <= t;
d_instantMask <= ((1 << t) - 1);
end
else begin
if ((t > maxBits)) begin
t = maxBits;
end
instantMaxBit <= t;
instantMask <= ((1 << t) - 1);
end
$write("%0d", ((1 << t) - 1));
$write("\n");
state <= 5'b01010;
cur_i <= minBits;
code <= 0;
for (hf2_i=0; hf2_i<15; hf2_i=hf2_i+1) begin
nextCode[hf2_i] <= 0;
end
$write("to HF3");
$write("\n");
end
end
5'b01010: begin
amb = maxBits;
if ((method == 4)) begin
amb = d_maxBits;
end
if ((cur_i <= amb)) begin
ncode = ((code + bitLengthCount[($signed({1'b0, cur_i}) - 1)]) << 1);
code <= ncode;
nextCode[cur_i] <= ncode;
cur_i <= (cur_i + 1);
end
else begin
state <= 5'b01011;
cur_i <= 0;
spread_i <= 0;
$write("to HF4");
$write("\n");
end
end
5'b01100: begin
canonical = nextCode[bits];
nextCode[bits] <= (nextCode[bits] + 1);
if ((bits > 15)) begin
$finish;
end
reverse <= MYHDL50_rev_bits(canonical, bits);
leaf <= MYHDL51_makeLeaf(spread_i, bits);
state <= 5'b01101;
end
5'b01101: begin
if ((method == 4)) begin
d_leaves[reverse] <= leaf;
if ((bits <= d_instantMaxBit)) begin
if (((reverse + (1 << bits)) <= d_instantMask)) begin
step <= (1 << bits);
spread <= (reverse + (1 << bits));
state <= 5'b10010;
end
else begin
spread_i <= (spread_i + 1);
state <= 5'b01011;
end
end
else begin
state <= 5'b01011;
spread_i <= (spread_i + 1);
end
end
else begin
wleaf <= leaf;
lwaddr <= reverse;
code_bits[spread_i] <= reverse;
if ((bits <= instantMaxBit)) begin
if (((reverse + (1 << bits)) <= instantMask)) begin
step <= (1 << bits);
spread <= (reverse + (1 << bits));
state <= 5'b10010;
end
else begin
spread_i <= (spread_i + 1);
state <= 5'b01011;
end
end
else begin
spread_i <= (spread_i + 1);
state <= 5'b01011;
end
end
end
5'b01011: begin
if ((spread_i < numCodeLength)) begin
bits_next = codeLength[spread_i];
if ((bits_next != 0)) begin
bits <= bits_next;
state <= 5'b01100;
end
else begin
spread_i <= (spread_i + 1);
end
end
else begin
if (do_compress) begin
state <= 5'b10110;
cur_cstatic <= 0;
end
else if ((method == 3)) begin
state <= 5'b00101;
end
else if ((method == 4)) begin
$write("DEFLATE m2!");
$write("\n");
state <= 5'b10011;
end
else if ((method == 2)) begin
numCodeLength <= 0;
state <= 5'b10011;
end
else begin
state <= 5'b10011;
end
cur_next <= 0;
cur_i <= 0;
end
end
5'b10010: begin
if ((method == 4)) begin
d_leaves[spread] <= MYHDL52_makeLeaf(spread_i, codeLength[spread_i]);
end
else begin
lwaddr <= spread;
wleaf <= MYHDL53_makeLeaf(spread_i, codeLength[spread_i]);
end
aim = instantMask;
if ((method == 4)) begin
aim = d_instantMask;
end
if (($signed({1'b0, spread}) > ($signed({1'b0, aim}) - $signed({1'b0, step})))) begin
spread_i <= (spread_i + 1);
state <= 5'b01011;
end
else begin
spread <= (spread + step);
end
end
5'b10011: begin
if ((!filled)) begin
filled <= 1'b1;
end
else if ((nb < 4)) begin
// pass
end
else if ((cur_next == 0)) begin
cto = MYHDL54_get4(0, maxBits);
cur_next <= 1;
mask = ((1 << instantMaxBit) - 1);
leaf <= leaves[(cto & mask)];
end
else begin
if ((MYHDL55_get_bits(leaf) < 1)) begin
$write("< 1 bits: ");
$write("\n");
$finish;
end
MYHDL57_adv(MYHDL56_get_bits(leaf));
if ((MYHDL58_get_code(leaf) == 0)) begin
$write("leaf 0");
$write("\n");
end
code <= MYHDL59_get_code(leaf);
if ((method == 2)) begin
state <= 5'b00011;
end
else begin
state <= 5'b10100;
end
end
end
5'b01111: begin
if ((!filled)) begin
filled <= 1'b1;
end
else if ((nb < 4)) begin
// pass
end
else begin
token = (code - 257);
case (token)
0: extraLength = 0;
1: extraLength = 0;
2: extraLength = 0;
3: extraLength = 0;
4: extraLength = 0;
5: extraLength = 0;
6: extraLength = 0;
7: extraLength = 0;
8: extraLength = 1;
9: extraLength = 1;
10: extraLength = 1;
11: extraLength = 1;
12: extraLength = 2;
13: extraLength = 2;
14: extraLength = 2;
15: extraLength = 2;
16: extraLength = 3;
17: extraLength = 3;
18: extraLength = 3;
19: extraLength = 3;
20: extraLength = 4;
21: extraLength = 4;
22: extraLength = 4;
23: extraLength = 4;
24: extraLength = 5;
25: extraLength = 5;
26: extraLength = 5;
27: extraLength = 5;
default: extraLength = 0;
endcase
cto = MYHDL60_get4(extraLength, d_maxBits);
mask = ((1 << d_instantMaxBit) - 1);
leaf <= d_leaves[(cto & mask)];
state <= 5'b10000;
end
end
5'b10000: begin
if ((MYHDL61_get_bits(leaf) == 0)) begin
$finish;
end
token = (code - 257);
case (token)
0: tlength = 3;
1: tlength = 4;
2: tlength = 5;
3: tlength = 6;
4: tlength = 7;
5: tlength = 8;
6: tlength = 9;
7: tlength = 10;
8: tlength = 11;
9: tlength = 13;
10: tlength = 15;
11: tlength = 17;
12: tlength = 19;
13: tlength = 23;
14: tlength = 27;
15: tlength = 31;
16: tlength = 35;
17: tlength = 43;
18: tlength = 51;
19: tlength = 59;
20: tlength = 67;
21: tlength = 83;
22: tlength = 99;
23: tlength = 115;
24: tlength = 131;
25: tlength = 163;
26: tlength = 195;
27: tlength = 227;
default: tlength = 258;
endcase
case (token)
0: extraLength = 0;
1: extraLength = 0;
2: extraLength = 0;
3: extraLength = 0;
4: extraLength = 0;
5: extraLength = 0;
6: extraLength = 0;
7: extraLength = 0;
8: extraLength = 1;
9: extraLength = 1;
10: extraLength = 1;
11: extraLength = 1;
12: extraLength = 2;
13: extraLength = 2;
14: extraLength = 2;
15: extraLength = 2;
16: extraLength = 3;
17: extraLength = 3;
18: extraLength = 3;
19: extraLength = 3;
20: extraLength = 4;
21: extraLength = 4;
22: extraLength = 4;
23: extraLength = 4;
24: extraLength = 5;
25: extraLength = 5;
26: extraLength = 5;
27: extraLength = 5;
default: extraLength = 0;
endcase
tlength = tlength + MYHDL62_get4(0, extraLength);
distanceCode = MYHDL63_get_code(leaf);
case (distanceCode)
0: distance = 1;
1: distance = 2;
2: distance = 3;
3: distance = 4;
4: distance = 5;
5: distance = 7;
6: distance = 9;
7: distance = 13;
8: distance = 17;
9: distance = 25;
10: distance = 33;
11: distance = 49;
12: distance = 65;
13: distance = 97;
14: distance = 129;
15: distance = 193;
16: distance = 257;
17: distance = 385;
18: distance = 513;
19: distance = 769;
20: distance = 1025;
21: distance = 1537;
22: distance = 2049;
23: distance = 3073;
24: distance = 4097;
25: distance = 6145;
26: distance = 8193;
27: distance = 12289;
28: distance = 16385;
default: distance = 24577;
endcase
case ($signed(distanceCode >>> 1))
0: moreBits = 0;
1: moreBits = 0;
2: moreBits = 1;
3: moreBits = 2;
4: moreBits = 3;
5: moreBits = 4;
6: moreBits = 5;
7: moreBits = 6;
8: moreBits = 7;
9: moreBits = 8;
10: moreBits = 9;
11: moreBits = 10;
12: moreBits = 11;
13: moreBits = 12;
default: moreBits = 13;
endcase
mored = MYHDL65_get4((extraLength + MYHDL64_get_bits(leaf)), moreBits);
distance = distance + mored;
MYHDL67_adv(((moreBits + extraLength) + MYHDL66_get_bits(leaf)));
offset <= ($signed({1'b0, do}) - distance);
length <= tlength;
cur_i <= 0;
oraddr <= offset;
state <= 5'b10101;
end
default: begin
if ((state == 5'b10100)) begin
if ((!filled)) begin
filled <= 1'b1;
end
else if ((nb < 4)) begin
// pass
end
else if (($signed({1'b0, di}) > ($signed({1'b0, isize}) - 3))) begin
state <= 5'b00000;
o_done <= 1'b1;
$write("NO EOF ");
$write(" ");
$write("%h", di);
$write("\n");
$finish;
end
else if ((code == 256)) begin
$write("EOF:");
$write(" ");
$write("%h", di);
$write(" ");
$write("%h", do);
$write("\n");
if ((!final)) begin
state <= 5'b00001;
end
else begin
o_done <= 1'b1;
o_oprogress <= do;
state <= 5'b00000;
end
end
else begin
if ((code < 256)) begin
oaddr <= do;
obyte <= code;
o_oprogress <= (do + 1);
do <= (do + 1);
cur_next <= 0;
state <= 5'b10011;
end
else if ((code == 300)) begin
$finish;
end
else begin
if (static) begin
token = (code - 257);
case (token)
0: tlength = 3;
1: tlength = 4;
2: tlength = 5;
3: tlength = 6;
4: tlength = 7;
5: tlength = 8;
6: tlength = 9;
7: tlength = 10;
8: tlength = 11;
9: tlength = 13;
10: tlength = 15;
11: tlength = 17;
12: tlength = 19;
13: tlength = 23;
14: tlength = 27;
15: tlength = 31;
16: tlength = 35;
17: tlength = 43;
18: tlength = 51;
19: tlength = 59;
20: tlength = 67;
21: tlength = 83;
22: tlength = 99;
23: tlength = 115;
24: tlength = 131;
25: tlength = 163;
26: tlength = 195;
27: tlength = 227;
default: tlength = 258;
endcase
case (token)
0: extraLength = 0;
1: extraLength = 0;
2: extraLength = 0;
3: extraLength = 0;
4: extraLength = 0;
5: extraLength = 0;
6: extraLength = 0;
7: extraLength = 0;
8: extraLength = 1;
9: extraLength = 1;
10: extraLength = 1;
11: extraLength = 1;
12: extraLength = 2;
13: extraLength = 2;
14: extraLength = 2;
15: extraLength = 2;
16: extraLength = 3;
17: extraLength = 3;
18: extraLength = 3;
19: extraLength = 3;
20: extraLength = 4;
21: extraLength = 4;
22: extraLength = 4;
23: extraLength = 4;
24: extraLength = 5;
25: extraLength = 5;
26: extraLength = 5;
27: extraLength = 5;
default: extraLength = 0;
endcase
tlength = tlength + MYHDL68_get4(0, extraLength);
t = MYHDL69_get4(extraLength, 5);
distanceCode = MYHDL70_rev_bits(t, 5);
case (distanceCode)
0: distance = 1;
1: distance = 2;
2: distance = 3;
3: distance = 4;
4: distance = 5;
5: distance = 7;
6: distance = 9;
7: distance = 13;
8: distance = 17;
9: distance = 25;
10: distance = 33;
11: distance = 49;
12: distance = 65;
13: distance = 97;
14: distance = 129;
15: distance = 193;
16: distance = 257;
17: distance = 385;
18: distance = 513;
19: distance = 769;
20: distance = 1025;
21: distance = 1537;
22: distance = 2049;
23: distance = 3073;
24: distance = 4097;
25: distance = 6145;
26: distance = 8193;
27: distance = 12289;
28: distance = 16385;
default: distance = 24577;
endcase
case ($signed(distanceCode >>> 1))
0: moreBits = 0;
1: moreBits = 0;
2: moreBits = 1;
3: moreBits = 2;
4: moreBits = 3;
5: moreBits = 4;
6: moreBits = 5;
7: moreBits = 6;
8: moreBits = 7;
9: moreBits = 8;
10: moreBits = 9;
11: moreBits = 10;
12: moreBits = 11;
13: moreBits = 12;
default: moreBits = 13;
endcase
distance = distance + MYHDL71_get4((extraLength + 5), moreBits);
MYHDL72_adv(((extraLength + 5) + moreBits));
offset <= ($signed({1'b0, do}) - distance);
length <= tlength;
cur_i <= 0;
oraddr <= offset;
state <= 5'b10101;
end
else begin
state <= 5'b01111;
end
end
cur_next <= 0;
end
end
else begin
if ((state == 5'b10101)) begin
if ((!filled)) begin
filled <= 1'b1;
end
else if ((nb < 4)) begin
// pass
end
else if ((method == 0)) begin
if ((cur_i < length)) begin
oaddr <= do;
obyte <= b3;
MYHDL73_adv(8);
cur_i <= (cur_i + 1);
do <= (do + 1);
o_oprogress <= (do + 1);
end
else if ((!final)) begin
state <= 5'b00001;
end
else begin
o_oprogress <= do;
o_done <= 1'b1;
state <= 5'b00000;
end
end
else if ((cur_i < (length + 1))) begin
oraddr <= (offset + cur_i);
if ((cur_i == 1)) begin
copy1 <= orbyte;
end
if ((cur_i > 1)) begin
if (((offset + cur_i) == (do + 1))) begin
obyte <= copy1;
end
else begin
obyte <= orbyte;
end
oaddr <= do;
o_oprogress <= (do + 1);
do <= (do + 1);
end
cur_i <= (cur_i + 1);
end
else begin
oaddr <= do;
if (((offset + cur_i) == (do + 1))) begin
obyte <= copy1;
end
else begin
obyte <= orbyte;
end
do <= (do + 1);
o_oprogress <= (do + 1);
cur_next <= 0;
state <= 5'b10011;
end
end
else begin
$write("unknown state?!");
$write("\n");
state <= 5'b00000;
end
end
end
endcase
end
end
endcase
end
end
 
 
always @(posedge clk) begin: DEFLATE_FILL_BUF
if ((!reset)) begin
$write("FILL RESET");
$write("\n");
nb <= 0;
b1 <= 0;
b2 <= 0;
b3 <= 0;
b4 <= 0;
end
else begin
if ((isize < 4)) begin
// pass
end
else if (((i_mode == 4) || (i_mode == 5))) begin
nb <= 0;
end
else begin
nb <= 4;
b1 <= iram[(di & 127)];
b2 <= iram[((di + 1) & 127)];
b3 <= iram[((di + 2) & 127)];
b4 <= iram[((di + 3) & 127)];
end
end
end
 
 
always @(posedge clk) begin: DEFLATE_ORAMWRITE
oram[oaddr] <= obyte;
leaves[lwaddr] <= wleaf;
end
 
 
always @(posedge clk) begin: DEFLATE_ORAMREAD
orbyte <= oram[oraddr];
end
 
endmodule
/hdl-deflate/trunk/dump.v
0,0 → 1,6
module init();
initial begin
$dumpfile("test.vcd");
$dumpvars(0, test_fast_bench);
end
endmodule
/hdl-deflate/trunk/test_deflate.py
0,0 → 1,615
import unittest
import os
import zlib
import random
 
from myhdl import delay, now, Signal, intbv, ResetSignal, Simulation, \
Cosimulation, block, instance, StopSimulation, modbv, \
always, always_seq, always_comb, enum, Error
 
from deflate import IDLE, WRITE, READ, STARTC, STARTD, LBSIZE, IBSIZE, CWINDOW
 
MAXW = 2 * CWINDOW
 
COSIMULATION = True
COSIMULATION = False
 
if not COSIMULATION:
from deflate import deflate
else:
def deflate(i_mode, o_done, i_data, o_iprogress, o_oprogress,
o_byte, i_addr, clk, reset):
print("Cosimulation")
cmd = "iverilog -o deflate " + \
"deflate.v " + \
"tb_deflate.v " # "dump.v "
os.system(cmd)
return Cosimulation("vvp -m ./myhdl deflate",
i_mode=i_mode, o_done=o_done,
i_data=i_data, o_iprogress=o_iprogress,
o_oprogress=o_oprogress,
o_byte=o_byte, i_addr=i_addr,
clk=clk, reset=reset)
 
 
def test_data(m):
print("MODE", m)
if m == 0:
str_data = " ".join(["Hello World! " + str(1) + " "
for i in range(100)])
b_data = str_data.encode('utf-8')
elif m == 1:
str_data = " ".join([" Hello World! " + str(i) + " "
# str_data = " ".join(["Hello World! " + str(i) + " "
for i in range(5)])
b_data = str_data.encode('utf-8')
elif m == 2:
str_data = " ".join(["Hi: " + str(random.randrange(0,0x1000)) + " "
for i in range(100)])
b_data = str_data.encode('utf-8')
elif m == 3:
b_data = bytes([random.randrange(0,0x100) for i in range(100)])
else:
raise Error("unknown test mode")
b_data = b_data[:IBSIZE-4]
zl_data = zlib.compress(b_data)
print("From %d to %d bytes" % (len(b_data), len(zl_data)))
print(zl_data)
return b_data, zl_data
 
 
class TestDeflate(unittest.TestCase):
 
def testMain(self):
 
def test_decompress(i_mode, o_done, i_data, o_iprogress,
o_oprogress, o_byte, i_addr, clk, reset):
 
def tick():
clk.next = not clk
 
print("")
print("==========================")
print("START TEST MODE", mode)
print("==========================")
 
b_data, zl_data = test_data(mode)
 
reset.next = 0
tick()
yield delay(5)
reset.next = 1
tick()
yield delay(5)
 
print("STARTD")
i_mode.next = STARTD
tick()
yield delay(5)
tick()
yield delay(5)
i_mode.next = IDLE
 
print("WRITE")
i_mode.next = WRITE
i = 0
while i < len(zl_data):
if o_iprogress > i - MAXW:
# print("write", i)
i_data.next = zl_data[i]
i_addr.next = i
i = i + 1
else:
print("Wait for space")
tick()
yield delay(5)
tick()
yield delay(5)
i_mode.next = IDLE
print("Wrote input, wait for end of decompression")
 
# alternative without sliding window:
"""
print("WRITE")
i_mode.next = WRITE
for i in range(len(zl_data)):
i_data.next = zl_data[i]
i_addr.next = i
tick()
yield delay(5)
tick()
yield delay(5)
i_mode.next = IDLE
 
print("STARTD")
i_mode.next = STARTD
tick()
yield delay(5)
tick()
yield delay(5)
i_mode.next = IDLE
"""
 
print(now())
while not o_done:
tick()
yield delay(5)
tick()
yield delay(5)
print(now())
 
last = o_oprogress
print("GOT", last)
i_mode.next = READ
d_data = []
for i in range(last):
i_addr.next = i
tick()
yield delay(5)
tick()
yield delay(5)
d_data.append(bytes([o_byte]))
i_mode.next = IDLE
 
d_data = b''.join(d_data)
 
self.assertEqual(b_data, d_data, "decompress does NOT match")
print(len(d_data), len(zl_data))
 
print("==========COMPRESS TEST=========")
 
i_mode.next = WRITE
for i in range(len(b_data)):
i_data.next = b_data[i]
i_addr.next = i
tick()
yield delay(5)
tick()
yield delay(5)
i_mode.next = IDLE
 
i_mode.next = STARTC
tick()
yield delay(5)
tick()
yield delay(5)
i_mode.next = IDLE
 
print(now())
while not o_done:
tick()
yield delay(5)
tick()
yield delay(5)
print(now())
 
# raise Error("STOP")
 
last = o_oprogress
print("last", last)
i_mode.next = READ
c_data = []
for i in range(last):
i_addr.next = i
tick()
yield delay(5)
tick()
yield delay(5)
c_data.append(bytes([o_byte]))
i_mode.next = IDLE
 
print("b_data:", len(b_data), b_data)
c_data = b''.join(c_data)
print("c_data:", len(c_data), c_data)
print("zl_data:", len(zl_data), zl_data)
 
print("zlib test:", zlib.decompress(c_data))
 
print("WRITE COMPRESSED RESULT")
i_mode.next = WRITE
for i in range(len(c_data)):
i_data.next = c_data[i]
i_addr.next = i
tick()
yield delay(5)
tick()
yield delay(5)
i_mode.next = IDLE
 
print("STARTD after Compress")
i_mode.next = STARTD
tick()
yield delay(5)
tick()
yield delay(5)
i_mode.next = IDLE
 
print(now())
while not o_done:
tick()
yield delay(5)
tick()
yield delay(5)
print(now())
 
last = o_oprogress
i_mode.next = READ
d_data = []
for i in range(last):
i_addr.next = i
tick()
yield delay(5)
tick()
yield delay(5)
d_data.append(bytes([o_byte]))
i_mode.next = IDLE
 
d_data = b''.join(d_data)
 
self.assertEqual(b_data, d_data, "decompress after compress does NOT match")
print(len(b_data), len(zl_data), len(c_data))
 
for loop in range(1):
for mode in range(4):
self.runTests(test_decompress)
 
def runTests(self, test):
"""Helper method to run the actual tests."""
 
i_mode = Signal(intbv(0)[3:])
o_done = Signal(bool(0))
 
i_data = Signal(intbv()[8:])
o_byte = Signal(intbv()[8:])
o_iprogress = Signal(intbv()[LBSIZE:])
o_oprogress = Signal(intbv()[LBSIZE:])
i_addr = Signal(intbv()[LBSIZE:])
 
clk = Signal(bool(0))
reset = ResetSignal(1, 0, True)
 
dut = deflate(i_mode, o_done, i_data, o_iprogress, o_oprogress,
o_byte, i_addr, clk, reset)
 
check = test(i_mode, o_done, i_data, o_iprogress, o_oprogress,
o_byte, i_addr, clk, reset)
sim = Simulation(dut, check)
# traceSignals(dut)
sim.run(quiet=1)
 
 
SLOWDOWN = 1
 
@block
def test_deflate_bench(i_clk, o_led, led0_g, led1_b, led2_r):
 
u_data, c_data = test_data(1)
 
CDATA = tuple(c_data)
UDATA = tuple(u_data)
 
i_mode = Signal(intbv(0)[3:])
o_done = Signal(bool(0))
 
i_data = Signal(intbv()[8:])
o_byte = Signal(intbv()[8:])
u_data = Signal(intbv()[8:])
o_iprogress = Signal(intbv()[LBSIZE:])
o_oprogress = Signal(intbv()[LBSIZE:])
resultlen = Signal(intbv()[LBSIZE:])
i_addr = Signal(intbv()[LBSIZE:])
 
reset = ResetSignal(1, 0, True)
 
dut = deflate(i_mode, o_done, i_data, o_iprogress, o_oprogress,
o_byte, i_addr, i_clk, reset)
 
tb_state = enum('RESET', 'START', 'WRITE', 'DECOMPRESS', 'WAIT', 'VERIFY',
'PAUSE', 'CWRITE', 'COMPRESS', 'CWAIT', 'CRESULT',
'VWRITE', 'VDECOMPRESS', 'VWAIT', 'CVERIFY', 'CPAUSE',
'FAIL', 'HALT')
tstate = Signal(tb_state.RESET)
 
tbi = Signal(modbv(0)[15:])
copy = Signal(intbv()[8:])
 
scounter = Signal(modbv(0)[SLOWDOWN:])
counter = Signal(modbv(0)[16:])
 
wtick = Signal(bool(0))
 
resume = Signal(modbv(0)[6:])
 
@instance
def clkgen():
i_clk.next = 0
while True:
yield delay(5)
i_clk.next = not i_clk
 
@always(i_clk.posedge)
def count():
# o_led.next = counter
if scounter == 0:
counter.next = counter + 1
scounter.next = scounter + 1
 
@always(i_clk.posedge)
def logic():
 
if tstate == tb_state.RESET:
print("RESET", counter)
reset.next = 0
led0_g.next = 0
led1_b.next = 0
led2_r.next = 0
tbi.next = 0
tstate.next = tb_state.START
 
elif SLOWDOWN > 2 and scounter != 0:
pass
 
elif tstate == tb_state.START:
# A few cycles reset low
if tbi < 1:
tbi.next = tbi.next + 1
else:
reset.next = 1
tstate.next = tb_state.WRITE
tbi.next = 0
 
elif tstate == tb_state.HALT:
led0_g.next = 1
led2_r.next = 0
led1_b.next = 0
 
elif tstate == tb_state.FAIL:
# Failure: blink all color leds
led0_g.next = not led0_g
led2_r.next = not led2_r
led1_b.next = o_done
 
elif tstate == tb_state.WRITE:
if tbi < len(CDATA):
# print(tbi)
o_led.next = tbi
led1_b.next = o_done
led2_r.next = not led2_r
i_mode.next = WRITE
i_data.next = CDATA[tbi]
i_addr.next = tbi
tbi.next = tbi + 1
else:
i_mode.next = IDLE
led2_r.next = 0
tstate.next = tb_state.DECOMPRESS
 
elif tstate == tb_state.DECOMPRESS:
i_mode.next = STARTD
tstate.next = tb_state.WAIT
 
elif tstate == tb_state.WAIT:
led1_b.next = not led1_b
i_mode.next = IDLE
if i_mode == IDLE and o_done:
print("result len", o_oprogress)
if o_oprogress == 0x4F:
tstate.next = tb_state.HALT
resultlen.next = o_oprogress
tbi.next = 0
i_addr.next = 0
i_mode.next = READ
wtick.next = True
tstate.next = tb_state.VERIFY
"""
if o_oprogress == 0x4F:
tstate.next = tb_state.HALT
else:
tstate.next = tb_state.FAIL
"""
 
elif tstate == tb_state.VERIFY:
# print("VERIFY", o_data)
led1_b.next = 0
o_led.next = tbi
"""
Note that the read can also be pipelined in a tight loop
without the WTICK delay, but this will not work with
SLOWDOWN > 1
"""
if wtick:
wtick.next = False
elif tbi < len(UDATA):
led2_r.next = not led2_r
ud1= UDATA[tbi]
# print(o_byte, ud1)
if o_byte != ud1:
i_mode.next = IDLE
print("FAIL", len(UDATA), tbi, o_byte, ud1)
# resume.next = 1
# tstate.next = tb_state.PAUSE
tstate.next = tb_state.FAIL
# tstate.next = tb_state.RESET
raise Error("bad result")
else:
pass
# print(tbi, o_data)
i_addr.next = tbi + 1
tbi.next = tbi + 1
wtick.next = True
else:
print(len(UDATA))
print("DECOMPRESS test OK!, pausing", tbi)
i_mode.next = IDLE
tbi.next = 0
tstate.next = tb_state.PAUSE
# tstate.next = tb_state.HALT
# state.next = tb_state.CPAUSE
resume.next = 1
# tstate.next = tb_state.CWRITE
 
elif tstate == tb_state.PAUSE:
led2_r.next = 0
if resume == 0:
print("--------------COMPRESS-------------")
tbi.next = 0
led0_g.next = 0
tstate.next = tb_state.CWRITE
# tstate.next = tb_state.RESET
else:
led2_r.next = not led2_r
resume.next = resume + 1
 
#####################################
# COMPRESS TEST
#####################################
 
elif tstate == tb_state.CWRITE:
o_led.next = tbi
if tbi < len(UDATA):
# print(tbi)
led2_r.next = 0
led1_b.next = not led1_b
i_mode.next = WRITE
i_data.next = UDATA[tbi]
i_addr.next = tbi
tbi.next = tbi + 1
else:
print("wrote bytes to compress", tbi)
i_mode.next = IDLE
tstate.next = tb_state.COMPRESS
 
elif tstate == tb_state.COMPRESS:
i_mode.next = STARTC
tstate.next = tb_state.CWAIT
 
elif tstate == tb_state.CWAIT:
led2_r.next = not led2_r
if i_mode == STARTC:
print("WAIT COMPRESS")
i_mode.next = IDLE
led1_b.next = 0
elif o_done:
print("result len", o_oprogress)
resultlen.next = o_oprogress
tbi.next = 0
i_addr.next = 0
i_mode.next = READ
tstate.next = tb_state.CRESULT
wtick.next = True
 
# verify compression
elif tstate == tb_state.CRESULT:
# print("COPY COMPRESS RESULT", tbi, o_data)
led2_r.next = 0
o_led.next = tbi
if wtick:
if tbi > 0:
i_mode.next = WRITE
i_data.next = copy
i_addr.next = tbi - 1
wtick.next = False
tbi.next = tbi + 1
elif tbi < resultlen:
i_mode.next = READ
led1_b.next = not led1_b
i_addr.next = tbi
copy.next = o_byte
wtick.next = True
else:
print("Compress output bytes copied to input", resultlen, tbi - 1)
i_mode.next = IDLE
tbi.next = 0
tstate.next = tb_state.VDECOMPRESS
 
elif tstate == tb_state.VDECOMPRESS:
print("start decompress of test compression")
i_mode.next = STARTD
tstate.next = tb_state.VWAIT
 
elif tstate == tb_state.VWAIT:
led2_r.next = 0
led1_b.next = not led1_b
i_mode.next = IDLE
if i_mode == IDLE and o_done:
print("DONE DECOMPRESS VERIFY", o_oprogress)
tbi.next = 0
i_addr.next = 0
i_mode.next = READ
wtick.next = True
tstate.next = tb_state.CVERIFY
 
elif tstate == tb_state.CVERIFY:
# print("COMPRESS VERIFY", tbi, o_byte)
led1_b.next = 0
led2_r.next = not led2_r
o_led.next = tbi
if wtick:
wtick.next = False
elif tbi < len(UDATA):
ud2 = UDATA[tbi]
# print(tbi, o_byte, ud2)
if o_byte != ud2:
tstate.next = tb_state.RESET
i_mode.next = IDLE
print("FAIL", len(UDATA), tbi, ud2, o_byte)
raise Error("bad result")
tstate.next = tb_state.FAIL
tbi.next = tbi + 1
i_addr.next = tbi + 1
wtick.next = True
else:
print(len(UDATA))
print("ALL OK!", tbi)
led2_r.next = 0
i_mode.next = IDLE
resume.next = 1
if SLOWDOWN <= 4:
raise StopSimulation()
"""
"""
tstate.next = tb_state.CPAUSE
# tstate.next = tb_state.HALT
 
elif tstate == tb_state.CPAUSE:
if resume == 0:
print("--------------RESET-------------")
o_led.next = o_led + 1
tstate.next = tb_state.RESET
else:
led0_g.next = not led0_g
resume.next = resume + 1
 
"""
if now() > 50000:
raise StopSimulation()
"""
 
if SLOWDOWN == 1:
return clkgen, dut, count, logic
else:
return dut, count, logic
 
 
if 1: # not COSIMULATION:
SLOWDOWN = 22
 
tb = test_deflate_bench(Signal(bool(0)), Signal(intbv(0)[4:]),
Signal(bool(0)), Signal(bool(0)), Signal(bool(0)))
 
tb.convert(initial_values=False)
 
if 1:
SLOWDOWN = 1
tb = test_deflate_bench(Signal(bool(0)), Signal(intbv(0)[4:]),
Signal(bool(0)), Signal(bool(0)), Signal(bool(0)))
print("convert SLOWDOWN: ", SLOWDOWN)
tb.convert(name="test_fast_bench", initial_values=True)
"""
os.system("iverilog -o test_deflate " +
"test_fast_bench.v dump.v; " +
"vvp test_deflate")
"""
if 1:
print("Start Unit test")
unittest.main(verbosity=2)
/hdl-deflate/trunk/test_deflate_bench.v
0,0 → 1,3101
// File: test_deflate_bench.v
// Generated by MyHDL 0.10
// Date: Thu Dec 20 18:23:03 2018
 
 
`timescale 1ns/10ps
 
module test_deflate_bench (
i_clk,
o_led,
led0_g,
led1_b,
led2_r
);
 
 
input i_clk;
output [3:0] o_led;
reg [3:0] o_led;
output led0_g;
reg led0_g;
output led1_b;
reg led1_b;
output led2_r;
reg led2_r;
 
reg [12:0] o_iprogress;
reg [12:0] resultlen;
reg reset;
reg [12:0] o_oprogress;
reg o_done;
reg [7:0] o_byte;
reg [2:0] i_mode;
reg [7:0] i_data;
reg [12:0] i_addr;
reg [21:0] scounter;
reg [15:0] counter;
reg [4:0] tstate;
reg [14:0] tbi;
reg wtick;
reg [5:0] resume;
reg [7:0] copy;
reg [18:0] deflate0_wleaf;
reg [9:0] deflate0_step;
reg deflate0_static;
reg [4:0] deflate0_state;
reg [8:0] deflate0_spread_i;
reg [9:0] deflate0_spread;
reg [9:0] deflate0_reverse;
reg [7:0] deflate0_orbyte;
reg [12:0] deflate0_oraddr;
reg [12:0] deflate0_offset;
reg [7:0] deflate0_obyte;
reg [7:0] deflate0_ob1;
reg [12:0] deflate0_oaddr;
reg [8:0] deflate0_numLiterals;
reg [5:0] deflate0_numDistance;
reg [8:0] deflate0_numCodeLength;
reg [2:0] deflate0_nb;
reg [4:0] deflate0_minBits;
reg [2:0] deflate0_method;
reg [4:0] deflate0_maxBits;
reg [8:0] deflate0_lwaddr;
reg [12:0] deflate0_length;
reg [18:0] deflate0_leaf;
reg [14:0] deflate0_lastToken;
reg [15:0] deflate0_ladler1;
reg [12:0] deflate0_isize;
reg [9:0] deflate0_instantMaxBit;
reg [14:0] deflate0_instantMask;
reg [8:0] deflate0_howOften;
reg deflate0_flush;
reg deflate0_final;
reg deflate0_filled;
reg [2:0] deflate0_doo;
reg deflate0_do_compress;
reg [12:0] deflate0_do;
reg [2:0] deflate0_dio;
reg [12:0] deflate0_di;
reg [4:0] deflate0_d_maxBits;
reg [9:0] deflate0_d_instantMaxBit;
reg [14:0] deflate0_d_instantMask;
reg [8:0] deflate0_cur_static;
reg signed [7:0] deflate0_cur_search;
reg deflate0_cur_next;
reg [12:0] deflate0_cur_i;
reg signed [7:0] deflate0_cur_dist;
reg [12:0] deflate0_cur_cstatic;
reg [9:0] deflate0_cur_HF1;
reg [7:0] deflate0_copy1;
reg [14:0] deflate0_code;
reg [3:0] deflate0_bits;
reg [8:0] deflate0_b_numCodeLength;
wire [31:0] deflate0_b41;
reg [7:0] deflate0_b4;
reg [7:0] deflate0_b3;
reg [7:0] deflate0_b2;
reg [7:0] deflate0_b1;
reg [15:0] deflate0_adler2;
reg [15:0] deflate0_adler1;
reg [7:0] deflate0_oram [0:8192-1];
reg [9:0] deflate0_nextCode [0:15-1];
reg [18:0] deflate0_leaves [0:512-1];
reg [7:0] deflate0_iram [0:128-1];
reg [3:0] deflate0_distanceLength [0:32-1];
reg [18:0] deflate0_d_leaves [0:128-1];
reg [8:0] deflate0_code_bits [0:288-1];
reg [3:0] deflate0_codeLength [0:290-1];
reg [8:0] deflate0_bitLengthCount [0:16-1];
 
assign deflate0_b41[32-1:24] = deflate0_b4;
assign deflate0_b41[24-1:16] = deflate0_b3;
assign deflate0_b41[16-1:8] = deflate0_b2;
assign deflate0_b41[8-1:0] = deflate0_b1;
 
task MYHDL3_adv;
input width;
integer width;
integer nshift;
begin: MYHDL79_RETURN
nshift = ((deflate0_dio + width) >>> 3);
o_iprogress <= deflate0_di;
deflate0_dio <= ((deflate0_dio + width) & 7);
deflate0_di <= ($signed({1'b0, deflate0_di}) + nshift);
if ((nshift != 0)) begin
deflate0_filled <= 1'b0;
end
end
endtask
 
function integer MYHDL4_get4;
input boffset;
input width;
begin: MYHDL80_RETURN
if ((deflate0_nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL4_get4 = ((deflate0_b41 >>> (deflate0_dio + boffset)) & ((1 << width) - 1));
disable MYHDL80_RETURN;
end
endfunction
 
function integer MYHDL5_get4;
input boffset;
input width;
integer width;
begin: MYHDL81_RETURN
if ((deflate0_nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL5_get4 = ((deflate0_b41 >>> (deflate0_dio + boffset)) & ((1 << width) - 1));
disable MYHDL81_RETURN;
end
endfunction
 
task MYHDL6_adv;
input width;
integer width;
integer nshift;
begin: MYHDL82_RETURN
nshift = ((deflate0_dio + width) >>> 3);
o_iprogress <= deflate0_di;
deflate0_dio <= ((deflate0_dio + width) & 7);
deflate0_di <= ($signed({1'b0, deflate0_di}) + nshift);
if ((nshift != 0)) begin
deflate0_filled <= 1'b0;
end
end
endtask
 
task MYHDL7_adv;
input width;
integer width;
integer nshift;
begin: MYHDL83_RETURN
nshift = ((deflate0_dio + width) >>> 3);
o_iprogress <= deflate0_di;
deflate0_dio <= ((deflate0_dio + width) & 7);
deflate0_di <= ($signed({1'b0, deflate0_di}) + nshift);
if ((nshift != 0)) begin
deflate0_filled <= 1'b0;
end
end
endtask
 
function integer MYHDL8_get4;
input boffset;
integer boffset;
input width;
integer width;
begin: MYHDL84_RETURN
if ((deflate0_nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL8_get4 = ($signed($signed({1'b0, deflate0_b41}) >>> ($signed({1'b0, deflate0_dio}) + boffset)) & ((1 << width) - 1));
disable MYHDL84_RETURN;
end
endfunction
 
task MYHDL9_adv;
input width;
integer width;
integer nshift;
begin: MYHDL85_RETURN
nshift = $signed(($signed({1'b0, deflate0_dio}) + width) >>> 3);
o_iprogress <= deflate0_di;
deflate0_dio <= (($signed({1'b0, deflate0_dio}) + width) & 7);
deflate0_di <= ($signed({1'b0, deflate0_di}) + nshift);
if ((nshift != 0)) begin
deflate0_filled <= 1'b0;
end
end
endtask
 
function integer MYHDL10_put;
input d;
integer d;
input width;
integer width;
begin: MYHDL86_RETURN
if ((width > 9)) begin
$finish;
end
if (($signed({1'b0, d}) > ((1 << width) - 1))) begin
$finish;
end
MYHDL10_put = ((deflate0_ob1 | (d << deflate0_doo)) & 255);
disable MYHDL86_RETURN;
end
endfunction
 
task MYHDL11_put_adv;
input d;
integer d;
input width;
integer width;
reg pshift;
integer carry;
integer doo_next;
begin: MYHDL87_RETURN
if ((width > 9)) begin
$finish;
end
if (($signed({1'b0, d}) > ((1 << width) - 1))) begin
$finish;
end
pshift = ((deflate0_doo + width) > 8);
if (pshift) begin
carry = ($signed({1'b0, width}) - (8 - $signed({1'b0, deflate0_doo})));
deflate0_ob1 <= $signed($signed({1'b0, d}) >>> ($signed({1'b0, width}) - carry));
end
else begin
deflate0_ob1 <= (deflate0_ob1 | (d << deflate0_doo));
end
deflate0_do <= (deflate0_do + pshift);
o_oprogress <= (deflate0_do + pshift);
doo_next = ((deflate0_doo + width) & 7);
if ((doo_next == 0)) begin
deflate0_flush <= 1'b1;
end
deflate0_doo <= doo_next;
end
endtask
 
task MYHDL12_do_flush;
begin: MYHDL88_RETURN
deflate0_flush <= 1'b0;
deflate0_ob1 <= 0;
o_oprogress <= (deflate0_do + 1);
deflate0_do <= (deflate0_do + 1);
end
endtask
 
function integer MYHDL13_put;
input [9-1:0] d;
input [4-1:0] width;
begin: MYHDL89_RETURN
if ((width > 9)) begin
$finish;
end
if (($signed({1'b0, d}) > ((1 << width) - 1))) begin
$finish;
end
MYHDL13_put = ((deflate0_ob1 | (d << deflate0_doo)) & 255);
disable MYHDL89_RETURN;
end
endfunction
 
task MYHDL14_put_adv;
input [9-1:0] d;
input [4-1:0] width;
reg pshift;
integer carry;
integer doo_next;
begin: MYHDL90_RETURN
if ((width > 9)) begin
$finish;
end
if (($signed({1'b0, d}) > ((1 << width) - 1))) begin
$finish;
end
pshift = ((deflate0_doo + width) > 8);
if (pshift) begin
carry = ($signed({1'b0, width}) - (8 - $signed({1'b0, deflate0_doo})));
deflate0_ob1 <= $signed($signed({1'b0, d}) >>> ($signed({1'b0, width}) - carry));
end
else begin
deflate0_ob1 <= (deflate0_ob1 | (d << deflate0_doo));
end
deflate0_do <= (deflate0_do + pshift);
o_oprogress <= (deflate0_do + pshift);
doo_next = ((deflate0_doo + width) & 7);
if ((doo_next == 0)) begin
deflate0_flush <= 1'b1;
end
deflate0_doo <= doo_next;
end
endtask
 
task MYHDL15_do_flush;
begin: MYHDL91_RETURN
deflate0_flush <= 1'b0;
deflate0_ob1 <= 0;
o_oprogress <= (deflate0_do + 1);
deflate0_do <= (deflate0_do + 1);
end
endtask
 
function integer MYHDL16_rev_bits;
input [13-1:0] b;
input nb;
integer nb;
integer r;
begin: MYHDL92_RETURN
if ((b >= (1 << nb))) begin
$finish;
$write("too few bits");
$write("\n");
end
r = (((((((((((((((((b >>> 14) & 1) << 0) | (((b >>> 13) & 1) << 1)) | (((b >>> 12) & 1) << 2)) | (((b >>> 11) & 1) << 3)) | (((b >>> 10) & 1) << 4)) | (((b >>> 9) & 1) << 5)) | (((b >>> 8) & 1) << 6)) | (((b >>> 7) & 1) << 7)) | (((b >>> 6) & 1) << 8)) | (((b >>> 5) & 1) << 9)) | (((b >>> 4) & 1) << 10)) | (((b >>> 3) & 1) << 11)) | (((b >>> 2) & 1) << 12)) | (((b >>> 1) & 1) << 13)) | (((b >>> 0) & 1) << 14));
r = r >>> (15 - $signed({1'b0, nb}));
MYHDL16_rev_bits = r;
disable MYHDL92_RETURN;
end
endfunction
 
function integer MYHDL17_put;
input d;
integer d;
input width;
integer width;
begin: MYHDL93_RETURN
if ((width > 9)) begin
$finish;
end
if ((d > ((1 << width) - 1))) begin
$finish;
end
MYHDL17_put = (($signed({1'b0, deflate0_ob1}) | (d << $signed({1'b0, deflate0_doo}))) & 255);
disable MYHDL93_RETURN;
end
endfunction
 
task MYHDL18_put_adv;
input d;
integer d;
input width;
integer width;
reg pshift;
integer carry;
integer doo_next;
begin: MYHDL94_RETURN
if ((width > 9)) begin
$finish;
end
if ((d > ((1 << width) - 1))) begin
$finish;
end
pshift = (($signed({1'b0, deflate0_doo}) + width) > 8);
if (pshift) begin
carry = (width - (8 - $signed({1'b0, deflate0_doo})));
deflate0_ob1 <= $signed(d >>> (width - carry));
end
else begin
deflate0_ob1 <= ($signed({1'b0, deflate0_ob1}) | (d << $signed({1'b0, deflate0_doo})));
end
deflate0_do <= (deflate0_do + pshift);
o_oprogress <= (deflate0_do + pshift);
doo_next = (($signed({1'b0, deflate0_doo}) + width) & 7);
if ((doo_next == 0)) begin
deflate0_flush <= 1'b1;
end
deflate0_doo <= doo_next;
end
endtask
 
function integer MYHDL19_put;
input [9-1:0] d;
input [4-1:0] width;
begin: MYHDL95_RETURN
if ((width > 9)) begin
$finish;
end
if (($signed({1'b0, d}) > ((1 << width) - 1))) begin
$finish;
end
MYHDL19_put = ((deflate0_ob1 | (d << deflate0_doo)) & 255);
disable MYHDL95_RETURN;
end
endfunction
 
task MYHDL20_put_adv;
input [9-1:0] d;
input [4-1:0] width;
reg pshift;
integer carry;
integer doo_next;
begin: MYHDL96_RETURN
if ((width > 9)) begin
$finish;
end
if (($signed({1'b0, d}) > ((1 << width) - 1))) begin
$finish;
end
pshift = ((deflate0_doo + width) > 8);
if (pshift) begin
carry = ($signed({1'b0, width}) - (8 - $signed({1'b0, deflate0_doo})));
deflate0_ob1 <= $signed($signed({1'b0, d}) >>> ($signed({1'b0, width}) - carry));
end
else begin
deflate0_ob1 <= (deflate0_ob1 | (d << deflate0_doo));
end
deflate0_do <= (deflate0_do + pshift);
o_oprogress <= (deflate0_do + pshift);
doo_next = ((deflate0_doo + width) & 7);
if ((doo_next == 0)) begin
deflate0_flush <= 1'b1;
end
deflate0_doo <= doo_next;
end
endtask
 
function integer MYHDL21_put;
input [9-1:0] d;
input [4-1:0] width;
begin: MYHDL97_RETURN
if ((width > 9)) begin
$finish;
end
if (($signed({1'b0, d}) > ((1 << width) - 1))) begin
$finish;
end
MYHDL21_put = ((deflate0_ob1 | (d << deflate0_doo)) & 255);
disable MYHDL97_RETURN;
end
endfunction
 
task MYHDL22_put_adv;
input [9-1:0] d;
input [4-1:0] width;
reg pshift;
integer carry;
integer doo_next;
begin: MYHDL98_RETURN
if ((width > 9)) begin
$finish;
end
if (($signed({1'b0, d}) > ((1 << width) - 1))) begin
$finish;
end
pshift = ((deflate0_doo + width) > 8);
if (pshift) begin
carry = ($signed({1'b0, width}) - (8 - $signed({1'b0, deflate0_doo})));
deflate0_ob1 <= $signed($signed({1'b0, d}) >>> ($signed({1'b0, width}) - carry));
end
else begin
deflate0_ob1 <= (deflate0_ob1 | (d << deflate0_doo));
end
deflate0_do <= (deflate0_do + pshift);
o_oprogress <= (deflate0_do + pshift);
doo_next = ((deflate0_doo + width) & 7);
if ((doo_next == 0)) begin
deflate0_flush <= 1'b1;
end
deflate0_doo <= doo_next;
end
endtask
 
function integer MYHDL31_get4;
input boffset;
input width;
integer width;
begin: MYHDL99_RETURN
if ((deflate0_nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL31_get4 = ((deflate0_b41 >>> (deflate0_dio + boffset)) & ((1 << width) - 1));
disable MYHDL99_RETURN;
end
endfunction
 
function integer MYHDL32_get4;
input boffset;
input width;
integer width;
begin: MYHDL100_RETURN
if ((deflate0_nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL32_get4 = ((deflate0_b41 >>> (deflate0_dio + boffset)) & ((1 << width) - 1));
disable MYHDL100_RETURN;
end
endfunction
 
function integer MYHDL33_get4;
input boffset;
integer boffset;
input width;
integer width;
begin: MYHDL101_RETURN
if ((deflate0_nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL33_get4 = ((deflate0_b41 >>> (deflate0_dio + boffset)) & ((1 << width) - 1));
disable MYHDL101_RETURN;
end
endfunction
 
function integer MYHDL34_get4;
input boffset;
integer boffset;
input width;
integer width;
begin: MYHDL102_RETURN
if ((deflate0_nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL34_get4 = ((deflate0_b41 >>> (deflate0_dio + boffset)) & ((1 << width) - 1));
disable MYHDL102_RETURN;
end
endfunction
 
function integer MYHDL35_get4;
input boffset;
integer boffset;
input width;
integer width;
begin: MYHDL103_RETURN
if ((deflate0_nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL35_get4 = ((deflate0_b41 >>> (deflate0_dio + boffset)) & ((1 << width) - 1));
disable MYHDL103_RETURN;
end
endfunction
 
function integer MYHDL36_get4;
input boffset;
integer boffset;
input width;
integer width;
begin: MYHDL104_RETURN
if ((deflate0_nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL36_get4 = ((deflate0_b41 >>> (deflate0_dio + boffset)) & ((1 << width) - 1));
disable MYHDL104_RETURN;
end
endfunction
 
task MYHDL37_adv;
input width;
integer width;
integer nshift;
begin: MYHDL105_RETURN
nshift = ((deflate0_dio + width) >>> 3);
o_iprogress <= deflate0_di;
deflate0_dio <= ((deflate0_dio + width) & 7);
deflate0_di <= ($signed({1'b0, deflate0_di}) + nshift);
if ((nshift != 0)) begin
deflate0_filled <= 1'b0;
end
end
endtask
 
function integer MYHDL38_get4;
input boffset;
input width;
integer width;
begin: MYHDL106_RETURN
if ((deflate0_nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL38_get4 = ((deflate0_b41 >>> (deflate0_dio + boffset)) & ((1 << width) - 1));
disable MYHDL106_RETURN;
end
endfunction
 
task MYHDL39_adv;
input width;
integer width;
integer nshift;
begin: MYHDL107_RETURN
nshift = ((deflate0_dio + width) >>> 3);
o_iprogress <= deflate0_di;
deflate0_dio <= ((deflate0_dio + width) & 7);
deflate0_di <= ($signed({1'b0, deflate0_di}) + nshift);
if ((nshift != 0)) begin
deflate0_filled <= 1'b0;
end
end
endtask
 
function integer MYHDL40_get4;
input boffset;
input width;
integer width;
begin: MYHDL108_RETURN
if ((deflate0_nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL40_get4 = ((deflate0_b41 >>> (deflate0_dio + boffset)) & ((1 << width) - 1));
disable MYHDL108_RETURN;
end
endfunction
 
function integer MYHDL41_get4;
input boffset;
input width;
integer width;
begin: MYHDL109_RETURN
if ((deflate0_nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL41_get4 = ((deflate0_b41 >>> (deflate0_dio + boffset)) & ((1 << width) - 1));
disable MYHDL109_RETURN;
end
endfunction
 
function integer MYHDL42_get4;
input boffset;
input width;
integer width;
begin: MYHDL110_RETURN
if ((deflate0_nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL42_get4 = ((deflate0_b41 >>> (deflate0_dio + boffset)) & ((1 << width) - 1));
disable MYHDL110_RETURN;
end
endfunction
 
task MYHDL43_adv;
input width;
integer width;
integer nshift;
begin: MYHDL111_RETURN
nshift = ((deflate0_dio + width) >>> 3);
o_iprogress <= deflate0_di;
deflate0_dio <= ((deflate0_dio + width) & 7);
deflate0_di <= ($signed({1'b0, deflate0_di}) + nshift);
if ((nshift != 0)) begin
deflate0_filled <= 1'b0;
end
end
endtask
 
function integer MYHDL50_rev_bits;
input [10-1:0] b;
input [4-1:0] nb;
integer r;
begin: MYHDL112_RETURN
if ((b >= (1 << nb))) begin
$finish;
$write("too few bits");
$write("\n");
end
r = (((((((((((((((((b >>> 14) & 1) << 0) | (((b >>> 13) & 1) << 1)) | (((b >>> 12) & 1) << 2)) | (((b >>> 11) & 1) << 3)) | (((b >>> 10) & 1) << 4)) | (((b >>> 9) & 1) << 5)) | (((b >>> 8) & 1) << 6)) | (((b >>> 7) & 1) << 7)) | (((b >>> 6) & 1) << 8)) | (((b >>> 5) & 1) << 9)) | (((b >>> 4) & 1) << 10)) | (((b >>> 3) & 1) << 11)) | (((b >>> 2) & 1) << 12)) | (((b >>> 1) & 1) << 13)) | (((b >>> 0) & 1) << 14));
r = r >>> (15 - $signed({1'b0, nb}));
MYHDL50_rev_bits = r;
disable MYHDL112_RETURN;
end
endfunction
 
function integer MYHDL51_makeLeaf;
input [9-1:0] lcode;
input [4-1:0] lbits;
begin: MYHDL113_RETURN
if ((lcode >= (1 << 10))) begin
$finish;
end
if ((lbits >= (1 << 9))) begin
$finish;
end
MYHDL51_makeLeaf = ((lcode << 9) | lbits);
disable MYHDL113_RETURN;
end
endfunction
 
function integer MYHDL52_makeLeaf;
input [9-1:0] lcode;
input [4-1:0] lbits;
begin: MYHDL114_RETURN
if ((lcode >= (1 << 10))) begin
$finish;
end
if ((lbits >= (1 << 9))) begin
$finish;
end
MYHDL52_makeLeaf = ((lcode << 9) | lbits);
disable MYHDL114_RETURN;
end
endfunction
 
function integer MYHDL53_makeLeaf;
input [9-1:0] lcode;
input [4-1:0] lbits;
begin: MYHDL115_RETURN
if ((lcode >= (1 << 10))) begin
$finish;
end
if ((lbits >= (1 << 9))) begin
$finish;
end
MYHDL53_makeLeaf = ((lcode << 9) | lbits);
disable MYHDL115_RETURN;
end
endfunction
 
function integer MYHDL54_get4;
input boffset;
input [5-1:0] width;
begin: MYHDL116_RETURN
if ((deflate0_nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL54_get4 = ((deflate0_b41 >>> (deflate0_dio + boffset)) & ((1 << width) - 1));
disable MYHDL116_RETURN;
end
endfunction
 
function integer MYHDL55_get_bits;
input [19-1:0] aleaf;
begin: MYHDL117_RETURN
MYHDL55_get_bits = ($signed({1'b0, aleaf}) & ((1 << 9) - 1));
disable MYHDL117_RETURN;
end
endfunction
 
function integer MYHDL56_get_bits;
input [19-1:0] aleaf;
begin: MYHDL118_RETURN
MYHDL56_get_bits = ($signed({1'b0, aleaf}) & ((1 << 9) - 1));
disable MYHDL118_RETURN;
end
endfunction
 
task MYHDL57_adv;
input width;
integer width;
integer nshift;
begin: MYHDL119_RETURN
nshift = $signed(($signed({1'b0, deflate0_dio}) + width) >>> 3);
o_iprogress <= deflate0_di;
deflate0_dio <= (($signed({1'b0, deflate0_dio}) + width) & 7);
deflate0_di <= ($signed({1'b0, deflate0_di}) + nshift);
if ((nshift != 0)) begin
deflate0_filled <= 1'b0;
end
end
endtask
 
function integer MYHDL58_get_code;
input [19-1:0] aleaf;
begin: MYHDL120_RETURN
MYHDL58_get_code = (aleaf >>> 9);
disable MYHDL120_RETURN;
end
endfunction
 
function integer MYHDL59_get_code;
input [19-1:0] aleaf;
begin: MYHDL121_RETURN
MYHDL59_get_code = (aleaf >>> 9);
disable MYHDL121_RETURN;
end
endfunction
 
function integer MYHDL60_get4;
input boffset;
integer boffset;
input [5-1:0] width;
begin: MYHDL122_RETURN
if ((deflate0_nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL60_get4 = ($signed($signed({1'b0, deflate0_b41}) >>> ($signed({1'b0, deflate0_dio}) + boffset)) & ((1 << width) - 1));
disable MYHDL122_RETURN;
end
endfunction
 
function integer MYHDL61_get_bits;
input [19-1:0] aleaf;
begin: MYHDL123_RETURN
MYHDL61_get_bits = ($signed({1'b0, aleaf}) & ((1 << 9) - 1));
disable MYHDL123_RETURN;
end
endfunction
 
function integer MYHDL62_get4;
input boffset;
input width;
integer width;
begin: MYHDL124_RETURN
if ((deflate0_nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL62_get4 = ((deflate0_b41 >>> (deflate0_dio + boffset)) & ((1 << width) - 1));
disable MYHDL124_RETURN;
end
endfunction
 
function integer MYHDL63_get_code;
input [19-1:0] aleaf;
begin: MYHDL125_RETURN
MYHDL63_get_code = (aleaf >>> 9);
disable MYHDL125_RETURN;
end
endfunction
 
function integer MYHDL64_get_bits;
input [19-1:0] aleaf;
begin: MYHDL126_RETURN
MYHDL64_get_bits = ($signed({1'b0, aleaf}) & ((1 << 9) - 1));
disable MYHDL126_RETURN;
end
endfunction
 
function integer MYHDL65_get4;
input boffset;
integer boffset;
input width;
integer width;
begin: MYHDL127_RETURN
if ((deflate0_nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL65_get4 = ($signed($signed({1'b0, deflate0_b41}) >>> ($signed({1'b0, deflate0_dio}) + boffset)) & ((1 << width) - 1));
disable MYHDL127_RETURN;
end
endfunction
 
function integer MYHDL66_get_bits;
input [19-1:0] aleaf;
begin: MYHDL128_RETURN
MYHDL66_get_bits = ($signed({1'b0, aleaf}) & ((1 << 9) - 1));
disable MYHDL128_RETURN;
end
endfunction
 
task MYHDL67_adv;
input width;
integer width;
integer nshift;
begin: MYHDL129_RETURN
nshift = $signed(($signed({1'b0, deflate0_dio}) + width) >>> 3);
o_iprogress <= deflate0_di;
deflate0_dio <= (($signed({1'b0, deflate0_dio}) + width) & 7);
deflate0_di <= ($signed({1'b0, deflate0_di}) + nshift);
if ((nshift != 0)) begin
deflate0_filled <= 1'b0;
end
end
endtask
 
function integer MYHDL68_get4;
input boffset;
input width;
integer width;
begin: MYHDL130_RETURN
if ((deflate0_nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL68_get4 = ((deflate0_b41 >>> (deflate0_dio + boffset)) & ((1 << width) - 1));
disable MYHDL130_RETURN;
end
endfunction
 
function integer MYHDL69_get4;
input boffset;
integer boffset;
input width;
integer width;
begin: MYHDL131_RETURN
if ((deflate0_nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL69_get4 = ($signed($signed({1'b0, deflate0_b41}) >>> ($signed({1'b0, deflate0_dio}) + boffset)) & ((1 << width) - 1));
disable MYHDL131_RETURN;
end
endfunction
 
function integer MYHDL70_rev_bits;
input b;
integer b;
input nb;
integer nb;
integer r;
begin: MYHDL132_RETURN
if ((b >= (1 << nb))) begin
$finish;
$write("too few bits");
$write("\n");
end
r = (((((((((((((((((b >>> 14) & 1) << 0) | (((b >>> 13) & 1) << 1)) | (((b >>> 12) & 1) << 2)) | (((b >>> 11) & 1) << 3)) | (((b >>> 10) & 1) << 4)) | (((b >>> 9) & 1) << 5)) | (((b >>> 8) & 1) << 6)) | (((b >>> 7) & 1) << 7)) | (((b >>> 6) & 1) << 8)) | (((b >>> 5) & 1) << 9)) | (((b >>> 4) & 1) << 10)) | (((b >>> 3) & 1) << 11)) | (((b >>> 2) & 1) << 12)) | (((b >>> 1) & 1) << 13)) | (((b >>> 0) & 1) << 14));
r = r >>> (15 - $signed({1'b0, nb}));
MYHDL70_rev_bits = r;
disable MYHDL132_RETURN;
end
endfunction
 
function integer MYHDL71_get4;
input boffset;
integer boffset;
input width;
integer width;
begin: MYHDL133_RETURN
if ((deflate0_nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL71_get4 = ($signed($signed({1'b0, deflate0_b41}) >>> ($signed({1'b0, deflate0_dio}) + boffset)) & ((1 << width) - 1));
disable MYHDL133_RETURN;
end
endfunction
 
task MYHDL72_adv;
input width;
integer width;
integer nshift;
begin: MYHDL134_RETURN
nshift = $signed(($signed({1'b0, deflate0_dio}) + width) >>> 3);
o_iprogress <= deflate0_di;
deflate0_dio <= (($signed({1'b0, deflate0_dio}) + width) & 7);
deflate0_di <= ($signed({1'b0, deflate0_di}) + nshift);
if ((nshift != 0)) begin
deflate0_filled <= 1'b0;
end
end
endtask
 
task MYHDL73_adv;
input width;
integer width;
integer nshift;
begin: MYHDL135_RETURN
nshift = ((deflate0_dio + width) >>> 3);
o_iprogress <= deflate0_di;
deflate0_dio <= ((deflate0_dio + width) & 7);
deflate0_di <= ($signed({1'b0, deflate0_di}) + nshift);
if ((nshift != 0)) begin
deflate0_filled <= 1'b0;
end
end
endtask
 
 
always @(posedge i_clk) begin: TEST_DEFLATE_BENCH_DEFLATE0_IO_LOGIC
case (i_mode)
'h2: begin
deflate0_iram[(i_addr & 127)] <= i_data;
deflate0_isize <= i_addr;
end
'h3: begin
o_byte <= deflate0_oram[i_addr];
end
default: begin
// pass
end
endcase
end
 
 
always @(posedge i_clk) begin: TEST_DEFLATE_BENCH_DEFLATE0_LOGIC
integer hm;
integer skip;
reg no_adv;
integer cs_i;
reg [4-1:0] outlen;
reg [9-1:0] outbits;
reg [8-1:0] bdata;
integer adler1_next;
integer nextdist;
integer copydist;
integer extra_dist;
integer extra_bits;
integer outcode;
integer lencode;
integer match;
integer distance;
integer stat_i;
integer clo_i;
integer n_adv;
integer dbl_i;
integer dbl;
integer dist_i;
integer limit;
reg [4-1:0] j;
integer t;
integer hf2_i;
reg [5-1:0] amb;
integer ncode;
reg [10-1:0] canonical;
reg [4-1:0] bits_next;
reg [15-1:0] aim;
integer cto;
integer mask;
integer token;
integer extraLength;
integer tlength;
integer distanceCode;
integer moreBits;
integer mored;
if ((!reset)) begin
$write("DEFLATE RESET");
$write("\n");
deflate0_state <= 5'b00000;
o_done <= 1'b0;
end
else begin
case (deflate0_state)
5'b00000: begin
case (i_mode)
'h4: begin
$write("STARTC");
$write("\n");
deflate0_do_compress <= 1'b1;
deflate0_method <= 1;
o_done <= 1'b0;
o_iprogress <= 0;
o_oprogress <= 0;
deflate0_di <= 0;
deflate0_dio <= 0;
deflate0_do <= 0;
deflate0_doo <= 0;
deflate0_filled <= 1'b1;
deflate0_cur_static <= 0;
deflate0_state <= 5'b01110;
end
'h5: begin
deflate0_do_compress <= 1'b0;
o_done <= 1'b0;
o_iprogress <= 0;
o_oprogress <= 0;
deflate0_di <= 0;
deflate0_dio <= 0;
deflate0_do <= 0;
deflate0_doo <= 0;
deflate0_filled <= 1'b1;
deflate0_state <= 5'b00001;
end
default: begin
// pass
end
endcase
end
5'b00001: begin
if ((!deflate0_filled)) begin
deflate0_filled <= 1'b1;
end
else if ((deflate0_nb < 4)) begin
// pass
end
else if ((deflate0_di == 0)) begin
if ((deflate0_b1 == 120)) begin
$write("deflate mode");
$write("\n");
end
else begin
$write("%h", deflate0_di);
$write(" ");
$write("%h", deflate0_dio);
$write(" ");
$write("%h", deflate0_nb);
$write(" ");
$write("%h", deflate0_b1);
$write(" ");
$write("%h", deflate0_b2);
$write(" ");
$write("%h", deflate0_b3);
$write(" ");
$write("%h", deflate0_b4);
$write(" ");
$write("%h", deflate0_isize);
$write("\n");
$finish;
o_done <= 1'b1;
deflate0_state <= 5'b00000;
end
MYHDL3_adv(16);
end
else begin
if (MYHDL4_get4(0, 1)) begin
$write("final");
$write("\n");
deflate0_final <= 1'b1;
end
hm = MYHDL5_get4(1, 2);
deflate0_method <= hm;
$write("method");
$write(" ");
$write("%0d", hm);
$write("\n");
case (hm)
'h2: begin
deflate0_state <= 5'b00010;
deflate0_numCodeLength <= 0;
deflate0_numLiterals <= 0;
deflate0_static <= 1'b0;
MYHDL6_adv(3);
end
'h1: begin
deflate0_static <= 1'b1;
deflate0_cur_static <= 0;
deflate0_state <= 5'b01110;
MYHDL7_adv(3);
end
'h0: begin
deflate0_state <= 5'b10101;
skip = (8 - deflate0_dio);
if ((skip <= 2)) begin
skip = (16 - deflate0_dio);
end
deflate0_length <= MYHDL8_get4(skip, 16);
MYHDL9_adv((skip + 16));
deflate0_cur_i <= 0;
deflate0_offset <= 7;
end
default: begin
deflate0_state <= 5'b00000;
$write("Bad method");
$write("\n");
$finish;
end
endcase
end
end
5'b10110: begin
no_adv = 0;
if ((!deflate0_filled)) begin
no_adv = 1;
deflate0_filled <= 1'b1;
end
else if ((deflate0_nb < 4)) begin
no_adv = 1;
// pass
end
else if ((deflate0_cur_cstatic == 0)) begin
deflate0_flush <= 1'b0;
deflate0_ob1 <= 0;
deflate0_adler1 <= 1;
deflate0_adler2 <= 0;
deflate0_ladler1 <= 0;
deflate0_oaddr <= 0;
deflate0_obyte <= 120;
end
else if ((deflate0_cur_cstatic == 1)) begin
deflate0_oaddr <= 1;
deflate0_obyte <= 156;
deflate0_do <= 2;
end
else if ((deflate0_cur_cstatic == 2)) begin
deflate0_oaddr <= deflate0_do;
deflate0_obyte <= MYHDL10_put(3, 3);
MYHDL11_put_adv(3, 3);
end
else if (deflate0_flush) begin
$write("flush");
$write(" ");
$write("%h", deflate0_do);
$write(" ");
$write("%h", deflate0_ob1);
$write("\n");
no_adv = 1;
deflate0_oaddr <= deflate0_do;
deflate0_obyte <= deflate0_ob1;
MYHDL12_do_flush;
end
else if ((($signed({1'b0, deflate0_cur_cstatic}) - 3) > deflate0_isize)) begin
if ((($signed({1'b0, deflate0_cur_cstatic}) - 3) == (deflate0_isize + 1))) begin
$write("Put EOF");
$write(" ");
$write("%h", deflate0_do);
$write("\n");
cs_i = 256;
outlen = deflate0_codeLength[cs_i];
outbits = deflate0_code_bits[cs_i];
$write("EOF BITS:");
$write(" ");
$write("%0d", cs_i);
$write(" ");
$write("%h", outlen);
$write(" ");
$write("%h", outbits);
$write("\n");
deflate0_oaddr <= deflate0_do;
deflate0_obyte <= MYHDL13_put(outbits, outlen);
MYHDL14_put_adv(outbits, outlen);
end
else if ((($signed({1'b0, deflate0_cur_cstatic}) - 3) == (deflate0_isize + 2))) begin
$write("calc end adler");
$write("\n");
deflate0_adler2 <= ((deflate0_adler2 + deflate0_ladler1) % 65521);
if ((deflate0_doo != 0)) begin
deflate0_oaddr <= deflate0_do;
deflate0_obyte <= deflate0_ob1;
deflate0_do <= (deflate0_do + 1);
end
end
else if ((($signed({1'b0, deflate0_cur_cstatic}) - 3) == (deflate0_isize + 3))) begin
$write("c1");
$write("\n");
deflate0_oaddr <= deflate0_do;
deflate0_obyte <= (deflate0_adler2 >>> 8);
deflate0_do <= (deflate0_do + 1);
end
else if ((($signed({1'b0, deflate0_cur_cstatic}) - 3) == (deflate0_isize + 4))) begin
$write("c2");
$write("\n");
deflate0_oaddr <= deflate0_do;
deflate0_obyte <= (deflate0_adler2 & 255);
deflate0_do <= (deflate0_do + 1);
end
else if ((($signed({1'b0, deflate0_cur_cstatic}) - 3) == (deflate0_isize + 5))) begin
$write("c3");
$write("\n");
deflate0_oaddr <= deflate0_do;
deflate0_obyte <= (deflate0_adler1 >>> 8);
deflate0_do <= (deflate0_do + 1);
end
else if ((($signed({1'b0, deflate0_cur_cstatic}) - 3) == (deflate0_isize + 6))) begin
$write("c4");
$write("\n");
deflate0_oaddr <= deflate0_do;
deflate0_obyte <= (deflate0_adler1 & 255);
end
else if ((($signed({1'b0, deflate0_cur_cstatic}) - 3) == (deflate0_isize + 7))) begin
$write("EOF finish");
$write(" ");
$write("%h", deflate0_do);
$write("\n");
o_done <= 1'b1;
o_oprogress <= (deflate0_do + 1);
deflate0_state <= 5'b00000;
end
else begin
$write("%h", deflate0_cur_cstatic);
$write(" ");
$write("%h", deflate0_isize);
$write("\n");
$finish;
end
end
else begin
bdata = deflate0_iram[deflate0_di];
adler1_next = ((deflate0_adler1 + bdata) % 65521);
deflate0_adler1 <= adler1_next;
deflate0_adler2 <= ((deflate0_adler2 + deflate0_ladler1) % 65521);
deflate0_ladler1 <= adler1_next;
deflate0_state <= 5'b10111;
deflate0_cur_search <= (deflate0_di - 1);
end
if ((!no_adv)) begin
deflate0_cur_cstatic <= (deflate0_cur_cstatic + 1);
end
end
5'b11000: begin
if (deflate0_flush) begin
MYHDL15_do_flush;
end
else begin
case ((deflate0_cur_i + 1))
0: nextdist = 1;
1: nextdist = 2;
2: nextdist = 3;
3: nextdist = 4;
4: nextdist = 5;
5: nextdist = 7;
6: nextdist = 9;
7: nextdist = 13;
8: nextdist = 17;
9: nextdist = 25;
10: nextdist = 33;
11: nextdist = 49;
12: nextdist = 65;
13: nextdist = 97;
14: nextdist = 129;
15: nextdist = 193;
16: nextdist = 257;
17: nextdist = 385;
18: nextdist = 513;
19: nextdist = 769;
20: nextdist = 1025;
21: nextdist = 1537;
22: nextdist = 2049;
23: nextdist = 3073;
24: nextdist = 4097;
25: nextdist = 6145;
26: nextdist = 8193;
27: nextdist = 12289;
28: nextdist = 16385;
default: nextdist = 24577;
endcase
if ((nextdist > deflate0_cur_dist)) begin
case (deflate0_cur_i)
0: copydist = 1;
1: copydist = 2;
2: copydist = 3;
3: copydist = 4;
4: copydist = 5;
5: copydist = 7;
6: copydist = 9;
7: copydist = 13;
8: copydist = 17;
9: copydist = 25;
10: copydist = 33;
11: copydist = 49;
12: copydist = 65;
13: copydist = 97;
14: copydist = 129;
15: copydist = 193;
16: copydist = 257;
17: copydist = 385;
18: copydist = 513;
19: copydist = 769;
20: copydist = 1025;
21: copydist = 1537;
22: copydist = 2049;
23: copydist = 3073;
24: copydist = 4097;
25: copydist = 6145;
26: copydist = 8193;
27: copydist = 12289;
28: copydist = 16385;
default: copydist = 24577;
endcase
extra_dist = (deflate0_cur_dist - copydist);
case ((deflate0_cur_i / 2))
0: extra_bits = 0;
1: extra_bits = 0;
2: extra_bits = 1;
3: extra_bits = 2;
4: extra_bits = 3;
5: extra_bits = 4;
6: extra_bits = 5;
7: extra_bits = 6;
8: extra_bits = 7;
9: extra_bits = 8;
10: extra_bits = 9;
11: extra_bits = 10;
12: extra_bits = 11;
13: extra_bits = 12;
default: extra_bits = 13;
endcase
if ((extra_dist > ((1 << extra_bits) - 1))) begin
$finish;
end
outcode = (MYHDL16_rev_bits(deflate0_cur_i, 5) | (extra_dist << 5));
deflate0_oaddr <= deflate0_do;
deflate0_obyte <= MYHDL17_put(outcode, (5 + extra_bits));
MYHDL18_put_adv(outcode, (5 + extra_bits));
deflate0_cur_i <= (($signed({1'b0, deflate0_di}) - $signed({1'b0, deflate0_length})) + 1);
deflate0_state <= 5'b11001;
end
else begin
deflate0_cur_i <= (deflate0_cur_i + 1);
end
end
end
5'b11001: begin
if ((deflate0_cur_i < deflate0_di)) begin
bdata = deflate0_iram[(deflate0_cur_i & 127)];
adler1_next = ((deflate0_adler1 + bdata) % 65521);
deflate0_adler1 <= adler1_next;
deflate0_adler2 <= ((deflate0_adler2 + deflate0_ladler1) % 65521);
deflate0_ladler1 <= adler1_next;
deflate0_cur_i <= (deflate0_cur_i + 1);
end
else begin
deflate0_state <= 5'b10110;
end
end
5'b10111: begin
if ((!deflate0_filled)) begin
deflate0_filled <= 1'b1;
end
else if ((deflate0_nb < 4)) begin
// pass
end
else begin
if (((deflate0_cur_search >= 0) && (deflate0_cur_search >= ($signed({1'b0, deflate0_di}) - 32)) && ($signed({1'b0, deflate0_di}) < ($signed({1'b0, deflate0_isize}) - 3)))) begin
if (((deflate0_iram[(deflate0_cur_search & 127)] == deflate0_b1) && (deflate0_iram[((deflate0_cur_search + 1) & 127)] == deflate0_b2) && (deflate0_iram[((deflate0_cur_search + 2) & 127)] == deflate0_b3))) begin
lencode = 257;
match = 3;
if ((($signed({1'b0, deflate0_di}) < ($signed({1'b0, deflate0_isize}) - 4)) && (deflate0_iram[((deflate0_cur_search + 3) & 127)] == deflate0_b4))) begin
lencode = 258;
match = 4;
if ((($signed({1'b0, deflate0_di}) < ($signed({1'b0, deflate0_isize}) - 5)) && (deflate0_iram[((deflate0_cur_search + 4) & 127)] == deflate0_iram[((deflate0_di + 4) & 127)]))) begin
lencode = 259;
match = 5;
end
end
// if di < isize - 6 and iram[cur_search+5 & IBS] == iram[di + 5 & IBS]:
// lencode = 260
// match = 6
// if di < isize - 7 and iram[cur_search+6 & IBS] == iram[di + 6 & IBS]:
// lencode = 261
// match = 7
// if di < isize - 8 and iram[cur_search+7 & IBS] == iram[di + 7 & IBS]:
// lencode = 262
// match = 8
// if di < isize - 9 and iram[cur_search+8 & IBS] == iram[di + 8 & IBS]:
// lencode = 263
// match = 9
// if di < isize - 10 and iram[cur_search+9 & IBS] == iram[di + 9 & IBS]:
// lencode = 264
// match = 10
$write("found:");
$write(" ");
$write("%h", deflate0_cur_search);
$write(" ");
$write("%h", deflate0_di);
$write(" ");
$write("%h", deflate0_isize);
$write(" ");
$write("%0d", match);
$write("\n");
outlen = deflate0_codeLength[lencode];
outbits = deflate0_code_bits[lencode];
deflate0_oaddr <= deflate0_do;
deflate0_obyte <= MYHDL19_put(outbits, outlen);
MYHDL20_put_adv(outbits, outlen);
distance = ($signed({1'b0, deflate0_di}) - deflate0_cur_search);
deflate0_cur_dist <= distance;
deflate0_cur_i <= 0;
deflate0_di <= (deflate0_di + match);
deflate0_cur_cstatic <= ((deflate0_cur_cstatic + match) - 1);
deflate0_length <= match;
deflate0_state <= 5'b11000;
end
else begin
deflate0_cur_search <= (deflate0_cur_search - 1);
end
end
else begin
bdata = deflate0_iram[deflate0_di];
deflate0_di <= (deflate0_di + 1);
outlen = deflate0_codeLength[bdata];
outbits = deflate0_code_bits[bdata];
deflate0_oaddr <= deflate0_do;
deflate0_obyte <= MYHDL21_put(outbits, outlen);
MYHDL22_put_adv(outbits, outlen);
deflate0_state <= 5'b10110;
end
end
end
5'b01110: begin
for (stat_i=0; stat_i<144; stat_i=stat_i+1) begin
deflate0_codeLength[stat_i] <= 8;
end
for (stat_i=144; stat_i<256; stat_i=stat_i+1) begin
deflate0_codeLength[stat_i] <= 9;
end
for (stat_i=256; stat_i<280; stat_i=stat_i+1) begin
deflate0_codeLength[stat_i] <= 7;
end
for (stat_i=280; stat_i<288; stat_i=stat_i+1) begin
deflate0_codeLength[stat_i] <= 8;
end
deflate0_numCodeLength <= 288;
deflate0_cur_HF1 <= 0;
deflate0_state <= 5'b00111;
// if cur_static < 288:
// if cur_static < 144:
// codeLength[cur_static].next = 8
// elif cur_static < 256:
// codeLength[cur_static].next = 9
// elif cur_static < 280:
// codeLength[cur_static].next = 7
// else:
// codeLength[cur_static].next = 8
// cur_static.next = cur_static + 1
// else:
// numCodeLength.next = 288
// cur_HF1.next = 0
// state.next = d_state.HF1
end
5'b00010: begin
if ((!deflate0_filled)) begin
deflate0_filled <= 1'b1;
end
else if ((deflate0_nb < 4)) begin
// pass
end
else if ((deflate0_numLiterals == 0)) begin
deflate0_numLiterals <= (257 + MYHDL31_get4(0, 5));
$write("NL:");
$write(" ");
$write("%0d", (257 + MYHDL32_get4(0, 5)));
$write("\n");
deflate0_numDistance <= (1 + MYHDL33_get4(5, 5));
$write("ND:");
$write(" ");
$write("%0d", (1 + MYHDL34_get4(5, 5)));
$write("\n");
deflate0_b_numCodeLength <= (4 + MYHDL35_get4(10, 4));
$write("NCL:");
$write(" ");
$write("%0d", (4 + MYHDL36_get4(10, 4)));
$write("\n");
deflate0_numCodeLength <= 0;
MYHDL37_adv(14);
end
else begin
if ((deflate0_numCodeLength < 19)) begin
case (deflate0_numCodeLength)
0: clo_i = 16;
1: clo_i = 17;
2: clo_i = 18;
3: clo_i = 0;
4: clo_i = 8;
5: clo_i = 7;
6: clo_i = 9;
7: clo_i = 6;
8: clo_i = 10;
9: clo_i = 5;
10: clo_i = 11;
11: clo_i = 4;
12: clo_i = 12;
13: clo_i = 3;
14: clo_i = 13;
15: clo_i = 2;
16: clo_i = 14;
17: clo_i = 1;
default: clo_i = 15;
endcase
if ((deflate0_numCodeLength < deflate0_b_numCodeLength)) begin
deflate0_codeLength[clo_i] <= MYHDL38_get4(0, 3);
MYHDL39_adv(3);
end
else begin
deflate0_codeLength[clo_i] <= 0;
end
deflate0_numCodeLength <= (deflate0_numCodeLength + 1);
end
else begin
deflate0_numCodeLength <= 19;
deflate0_cur_HF1 <= 0;
deflate0_state <= 5'b00111;
end
end
end
5'b00011: begin
if ((!deflate0_filled)) begin
deflate0_filled <= 1'b1;
end
else if ((deflate0_nb < 4)) begin
// pass
end
else if ((deflate0_numCodeLength < (deflate0_numLiterals + deflate0_numDistance))) begin
n_adv = 0;
if ((deflate0_code < 16)) begin
deflate0_howOften <= 1;
deflate0_lastToken <= deflate0_code;
end
else if ((deflate0_code == 16)) begin
deflate0_howOften <= (3 + MYHDL40_get4(0, 2));
n_adv = 2;
end
else if ((deflate0_code == 17)) begin
deflate0_howOften <= (3 + MYHDL41_get4(0, 3));
deflate0_lastToken <= 0;
n_adv = 3;
end
else if ((deflate0_code == 18)) begin
deflate0_howOften <= (11 + MYHDL42_get4(0, 7));
deflate0_lastToken <= 0;
n_adv = 7;
end
else begin
$finish;
end
if ((n_adv != 0)) begin
MYHDL43_adv(n_adv);
end
deflate0_state <= 5'b00100;
end
else begin
$write("FILL UP");
$write("\n");
for (dbl_i=0; dbl_i<32; dbl_i=dbl_i+1) begin
dbl = 0;
if (((dbl_i + $signed({1'b0, deflate0_numLiterals})) < deflate0_numCodeLength)) begin
dbl = deflate0_codeLength[(dbl_i + $signed({1'b0, deflate0_numLiterals}))];
end
deflate0_distanceLength[dbl_i] <= dbl;
end
deflate0_cur_i <= deflate0_numLiterals;
deflate0_state <= 5'b00110;
end
end
default: begin
if ((deflate0_state == 5'b00110)) begin
if ((deflate0_cur_i < 288)) begin
deflate0_codeLength[deflate0_cur_i] <= 0;
deflate0_cur_i <= (deflate0_cur_i + 1);
end
else begin
deflate0_numCodeLength <= 288;
deflate0_method <= 3;
deflate0_cur_HF1 <= 0;
deflate0_state <= 5'b00111;
end
end
else begin
case (deflate0_state)
5'b00101: begin
$write("DISTTREE");
$write("\n");
for (dist_i=0; dist_i<32; dist_i=dist_i+1) begin
deflate0_codeLength[dist_i] <= deflate0_distanceLength[dist_i];
end
deflate0_numCodeLength <= 32;
deflate0_method <= 4;
deflate0_cur_HF1 <= 0;
deflate0_state <= 5'b00111;
end
5'b00100: begin
if ((deflate0_howOften != 0)) begin
deflate0_codeLength[deflate0_numCodeLength] <= deflate0_lastToken;
deflate0_howOften <= (deflate0_howOften - 1);
deflate0_numCodeLength <= (deflate0_numCodeLength + 1);
end
else if ((deflate0_numCodeLength < (deflate0_numLiterals + deflate0_numDistance))) begin
deflate0_cur_next <= 0;
deflate0_state <= 5'b10011;
end
else begin
deflate0_state <= 5'b00011;
end
end
5'b00111: begin
if ((deflate0_cur_HF1 < 16)) begin
deflate0_bitLengthCount[deflate0_cur_HF1] <= 0;
end
if ((deflate0_cur_HF1 < 128)) begin
deflate0_d_leaves[deflate0_cur_HF1] <= 0;
end
if (((deflate0_method != 4) && (deflate0_cur_HF1 < 512))) begin
deflate0_lwaddr <= deflate0_cur_HF1;
deflate0_wleaf <= 0;
end
limit = 512;
if ((deflate0_method == 4)) begin
limit = 128;
end
if ((deflate0_cur_HF1 < limit)) begin
deflate0_cur_HF1 <= (deflate0_cur_HF1 + 1);
end
else begin
$write("DID HF1 INIT");
$write("\n");
deflate0_cur_i <= 0;
deflate0_state <= 5'b01000;
end
end
5'b01000: begin
if ((deflate0_cur_i < deflate0_numCodeLength)) begin
j = deflate0_codeLength[deflate0_cur_i];
deflate0_bitLengthCount[j] <= (deflate0_bitLengthCount[j] + 1);
deflate0_cur_i <= (deflate0_cur_i + 1);
end
else begin
deflate0_bitLengthCount[0] <= 0;
deflate0_state <= 5'b01001;
deflate0_cur_i <= 1;
if ((deflate0_method == 4)) begin
deflate0_d_maxBits <= 0;
end
else begin
deflate0_maxBits <= 0;
end
deflate0_minBits <= 15;
end
end
5'b01001: begin
if ((deflate0_cur_i <= 15)) begin
if ((deflate0_bitLengthCount[deflate0_cur_i] != 0)) begin
if ((deflate0_cur_i < deflate0_minBits)) begin
deflate0_minBits <= deflate0_cur_i;
end
if ((deflate0_method == 4)) begin
if ((deflate0_cur_i > deflate0_d_maxBits)) begin
deflate0_d_maxBits <= deflate0_cur_i;
end
end
else begin
if ((deflate0_cur_i > deflate0_maxBits)) begin
deflate0_maxBits <= deflate0_cur_i;
end
end
end
deflate0_cur_i <= (deflate0_cur_i + 1);
end
else begin
$write("%h", deflate0_minBits);
$write(" ");
$write("%h", deflate0_maxBits);
$write("\n");
t = 10;
if ((deflate0_method == 4)) begin
if ((t > deflate0_d_maxBits)) begin
t = deflate0_d_maxBits;
end
deflate0_d_instantMaxBit <= t;
deflate0_d_instantMask <= ((1 << t) - 1);
end
else begin
if ((t > deflate0_maxBits)) begin
t = deflate0_maxBits;
end
deflate0_instantMaxBit <= t;
deflate0_instantMask <= ((1 << t) - 1);
end
$write("%0d", ((1 << t) - 1));
$write("\n");
deflate0_state <= 5'b01010;
deflate0_cur_i <= deflate0_minBits;
deflate0_code <= 0;
for (hf2_i=0; hf2_i<15; hf2_i=hf2_i+1) begin
deflate0_nextCode[hf2_i] <= 0;
end
$write("to HF3");
$write("\n");
end
end
5'b01010: begin
amb = deflate0_maxBits;
if ((deflate0_method == 4)) begin
amb = deflate0_d_maxBits;
end
if ((deflate0_cur_i <= amb)) begin
ncode = ((deflate0_code + deflate0_bitLengthCount[($signed({1'b0, deflate0_cur_i}) - 1)]) << 1);
deflate0_code <= ncode;
deflate0_nextCode[deflate0_cur_i] <= ncode;
deflate0_cur_i <= (deflate0_cur_i + 1);
end
else begin
deflate0_state <= 5'b01011;
deflate0_cur_i <= 0;
deflate0_spread_i <= 0;
$write("to HF4");
$write("\n");
end
end
5'b01100: begin
canonical = deflate0_nextCode[deflate0_bits];
deflate0_nextCode[deflate0_bits] <= (deflate0_nextCode[deflate0_bits] + 1);
if ((deflate0_bits > 15)) begin
$finish;
end
deflate0_reverse <= MYHDL50_rev_bits(canonical, deflate0_bits);
deflate0_leaf <= MYHDL51_makeLeaf(deflate0_spread_i, deflate0_bits);
deflate0_state <= 5'b01101;
end
5'b01101: begin
if ((deflate0_method == 4)) begin
deflate0_d_leaves[deflate0_reverse] <= deflate0_leaf;
if ((deflate0_bits <= deflate0_d_instantMaxBit)) begin
if (((deflate0_reverse + (1 << deflate0_bits)) <= deflate0_d_instantMask)) begin
deflate0_step <= (1 << deflate0_bits);
deflate0_spread <= (deflate0_reverse + (1 << deflate0_bits));
deflate0_state <= 5'b10010;
end
else begin
deflate0_spread_i <= (deflate0_spread_i + 1);
deflate0_state <= 5'b01011;
end
end
else begin
deflate0_state <= 5'b01011;
deflate0_spread_i <= (deflate0_spread_i + 1);
end
end
else begin
deflate0_wleaf <= deflate0_leaf;
deflate0_lwaddr <= deflate0_reverse;
deflate0_code_bits[deflate0_spread_i] <= deflate0_reverse;
if ((deflate0_bits <= deflate0_instantMaxBit)) begin
if (((deflate0_reverse + (1 << deflate0_bits)) <= deflate0_instantMask)) begin
deflate0_step <= (1 << deflate0_bits);
deflate0_spread <= (deflate0_reverse + (1 << deflate0_bits));
deflate0_state <= 5'b10010;
end
else begin
deflate0_spread_i <= (deflate0_spread_i + 1);
deflate0_state <= 5'b01011;
end
end
else begin
deflate0_spread_i <= (deflate0_spread_i + 1);
deflate0_state <= 5'b01011;
end
end
end
5'b01011: begin
if ((deflate0_spread_i < deflate0_numCodeLength)) begin
bits_next = deflate0_codeLength[deflate0_spread_i];
if ((bits_next != 0)) begin
deflate0_bits <= bits_next;
deflate0_state <= 5'b01100;
end
else begin
deflate0_spread_i <= (deflate0_spread_i + 1);
end
end
else begin
if (deflate0_do_compress) begin
deflate0_state <= 5'b10110;
deflate0_cur_cstatic <= 0;
end
else if ((deflate0_method == 3)) begin
deflate0_state <= 5'b00101;
end
else if ((deflate0_method == 4)) begin
$write("DEFLATE m2!");
$write("\n");
deflate0_state <= 5'b10011;
end
else if ((deflate0_method == 2)) begin
deflate0_numCodeLength <= 0;
deflate0_state <= 5'b10011;
end
else begin
deflate0_state <= 5'b10011;
end
deflate0_cur_next <= 0;
deflate0_cur_i <= 0;
end
end
5'b10010: begin
if ((deflate0_method == 4)) begin
deflate0_d_leaves[deflate0_spread] <= MYHDL52_makeLeaf(deflate0_spread_i, deflate0_codeLength[deflate0_spread_i]);
end
else begin
deflate0_lwaddr <= deflate0_spread;
deflate0_wleaf <= MYHDL53_makeLeaf(deflate0_spread_i, deflate0_codeLength[deflate0_spread_i]);
end
aim = deflate0_instantMask;
if ((deflate0_method == 4)) begin
aim = deflate0_d_instantMask;
end
if (($signed({1'b0, deflate0_spread}) > ($signed({1'b0, aim}) - $signed({1'b0, deflate0_step})))) begin
deflate0_spread_i <= (deflate0_spread_i + 1);
deflate0_state <= 5'b01011;
end
else begin
deflate0_spread <= (deflate0_spread + deflate0_step);
end
end
5'b10011: begin
if ((!deflate0_filled)) begin
deflate0_filled <= 1'b1;
end
else if ((deflate0_nb < 4)) begin
// pass
end
else if ((deflate0_cur_next == 0)) begin
cto = MYHDL54_get4(0, deflate0_maxBits);
deflate0_cur_next <= 1;
mask = ((1 << deflate0_instantMaxBit) - 1);
deflate0_leaf <= deflate0_leaves[(cto & mask)];
end
else begin
if ((MYHDL55_get_bits(deflate0_leaf) < 1)) begin
$write("< 1 bits: ");
$write("\n");
$finish;
end
MYHDL57_adv(MYHDL56_get_bits(deflate0_leaf));
if ((MYHDL58_get_code(deflate0_leaf) == 0)) begin
$write("leaf 0");
$write("\n");
end
deflate0_code <= MYHDL59_get_code(deflate0_leaf);
if ((deflate0_method == 2)) begin
deflate0_state <= 5'b00011;
end
else begin
deflate0_state <= 5'b10100;
end
end
end
5'b01111: begin
if ((!deflate0_filled)) begin
deflate0_filled <= 1'b1;
end
else if ((deflate0_nb < 4)) begin
// pass
end
else begin
token = (deflate0_code - 257);
case (token)
0: extraLength = 0;
1: extraLength = 0;
2: extraLength = 0;
3: extraLength = 0;
4: extraLength = 0;
5: extraLength = 0;
6: extraLength = 0;
7: extraLength = 0;
8: extraLength = 1;
9: extraLength = 1;
10: extraLength = 1;
11: extraLength = 1;
12: extraLength = 2;
13: extraLength = 2;
14: extraLength = 2;
15: extraLength = 2;
16: extraLength = 3;
17: extraLength = 3;
18: extraLength = 3;
19: extraLength = 3;
20: extraLength = 4;
21: extraLength = 4;
22: extraLength = 4;
23: extraLength = 4;
24: extraLength = 5;
25: extraLength = 5;
26: extraLength = 5;
27: extraLength = 5;
default: extraLength = 0;
endcase
cto = MYHDL60_get4(extraLength, deflate0_d_maxBits);
mask = ((1 << deflate0_d_instantMaxBit) - 1);
deflate0_leaf <= deflate0_d_leaves[(cto & mask)];
deflate0_state <= 5'b10000;
end
end
5'b10000: begin
if ((MYHDL61_get_bits(deflate0_leaf) == 0)) begin
$finish;
end
token = (deflate0_code - 257);
case (token)
0: tlength = 3;
1: tlength = 4;
2: tlength = 5;
3: tlength = 6;
4: tlength = 7;
5: tlength = 8;
6: tlength = 9;
7: tlength = 10;
8: tlength = 11;
9: tlength = 13;
10: tlength = 15;
11: tlength = 17;
12: tlength = 19;
13: tlength = 23;
14: tlength = 27;
15: tlength = 31;
16: tlength = 35;
17: tlength = 43;
18: tlength = 51;
19: tlength = 59;
20: tlength = 67;
21: tlength = 83;
22: tlength = 99;
23: tlength = 115;
24: tlength = 131;
25: tlength = 163;
26: tlength = 195;
27: tlength = 227;
default: tlength = 258;
endcase
case (token)
0: extraLength = 0;
1: extraLength = 0;
2: extraLength = 0;
3: extraLength = 0;
4: extraLength = 0;
5: extraLength = 0;
6: extraLength = 0;
7: extraLength = 0;
8: extraLength = 1;
9: extraLength = 1;
10: extraLength = 1;
11: extraLength = 1;
12: extraLength = 2;
13: extraLength = 2;
14: extraLength = 2;
15: extraLength = 2;
16: extraLength = 3;
17: extraLength = 3;
18: extraLength = 3;
19: extraLength = 3;
20: extraLength = 4;
21: extraLength = 4;
22: extraLength = 4;
23: extraLength = 4;
24: extraLength = 5;
25: extraLength = 5;
26: extraLength = 5;
27: extraLength = 5;
default: extraLength = 0;
endcase
tlength = tlength + MYHDL62_get4(0, extraLength);
distanceCode = MYHDL63_get_code(deflate0_leaf);
case (distanceCode)
0: distance = 1;
1: distance = 2;
2: distance = 3;
3: distance = 4;
4: distance = 5;
5: distance = 7;
6: distance = 9;
7: distance = 13;
8: distance = 17;
9: distance = 25;
10: distance = 33;
11: distance = 49;
12: distance = 65;
13: distance = 97;
14: distance = 129;
15: distance = 193;
16: distance = 257;
17: distance = 385;
18: distance = 513;
19: distance = 769;
20: distance = 1025;
21: distance = 1537;
22: distance = 2049;
23: distance = 3073;
24: distance = 4097;
25: distance = 6145;
26: distance = 8193;
27: distance = 12289;
28: distance = 16385;
default: distance = 24577;
endcase
case ($signed(distanceCode >>> 1))
0: moreBits = 0;
1: moreBits = 0;
2: moreBits = 1;
3: moreBits = 2;
4: moreBits = 3;
5: moreBits = 4;
6: moreBits = 5;
7: moreBits = 6;
8: moreBits = 7;
9: moreBits = 8;
10: moreBits = 9;
11: moreBits = 10;
12: moreBits = 11;
13: moreBits = 12;
default: moreBits = 13;
endcase
mored = MYHDL65_get4((extraLength + MYHDL64_get_bits(deflate0_leaf)), moreBits);
distance = distance + mored;
MYHDL67_adv(((moreBits + extraLength) + MYHDL66_get_bits(deflate0_leaf)));
deflate0_offset <= ($signed({1'b0, deflate0_do}) - distance);
deflate0_length <= tlength;
deflate0_cur_i <= 0;
deflate0_oraddr <= deflate0_offset;
deflate0_state <= 5'b10101;
end
default: begin
if ((deflate0_state == 5'b10100)) begin
if ((!deflate0_filled)) begin
deflate0_filled <= 1'b1;
end
else if ((deflate0_nb < 4)) begin
// pass
end
else if (($signed({1'b0, deflate0_di}) > ($signed({1'b0, deflate0_isize}) - 3))) begin
deflate0_state <= 5'b00000;
o_done <= 1'b1;
$write("NO EOF ");
$write(" ");
$write("%h", deflate0_di);
$write("\n");
$finish;
end
else if ((deflate0_code == 256)) begin
$write("EOF:");
$write(" ");
$write("%h", deflate0_di);
$write(" ");
$write("%h", deflate0_do);
$write("\n");
if ((!deflate0_final)) begin
deflate0_state <= 5'b00001;
end
else begin
o_done <= 1'b1;
o_oprogress <= deflate0_do;
deflate0_state <= 5'b00000;
end
end
else begin
if ((deflate0_code < 256)) begin
deflate0_oaddr <= deflate0_do;
deflate0_obyte <= deflate0_code;
o_oprogress <= (deflate0_do + 1);
deflate0_do <= (deflate0_do + 1);
deflate0_cur_next <= 0;
deflate0_state <= 5'b10011;
end
else if ((deflate0_code == 300)) begin
$finish;
end
else begin
if (deflate0_static) begin
token = (deflate0_code - 257);
case (token)
0: tlength = 3;
1: tlength = 4;
2: tlength = 5;
3: tlength = 6;
4: tlength = 7;
5: tlength = 8;
6: tlength = 9;
7: tlength = 10;
8: tlength = 11;
9: tlength = 13;
10: tlength = 15;
11: tlength = 17;
12: tlength = 19;
13: tlength = 23;
14: tlength = 27;
15: tlength = 31;
16: tlength = 35;
17: tlength = 43;
18: tlength = 51;
19: tlength = 59;
20: tlength = 67;
21: tlength = 83;
22: tlength = 99;
23: tlength = 115;
24: tlength = 131;
25: tlength = 163;
26: tlength = 195;
27: tlength = 227;
default: tlength = 258;
endcase
case (token)
0: extraLength = 0;
1: extraLength = 0;
2: extraLength = 0;
3: extraLength = 0;
4: extraLength = 0;
5: extraLength = 0;
6: extraLength = 0;
7: extraLength = 0;
8: extraLength = 1;
9: extraLength = 1;
10: extraLength = 1;
11: extraLength = 1;
12: extraLength = 2;
13: extraLength = 2;
14: extraLength = 2;
15: extraLength = 2;
16: extraLength = 3;
17: extraLength = 3;
18: extraLength = 3;
19: extraLength = 3;
20: extraLength = 4;
21: extraLength = 4;
22: extraLength = 4;
23: extraLength = 4;
24: extraLength = 5;
25: extraLength = 5;
26: extraLength = 5;
27: extraLength = 5;
default: extraLength = 0;
endcase
tlength = tlength + MYHDL68_get4(0, extraLength);
t = MYHDL69_get4(extraLength, 5);
distanceCode = MYHDL70_rev_bits(t, 5);
case (distanceCode)
0: distance = 1;
1: distance = 2;
2: distance = 3;
3: distance = 4;
4: distance = 5;
5: distance = 7;
6: distance = 9;
7: distance = 13;
8: distance = 17;
9: distance = 25;
10: distance = 33;
11: distance = 49;
12: distance = 65;
13: distance = 97;
14: distance = 129;
15: distance = 193;
16: distance = 257;
17: distance = 385;
18: distance = 513;
19: distance = 769;
20: distance = 1025;
21: distance = 1537;
22: distance = 2049;
23: distance = 3073;
24: distance = 4097;
25: distance = 6145;
26: distance = 8193;
27: distance = 12289;
28: distance = 16385;
default: distance = 24577;
endcase
case ($signed(distanceCode >>> 1))
0: moreBits = 0;
1: moreBits = 0;
2: moreBits = 1;
3: moreBits = 2;
4: moreBits = 3;
5: moreBits = 4;
6: moreBits = 5;
7: moreBits = 6;
8: moreBits = 7;
9: moreBits = 8;
10: moreBits = 9;
11: moreBits = 10;
12: moreBits = 11;
13: moreBits = 12;
default: moreBits = 13;
endcase
distance = distance + MYHDL71_get4((extraLength + 5), moreBits);
MYHDL72_adv(((extraLength + 5) + moreBits));
deflate0_offset <= ($signed({1'b0, deflate0_do}) - distance);
deflate0_length <= tlength;
deflate0_cur_i <= 0;
deflate0_oraddr <= deflate0_offset;
deflate0_state <= 5'b10101;
end
else begin
deflate0_state <= 5'b01111;
end
end
deflate0_cur_next <= 0;
end
end
else begin
if ((deflate0_state == 5'b10101)) begin
if ((!deflate0_filled)) begin
deflate0_filled <= 1'b1;
end
else if ((deflate0_nb < 4)) begin
// pass
end
else if ((deflate0_method == 0)) begin
if ((deflate0_cur_i < deflate0_length)) begin
deflate0_oaddr <= deflate0_do;
deflate0_obyte <= deflate0_b3;
MYHDL73_adv(8);
deflate0_cur_i <= (deflate0_cur_i + 1);
deflate0_do <= (deflate0_do + 1);
o_oprogress <= (deflate0_do + 1);
end
else if ((!deflate0_final)) begin
deflate0_state <= 5'b00001;
end
else begin
o_oprogress <= deflate0_do;
o_done <= 1'b1;
deflate0_state <= 5'b00000;
end
end
else if ((deflate0_cur_i < (deflate0_length + 1))) begin
deflate0_oraddr <= (deflate0_offset + deflate0_cur_i);
if ((deflate0_cur_i == 1)) begin
deflate0_copy1 <= deflate0_orbyte;
end
if ((deflate0_cur_i > 1)) begin
if (((deflate0_offset + deflate0_cur_i) == (deflate0_do + 1))) begin
deflate0_obyte <= deflate0_copy1;
end
else begin
deflate0_obyte <= deflate0_orbyte;
end
deflate0_oaddr <= deflate0_do;
o_oprogress <= (deflate0_do + 1);
deflate0_do <= (deflate0_do + 1);
end
deflate0_cur_i <= (deflate0_cur_i + 1);
end
else begin
deflate0_oaddr <= deflate0_do;
if (((deflate0_offset + deflate0_cur_i) == (deflate0_do + 1))) begin
deflate0_obyte <= deflate0_copy1;
end
else begin
deflate0_obyte <= deflate0_orbyte;
end
deflate0_do <= (deflate0_do + 1);
o_oprogress <= (deflate0_do + 1);
deflate0_cur_next <= 0;
deflate0_state <= 5'b10011;
end
end
else begin
$write("unknown state?!");
$write("\n");
deflate0_state <= 5'b00000;
end
end
end
endcase
end
end
endcase
end
end
 
 
always @(posedge i_clk) begin: TEST_DEFLATE_BENCH_DEFLATE0_FILL_BUF
if ((!reset)) begin
$write("FILL RESET");
$write("\n");
deflate0_nb <= 0;
deflate0_b1 <= 0;
deflate0_b2 <= 0;
deflate0_b3 <= 0;
deflate0_b4 <= 0;
end
else begin
if ((deflate0_isize < 4)) begin
// pass
end
else if (((i_mode == 4) || (i_mode == 5))) begin
deflate0_nb <= 0;
end
else begin
deflate0_nb <= 4;
deflate0_b1 <= deflate0_iram[(deflate0_di & 127)];
deflate0_b2 <= deflate0_iram[((deflate0_di + 1) & 127)];
deflate0_b3 <= deflate0_iram[((deflate0_di + 2) & 127)];
deflate0_b4 <= deflate0_iram[((deflate0_di + 3) & 127)];
end
end
end
 
 
always @(posedge i_clk) begin: TEST_DEFLATE_BENCH_DEFLATE0_ORAMWRITE
deflate0_oram[deflate0_oaddr] <= deflate0_obyte;
deflate0_leaves[deflate0_lwaddr] <= deflate0_wleaf;
end
 
 
always @(posedge i_clk) begin: TEST_DEFLATE_BENCH_DEFLATE0_ORAMREAD
deflate0_orbyte <= deflate0_oram[deflate0_oraddr];
end
 
 
always @(posedge i_clk) begin: TEST_DEFLATE_BENCH_COUNT
if ((scounter == 0)) begin
counter <= (counter + 1);
end
scounter <= (scounter + 1);
end
 
 
always @(posedge i_clk) begin: TEST_DEFLATE_BENCH_LOGIC
integer ud1;
integer ud2;
if ((tstate == 5'b00000)) begin
$write("RESET");
$write(" ");
$write("%h", counter);
$write("\n");
reset <= 0;
led0_g <= 0;
led1_b <= 0;
led2_r <= 0;
tbi <= 0;
tstate <= 5'b00001;
end
else if (((22 > 2) && (scounter != 0))) begin
// pass
end
else if ((tstate == 5'b00001)) begin
if ((tbi < 1)) begin
tbi <= (tbi + 1);
end
else begin
reset <= 1;
tstate <= 5'b00010;
tbi <= 0;
end
end
else if ((tstate == 5'b10001)) begin
led0_g <= 1;
led2_r <= 0;
led1_b <= 0;
end
else if ((tstate == 5'b10000)) begin
led0_g <= (!led0_g);
led2_r <= (!led2_r);
led1_b <= o_done;
end
else if ((tstate == 5'b00010)) begin
if ((tbi < 41)) begin
o_led <= tbi;
led1_b <= o_done;
led2_r <= (!led2_r);
i_mode <= 2;
case (tbi)
0: i_data <= 120;
1: i_data <= 156;
2: i_data <= 83;
3: i_data <= 80;
4: i_data <= 80;
5: i_data <= 240;
6: i_data <= 72;
7: i_data <= 205;
8: i_data <= 201;
9: i_data <= 201;
10: i_data <= 87;
11: i_data <= 8;
12: i_data <= 207;
13: i_data <= 47;
14: i_data <= 202;
15: i_data <= 73;
16: i_data <= 81;
17: i_data <= 84;
18: i_data <= 48;
19: i_data <= 80;
20: i_data <= 128;
21: i_data <= 1;
22: i_data <= 20;
23: i_data <= 97;
24: i_data <= 67;
25: i_data <= 236;
26: i_data <= 194;
27: i_data <= 70;
28: i_data <= 216;
29: i_data <= 133;
30: i_data <= 141;
31: i_data <= 177;
32: i_data <= 11;
33: i_data <= 155;
34: i_data <= 128;
35: i_data <= 133;
36: i_data <= 0;
37: i_data <= 119;
38: i_data <= 164;
39: i_data <= 28;
default: i_data <= 76;
endcase
i_addr <= tbi;
tbi <= (tbi + 1);
end
else begin
i_mode <= 0;
led2_r <= 0;
tstate <= 5'b00011;
end
end
else if ((tstate == 5'b00011)) begin
i_mode <= 5;
tstate <= 5'b00100;
end
else if ((tstate == 5'b00100)) begin
led1_b <= (!led1_b);
i_mode <= 0;
if (((i_mode == 0) && o_done)) begin
$write("result len");
$write(" ");
$write("%h", o_oprogress);
$write("\n");
if ((o_oprogress == 79)) begin
tstate <= 5'b10001;
end
resultlen <= o_oprogress;
tbi <= 0;
i_addr <= 0;
i_mode <= 3;
wtick <= 1'b1;
tstate <= 5'b00101;
// if o_oprogress == 0x4F:
// tstate.next = tb_state.HALT
// else:
// tstate.next = tb_state.FAIL
end
end
else if ((tstate == 5'b00101)) begin
led1_b <= 0;
o_led <= tbi;
// Note that the read can also be pipelined in a tight loop
// without the WTICK delay, but this will not work with
// SLOWDOWN > 1
if (wtick) begin
wtick <= 1'b0;
end
else if ((tbi < 114)) begin
led2_r <= (!led2_r);
case (tbi)
0: ud1 = 32;
1: ud1 = 32;
2: ud1 = 32;
3: ud1 = 72;
4: ud1 = 101;
5: ud1 = 108;
6: ud1 = 108;
7: ud1 = 111;
8: ud1 = 32;
9: ud1 = 87;
10: ud1 = 111;
11: ud1 = 114;
12: ud1 = 108;
13: ud1 = 100;
14: ud1 = 33;
15: ud1 = 32;
16: ud1 = 48;
17: ud1 = 32;
18: ud1 = 32;
19: ud1 = 32;
20: ud1 = 32;
21: ud1 = 32;
22: ud1 = 32;
23: ud1 = 32;
24: ud1 = 32;
25: ud1 = 32;
26: ud1 = 72;
27: ud1 = 101;
28: ud1 = 108;
29: ud1 = 108;
30: ud1 = 111;
31: ud1 = 32;
32: ud1 = 87;
33: ud1 = 111;
34: ud1 = 114;
35: ud1 = 108;
36: ud1 = 100;
37: ud1 = 33;
38: ud1 = 32;
39: ud1 = 49;
40: ud1 = 32;
41: ud1 = 32;
42: ud1 = 32;
43: ud1 = 32;
44: ud1 = 32;
45: ud1 = 32;
46: ud1 = 32;
47: ud1 = 32;
48: ud1 = 32;
49: ud1 = 72;
50: ud1 = 101;
51: ud1 = 108;
52: ud1 = 108;
53: ud1 = 111;
54: ud1 = 32;
55: ud1 = 87;
56: ud1 = 111;
57: ud1 = 114;
58: ud1 = 108;
59: ud1 = 100;
60: ud1 = 33;
61: ud1 = 32;
62: ud1 = 50;
63: ud1 = 32;
64: ud1 = 32;
65: ud1 = 32;
66: ud1 = 32;
67: ud1 = 32;
68: ud1 = 32;
69: ud1 = 32;
70: ud1 = 32;
71: ud1 = 32;
72: ud1 = 72;
73: ud1 = 101;
74: ud1 = 108;
75: ud1 = 108;
76: ud1 = 111;
77: ud1 = 32;
78: ud1 = 87;
79: ud1 = 111;
80: ud1 = 114;
81: ud1 = 108;
82: ud1 = 100;
83: ud1 = 33;
84: ud1 = 32;
85: ud1 = 51;
86: ud1 = 32;
87: ud1 = 32;
88: ud1 = 32;
89: ud1 = 32;
90: ud1 = 32;
91: ud1 = 32;
92: ud1 = 32;
93: ud1 = 32;
94: ud1 = 32;
95: ud1 = 72;
96: ud1 = 101;
97: ud1 = 108;
98: ud1 = 108;
99: ud1 = 111;
100: ud1 = 32;
101: ud1 = 87;
102: ud1 = 111;
103: ud1 = 114;
104: ud1 = 108;
105: ud1 = 100;
106: ud1 = 33;
107: ud1 = 32;
108: ud1 = 52;
109: ud1 = 32;
110: ud1 = 32;
111: ud1 = 32;
112: ud1 = 32;
default: ud1 = 32;
endcase
if (($signed({1'b0, o_byte}) != ud1)) begin
i_mode <= 0;
$write("FAIL");
$write(" ");
$write("%0d", 114);
$write(" ");
$write("%h", tbi);
$write(" ");
$write("%h", o_byte);
$write(" ");
$write("%0d", ud1);
$write("\n");
tstate <= 5'b10000;
$finish;
end
else begin
// pass
end
i_addr <= (tbi + 1);
tbi <= (tbi + 1);
wtick <= 1'b1;
end
else begin
$write("%0d", 114);
$write("\n");
$write("DECOMPRESS test OK!, pausing");
$write(" ");
$write("%h", tbi);
$write("\n");
i_mode <= 0;
tbi <= 0;
tstate <= 5'b00110;
resume <= 1;
end
end
else if ((tstate == 5'b00110)) begin
led2_r <= 0;
if ((resume == 0)) begin
$write("--------------COMPRESS-------------");
$write("\n");
tbi <= 0;
led0_g <= 0;
tstate <= 5'b00111;
end
else begin
led2_r <= (!led2_r);
resume <= (resume + 1);
end
end
else if ((tstate == 5'b00111)) begin
o_led <= tbi;
if ((tbi < 114)) begin
led2_r <= 0;
led1_b <= (!led1_b);
i_mode <= 2;
case (tbi)
0: i_data <= 32;
1: i_data <= 32;
2: i_data <= 32;
3: i_data <= 72;
4: i_data <= 101;
5: i_data <= 108;
6: i_data <= 108;
7: i_data <= 111;
8: i_data <= 32;
9: i_data <= 87;
10: i_data <= 111;
11: i_data <= 114;
12: i_data <= 108;
13: i_data <= 100;
14: i_data <= 33;
15: i_data <= 32;
16: i_data <= 48;
17: i_data <= 32;
18: i_data <= 32;
19: i_data <= 32;
20: i_data <= 32;
21: i_data <= 32;
22: i_data <= 32;
23: i_data <= 32;
24: i_data <= 32;
25: i_data <= 32;
26: i_data <= 72;
27: i_data <= 101;
28: i_data <= 108;
29: i_data <= 108;
30: i_data <= 111;
31: i_data <= 32;
32: i_data <= 87;
33: i_data <= 111;
34: i_data <= 114;
35: i_data <= 108;
36: i_data <= 100;
37: i_data <= 33;
38: i_data <= 32;
39: i_data <= 49;
40: i_data <= 32;
41: i_data <= 32;
42: i_data <= 32;
43: i_data <= 32;
44: i_data <= 32;
45: i_data <= 32;
46: i_data <= 32;
47: i_data <= 32;
48: i_data <= 32;
49: i_data <= 72;
50: i_data <= 101;
51: i_data <= 108;
52: i_data <= 108;
53: i_data <= 111;
54: i_data <= 32;
55: i_data <= 87;
56: i_data <= 111;
57: i_data <= 114;
58: i_data <= 108;
59: i_data <= 100;
60: i_data <= 33;
61: i_data <= 32;
62: i_data <= 50;
63: i_data <= 32;
64: i_data <= 32;
65: i_data <= 32;
66: i_data <= 32;
67: i_data <= 32;
68: i_data <= 32;
69: i_data <= 32;
70: i_data <= 32;
71: i_data <= 32;
72: i_data <= 72;
73: i_data <= 101;
74: i_data <= 108;
75: i_data <= 108;
76: i_data <= 111;
77: i_data <= 32;
78: i_data <= 87;
79: i_data <= 111;
80: i_data <= 114;
81: i_data <= 108;
82: i_data <= 100;
83: i_data <= 33;
84: i_data <= 32;
85: i_data <= 51;
86: i_data <= 32;
87: i_data <= 32;
88: i_data <= 32;
89: i_data <= 32;
90: i_data <= 32;
91: i_data <= 32;
92: i_data <= 32;
93: i_data <= 32;
94: i_data <= 32;
95: i_data <= 72;
96: i_data <= 101;
97: i_data <= 108;
98: i_data <= 108;
99: i_data <= 111;
100: i_data <= 32;
101: i_data <= 87;
102: i_data <= 111;
103: i_data <= 114;
104: i_data <= 108;
105: i_data <= 100;
106: i_data <= 33;
107: i_data <= 32;
108: i_data <= 52;
109: i_data <= 32;
110: i_data <= 32;
111: i_data <= 32;
112: i_data <= 32;
default: i_data <= 32;
endcase
i_addr <= tbi;
tbi <= (tbi + 1);
end
else begin
$write("wrote bytes to compress");
$write(" ");
$write("%h", tbi);
$write("\n");
i_mode <= 0;
tstate <= 5'b01000;
end
end
else if ((tstate == 5'b01000)) begin
i_mode <= 4;
tstate <= 5'b01001;
end
else if ((tstate == 5'b01001)) begin
led2_r <= (!led2_r);
if ((i_mode == 4)) begin
$write("WAIT COMPRESS");
$write("\n");
i_mode <= 0;
led1_b <= 0;
end
else if (o_done) begin
$write("result len");
$write(" ");
$write("%h", o_oprogress);
$write("\n");
resultlen <= o_oprogress;
tbi <= 0;
i_addr <= 0;
i_mode <= 3;
tstate <= 5'b01010;
wtick <= 1'b1;
end
end
else if ((tstate == 5'b01010)) begin
led2_r <= 0;
o_led <= tbi;
if (wtick) begin
if ((tbi > 0)) begin
i_mode <= 2;
i_data <= copy;
i_addr <= (tbi - 1);
end
wtick <= 1'b0;
tbi <= (tbi + 1);
end
else if ((tbi < resultlen)) begin
i_mode <= 3;
led1_b <= (!led1_b);
i_addr <= tbi;
copy <= o_byte;
wtick <= 1'b1;
end
else begin
$write("Compress output bytes copied to input");
$write(" ");
$write("%h", resultlen);
$write(" ");
$write("%0d", ($signed({1'b0, tbi}) - 1));
$write("\n");
i_mode <= 0;
tbi <= 0;
tstate <= 5'b01100;
end
end
else if ((tstate == 5'b01100)) begin
$write("start decompress of test compression");
$write("\n");
i_mode <= 5;
tstate <= 5'b01101;
end
else if ((tstate == 5'b01101)) begin
led2_r <= 0;
led1_b <= (!led1_b);
i_mode <= 0;
if (((i_mode == 0) && o_done)) begin
$write("DONE DECOMPRESS VERIFY");
$write(" ");
$write("%h", o_oprogress);
$write("\n");
tbi <= 0;
i_addr <= 0;
i_mode <= 3;
wtick <= 1'b1;
tstate <= 5'b01110;
end
end
else if ((tstate == 5'b01110)) begin
led1_b <= 0;
led2_r <= (!led2_r);
o_led <= tbi;
if (wtick) begin
wtick <= 1'b0;
end
else if ((tbi < 114)) begin
case (tbi)
0: ud2 = 32;
1: ud2 = 32;
2: ud2 = 32;
3: ud2 = 72;
4: ud2 = 101;
5: ud2 = 108;
6: ud2 = 108;
7: ud2 = 111;
8: ud2 = 32;
9: ud2 = 87;
10: ud2 = 111;
11: ud2 = 114;
12: ud2 = 108;
13: ud2 = 100;
14: ud2 = 33;
15: ud2 = 32;
16: ud2 = 48;
17: ud2 = 32;
18: ud2 = 32;
19: ud2 = 32;
20: ud2 = 32;
21: ud2 = 32;
22: ud2 = 32;
23: ud2 = 32;
24: ud2 = 32;
25: ud2 = 32;
26: ud2 = 72;
27: ud2 = 101;
28: ud2 = 108;
29: ud2 = 108;
30: ud2 = 111;
31: ud2 = 32;
32: ud2 = 87;
33: ud2 = 111;
34: ud2 = 114;
35: ud2 = 108;
36: ud2 = 100;
37: ud2 = 33;
38: ud2 = 32;
39: ud2 = 49;
40: ud2 = 32;
41: ud2 = 32;
42: ud2 = 32;
43: ud2 = 32;
44: ud2 = 32;
45: ud2 = 32;
46: ud2 = 32;
47: ud2 = 32;
48: ud2 = 32;
49: ud2 = 72;
50: ud2 = 101;
51: ud2 = 108;
52: ud2 = 108;
53: ud2 = 111;
54: ud2 = 32;
55: ud2 = 87;
56: ud2 = 111;
57: ud2 = 114;
58: ud2 = 108;
59: ud2 = 100;
60: ud2 = 33;
61: ud2 = 32;
62: ud2 = 50;
63: ud2 = 32;
64: ud2 = 32;
65: ud2 = 32;
66: ud2 = 32;
67: ud2 = 32;
68: ud2 = 32;
69: ud2 = 32;
70: ud2 = 32;
71: ud2 = 32;
72: ud2 = 72;
73: ud2 = 101;
74: ud2 = 108;
75: ud2 = 108;
76: ud2 = 111;
77: ud2 = 32;
78: ud2 = 87;
79: ud2 = 111;
80: ud2 = 114;
81: ud2 = 108;
82: ud2 = 100;
83: ud2 = 33;
84: ud2 = 32;
85: ud2 = 51;
86: ud2 = 32;
87: ud2 = 32;
88: ud2 = 32;
89: ud2 = 32;
90: ud2 = 32;
91: ud2 = 32;
92: ud2 = 32;
93: ud2 = 32;
94: ud2 = 32;
95: ud2 = 72;
96: ud2 = 101;
97: ud2 = 108;
98: ud2 = 108;
99: ud2 = 111;
100: ud2 = 32;
101: ud2 = 87;
102: ud2 = 111;
103: ud2 = 114;
104: ud2 = 108;
105: ud2 = 100;
106: ud2 = 33;
107: ud2 = 32;
108: ud2 = 52;
109: ud2 = 32;
110: ud2 = 32;
111: ud2 = 32;
112: ud2 = 32;
default: ud2 = 32;
endcase
if (($signed({1'b0, o_byte}) != ud2)) begin
tstate <= 5'b00000;
i_mode <= 0;
$write("FAIL");
$write(" ");
$write("%0d", 114);
$write(" ");
$write("%h", tbi);
$write(" ");
$write("%0d", ud2);
$write(" ");
$write("%h", o_byte);
$write("\n");
$finish;
tstate <= 5'b10000;
end
tbi <= (tbi + 1);
i_addr <= (tbi + 1);
wtick <= 1'b1;
end
else begin
$write("%0d", 114);
$write("\n");
$write("ALL OK!");
$write(" ");
$write("%h", tbi);
$write("\n");
led2_r <= 0;
i_mode <= 0;
resume <= 1;
if ((22 <= 4)) begin
$finish;
end
//
tstate <= 5'b01111;
end
end
else if ((tstate == 5'b01111)) begin
if ((resume == 0)) begin
$write("--------------RESET-------------");
$write("\n");
o_led <= (o_led + 1);
tstate <= 5'b00000;
end
else begin
led0_g <= (!led0_g);
resume <= (resume + 1);
end
end
// if now() > 50000:
// raise StopSimulation()
end
 
endmodule
/hdl-deflate/trunk/test_fast_bench.v
0,0 → 1,3183
// File: test_fast_bench.v
// Generated by MyHDL 0.10
// Date: Thu Dec 20 18:23:04 2018
 
 
`timescale 1ns/10ps
 
module test_fast_bench (
i_clk,
o_led,
led0_g,
led1_b,
led2_r
);
 
 
output i_clk;
reg i_clk;
output [3:0] o_led;
reg [3:0] o_led;
output led0_g;
reg led0_g;
output led1_b;
reg led1_b;
output led2_r;
reg led2_r;
 
reg [12:0] o_iprogress = 0;
reg [12:0] resultlen = 0;
reg reset = 1;
reg [12:0] o_oprogress = 0;
reg o_done = 0;
reg [7:0] o_byte = 0;
reg [2:0] i_mode = 0;
reg [7:0] i_data = 0;
reg [12:0] i_addr = 0;
reg wtick = 0;
reg [4:0] tstate = 5'b00000;
reg [14:0] tbi = 0;
reg [0:0] scounter = 0;
reg [5:0] resume = 0;
reg [15:0] counter = 0;
reg [7:0] copy = 0;
reg [18:0] deflate0_0_wleaf = 0;
reg [9:0] deflate0_0_step = 0;
reg deflate0_0_static = 0;
reg [4:0] deflate0_0_state = 5'b00000;
reg [8:0] deflate0_0_spread_i = 0;
reg [9:0] deflate0_0_spread = 0;
reg [9:0] deflate0_0_reverse = 0;
reg [7:0] deflate0_0_orbyte = 0;
reg [12:0] deflate0_0_oraddr = 0;
reg [12:0] deflate0_0_offset = 0;
reg [7:0] deflate0_0_obyte = 0;
reg [7:0] deflate0_0_ob1 = 0;
reg [12:0] deflate0_0_oaddr = 0;
reg [8:0] deflate0_0_numLiterals = 0;
reg [5:0] deflate0_0_numDistance = 0;
reg [8:0] deflate0_0_numCodeLength = 0;
reg [2:0] deflate0_0_nb = 0;
reg [4:0] deflate0_0_minBits = 0;
reg [2:0] deflate0_0_method = 0;
reg [4:0] deflate0_0_maxBits = 0;
reg [8:0] deflate0_0_lwaddr = 0;
reg [12:0] deflate0_0_length = 0;
reg [18:0] deflate0_0_leaf = 0;
reg [14:0] deflate0_0_lastToken = 0;
reg [15:0] deflate0_0_ladler1 = 0;
reg [12:0] deflate0_0_isize = 0;
reg [9:0] deflate0_0_instantMaxBit = 0;
reg [14:0] deflate0_0_instantMask = 0;
reg [8:0] deflate0_0_howOften = 0;
reg deflate0_0_flush = 0;
reg deflate0_0_final = 0;
reg deflate0_0_filled = 0;
reg [2:0] deflate0_0_doo = 0;
reg deflate0_0_do_compress = 0;
reg [12:0] deflate0_0_do = 0;
reg [2:0] deflate0_0_dio = 0;
reg [12:0] deflate0_0_di = 0;
reg [4:0] deflate0_0_d_maxBits = 0;
reg [9:0] deflate0_0_d_instantMaxBit = 0;
reg [14:0] deflate0_0_d_instantMask = 0;
reg [8:0] deflate0_0_cur_static = 0;
reg signed [7:0] deflate0_0_cur_search = 0;
reg deflate0_0_cur_next = 0;
reg [12:0] deflate0_0_cur_i = 0;
reg signed [7:0] deflate0_0_cur_dist = 0;
reg [12:0] deflate0_0_cur_cstatic = 0;
reg [9:0] deflate0_0_cur_HF1 = 0;
reg [7:0] deflate0_0_copy1 = 0;
reg [14:0] deflate0_0_code = 0;
reg [3:0] deflate0_0_bits = 0;
reg [8:0] deflate0_0_b_numCodeLength = 0;
wire [31:0] deflate0_0_b41;
reg [7:0] deflate0_0_b4 = 0;
reg [7:0] deflate0_0_b3 = 0;
reg [7:0] deflate0_0_b2 = 0;
reg [7:0] deflate0_0_b1 = 0;
reg [15:0] deflate0_0_adler2 = 0;
reg [15:0] deflate0_0_adler1 = 0;
reg [7:0] deflate0_0_oram [0:8192-1];
 
initial begin: INITIALIZE_DEFLATE0_0_ORAM
integer i;
for(i=0; i<8192; i=i+1) begin
deflate0_0_oram[i] = 0;
end
end
 
reg [9:0] deflate0_0_nextCode [0:15-1];
 
initial begin: INITIALIZE_DEFLATE0_0_NEXTCODE
integer i;
for(i=0; i<15; i=i+1) begin
deflate0_0_nextCode[i] = 0;
end
end
 
reg [18:0] deflate0_0_leaves [0:512-1];
 
initial begin: INITIALIZE_DEFLATE0_0_LEAVES
integer i;
for(i=0; i<512; i=i+1) begin
deflate0_0_leaves[i] = 0;
end
end
 
reg [7:0] deflate0_0_iram [0:128-1];
 
initial begin: INITIALIZE_DEFLATE0_0_IRAM
integer i;
for(i=0; i<128; i=i+1) begin
deflate0_0_iram[i] = 0;
end
end
 
reg [3:0] deflate0_0_distanceLength [0:32-1];
 
initial begin: INITIALIZE_DEFLATE0_0_DISTANCELENGTH
integer i;
for(i=0; i<32; i=i+1) begin
deflate0_0_distanceLength[i] = 0;
end
end
 
reg [18:0] deflate0_0_d_leaves [0:128-1];
 
initial begin: INITIALIZE_DEFLATE0_0_D_LEAVES
integer i;
for(i=0; i<128; i=i+1) begin
deflate0_0_d_leaves[i] = 0;
end
end
 
reg [8:0] deflate0_0_code_bits [0:288-1];
 
initial begin: INITIALIZE_DEFLATE0_0_CODE_BITS
integer i;
for(i=0; i<288; i=i+1) begin
deflate0_0_code_bits[i] = 0;
end
end
 
reg [3:0] deflate0_0_codeLength [0:290-1];
 
initial begin: INITIALIZE_DEFLATE0_0_CODELENGTH
integer i;
for(i=0; i<290; i=i+1) begin
deflate0_0_codeLength[i] = 0;
end
end
 
reg [8:0] deflate0_0_bitLengthCount [0:16-1];
 
initial begin: INITIALIZE_DEFLATE0_0_BITLENGTHCOUNT
integer i;
for(i=0; i<16; i=i+1) begin
deflate0_0_bitLengthCount[i] = 0;
end
end
 
 
assign deflate0_0_b41[32-1:24] = deflate0_0_b4;
assign deflate0_0_b41[24-1:16] = deflate0_0_b3;
assign deflate0_0_b41[16-1:8] = deflate0_0_b2;
assign deflate0_0_b41[8-1:0] = deflate0_0_b1;
 
task MYHDL141_adv;
input width;
integer width;
integer nshift;
begin: MYHDL217_RETURN
nshift = ((deflate0_0_dio + width) >>> 3);
o_iprogress <= deflate0_0_di;
deflate0_0_dio <= ((deflate0_0_dio + width) & 7);
deflate0_0_di <= ($signed({1'b0, deflate0_0_di}) + nshift);
if ((nshift != 0)) begin
deflate0_0_filled <= 1'b0;
end
end
endtask
 
function integer MYHDL142_get4;
input boffset;
input width;
begin: MYHDL218_RETURN
if ((deflate0_0_nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL142_get4 = ((deflate0_0_b41 >>> (deflate0_0_dio + boffset)) & ((1 << width) - 1));
disable MYHDL218_RETURN;
end
endfunction
 
function integer MYHDL143_get4;
input boffset;
input width;
integer width;
begin: MYHDL219_RETURN
if ((deflate0_0_nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL143_get4 = ((deflate0_0_b41 >>> (deflate0_0_dio + boffset)) & ((1 << width) - 1));
disable MYHDL219_RETURN;
end
endfunction
 
task MYHDL144_adv;
input width;
integer width;
integer nshift;
begin: MYHDL220_RETURN
nshift = ((deflate0_0_dio + width) >>> 3);
o_iprogress <= deflate0_0_di;
deflate0_0_dio <= ((deflate0_0_dio + width) & 7);
deflate0_0_di <= ($signed({1'b0, deflate0_0_di}) + nshift);
if ((nshift != 0)) begin
deflate0_0_filled <= 1'b0;
end
end
endtask
 
task MYHDL145_adv;
input width;
integer width;
integer nshift;
begin: MYHDL221_RETURN
nshift = ((deflate0_0_dio + width) >>> 3);
o_iprogress <= deflate0_0_di;
deflate0_0_dio <= ((deflate0_0_dio + width) & 7);
deflate0_0_di <= ($signed({1'b0, deflate0_0_di}) + nshift);
if ((nshift != 0)) begin
deflate0_0_filled <= 1'b0;
end
end
endtask
 
function integer MYHDL146_get4;
input boffset;
integer boffset;
input width;
integer width;
begin: MYHDL222_RETURN
if ((deflate0_0_nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL146_get4 = ($signed($signed({1'b0, deflate0_0_b41}) >>> ($signed({1'b0, deflate0_0_dio}) + boffset)) & ((1 << width) - 1));
disable MYHDL222_RETURN;
end
endfunction
 
task MYHDL147_adv;
input width;
integer width;
integer nshift;
begin: MYHDL223_RETURN
nshift = $signed(($signed({1'b0, deflate0_0_dio}) + width) >>> 3);
o_iprogress <= deflate0_0_di;
deflate0_0_dio <= (($signed({1'b0, deflate0_0_dio}) + width) & 7);
deflate0_0_di <= ($signed({1'b0, deflate0_0_di}) + nshift);
if ((nshift != 0)) begin
deflate0_0_filled <= 1'b0;
end
end
endtask
 
function integer MYHDL148_put;
input d;
integer d;
input width;
integer width;
begin: MYHDL224_RETURN
if ((width > 9)) begin
$finish;
end
if (($signed({1'b0, d}) > ((1 << width) - 1))) begin
$finish;
end
MYHDL148_put = ((deflate0_0_ob1 | (d << deflate0_0_doo)) & 255);
disable MYHDL224_RETURN;
end
endfunction
 
task MYHDL149_put_adv;
input d;
integer d;
input width;
integer width;
reg pshift;
integer carry;
integer doo_next;
begin: MYHDL225_RETURN
if ((width > 9)) begin
$finish;
end
if (($signed({1'b0, d}) > ((1 << width) - 1))) begin
$finish;
end
pshift = ((deflate0_0_doo + width) > 8);
if (pshift) begin
carry = ($signed({1'b0, width}) - (8 - $signed({1'b0, deflate0_0_doo})));
deflate0_0_ob1 <= $signed($signed({1'b0, d}) >>> ($signed({1'b0, width}) - carry));
end
else begin
deflate0_0_ob1 <= (deflate0_0_ob1 | (d << deflate0_0_doo));
end
deflate0_0_do <= (deflate0_0_do + pshift);
o_oprogress <= (deflate0_0_do + pshift);
doo_next = ((deflate0_0_doo + width) & 7);
if ((doo_next == 0)) begin
deflate0_0_flush <= 1'b1;
end
deflate0_0_doo <= doo_next;
end
endtask
 
task MYHDL150_do_flush;
begin: MYHDL226_RETURN
deflate0_0_flush <= 1'b0;
deflate0_0_ob1 <= 0;
o_oprogress <= (deflate0_0_do + 1);
deflate0_0_do <= (deflate0_0_do + 1);
end
endtask
 
function integer MYHDL151_put;
input [9-1:0] d;
input [4-1:0] width;
begin: MYHDL227_RETURN
if ((width > 9)) begin
$finish;
end
if (($signed({1'b0, d}) > ((1 << width) - 1))) begin
$finish;
end
MYHDL151_put = ((deflate0_0_ob1 | (d << deflate0_0_doo)) & 255);
disable MYHDL227_RETURN;
end
endfunction
 
task MYHDL152_put_adv;
input [9-1:0] d;
input [4-1:0] width;
reg pshift;
integer carry;
integer doo_next;
begin: MYHDL228_RETURN
if ((width > 9)) begin
$finish;
end
if (($signed({1'b0, d}) > ((1 << width) - 1))) begin
$finish;
end
pshift = ((deflate0_0_doo + width) > 8);
if (pshift) begin
carry = ($signed({1'b0, width}) - (8 - $signed({1'b0, deflate0_0_doo})));
deflate0_0_ob1 <= $signed($signed({1'b0, d}) >>> ($signed({1'b0, width}) - carry));
end
else begin
deflate0_0_ob1 <= (deflate0_0_ob1 | (d << deflate0_0_doo));
end
deflate0_0_do <= (deflate0_0_do + pshift);
o_oprogress <= (deflate0_0_do + pshift);
doo_next = ((deflate0_0_doo + width) & 7);
if ((doo_next == 0)) begin
deflate0_0_flush <= 1'b1;
end
deflate0_0_doo <= doo_next;
end
endtask
 
task MYHDL153_do_flush;
begin: MYHDL229_RETURN
deflate0_0_flush <= 1'b0;
deflate0_0_ob1 <= 0;
o_oprogress <= (deflate0_0_do + 1);
deflate0_0_do <= (deflate0_0_do + 1);
end
endtask
 
function integer MYHDL154_rev_bits;
input [13-1:0] b;
input nb;
integer nb;
integer r;
begin: MYHDL230_RETURN
if ((b >= (1 << nb))) begin
$finish;
$write("too few bits");
$write("\n");
end
r = (((((((((((((((((b >>> 14) & 1) << 0) | (((b >>> 13) & 1) << 1)) | (((b >>> 12) & 1) << 2)) | (((b >>> 11) & 1) << 3)) | (((b >>> 10) & 1) << 4)) | (((b >>> 9) & 1) << 5)) | (((b >>> 8) & 1) << 6)) | (((b >>> 7) & 1) << 7)) | (((b >>> 6) & 1) << 8)) | (((b >>> 5) & 1) << 9)) | (((b >>> 4) & 1) << 10)) | (((b >>> 3) & 1) << 11)) | (((b >>> 2) & 1) << 12)) | (((b >>> 1) & 1) << 13)) | (((b >>> 0) & 1) << 14));
r = r >>> (15 - $signed({1'b0, nb}));
MYHDL154_rev_bits = r;
disable MYHDL230_RETURN;
end
endfunction
 
function integer MYHDL155_put;
input d;
integer d;
input width;
integer width;
begin: MYHDL231_RETURN
if ((width > 9)) begin
$finish;
end
if ((d > ((1 << width) - 1))) begin
$finish;
end
MYHDL155_put = (($signed({1'b0, deflate0_0_ob1}) | (d << $signed({1'b0, deflate0_0_doo}))) & 255);
disable MYHDL231_RETURN;
end
endfunction
 
task MYHDL156_put_adv;
input d;
integer d;
input width;
integer width;
reg pshift;
integer carry;
integer doo_next;
begin: MYHDL232_RETURN
if ((width > 9)) begin
$finish;
end
if ((d > ((1 << width) - 1))) begin
$finish;
end
pshift = (($signed({1'b0, deflate0_0_doo}) + width) > 8);
if (pshift) begin
carry = (width - (8 - $signed({1'b0, deflate0_0_doo})));
deflate0_0_ob1 <= $signed(d >>> (width - carry));
end
else begin
deflate0_0_ob1 <= ($signed({1'b0, deflate0_0_ob1}) | (d << $signed({1'b0, deflate0_0_doo})));
end
deflate0_0_do <= (deflate0_0_do + pshift);
o_oprogress <= (deflate0_0_do + pshift);
doo_next = (($signed({1'b0, deflate0_0_doo}) + width) & 7);
if ((doo_next == 0)) begin
deflate0_0_flush <= 1'b1;
end
deflate0_0_doo <= doo_next;
end
endtask
 
function integer MYHDL157_put;
input [9-1:0] d;
input [4-1:0] width;
begin: MYHDL233_RETURN
if ((width > 9)) begin
$finish;
end
if (($signed({1'b0, d}) > ((1 << width) - 1))) begin
$finish;
end
MYHDL157_put = ((deflate0_0_ob1 | (d << deflate0_0_doo)) & 255);
disable MYHDL233_RETURN;
end
endfunction
 
task MYHDL158_put_adv;
input [9-1:0] d;
input [4-1:0] width;
reg pshift;
integer carry;
integer doo_next;
begin: MYHDL234_RETURN
if ((width > 9)) begin
$finish;
end
if (($signed({1'b0, d}) > ((1 << width) - 1))) begin
$finish;
end
pshift = ((deflate0_0_doo + width) > 8);
if (pshift) begin
carry = ($signed({1'b0, width}) - (8 - $signed({1'b0, deflate0_0_doo})));
deflate0_0_ob1 <= $signed($signed({1'b0, d}) >>> ($signed({1'b0, width}) - carry));
end
else begin
deflate0_0_ob1 <= (deflate0_0_ob1 | (d << deflate0_0_doo));
end
deflate0_0_do <= (deflate0_0_do + pshift);
o_oprogress <= (deflate0_0_do + pshift);
doo_next = ((deflate0_0_doo + width) & 7);
if ((doo_next == 0)) begin
deflate0_0_flush <= 1'b1;
end
deflate0_0_doo <= doo_next;
end
endtask
 
function integer MYHDL159_put;
input [9-1:0] d;
input [4-1:0] width;
begin: MYHDL235_RETURN
if ((width > 9)) begin
$finish;
end
if (($signed({1'b0, d}) > ((1 << width) - 1))) begin
$finish;
end
MYHDL159_put = ((deflate0_0_ob1 | (d << deflate0_0_doo)) & 255);
disable MYHDL235_RETURN;
end
endfunction
 
task MYHDL160_put_adv;
input [9-1:0] d;
input [4-1:0] width;
reg pshift;
integer carry;
integer doo_next;
begin: MYHDL236_RETURN
if ((width > 9)) begin
$finish;
end
if (($signed({1'b0, d}) > ((1 << width) - 1))) begin
$finish;
end
pshift = ((deflate0_0_doo + width) > 8);
if (pshift) begin
carry = ($signed({1'b0, width}) - (8 - $signed({1'b0, deflate0_0_doo})));
deflate0_0_ob1 <= $signed($signed({1'b0, d}) >>> ($signed({1'b0, width}) - carry));
end
else begin
deflate0_0_ob1 <= (deflate0_0_ob1 | (d << deflate0_0_doo));
end
deflate0_0_do <= (deflate0_0_do + pshift);
o_oprogress <= (deflate0_0_do + pshift);
doo_next = ((deflate0_0_doo + width) & 7);
if ((doo_next == 0)) begin
deflate0_0_flush <= 1'b1;
end
deflate0_0_doo <= doo_next;
end
endtask
 
function integer MYHDL169_get4;
input boffset;
input width;
integer width;
begin: MYHDL237_RETURN
if ((deflate0_0_nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL169_get4 = ((deflate0_0_b41 >>> (deflate0_0_dio + boffset)) & ((1 << width) - 1));
disable MYHDL237_RETURN;
end
endfunction
 
function integer MYHDL170_get4;
input boffset;
input width;
integer width;
begin: MYHDL238_RETURN
if ((deflate0_0_nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL170_get4 = ((deflate0_0_b41 >>> (deflate0_0_dio + boffset)) & ((1 << width) - 1));
disable MYHDL238_RETURN;
end
endfunction
 
function integer MYHDL171_get4;
input boffset;
integer boffset;
input width;
integer width;
begin: MYHDL239_RETURN
if ((deflate0_0_nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL171_get4 = ((deflate0_0_b41 >>> (deflate0_0_dio + boffset)) & ((1 << width) - 1));
disable MYHDL239_RETURN;
end
endfunction
 
function integer MYHDL172_get4;
input boffset;
integer boffset;
input width;
integer width;
begin: MYHDL240_RETURN
if ((deflate0_0_nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL172_get4 = ((deflate0_0_b41 >>> (deflate0_0_dio + boffset)) & ((1 << width) - 1));
disable MYHDL240_RETURN;
end
endfunction
 
function integer MYHDL173_get4;
input boffset;
integer boffset;
input width;
integer width;
begin: MYHDL241_RETURN
if ((deflate0_0_nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL173_get4 = ((deflate0_0_b41 >>> (deflate0_0_dio + boffset)) & ((1 << width) - 1));
disable MYHDL241_RETURN;
end
endfunction
 
function integer MYHDL174_get4;
input boffset;
integer boffset;
input width;
integer width;
begin: MYHDL242_RETURN
if ((deflate0_0_nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL174_get4 = ((deflate0_0_b41 >>> (deflate0_0_dio + boffset)) & ((1 << width) - 1));
disable MYHDL242_RETURN;
end
endfunction
 
task MYHDL175_adv;
input width;
integer width;
integer nshift;
begin: MYHDL243_RETURN
nshift = ((deflate0_0_dio + width) >>> 3);
o_iprogress <= deflate0_0_di;
deflate0_0_dio <= ((deflate0_0_dio + width) & 7);
deflate0_0_di <= ($signed({1'b0, deflate0_0_di}) + nshift);
if ((nshift != 0)) begin
deflate0_0_filled <= 1'b0;
end
end
endtask
 
function integer MYHDL176_get4;
input boffset;
input width;
integer width;
begin: MYHDL244_RETURN
if ((deflate0_0_nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL176_get4 = ((deflate0_0_b41 >>> (deflate0_0_dio + boffset)) & ((1 << width) - 1));
disable MYHDL244_RETURN;
end
endfunction
 
task MYHDL177_adv;
input width;
integer width;
integer nshift;
begin: MYHDL245_RETURN
nshift = ((deflate0_0_dio + width) >>> 3);
o_iprogress <= deflate0_0_di;
deflate0_0_dio <= ((deflate0_0_dio + width) & 7);
deflate0_0_di <= ($signed({1'b0, deflate0_0_di}) + nshift);
if ((nshift != 0)) begin
deflate0_0_filled <= 1'b0;
end
end
endtask
 
function integer MYHDL178_get4;
input boffset;
input width;
integer width;
begin: MYHDL246_RETURN
if ((deflate0_0_nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL178_get4 = ((deflate0_0_b41 >>> (deflate0_0_dio + boffset)) & ((1 << width) - 1));
disable MYHDL246_RETURN;
end
endfunction
 
function integer MYHDL179_get4;
input boffset;
input width;
integer width;
begin: MYHDL247_RETURN
if ((deflate0_0_nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL179_get4 = ((deflate0_0_b41 >>> (deflate0_0_dio + boffset)) & ((1 << width) - 1));
disable MYHDL247_RETURN;
end
endfunction
 
function integer MYHDL180_get4;
input boffset;
input width;
integer width;
begin: MYHDL248_RETURN
if ((deflate0_0_nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL180_get4 = ((deflate0_0_b41 >>> (deflate0_0_dio + boffset)) & ((1 << width) - 1));
disable MYHDL248_RETURN;
end
endfunction
 
task MYHDL181_adv;
input width;
integer width;
integer nshift;
begin: MYHDL249_RETURN
nshift = ((deflate0_0_dio + width) >>> 3);
o_iprogress <= deflate0_0_di;
deflate0_0_dio <= ((deflate0_0_dio + width) & 7);
deflate0_0_di <= ($signed({1'b0, deflate0_0_di}) + nshift);
if ((nshift != 0)) begin
deflate0_0_filled <= 1'b0;
end
end
endtask
 
function integer MYHDL188_rev_bits;
input [10-1:0] b;
input [4-1:0] nb;
integer r;
begin: MYHDL250_RETURN
if ((b >= (1 << nb))) begin
$finish;
$write("too few bits");
$write("\n");
end
r = (((((((((((((((((b >>> 14) & 1) << 0) | (((b >>> 13) & 1) << 1)) | (((b >>> 12) & 1) << 2)) | (((b >>> 11) & 1) << 3)) | (((b >>> 10) & 1) << 4)) | (((b >>> 9) & 1) << 5)) | (((b >>> 8) & 1) << 6)) | (((b >>> 7) & 1) << 7)) | (((b >>> 6) & 1) << 8)) | (((b >>> 5) & 1) << 9)) | (((b >>> 4) & 1) << 10)) | (((b >>> 3) & 1) << 11)) | (((b >>> 2) & 1) << 12)) | (((b >>> 1) & 1) << 13)) | (((b >>> 0) & 1) << 14));
r = r >>> (15 - $signed({1'b0, nb}));
MYHDL188_rev_bits = r;
disable MYHDL250_RETURN;
end
endfunction
 
function integer MYHDL189_makeLeaf;
input [9-1:0] lcode;
input [4-1:0] lbits;
begin: MYHDL251_RETURN
if ((lcode >= (1 << 10))) begin
$finish;
end
if ((lbits >= (1 << 9))) begin
$finish;
end
MYHDL189_makeLeaf = ((lcode << 9) | lbits);
disable MYHDL251_RETURN;
end
endfunction
 
function integer MYHDL190_makeLeaf;
input [9-1:0] lcode;
input [4-1:0] lbits;
begin: MYHDL252_RETURN
if ((lcode >= (1 << 10))) begin
$finish;
end
if ((lbits >= (1 << 9))) begin
$finish;
end
MYHDL190_makeLeaf = ((lcode << 9) | lbits);
disable MYHDL252_RETURN;
end
endfunction
 
function integer MYHDL191_makeLeaf;
input [9-1:0] lcode;
input [4-1:0] lbits;
begin: MYHDL253_RETURN
if ((lcode >= (1 << 10))) begin
$finish;
end
if ((lbits >= (1 << 9))) begin
$finish;
end
MYHDL191_makeLeaf = ((lcode << 9) | lbits);
disable MYHDL253_RETURN;
end
endfunction
 
function integer MYHDL192_get4;
input boffset;
input [5-1:0] width;
begin: MYHDL254_RETURN
if ((deflate0_0_nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL192_get4 = ((deflate0_0_b41 >>> (deflate0_0_dio + boffset)) & ((1 << width) - 1));
disable MYHDL254_RETURN;
end
endfunction
 
function integer MYHDL193_get_bits;
input [19-1:0] aleaf;
begin: MYHDL255_RETURN
MYHDL193_get_bits = ($signed({1'b0, aleaf}) & ((1 << 9) - 1));
disable MYHDL255_RETURN;
end
endfunction
 
function integer MYHDL194_get_bits;
input [19-1:0] aleaf;
begin: MYHDL256_RETURN
MYHDL194_get_bits = ($signed({1'b0, aleaf}) & ((1 << 9) - 1));
disable MYHDL256_RETURN;
end
endfunction
 
task MYHDL195_adv;
input width;
integer width;
integer nshift;
begin: MYHDL257_RETURN
nshift = $signed(($signed({1'b0, deflate0_0_dio}) + width) >>> 3);
o_iprogress <= deflate0_0_di;
deflate0_0_dio <= (($signed({1'b0, deflate0_0_dio}) + width) & 7);
deflate0_0_di <= ($signed({1'b0, deflate0_0_di}) + nshift);
if ((nshift != 0)) begin
deflate0_0_filled <= 1'b0;
end
end
endtask
 
function integer MYHDL196_get_code;
input [19-1:0] aleaf;
begin: MYHDL258_RETURN
MYHDL196_get_code = (aleaf >>> 9);
disable MYHDL258_RETURN;
end
endfunction
 
function integer MYHDL197_get_code;
input [19-1:0] aleaf;
begin: MYHDL259_RETURN
MYHDL197_get_code = (aleaf >>> 9);
disable MYHDL259_RETURN;
end
endfunction
 
function integer MYHDL198_get4;
input boffset;
integer boffset;
input [5-1:0] width;
begin: MYHDL260_RETURN
if ((deflate0_0_nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL198_get4 = ($signed($signed({1'b0, deflate0_0_b41}) >>> ($signed({1'b0, deflate0_0_dio}) + boffset)) & ((1 << width) - 1));
disable MYHDL260_RETURN;
end
endfunction
 
function integer MYHDL199_get_bits;
input [19-1:0] aleaf;
begin: MYHDL261_RETURN
MYHDL199_get_bits = ($signed({1'b0, aleaf}) & ((1 << 9) - 1));
disable MYHDL261_RETURN;
end
endfunction
 
function integer MYHDL200_get4;
input boffset;
input width;
integer width;
begin: MYHDL262_RETURN
if ((deflate0_0_nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL200_get4 = ((deflate0_0_b41 >>> (deflate0_0_dio + boffset)) & ((1 << width) - 1));
disable MYHDL262_RETURN;
end
endfunction
 
function integer MYHDL201_get_code;
input [19-1:0] aleaf;
begin: MYHDL263_RETURN
MYHDL201_get_code = (aleaf >>> 9);
disable MYHDL263_RETURN;
end
endfunction
 
function integer MYHDL202_get_bits;
input [19-1:0] aleaf;
begin: MYHDL264_RETURN
MYHDL202_get_bits = ($signed({1'b0, aleaf}) & ((1 << 9) - 1));
disable MYHDL264_RETURN;
end
endfunction
 
function integer MYHDL203_get4;
input boffset;
integer boffset;
input width;
integer width;
begin: MYHDL265_RETURN
if ((deflate0_0_nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL203_get4 = ($signed($signed({1'b0, deflate0_0_b41}) >>> ($signed({1'b0, deflate0_0_dio}) + boffset)) & ((1 << width) - 1));
disable MYHDL265_RETURN;
end
endfunction
 
function integer MYHDL204_get_bits;
input [19-1:0] aleaf;
begin: MYHDL266_RETURN
MYHDL204_get_bits = ($signed({1'b0, aleaf}) & ((1 << 9) - 1));
disable MYHDL266_RETURN;
end
endfunction
 
task MYHDL205_adv;
input width;
integer width;
integer nshift;
begin: MYHDL267_RETURN
nshift = $signed(($signed({1'b0, deflate0_0_dio}) + width) >>> 3);
o_iprogress <= deflate0_0_di;
deflate0_0_dio <= (($signed({1'b0, deflate0_0_dio}) + width) & 7);
deflate0_0_di <= ($signed({1'b0, deflate0_0_di}) + nshift);
if ((nshift != 0)) begin
deflate0_0_filled <= 1'b0;
end
end
endtask
 
function integer MYHDL206_get4;
input boffset;
input width;
integer width;
begin: MYHDL268_RETURN
if ((deflate0_0_nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL206_get4 = ((deflate0_0_b41 >>> (deflate0_0_dio + boffset)) & ((1 << width) - 1));
disable MYHDL268_RETURN;
end
endfunction
 
function integer MYHDL207_get4;
input boffset;
integer boffset;
input width;
integer width;
begin: MYHDL269_RETURN
if ((deflate0_0_nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL207_get4 = ($signed($signed({1'b0, deflate0_0_b41}) >>> ($signed({1'b0, deflate0_0_dio}) + boffset)) & ((1 << width) - 1));
disable MYHDL269_RETURN;
end
endfunction
 
function integer MYHDL208_rev_bits;
input b;
integer b;
input nb;
integer nb;
integer r;
begin: MYHDL270_RETURN
if ((b >= (1 << nb))) begin
$finish;
$write("too few bits");
$write("\n");
end
r = (((((((((((((((((b >>> 14) & 1) << 0) | (((b >>> 13) & 1) << 1)) | (((b >>> 12) & 1) << 2)) | (((b >>> 11) & 1) << 3)) | (((b >>> 10) & 1) << 4)) | (((b >>> 9) & 1) << 5)) | (((b >>> 8) & 1) << 6)) | (((b >>> 7) & 1) << 7)) | (((b >>> 6) & 1) << 8)) | (((b >>> 5) & 1) << 9)) | (((b >>> 4) & 1) << 10)) | (((b >>> 3) & 1) << 11)) | (((b >>> 2) & 1) << 12)) | (((b >>> 1) & 1) << 13)) | (((b >>> 0) & 1) << 14));
r = r >>> (15 - $signed({1'b0, nb}));
MYHDL208_rev_bits = r;
disable MYHDL270_RETURN;
end
endfunction
 
function integer MYHDL209_get4;
input boffset;
integer boffset;
input width;
integer width;
begin: MYHDL271_RETURN
if ((deflate0_0_nb != 4)) begin
$write("----NB----");
$write("\n");
$finish;
end
MYHDL209_get4 = ($signed($signed({1'b0, deflate0_0_b41}) >>> ($signed({1'b0, deflate0_0_dio}) + boffset)) & ((1 << width) - 1));
disable MYHDL271_RETURN;
end
endfunction
 
task MYHDL210_adv;
input width;
integer width;
integer nshift;
begin: MYHDL272_RETURN
nshift = $signed(($signed({1'b0, deflate0_0_dio}) + width) >>> 3);
o_iprogress <= deflate0_0_di;
deflate0_0_dio <= (($signed({1'b0, deflate0_0_dio}) + width) & 7);
deflate0_0_di <= ($signed({1'b0, deflate0_0_di}) + nshift);
if ((nshift != 0)) begin
deflate0_0_filled <= 1'b0;
end
end
endtask
 
task MYHDL211_adv;
input width;
integer width;
integer nshift;
begin: MYHDL273_RETURN
nshift = ((deflate0_0_dio + width) >>> 3);
o_iprogress <= deflate0_0_di;
deflate0_0_dio <= ((deflate0_0_dio + width) & 7);
deflate0_0_di <= ($signed({1'b0, deflate0_0_di}) + nshift);
if ((nshift != 0)) begin
deflate0_0_filled <= 1'b0;
end
end
endtask
 
 
initial begin: TEST_FAST_BENCH_CLKGEN
i_clk <= 0;
while (1'b1) begin
# 5;
i_clk <= (!i_clk);
end
end
 
 
always @(posedge i_clk) begin: TEST_FAST_BENCH_DEFLATE0_0_IO_LOGIC
case (i_mode)
'h2: begin
deflate0_0_iram[(i_addr & 127)] <= i_data;
deflate0_0_isize <= i_addr;
end
'h3: begin
o_byte <= deflate0_0_oram[i_addr];
end
default: begin
// pass
end
endcase
end
 
 
always @(posedge i_clk) begin: TEST_FAST_BENCH_DEFLATE0_0_LOGIC
integer hm;
integer skip;
reg no_adv;
integer cs_i;
reg [4-1:0] outlen;
reg [9-1:0] outbits;
reg [8-1:0] bdata;
integer adler1_next;
integer nextdist;
integer copydist;
integer extra_dist;
integer extra_bits;
integer outcode;
integer lencode;
integer match;
integer distance;
integer stat_i;
integer clo_i;
integer n_adv;
integer dbl_i;
integer dbl;
integer dist_i;
integer limit;
reg [4-1:0] j;
integer t;
integer hf2_i;
reg [5-1:0] amb;
integer ncode;
reg [10-1:0] canonical;
reg [4-1:0] bits_next;
reg [15-1:0] aim;
integer cto;
integer mask;
integer token;
integer extraLength;
integer tlength;
integer distanceCode;
integer moreBits;
integer mored;
if ((!reset)) begin
$write("DEFLATE RESET");
$write("\n");
deflate0_0_state <= 5'b00000;
o_done <= 1'b0;
end
else begin
case (deflate0_0_state)
5'b00000: begin
case (i_mode)
'h4: begin
$write("STARTC");
$write("\n");
deflate0_0_do_compress <= 1'b1;
deflate0_0_method <= 1;
o_done <= 1'b0;
o_iprogress <= 0;
o_oprogress <= 0;
deflate0_0_di <= 0;
deflate0_0_dio <= 0;
deflate0_0_do <= 0;
deflate0_0_doo <= 0;
deflate0_0_filled <= 1'b1;
deflate0_0_cur_static <= 0;
deflate0_0_state <= 5'b01110;
end
'h5: begin
deflate0_0_do_compress <= 1'b0;
o_done <= 1'b0;
o_iprogress <= 0;
o_oprogress <= 0;
deflate0_0_di <= 0;
deflate0_0_dio <= 0;
deflate0_0_do <= 0;
deflate0_0_doo <= 0;
deflate0_0_filled <= 1'b1;
deflate0_0_state <= 5'b00001;
end
default: begin
// pass
end
endcase
end
5'b00001: begin
if ((!deflate0_0_filled)) begin
deflate0_0_filled <= 1'b1;
end
else if ((deflate0_0_nb < 4)) begin
// pass
end
else if ((deflate0_0_di == 0)) begin
if ((deflate0_0_b1 == 120)) begin
$write("deflate mode");
$write("\n");
end
else begin
$write("%h", deflate0_0_di);
$write(" ");
$write("%h", deflate0_0_dio);
$write(" ");
$write("%h", deflate0_0_nb);
$write(" ");
$write("%h", deflate0_0_b1);
$write(" ");
$write("%h", deflate0_0_b2);
$write(" ");
$write("%h", deflate0_0_b3);
$write(" ");
$write("%h", deflate0_0_b4);
$write(" ");
$write("%h", deflate0_0_isize);
$write("\n");
$finish;
o_done <= 1'b1;
deflate0_0_state <= 5'b00000;
end
MYHDL141_adv(16);
end
else begin
if (MYHDL142_get4(0, 1)) begin
$write("final");
$write("\n");
deflate0_0_final <= 1'b1;
end
hm = MYHDL143_get4(1, 2);
deflate0_0_method <= hm;
$write("method");
$write(" ");
$write("%0d", hm);
$write("\n");
case (hm)
'h2: begin
deflate0_0_state <= 5'b00010;
deflate0_0_numCodeLength <= 0;
deflate0_0_numLiterals <= 0;
deflate0_0_static <= 1'b0;
MYHDL144_adv(3);
end
'h1: begin
deflate0_0_static <= 1'b1;
deflate0_0_cur_static <= 0;
deflate0_0_state <= 5'b01110;
MYHDL145_adv(3);
end
'h0: begin
deflate0_0_state <= 5'b10101;
skip = (8 - deflate0_0_dio);
if ((skip <= 2)) begin
skip = (16 - deflate0_0_dio);
end
deflate0_0_length <= MYHDL146_get4(skip, 16);
MYHDL147_adv((skip + 16));
deflate0_0_cur_i <= 0;
deflate0_0_offset <= 7;
end
default: begin
deflate0_0_state <= 5'b00000;
$write("Bad method");
$write("\n");
$finish;
end
endcase
end
end
5'b10110: begin
no_adv = 0;
if ((!deflate0_0_filled)) begin
no_adv = 1;
deflate0_0_filled <= 1'b1;
end
else if ((deflate0_0_nb < 4)) begin
no_adv = 1;
// pass
end
else if ((deflate0_0_cur_cstatic == 0)) begin
deflate0_0_flush <= 1'b0;
deflate0_0_ob1 <= 0;
deflate0_0_adler1 <= 1;
deflate0_0_adler2 <= 0;
deflate0_0_ladler1 <= 0;
deflate0_0_oaddr <= 0;
deflate0_0_obyte <= 120;
end
else if ((deflate0_0_cur_cstatic == 1)) begin
deflate0_0_oaddr <= 1;
deflate0_0_obyte <= 156;
deflate0_0_do <= 2;
end
else if ((deflate0_0_cur_cstatic == 2)) begin
deflate0_0_oaddr <= deflate0_0_do;
deflate0_0_obyte <= MYHDL148_put(3, 3);
MYHDL149_put_adv(3, 3);
end
else if (deflate0_0_flush) begin
$write("flush");
$write(" ");
$write("%h", deflate0_0_do);
$write(" ");
$write("%h", deflate0_0_ob1);
$write("\n");
no_adv = 1;
deflate0_0_oaddr <= deflate0_0_do;
deflate0_0_obyte <= deflate0_0_ob1;
MYHDL150_do_flush;
end
else if ((($signed({1'b0, deflate0_0_cur_cstatic}) - 3) > deflate0_0_isize)) begin
if ((($signed({1'b0, deflate0_0_cur_cstatic}) - 3) == (deflate0_0_isize + 1))) begin
$write("Put EOF");
$write(" ");
$write("%h", deflate0_0_do);
$write("\n");
cs_i = 256;
outlen = deflate0_0_codeLength[cs_i];
outbits = deflate0_0_code_bits[cs_i];
$write("EOF BITS:");
$write(" ");
$write("%0d", cs_i);
$write(" ");
$write("%h", outlen);
$write(" ");
$write("%h", outbits);
$write("\n");
deflate0_0_oaddr <= deflate0_0_do;
deflate0_0_obyte <= MYHDL151_put(outbits, outlen);
MYHDL152_put_adv(outbits, outlen);
end
else if ((($signed({1'b0, deflate0_0_cur_cstatic}) - 3) == (deflate0_0_isize + 2))) begin
$write("calc end adler");
$write("\n");
deflate0_0_adler2 <= ((deflate0_0_adler2 + deflate0_0_ladler1) % 65521);
if ((deflate0_0_doo != 0)) begin
deflate0_0_oaddr <= deflate0_0_do;
deflate0_0_obyte <= deflate0_0_ob1;
deflate0_0_do <= (deflate0_0_do + 1);
end
end
else if ((($signed({1'b0, deflate0_0_cur_cstatic}) - 3) == (deflate0_0_isize + 3))) begin
$write("c1");
$write("\n");
deflate0_0_oaddr <= deflate0_0_do;
deflate0_0_obyte <= (deflate0_0_adler2 >>> 8);
deflate0_0_do <= (deflate0_0_do + 1);
end
else if ((($signed({1'b0, deflate0_0_cur_cstatic}) - 3) == (deflate0_0_isize + 4))) begin
$write("c2");
$write("\n");
deflate0_0_oaddr <= deflate0_0_do;
deflate0_0_obyte <= (deflate0_0_adler2 & 255);
deflate0_0_do <= (deflate0_0_do + 1);
end
else if ((($signed({1'b0, deflate0_0_cur_cstatic}) - 3) == (deflate0_0_isize + 5))) begin
$write("c3");
$write("\n");
deflate0_0_oaddr <= deflate0_0_do;
deflate0_0_obyte <= (deflate0_0_adler1 >>> 8);
deflate0_0_do <= (deflate0_0_do + 1);
end
else if ((($signed({1'b0, deflate0_0_cur_cstatic}) - 3) == (deflate0_0_isize + 6))) begin
$write("c4");
$write("\n");
deflate0_0_oaddr <= deflate0_0_do;
deflate0_0_obyte <= (deflate0_0_adler1 & 255);
end
else if ((($signed({1'b0, deflate0_0_cur_cstatic}) - 3) == (deflate0_0_isize + 7))) begin
$write("EOF finish");
$write(" ");
$write("%h", deflate0_0_do);
$write("\n");
o_done <= 1'b1;
o_oprogress <= (deflate0_0_do + 1);
deflate0_0_state <= 5'b00000;
end
else begin
$write("%h", deflate0_0_cur_cstatic);
$write(" ");
$write("%h", deflate0_0_isize);
$write("\n");
$finish;
end
end
else begin
bdata = deflate0_0_iram[deflate0_0_di];
adler1_next = ((deflate0_0_adler1 + bdata) % 65521);
deflate0_0_adler1 <= adler1_next;
deflate0_0_adler2 <= ((deflate0_0_adler2 + deflate0_0_ladler1) % 65521);
deflate0_0_ladler1 <= adler1_next;
deflate0_0_state <= 5'b10111;
deflate0_0_cur_search <= (deflate0_0_di - 1);
end
if ((!no_adv)) begin
deflate0_0_cur_cstatic <= (deflate0_0_cur_cstatic + 1);
end
end
5'b11000: begin
if (deflate0_0_flush) begin
MYHDL153_do_flush;
end
else begin
case ((deflate0_0_cur_i + 1))
0: nextdist = 1;
1: nextdist = 2;
2: nextdist = 3;
3: nextdist = 4;
4: nextdist = 5;
5: nextdist = 7;
6: nextdist = 9;
7: nextdist = 13;
8: nextdist = 17;
9: nextdist = 25;
10: nextdist = 33;
11: nextdist = 49;
12: nextdist = 65;
13: nextdist = 97;
14: nextdist = 129;
15: nextdist = 193;
16: nextdist = 257;
17: nextdist = 385;
18: nextdist = 513;
19: nextdist = 769;
20: nextdist = 1025;
21: nextdist = 1537;
22: nextdist = 2049;
23: nextdist = 3073;
24: nextdist = 4097;
25: nextdist = 6145;
26: nextdist = 8193;
27: nextdist = 12289;
28: nextdist = 16385;
default: nextdist = 24577;
endcase
if ((nextdist > deflate0_0_cur_dist)) begin
case (deflate0_0_cur_i)
0: copydist = 1;
1: copydist = 2;
2: copydist = 3;
3: copydist = 4;
4: copydist = 5;
5: copydist = 7;
6: copydist = 9;
7: copydist = 13;
8: copydist = 17;
9: copydist = 25;
10: copydist = 33;
11: copydist = 49;
12: copydist = 65;
13: copydist = 97;
14: copydist = 129;
15: copydist = 193;
16: copydist = 257;
17: copydist = 385;
18: copydist = 513;
19: copydist = 769;
20: copydist = 1025;
21: copydist = 1537;
22: copydist = 2049;
23: copydist = 3073;
24: copydist = 4097;
25: copydist = 6145;
26: copydist = 8193;
27: copydist = 12289;
28: copydist = 16385;
default: copydist = 24577;
endcase
extra_dist = (deflate0_0_cur_dist - copydist);
case ((deflate0_0_cur_i / 2))
0: extra_bits = 0;
1: extra_bits = 0;
2: extra_bits = 1;
3: extra_bits = 2;
4: extra_bits = 3;
5: extra_bits = 4;
6: extra_bits = 5;
7: extra_bits = 6;
8: extra_bits = 7;
9: extra_bits = 8;
10: extra_bits = 9;
11: extra_bits = 10;
12: extra_bits = 11;
13: extra_bits = 12;
default: extra_bits = 13;
endcase
if ((extra_dist > ((1 << extra_bits) - 1))) begin
$finish;
end
outcode = (MYHDL154_rev_bits(deflate0_0_cur_i, 5) | (extra_dist << 5));
deflate0_0_oaddr <= deflate0_0_do;
deflate0_0_obyte <= MYHDL155_put(outcode, (5 + extra_bits));
MYHDL156_put_adv(outcode, (5 + extra_bits));
deflate0_0_cur_i <= (($signed({1'b0, deflate0_0_di}) - $signed({1'b0, deflate0_0_length})) + 1);
deflate0_0_state <= 5'b11001;
end
else begin
deflate0_0_cur_i <= (deflate0_0_cur_i + 1);
end
end
end
5'b11001: begin
if ((deflate0_0_cur_i < deflate0_0_di)) begin
bdata = deflate0_0_iram[(deflate0_0_cur_i & 127)];
adler1_next = ((deflate0_0_adler1 + bdata) % 65521);
deflate0_0_adler1 <= adler1_next;
deflate0_0_adler2 <= ((deflate0_0_adler2 + deflate0_0_ladler1) % 65521);
deflate0_0_ladler1 <= adler1_next;
deflate0_0_cur_i <= (deflate0_0_cur_i + 1);
end
else begin
deflate0_0_state <= 5'b10110;
end
end
5'b10111: begin
if ((!deflate0_0_filled)) begin
deflate0_0_filled <= 1'b1;
end
else if ((deflate0_0_nb < 4)) begin
// pass
end
else begin
if (((deflate0_0_cur_search >= 0) && (deflate0_0_cur_search >= ($signed({1'b0, deflate0_0_di}) - 32)) && ($signed({1'b0, deflate0_0_di}) < ($signed({1'b0, deflate0_0_isize}) - 3)))) begin
if (((deflate0_0_iram[(deflate0_0_cur_search & 127)] == deflate0_0_b1) && (deflate0_0_iram[((deflate0_0_cur_search + 1) & 127)] == deflate0_0_b2) && (deflate0_0_iram[((deflate0_0_cur_search + 2) & 127)] == deflate0_0_b3))) begin
lencode = 257;
match = 3;
if ((($signed({1'b0, deflate0_0_di}) < ($signed({1'b0, deflate0_0_isize}) - 4)) && (deflate0_0_iram[((deflate0_0_cur_search + 3) & 127)] == deflate0_0_b4))) begin
lencode = 258;
match = 4;
if ((($signed({1'b0, deflate0_0_di}) < ($signed({1'b0, deflate0_0_isize}) - 5)) && (deflate0_0_iram[((deflate0_0_cur_search + 4) & 127)] == deflate0_0_iram[((deflate0_0_di + 4) & 127)]))) begin
lencode = 259;
match = 5;
end
end
// if di < isize - 6 and iram[cur_search+5 & IBS] == iram[di + 5 & IBS]:
// lencode = 260
// match = 6
// if di < isize - 7 and iram[cur_search+6 & IBS] == iram[di + 6 & IBS]:
// lencode = 261
// match = 7
// if di < isize - 8 and iram[cur_search+7 & IBS] == iram[di + 7 & IBS]:
// lencode = 262
// match = 8
// if di < isize - 9 and iram[cur_search+8 & IBS] == iram[di + 8 & IBS]:
// lencode = 263
// match = 9
// if di < isize - 10 and iram[cur_search+9 & IBS] == iram[di + 9 & IBS]:
// lencode = 264
// match = 10
$write("found:");
$write(" ");
$write("%h", deflate0_0_cur_search);
$write(" ");
$write("%h", deflate0_0_di);
$write(" ");
$write("%h", deflate0_0_isize);
$write(" ");
$write("%0d", match);
$write("\n");
outlen = deflate0_0_codeLength[lencode];
outbits = deflate0_0_code_bits[lencode];
deflate0_0_oaddr <= deflate0_0_do;
deflate0_0_obyte <= MYHDL157_put(outbits, outlen);
MYHDL158_put_adv(outbits, outlen);
distance = ($signed({1'b0, deflate0_0_di}) - deflate0_0_cur_search);
deflate0_0_cur_dist <= distance;
deflate0_0_cur_i <= 0;
deflate0_0_di <= (deflate0_0_di + match);
deflate0_0_cur_cstatic <= ((deflate0_0_cur_cstatic + match) - 1);
deflate0_0_length <= match;
deflate0_0_state <= 5'b11000;
end
else begin
deflate0_0_cur_search <= (deflate0_0_cur_search - 1);
end
end
else begin
bdata = deflate0_0_iram[deflate0_0_di];
deflate0_0_di <= (deflate0_0_di + 1);
outlen = deflate0_0_codeLength[bdata];
outbits = deflate0_0_code_bits[bdata];
deflate0_0_oaddr <= deflate0_0_do;
deflate0_0_obyte <= MYHDL159_put(outbits, outlen);
MYHDL160_put_adv(outbits, outlen);
deflate0_0_state <= 5'b10110;
end
end
end
5'b01110: begin
for (stat_i=0; stat_i<144; stat_i=stat_i+1) begin
deflate0_0_codeLength[stat_i] <= 8;
end
for (stat_i=144; stat_i<256; stat_i=stat_i+1) begin
deflate0_0_codeLength[stat_i] <= 9;
end
for (stat_i=256; stat_i<280; stat_i=stat_i+1) begin
deflate0_0_codeLength[stat_i] <= 7;
end
for (stat_i=280; stat_i<288; stat_i=stat_i+1) begin
deflate0_0_codeLength[stat_i] <= 8;
end
deflate0_0_numCodeLength <= 288;
deflate0_0_cur_HF1 <= 0;
deflate0_0_state <= 5'b00111;
// if cur_static < 288:
// if cur_static < 144:
// codeLength[cur_static].next = 8
// elif cur_static < 256:
// codeLength[cur_static].next = 9
// elif cur_static < 280:
// codeLength[cur_static].next = 7
// else:
// codeLength[cur_static].next = 8
// cur_static.next = cur_static + 1
// else:
// numCodeLength.next = 288
// cur_HF1.next = 0
// state.next = d_state.HF1
end
5'b00010: begin
if ((!deflate0_0_filled)) begin
deflate0_0_filled <= 1'b1;
end
else if ((deflate0_0_nb < 4)) begin
// pass
end
else if ((deflate0_0_numLiterals == 0)) begin
deflate0_0_numLiterals <= (257 + MYHDL169_get4(0, 5));
$write("NL:");
$write(" ");
$write("%0d", (257 + MYHDL170_get4(0, 5)));
$write("\n");
deflate0_0_numDistance <= (1 + MYHDL171_get4(5, 5));
$write("ND:");
$write(" ");
$write("%0d", (1 + MYHDL172_get4(5, 5)));
$write("\n");
deflate0_0_b_numCodeLength <= (4 + MYHDL173_get4(10, 4));
$write("NCL:");
$write(" ");
$write("%0d", (4 + MYHDL174_get4(10, 4)));
$write("\n");
deflate0_0_numCodeLength <= 0;
MYHDL175_adv(14);
end
else begin
if ((deflate0_0_numCodeLength < 19)) begin
case (deflate0_0_numCodeLength)
0: clo_i = 16;
1: clo_i = 17;
2: clo_i = 18;
3: clo_i = 0;
4: clo_i = 8;
5: clo_i = 7;
6: clo_i = 9;
7: clo_i = 6;
8: clo_i = 10;
9: clo_i = 5;
10: clo_i = 11;
11: clo_i = 4;
12: clo_i = 12;
13: clo_i = 3;
14: clo_i = 13;
15: clo_i = 2;
16: clo_i = 14;
17: clo_i = 1;
default: clo_i = 15;
endcase
if ((deflate0_0_numCodeLength < deflate0_0_b_numCodeLength)) begin
deflate0_0_codeLength[clo_i] <= MYHDL176_get4(0, 3);
MYHDL177_adv(3);
end
else begin
deflate0_0_codeLength[clo_i] <= 0;
end
deflate0_0_numCodeLength <= (deflate0_0_numCodeLength + 1);
end
else begin
deflate0_0_numCodeLength <= 19;
deflate0_0_cur_HF1 <= 0;
deflate0_0_state <= 5'b00111;
end
end
end
5'b00011: begin
if ((!deflate0_0_filled)) begin
deflate0_0_filled <= 1'b1;
end
else if ((deflate0_0_nb < 4)) begin
// pass
end
else if ((deflate0_0_numCodeLength < (deflate0_0_numLiterals + deflate0_0_numDistance))) begin
n_adv = 0;
if ((deflate0_0_code < 16)) begin
deflate0_0_howOften <= 1;
deflate0_0_lastToken <= deflate0_0_code;
end
else if ((deflate0_0_code == 16)) begin
deflate0_0_howOften <= (3 + MYHDL178_get4(0, 2));
n_adv = 2;
end
else if ((deflate0_0_code == 17)) begin
deflate0_0_howOften <= (3 + MYHDL179_get4(0, 3));
deflate0_0_lastToken <= 0;
n_adv = 3;
end
else if ((deflate0_0_code == 18)) begin
deflate0_0_howOften <= (11 + MYHDL180_get4(0, 7));
deflate0_0_lastToken <= 0;
n_adv = 7;
end
else begin
$finish;
end
if ((n_adv != 0)) begin
MYHDL181_adv(n_adv);
end
deflate0_0_state <= 5'b00100;
end
else begin
$write("FILL UP");
$write("\n");
for (dbl_i=0; dbl_i<32; dbl_i=dbl_i+1) begin
dbl = 0;
if (((dbl_i + $signed({1'b0, deflate0_0_numLiterals})) < deflate0_0_numCodeLength)) begin
dbl = deflate0_0_codeLength[(dbl_i + $signed({1'b0, deflate0_0_numLiterals}))];
end
deflate0_0_distanceLength[dbl_i] <= dbl;
end
deflate0_0_cur_i <= deflate0_0_numLiterals;
deflate0_0_state <= 5'b00110;
end
end
default: begin
if ((deflate0_0_state == 5'b00110)) begin
if ((deflate0_0_cur_i < 288)) begin
deflate0_0_codeLength[deflate0_0_cur_i] <= 0;
deflate0_0_cur_i <= (deflate0_0_cur_i + 1);
end
else begin
deflate0_0_numCodeLength <= 288;
deflate0_0_method <= 3;
deflate0_0_cur_HF1 <= 0;
deflate0_0_state <= 5'b00111;
end
end
else begin
case (deflate0_0_state)
5'b00101: begin
$write("DISTTREE");
$write("\n");
for (dist_i=0; dist_i<32; dist_i=dist_i+1) begin
deflate0_0_codeLength[dist_i] <= deflate0_0_distanceLength[dist_i];
end
deflate0_0_numCodeLength <= 32;
deflate0_0_method <= 4;
deflate0_0_cur_HF1 <= 0;
deflate0_0_state <= 5'b00111;
end
5'b00100: begin
if ((deflate0_0_howOften != 0)) begin
deflate0_0_codeLength[deflate0_0_numCodeLength] <= deflate0_0_lastToken;
deflate0_0_howOften <= (deflate0_0_howOften - 1);
deflate0_0_numCodeLength <= (deflate0_0_numCodeLength + 1);
end
else if ((deflate0_0_numCodeLength < (deflate0_0_numLiterals + deflate0_0_numDistance))) begin
deflate0_0_cur_next <= 0;
deflate0_0_state <= 5'b10011;
end
else begin
deflate0_0_state <= 5'b00011;
end
end
5'b00111: begin
if ((deflate0_0_cur_HF1 < 16)) begin
deflate0_0_bitLengthCount[deflate0_0_cur_HF1] <= 0;
end
if ((deflate0_0_cur_HF1 < 128)) begin
deflate0_0_d_leaves[deflate0_0_cur_HF1] <= 0;
end
if (((deflate0_0_method != 4) && (deflate0_0_cur_HF1 < 512))) begin
deflate0_0_lwaddr <= deflate0_0_cur_HF1;
deflate0_0_wleaf <= 0;
end
limit = 512;
if ((deflate0_0_method == 4)) begin
limit = 128;
end
if ((deflate0_0_cur_HF1 < limit)) begin
deflate0_0_cur_HF1 <= (deflate0_0_cur_HF1 + 1);
end
else begin
$write("DID HF1 INIT");
$write("\n");
deflate0_0_cur_i <= 0;
deflate0_0_state <= 5'b01000;
end
end
5'b01000: begin
if ((deflate0_0_cur_i < deflate0_0_numCodeLength)) begin
j = deflate0_0_codeLength[deflate0_0_cur_i];
deflate0_0_bitLengthCount[j] <= (deflate0_0_bitLengthCount[j] + 1);
deflate0_0_cur_i <= (deflate0_0_cur_i + 1);
end
else begin
deflate0_0_bitLengthCount[0] <= 0;
deflate0_0_state <= 5'b01001;
deflate0_0_cur_i <= 1;
if ((deflate0_0_method == 4)) begin
deflate0_0_d_maxBits <= 0;
end
else begin
deflate0_0_maxBits <= 0;
end
deflate0_0_minBits <= 15;
end
end
5'b01001: begin
if ((deflate0_0_cur_i <= 15)) begin
if ((deflate0_0_bitLengthCount[deflate0_0_cur_i] != 0)) begin
if ((deflate0_0_cur_i < deflate0_0_minBits)) begin
deflate0_0_minBits <= deflate0_0_cur_i;
end
if ((deflate0_0_method == 4)) begin
if ((deflate0_0_cur_i > deflate0_0_d_maxBits)) begin
deflate0_0_d_maxBits <= deflate0_0_cur_i;
end
end
else begin
if ((deflate0_0_cur_i > deflate0_0_maxBits)) begin
deflate0_0_maxBits <= deflate0_0_cur_i;
end
end
end
deflate0_0_cur_i <= (deflate0_0_cur_i + 1);
end
else begin
$write("%h", deflate0_0_minBits);
$write(" ");
$write("%h", deflate0_0_maxBits);
$write("\n");
t = 10;
if ((deflate0_0_method == 4)) begin
if ((t > deflate0_0_d_maxBits)) begin
t = deflate0_0_d_maxBits;
end
deflate0_0_d_instantMaxBit <= t;
deflate0_0_d_instantMask <= ((1 << t) - 1);
end
else begin
if ((t > deflate0_0_maxBits)) begin
t = deflate0_0_maxBits;
end
deflate0_0_instantMaxBit <= t;
deflate0_0_instantMask <= ((1 << t) - 1);
end
$write("%0d", ((1 << t) - 1));
$write("\n");
deflate0_0_state <= 5'b01010;
deflate0_0_cur_i <= deflate0_0_minBits;
deflate0_0_code <= 0;
for (hf2_i=0; hf2_i<15; hf2_i=hf2_i+1) begin
deflate0_0_nextCode[hf2_i] <= 0;
end
$write("to HF3");
$write("\n");
end
end
5'b01010: begin
amb = deflate0_0_maxBits;
if ((deflate0_0_method == 4)) begin
amb = deflate0_0_d_maxBits;
end
if ((deflate0_0_cur_i <= amb)) begin
ncode = ((deflate0_0_code + deflate0_0_bitLengthCount[($signed({1'b0, deflate0_0_cur_i}) - 1)]) << 1);
deflate0_0_code <= ncode;
deflate0_0_nextCode[deflate0_0_cur_i] <= ncode;
deflate0_0_cur_i <= (deflate0_0_cur_i + 1);
end
else begin
deflate0_0_state <= 5'b01011;
deflate0_0_cur_i <= 0;
deflate0_0_spread_i <= 0;
$write("to HF4");
$write("\n");
end
end
5'b01100: begin
canonical = deflate0_0_nextCode[deflate0_0_bits];
deflate0_0_nextCode[deflate0_0_bits] <= (deflate0_0_nextCode[deflate0_0_bits] + 1);
if ((deflate0_0_bits > 15)) begin
$finish;
end
deflate0_0_reverse <= MYHDL188_rev_bits(canonical, deflate0_0_bits);
deflate0_0_leaf <= MYHDL189_makeLeaf(deflate0_0_spread_i, deflate0_0_bits);
deflate0_0_state <= 5'b01101;
end
5'b01101: begin
if ((deflate0_0_method == 4)) begin
deflate0_0_d_leaves[deflate0_0_reverse] <= deflate0_0_leaf;
if ((deflate0_0_bits <= deflate0_0_d_instantMaxBit)) begin
if (((deflate0_0_reverse + (1 << deflate0_0_bits)) <= deflate0_0_d_instantMask)) begin
deflate0_0_step <= (1 << deflate0_0_bits);
deflate0_0_spread <= (deflate0_0_reverse + (1 << deflate0_0_bits));
deflate0_0_state <= 5'b10010;
end
else begin
deflate0_0_spread_i <= (deflate0_0_spread_i + 1);
deflate0_0_state <= 5'b01011;
end
end
else begin
deflate0_0_state <= 5'b01011;
deflate0_0_spread_i <= (deflate0_0_spread_i + 1);
end
end
else begin
deflate0_0_wleaf <= deflate0_0_leaf;
deflate0_0_lwaddr <= deflate0_0_reverse;
deflate0_0_code_bits[deflate0_0_spread_i] <= deflate0_0_reverse;
if ((deflate0_0_bits <= deflate0_0_instantMaxBit)) begin
if (((deflate0_0_reverse + (1 << deflate0_0_bits)) <= deflate0_0_instantMask)) begin
deflate0_0_step <= (1 << deflate0_0_bits);
deflate0_0_spread <= (deflate0_0_reverse + (1 << deflate0_0_bits));
deflate0_0_state <= 5'b10010;
end
else begin
deflate0_0_spread_i <= (deflate0_0_spread_i + 1);
deflate0_0_state <= 5'b01011;
end
end
else begin
deflate0_0_spread_i <= (deflate0_0_spread_i + 1);
deflate0_0_state <= 5'b01011;
end
end
end
5'b01011: begin
if ((deflate0_0_spread_i < deflate0_0_numCodeLength)) begin
bits_next = deflate0_0_codeLength[deflate0_0_spread_i];
if ((bits_next != 0)) begin
deflate0_0_bits <= bits_next;
deflate0_0_state <= 5'b01100;
end
else begin
deflate0_0_spread_i <= (deflate0_0_spread_i + 1);
end
end
else begin
if (deflate0_0_do_compress) begin
deflate0_0_state <= 5'b10110;
deflate0_0_cur_cstatic <= 0;
end
else if ((deflate0_0_method == 3)) begin
deflate0_0_state <= 5'b00101;
end
else if ((deflate0_0_method == 4)) begin
$write("DEFLATE m2!");
$write("\n");
deflate0_0_state <= 5'b10011;
end
else if ((deflate0_0_method == 2)) begin
deflate0_0_numCodeLength <= 0;
deflate0_0_state <= 5'b10011;
end
else begin
deflate0_0_state <= 5'b10011;
end
deflate0_0_cur_next <= 0;
deflate0_0_cur_i <= 0;
end
end
5'b10010: begin
if ((deflate0_0_method == 4)) begin
deflate0_0_d_leaves[deflate0_0_spread] <= MYHDL190_makeLeaf(deflate0_0_spread_i, deflate0_0_codeLength[deflate0_0_spread_i]);
end
else begin
deflate0_0_lwaddr <= deflate0_0_spread;
deflate0_0_wleaf <= MYHDL191_makeLeaf(deflate0_0_spread_i, deflate0_0_codeLength[deflate0_0_spread_i]);
end
aim = deflate0_0_instantMask;
if ((deflate0_0_method == 4)) begin
aim = deflate0_0_d_instantMask;
end
if (($signed({1'b0, deflate0_0_spread}) > ($signed({1'b0, aim}) - $signed({1'b0, deflate0_0_step})))) begin
deflate0_0_spread_i <= (deflate0_0_spread_i + 1);
deflate0_0_state <= 5'b01011;
end
else begin
deflate0_0_spread <= (deflate0_0_spread + deflate0_0_step);
end
end
5'b10011: begin
if ((!deflate0_0_filled)) begin
deflate0_0_filled <= 1'b1;
end
else if ((deflate0_0_nb < 4)) begin
// pass
end
else if ((deflate0_0_cur_next == 0)) begin
cto = MYHDL192_get4(0, deflate0_0_maxBits);
deflate0_0_cur_next <= 1;
mask = ((1 << deflate0_0_instantMaxBit) - 1);
deflate0_0_leaf <= deflate0_0_leaves[(cto & mask)];
end
else begin
if ((MYHDL193_get_bits(deflate0_0_leaf) < 1)) begin
$write("< 1 bits: ");
$write("\n");
$finish;
end
MYHDL195_adv(MYHDL194_get_bits(deflate0_0_leaf));
if ((MYHDL196_get_code(deflate0_0_leaf) == 0)) begin
$write("leaf 0");
$write("\n");
end
deflate0_0_code <= MYHDL197_get_code(deflate0_0_leaf);
if ((deflate0_0_method == 2)) begin
deflate0_0_state <= 5'b00011;
end
else begin
deflate0_0_state <= 5'b10100;
end
end
end
5'b01111: begin
if ((!deflate0_0_filled)) begin
deflate0_0_filled <= 1'b1;
end
else if ((deflate0_0_nb < 4)) begin
// pass
end
else begin
token = (deflate0_0_code - 257);
case (token)
0: extraLength = 0;
1: extraLength = 0;
2: extraLength = 0;
3: extraLength = 0;
4: extraLength = 0;
5: extraLength = 0;
6: extraLength = 0;
7: extraLength = 0;
8: extraLength = 1;
9: extraLength = 1;
10: extraLength = 1;
11: extraLength = 1;
12: extraLength = 2;
13: extraLength = 2;
14: extraLength = 2;
15: extraLength = 2;
16: extraLength = 3;
17: extraLength = 3;
18: extraLength = 3;
19: extraLength = 3;
20: extraLength = 4;
21: extraLength = 4;
22: extraLength = 4;
23: extraLength = 4;
24: extraLength = 5;
25: extraLength = 5;
26: extraLength = 5;
27: extraLength = 5;
default: extraLength = 0;
endcase
cto = MYHDL198_get4(extraLength, deflate0_0_d_maxBits);
mask = ((1 << deflate0_0_d_instantMaxBit) - 1);
deflate0_0_leaf <= deflate0_0_d_leaves[(cto & mask)];
deflate0_0_state <= 5'b10000;
end
end
5'b10000: begin
if ((MYHDL199_get_bits(deflate0_0_leaf) == 0)) begin
$finish;
end
token = (deflate0_0_code - 257);
case (token)
0: tlength = 3;
1: tlength = 4;
2: tlength = 5;
3: tlength = 6;
4: tlength = 7;
5: tlength = 8;
6: tlength = 9;
7: tlength = 10;
8: tlength = 11;
9: tlength = 13;
10: tlength = 15;
11: tlength = 17;
12: tlength = 19;
13: tlength = 23;
14: tlength = 27;
15: tlength = 31;
16: tlength = 35;
17: tlength = 43;
18: tlength = 51;
19: tlength = 59;
20: tlength = 67;
21: tlength = 83;
22: tlength = 99;
23: tlength = 115;
24: tlength = 131;
25: tlength = 163;
26: tlength = 195;
27: tlength = 227;
default: tlength = 258;
endcase
case (token)
0: extraLength = 0;
1: extraLength = 0;
2: extraLength = 0;
3: extraLength = 0;
4: extraLength = 0;
5: extraLength = 0;
6: extraLength = 0;
7: extraLength = 0;
8: extraLength = 1;
9: extraLength = 1;
10: extraLength = 1;
11: extraLength = 1;
12: extraLength = 2;
13: extraLength = 2;
14: extraLength = 2;
15: extraLength = 2;
16: extraLength = 3;
17: extraLength = 3;
18: extraLength = 3;
19: extraLength = 3;
20: extraLength = 4;
21: extraLength = 4;
22: extraLength = 4;
23: extraLength = 4;
24: extraLength = 5;
25: extraLength = 5;
26: extraLength = 5;
27: extraLength = 5;
default: extraLength = 0;
endcase
tlength = tlength + MYHDL200_get4(0, extraLength);
distanceCode = MYHDL201_get_code(deflate0_0_leaf);
case (distanceCode)
0: distance = 1;
1: distance = 2;
2: distance = 3;
3: distance = 4;
4: distance = 5;
5: distance = 7;
6: distance = 9;
7: distance = 13;
8: distance = 17;
9: distance = 25;
10: distance = 33;
11: distance = 49;
12: distance = 65;
13: distance = 97;
14: distance = 129;
15: distance = 193;
16: distance = 257;
17: distance = 385;
18: distance = 513;
19: distance = 769;
20: distance = 1025;
21: distance = 1537;
22: distance = 2049;
23: distance = 3073;
24: distance = 4097;
25: distance = 6145;
26: distance = 8193;
27: distance = 12289;
28: distance = 16385;
default: distance = 24577;
endcase
case ($signed(distanceCode >>> 1))
0: moreBits = 0;
1: moreBits = 0;
2: moreBits = 1;
3: moreBits = 2;
4: moreBits = 3;
5: moreBits = 4;
6: moreBits = 5;
7: moreBits = 6;
8: moreBits = 7;
9: moreBits = 8;
10: moreBits = 9;
11: moreBits = 10;
12: moreBits = 11;
13: moreBits = 12;
default: moreBits = 13;
endcase
mored = MYHDL203_get4((extraLength + MYHDL202_get_bits(deflate0_0_leaf)), moreBits);
distance = distance + mored;
MYHDL205_adv(((moreBits + extraLength) + MYHDL204_get_bits(deflate0_0_leaf)));
deflate0_0_offset <= ($signed({1'b0, deflate0_0_do}) - distance);
deflate0_0_length <= tlength;
deflate0_0_cur_i <= 0;
deflate0_0_oraddr <= deflate0_0_offset;
deflate0_0_state <= 5'b10101;
end
default: begin
if ((deflate0_0_state == 5'b10100)) begin
if ((!deflate0_0_filled)) begin
deflate0_0_filled <= 1'b1;
end
else if ((deflate0_0_nb < 4)) begin
// pass
end
else if (($signed({1'b0, deflate0_0_di}) > ($signed({1'b0, deflate0_0_isize}) - 3))) begin
deflate0_0_state <= 5'b00000;
o_done <= 1'b1;
$write("NO EOF ");
$write(" ");
$write("%h", deflate0_0_di);
$write("\n");
$finish;
end
else if ((deflate0_0_code == 256)) begin
$write("EOF:");
$write(" ");
$write("%h", deflate0_0_di);
$write(" ");
$write("%h", deflate0_0_do);
$write("\n");
if ((!deflate0_0_final)) begin
deflate0_0_state <= 5'b00001;
end
else begin
o_done <= 1'b1;
o_oprogress <= deflate0_0_do;
deflate0_0_state <= 5'b00000;
end
end
else begin
if ((deflate0_0_code < 256)) begin
deflate0_0_oaddr <= deflate0_0_do;
deflate0_0_obyte <= deflate0_0_code;
o_oprogress <= (deflate0_0_do + 1);
deflate0_0_do <= (deflate0_0_do + 1);
deflate0_0_cur_next <= 0;
deflate0_0_state <= 5'b10011;
end
else if ((deflate0_0_code == 300)) begin
$finish;
end
else begin
if (deflate0_0_static) begin
token = (deflate0_0_code - 257);
case (token)
0: tlength = 3;
1: tlength = 4;
2: tlength = 5;
3: tlength = 6;
4: tlength = 7;
5: tlength = 8;
6: tlength = 9;
7: tlength = 10;
8: tlength = 11;
9: tlength = 13;
10: tlength = 15;
11: tlength = 17;
12: tlength = 19;
13: tlength = 23;
14: tlength = 27;
15: tlength = 31;
16: tlength = 35;
17: tlength = 43;
18: tlength = 51;
19: tlength = 59;
20: tlength = 67;
21: tlength = 83;
22: tlength = 99;
23: tlength = 115;
24: tlength = 131;
25: tlength = 163;
26: tlength = 195;
27: tlength = 227;
default: tlength = 258;
endcase
case (token)
0: extraLength = 0;
1: extraLength = 0;
2: extraLength = 0;
3: extraLength = 0;
4: extraLength = 0;
5: extraLength = 0;
6: extraLength = 0;
7: extraLength = 0;
8: extraLength = 1;
9: extraLength = 1;
10: extraLength = 1;
11: extraLength = 1;
12: extraLength = 2;
13: extraLength = 2;
14: extraLength = 2;
15: extraLength = 2;
16: extraLength = 3;
17: extraLength = 3;
18: extraLength = 3;
19: extraLength = 3;
20: extraLength = 4;
21: extraLength = 4;
22: extraLength = 4;
23: extraLength = 4;
24: extraLength = 5;
25: extraLength = 5;
26: extraLength = 5;
27: extraLength = 5;
default: extraLength = 0;
endcase
tlength = tlength + MYHDL206_get4(0, extraLength);
t = MYHDL207_get4(extraLength, 5);
distanceCode = MYHDL208_rev_bits(t, 5);
case (distanceCode)
0: distance = 1;
1: distance = 2;
2: distance = 3;
3: distance = 4;
4: distance = 5;
5: distance = 7;
6: distance = 9;
7: distance = 13;
8: distance = 17;
9: distance = 25;
10: distance = 33;
11: distance = 49;
12: distance = 65;
13: distance = 97;
14: distance = 129;
15: distance = 193;
16: distance = 257;
17: distance = 385;
18: distance = 513;
19: distance = 769;
20: distance = 1025;
21: distance = 1537;
22: distance = 2049;
23: distance = 3073;
24: distance = 4097;
25: distance = 6145;
26: distance = 8193;
27: distance = 12289;
28: distance = 16385;
default: distance = 24577;
endcase
case ($signed(distanceCode >>> 1))
0: moreBits = 0;
1: moreBits = 0;
2: moreBits = 1;
3: moreBits = 2;
4: moreBits = 3;
5: moreBits = 4;
6: moreBits = 5;
7: moreBits = 6;
8: moreBits = 7;
9: moreBits = 8;
10: moreBits = 9;
11: moreBits = 10;
12: moreBits = 11;
13: moreBits = 12;
default: moreBits = 13;
endcase
distance = distance + MYHDL209_get4((extraLength + 5), moreBits);
MYHDL210_adv(((extraLength + 5) + moreBits));
deflate0_0_offset <= ($signed({1'b0, deflate0_0_do}) - distance);
deflate0_0_length <= tlength;
deflate0_0_cur_i <= 0;
deflate0_0_oraddr <= deflate0_0_offset;
deflate0_0_state <= 5'b10101;
end
else begin
deflate0_0_state <= 5'b01111;
end
end
deflate0_0_cur_next <= 0;
end
end
else begin
if ((deflate0_0_state == 5'b10101)) begin
if ((!deflate0_0_filled)) begin
deflate0_0_filled <= 1'b1;
end
else if ((deflate0_0_nb < 4)) begin
// pass
end
else if ((deflate0_0_method == 0)) begin
if ((deflate0_0_cur_i < deflate0_0_length)) begin
deflate0_0_oaddr <= deflate0_0_do;
deflate0_0_obyte <= deflate0_0_b3;
MYHDL211_adv(8);
deflate0_0_cur_i <= (deflate0_0_cur_i + 1);
deflate0_0_do <= (deflate0_0_do + 1);
o_oprogress <= (deflate0_0_do + 1);
end
else if ((!deflate0_0_final)) begin
deflate0_0_state <= 5'b00001;
end
else begin
o_oprogress <= deflate0_0_do;
o_done <= 1'b1;
deflate0_0_state <= 5'b00000;
end
end
else if ((deflate0_0_cur_i < (deflate0_0_length + 1))) begin
deflate0_0_oraddr <= (deflate0_0_offset + deflate0_0_cur_i);
if ((deflate0_0_cur_i == 1)) begin
deflate0_0_copy1 <= deflate0_0_orbyte;
end
if ((deflate0_0_cur_i > 1)) begin
if (((deflate0_0_offset + deflate0_0_cur_i) == (deflate0_0_do + 1))) begin
deflate0_0_obyte <= deflate0_0_copy1;
end
else begin
deflate0_0_obyte <= deflate0_0_orbyte;
end
deflate0_0_oaddr <= deflate0_0_do;
o_oprogress <= (deflate0_0_do + 1);
deflate0_0_do <= (deflate0_0_do + 1);
end
deflate0_0_cur_i <= (deflate0_0_cur_i + 1);
end
else begin
deflate0_0_oaddr <= deflate0_0_do;
if (((deflate0_0_offset + deflate0_0_cur_i) == (deflate0_0_do + 1))) begin
deflate0_0_obyte <= deflate0_0_copy1;
end
else begin
deflate0_0_obyte <= deflate0_0_orbyte;
end
deflate0_0_do <= (deflate0_0_do + 1);
o_oprogress <= (deflate0_0_do + 1);
deflate0_0_cur_next <= 0;
deflate0_0_state <= 5'b10011;
end
end
else begin
$write("unknown state?!");
$write("\n");
deflate0_0_state <= 5'b00000;
end
end
end
endcase
end
end
endcase
end
end
 
 
always @(posedge i_clk) begin: TEST_FAST_BENCH_DEFLATE0_0_FILL_BUF
if ((!reset)) begin
$write("FILL RESET");
$write("\n");
deflate0_0_nb <= 0;
deflate0_0_b1 <= 0;
deflate0_0_b2 <= 0;
deflate0_0_b3 <= 0;
deflate0_0_b4 <= 0;
end
else begin
if ((deflate0_0_isize < 4)) begin
// pass
end
else if (((i_mode == 4) || (i_mode == 5))) begin
deflate0_0_nb <= 0;
end
else begin
deflate0_0_nb <= 4;
deflate0_0_b1 <= deflate0_0_iram[(deflate0_0_di & 127)];
deflate0_0_b2 <= deflate0_0_iram[((deflate0_0_di + 1) & 127)];
deflate0_0_b3 <= deflate0_0_iram[((deflate0_0_di + 2) & 127)];
deflate0_0_b4 <= deflate0_0_iram[((deflate0_0_di + 3) & 127)];
end
end
end
 
 
always @(posedge i_clk) begin: TEST_FAST_BENCH_DEFLATE0_0_ORAMWRITE
deflate0_0_oram[deflate0_0_oaddr] <= deflate0_0_obyte;
deflate0_0_leaves[deflate0_0_lwaddr] <= deflate0_0_wleaf;
end
 
 
always @(posedge i_clk) begin: TEST_FAST_BENCH_DEFLATE0_0_ORAMREAD
deflate0_0_orbyte <= deflate0_0_oram[deflate0_0_oraddr];
end
 
 
always @(posedge i_clk) begin: TEST_FAST_BENCH_COUNT
if ((scounter == 0)) begin
counter <= (counter + 1);
end
scounter <= (scounter + 1);
end
 
 
always @(posedge i_clk) begin: TEST_FAST_BENCH_LOGIC
integer ud1;
integer ud2;
if ((tstate == 5'b00000)) begin
$write("RESET");
$write(" ");
$write("%h", counter);
$write("\n");
reset <= 0;
led0_g <= 0;
led1_b <= 0;
led2_r <= 0;
tbi <= 0;
tstate <= 5'b00001;
end
else if (((1 > 2) && (scounter != 0))) begin
// pass
end
else if ((tstate == 5'b00001)) begin
if ((tbi < 1)) begin
tbi <= (tbi + 1);
end
else begin
reset <= 1;
tstate <= 5'b00010;
tbi <= 0;
end
end
else if ((tstate == 5'b10001)) begin
led0_g <= 1;
led2_r <= 0;
led1_b <= 0;
end
else if ((tstate == 5'b10000)) begin
led0_g <= (!led0_g);
led2_r <= (!led2_r);
led1_b <= o_done;
end
else if ((tstate == 5'b00010)) begin
if ((tbi < 41)) begin
o_led <= tbi;
led1_b <= o_done;
led2_r <= (!led2_r);
i_mode <= 2;
case (tbi)
0: i_data <= 120;
1: i_data <= 156;
2: i_data <= 83;
3: i_data <= 80;
4: i_data <= 80;
5: i_data <= 240;
6: i_data <= 72;
7: i_data <= 205;
8: i_data <= 201;
9: i_data <= 201;
10: i_data <= 87;
11: i_data <= 8;
12: i_data <= 207;
13: i_data <= 47;
14: i_data <= 202;
15: i_data <= 73;
16: i_data <= 81;
17: i_data <= 84;
18: i_data <= 48;
19: i_data <= 80;
20: i_data <= 128;
21: i_data <= 1;
22: i_data <= 20;
23: i_data <= 97;
24: i_data <= 67;
25: i_data <= 236;
26: i_data <= 194;
27: i_data <= 70;
28: i_data <= 216;
29: i_data <= 133;
30: i_data <= 141;
31: i_data <= 177;
32: i_data <= 11;
33: i_data <= 155;
34: i_data <= 128;
35: i_data <= 133;
36: i_data <= 0;
37: i_data <= 119;
38: i_data <= 164;
39: i_data <= 28;
default: i_data <= 76;
endcase
i_addr <= tbi;
tbi <= (tbi + 1);
end
else begin
i_mode <= 0;
led2_r <= 0;
tstate <= 5'b00011;
end
end
else if ((tstate == 5'b00011)) begin
i_mode <= 5;
tstate <= 5'b00100;
end
else if ((tstate == 5'b00100)) begin
led1_b <= (!led1_b);
i_mode <= 0;
if (((i_mode == 0) && o_done)) begin
$write("result len");
$write(" ");
$write("%h", o_oprogress);
$write("\n");
if ((o_oprogress == 79)) begin
tstate <= 5'b10001;
end
resultlen <= o_oprogress;
tbi <= 0;
i_addr <= 0;
i_mode <= 3;
wtick <= 1'b1;
tstate <= 5'b00101;
// if o_oprogress == 0x4F:
// tstate.next = tb_state.HALT
// else:
// tstate.next = tb_state.FAIL
end
end
else if ((tstate == 5'b00101)) begin
led1_b <= 0;
o_led <= tbi;
// Note that the read can also be pipelined in a tight loop
// without the WTICK delay, but this will not work with
// SLOWDOWN > 1
if (wtick) begin
wtick <= 1'b0;
end
else if ((tbi < 114)) begin
led2_r <= (!led2_r);
case (tbi)
0: ud1 = 32;
1: ud1 = 32;
2: ud1 = 32;
3: ud1 = 72;
4: ud1 = 101;
5: ud1 = 108;
6: ud1 = 108;
7: ud1 = 111;
8: ud1 = 32;
9: ud1 = 87;
10: ud1 = 111;
11: ud1 = 114;
12: ud1 = 108;
13: ud1 = 100;
14: ud1 = 33;
15: ud1 = 32;
16: ud1 = 48;
17: ud1 = 32;
18: ud1 = 32;
19: ud1 = 32;
20: ud1 = 32;
21: ud1 = 32;
22: ud1 = 32;
23: ud1 = 32;
24: ud1 = 32;
25: ud1 = 32;
26: ud1 = 72;
27: ud1 = 101;
28: ud1 = 108;
29: ud1 = 108;
30: ud1 = 111;
31: ud1 = 32;
32: ud1 = 87;
33: ud1 = 111;
34: ud1 = 114;
35: ud1 = 108;
36: ud1 = 100;
37: ud1 = 33;
38: ud1 = 32;
39: ud1 = 49;
40: ud1 = 32;
41: ud1 = 32;
42: ud1 = 32;
43: ud1 = 32;
44: ud1 = 32;
45: ud1 = 32;
46: ud1 = 32;
47: ud1 = 32;
48: ud1 = 32;
49: ud1 = 72;
50: ud1 = 101;
51: ud1 = 108;
52: ud1 = 108;
53: ud1 = 111;
54: ud1 = 32;
55: ud1 = 87;
56: ud1 = 111;
57: ud1 = 114;
58: ud1 = 108;
59: ud1 = 100;
60: ud1 = 33;
61: ud1 = 32;
62: ud1 = 50;
63: ud1 = 32;
64: ud1 = 32;
65: ud1 = 32;
66: ud1 = 32;
67: ud1 = 32;
68: ud1 = 32;
69: ud1 = 32;
70: ud1 = 32;
71: ud1 = 32;
72: ud1 = 72;
73: ud1 = 101;
74: ud1 = 108;
75: ud1 = 108;
76: ud1 = 111;
77: ud1 = 32;
78: ud1 = 87;
79: ud1 = 111;
80: ud1 = 114;
81: ud1 = 108;
82: ud1 = 100;
83: ud1 = 33;
84: ud1 = 32;
85: ud1 = 51;
86: ud1 = 32;
87: ud1 = 32;
88: ud1 = 32;
89: ud1 = 32;
90: ud1 = 32;
91: ud1 = 32;
92: ud1 = 32;
93: ud1 = 32;
94: ud1 = 32;
95: ud1 = 72;
96: ud1 = 101;
97: ud1 = 108;
98: ud1 = 108;
99: ud1 = 111;
100: ud1 = 32;
101: ud1 = 87;
102: ud1 = 111;
103: ud1 = 114;
104: ud1 = 108;
105: ud1 = 100;
106: ud1 = 33;
107: ud1 = 32;
108: ud1 = 52;
109: ud1 = 32;
110: ud1 = 32;
111: ud1 = 32;
112: ud1 = 32;
default: ud1 = 32;
endcase
if (($signed({1'b0, o_byte}) != ud1)) begin
i_mode <= 0;
$write("FAIL");
$write(" ");
$write("%0d", 114);
$write(" ");
$write("%h", tbi);
$write(" ");
$write("%h", o_byte);
$write(" ");
$write("%0d", ud1);
$write("\n");
tstate <= 5'b10000;
$finish;
end
else begin
// pass
end
i_addr <= (tbi + 1);
tbi <= (tbi + 1);
wtick <= 1'b1;
end
else begin
$write("%0d", 114);
$write("\n");
$write("DECOMPRESS test OK!, pausing");
$write(" ");
$write("%h", tbi);
$write("\n");
i_mode <= 0;
tbi <= 0;
tstate <= 5'b00110;
resume <= 1;
end
end
else if ((tstate == 5'b00110)) begin
led2_r <= 0;
if ((resume == 0)) begin
$write("--------------COMPRESS-------------");
$write("\n");
tbi <= 0;
led0_g <= 0;
tstate <= 5'b00111;
end
else begin
led2_r <= (!led2_r);
resume <= (resume + 1);
end
end
else if ((tstate == 5'b00111)) begin
o_led <= tbi;
if ((tbi < 114)) begin
led2_r <= 0;
led1_b <= (!led1_b);
i_mode <= 2;
case (tbi)
0: i_data <= 32;
1: i_data <= 32;
2: i_data <= 32;
3: i_data <= 72;
4: i_data <= 101;
5: i_data <= 108;
6: i_data <= 108;
7: i_data <= 111;
8: i_data <= 32;
9: i_data <= 87;
10: i_data <= 111;
11: i_data <= 114;
12: i_data <= 108;
13: i_data <= 100;
14: i_data <= 33;
15: i_data <= 32;
16: i_data <= 48;
17: i_data <= 32;
18: i_data <= 32;
19: i_data <= 32;
20: i_data <= 32;
21: i_data <= 32;
22: i_data <= 32;
23: i_data <= 32;
24: i_data <= 32;
25: i_data <= 32;
26: i_data <= 72;
27: i_data <= 101;
28: i_data <= 108;
29: i_data <= 108;
30: i_data <= 111;
31: i_data <= 32;
32: i_data <= 87;
33: i_data <= 111;
34: i_data <= 114;
35: i_data <= 108;
36: i_data <= 100;
37: i_data <= 33;
38: i_data <= 32;
39: i_data <= 49;
40: i_data <= 32;
41: i_data <= 32;
42: i_data <= 32;
43: i_data <= 32;
44: i_data <= 32;
45: i_data <= 32;
46: i_data <= 32;
47: i_data <= 32;
48: i_data <= 32;
49: i_data <= 72;
50: i_data <= 101;
51: i_data <= 108;
52: i_data <= 108;
53: i_data <= 111;
54: i_data <= 32;
55: i_data <= 87;
56: i_data <= 111;
57: i_data <= 114;
58: i_data <= 108;
59: i_data <= 100;
60: i_data <= 33;
61: i_data <= 32;
62: i_data <= 50;
63: i_data <= 32;
64: i_data <= 32;
65: i_data <= 32;
66: i_data <= 32;
67: i_data <= 32;
68: i_data <= 32;
69: i_data <= 32;
70: i_data <= 32;
71: i_data <= 32;
72: i_data <= 72;
73: i_data <= 101;
74: i_data <= 108;
75: i_data <= 108;
76: i_data <= 111;
77: i_data <= 32;
78: i_data <= 87;
79: i_data <= 111;
80: i_data <= 114;
81: i_data <= 108;
82: i_data <= 100;
83: i_data <= 33;
84: i_data <= 32;
85: i_data <= 51;
86: i_data <= 32;
87: i_data <= 32;
88: i_data <= 32;
89: i_data <= 32;
90: i_data <= 32;
91: i_data <= 32;
92: i_data <= 32;
93: i_data <= 32;
94: i_data <= 32;
95: i_data <= 72;
96: i_data <= 101;
97: i_data <= 108;
98: i_data <= 108;
99: i_data <= 111;
100: i_data <= 32;
101: i_data <= 87;
102: i_data <= 111;
103: i_data <= 114;
104: i_data <= 108;
105: i_data <= 100;
106: i_data <= 33;
107: i_data <= 32;
108: i_data <= 52;
109: i_data <= 32;
110: i_data <= 32;
111: i_data <= 32;
112: i_data <= 32;
default: i_data <= 32;
endcase
i_addr <= tbi;
tbi <= (tbi + 1);
end
else begin
$write("wrote bytes to compress");
$write(" ");
$write("%h", tbi);
$write("\n");
i_mode <= 0;
tstate <= 5'b01000;
end
end
else if ((tstate == 5'b01000)) begin
i_mode <= 4;
tstate <= 5'b01001;
end
else if ((tstate == 5'b01001)) begin
led2_r <= (!led2_r);
if ((i_mode == 4)) begin
$write("WAIT COMPRESS");
$write("\n");
i_mode <= 0;
led1_b <= 0;
end
else if (o_done) begin
$write("result len");
$write(" ");
$write("%h", o_oprogress);
$write("\n");
resultlen <= o_oprogress;
tbi <= 0;
i_addr <= 0;
i_mode <= 3;
tstate <= 5'b01010;
wtick <= 1'b1;
end
end
else if ((tstate == 5'b01010)) begin
led2_r <= 0;
o_led <= tbi;
if (wtick) begin
if ((tbi > 0)) begin
i_mode <= 2;
i_data <= copy;
i_addr <= (tbi - 1);
end
wtick <= 1'b0;
tbi <= (tbi + 1);
end
else if ((tbi < resultlen)) begin
i_mode <= 3;
led1_b <= (!led1_b);
i_addr <= tbi;
copy <= o_byte;
wtick <= 1'b1;
end
else begin
$write("Compress output bytes copied to input");
$write(" ");
$write("%h", resultlen);
$write(" ");
$write("%0d", ($signed({1'b0, tbi}) - 1));
$write("\n");
i_mode <= 0;
tbi <= 0;
tstate <= 5'b01100;
end
end
else if ((tstate == 5'b01100)) begin
$write("start decompress of test compression");
$write("\n");
i_mode <= 5;
tstate <= 5'b01101;
end
else if ((tstate == 5'b01101)) begin
led2_r <= 0;
led1_b <= (!led1_b);
i_mode <= 0;
if (((i_mode == 0) && o_done)) begin
$write("DONE DECOMPRESS VERIFY");
$write(" ");
$write("%h", o_oprogress);
$write("\n");
tbi <= 0;
i_addr <= 0;
i_mode <= 3;
wtick <= 1'b1;
tstate <= 5'b01110;
end
end
else if ((tstate == 5'b01110)) begin
led1_b <= 0;
led2_r <= (!led2_r);
o_led <= tbi;
if (wtick) begin
wtick <= 1'b0;
end
else if ((tbi < 114)) begin
case (tbi)
0: ud2 = 32;
1: ud2 = 32;
2: ud2 = 32;
3: ud2 = 72;
4: ud2 = 101;
5: ud2 = 108;
6: ud2 = 108;
7: ud2 = 111;
8: ud2 = 32;
9: ud2 = 87;
10: ud2 = 111;
11: ud2 = 114;
12: ud2 = 108;
13: ud2 = 100;
14: ud2 = 33;
15: ud2 = 32;
16: ud2 = 48;
17: ud2 = 32;
18: ud2 = 32;
19: ud2 = 32;
20: ud2 = 32;
21: ud2 = 32;
22: ud2 = 32;
23: ud2 = 32;
24: ud2 = 32;
25: ud2 = 32;
26: ud2 = 72;
27: ud2 = 101;
28: ud2 = 108;
29: ud2 = 108;
30: ud2 = 111;
31: ud2 = 32;
32: ud2 = 87;
33: ud2 = 111;
34: ud2 = 114;
35: ud2 = 108;
36: ud2 = 100;
37: ud2 = 33;
38: ud2 = 32;
39: ud2 = 49;
40: ud2 = 32;
41: ud2 = 32;
42: ud2 = 32;
43: ud2 = 32;
44: ud2 = 32;
45: ud2 = 32;
46: ud2 = 32;
47: ud2 = 32;
48: ud2 = 32;
49: ud2 = 72;
50: ud2 = 101;
51: ud2 = 108;
52: ud2 = 108;
53: ud2 = 111;
54: ud2 = 32;
55: ud2 = 87;
56: ud2 = 111;
57: ud2 = 114;
58: ud2 = 108;
59: ud2 = 100;
60: ud2 = 33;
61: ud2 = 32;
62: ud2 = 50;
63: ud2 = 32;
64: ud2 = 32;
65: ud2 = 32;
66: ud2 = 32;
67: ud2 = 32;
68: ud2 = 32;
69: ud2 = 32;
70: ud2 = 32;
71: ud2 = 32;
72: ud2 = 72;
73: ud2 = 101;
74: ud2 = 108;
75: ud2 = 108;
76: ud2 = 111;
77: ud2 = 32;
78: ud2 = 87;
79: ud2 = 111;
80: ud2 = 114;
81: ud2 = 108;
82: ud2 = 100;
83: ud2 = 33;
84: ud2 = 32;
85: ud2 = 51;
86: ud2 = 32;
87: ud2 = 32;
88: ud2 = 32;
89: ud2 = 32;
90: ud2 = 32;
91: ud2 = 32;
92: ud2 = 32;
93: ud2 = 32;
94: ud2 = 32;
95: ud2 = 72;
96: ud2 = 101;
97: ud2 = 108;
98: ud2 = 108;
99: ud2 = 111;
100: ud2 = 32;
101: ud2 = 87;
102: ud2 = 111;
103: ud2 = 114;
104: ud2 = 108;
105: ud2 = 100;
106: ud2 = 33;
107: ud2 = 32;
108: ud2 = 52;
109: ud2 = 32;
110: ud2 = 32;
111: ud2 = 32;
112: ud2 = 32;
default: ud2 = 32;
endcase
if (($signed({1'b0, o_byte}) != ud2)) begin
tstate <= 5'b00000;
i_mode <= 0;
$write("FAIL");
$write(" ");
$write("%0d", 114);
$write(" ");
$write("%h", tbi);
$write(" ");
$write("%0d", ud2);
$write(" ");
$write("%h", o_byte);
$write("\n");
$finish;
tstate <= 5'b10000;
end
tbi <= (tbi + 1);
i_addr <= (tbi + 1);
wtick <= 1'b1;
end
else begin
$write("%0d", 114);
$write("\n");
$write("ALL OK!");
$write(" ");
$write("%h", tbi);
$write("\n");
led2_r <= 0;
i_mode <= 0;
resume <= 1;
if ((1 <= 4)) begin
$finish;
end
//
tstate <= 5'b01111;
end
end
else if ((tstate == 5'b01111)) begin
if ((resume == 0)) begin
$write("--------------RESET-------------");
$write("\n");
o_led <= (o_led + 1);
tstate <= 5'b00000;
end
else begin
led0_g <= (!led0_g);
resume <= (resume + 1);
end
end
// if now() > 50000:
// raise StopSimulation()
end
 
endmodule

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