URL
https://opencores.org/ocsvn/nanoblaze/nanoblaze/trunk
Subversion Repositories nanoblaze
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- This comparison shows the changes necessary to convert path
/
- from Rev 9 to Rev 10
- ↔ Reverse comparison
Rev 9 → Rev 10
/nanoblaze/trunk/Circuit/alu.vhd
0,0 → 1,160
--############################################################################## |
-- |
-- alu |
-- The processor ALU |
-- |
-- Arithmetic and logic unit. |
-- |
-------------------------------------------------------------------------------- |
-- |
-- Versions / Authors |
-- 1.0 Francois Corthay first implementation |
-- |
-- Provided under GNU LGPL licence: <http://www.gnu.org/copyleft/lesser.html> |
-- |
-- by the electronics group of "HES-SO//Valais Wallis", in Switzerland: |
-- <http://www.hevs.ch/en/rad-instituts/institut-systemes-industriels/>. |
-- |
-------------------------------------------------------------------------------- |
-- |
-- Hierarchy |
-- Used by "nanoblaze/nanoProcessor/aluAndRegisters". |
-- |
--############################################################################## |
|
LIBRARY ieee; |
USE ieee.std_logic_1164.all; |
USE ieee.numeric_std.all; |
|
ENTITY alu IS |
GENERIC( |
aluCodeBitNb : positive := 5; |
dataBitNb : positive := 8 |
); |
PORT( |
aluCode : IN std_ulogic_vector(aluCodeBitNb-1 DOWNTO 0); |
opA : IN signed(dataBitNb-1 DOWNTO 0); |
opB : IN signed(dataBitNb-1 DOWNTO 0); |
cIn : IN std_ulogic; |
aluOut : OUT signed(dataBitNb-1 DOWNTO 0); |
cOut : OUT std_ulogic; |
zero : OUT std_ulogic |
); |
END alu ; |
|
--============================================================================== |
|
ARCHITECTURE RTL OF alu IS |
|
signal aluCodeInt: unsigned(aluCode'range); |
signal aArith: signed(opA'high+1 downto 0); |
signal bArith: signed(opA'high+1 downto 0); |
signal cInArith: signed(1 downto 0); |
signal cInShift: std_ulogic; |
signal yArith: signed(aluOut'high+1 downto 0); |
signal aluOutInt: signed(aluOut'range); |
|
BEGIN |
------------------------------------------------------------------------------ |
-- clear aluCode don't care LSB for shifts |
aluCodeInt(aluCode'high downto 1) <= unsigned(aluCode(aluCode'high downto 1)); |
|
cleanupLsb: process(aluCode) |
begin |
if aluCode(aluCode'high) = '1' then |
aluCodeInt(0) <= '0'; |
else |
aluCodeInt(0) <= aluCode(0); |
end if; |
end process cleanupLsb; |
|
------------------------------------------------------------------------------ |
-- values for arithmetic operations |
aArith <= signed(resize(unsigned(opA), aArith'length)); |
bArith <= signed(resize(unsigned(opB), bArith'length)); |
cInArith(cInArith'high downto 1) <= (others => '0'); |
cInArith <= '0' & cIn; |
|
process(aluCode, cIn, opA) |
begin |
case aluCode(2 downto 1) is |
when "00" => cInShift <= cIn; |
when "01" => cInShift <= opA(opA'high); |
when "10" => cInShift <= opA(opA'low); |
when "11" => cInShift <= aluCode(0); |
when others => cInShift <= '-'; |
end case; |
end process; |
|
------------------------------------------------------------------------------ |
-- alu operations |
aluOperation: process( |
aluCodeInt, |
opA, opB, |
aArith, bArith, cInArith, |
cInShift, |
yArith |
) |
variable xorAcc: std_ulogic; |
begin |
yArith <= (others => '-'); |
cOut <= '-'; |
aluOutInt <= (others => '-'); |
case to_integer(aluCodeInt) is |
when 0 => -- LOAD sX, kk |
aluOutInt <= opB; |
when 2 => -- INPUT sX, pp |
aluOutInt <= opB; |
when 3 => -- FETCH sX, ss |
aluOutInt <= opB; |
when 5 => -- AND sX, kk |
aluOutInt <= opA and opB; |
cOut <= '0'; |
when 6 => -- OR sX, kk |
aluOutInt <= opA or opB; |
cOut <= '0'; |
when 7 => -- XOR sX, kk |
aluOutInt <= opA xor opB; |
cOut <= '0'; |
when 9 => -- TEST sX, kk |
aluOutInt <= opA and opB; |
xorAcc := '0'; |
for index in aluOutInt'range loop |
xorAcc := xorAcc xor aluOutInt(index); |
end loop; |
cOut <= xorAcc; |
when 10 => -- COMPARE sX, kk |
yArith <= aArith - bArith; |
aluOutInt <= yArith(aluOut'range); |
cOut <= yArith(yArith'high); |
when 12 => -- ADD sX, kk |
yArith <= aArith + bArith; |
aluOutInt <= yArith(aluOut'range); |
cOut <= yArith(yArith'high); |
when 13 => -- ADDCY sX, kk |
yArith <= (aArith + bArith) + cInArith; |
aluOutInt <= yArith(aluOut'range); |
cOut <= yArith(yArith'high); |
when 14 => -- SUB sX, kk |
yArith <= aArith - bArith; |
aluOutInt <= yArith(aluOut'range); |
cOut <= yArith(yArith'high); |
when 15 => -- SUBCY sX, kk |
yArith <= (aArith - bArith) - cInArith; |
aluOutInt <= yArith(aluOut'range); |
cOut <= yArith(yArith'high); |
when 16 to 23 => -- SL sX |
aluOutInt <= opA(opA'high-1 downto 0) & cInShift; |
cOut <= opA(opA'high); |
when 24 to 31 => -- SR sX |
aluOutInt <= cInShift & opA(opA'high downto 1); |
cOut <= opA(0); |
when others => |
aluOutInt <= (others => '-'); |
end case; |
end process aluOperation; |
|
aluOut <= aluOutInt; |
zero <= '1' when aluOutInt = 0 else '0'; |
|
END ARCHITECTURE RTL; |
nanoblaze/trunk/Circuit/alu.vhd
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: nanoblaze/trunk/Circuit/branchStack.vhd
===================================================================
--- nanoblaze/trunk/Circuit/branchStack.vhd (revision 9)
+++ nanoblaze/trunk/Circuit/branchStack.vhd (revision 10)
@@ -42,7 +42,6 @@
storePC : IN std_ulogic;
storedProgCounter : OUT unsigned(programCounterBitNb-1 DOWNTO 0)
);
-
END branchStack ;
--==============================================================================
/nanoblaze/trunk/Circuit/controller.vhd
59,7 → 59,6
int : IN std_ulogic; |
intAck : OUT std_ulogic |
); |
|
END controller ; |
|
--============================================================================== |
/nanoblaze/trunk/Circuit/aluBOpSelector.vhd
0,0 → 1,71
--############################################################################## |
-- |
-- aluBOpSelector |
-- ALU B-operand selector |
-- |
-- This multiplexer brings the proper data on the B-input of the ALU. |
-- |
-------------------------------------------------------------------------------- |
-- |
-- Versions / Authors |
-- 1.0 Francois Corthay first implementation |
-- |
-- Provided under GNU LGPL licence: <http://www.gnu.org/copyleft/lesser.html> |
-- |
-- by the electronics group of "HES-SO//Valais Wallis", in Switzerland: |
-- <http://www.hevs.ch/en/rad-instituts/institut-systemes-industriels/>. |
-- |
-------------------------------------------------------------------------------- |
-- |
-- Hierarchy |
-- Used by "nanoblaze/nanoProcessor/aluAndRegs". |
-- |
--############################################################################## |
|
LIBRARY ieee; |
USE ieee.std_logic_1164.all; |
USE ieee.numeric_std.all; |
|
ENTITY aluBOpSelector IS |
GENERIC( |
registerBitNb : positive := 8 |
); |
PORT( |
instrData : IN signed(registerBitNb-1 DOWNTO 0); |
instrDataSel : IN std_ulogic; |
portIn : IN signed(registerBitNb-1 DOWNTO 0); |
portInSel : IN std_ulogic; |
registerFileIn : IN signed(registerBitNb-1 DOWNTO 0); |
registerFileSel : IN std_ulogic; |
scratchpadSel : IN std_ulogic; |
spadIn : IN signed(registerBitNb-1 DOWNTO 0); |
opB : OUT signed (registerBitNb-1 DOWNTO 0) |
); |
END aluBOpSelector ; |
|
--============================================================================== |
|
ARCHITECTURE RTL OF aluBOpSelector IS |
BEGIN |
|
selectDataSource: process( |
registerFileSel, registerFileIn, |
scratchpadSel, spadIn, |
portInSel, portIn, |
instrDataSel, instrData |
) |
begin |
if registerFileSel = '1' then |
opB <= registerFileIn; |
elsif scratchpadSel = '1' then |
opB <= spadIn; |
elsif portInSel = '1' then |
opB <= portIn; |
elsif instrDataSel = '1' then |
opB <= instrData; |
else |
opB <= (others => '-'); |
end if; |
end process selectDataSource; |
|
END ARCHITECTURE RTL; |
nanoblaze/trunk/Circuit/aluBOpSelector.vhd
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: nanoblaze/trunk/Circuit/registerFile.vhd
===================================================================
--- nanoblaze/trunk/Circuit/registerFile.vhd (nonexistent)
+++ nanoblaze/trunk/Circuit/registerFile.vhd (revision 10)
@@ -0,0 +1,74 @@
+--##############################################################################
+--
+-- registerFile
+-- Microprocessor registers
+--
+-- The register file has one data input, from the ALU,
+-- and two data outputs for the ALU inputs.
+--
+--------------------------------------------------------------------------------
+--
+-- Versions / Authors
+-- 1.0 Francois Corthay first implementation
+--
+-- Provided under GNU LGPL licence:
+--
+-- by the electronics group of "HES-SO//Valais Wallis", in Switzerland:
+-- .
+--
+--------------------------------------------------------------------------------
+--
+-- Hierarchy
+-- Used by "nanoblaze/nanoProcessor/aluAndRegs".
+--
+--##############################################################################
+
+LIBRARY ieee;
+ USE ieee.std_logic_1164.all;
+ USE ieee.numeric_std.all;
+
+ENTITY registerFile IS
+ GENERIC(
+ registerAddressBitNb : positive := 4;
+ dataBitNb : positive := 8
+ );
+ PORT(
+ clock : IN std_ulogic;
+ reset : IN std_ulogic;
+ addrA : IN unsigned(registerAddressBitNb-1 DOWNTO 0);
+ addrB : IN unsigned(registerAddressBitNb-1 DOWNTO 0);
+ regWrite : IN std_ulogic;
+ registersIn : IN signed(dataBitNb-1 DOWNTO 0);
+ opA : OUT signed(dataBitNb-1 DOWNTO 0);
+ opB : OUT signed(dataBitNb-1 DOWNTO 0)
+ );
+END registerFile ;
+
+--==============================================================================
+
+ARCHITECTURE RTL OF registerFile IS
+
+ subtype registerType is signed(registersIn'range);
+ type registerArrayType is array (0 to 2**registerAddressBitNb-1) of registerType;
+ signal registerArray : registerArrayType;
+
+BEGIN
+ ------------------------------------------------------------------------------
+ -- write to registers
+ updateRegister: process(reset, clock)
+ begin
+ if reset = '1' then
+ registerArray <= (others => (others => '0'));
+ elsif rising_edge(clock) then
+ if regWrite = '1' then
+ registerArray(to_integer(addrA)) <= registersIn;
+ end if;
+ end if;
+ end process updateRegister;
+
+ ------------------------------------------------------------------------------
+ -- read from registers
+ opA <= registerArray(to_integer(addrA));
+ opB <= registerArray(to_integer(addrB));
+
+END ARCHITECTURE RTL;
nanoblaze/trunk/Circuit/registerFile.vhd
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: nanoblaze/trunk/Circuit/instructionDecoder.vhd
===================================================================
--- nanoblaze/trunk/Circuit/instructionDecoder.vhd (revision 9)
+++ nanoblaze/trunk/Circuit/instructionDecoder.vhd (revision 10)
@@ -55,7 +55,6 @@
spadIndexedSel : OUT std_ulogic;
spadAddress : OUT unsigned(spadAddressBitNb-1 DOWNTO 0)
);
-
END instructionDecoder ;
--==============================================================================
/nanoblaze/trunk/Circuit/programCounter.vhd
41,7 → 41,6
loadStoredPC : IN std_ulogic; |
progCounter : OUT unsigned(programCounterBitNb-1 DOWNTO 0) |
); |
|
END programCounter ; |
|
--============================================================================== |
/nanoblaze/trunk/Circuit/scratchpad.vhd
39,7 → 39,6
dataIn : IN signed(registerBitNb-1 DOWNTO 0); |
dataOut : OUT signed(registerBitNb-1 DOWNTO 0 ) |
); |
|
END scratchpad ; |
|
--============================================================================== |