URL
https://opencores.org/ocsvn/vitdec/vitdec/trunk
Subversion Repositories vitdec
Compare Revisions
- This comparison shows the changes necessary to convert path
/
- from Rev 2 to Rev 3
- ↔ Reverse comparison
Rev 2 → Rev 3
/vitdec/trunk/hamming_index_reg_2.txt
0,0 → 1,128
00 |
11 |
01 |
10 |
00 |
11 |
01 |
10 |
11 |
00 |
10 |
01 |
11 |
00 |
10 |
01 |
11 |
00 |
10 |
01 |
11 |
00 |
10 |
01 |
00 |
11 |
01 |
10 |
00 |
11 |
01 |
10 |
10 |
01 |
11 |
00 |
10 |
01 |
11 |
00 |
01 |
10 |
00 |
11 |
01 |
10 |
00 |
11 |
01 |
10 |
00 |
11 |
01 |
10 |
00 |
11 |
10 |
01 |
11 |
00 |
10 |
01 |
11 |
00 |
11 |
00 |
10 |
01 |
11 |
00 |
10 |
01 |
00 |
11 |
01 |
10 |
00 |
11 |
01 |
10 |
00 |
11 |
01 |
10 |
00 |
11 |
01 |
10 |
11 |
00 |
10 |
01 |
11 |
00 |
10 |
01 |
01 |
10 |
00 |
11 |
01 |
10 |
00 |
11 |
10 |
01 |
11 |
00 |
10 |
01 |
11 |
00 |
10 |
01 |
11 |
00 |
10 |
01 |
11 |
00 |
01 |
10 |
00 |
11 |
01 |
10 |
00 |
11 |
/vitdec/trunk/hamming_index_reg_4.txt
0,0 → 1,256
0000 |
1100 |
0111 |
1011 |
0001 |
1101 |
0110 |
1010 |
1100 |
0000 |
1011 |
0111 |
1101 |
0001 |
1010 |
0110 |
1111 |
0011 |
1000 |
0100 |
1110 |
0010 |
1001 |
0101 |
0011 |
1111 |
0100 |
1000 |
0010 |
1110 |
0101 |
1001 |
1011 |
0111 |
1100 |
0000 |
1010 |
0110 |
1101 |
0001 |
0111 |
1011 |
0000 |
1100 |
0110 |
1010 |
0001 |
1101 |
0100 |
1000 |
0011 |
1111 |
0101 |
1001 |
0010 |
1110 |
1000 |
0100 |
1111 |
0011 |
1001 |
0101 |
1110 |
0010 |
1110 |
0010 |
1001 |
0101 |
1111 |
0011 |
1000 |
0100 |
0010 |
1110 |
0101 |
1001 |
0011 |
1111 |
0100 |
1000 |
0001 |
1101 |
0110 |
1010 |
0000 |
1100 |
0111 |
1011 |
1101 |
0001 |
1010 |
0110 |
1100 |
0000 |
1011 |
0111 |
0101 |
1001 |
0010 |
1110 |
0100 |
1000 |
0011 |
1111 |
1001 |
0101 |
1110 |
0010 |
1000 |
0100 |
1111 |
0011 |
1010 |
0110 |
1101 |
0001 |
1011 |
0111 |
1100 |
0000 |
0110 |
1010 |
0001 |
1101 |
0111 |
1011 |
0000 |
1100 |
0011 |
1111 |
0100 |
1000 |
0010 |
1110 |
0101 |
1001 |
1111 |
0011 |
1000 |
0100 |
1110 |
0010 |
1001 |
0101 |
1100 |
0000 |
1011 |
0111 |
1101 |
0001 |
1010 |
0110 |
0000 |
1100 |
0111 |
1011 |
0001 |
1101 |
0110 |
1010 |
1000 |
0100 |
1111 |
0011 |
1001 |
0101 |
1110 |
0010 |
0100 |
1000 |
0011 |
1111 |
0101 |
1001 |
0010 |
1110 |
0111 |
1011 |
0000 |
1100 |
0110 |
1010 |
0001 |
1101 |
1011 |
0111 |
1100 |
0000 |
1010 |
0110 |
1101 |
0001 |
1101 |
0001 |
1010 |
0110 |
1100 |
0000 |
1011 |
0111 |
0001 |
1101 |
0110 |
1010 |
0000 |
1100 |
0111 |
1011 |
0010 |
1110 |
0101 |
1001 |
0011 |
1111 |
0100 |
1000 |
1110 |
0010 |
1001 |
0101 |
1111 |
0011 |
1000 |
0100 |
0110 |
1010 |
0001 |
1101 |
0111 |
1011 |
0000 |
1100 |
1010 |
0110 |
1101 |
0001 |
1011 |
0111 |
1100 |
0000 |
1001 |
0101 |
1110 |
0010 |
1000 |
0100 |
1111 |
0011 |
0101 |
1001 |
0010 |
1110 |
0100 |
1000 |
0011 |
1111 |
/vitdec/trunk/rstmem.txt
0,0 → 1,1008
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/vitdec/trunk/dpram.v
0,0 → 1,53
`timescale 1ns / 1ps |
////////////////////////////////////////////////////////////////////////////////// |
// Company: |
// Engineer: |
// |
// Create Date: 09:51:25 11/25/2010 |
// Design Name: |
// Module Name: dpram |
// Project Name: |
// Target Devices: |
// Tool versions: |
// Description: |
// |
// Dependencies: |
// |
// Revision: |
// Revision 0.01 - File Created |
// Additional Comments: |
// |
////////////////////////////////////////////////////////////////////////////////// |
module dpram( in, |
out, |
adr, |
adw, |
clk, |
rst, |
frame_rst, |
en); |
|
parameter data_width = 64; |
parameter ram_depth = 256; |
parameter addr_width = 8; |
|
input clk, rst, frame_rst, en; |
input [data_width-1:0] in; |
output [data_width-1:0] out; |
wire [data_width-1:0] out; |
input [addr_width-1:0] adr; |
input [addr_width-1:0] adw; |
|
reg [data_width-1:0] ram [0:ram_depth-1]; |
|
assign out = ram[adr]; |
|
always @ (rst, en, clk, frame_rst) |
begin |
if (!rst) |
$readmemb("rstmem.txt", ram); |
else if (clk && en && !frame_rst) |
ram[adw] = in; |
end |
|
endmodule |
/vitdec/trunk/hamming_index_reg_16.txt
0,0 → 1,1024
00000000 |
11000000 |
01110000 |
10110000 |
00011100 |
11011100 |
01101100 |
10101100 |
11000111 |
00000111 |
10110111 |
01110111 |
11011011 |
00011011 |
10101011 |
01101011 |
11110001 |
00110001 |
10000001 |
01000001 |
11101101 |
00101101 |
10011101 |
01011101 |
00110110 |
11110110 |
01000110 |
10000110 |
00101010 |
11101010 |
01011010 |
10011010 |
10111100 |
01111100 |
11001100 |
00001100 |
10100000 |
01100000 |
11010000 |
00010000 |
01111011 |
10111011 |
00001011 |
11001011 |
01100111 |
10100111 |
00010111 |
11010111 |
01001101 |
10001101 |
00111101 |
11111101 |
01010001 |
10010001 |
00100001 |
11100001 |
10001010 |
01001010 |
11111010 |
00111010 |
10010110 |
01010110 |
11100110 |
00100110 |
11101111 |
00101111 |
10011111 |
01011111 |
11110011 |
00110011 |
10000011 |
01000011 |
00101000 |
11101000 |
01011000 |
10011000 |
00110100 |
11110100 |
01000100 |
10000100 |
00011110 |
11011110 |
01101110 |
10101110 |
00000010 |
11000010 |
01110010 |
10110010 |
11011001 |
00011001 |
10101001 |
01101001 |
11000101 |
00000101 |
10110101 |
01110101 |
01010011 |
10010011 |
00100011 |
11100011 |
01001111 |
10001111 |
00111111 |
11111111 |
10010100 |
01010100 |
11100100 |
00100100 |
10001000 |
01001000 |
11111000 |
00111000 |
10100010 |
01100010 |
11010010 |
00010010 |
10111110 |
01111110 |
11001110 |
00001110 |
01100101 |
10100101 |
00010101 |
11010101 |
01111001 |
10111001 |
00001001 |
11001001 |
00111011 |
11111011 |
01001011 |
10001011 |
00100111 |
11100111 |
01010111 |
10010111 |
11111100 |
00111100 |
10001100 |
01001100 |
11100000 |
00100000 |
10010000 |
01010000 |
11001010 |
00001010 |
10111010 |
01111010 |
11010110 |
00010110 |
10100110 |
01100110 |
00001101 |
11001101 |
01111101 |
10111101 |
00010001 |
11010001 |
01100001 |
10100001 |
10000111 |
01000111 |
11110111 |
00110111 |
10011011 |
01011011 |
11101011 |
00101011 |
01000000 |
10000000 |
00110000 |
11110000 |
01011100 |
10011100 |
00101100 |
11101100 |
01110110 |
10110110 |
00000110 |
11000110 |
01101010 |
10101010 |
00011010 |
11011010 |
10110001 |
01110001 |
11000001 |
00000001 |
10101101 |
01101101 |
11011101 |
00011101 |
11010100 |
00010100 |
10100100 |
01100100 |
11001000 |
00001000 |
10111000 |
01111000 |
00010011 |
11010011 |
01100011 |
10100011 |
00001111 |
11001111 |
01111111 |
10111111 |
00100101 |
11100101 |
01010101 |
10010101 |
00111001 |
11111001 |
01001001 |
10001001 |
11100010 |
00100010 |
10010010 |
01010010 |
11111110 |
00111110 |
10001110 |
01001110 |
01101000 |
10101000 |
00011000 |
11011000 |
01110100 |
10110100 |
00000100 |
11000100 |
10101111 |
01101111 |
11011111 |
00011111 |
10110011 |
01110011 |
11000011 |
00000011 |
10011001 |
01011001 |
11101001 |
00101001 |
10000101 |
01000101 |
11110101 |
00110101 |
01011110 |
10011110 |
00101110 |
11101110 |
01000010 |
10000010 |
00110010 |
11110010 |
00001110 |
11001110 |
01111110 |
10111110 |
00010010 |
11010010 |
01100010 |
10100010 |
11001001 |
00001001 |
10111001 |
01111001 |
11010101 |
00010101 |
10100101 |
01100101 |
11111111 |
00111111 |
10001111 |
01001111 |
11100011 |
00100011 |
10010011 |
01010011 |
00111000 |
11111000 |
01001000 |
10001000 |
00100100 |
11100100 |
01010100 |
10010100 |
10110010 |
01110010 |
11000010 |
00000010 |
10101110 |
01101110 |
11011110 |
00011110 |
01110101 |
10110101 |
00000101 |
11000101 |
01101001 |
10101001 |
00011001 |
11011001 |
01000011 |
10000011 |
00110011 |
11110011 |
01011111 |
10011111 |
00101111 |
11101111 |
10000100 |
01000100 |
11110100 |
00110100 |
10011000 |
01011000 |
11101000 |
00101000 |
11100001 |
00100001 |
10010001 |
01010001 |
11111101 |
00111101 |
10001101 |
01001101 |
00100110 |
11100110 |
01010110 |
10010110 |
00111010 |
11111010 |
01001010 |
10001010 |
00010000 |
11010000 |
01100000 |
10100000 |
00001100 |
11001100 |
01111100 |
10111100 |
11010111 |
00010111 |
10100111 |
01100111 |
11001011 |
00001011 |
10111011 |
01111011 |
01011101 |
10011101 |
00101101 |
11101101 |
01000001 |
10000001 |
00110001 |
11110001 |
10011010 |
01011010 |
11101010 |
00101010 |
10000110 |
01000110 |
11110110 |
00110110 |
10101100 |
01101100 |
11011100 |
00011100 |
10110000 |
01110000 |
11000000 |
00000000 |
01101011 |
10101011 |
00011011 |
11011011 |
01110111 |
10110111 |
00000111 |
11000111 |
00110101 |
11110101 |
01000101 |
10000101 |
00101001 |
11101001 |
01011001 |
10011001 |
11110010 |
00110010 |
10000010 |
01000010 |
11101110 |
00101110 |
10011110 |
01011110 |
11000100 |
00000100 |
10110100 |
01110100 |
11011000 |
00011000 |
10101000 |
01101000 |
00000011 |
11000011 |
01110011 |
10110011 |
00011111 |
11011111 |
01101111 |
10101111 |
10001001 |
01001001 |
11111001 |
00111001 |
10010101 |
01010101 |
11100101 |
00100101 |
01001110 |
10001110 |
00111110 |
11111110 |
01010010 |
10010010 |
00100010 |
11100010 |
01111000 |
10111000 |
00001000 |
11001000 |
01100100 |
10100100 |
00010100 |
11010100 |
10111111 |
01111111 |
11001111 |
00001111 |
10100011 |
01100011 |
11010011 |
00010011 |
11011010 |
00011010 |
10101010 |
01101010 |
11000110 |
00000110 |
10110110 |
01110110 |
00011101 |
11011101 |
01101101 |
10101101 |
00000001 |
11000001 |
01110001 |
10110001 |
00101011 |
11101011 |
01011011 |
10011011 |
00110111 |
11110111 |
01000111 |
10000111 |
11101100 |
00101100 |
10011100 |
01011100 |
11110000 |
00110000 |
10000000 |
01000000 |
01100110 |
10100110 |
00010110 |
11010110 |
01111010 |
10111010 |
00001010 |
11001010 |
10100001 |
01100001 |
11010001 |
00010001 |
10111101 |
01111101 |
11001101 |
00001101 |
10010111 |
01010111 |
11100111 |
00100111 |
10001011 |
01001011 |
11111011 |
00111011 |
01010000 |
10010000 |
00100000 |
11100000 |
01001100 |
10001100 |
00111100 |
11111100 |
00000011 |
11000011 |
01110011 |
10110011 |
00011111 |
11011111 |
01101111 |
10101111 |
11000100 |
00000100 |
10110100 |
01110100 |
11011000 |
00011000 |
10101000 |
01101000 |
11110010 |
00110010 |
10000010 |
01000010 |
11101110 |
00101110 |
10011110 |
01011110 |
00110101 |
11110101 |
01000101 |
10000101 |
00101001 |
11101001 |
01011001 |
10011001 |
10111111 |
01111111 |
11001111 |
00001111 |
10100011 |
01100011 |
11010011 |
00010011 |
01111000 |
10111000 |
00001000 |
11001000 |
01100100 |
10100100 |
00010100 |
11010100 |
01001110 |
10001110 |
00111110 |
11111110 |
01010010 |
10010010 |
00100010 |
11100010 |
10001001 |
01001001 |
11111001 |
00111001 |
10010101 |
01010101 |
11100101 |
00100101 |
11101100 |
00101100 |
10011100 |
01011100 |
11110000 |
00110000 |
10000000 |
01000000 |
00101011 |
11101011 |
01011011 |
10011011 |
00110111 |
11110111 |
01000111 |
10000111 |
00011101 |
11011101 |
01101101 |
10101101 |
00000001 |
11000001 |
01110001 |
10110001 |
11011010 |
00011010 |
10101010 |
01101010 |
11000110 |
00000110 |
10110110 |
01110110 |
01010000 |
10010000 |
00100000 |
11100000 |
01001100 |
10001100 |
00111100 |
11111100 |
10010111 |
01010111 |
11100111 |
00100111 |
10001011 |
01001011 |
11111011 |
00111011 |
10100001 |
01100001 |
11010001 |
00010001 |
10111101 |
01111101 |
11001101 |
00001101 |
01100110 |
10100110 |
00010110 |
11010110 |
01111010 |
10111010 |
00001010 |
11001010 |
00111000 |
11111000 |
01001000 |
10001000 |
00100100 |
11100100 |
01010100 |
10010100 |
11111111 |
00111111 |
10001111 |
01001111 |
11100011 |
00100011 |
10010011 |
01010011 |
11001001 |
00001001 |
10111001 |
01111001 |
11010101 |
00010101 |
10100101 |
01100101 |
00001110 |
11001110 |
01111110 |
10111110 |
00010010 |
11010010 |
01100010 |
10100010 |
10000100 |
01000100 |
11110100 |
00110100 |
10011000 |
01011000 |
11101000 |
00101000 |
01000011 |
10000011 |
00110011 |
11110011 |
01011111 |
10011111 |
00101111 |
11101111 |
01110101 |
10110101 |
00000101 |
11000101 |
01101001 |
10101001 |
00011001 |
11011001 |
10110010 |
01110010 |
11000010 |
00000010 |
10101110 |
01101110 |
11011110 |
00011110 |
11010111 |
00010111 |
10100111 |
01100111 |
11001011 |
00001011 |
10111011 |
01111011 |
00010000 |
11010000 |
01100000 |
10100000 |
00001100 |
11001100 |
01111100 |
10111100 |
00100110 |
11100110 |
01010110 |
10010110 |
00111010 |
11111010 |
01001010 |
10001010 |
11100001 |
00100001 |
10010001 |
01010001 |
11111101 |
00111101 |
10001101 |
01001101 |
01101011 |
10101011 |
00011011 |
11011011 |
01110111 |
10110111 |
00000111 |
11000111 |
10101100 |
01101100 |
11011100 |
00011100 |
10110000 |
01110000 |
11000000 |
00000000 |
10011010 |
01011010 |
11101010 |
00101010 |
10000110 |
01000110 |
11110110 |
00110110 |
01011101 |
10011101 |
00101101 |
11101101 |
01000001 |
10000001 |
00110001 |
11110001 |
00001101 |
11001101 |
01111101 |
10111101 |
00010001 |
11010001 |
01100001 |
10100001 |
11001010 |
00001010 |
10111010 |
01111010 |
11010110 |
00010110 |
10100110 |
01100110 |
11111100 |
00111100 |
10001100 |
01001100 |
11100000 |
00100000 |
10010000 |
01010000 |
00111011 |
11111011 |
01001011 |
10001011 |
00100111 |
11100111 |
01010111 |
10010111 |
10110001 |
01110001 |
11000001 |
00000001 |
10101101 |
01101101 |
11011101 |
00011101 |
01110110 |
10110110 |
00000110 |
11000110 |
01101010 |
10101010 |
00011010 |
11011010 |
01000000 |
10000000 |
00110000 |
11110000 |
01011100 |
10011100 |
00101100 |
11101100 |
10000111 |
01000111 |
11110111 |
00110111 |
10011011 |
01011011 |
11101011 |
00101011 |
11100010 |
00100010 |
10010010 |
01010010 |
11111110 |
00111110 |
10001110 |
01001110 |
00100101 |
11100101 |
01010101 |
10010101 |
00111001 |
11111001 |
01001001 |
10001001 |
00010011 |
11010011 |
01100011 |
10100011 |
00001111 |
11001111 |
01111111 |
10111111 |
11010100 |
00010100 |
10100100 |
01100100 |
11001000 |
00001000 |
10111000 |
01111000 |
01011110 |
10011110 |
00101110 |
11101110 |
01000010 |
10000010 |
00110010 |
11110010 |
10011001 |
01011001 |
11101001 |
00101001 |
10000101 |
01000101 |
11110101 |
00110101 |
10101111 |
01101111 |
11011111 |
00011111 |
10110011 |
01110011 |
11000011 |
00000011 |
01101000 |
10101000 |
00011000 |
11011000 |
01110100 |
10110100 |
00000100 |
11000100 |
00110110 |
11110110 |
01000110 |
10000110 |
00101010 |
11101010 |
01011010 |
10011010 |
11110001 |
00110001 |
10000001 |
01000001 |
11101101 |
00101101 |
10011101 |
01011101 |
11000111 |
00000111 |
10110111 |
01110111 |
11011011 |
00011011 |
10101011 |
01101011 |
00000000 |
11000000 |
01110000 |
10110000 |
00011100 |
11011100 |
01101100 |
10101100 |
10001010 |
01001010 |
11111010 |
00111010 |
10010110 |
01010110 |
11100110 |
00100110 |
01001101 |
10001101 |
00111101 |
11111101 |
01010001 |
10010001 |
00100001 |
11100001 |
01111011 |
10111011 |
00001011 |
11001011 |
01100111 |
10100111 |
00010111 |
11010111 |
10111100 |
01111100 |
11001100 |
00001100 |
10100000 |
01100000 |
11010000 |
00010000 |
11011001 |
00011001 |
10101001 |
01101001 |
11000101 |
00000101 |
10110101 |
01110101 |
00011110 |
11011110 |
01101110 |
10101110 |
00000010 |
11000010 |
01110010 |
10110010 |
00101000 |
11101000 |
01011000 |
10011000 |
00110100 |
11110100 |
01000100 |
10000100 |
11101111 |
00101111 |
10011111 |
01011111 |
11110011 |
00110011 |
10000011 |
01000011 |
01100101 |
10100101 |
00010101 |
11010101 |
01111001 |
10111001 |
00001001 |
11001001 |
10100010 |
01100010 |
11010010 |
00010010 |
10111110 |
01111110 |
11001110 |
00001110 |
10010100 |
01010100 |
11100100 |
00100100 |
10001000 |
01001000 |
11111000 |
00111000 |
01010011 |
10010011 |
00100011 |
11100011 |
01001111 |
10001111 |
00111111 |
11111111 |
/vitdec/trunk/tb_ram.v
0,0 → 1,215
`timescale 1ns / 1ps |
////////////////////////////////////////////////////////////////////////////////// |
// Company: |
// Engineer: |
// |
// Create Date: 09:38:56 11/29/2010 |
// Design Name: |
// Module Name: tb_ram |
// Project Name: |
// Target Devices: |
// Tool versions: |
// Description: |
// |
// Dependencies: |
// |
// Revision: |
// Revision 0.01 - File Created |
// Additional Comments: |
// |
////////////////////////////////////////////////////////////////////////////////// |
module tb_ram(rst, clk, frame_rst, en, in1, in2, in3, in4, out_tb, out_dc); |
|
parameter state = 64; |
parameter nu = 6; |
parameter tb_length = 128; |
parameter tb_length_log = 7; |
parameter radix = 4; //1: radix-2; 2: radix-4 3: radix-8 |
|
localparam data_width = state; |
localparam ram_depth = tb_length/radix; |
localparam addr_width = tb_length_log; |
|
input rst, clk, frame_rst, en; |
input [0:data_width-1] in1; |
input [0:data_width-1] in2; |
input [0:data_width-1] in3; |
input [0:data_width-1] in4; |
output [0:radix-1] out_tb; |
output [0:radix-1] out_dc; |
|
reg [0:3] en_reg; |
reg [0:nu-1] tb_state; |
reg [0:nu-1] dec_state; |
wire [0:radix-1] tb_tmp; |
wire [0:radix-1] dc_tmp; |
wire [0:radix-1] dc_tmp_tmp; |
wire [0:data_width-1] out_w [0:3][0:radix-1]; |
reg [0:data_width-1] in_reg [0:radix-1]; |
reg [0:addr_width-1] counter_tb ; |
reg [0:addr_width-1] counter_tbn ; |
wire [0:addr_width-1] counter_tb_w ; |
wire [0:addr_width-1] counter_tbn_w ; |
|
reg [0:1] counter_id0 ; |
reg [0:1] counter_id1 ; |
reg [0:1] counter_id2 ; |
reg [0:1] counter_id3 ; |
wire [0:1] counter_id0_w ; |
wire [0:1] counter_id1_w ; |
wire [0:1] counter_id2_w ; |
wire [0:1] counter_id3_w ; |
|
genvar gi, gj; |
|
initial |
begin |
dec_state = 7; |
tb_state = 7; |
counter_id0 = 0; |
counter_id1 = 1; |
counter_id2 = 2; |
counter_id3 = 3; |
counter_tb = 0; |
counter_tbn = -1; |
end |
|
always @ (clk, rst) |
begin |
if (rst == 0) counter_tb = 0; |
else if(clk == 1) |
if (frame_rst == 1) counter_tb = 0; |
else if (en == 1) counter_tb = (counter_tb + 1) % ram_depth; |
end |
|
assign counter_tb_w = counter_tb; |
assign counter_tbn_w = ~counter_tb; |
|
always @ (clk, rst) |
begin |
if (rst == 0) |
begin |
counter_id0 = 0; |
counter_id1 = 1; |
counter_id2 = 2; |
counter_id3 = 3; |
end |
else if (clk == 1) |
if (frame_rst == 1) |
begin |
counter_id0 = 0; |
counter_id1 = 1; |
counter_id2 = 2; |
counter_id3 = 3; |
end |
else if (counter_tb == ram_depth - 1) |
begin |
counter_id0 = (counter_id0 + 1) % 4; |
counter_id1 = (counter_id1 + 1) % 4; |
counter_id2 = (counter_id2 + 1) % 4; |
counter_id3 = (counter_id3 + 1) % 4; |
end |
end |
|
assign counter_id0_w = counter_id0; |
assign counter_id1_w = counter_id1; |
assign counter_id2_w = counter_id2; |
assign counter_id3_w = counter_id3; |
|
always @ (counter_id0_w) |
begin |
case(counter_id0_w) |
2'b00 : en_reg = 4'b1000; |
2'b01 : en_reg = 4'b0100; |
2'b10 : en_reg = 4'b0010; |
2'b11 : en_reg = 4'b0001; |
endcase |
end |
|
generate |
if (radix == 1) |
begin |
always @ (in1, clk) |
begin |
in_reg[0] = in1; |
end |
end |
else if (radix == 2) |
begin |
always @ (in1, in2, clk) |
begin |
in_reg[0] = in1; |
in_reg[1] = in2; |
end |
end |
else if (radix == 3) |
begin |
always @ (in1, in2, in3, clk) |
begin |
in_reg[0] = in1; |
in_reg[1] = in2; |
in_reg[2] = in3; |
end |
end |
else if (radix == 4) |
begin |
always @ (in1, in2, in3, in4, clk) |
begin |
in_reg[0] = in1; |
in_reg[1] = in2; |
in_reg[2] = in3; |
in_reg[3] = in4; |
end |
end |
endgenerate |
|
generate for (gi = 0; gi < radix; gi = gi + 1) |
begin : sel |
assign tb_tmp[gi] = out_w[counter_id3_w][gi][tb_state]; |
assign dc_tmp[gi] = out_w[counter_id1_w][gi][dec_state]; |
assign dc_tmp_tmp[gi] = out_w[counter_id1_w][gi][tb_state]; |
end |
endgenerate |
|
generate for (gi = 0; gi < 4; gi = gi + 1) |
begin : ram |
for (gj = 0; gj < radix; gj = gj + 1) |
begin : r |
dpram #( data_width, |
ram_depth, |
addr_width) |
|
ram_inst ( in_reg[gj], |
out_w[gi][gj], |
counter_tbn_w, |
counter_tb_w, |
clk, |
rst, |
frame_rst, |
en_reg[gi]); |
end |
end |
endgenerate |
|
always @ (posedge clk) |
begin |
if (counter_tb == ram_depth - 1) |
begin |
dec_state = {tb_state[radix:nu-1], dc_tmp_tmp}; |
tb_state = 7; |
end |
else |
begin |
dec_state = {dec_state[radix:nu-1], dc_tmp}; |
tb_state = {tb_state[radix:nu-1], tb_tmp}; |
end |
end |
|
generate for (gi = 0; gi < radix; gi = gi + 1) |
begin : assgn_out |
assign out_tb[gi] = tb_state[gi]; |
assign out_dc[gi] = dec_state[gi]; |
end |
endgenerate |
|
endmodule |
/vitdec/trunk/hamming_index_reg_8.txt
0,0 → 1,512
000000 |
110000 |
011100 |
101100 |
000111 |
110111 |
011011 |
101011 |
110001 |
000001 |
101101 |
011101 |
110110 |
000110 |
101010 |
011010 |
111100 |
001100 |
100000 |
010000 |
111011 |
001011 |
100111 |
010111 |
001101 |
111101 |
010001 |
100001 |
001010 |
111010 |
010110 |
100110 |
101111 |
011111 |
110011 |
000011 |
101000 |
011000 |
110100 |
000100 |
011110 |
101110 |
000010 |
110010 |
011001 |
101001 |
000101 |
110101 |
010011 |
100011 |
001111 |
111111 |
010100 |
100100 |
001000 |
111000 |
100010 |
010010 |
111110 |
001110 |
100101 |
010101 |
111001 |
001001 |
111011 |
001011 |
100111 |
010111 |
111100 |
001100 |
100000 |
010000 |
001010 |
111010 |
010110 |
100110 |
001101 |
111101 |
010001 |
100001 |
000111 |
110111 |
011011 |
101011 |
000000 |
110000 |
011100 |
101100 |
110110 |
000110 |
101010 |
011010 |
110001 |
000001 |
101101 |
011101 |
010100 |
100100 |
001000 |
111000 |
010011 |
100011 |
001111 |
111111 |
100101 |
010101 |
111001 |
001001 |
100010 |
010010 |
111110 |
001110 |
101000 |
011000 |
110100 |
000100 |
101111 |
011111 |
110011 |
000011 |
011001 |
101001 |
000101 |
110101 |
011110 |
101110 |
000010 |
110010 |
001110 |
111110 |
010010 |
100010 |
001001 |
111001 |
010101 |
100101 |
111111 |
001111 |
100011 |
010011 |
111000 |
001000 |
100100 |
010100 |
110010 |
000010 |
101110 |
011110 |
110101 |
000101 |
101001 |
011001 |
000011 |
110011 |
011111 |
101111 |
000100 |
110100 |
011000 |
101000 |
100001 |
010001 |
111101 |
001101 |
100110 |
010110 |
111010 |
001010 |
010000 |
100000 |
001100 |
111100 |
010111 |
100111 |
001011 |
111011 |
011101 |
101101 |
000001 |
110001 |
011010 |
101010 |
000110 |
110110 |
101100 |
011100 |
110000 |
000000 |
101011 |
011011 |
110111 |
000111 |
110101 |
000101 |
101001 |
011001 |
110010 |
000010 |
101110 |
011110 |
000100 |
110100 |
011000 |
101000 |
000011 |
110011 |
011111 |
101111 |
001001 |
111001 |
010101 |
100101 |
001110 |
111110 |
010010 |
100010 |
111000 |
001000 |
100100 |
010100 |
111111 |
001111 |
100011 |
010011 |
011010 |
101010 |
000110 |
110110 |
011101 |
101101 |
000001 |
110001 |
101011 |
011011 |
110111 |
000111 |
101100 |
011100 |
110000 |
000000 |
100110 |
010110 |
111010 |
001010 |
100001 |
010001 |
111101 |
001101 |
010111 |
100111 |
001011 |
111011 |
010000 |
100000 |
001100 |
111100 |
000011 |
110011 |
011111 |
101111 |
000100 |
110100 |
011000 |
101000 |
110010 |
000010 |
101110 |
011110 |
110101 |
000101 |
101001 |
011001 |
111111 |
001111 |
100011 |
010011 |
111000 |
001000 |
100100 |
010100 |
001110 |
111110 |
010010 |
100010 |
001001 |
111001 |
010101 |
100101 |
101100 |
011100 |
110000 |
000000 |
101011 |
011011 |
110111 |
000111 |
011101 |
101101 |
000001 |
110001 |
011010 |
101010 |
000110 |
110110 |
010000 |
100000 |
001100 |
111100 |
010111 |
100111 |
001011 |
111011 |
100001 |
010001 |
111101 |
001101 |
100110 |
010110 |
111010 |
001010 |
111000 |
001000 |
100100 |
010100 |
111111 |
001111 |
100011 |
010011 |
001001 |
111001 |
010101 |
100101 |
001110 |
111110 |
010010 |
100010 |
000100 |
110100 |
011000 |
101000 |
000011 |
110011 |
011111 |
101111 |
110101 |
000101 |
101001 |
011001 |
110010 |
000010 |
101110 |
011110 |
010111 |
100111 |
001011 |
111011 |
010000 |
100000 |
001100 |
111100 |
100110 |
010110 |
111010 |
001010 |
100001 |
010001 |
111101 |
001101 |
101011 |
011011 |
110111 |
000111 |
101100 |
011100 |
110000 |
000000 |
011010 |
101010 |
000110 |
110110 |
011101 |
101101 |
000001 |
110001 |
001101 |
111101 |
010001 |
100001 |
001010 |
111010 |
010110 |
100110 |
111100 |
001100 |
100000 |
010000 |
111011 |
001011 |
100111 |
010111 |
110001 |
000001 |
101101 |
011101 |
110110 |
000110 |
101010 |
011010 |
000000 |
110000 |
011100 |
101100 |
000111 |
110111 |
011011 |
101011 |
100010 |
010010 |
111110 |
001110 |
100101 |
010101 |
111001 |
001001 |
010011 |
100011 |
001111 |
111111 |
010100 |
100100 |
001000 |
111000 |
011110 |
101110 |
000010 |
110010 |
011001 |
101001 |
000101 |
110101 |
101111 |
011111 |
110011 |
000011 |
101000 |
011000 |
110100 |
000100 |
110110 |
000110 |
101010 |
011010 |
110001 |
000001 |
101101 |
011101 |
000111 |
110111 |
011011 |
101011 |
000000 |
110000 |
011100 |
101100 |
001010 |
111010 |
010110 |
100110 |
001101 |
111101 |
010001 |
100001 |
111011 |
001011 |
100111 |
010111 |
111100 |
001100 |
100000 |
010000 |
011001 |
101001 |
000101 |
110101 |
011110 |
101110 |
000010 |
110010 |
101000 |
011000 |
110100 |
000100 |
101111 |
011111 |
110011 |
000011 |
100101 |
010101 |
111001 |
001001 |
100010 |
010010 |
111110 |
001110 |
010100 |
100100 |
001000 |
111000 |
010011 |
100011 |
001111 |
111111 |
/vitdec/trunk/acs.v
0,0 → 1,176
`timescale 1ns / 1ps |
////////////////////////////////////////////////////////////////////////////////// |
// Company: |
// Engineer: |
// |
// Create Date: 11:50:09 12/01/2010 |
// Design Name: |
// Module Name: acs |
// Project Name: |
// Target Devices: |
// Tool versions: |
// Description: |
// |
// Dependencies: |
// |
// Revision: |
// Revision 0.01 - File Created |
// Additional Comments: |
// |
////////////////////////////////////////////////////////////////////////////////// |
module acs(clk, rst, frame_rst, en, in1, in2, out); |
|
parameter r = 1, //r = 2 radix4; r = 3 radix8; r = 1 radix2; |
n = 2, //current version only support n = 2 |
m = 7, |
k = 1, |
nu = 6, |
state = 64, |
tb_length = 128, |
tb_length_log = 7, |
bitwise = 1, |
reglen = 11; |
|
input clk, rst, frame_rst, en; |
|
input [0:bitwise-1] in1; |
input [0:bitwise-1] in2; |
input [0:bitwise-1] in3; |
input [0:bitwise-1] in4; |
input [0:bitwise-1] in5; |
input [0:bitwise-1] in6; |
input [0:bitwise-1] in7; |
input [0:bitwise-1] in8; |
output [0:state-1] out; |
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wire [0:state-1] out; |
reg [0:bitwise+1+(r-1)-1] hamm_dist1 [0:2**(n*r)-1]; |
wire [0:reglen-1] branch_metric_calc_w [0:2*r-1][0:state-1]; //wire |
wire [0:2*r*(2*r-1)-1] decision_tmp_w [0:state-1]; //wire |
reg [0:reglen-1] branch_metric [0:state-1]; //reg |
reg [0:r-1] decision [0:state-1]; //reg |
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integer i, j, fid, rcv, hdf, bmf; |
reg [0:(r*n)-1] hamming_index_reg [0:state-1][0:2**r-1]; |
reg [0:3] en_reg; |
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genvar gi, gj, gk, gii, gjj, gkk; |
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//`include "hamming_index_16.v" |
//`include "hamming_index_8.v" |
//`include "hamming_index_4.v" |
//`include "hamming_index_2.v" |
|
initial |
begin |
hdf = $fopen("hamming_dist.txt","w"); |
bmf = $fopen("branch_metric.txt","w"); |
if (r == 1) |
fid = $fopen("hamming_index_reg_2.txt", "r"); |
else if (r == 2) |
fid = $fopen("hamming_index_reg_4.txt", "r"); |
else if (r == 8) |
fid = $fopen("hamming_index_reg_8.txt", "r"); |
for (i = 0; i < state; i = i + 1) |
for (j = 0; j < 2**r; j = j + 1) |
rcv = $fscanf(fid, "%b", hamming_index_reg[i][j]); |
end |
|
always @(clk, rst, en) |
begin |
if (rst == 0) |
en_reg = 0; |
else if (clk == 1) |
if (frame_rst == 1) |
en_reg = 0; |
else if (en == 1) |
en_reg = { en, en_reg[0:2] }; |
end |
|
always @ (clk, rst, en) |
begin |
if(rst == 0) |
begin |
hamm_dist1[0] = 0; |
hamm_dist1[1] = 0; |
hamm_dist1[2] = 0; |
hamm_dist1[3] = 0; |
end |
else if(clk == 1) |
begin |
if(frame_rst == 1) |
begin |
hamm_dist1[0] = 0; |
hamm_dist1[1] = 0; |
hamm_dist1[2] = 0; |
hamm_dist1[3] = 0; |
end |
else if(en_reg[1] == 1) |
begin |
hamm_dist1[0] = {1'b0, ( in1)} + {1'b0, ( in2)}; |
hamm_dist1[1] = {1'b0, ( in1)} + {1'b0, (~in2)}; |
hamm_dist1[2] = {1'b0, (~in1)} + {1'b0, ( in2)}; |
hamm_dist1[3] = {1'b0, (~in1)} + {1'b0, (~in2)}; |
for (i = 0; i < 2**(n*r); i = i + 1) |
$fdisplay(hdf, "%d", hamm_dist1[i]); |
end |
end |
|
end |
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generate for (gi = 0; gi < state; gi = gi + 1) begin : g10 |
for (gj = 0; gj < 2**r; gj = gj + 1) begin : g11 |
assign branch_metric_calc_w[gj][gi] = branch_metric[(gi*(2**r)+gj)%state] + hamm_dist1[hamming_index_reg[gi][gj]]; |
end |
end |
endgenerate |
|
generate for (gi = 0; gi < state; gi = gi + 1) begin : g12 |
assign decision_tmp_w[gi] = branch_metric_calc_w[0][gi] > branch_metric_calc_w[1][gi]; |
end |
endgenerate |
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generate for (gi = 0; gi < state; gi = gi + 1) |
begin : g15 |
always @ (clk, rst) |
begin |
if (rst == 0) |
decision[gi] = 0; |
else if (clk == 1) |
if (frame_rst == 1) |
decision[gi] = 0; |
else if (en_reg[2] == 1) |
decision[gi] = decision_tmp_w[gi]; |
end |
end |
endgenerate |
|
generate for (gi = 0; gi < state; gi = gi + 1) |
begin : g16 |
always @ (clk, rst) |
begin : g16_1 |
if (rst == 0) |
branch_metric[gi] = 0; |
else if (clk == 1) |
if (frame_rst == 1) |
branch_metric[gi] = 0; |
else if (en_reg[2] == 1) |
branch_metric[gi] = branch_metric_calc_w[decision_tmp_w[gi]][gi]; |
end |
end |
endgenerate |
|
always @ (posedge clk) |
begin |
for (i = 0; i < state; i = i + 1) |
$fwrite(bmf, "cmp %4.3d with %4.3d, decision is %2.1d, decision_w is %2.1d, result is %4.3d\n", branch_metric_calc_w[0][i], branch_metric_calc_w[1][i], decision[i], decision_tmp_w[i], branch_metric[i]); |
$fwrite(bmf, "================================================================================================================================\n"); |
end |
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generate for (gi = 0; gi < state; gi = gi + 1) |
begin : assgn_out |
assign out[gi] = decision[gi]; |
end |
endgenerate; |
|
endmodule |