URL
https://opencores.org/ocsvn/versatile_fifo/versatile_fifo/trunk
Subversion Repositories versatile_fifo
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- This comparison shows the changes necessary to convert path
/
- from Rev 25 to Rev 26
- ↔ Reverse comparison
Rev 25 → Rev 26
/versatile_fifo/trunk/rtl/verilog/versatile_fifo_dual_port_ram_dc_sw.v
1,3 → 1,8
// true dual port RAM, sync |
|
`ifdef ACTEL |
`define SYN /*synthesis syn_ramstyle = "no_rw_check"*/ |
`endif |
module vfifo_dual_port_ram_dc_sw |
( |
d_a, |
/versatile_fifo/trunk/rtl/verilog/versatile_fifo_dual_port_ram_sc_dw.v
1,3 → 1,8
// true dual port RAM, sync |
|
`ifdef ACTEL |
`define SYN /*synthesis syn_ramstyle = "no_rw_check"*/ |
`endif |
module vfifo_dual_port_ram_sc_dw |
( |
d_a, |
/versatile_fifo/trunk/rtl/verilog/versatile_fifo_dual_port_ram_sc_sw.v
1,3 → 1,8
// true dual port RAM, sync |
|
`ifdef ACTEL |
`define SYN /*synthesis syn_ramstyle = "no_rw_check"*/ |
`endif |
module vfifo_dual_port_ram_sc_sw |
( |
d_a, |
/versatile_fifo/trunk/rtl/verilog/versatile_fifo_dual_port_ram.v
1,4 → 1,8
// true dual port RAM, sync |
|
`ifdef ACTEL |
`define SYN /*synthesis syn_ramstyle = "no_rw_check"*/ |
`endif |
module vfifo_dual_port_ram_`TYPE |
( |
// A side |
51,7 → 55,7
`endif |
|
// Declare the RAM variable |
reg [DATA_WIDTH-1:0] ram [(1<<ADDR_WIDTH)-1:0] /*synthesis syn_ramstyle = "no_rw_check"*/; |
reg [DATA_WIDTH-1:0] ram [(1<<ADDR_WIDTH)-1:0] `SYN; |
|
`ifdef DC |
always @ (posedge clk_a) |
/versatile_fifo/trunk/rtl/verilog/versatile_fifo_dual_port_ram_dc_dw.v
1,3 → 1,8
// true dual port RAM, sync |
|
`ifdef ACTEL |
`define SYN /*synthesis syn_ramstyle = "no_rw_check"*/ |
`endif |
module vfifo_dual_port_ram_dc_dw |
( |
d_a, |
23,7 → 28,7
input we_b; |
input clk_a, clk_b; |
reg [(DATA_WIDTH-1):0] q_b; |
reg [DATA_WIDTH-1:0] ram [(1<<ADDR_WIDTH)-1:0] ; |
reg [DATA_WIDTH-1:0] ram [(1<<ADDR_WIDTH)-1:0] `SYN; |
always @ (posedge clk_a) |
begin |
q_a <= ram[adr_a]; |
/versatile_fifo/trunk/rtl/verilog/Makefile
28,4 → 28,4
async_fifo_mq: gray_counter |
vppreproc --simple gray_counter.v |
|
all: dual_port_ram export gray_counter gray_counter sd |
all: export gray_counter gray_counter sd |