URL
https://opencores.org/ocsvn/uart_observer/uart_observer/trunk
Subversion Repositories uart_observer
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- from Rev 4 to Rev 5
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Rev 4 → Rev 5
/uart_observer/trunk/verilog/uart_receiver.v
27,7 → 27,7
reg [7:0] ram_addr = 0; |
|
// Divider to 1 baud, receiver |
reg [BITS:0] divider_rx = 0; |
reg [31:0] divider_rx = 0; |
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// Previous value of the RX line, for edge detection |
reg prev_rx = 1; |