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URL https://opencores.org/ocsvn/kiss-board/kiss-board/trunk

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Rev 5 → Rev 6

/trunk/kiss-board_soc/sw/boot_flash/net.c
0,0 → 1,191
 
#include "support.h"
#include "net.h"
#include "debug.h"
 
void net_init(void){
 
// software reset
REG8(NET_BASE+NET_RESET) = REG8(NET_BASE+NET_RESET);
 
// page0
REG8(NET_BASE+NET_CR) = NET_CR_PAGE_0 | NET_CR_DMA_ABORT | NET_CR_STOP;
REG8(NET_BASE+NET_P0_DCR) = NET_DCR_FIFO_8;
REG8(NET_BASE+NET_P0_RBCR0) = 0x00;
REG8(NET_BASE+NET_P0_RBCR1) = 0x00;
REG8(NET_BASE+NET_P0_RCR) = NET_RCR_MONITOR;
REG8(NET_BASE+NET_P0_TCR) = NET_TCR_LOOPBACK_INTERNAL;
REG8(NET_BASE+NET_P0_TPSR) = 0x40;
REG8(NET_BASE+NET_P0_PSTART) = 0x46;
REG8(NET_BASE+NET_P0_BNRY) = 0x46;
REG8(NET_BASE+NET_P0_PSTOP) = 0x60;
REG8(NET_BASE+NET_P0_IMR) = 0x00; // interrupt all disable
REG8(NET_BASE+NET_P0_ISR) = 0xff; // interrupt status all clear
// page1
REG8(NET_BASE+NET_CR) = NET_CR_PAGE_1 | NET_CR_DMA_ABORT | NET_CR_STOP;
REG8(NET_BASE+NET_P1_PAR0) = 0x00; // mac
REG8(NET_BASE+NET_P1_PAR1) = 0x22;
REG8(NET_BASE+NET_P1_PAR2) = 0x33;
REG8(NET_BASE+NET_P1_PAR3) = 0x44;
REG8(NET_BASE+NET_P1_PAR4) = 0x55;
REG8(NET_BASE+NET_P1_PAR5) = 0x00;
REG8(NET_BASE+NET_P1_CURR) = 0x47;
REG8(NET_BASE+NET_P1_MAR0) = 0x00; // multi-cast
REG8(NET_BASE+NET_P1_MAR1) = 0x00;
REG8(NET_BASE+NET_P1_MAR2) = 0x00;
REG8(NET_BASE+NET_P1_MAR3) = 0x00;
REG8(NET_BASE+NET_P1_MAR4) = 0x00;
REG8(NET_BASE+NET_P1_MAR5) = 0x00;
REG8(NET_BASE+NET_P1_MAR6) = 0x00;
REG8(NET_BASE+NET_P1_MAR7) = 0x00;
// page0
REG8(NET_BASE+NET_CR) = NET_CR_PAGE_0 | NET_CR_DMA_ABORT | NET_CR_STOP;
REG8(NET_BASE+NET_P0_RCR) = 0x00; //NET_RCR_BOARDCAST;
 
// page0
REG8(NET_BASE+NET_CR) = NET_CR_PAGE_0 | NET_CR_DMA_ABORT | NET_CR_START;
REG8(NET_BASE+NET_P0_TCR) = NET_TCR_LOOPBACK_NORMAL;
 
// end
return;
}
 
void net_send(void){
 
// wait ok
while ( 0x00 != ( REG8(NET_BASE+NET_CR)&NET_CR_SEND ) ){};
 
// page0 DMA setup
REG8(NET_BASE+NET_CR) = NET_CR_PAGE_0 | NET_CR_DMA_ABORT | NET_CR_START;
REG8(NET_BASE+NET_P0_ISR) = 0xff;
REG8(NET_BASE+NET_P0_RSAR0) = 0x00;
REG8(NET_BASE+NET_P0_RSAR1) = 0x40; // 0x4000 REMOTE-DMA ADDRESS
REG8(NET_BASE+NET_P0_RBCR0) = 0x0e;
REG8(NET_BASE+NET_P0_RBCR1) = 0x01; // 0x010e REMOTE-DMA SIZE(256+14)
 
// page0 DMA do
REG8(NET_BASE+NET_CR) = NET_CR_PAGE_0 | NET_CR_DMA_WRITE | NET_CR_START;
//
REG8(NET_BASE+NET_DMA) = 0xff; // dst0
REG8(NET_BASE+NET_DMA) = 0xff; // dst1
REG8(NET_BASE+NET_DMA) = 0xff; // dst2
REG8(NET_BASE+NET_DMA) = 0xff; // dst3
REG8(NET_BASE+NET_DMA) = 0xff; // dst4
REG8(NET_BASE+NET_DMA) = 0xff; // dst5
//
REG8(NET_BASE+NET_DMA) = 0x00; // src0
REG8(NET_BASE+NET_DMA) = 0x22; // src1
REG8(NET_BASE+NET_DMA) = 0x33; // src2
REG8(NET_BASE+NET_DMA) = 0x44; // src3
REG8(NET_BASE+NET_DMA) = 0x55; // src4
REG8(NET_BASE+NET_DMA) = 0x00; // src5
//
REG8(NET_BASE+NET_DMA) = 0x10; // type1
REG8(NET_BASE+NET_DMA) = 0x00; // type0 0x1000
//
{
unsigned long int i;
for (i=0;i<256;i++) REG8(NET_BASE+NET_DMA) = (unsigned char)i;
}
 
// page0 TX setup
REG8(NET_BASE+NET_CR) = NET_CR_PAGE_0 | NET_CR_DMA_ABORT | NET_CR_START;
REG8(NET_BASE+NET_P0_TBCR0) = 0x0e;
REG8(NET_BASE+NET_P0_TBCR1) = 0x01; // 0x010e TX SIZE(256+14)
 
// page0 TX do
REG8(NET_BASE+NET_CR) = NET_CR_PAGE_0 | NET_CR_DMA_ABORT | NET_CR_SEND | NET_CR_START;
 
// end
return;
}
 
void net_recv(void){
unsigned char bnry;
unsigned char curr;
unsigned char rsr;
unsigned char next;
unsigned char len0;
unsigned char len1;
unsigned long int temp;
static unsigned long int count = 0;
static unsigned long int done = 0;
// page0 bnry
REG8(NET_BASE+NET_CR) = NET_CR_PAGE_0 | NET_CR_DMA_ABORT | NET_CR_START;
bnry = REG8(NET_BASE+NET_P0_BNRY);
// page1 curr
REG8(NET_BASE+NET_CR) = NET_CR_PAGE_1 | NET_CR_DMA_ABORT | NET_CR_START;
curr = REG8(NET_BASE+NET_P1_CURR);
// exist check
if(curr==bnry+1) {
REG8(NET_BASE+NET_CR) = NET_CR_PAGE_0 | NET_CR_DMA_ABORT | NET_CR_START;
return;
}
// page0 DMA setup
REG8(NET_BASE+NET_CR) = NET_CR_PAGE_0 | NET_CR_DMA_ABORT | NET_CR_START;
REG8(NET_BASE+NET_P0_ISR) = 0xff;
REG8(NET_BASE+NET_P0_RSAR0) = 0x00;
REG8(NET_BASE+NET_P0_RSAR1) = bnry+0x01;
REG8(NET_BASE+NET_P0_RBCR0) = 0x04;
REG8(NET_BASE+NET_P0_RBCR1) = 0x00;
// page0 DMA do
REG8(NET_BASE+NET_CR) = NET_CR_PAGE_0 | NET_CR_DMA_READ | NET_CR_START;
// byte access(its slow,so memory controler is poor,always sequence is long int...)
rsr = REG8(NET_BASE+NET_DMA);
next = REG8(NET_BASE+NET_DMA);
len0 = REG8(NET_BASE+NET_DMA);
len1 = REG8(NET_BASE+NET_DMA);
// long int access
//temp = REG32(NET_BASE+NET_DMA);
//rsr = (temp&0xff000000)>>24;
//next = (temp&0x00ff0000)>>16;
//len0 = (temp&0x0000ff00)>> 8;
//len1 = (temp&0x000000ff)>> 0;
// data check
if(0x00==(rsr&0x01)) {
REG8(NET_BASE+NET_CR) = NET_CR_PAGE_0 | NET_CR_DMA_ABORT | NET_CR_START;
REG8(NET_BASE+NET_P0_BNRY) = (next==0x46) ? 0x5f: next-0x01;
return;
}
// data read(print header)
if(done==0){
long int x;
long int y;
unsigned char debug_text[DEBUG_TEXT_LEN+1];
//
x = syscall(SYS_SCREEN_GET_LOCATE_X);
y = syscall(SYS_SCREEN_GET_LOCATE_Y);
//
syscall(SYS_SCREEN_LOCATE,0,480-12-12-12-12);
syscall(SYS_SCREEN_PUT_STRING,"bnry,curr,rsr,next,len1,len0,count:");
debug_convert( (unsigned long int)bnry , debug_text , 2 , 16 );
syscall(SYS_SCREEN_PUT_STRING,debug_text);syscall(SYS_SCREEN_PUT_STRING," ");
debug_convert( (unsigned long int)curr , debug_text , 2 , 16 );
syscall(SYS_SCREEN_PUT_STRING,debug_text);syscall(SYS_SCREEN_PUT_STRING," ");
debug_convert( (unsigned long int)rsr , debug_text , 2 , 16 );
syscall(SYS_SCREEN_PUT_STRING,debug_text);syscall(SYS_SCREEN_PUT_STRING," ");
debug_convert( (unsigned long int)next , debug_text , 2 , 16 );
syscall(SYS_SCREEN_PUT_STRING,debug_text);syscall(SYS_SCREEN_PUT_STRING," ");
debug_convert( (unsigned long int)len0 , debug_text , 2 , 16 );
syscall(SYS_SCREEN_PUT_STRING,debug_text);syscall(SYS_SCREEN_PUT_STRING," ");
debug_convert( (unsigned long int)len1 , debug_text , 2 , 16 );
syscall(SYS_SCREEN_PUT_STRING,debug_text);syscall(SYS_SCREEN_PUT_STRING," ");
debug_convert( (unsigned long int)count, debug_text , DEBUG_TEXT_LEN , 10 );
syscall(SYS_SCREEN_PUT_STRING,debug_text);syscall(SYS_SCREEN_PUT_STRING," ");
//
syscall(SYS_SCREEN_SET_LOCATE_X,x);
syscall(SYS_SCREEN_SET_LOCATE_Y,y);
}
done=0;
// release
REG8(NET_BASE+NET_CR) = NET_CR_PAGE_0 | NET_CR_DMA_ABORT | NET_CR_START;
REG8(NET_BASE+NET_P0_BNRY) = (next==0x46) ? 0x5f: next-0x01;
 
count++;
// end
return;
}
 
trunk/kiss-board_soc/sw/boot_flash/net.c Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/kiss-board_soc/sw/boot_flash/net.h =================================================================== --- trunk/kiss-board_soc/sw/boot_flash/net.h (nonexistent) +++ trunk/kiss-board_soc/sw/boot_flash/net.h (revision 6) @@ -0,0 +1,109 @@ + +#ifndef __NET_H +#define __NET_H + +// BASE +#define NET_BASE 0x04400000 +#define NET_CR 0x00000000 +#define NET_DMA 0x00000010 +#define NET_RESET 0x00000018 + +// PAGE0 +#define NET_P0_PSTART 0x00000001 +#define NET_P0_PSTOP 0x00000002 +#define NET_P0_BNRY 0x00000003 +#define NET_P0_TPSR 0x00000004 +#define NET_P0_TBCR0 0x00000005 +#define NET_P0_TBCR1 0x00000006 +#define NET_P0_ISR 0x00000007 +#define NET_P0_RSAR0 0x00000008 +#define NET_P0_RSAR1 0x00000009 +#define NET_P0_RBCR0 0x0000000a +#define NET_P0_RBCR1 0x0000000b +#define NET_P0_RCR 0x0000000c +#define NET_P0_TCR 0x0000000d +#define NET_P0_DCR 0x0000000e +#define NET_P0_IMR 0x0000000f + +// PAGE1 +#define NET_P1_PAR0 0x00000001 +#define NET_P1_PAR1 0x00000002 +#define NET_P1_PAR2 0x00000003 +#define NET_P1_PAR3 0x00000004 +#define NET_P1_PAR4 0x00000005 +#define NET_P1_PAR5 0x00000006 +#define NET_P1_CURR 0x00000007 +#define NET_P1_MAR0 0x00000008 +#define NET_P1_MAR1 0x00000009 +#define NET_P1_MAR2 0x0000000a +#define NET_P1_MAR3 0x0000000b +#define NET_P1_MAR4 0x0000000c +#define NET_P1_MAR5 0x0000000d +#define NET_P1_MAR6 0x0000000e +#define NET_P1_MAR7 0x0000000f + +// CR +#define NET_CR_PAGE_0 0x00<<6 +#define NET_CR_PAGE_1 0x01<<6 +#define NET_CR_PAGE_2 0x02<<6 +#define NET_CR_PAGE_3 0x03<<6 +#define NET_CR_DMA_DISABLE 0x00<<3 +#define NET_CR_DMA_READ 0x01<<3 +#define NET_CR_DMA_WRITE 0x02<<3 +#define NET_CR_DMA_PACKET 0x03<<3 +#define NET_CR_DMA_ABORT 0x04<<3 +#define NET_CR_SEND 0x01<<2 +#define NET_CR_START 0x01<<1 +#define NET_CR_STOP 0x01<<0 + +// DCR +#define NET_DCR_FIFO_2 0x00<<5 +#define NET_DCR_FIFO_4 0x01<<5 +#define NET_DCR_FIFO_8 0x02<<5 +#define NET_DCR_FIFO_12 0x03<<5 +#define NET_DCR_AUTOINIT 0x01<<4 +#define NET_DCR_LOOPBACK 0x01<<3 +#define NET_DCR_LONG_32 0x01<<2 +#define NET_DCR_ENDIAN_BIG 0x01<<1 +#define NET_DCR_WORD 0x01<<0 +// RCR +#define NET_RCR_MONITOR 0x01<<5 +#define NET_RCR_ALL 0x01<<4 +#define NET_RCR_MULTICAST 0x01<<3 +#define NET_RCR_BOARDCAST 0x01<<2 +#define NET_RCR_SHORT 0x01<<1 +#define NET_RCR_ERROR 0x01<<0 +// TCR +#define NET_TCR_DOWN_PRIORITY 0x01<<4 +#define NET_TCR_AUTOSEND_DISABLE 0x01<<3 +#define NET_TCR_LOOPBACK_NORMAL 0x00<<1 +#define NET_TCR_LOOPBACK_INTERNAL 0x01<<1 +#define NET_TCR_LOOPBACK_ENCDEC 0x02<<1 +#define NET_TCR_LOOPBACK_EXTERNAL 0x03<<1 +#define NET_TCR_CRC_DISABLE 0x01<<0 +// IMR +#define NET_IMR_DMA 0x01<<6 +#define NET_IMR_COUNTEROF 0x01<<5 +#define NET_IMR_RXOF 0x01<<4 +#define NET_IMR_TXERR 0x01<<3 +#define NET_IMR_RXERR 0x01<<2 +#define NET_IMR_TX 0x01<<1 +#define NET_IMR_RX 0x01<<0 +// ISR +#define NET_ISR_DMA 0x01<<6 +#define NET_ISR_COUNTEROF 0x01<<5 +#define NET_ISR_RXOF 0x01<<4 +#define NET_ISR_TXERR 0x01<<3 +#define NET_ISR_RXERR 0x01<<2 +#define NET_ISR_TX 0x01<<1 +#define NET_ISR_RX 0x01<<0 + +// public +void net_init(void) __attribute__ ((section(".text"))); +void net_send(void) __attribute__ ((section(".text"))); +void net_recv(void) __attribute__ ((section(".text"))); + +// private + +#endif +
trunk/kiss-board_soc/sw/boot_flash/net.h Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property

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