OpenCores
URL https://opencores.org/ocsvn/usb_fpga_1_11/usb_fpga_1_11/trunk

Subversion Repositories usb_fpga_1_11

Compare Revisions

  • This comparison shows the changes necessary to convert path 
    /
    from Rev 5 to Rev 6
    ↔ Reverse comparison
  •

Rev 5 → Rev 6

/usb_fpga_1_11/trunk/java/FWLoader
1,3 → 1,10
#!/bin/bash
DIR=${0%/*}
java -cp $DIR/FWLoader.jar FWLoader $@
if [ -r $DIR/FWLoader.jar ]; then
java -cp $DIR/FWLoader.jar FWLoader $@
else
# export CLASSPATH=$CLASSPATH:/usr/share/java/ztex.jar:/usr/local/share/java/ztex.jar:/usr/share/java/libusbJava.jar:/usr/local/share/java/libusbJava.jar:/usr/share/libusbJava:/usr/local/share/libusbJava
export CLASSPATH=$CLASSPATH:/usr/local/share/java:/usr/share/java
export LD_LIBRARY_PATH=$LD_LIBRARY_PATH:/usr/local/lib:/usr/lib
java FWLoader $@
fi
/usb_fpga_1_11/trunk/java/FWLoader.java
66,6 → 66,7
" -bs 0|1|A Bit swapping for bitstreams: 0: disable, 1: enable, A: automatic detection\n"+
" -rf Reset FPGA\n"+
" -uf <bitstream> Upload bitstream to FPGA\n"+
" -sf <number> Select FPGA (default: 0)\n"+
" -re Reset EEPROM Firmware\n"+
" -ue <ihx file> Upload Firmware to EEPROM\n"+
" -rm Reset FLASH bitstream\n"+
163,7 → 164,7
}
else if ( args[i].equals("-i") || args[i].equals("-ii") || args[i].equals("-if") || args[i].equals("-ru") || args[i].equals("-rf") || args[i].equals("-re") || args[i].equals("-rm") ) {
}
else if ( args[i].equals("-uu") || args[i].equals("-uf") || args[i].equals("-ue") || args[i].equals("-um") || args[i].equals("-bs") || args[i].equals("-uxf") || args[i].equals("-uxe") || args[i].equals("-rxf") || args[i].equals("-ss")) {
else if ( args[i].equals("-uu") || args[i].equals("-uf") || args[i].equals("-sf") || args[i].equals("-ue") || args[i].equals("-um") || args[i].equals("-bs") || args[i].equals("-uxf") || args[i].equals("-uxe") || args[i].equals("-rxf") || args[i].equals("-ss")) {
i+=1;
}
else if ( args[i].equals("-wxf") ) {
255,6 → 256,23
}
System.out.println("FPGA configuration time: " + ztex.configureFpga( args[i], forceUpload, bs ) + " ms");
}
else if ( args[i].equals("-sf") ) {
i++;
int fn=-1;
try {
if (i>=args.length)
throw new Exception();
fn = Integer.parseInt( args[i] );
}
catch (Exception e) {
System.err.println("Error: Number expected after -sf");
System.err.println(helpMsg);
System.exit(1);
}
if ( fn >= 0 ) {
ztex.selectFpga(fn);
}
}
else if ( args[i].equals("-re") ) {
ztex.eepromDisable();
}
/usb_fpga_1_11/trunk/java/ucecho.bit Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream
/usb_fpga_1_11/trunk/java/ucecho.bit
usb_fpga_1_11/trunk/java/ucecho.bit Property changes : Added: svn:mime-type ## -0,0 +1 ## +application/octet-stream \ No newline at end of property Index: usb_fpga_1_11/trunk/java/ztex/Ztex1.java =================================================================== --- usb_fpga_1_11/trunk/java/ztex/Ztex1.java (revision 5) +++ usb_fpga_1_11/trunk/java/ztex/Ztex1.java (revision 6) @@ -44,8 +44,10 @@ private long handle; private ZtexDevice1 dev = null; private boolean oldDevices[] = new boolean[maxDevNum+1]; + private int oldDevNum = -1; private String usbBusName = null; private boolean[] interfaceClaimed = new boolean[256]; + private boolean configurationSet = false; /** * Setting to true enables certain workarounds, e.g. to deal with bad driver/OS implementations. */ public boolean certainWorkarounds = false; /** * The timeout for control messages in ms. */ @@ -320,6 +322,7 @@ public void setConfiguration ( int config) throws UsbException{ if ( LibusbJava.usb_set_configuration(handle(), config) < 0 ) throw new UsbException("Setting configuration to " + config + " failed: " + LibusbJava.usb_strerror()); + configurationSet = true; } @@ -332,6 +335,7 @@ public void trySetConfiguration ( int config) { if ( LibusbJava.usb_set_configuration(handle(), config) < 0 ) System.err.println("Setting configuration to " + config + " failed: " + LibusbJava.usb_strerror()); + configurationSet = true; } @@ -353,6 +357,8 @@ * @throws UsbException if an error occurs while attempting to claim the interface. */ public void claimInterface ( int iface) throws UsbException{ + if ( ! configurationSet ) + trySetConfiguration(1); if ( ( iface<0 || iface>=256 || (! interfaceClaimed[iface]) ) && ( LibusbJava.usb_claim_interface(handle(), iface) < 0 ) ) throw new UsbException("Claiming interface " + iface + " failed: " + LibusbJava.usb_strerror()); if ( iface>=0 && iface < 256 ) @@ -376,9 +382,14 @@ // ******* findOldDevices ****************************************************** private synchronized void findOldDevices () throws DeviceLostException { - Usb_Bus bus = dev.dev().getBus(); - usbBusName = bus.getDirname(); + usbBusName = dev.dev().getBus().getDirname(); + Usb_Bus bus = LibusbJava.usb_get_busses(); + while ( bus != null && ! bus.getDirname().equals(usbBusName) ) + bus = bus.getNext(); + if ( bus == null ) + throw new DeviceLostException( "findOldDevice: Bus dissapeared" ); + for ( int i=0; i<=maxDevNum; i++ ) oldDevices[i] = false; @@ -391,7 +402,7 @@ oldDevices[b] = true; d = d.getNext(); } - oldDevices[dev.dev().getDevnum()] = false; + oldDevNum = dev.dev().getDevnum(); } // ******* findNewDevice ******************************************************* @@ -403,6 +414,8 @@ Usb_Bus bus = LibusbJava.usb_get_busses(); while ( bus != null && ! bus.getDirname().equals(usbBusName) ) bus = bus.getNext(); + if ( bus == null ) + throw new DeviceLostException( "findNewDevice: Bus dissapeared" ); Usb_Device d = bus != null ? bus.getDevices() : null; while ( d != null ) { @@ -424,14 +437,18 @@ private void initNewDevice ( String errBase, boolean scanUnconfigured ) throws DeviceLostException, UsbException, InvalidFirmwareException { // scan the bus for up to 60 s for a new device. Boot sequence may take a while. Usb_Device newDev = null; - for ( int i=0; i<300 && newDev==null; i++ ) { + int i; + for ( i=0; i<300 && newDev==null; i++ ) { try { Thread.sleep( 200 ); } catch ( InterruptedException e ) { } + if ( i > 10 && oldDevNum >= 0 && oldDevNum < maxDevNum ) + oldDevices[oldDevNum ] = false; newDev = findNewDevice( errBase + ": " ); } + oldDevNum = -1; if ( newDev == null ) throw new DeviceLostException( errBase + ": No new device found" );
/usb_fpga_1_11/trunk/java/ztex/Ztex1v1.java
39,6 → 39,9
1 checksum
2-5 transferred bytes
6 INIT_B state
7 Flash configuration result
8 Flash bitstream bit order (1=swapped)
 
VC 0x31 : reset FPGA
VC 0x32 : send FPGA configuration data (Bitstream)
 
93,6 → 96,20
Offs Description
0 0:idle, 1:busy or error
0.7 : Multi-FPGA support
VR 0x50 : Return multi-FPGA information
Returns:
Offs Description
0 Number of FPGA's - 1
1 Selected FPGA - 1
2 Parallel configuration support (0:no, 1:yes)
VC 0x51 : set CS
Parameters:
index: Select command
0 : select single FPGA
1 : select all FPGA's for configuration
value: FPGA to select - 1
 
*/
package ztex;
 
189,6 → 206,14
* <td bgcolor="#ffffff" valign="top">6</td>
* <td bgcolor="#ffffff" valign="top">INIT_B states.</td>
* </tr>
* <tr>
* <td bgcolor="#ffffff" valign="top">7</td>
* <td bgcolor="#ffffff" valign="top">Flash configuration result.</td>
* </tr>
* <tr>
* <td bgcolor="#ffffff" valign="top">8</td>
* <td bgcolor="#ffffff" valign="top">Flash Bitstreambit order (1=swapped).</td>
* </tr>
* </table>
* </td>
* </tr>
422,6 → 447,60
* </table>
* </td>
* </tr>
* <tr>
* <td bgcolor="#ffffff" valign="top">0.7</td>
* <td bgcolor="#ffffff" valign="top" colspan=2>
* Multi-FPGA support<p>
* <table bgcolor="#404040" cellspacing=1 cellpadding=6>
* <tr>
* <td bgcolor="#d0d0d0" valign="bottom"><b>Vendor request (VR)<br> or command (VC)</b></td>
* <td bgcolor="#d0d0d0" valign="bottom"><b>Description</b></td>
* </tr>
* <tr>
* <td bgcolor="#ffffff" valign="top">VR 0x50</td>
* <td bgcolor="#ffffff" valign="top">Return multi-FPGA information:
* <table bgcolor="#404040" cellspacing=1 cellpadding=4>
* <tr>
* <td bgcolor="#d0d0d0" valign="bottom"><b>Bytes</b></td>
* <td bgcolor="#d0d0d0" valign="bottom"><b>Description</b></td>
* </tr>
* <tr>
* <td bgcolor="#ffffff" valign="top">0</td>
* <td bgcolor="#ffffff" valign="top">Number of FPGA's - 1</td>
* </tr>
* <tr>
* <td bgcolor="#ffffff" valign="top">1</td>
* <td bgcolor="#ffffff" valign="top">Selected FPGA - 1</td>
* </tr>
* <tr>
* <td bgcolor="#ffffff" valign="top">2</td>
* <td bgcolor="#ffffff" valign="top">Parallel configuration support (0:no, 1:yes)</td>
* </tr>
* </table>
* </td>
* </tr>
* <tr>
* <td bgcolor="#ffffff" valign="top">VC 0x51</td>
* <td bgcolor="#ffffff" valign="top">Parameters:
* <table bgcolor="#404040" cellspacing=1 cellpadding=4>
* <tr>
* <td bgcolor="#d0d0d0" valign="bottom"><b>Parameter</b></td>
* <td bgcolor="#d0d0d0" valign="bottom"><b>Description</b></td>
* </tr>
* <tr>
* <td bgcolor="#ffffff" valign="top">index</td>
* <td bgcolor="#ffffff" valign="top">Select command<br> 0: Select single FPGA <br> 1: Select all FPGA's for configuration</td>
* </tr>
* <tr>
* <td bgcolor="#ffffff" valign="top">value</td>
* <td bgcolor="#ffffff" valign="top">FPGA to select - 1</td>
* </tr>
* </table>
* </td>
* </tr>
* </table>
* </td>
* </tr>
* </table>
* @see ZtexDevice1
* @see Ztex1
443,6 → 522,8
public static final int CAPABILITY_HS_FPGA = 5;
/** * Capability index for AVR XMEGA support. */
public static final int CAPABILITY_MAC_EEPROM = 6;
/** * Capability index for multi FPGA support */
public static final int CAPABILITY_MULTI_FPGA = 7;
 
/** * The names of the capabilities */
public static final String capabilityStrings[] = {
452,9 → 533,13
"Debug helper",
"XMEGA support",
"High speed FPGA configuration",
"MAC EEPROM read/write"
"MAC EEPROM read/write",
"Multi FPGA Support"
};
/** * Enables extra FPGA configuration checks. Certain Bistream settings may cause false warnings. */
public boolean enableExtraFpgaConfigurationChecks = false;
 
private boolean fpgaConfigured = false;
private int fpgaChecksum = 0;
private int fpgaBytes = 0;
515,8 → 600,11
public static final int XMEGA_EC_ADDRESS_ERROR = 4;
/** * Signals that the NVM is busy. */
public static final int XMEGA_EC_NVM_BUSY = 5;
 
 
private int numberOfFpgas = -1;
private int selectedFpga = -1;
private boolean parallelConfigSupport = false;
// ******* Ztex1v1 *************************************************************
/**
* Constructs an instance from a given device.
815,10 → 903,16
getFpgaState();
// System.err.println("fpgaConfigred=" + fpgaConfigured + " fpgaBytes="+fpgaBytes + " ("+bs+") fpgaChecksum="+fpgaChecksum + " ("+cs+") fpgaInitB="+fpgaInitB );
if ( ! fpgaConfigured ) {
throw new BitstreamUploadException( "FPGA configuration failed: DONE pin does not go high (size=" + fpgaBytes + " , " + (bs - fpgaBytes) + " bytes went lost; checksum="
throw new BitstreamUploadException( "FPGA configuration failed: DONE pin does not go high (size=" + fpgaBytes + " , " + (bs - fpgaBytes) + " bytes got lost; checksum="
+ fpgaChecksum + " , should be " + cs + "; INIT_B_HIST=" + fpgaInitB +")" );
}
// System.out.println( "FPGA configuration: size=" + fpgaBytes + " , " + (bs - fpgaBytes) + " bytes went lost; checksum=" + fpgaChecksum + " , should be " + cs + "; INIT_B_HIST=" + fpgaInitB );
if ( enableExtraFpgaConfigurationChecks ) {
if ( fpgaBytes!=0 && fpgaBytes!=bs )
System.err.println("Warning: Possible FPGA configuration data loss: " + (bs - fpgaBytes) + " bytes got lost");
if ( fpgaInitB!=222 )
System.err.println("Warning: Possible Bitstream CRC error: INIT_B_HIST=" + fpgaInitB );
}
// System.out.println( "FPGA configuration: size=" + fpgaBytes + " , " + (bs - fpgaBytes) + " bytes got lost; checksum=" + fpgaChecksum + " , should be " + cs + "; INIT_B_HIST=" + fpgaInitB );
tries = 0;
t0 += new Date().getTime();
833,7 → 927,7
}
 
try {
Thread.sleep( 200 );
Thread.sleep( 100 );
}
catch ( InterruptedException e) {
}
1090,7 → 1184,7
 
eepromRead(0, buf, 1);
if ( buf[0] != 0 )
throw new FirmwareUploadException("Error disabeling EEPROM firmware: Verification failed");
throw new FirmwareUploadException("Error disabling EEPROM firmware: Verification failed");
tries = 0;
 
}
2176,7 → 2270,7
* @throws CapabilityException if FPGA configuration is not supported by the firmware.
*/
public long configureFpgaHS ( String fwFileName, boolean force, int bs ) throws BitstreamReadException, UsbException, BitstreamUploadException, AlreadyConfiguredException, InvalidFirmwareException, CapabilityException {
final int transactionBytes = 65536;
final int transactionBytes = 16384;
long t0 = 0;
byte[] settings = new byte[2];
boolean releaseIF;
2230,6 → 2324,12
if ( bs == 1 )
swapBits(buffer,size);
 
// remove NOP's from the end
/* System.out.println(size);
while ( size-2>=0 && buffer[(size-2) / transactionBytes][(size-2) % transactionBytes] == 4 && buffer[(size-1) / transactionBytes][(size-1) % transactionBytes]==0 )
size-=2;
System.out.println(size);
*/
 
// claim interface if required
if ( releaseIF ) claimInterface( settings[1] & 255 );
2237,7 → 2337,7
// System.out.println(size & 127);
// upload the Bitstream file
for ( int tries=1; tries>0; tries-- ) {
for ( int tries=3; tries>0; tries-- ) {
vendorCommand(0x34, "initHSFPGAConfiguration" );
 
2248,30 → 2348,45
int j = size-i*transactionBytes;
if (j>transactionBytes)
j = transactionBytes;
int l = LibusbJava.usb_bulk_write(handle(), settings[0] & 255, buffer[i], j, 1000);
if ( l < 0 )
throw new UsbException("Error sending Bitstream: " + LibusbJava.usb_strerror());
else if ( l != j )
throw new UsbException("Error sending Bitstream: Sent " + l +" of " + j + " bytes");
if ( j>0 ) {
int l = LibusbJava.usb_bulk_write(handle(), settings[0] & 255, buffer[i], j, 1000);
if ( l < 0 )
throw new UsbException("Error sending Bitstream: " + l + ": " + LibusbJava.usb_strerror());
else if ( l != j )
throw new UsbException("Error sending Bitstream: Sent " + l +" of " + j + " bytes");
}
}
 
try {
Thread.sleep( (size % transactionBytes) / 1000 + 10 );
}
catch ( InterruptedException e) {
}
 
vendorCommand(0x35, "finishHSFPGAConfiguration" );
t0 += new Date().getTime();
 
getFpgaState();
// System.err.println("fpgaConfigred=" + fpgaConfigured +" fpgaInitB="+fpgaInitB + " time=" + t0);
// System.err.println("fpgaConfigred=" + fpgaConfigured + " fpgaBytes="+fpgaBytes + " ("+size+") fpgaInitB="+fpgaInitB + " time=" + t0);
if ( ! fpgaConfigured ) {
throw new BitstreamUploadException( "FPGA configuration failed: DONE pin does not go high" );
throw new BitstreamUploadException( "FPGA configuration failed: DONE pin does not go high, possible USB transfer errors (INIT_B_HIST=" + fpgaInitB + (fpgaBytes==0 ? "" : "; " + (size - fpgaBytes) + " bytes got lost") + ")" );
}
 
if ( enableExtraFpgaConfigurationChecks ) {
if ( fpgaBytes!=0 && fpgaBytes!=size )
System.err.println("Warning: Possible FPGA configuration data loss: " + (size - fpgaBytes) + " bytes got lost");
if ( fpgaInitB!=222 )
System.err.println("Warning: Possible Bitstream CRC error: INIT_B_HIST=" + fpgaInitB );
}
tries = 0;
}
catch ( BitstreamUploadException e ) {
if ( tries>1 )
if (tries == 1)
throw e;
else if ( tries<3 || enableExtraFpgaConfigurationChecks )
System.err.println("Warning: " + e.getLocalizedMessage() +": Retrying it ...");
else
throw e;
}
}
2278,7 → 2393,7
if ( releaseIF ) releaseInterface( settings[1] & 255 );
 
try {
Thread.sleep( 200 );
Thread.sleep( 25 );
}
catch ( InterruptedException e) {
}
2409,9 → 2524,60
*/
public void macRead ( byte[] buf ) throws UsbException, InvalidFirmwareException, CapabilityException, IndexOutOfBoundsException {
if ( buf.length < 6 )
throw new IndexOutOfBoundsException( "macRead: Buffer smaller than 6 Bytes" );
throw new IndexOutOfBoundsException( "macRead: Buffer smaller than 6 Bytes" );
macEepromRead(250, buf, 6);
}
 
// ******* numberOfFpgas *******************************************************
/**
* Returns the number of FPGA's
* @throws InvalidFirmwareException if interface 1 is not supported.
* @throws UsbException if a communication error occurs.
* @return number of FPGA's
*/
public int numberOfFpgas ( ) throws UsbException, InvalidFirmwareException {
if ( numberOfFpgas < 0 ) {
try {
byte[] buffer = new byte[3];
checkCapability(CAPABILITY_MULTI_FPGA);
vendorRequest2(0x50, "getMultiFpgaInfo", buffer, 3);
numberOfFpgas = (buffer[0] & 255)+1;
selectedFpga = buffer[1] & 255;
parallelConfigSupport = buffer[2]==1;
}
catch ( CapabilityException e ) {
numberOfFpgas = 1;
selectedFpga = 0;
parallelConfigSupport = false;
}
}
return numberOfFpgas;
}
 
// ******* selectFpga **********************************************************
/**
* Select a FPGA
* @param num FPGA to select. Valid values are 0 to {@link #numberOfFpgas()}-1
* @throws InvalidFirmwareException if interface 1 is not supported.
* @throws UsbException if a communication error occurs.
* @throws IndexOutOfBoundsException If FPGA number is not in range.
*/
public void selectFpga ( int num ) throws UsbException, InvalidFirmwareException, IndexOutOfBoundsException {
numberOfFpgas();
if ( num<0 || num>=numberOfFpgas )
throw new IndexOutOfBoundsException( "selectFPGA: Invalid FPGA number" );
if ( numberOfFpgas != 1 ) {
try {
checkCapability(CAPABILITY_MULTI_FPGA);
vendorCommand( 0x51, "selectFPGA", num, 0);
}
catch ( CapabilityException e ) {
// should'nt occur
}
}
selectedFpga = num;
}
 
}
 
/usb_fpga_1_11/trunk/java/ztex/ZtexDevice1.java
284,7 → 284,7
public String toString () {
return "bus=" + dev().getBus().getDirname() + " device=" + dev().getDevnum() + " (`" + dev().getFilename() + "') ID=" + Integer.toHexString(usbVendorId) + ":" + Integer.toHexString(usbProductId) +"\n" +
( manufacturerString == null ? "" : (" Manufacturer=\"" + manufacturerString + "\"") ) +
( manufacturerString == null ? "" : (" Manufacturer=\"" + manufacturerString + "\"") ) +
( productString == null ? "" : (" Product=\"" + productString + "\"") ) +
( snString == null ? "" : (" SerialNumber=\"" + snString + "\"") ) +
( valid ? "\n productID=" + byteArrayString(productId) + " fwVer="+(fwVersion & 255) + " ifVer="+(interfaceVersion & 255) : "" );
/usb_fpga_1_11/trunk/java/Makefile
4,23 → 4,56
 
ZTEXPREFIX=..
 
JARTARGET=FWLoader.jar
CLASSTARGETS=FWLoader.class
#PREFIX base directory for installing
#default: /usr/local for OS=UNIX and c:\usr else
#e.g. PREFIX=/usr
 
#JAVADIR where to install jar's
#default: $(PREFIX)/share/java
 
#BINDIR where to install bin's
#default: $(PREFIX)/bin
 
#MANDIR where to install mans's
#default: $(PREFIX)/share/man/man1
 
################################
# DO NOT CHANAGE THE FOLLOWING #
################################
 
.PHONY: all jar clean distclean
.PHONY: all jar clean distclean install
 
JARTARGET=FWLoader.jar
CLASSTARGETS=FWLoader.class
 
JAVAC=javac
CLASSPATH:=.:$(ZTEXPREFIX)/libusbJava:$(ZTEXPREFIX)/java:$(CLASSPATH)
INCLUDES=-I $(ZTEXPREFIX)/include/
CLASSEXTRADEPS:=$(shell echo $(ZTEXPREFIX)/java/ztex/*.java)
INSTALL=install
INSTALLDIR=$(INSTALL) -d
INSTALLEXE=$(INSTALL) -m 0755
INSTALLFILE=$(INSTALL) -m 0644
 
CLASSPATH:=.:$(ZTEXPREFIX)/libusbJava:$(ZTEXPREFIX)/java:/usr/local/share/java:/usr/share/java:$(CLASSPATH)
CLASSEXTRADEPS:=$(wildcard ztex/*.java)
 
ifndef PREFIX
PREFIX=/usr/local
endif
 
ifndef JAVADIR
JAVADIR=$(PREFIX)/share/java
endif
 
ifndef BINDIR
BINDIR=$(DESTDIR)$(PREFIX)/bin
endif
 
ifndef MANDIR
MANDIR=$(DESTDIR)$(PREFIX)/share/man/man1
endif
 
all : jar
 
all : $(JARTARGET)
jar : $(JARTARGET)
 
%.class: %.java $(CLASSEXTRADEPS)
$(JAVAC) -cp "$(CLASSPATH)" $< $(CLASSEXTRADEPS)
28,6 → 61,17
$(JARTARGET) : $(CLASSTARGETS) $(EXTRAJARFILES)
jar cf $(JARTARGET) *.class $(EXTRAJARFILES) -C $(ZTEXPREFIX)/libusbJava . $(shell cd $(ZTEXPREFIX)/java; ls ztex/*.class | while read a; do echo "-C $(ZTEXPREFIX)/java $$a"; done)
 
install: $(CLASSTARGETS)
# $(INSTALLDIR) $(JAVADIR)
# jar cf $(JAVADIR)/ztex.jar *.class ztex/*.class
$(INSTALLDIR) $(JAVADIR)/ztex
$(INSTALLFILE) *.class $(JAVADIR)
$(INSTALLFILE) ztex/*.class $(JAVADIR)/ztex
$(INSTALLDIR) $(BINDIR)
$(INSTALLEXE) FWLoader $(BINDIR)
$(INSTALLDIR) $(MANDIR)
$(INSTALLFILE) FWLoader.1 $(MANDIR)
 
clean:
rm -f *~ *.bak *.old
rm -f ztex/*~ ztex/*.bak ztex/*.old
/usb_fpga_1_11/trunk/Makefile.mk
1,4 → 1,4
# This Makefile defines the standard rules for building the project.
# This Makef^ile defines the standard rules for building the project.
#
# The following variables are used:
#
17,7 → 17,7
#
# CLASSEXTRADEPS
# Extra dependencies for Java Classes
# Example: CLASSEXTRADEPS:=$(shell echo $(ZTEXPREFIX)/java/ztex/*.java)
# Example: CLASSEXTRADEPS:=$(wildcard $(ZTEXPREFIX)/java/ztex/*.java)
#
# IHXTARGETS
# ihx files (firmware ROM files) that have to be build
25,7 → 25,7
#
# IHXEXTRADEPS
# Extra Dependencies for ihx files
# Example: IHXEXTRADEPS:=$(shell echo $(ZTEXPREFIX)/include/*.h)
# Example: IHXEXTRADEPS:=$(wildcard $(ZTEXPREFIX)/include/*.h)
#
# EXTRAJARFILES
# Extra files that should be included into the jar archive
41,7 → 41,8
# Extra files that should be cleaned by target "distclean"
 
 
.PHONY: all ihx jar clean distclean default
.PHONY: all ihx jar clean distclean default avr avrclean avrdistclean
.SUFFIXES: .ihx .class .jar .java .c
 
JAVAC=javac
SDCC=$(ZTEXPREFIX)/bin/bmpsdcc.sh
71,3 → 72,12
rm -f $(JARTARGET)
rm -f *.ihx
rm -f $(EXTRADISTCLEANFILES)
avr:
if [ -d avr ]; then make -C avr all; fi
 
avrclean:
if [ -d avr ]; then make -C avr clean; fi
 
avrdistclean:
if [ -d avr ]; then make -C avr distclean; fi
/usb_fpga_1_11/trunk/include/ztex-descriptors.h
50,9 → 50,12
10.*.*.* // used for ZTEX products
10.11.*.* // ZTEX USB-FPGA-Module 1.2
10.12.*.* // ZTEX USB-FPGA-Module 1.11
10.13.*.* // ZTEX USB-FPGA-Module 1.15
10.13.*.* // ZTEX USB-FPGA-Module 1.15 (not 1.15y)
10.14.*.* // ZTEX USB-FPGA-Module 1.15x
10.15.*.* // ZTEX USB-FPGA-Module 1.15y
10.20.*.* // ZTEX USB-Module 1.0
10.30.*.* // ZTEX USB-XMEGA-Module 1.0
10.0.1.1 // ZTEX bitminer firmware
Please contact me (http://www.ztex.de --> Impressum/Kontakt) if you want to register/reserve a Product ID (range).
*/
71,6 → 74,9
0.2 : Flash memory support, see ztex-flash1.h
0.3 : Debug helper, see ztex-debug.h
0.4 : AVR XMEGA support, see ztex-xmega.h
0.5 : High speed FPGA configuration support
0.6 : MAC EEPROM support
0.7 : Multi-FPGA support
*/
__xdata __at ZTEX_DESCRIPTOR_OFFS+12 BYTE INTERFACE_CAPABILITIES[6];
 
172,6 → 178,10
#nolf
+ 64
#endif
#ifdef[@CAPABILITY_MULTI_FPGA;]
#nolf
+ 128
#endif
.db 0
.db 0
.db 0
/usb_fpga_1_11/trunk/include/ztex-fpga4.h
17,7 → 17,7
!*/
 
/*
FPGA support for ZTEX USB FPGA Modules 1.15
FPGA support for ZTEX USB FPGA Modules 1.15 (not 1.15y)
*/
 
#ifndef[ZTEX_FPGA_H]
86,8 → 86,8
***** finish_fpga_configuration *************************************
********************************************************************* */
static void finish_fpga_configuration () {
WORD w;
fpga_init_b += IOC2 ? 20 : 10;
BYTE w;
fpga_init_b += IOC2 ? 22 : 11;
 
for ( w=0; w<64; w++ ) {
IOA4 = 1; IOA4 = 0;
100,7 → 100,6
 
OEA = 0;
OEC &= ~bmBIT3;
fpga_init_b += IOC2 ? 2 : 1;
if ( IOA1 ) {
IOA1 = 1;
post_fpga_config();
207,7 → 206,129
EP0BCL = 2;
,,));;
 
 
#ifeq[UFM_1_15X_DETECTION_ENABLED][1]
/* *********************************************************************
***** interrupt routine for EPn *************************************
********************************************************************* */
xdata WORD old_hsconf_intvec_h, old_hsconf_intvec_l;
static void fpga_hs_send_isr () __interrupt {
BYTE oOEB;
oOEB = OEB;
 
EUSB = 0; // block all USB interrupts
 
fpga_bytes += (EPHS_FPGA_CONF_EPBCH<<8) | EPHS_FPGA_CONF_EPBCL;
 
OEB = 255;
__asm
mov dptr,#_EPHS_FPGA_CONF_EPBCL
movx a,@dptr
mov r2,a
anl a,#7
mov r3,a
mov dptr,#_EPHS_FPGA_CONF_EPBCH
movx a,@dptr
addc a,#0
rrc a
mov r1,a
mov a,r2
rrc a
mov r2,a
 
mov a,r1
rrc a
mov r1,a
mov a,r2
rrc a
mov r2,a
 
mov a,r1
rrc a
mov r1,a
mov a,r2
rrc a
mov r2,a
mov _AUTOPTRL1,#(_EPHS_FPGA_CONF_EPFIFOBUF)
mov _AUTOPTRH1,#(_EPHS_FPGA_CONF_EPFIFOBUF >> 8)
mov _AUTOPTRSETUP,#0x07
mov dptr,#_XAUTODAT1
 
mov a,r3
jz 010011$
010012$:
movx a,@dptr // 2, 1
mov _IOB,a // 2
setb _IOA4 // 2
clr _IOA4 // 2
djnz r3, 010012$ // 4
 
mov a,r2
jz 010010$
010011$:
movx a,@dptr // 2, 1
mov _IOB,a // 2
setb _IOA4 // 2
clr _IOA4 // 2
 
movx a,@dptr // 2, 2
mov _IOB,a // 2
setb _IOA4 // 2
clr _IOA4 // 2
 
movx a,@dptr // 2, 3
mov _IOB,a // 2
setb _IOA4 // 2
clr _IOA4 // 2
 
movx a,@dptr // 2, 4
mov _IOB,a // 2
setb _IOA4 // 2
clr _IOA4 // 2
 
movx a,@dptr // 2, 5
mov _IOB,a // 2
setb _IOA4 // 2
clr _IOA4 // 2
 
movx a,@dptr // 2, 6
mov _IOB,a // 2
setb _IOA4 // 2
clr _IOA4 // 2
 
movx a,@dptr // 2, 7
mov _IOB,a // 2
setb _IOA4 // 2
clr _IOA4 // 2
 
movx a,@dptr // 2, 8
mov _IOB,a // 2
setb _IOA4 // 2
clr _IOA4 // 2
 
djnz r2, 010011$ // 4
010010$:
__endasm;
OEB = oOEB;
 
OUTPKTEND = 0x8HS_FPGA_CONF_EP; // skip package, (re)arm EP
// EPHS_FPGA_CONF_EPBCL = 0x80; // skip package, (re)arm EP
SYNCDELAY;
 
EXIF &= ~bmBIT4;
EPIRQ = 1 << ((HS_FPGA_CONF_EP >> 1)+3);
 
EUSB = 1;
}
#endif
 
/* *********************************************************************
***** EP0 vendor command 0x34 ***************************************
********************************************************************* */
// FIFO write wave form
215,7 → 336,7
{
/* LenBr */ 0x01, 0x88, 0x01, 0x01, 0x01, 0x01, 0x01, 0x07,
/* Opcode*/ 0x02, 0x07, 0x02, 0x02, 0x02, 0x02, 0x02, 0x00,
/* Output*/ 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04,
/* Output*/ 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, // CTL2 <-> 0x04
/* LFun */ 0x00, 0x36, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F,
};
 
223,19 → 344,12
{
/* LenBr */ 0x02, 0x01, 0x90, 0x01, 0x01, 0x01, 0x01, 0x07,
/* Opcode*/ 0x02, 0x02, 0x07, 0x02, 0x02, 0x02, 0x02, 0x00,
/* Output*/ 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04,
/* Output*/ 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, // CTL2 <-> 0x04
/* LFun */ 0x00, 0x00, 0x36, 0x00, 0x00, 0x00, 0x00, 0x3F,
};
 
 
 
ADD_EP0_VENDOR_COMMAND((0x34,, // init fpga configuration
init_fpga_configuration();
 
EPHS_FPGA_CONF_EPCS &= ~bmBIT0; // clear stall bit
 
GPIFABORT = 0xFF; // abort pendig
void init_cpld_fpga_configuration() {
IFCONFIG = bmBIT7 | bmBIT6 | bmBIT5 | 2; // Internal source, 48MHz, GPIF
 
GPIFREADYCFG = 0; //bmBIT7 | bmBIT6 | bmBIT5;
245,7 → 359,7
GPIFWFSELECT = 0x4E;
GPIFREADYSTAT = 0;
 
MEM_COPY1(GPIF_WAVE_DATA_HSFPGA_12MHZ,GPIF_WAVE3_DATA,32);
MEM_COPY1(GPIF_WAVE_DATA_HSFPGA_24MHZ,GPIF_WAVE3_DATA,32);
 
FLOWSTATE = 0;
FLOWLOGIC = 0x10;
287,9 → 401,69
OEA &= ~bmBIT4; // disable CCLK output
OEA |= bmBIT0; // enable GPIF mode of CPLD
IOA0 = 0;
}
 
#ifeq[UFM_1_15X_DETECTION_ENABLED][1]
xdata WORD old_hsconf_intvec_h, old_hsconf_intvec_l;
 
void init_epn_fpga_configuration() {
 
IFCONFIG = bmBIT7;
 
REVCTL = 0x03; // reset fifo
SYNCDELAY;
FIFORESET = 0x80;
SYNCDELAY;
FIFORESET = HS_FPGA_CONF_EP;
SYNCDELAY;
FIFORESET = 0x0;
SYNCDELAY;
 
EPHS_FPGA_CONF_EPFIFOCFG = 0; // config fifo
SYNCDELAY;
// OEA |= bmBIT7;
// IOA7 = 0;
OUTPKTEND = 0x8HS_FPGA_CONF_EP; // skip package, (re)arm EP
SYNCDELAY;
OUTPKTEND = 0x8HS_FPGA_CONF_EP; // skip package, (re)arm EP
SYNCDELAY;
OUTPKTEND = 0x8HS_FPGA_CONF_EP; // skip package, (re)arm EP
SYNCDELAY;
OUTPKTEND = 0x8HS_FPGA_CONF_EP; // skip package, (re)arm EP
SYNCDELAY;
 
/* EPHS_FPGA_CONF_EPBCL = 0x80; // skip package, (re)arm EP
SYNCDELAY;
EPHS_FPGA_CONF_EPBCL = 0x80; // skip package, (re)arm EP
SYNCDELAY;
EPHS_FPGA_CONF_EPBCL = 0x80; // skip package, (re)arm EP
SYNCDELAY;
EPHS_FPGA_CONF_EPBCL = 0x80; // skip package, (re)arm EP
SYNCDELAY; */
 
old_hsconf_intvec_l = INTVEC_EPHS_FPGA_CONF_EP.addrL;
old_hsconf_intvec_h = INTVEC_EPHS_FPGA_CONF_EP.addrH;
INTVEC_EPHS_FPGA_CONF_EP.addrH=((unsigned short)(&fpga_hs_send_isr)) >> 8;
INTVEC_EPHS_FPGA_CONF_EP.addrL=(unsigned short)(&fpga_hs_send_isr);
 
EXIF &= ~bmBIT4;
EPIRQ = 1 << ((HS_FPGA_CONF_EP >> 1)+3);
}
#endif
 
ADD_EP0_VENDOR_COMMAND((0x34,, // init fpga configuration
init_fpga_configuration();
 
EPHS_FPGA_CONF_EPCS &= ~bmBIT0; // clear stall bit
 
GPIFABORT = 0xFF; // abort pendig
#ifeq[UFM_1_15X_DETECTION_ENABLED][1]
if ( is_ufm_1_15x )
init_epn_fpga_configuration();
else
#endif
init_cpld_fpga_configuration();
,,));;
 
 
297,14 → 471,24
***** EP0 vendor command 0x35 ***************************************
********************************************************************* */
ADD_EP0_VENDOR_COMMAND((0x35,, // finish fpga configuration
IOA0 = 1; // disable GPIF mode of CPLD
IOA4 = 1; // enable CCLK output
OEA |= bmBIT4;
#ifeq[UFM_1_15X_DETECTION_ENABLED][1]
if ( is_ufm_1_15x ) {
INTVEC_EPHS_FPGA_CONF_EP.addrL = old_hsconf_intvec_l;
INTVEC_EPHS_FPGA_CONF_EP.addrH = old_hsconf_intvec_h;
}
else
#endif
{
IOA0 = 1; // disable GPIF mode of CPLD
IOA4 = 1; // enable CCLK output
OEA |= bmBIT4;
 
GPIFABORT = 0xFF;
SYNCDELAY;
IFCONFIG &= 0xf0;
SYNCDELAY;
GPIFABORT = 0xFF;
SYNCDELAY;
IFCONFIG &= 0xf0;
SYNCDELAY;
 
}
finish_fpga_configuration();
,,));;
 
/usb_fpga_1_11/trunk/include/ztex-fpga5.h
0,0 → 1,386
/*!
ZTEX Firmware Kit for EZ-USB FX2 Microcontrollers
Copyright (C) 2009-2011 ZTEX GmbH.
http://www.ztex.de
 
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License version 3 as
published by the Free Software Foundation.
 
This program is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
General Public License for more details.
 
You should have received a copy of the GNU General Public License
along with this program; if not, see http://www.gnu.org/licenses/.
!*/
 
/*
FPGA support for ZTEX USB FPGA Modules 1.15y
*/
 
#ifndef[ZTEX_FPGA_H]
#define[ZTEX_FPGA_H]
 
#define[@CAPABILITY_FPGA;]
#define[@CAPABILITY_MULTI_FPGA;]
__xdata BYTE fpga_checksum; // checksum
__xdata DWORD fpga_bytes; // transferred bytes
__xdata BYTE fpga_init_b; // init_b state (should be 222 after configuration)
 
__xdata BYTE select_num;
__xdata BYTE prev_select_num;
__xdata BYTE select_mask;
__xdata BYTE config_mask_h;
__xdata BYTE config_mask_l;
 
 
/* *********************************************************************
***** init_fpga *****************************************************
********************************************************************* */
void init_fpga () {
IOE = 0x1f;
OEE = 0xff;
 
prev_select_num = 0;
select_num = 0;
select_mask = 0x10;
config_mask_h = 0x10;
config_mask_l = 0x01;
}
 
 
/* *********************************************************************
***** reset_fpga ****************************************************
********************************************************************* */
static void reset_fpga () { // reset FPGA
WORD k;
IFCONFIG = bmBIT7;
SYNCDELAY;
PORTACFG = 0;
PORTCCFG = 0;
 
IOC2 = 1; // out: INIT_B
OEC |= bmBIT2;
OEA &= ~bmBIT6; // in: CSO
OEC &= ~bmBIT1; // in: DOUT
 
IOC3 = 0;
OEC |= bmBIT3; // out: RDWR_B
 
// out: CCLK, M1, GPIF, M0, CSI
OEA |= bmBIT1 | bmBIT2 | bmBIT3 | bmBIT5 | bmBIT7;
IOA5 = 0;
IOA |= bmBIT1 | bmBIT2 | bmBIT3 | bmBIT7;
IOE = config_mask_h | ((~config_mask_l) & 0x0f);
OEE = 0xff;
wait(1);
 
IOA7 = 0;
IOA1 = 0;
IOE = config_mask_h | 0x0f;
k=0;
OEC &= ~bmBIT2; // in: INIT_B
while ( (!IOC2) && (k<65535) ) {
k++;
}
 
fpga_init_b = IOC2 ? 200 : 100;
fpga_bytes = 0;
fpga_checksum = 0;
}
 
/* *********************************************************************
***** init_fpga_configuration ***************************************
********************************************************************* */
static void init_fpga_configuration () {
{
PRE_FPGA_RESET
}
reset_fpga(); // reset FPGA
}
 
/* *********************************************************************
***** post_fpga_confog **********************************************
********************************************************************* */
static void post_fpga_config () {
POST_FPGA_CONFIG
}
 
/* *********************************************************************
***** finish_fpga_configuration *************************************
********************************************************************* */
static void finish_fpga_configuration () {
BYTE b;
fpga_init_b += 22;
 
for ( b=0; b<255; b++ ) {
IOA1 = 1; IOA1 = 0;
}
IOA7 = 1;
IOA4 = 1; IOA4 = 0;
IOA4 = 1; IOA4 = 0;
IOA4 = 1; IOA4 = 0;
IOA4 = 1; IOA4 = 0;
 
OEA &= ~(bmBIT1 | bmBIT2 | bmBIT3 | bmBIT7);
OEC &= ~bmBIT3;
OEE = 0xf0;
if ( (IOE & config_mask_l) == config_mask_l ) {
post_fpga_config();
}
 
IOE = select_mask | 0x0f;
OEE = 0xff;
}
 
 
/* *********************************************************************
***** EP0 vendor request 0x30 ***************************************
********************************************************************* */
ADD_EP0_VENDOR_REQUEST((0x30,, // get FPGA state
MEM_COPY1(fpga_checksum,EP0BUF+1,6);
OEE = 0xf0;
if ( (IOE & config_mask_l) == config_mask_l ) {
EP0BUF[0] = 0; // FPGA configured
IOE = select_mask | 0x0f;
OEE = 0xff;
}
else {
EP0BUF[0] = 1; // FPGA unconfigured
reset_fpga(); // prepare FPGA for configuration
}
 
EP0BUF[7] = 0; // not used
EP0BUF[8] = 0; // not used
 
EP0BCH = 0;
EP0BCL = 9;
,,));;
 
 
/* *********************************************************************
***** EP0 vendor command 0x31 ***************************************
********************************************************************* */
ADD_EP0_VENDOR_COMMAND((0x31,,init_fpga_configuration();,,));; // reset FPGA
 
 
/* *********************************************************************
***** EP0 vendor command 0x32 ***************************************
********************************************************************* */
void fpga_send_ep0() { // send FPGA configuration data
BYTE oOEB;
oOEB = OEB;
OEB = 255;
fpga_bytes += ep0_payload_transfer;
__asm
mov dptr,#_EP0BCL
movx a,@dptr
jz 010000$
mov r2,a
mov _AUTOPTRL1,#(_EP0BUF)
mov _AUTOPTRH1,#(_EP0BUF >> 8)
mov _AUTOPTRSETUP,#0x07
mov dptr,#_fpga_checksum
movx a,@dptr
mov r1,a
mov dptr,#_XAUTODAT1
010001$:
movx a,@dptr // 2
mov _IOB,a // 2
setb _IOA1 // 2
add a,r1 // 1
mov r1,a // 1
clr _IOA1 // 2
djnz r2, 010001$ // 4
 
mov dptr,#_fpga_checksum
mov a,r1
movx @dptr,a
010000$:
__endasm;
OEB = oOEB;
if ( EP0BCL<64 ) {
finish_fpga_configuration();
}
}
 
ADD_EP0_VENDOR_COMMAND((0x32,, // send FPGA configuration data
,,
fpga_send_ep0();
));;
 
 
#ifdef[HS_FPGA_CONF_EP]
 
#ifeq[HS_FPGA_CONF_EP][2]
#elifeq[HS_FPGA_CONF_EP][4]
#elifeq[HS_FPGA_CONF_EP][6]
#elifneq[HS_FPGA_CONF_EP][8]
#error[`HS_FPGA_CONF_EP' is not defined correctly. Valid values are: `2', `4', `6', `8'.]
#endif
 
#define[@CAPABILITY_HS_FPGA;]
 
/* *********************************************************************
***** EP0 vendor request 0x33 ***************************************
********************************************************************* */
ADD_EP0_VENDOR_REQUEST((0x33,, // get high speed fpga configuration endpoint and interface
EP0BUF[0] = HS_FPGA_CONF_EP; // endpoint
EP0BUF[1] = EPHS_FPGA_CONF_EP_INTERFACE; // interface
EP0BCH = 0;
EP0BCL = 2;
,,));;
 
 
/* *********************************************************************
***** EP0 vendor command 0x34 ***************************************
********************************************************************* */
// FIFO write wave form
const char __xdata GPIF_WAVE_DATA_HSFPGA_24MHZ[32] =
{
/* LenBr */ 0x01, 0x88, 0x01, 0x01, 0x01, 0x01, 0x01, 0x07,
/* Opcode*/ 0x02, 0x07, 0x02, 0x02, 0x02, 0x02, 0x02, 0x00,
/* Output*/ 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20,
/* LFun */ 0x00, 0x36, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F,
};
 
const char __xdata GPIF_WAVE_DATA_HSFPGA_12MHZ[32] =
{
/* LenBr */ 0x02, 0x01, 0x90, 0x01, 0x01, 0x01, 0x01, 0x07,
/* Opcode*/ 0x02, 0x02, 0x07, 0x02, 0x02, 0x02, 0x02, 0x00,
/* Output*/ 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20,
/* LFun */ 0x00, 0x00, 0x36, 0x00, 0x00, 0x00, 0x00, 0x3F,
};
 
 
void init_cpld_fpga_configuration() {
IFCONFIG = bmBIT7 | bmBIT6 | 2; // Internal source, 48MHz, GPIF
// IFCONFIG = bmBIT7 | 2; // Internal source, 30MHz, GPIF
 
GPIFREADYCFG = 0x0;
GPIFCTLCFG = 0;
GPIFIDLECS = 0;
GPIFIDLECTL = 0x20;
GPIFWFSELECT = 0x4E;
GPIFREADYSTAT = 0;
 
MEM_COPY1(GPIF_WAVE_DATA_HSFPGA_24MHZ,GPIF_WAVE3_DATA,32);
 
FLOWSTATE = 0;
FLOWLOGIC = 0x10;
FLOWEQ0CTL = 0;
FLOWEQ1CTL = 0;
FLOWHOLDOFF = 0;
FLOWSTB = 0;
FLOWSTBEDGE = 0;
FLOWSTBHPERIOD = 0;
 
REVCTL = 0x1; // reset fifo
SYNCDELAY;
FIFORESET = 0x80;
SYNCDELAY;
FIFORESET = HS_FPGA_CONF_EP;
SYNCDELAY;
FIFORESET = 0x0;
SYNCDELAY;
 
EPHS_FPGA_CONF_EPFIFOCFG = 0; // config fifo
SYNCDELAY;
EPHS_FPGA_CONF_EPFIFOCFG = bmBIT4;
SYNCDELAY;
EPHS_FPGA_CONF_EPGPIFFLGSEL = 1;
SYNCDELAY;
 
GPIFTCB3 = 1; // abort after at least 14*65536 transactions
SYNCDELAY;
GPIFTCB2 = 0;
SYNCDELAY;
GPIFTCB1 = 0;
SYNCDELAY;
GPIFTCB0 = 0;
SYNCDELAY;
EPHS_FPGA_CONF_EPGPIFTRIG = 0xff; // arm fifos
SYNCDELAY;
IOA3 = 0;
}
 
 
ADD_EP0_VENDOR_COMMAND((0x34,, // init fpga configuration
init_fpga_configuration();
 
EPHS_FPGA_CONF_EPCS &= ~bmBIT0; // clear stall bit
 
GPIFABORT = 0xFF; // abort pendig
init_cpld_fpga_configuration();
,,));;
 
/* *********************************************************************
***** select_fpga ***************************************************
********************************************************************* */
void select_fpga ( BYTE fn )
{
prev_select_num = select_num;
select_num = fn & 3;
select_mask = 0x10 << fn;
config_mask_h = select_mask;
 
IOE = 0x0f;
{
PRE_FPGA_SELECT
}
IOE = select_mask | 0x0f;
}
 
 
/* *********************************************************************
***** EP0 vendor command 0x35 ***************************************
********************************************************************* */
ADD_EP0_VENDOR_COMMAND((0x35,, // finish fpga configuration
IOA3 = 1; // disable GPIF mode of CPLD
 
GPIFABORT = 0xFF;
SYNCDELAY;
IFCONFIG &= 0xf0;
SYNCDELAY;
 
finish_fpga_configuration();
,,));;
 
#endif // HS_FPGA_CONF_EP
 
 
/* *********************************************************************
***** EP0 vendor request 0x50 ***************************************
********************************************************************* */
ADD_EP0_VENDOR_REQUEST((0x50,, // Return multi-FPGA information
EP0BUF[0] = 3; // 1 FPGA's
EP0BUF[1] = select_num; // select methods: any combination
EP0BUF[2] = 0; // no parallel configuration support
EP0BCH = 0;
EP0BCL = 3;
,,));;
 
/* *********************************************************************
***** EP0 vendor command 0x51 ***************************************
********************************************************************* */
ADD_EP0_VENDOR_COMMAND((0x51,, // select command
if ( SETUPDAT[4] == 1 ) {
config_mask_h = 0xf0;
}
else {
select_fpga( SETUPDAT[2] );
}
config_mask_l = config_mask_h >> 4;
,,
NOP;
));;
 
#endif /*ZTEX_FPGA_H*/
/usb_fpga_1_11/trunk/include/ztex.h
25,6 → 25,14
 
#define[INIT_CMDS;][]
 
#ifneq[PRODUCT_IS][UFM-1_15]
#define[UFM_1_15X_DETECTION_ENABLED][0]
#endif
 
#ifeq[UFM_1_15X_DETECTION_ENABLED][1]
__xdata BYTE is_ufm_1_15x;
#endif
 
/* *********************************************************************
***** include the basic functions ***********************************
********************************************************************* */
39,6 → 47,9
#ifeq[PRODUCT_IS][UFM-1_15]
#define[MAC_EEPROM_ENABLED]
#endif // PRODUCT_IS=UFM-1_15
#ifeq[PRODUCT_IS][UFM-1_15Y]
#define[MAC_EEPROM_ENABLED]
#endif // PRODUCT_IS=UFM-1_15Y
#endif // EEPROM_MAC_DISABLED
 
#include[ztex-eeprom.h]
138,6 → 149,8
#include[ztex-fpga3.h]
#elifeq[PRODUCT_IS][UFM-1_15]
#include[ztex-fpga4.h]
#elifeq[PRODUCT_IS][UFM-1_15Y]
#include[ztex-fpga5.h]
#endif
 
 
191,11 → 204,11
********************************************************************* */
void mac_eeprom_init ( ) {
BYTE b,c,d;
xdata BYTE buf[5];
__xdata BYTE buf[5];
__code char hexdigits[] = "0123456789ABCDEF";
for (b=0; b<10; b++) { // abort if SN != "0000000000"
if ( SN_STRING[b] != '0' )
if ( SN_STRING[b] != 48 )
return;
}
 
255,9 → 268,10
SYNCDELAY;
]
 
 
void init_USB ()
{
USBCS |= 0x08;
USBCS |= bmBIT3;
CPUCS = bmBIT4 | bmBIT1;
wait(2);
281,6 → 295,8
#elifeq[PRODUCT_IS][UFM-1_15]
IOA1 = 1;
OEA |= bmBIT1;
#elifeq[PRODUCT_IS][UFM-1_15Y]
init_fpga();
#endif
 
INIT_CMDS;
322,6 → 338,16
EPXCFG(4);
EPXCFG(6);
EPXCFG(8);
 
#ifeq[UFM_1_15X_DETECTION_ENABLED][1]
OEA &= ~bmBIT3;
if ( IOA3 ) {
is_ufm_1_15x = 0;
} else {
is_ufm_1_15x = 1;
// INTERFACE_CAPABILITIES[0] &= ~32;
}
#endif
#ifeq[FLASH_ENABLED][1]
flash_init();
339,11 → 365,10
mac_eeprom_init();
#endif
 
 
USBCS |= bmBIT7 | bmBIT1;
wait(10);
// wait(250);
USBCS &= ~0x08;
USBCS &= ~bmBIT3;
}
 
 
/usb_fpga_1_11/trunk/include/ztex-fpga-flash.h
75,7 → 75,7
return 3;
 
// read the bitstream
if ( flash_read_init( 1 ) ) // prepare reading sector k
if ( flash_read_init( 1 ) ) // prepare reading sector 1
return 2;
for ( k=1; k<i; k++ ) {
fpga_send_bitstream_from_flash( flash_sector_size );
126,6 → 126,11
********************************************************************* */
// this function is colled by init_USB;
void fpga_configure_from_flash_init() {
if ( ! flash_enabled ) {
fpga_flash_result = 2;
return;
}
 
fpga_flash_result = fpga_configure_from_flash(0);
if ( fpga_flash_result == 1 ) {
post_fpga_config();
/usb_fpga_1_11/trunk/include/ztex-flash1.h
825,7 → 825,7
mmc_clocks(0); // 256 clocks = 32 dummy bytes
n-=32;
}
mmc_clocks(n << 3);
if ( n>0) mmc_clocks(n << 3);
mmc_clocks(16); // 16 CRC clocks
mmc_send_cmd(12, 0.0.0.0, 0); // stop transmission command, errors are ignored
// mmc_wait_busy(); // not required here
890,7 → 890,7
Between flash_write_finish / flash_write_next and flash_write_finish_sector some code
may be executed because flash_write_finish / flash_write_next start with
mmc_wauit_busy().
mmc_wait_busy().
 
Returns an error code (FLASH_EC_*). 0 means no error.
*/
900,7 → 900,7
mmc_clocks(0); // 256 clocks = 32 dummy bytes
n-=32;
}
mmc_clocks(n << 3);
if ( n>0) mmc_clocks(n << 3);
 
MMC_IO |= MMC_bmDI;
mmc_clocks(16); // 16 CRC clocks
946,6 → 946,14
void flash_init() {
BYTE i, j, k;
 
#ifeq[UFM_1_15X_DETECTION_ENABLED][1]
if ( is_ufm_1_15x ) {
flash_enabled = 0;
flash_ec = FLASH_EC_NOTSUPPORTED;
return;
}
#endif
 
flash_enabled = 1;
flash_sector_size = 512;
mmc_version = 0;
/usb_fpga_1_11/trunk/include/ztex-conf.h
75,6 → 75,14
*/
#define[POST_FPGA_CONFIG][]
 
/*
On multi FPGA boards this macro is called betwen deselection and
selection of a FPGA. This can be used to store / resore I/O contents.
To append something to this macro use the following definition:
#define[PRE_FPGA_SELECT][PRE_FPGA_SELECT
...]
*/
#define[PRE_FPGA_SELECT][]
 
 
/*
387,9 → 395,23
#define[PRODUCT_ID_3][$3]
#define[FWVER][$4]
#define[PRODUCT_IS][UFM-1_15]
#define[PRODUCT_STRING]["USB-FPGA Module 1.15"]]
#define[PRODUCT_STRING]["USB-FPGA Module 1.15"]
#define[NUMBER_OF_FPGAS][1]]
 
/*
Identify as ZTEX USB FPGA Module 1.15y
Usage: IDENTITY_UFM_1_10(<PRODUCT_ID_0>.<PRODUCT_ID_1><PRODUCT_ID_2>.<PRODUCT_ID_3>,<FW_VERSION>);
*/
#define[IDENTITY_UFM_1_15Y(][.$1.$2.$3,$4);][#define[PRODUCT_ID_0][$0]
#define[PRODUCT_ID_1][$1]
#define[PRODUCT_ID_2][$2]
#define[PRODUCT_ID_3][$3]
#define[FWVER][$4]
#define[PRODUCT_IS][UFM-1_15Y]
#define[PRODUCT_STRING]["USB-FPGA Module 1.15y"]
#define[NUMBER_OF_FPGAS][4]]
 
 
/*
Identify as ZTEX USB Module 1.0
Usage: IDENTITY_UM_1_0(<PRODUCT_ID_0>.<PRODUCT_ID_1><PRODUCT_ID_2>.<PRODUCT_ID_3>,<FW_VERSION>);
427,17 → 449,10
*/
#define[PRODUCT_STRING]["USB-FPGA Module"]
 
 
/*
This macro defines the Configuration string. Limited to 31 characters.
*/
#define[CONFIGURATION_STRING]["(unknown)"]
 
 
/*
This macro enables defines the Configuration string. Limited to 31 characters.
*/
#define[CONFIGURATION_STRING]["(unknown)"]
#define[CONFIGURATION_STRING]["default"]
 
 
/*
483,7 → 498,7
#define[EXTENSION_EXP_1_10;][#define[EXP_1_10_ENABLED][1]]
 
/*
Enables high speed FPGA configuration for ZTEX USB-FPGA Module 1.15 and 1GbE-USB-FPGA Module 1.20
Enables high speed FPGA configuration for ZTEX USB-FPGA Module 1.15 and 1.15y
Usage: ENABLE_HS_FPGA_CONF(<ENDPOINT>);
<endpoint> endpoint which shall be used (any bulk output can be used)
*/
502,4 → 517,10
*/
#define[DISABLE_MAC_EEPROM;][#define[EEPROM_MAC_DISABLED][1]]
 
/*
Enables detection of USB-FPGA Modules 1.15x. This avoids some warnings and makes the variable is_ufm_1_15x available.
Usage: ENABLE_UFM_1_15X_DETECTION;
*/
#define[ENABLE_UFM_1_15X_DETECTION;][#define[UFM_1_15X_DETECTION_ENABLED][1]]
 
#endif
/usb_fpga_1_11/trunk/include/ztex-isr.h
361,7 → 361,8
void HSGRANT_ISR() __interrupt
{
EXIF &= ~bmBIT4;
USBIRQ = bmBIT5;
// while ( USBIRQ & bmBIT5 )
USBIRQ = bmBIT5;
}
 
/* *********************************************************************
/usb_fpga_1_11/trunk/include/ztex-fpga3.h
85,7 → 85,7
***** finish_fpga_configuration *************************************
********************************************************************* */
static void finish_fpga_configuration () {
WORD w;
BYTE w;
fpga_init_b += IOA0 ? 20 : 10;
 
for ( w=0; w<64; w++ ) {
/usb_fpga_1_11/trunk/UCEcho.java
0,0 → 1,174
/*!
ucecho -- uppercase conversion example for ZTEX USB FPGA Module 1.11
Copyright (C) 2009-2010 ZTEX e.K.
http://www.ztex.de
 
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License version 3 as
published by the Free Software Foundation.
 
This program is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
General Public License for more details.
 
You should have received a copy of the GNU General Public License
along with this program; if not, see http://www.gnu.org/licenses/.
!*/
 
import java.io.*;
import java.util.*;
 
import ch.ntb.usb.*;
 
import ztex.*;
 
// *****************************************************************************
// ******* ParameterException **************************************************
// *****************************************************************************
// Exception the prints a help message
class ParameterException extends Exception {
public final static String helpMsg = new String (
"Parameters:\n"+
" -d <number> Device Number (default: 0)\n" +
" -f Force uploads\n" +
" -p Print bus info\n" +
" -w Enable certain workarounds\n"+
" -h This help" );
public ParameterException (String msg) {
super( msg + "\n" + helpMsg );
}
}
 
// *****************************************************************************
// ******* Test0 ***************************************************************
// *****************************************************************************
class UCEcho extends Ztex1v1 {
 
// ******* UCEcho **************************************************************
// constructor
public UCEcho ( ZtexDevice1 pDev ) throws UsbException {
super ( pDev );
}
 
// ******* echo ****************************************************************
// writes a string to Endpoint 4, reads it back from Endpoint 2 and writes the output to System.out
public String echo ( String input ) throws UsbException {
byte buf[] = input.getBytes();
int i = LibusbJava.usb_bulk_write(handle(), 0x04, buf, buf.length, 1000);
if ( i<0 )
throw new UsbException("Error sending data: " + LibusbJava.usb_strerror());
// System.out.println("Send "+i+" bytes: `"+input+"'" );
 
try {
Thread.sleep( 10 );
}
catch ( InterruptedException e ) {
}
 
buf = new byte[1024];
i = LibusbJava.usb_bulk_read(handle(), 0x82, buf, 1024, 1000);
if ( i<0 )
throw new UsbException("Error receiving data: " + LibusbJava.usb_strerror());
return new String(buf,0,i);
}
// ******* main ****************************************************************
public static void main (String args[]) {
int devNum = 0;
boolean force = false;
boolean workarounds = false;
try {
// init USB stuff
LibusbJava.usb_init();
 
// scan the USB bus
ZtexScanBus1 bus = new ZtexScanBus1( ZtexDevice1.ztexVendorId, ZtexDevice1.ztexProductId, true, false, 1);
if ( bus.numberOfDevices() <= 0) {
System.err.println("No devices found");
System.exit(0);
}
// scan the command line arguments
for (int i=0; i<args.length; i++ ) {
if ( args[i].equals("-d") ) {
i++;
try {
if (i>=args.length) throw new Exception();
devNum = Integer.parseInt( args[i] );
}
catch (Exception e) {
throw new ParameterException("Device number expected after -d");
}
}
else if ( args[i].equals("-f") ) {
force = true;
}
else if ( args[i].equals("-p") ) {
bus.printBus(System.out);
System.exit(0);
}
else if ( args[i].equals("-p") ) {
bus.printBus(System.out);
System.exit(0);
}
else if ( args[i].equals("-w") ) {
workarounds = true;
}
else if ( args[i].equals("-h") ) {
System.err.println(ParameterException.helpMsg);
System.exit(0);
}
else throw new ParameterException("Invalid Parameter: "+args[i]);
}
 
// create the main class
UCEcho ztex = new UCEcho ( bus.device(devNum) );
ztex.certainWorkarounds = workarounds;
// upload the firmware if necessary
if ( force || ! ztex.valid() || ! ztex.dev().productString().equals("ucecho example for UFM 1.11") ) {
System.out.println("Firmware upload time: " + ztex.uploadFirmware( "ucecho.ihx", force ) + " ms");
}
// upload the bitstream if necessary
if ( force || ! ztex.getFpgaConfiguration() ) {
System.out.println("FPGA configuration time: " + ztex.configureFpga( "fpga/ucecho.bin" , force ) + " ms");
}
 
 
// claim interface 0
// ztex.trySetConfiguration ( 1 );
// ztex.claimInterface ( 0 );
// read string from stdin and write it to USB device
String istr = "abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ";
String ostr = "ABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZ";
for ( int i = 0; i<1000; i++ ) {
System.out.println("Firmware upload time: " + ztex.uploadFirmware( "ucecho.ihx", true ) + " ms");
ztex.trySetConfiguration ( 1 );
ztex.claimInterface ( 0 );
System.out.print("\r"+i);
String str = ztex.echo(istr);
if ( ! ostr.equals(str) ) {
System.out.println();
System.out.println("Error: got: "+str);
System.out.println(" expected: "+ostr);
}
}
System.out.println();
// release interface 0
ztex.releaseInterface( 0 );
}
catch (Exception e) {
System.out.println("Error: "+e.getLocalizedMessage() );
}
}
}
/usb_fpga_1_11/trunk/docs/java/index-all.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Mon Jul 18 15:52:41 CEST 2011 -->
<!-- Generated by javadoc (build 1.6.0_18) on Thu Apr 12 22:51:27 CEST 2012 -->
<TITLE>
Index
</TITLE>
 
<META NAME="date" CONTENT="2011-07-18">
<META NAME="date" CONTENT="2012-04-12">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="./stylesheet.css" TITLE="Style">
 
130,6 → 130,9
<DT><A HREF="./ztex/Ztex1v1.html#CAPABILITY_MAC_EEPROM"><B>CAPABILITY_MAC_EEPROM</B></A> -
Static variable in class ztex.<A HREF="./ztex/Ztex1v1.html" title="class in ztex">Ztex1v1</A>
<DD>Capability index for AVR XMEGA support.
<DT><A HREF="./ztex/Ztex1v1.html#CAPABILITY_MULTI_FPGA"><B>CAPABILITY_MULTI_FPGA</B></A> -
Static variable in class ztex.<A HREF="./ztex/Ztex1v1.html" title="class in ztex">Ztex1v1</A>
<DD>Capability index for multi FPGA support
<DT><A HREF="./ztex/Ztex1v1.html#CAPABILITY_XMEGA"><B>CAPABILITY_XMEGA</B></A> -
Static variable in class ztex.<A HREF="./ztex/Ztex1v1.html" title="class in ztex">Ztex1v1</A>
<DD>Capability index for AVR XMEGA support.
272,6 → 275,9
<DT><A HREF="./ztex/Ztex1v1.html#eepromWrite(int, byte[], int)"><B>eepromWrite(int, byte[], int)</B></A> -
Method in class ztex.<A HREF="./ztex/Ztex1v1.html" title="class in ztex">Ztex1v1</A>
<DD>Writes data to the EEPROM.
<DT><A HREF="./ztex/Ztex1v1.html#enableExtraFpgaConfigurationChecks"><B>enableExtraFpgaConfigurationChecks</B></A> -
Variable in class ztex.<A HREF="./ztex/Ztex1v1.html" title="class in ztex">Ztex1v1</A>
<DD>Enables extra FPGA configuration checks.
<DT><A HREF="./ch/ntb/usb/LibusbJava.html#ERROR_BAD_FILE_DESCRIPTOR"><B>ERROR_BAD_FILE_DESCRIPTOR</B></A> -
Static variable in class ch.ntb.usb.<A HREF="./ch/ntb/usb/LibusbJava.html" title="class in ch.ntb.usb">LibusbJava</A>
<DD>System error codes.
793,6 → 799,9
<DT><A HREF="./ztex/ZtexScanBus1.html#numberOfDevices()"><B>numberOfDevices()</B></A> -
Method in class ztex.<A HREF="./ztex/ZtexScanBus1.html" title="class in ztex">ZtexScanBus1</A>
<DD>Returns the number of devices found.
<DT><A HREF="./ztex/Ztex1v1.html#numberOfFpgas()"><B>numberOfFpgas()</B></A> -
Method in class ztex.<A HREF="./ztex/Ztex1v1.html" title="class in ztex">Ztex1v1</A>
<DD>Returns the number of FPGA's
</DL>
<HR>
<A NAME="_O_"><!-- --></A><H2>
936,6 → 945,9
<A NAME="_S_"><!-- --></A><H2>
<B>S</B></H2>
<DL>
<DT><A HREF="./ztex/Ztex1v1.html#selectFpga(int)"><B>selectFpga(int)</B></A> -
Method in class ztex.<A HREF="./ztex/Ztex1v1.html" title="class in ztex">Ztex1v1</A>
<DD>Select a FPGA
<DT><A HREF="./ztex/Ztex1.html#setConfiguration(int)"><B>setConfiguration(int)</B></A> -
Method in class ztex.<A HREF="./ztex/Ztex1.html" title="class in ztex">Ztex1</A>
<DD>Sets the configuration.
/usb_fpga_1_11/trunk/docs/java/allclasses-frame.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Mon Jul 18 15:52:41 CEST 2011 -->
<!-- Generated by javadoc (build 1.6.0_18) on Thu Apr 12 22:51:28 CEST 2012 -->
<TITLE>
All Classes
</TITLE>
 
<META NAME="date" CONTENT="2011-07-18">
<META NAME="date" CONTENT="2012-04-12">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="stylesheet.css" TITLE="Style">
 
/usb_fpga_1_11/trunk/docs/java/constant-values.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Mon Jul 18 15:52:41 CEST 2011 -->
<!-- Generated by javadoc (build 1.6.0_18) on Thu Apr 12 22:51:27 CEST 2012 -->
<TITLE>
Constant Field Values
</TITLE>
 
<META NAME="date" CONTENT="2011-07-18">
<META NAME="date" CONTENT="2012-04-12">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="stylesheet.css" TITLE="Style">
 
568,6 → 568,12
<TD ALIGN="right"><CODE>6</CODE></TD>
</TR>
<TR BGCOLOR="white" CLASS="TableRowColor">
<A NAME="ztex.Ztex1v1.CAPABILITY_MULTI_FPGA"><!-- --></A><TD ALIGN="right"><FONT SIZE="-1">
<CODE>public&nbsp;static&nbsp;final&nbsp;int</CODE></FONT></TD>
<TD ALIGN="left"><CODE><A HREF="ztex/Ztex1v1.html#CAPABILITY_MULTI_FPGA">CAPABILITY_MULTI_FPGA</A></CODE></TD>
<TD ALIGN="right"><CODE>7</CODE></TD>
</TR>
<TR BGCOLOR="white" CLASS="TableRowColor">
<A NAME="ztex.Ztex1v1.CAPABILITY_XMEGA"><!-- --></A><TD ALIGN="right"><FONT SIZE="-1">
<CODE>public&nbsp;static&nbsp;final&nbsp;int</CODE></FONT></TD>
<TD ALIGN="left"><CODE><A HREF="ztex/Ztex1v1.html#CAPABILITY_XMEGA">CAPABILITY_XMEGA</A></CODE></TD>
/usb_fpga_1_11/trunk/docs/java/ch/ntb/usb/Usb_Config_Descriptor.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Mon Jul 18 15:52:41 CEST 2011 -->
<!-- Generated by javadoc (build 1.6.0_18) on Thu Apr 12 22:51:27 CEST 2012 -->
<TITLE>
Usb_Config_Descriptor
</TITLE>
 
<META NAME="date" CONTENT="2011-07-18">
<META NAME="date" CONTENT="2012-04-12">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../../../stylesheet.css" TITLE="Style">
 
/usb_fpga_1_11/trunk/docs/java/ch/ntb/usb/USBTimeoutException.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Mon Jul 18 15:52:41 CEST 2011 -->
<!-- Generated by javadoc (build 1.6.0_18) on Thu Apr 12 22:51:27 CEST 2012 -->
<TITLE>
USBTimeoutException
</TITLE>
 
<META NAME="date" CONTENT="2011-07-18">
<META NAME="date" CONTENT="2012-04-12">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../../../stylesheet.css" TITLE="Style">
 
/usb_fpga_1_11/trunk/docs/java/ch/ntb/usb/LibusbJava.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Mon Jul 18 15:52:41 CEST 2011 -->
<!-- Generated by javadoc (build 1.6.0_18) on Thu Apr 12 22:51:27 CEST 2012 -->
<TITLE>
LibusbJava
</TITLE>
 
<META NAME="date" CONTENT="2011-07-18">
<META NAME="date" CONTENT="2012-04-12">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../../../stylesheet.css" TITLE="Style">
 
/usb_fpga_1_11/trunk/docs/java/ch/ntb/usb/package-frame.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Mon Jul 18 15:52:41 CEST 2011 -->
<!-- Generated by javadoc (build 1.6.0_18) on Thu Apr 12 22:51:27 CEST 2012 -->
<TITLE>
ch.ntb.usb
</TITLE>
 
<META NAME="date" CONTENT="2011-07-18">
<META NAME="date" CONTENT="2012-04-12">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../../../stylesheet.css" TITLE="Style">
 
/usb_fpga_1_11/trunk/docs/java/ch/ntb/usb/package-summary.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Mon Jul 18 15:52:41 CEST 2011 -->
<!-- Generated by javadoc (build 1.6.0_18) on Thu Apr 12 22:51:27 CEST 2012 -->
<TITLE>
ch.ntb.usb
</TITLE>
 
<META NAME="date" CONTENT="2011-07-18">
<META NAME="date" CONTENT="2012-04-12">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../../../stylesheet.css" TITLE="Style">
 
/usb_fpga_1_11/trunk/docs/java/ch/ntb/usb/Usb_Descriptor.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Mon Jul 18 15:52:41 CEST 2011 -->
<!-- Generated by javadoc (build 1.6.0_18) on Thu Apr 12 22:51:27 CEST 2012 -->
<TITLE>
Usb_Descriptor
</TITLE>
 
<META NAME="date" CONTENT="2011-07-18">
<META NAME="date" CONTENT="2012-04-12">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../../../stylesheet.css" TITLE="Style">
 
/usb_fpga_1_11/trunk/docs/java/ch/ntb/usb/Usb_Endpoint_Descriptor.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Mon Jul 18 15:52:41 CEST 2011 -->
<!-- Generated by javadoc (build 1.6.0_18) on Thu Apr 12 22:51:27 CEST 2012 -->
<TITLE>
Usb_Endpoint_Descriptor
</TITLE>
 
<META NAME="date" CONTENT="2011-07-18">
<META NAME="date" CONTENT="2012-04-12">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../../../stylesheet.css" TITLE="Style">
 
/usb_fpga_1_11/trunk/docs/java/ch/ntb/usb/package-tree.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Mon Jul 18 15:52:41 CEST 2011 -->
<!-- Generated by javadoc (build 1.6.0_18) on Thu Apr 12 22:51:27 CEST 2012 -->
<TITLE>
ch.ntb.usb Class Hierarchy
</TITLE>
 
<META NAME="date" CONTENT="2011-07-18">
<META NAME="date" CONTENT="2012-04-12">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../../../stylesheet.css" TITLE="Style">
 
/usb_fpga_1_11/trunk/docs/java/ch/ntb/usb/USB.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Mon Jul 18 15:52:41 CEST 2011 -->
<!-- Generated by javadoc (build 1.6.0_18) on Thu Apr 12 22:51:27 CEST 2012 -->
<TITLE>
USB
</TITLE>
 
<META NAME="date" CONTENT="2011-07-18">
<META NAME="date" CONTENT="2012-04-12">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../../../stylesheet.css" TITLE="Style">
 
/usb_fpga_1_11/trunk/docs/java/ch/ntb/usb/LibLoader.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Mon Jul 18 15:52:41 CEST 2011 -->
<!-- Generated by javadoc (build 1.6.0_18) on Thu Apr 12 22:51:27 CEST 2012 -->
<TITLE>
LibLoader
</TITLE>
 
<META NAME="date" CONTENT="2011-07-18">
<META NAME="date" CONTENT="2012-04-12">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../../../stylesheet.css" TITLE="Style">
 
/usb_fpga_1_11/trunk/docs/java/ch/ntb/usb/Device.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Mon Jul 18 15:52:41 CEST 2011 -->
<!-- Generated by javadoc (build 1.6.0_18) on Thu Apr 12 22:51:27 CEST 2012 -->
<TITLE>
Device
</TITLE>
 
<META NAME="date" CONTENT="2011-07-18">
<META NAME="date" CONTENT="2012-04-12">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../../../stylesheet.css" TITLE="Style">
 
/usb_fpga_1_11/trunk/docs/java/ch/ntb/usb/Utils.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Mon Jul 18 15:52:41 CEST 2011 -->
<!-- Generated by javadoc (build 1.6.0_18) on Thu Apr 12 22:51:27 CEST 2012 -->
<TITLE>
Utils
</TITLE>
 
<META NAME="date" CONTENT="2011-07-18">
<META NAME="date" CONTENT="2012-04-12">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../../../stylesheet.css" TITLE="Style">
 
/usb_fpga_1_11/trunk/docs/java/ch/ntb/usb/Usb_Bus.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Mon Jul 18 15:52:41 CEST 2011 -->
<!-- Generated by javadoc (build 1.6.0_18) on Thu Apr 12 22:51:27 CEST 2012 -->
<TITLE>
Usb_Bus
</TITLE>
 
<META NAME="date" CONTENT="2011-07-18">
<META NAME="date" CONTENT="2012-04-12">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../../../stylesheet.css" TITLE="Style">
 
/usb_fpga_1_11/trunk/docs/java/ch/ntb/usb/Usb_Device_Descriptor.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Mon Jul 18 15:52:41 CEST 2011 -->
<!-- Generated by javadoc (build 1.6.0_18) on Thu Apr 12 22:51:27 CEST 2012 -->
<TITLE>
Usb_Device_Descriptor
</TITLE>
 
<META NAME="date" CONTENT="2011-07-18">
<META NAME="date" CONTENT="2012-04-12">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../../../stylesheet.css" TITLE="Style">
 
/usb_fpga_1_11/trunk/docs/java/ch/ntb/usb/Usb_Interface_Descriptor.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Mon Jul 18 15:52:41 CEST 2011 -->
<!-- Generated by javadoc (build 1.6.0_18) on Thu Apr 12 22:51:27 CEST 2012 -->
<TITLE>
Usb_Interface_Descriptor
</TITLE>
 
<META NAME="date" CONTENT="2011-07-18">
<META NAME="date" CONTENT="2012-04-12">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../../../stylesheet.css" TITLE="Style">
 
/usb_fpga_1_11/trunk/docs/java/ch/ntb/usb/Usb_Device.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Mon Jul 18 15:52:41 CEST 2011 -->
<!-- Generated by javadoc (build 1.6.0_18) on Thu Apr 12 22:51:27 CEST 2012 -->
<TITLE>
Usb_Device
</TITLE>
 
<META NAME="date" CONTENT="2011-07-18">
<META NAME="date" CONTENT="2012-04-12">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../../../stylesheet.css" TITLE="Style">
 
/usb_fpga_1_11/trunk/docs/java/ch/ntb/usb/USBException.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Mon Jul 18 15:52:41 CEST 2011 -->
<!-- Generated by javadoc (build 1.6.0_18) on Thu Apr 12 22:51:27 CEST 2012 -->
<TITLE>
USBException
</TITLE>
 
<META NAME="date" CONTENT="2011-07-18">
<META NAME="date" CONTENT="2012-04-12">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../../../stylesheet.css" TITLE="Style">
 
/usb_fpga_1_11/trunk/docs/java/ch/ntb/usb/Usb_Interface.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Mon Jul 18 15:52:41 CEST 2011 -->
<!-- Generated by javadoc (build 1.6.0_18) on Thu Apr 12 22:51:27 CEST 2012 -->
<TITLE>
Usb_Interface
</TITLE>
 
<META NAME="date" CONTENT="2011-07-18">
<META NAME="date" CONTENT="2012-04-12">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../../../stylesheet.css" TITLE="Style">
 
/usb_fpga_1_11/trunk/docs/java/ztex/BitstreamUploadException.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Mon Jul 18 15:52:41 CEST 2011 -->
<!-- Generated by javadoc (build 1.6.0_18) on Thu Apr 12 22:51:27 CEST 2012 -->
<TITLE>
BitstreamUploadException
</TITLE>
 
<META NAME="date" CONTENT="2011-07-18">
<META NAME="date" CONTENT="2012-04-12">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../stylesheet.css" TITLE="Style">
 
/usb_fpga_1_11/trunk/docs/java/ztex/DeviceLostException.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Mon Jul 18 15:52:41 CEST 2011 -->
<!-- Generated by javadoc (build 1.6.0_18) on Thu Apr 12 22:51:27 CEST 2012 -->
<TITLE>
DeviceLostException
</TITLE>
 
<META NAME="date" CONTENT="2011-07-18">
<META NAME="date" CONTENT="2012-04-12">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../stylesheet.css" TITLE="Style">
 
/usb_fpga_1_11/trunk/docs/java/ztex/Ztex1v1.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Mon Jul 18 15:52:41 CEST 2011 -->
<!-- Generated by javadoc (build 1.6.0_18) on Thu Apr 12 22:51:27 CEST 2012 -->
<TITLE>
Ztex1v1
</TITLE>
 
<META NAME="date" CONTENT="2011-07-18">
<META NAME="date" CONTENT="2012-04-12">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../stylesheet.css" TITLE="Style">
 
188,6 → 188,14
<td bgcolor="#ffffff" valign="top">6</td>
<td bgcolor="#ffffff" valign="top">INIT_B states.</td>
</tr>
<tr>
<td bgcolor="#ffffff" valign="top">7</td>
<td bgcolor="#ffffff" valign="top">Flash configuration result.</td>
</tr>
<tr>
<td bgcolor="#ffffff" valign="top">8</td>
<td bgcolor="#ffffff" valign="top">Flash Bitstreambit order (1=swapped).</td>
</tr>
</table>
</td>
</tr>
421,6 → 429,60
</table>
</td>
</tr>
<tr>
<td bgcolor="#ffffff" valign="top">0.7</td>
<td bgcolor="#ffffff" valign="top" colspan=2>
Multi-FPGA support<p>
<table bgcolor="#404040" cellspacing=1 cellpadding=6>
<tr>
<td bgcolor="#d0d0d0" valign="bottom"><b>Vendor request (VR)<br> or command (VC)</b></td>
<td bgcolor="#d0d0d0" valign="bottom"><b>Description</b></td>
</tr>
<tr>
<td bgcolor="#ffffff" valign="top">VR 0x50</td>
<td bgcolor="#ffffff" valign="top">Return multi-FPGA information:
<table bgcolor="#404040" cellspacing=1 cellpadding=4>
<tr>
<td bgcolor="#d0d0d0" valign="bottom"><b>Bytes</b></td>
<td bgcolor="#d0d0d0" valign="bottom"><b>Description</b></td>
</tr>
<tr>
<td bgcolor="#ffffff" valign="top">0</td>
<td bgcolor="#ffffff" valign="top">Number of FPGA's - 1</td>
</tr>
<tr>
<td bgcolor="#ffffff" valign="top">1</td>
<td bgcolor="#ffffff" valign="top">Selected FPGA - 1</td>
</tr>
<tr>
<td bgcolor="#ffffff" valign="top">2</td>
<td bgcolor="#ffffff" valign="top">Parallel configuration support (0:no, 1:yes)</td>
</tr>
</table>
</td>
</tr>
<tr>
<td bgcolor="#ffffff" valign="top">VC 0x51</td>
<td bgcolor="#ffffff" valign="top">Parameters:
<table bgcolor="#404040" cellspacing=1 cellpadding=4>
<tr>
<td bgcolor="#d0d0d0" valign="bottom"><b>Parameter</b></td>
<td bgcolor="#d0d0d0" valign="bottom"><b>Description</b></td>
</tr>
<tr>
<td bgcolor="#ffffff" valign="top">index</td>
<td bgcolor="#ffffff" valign="top">Select command<br> 0: Select single FPGA <br> 1: Select all FPGA's for configuration</td>
</tr>
<tr>
<td bgcolor="#ffffff" valign="top">value</td>
<td bgcolor="#ffffff" valign="top">FPGA to select - 1</td>
</tr>
</table>
</td>
</tr>
</table>
</td>
</tr>
</table>
<P>
 
490,6 → 552,14
<TR BGCOLOR="white" CLASS="TableRowColor">
<TD ALIGN="right" VALIGN="top" WIDTH="1%"><FONT SIZE="-1">
<CODE>static&nbsp;int</CODE></FONT></TD>
<TD><CODE><B><A HREF="../ztex/Ztex1v1.html#CAPABILITY_MULTI_FPGA">CAPABILITY_MULTI_FPGA</A></B></CODE>
 
<BR>
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;Capability index for multi FPGA support</TD>
</TR>
<TR BGCOLOR="white" CLASS="TableRowColor">
<TD ALIGN="right" VALIGN="top" WIDTH="1%"><FONT SIZE="-1">
<CODE>static&nbsp;int</CODE></FONT></TD>
<TD><CODE><B><A HREF="../ztex/Ztex1v1.html#CAPABILITY_XMEGA">CAPABILITY_XMEGA</A></B></CODE>
 
<BR>
529,6 → 599,14
</TR>
<TR BGCOLOR="white" CLASS="TableRowColor">
<TD ALIGN="right" VALIGN="top" WIDTH="1%"><FONT SIZE="-1">
<CODE>&nbsp;boolean</CODE></FONT></TD>
<TD><CODE><B><A HREF="../ztex/Ztex1v1.html#enableExtraFpgaConfigurationChecks">enableExtraFpgaConfigurationChecks</A></B></CODE>
 
<BR>
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;Enables extra FPGA configuration checks.</TD>
</TR>
<TR BGCOLOR="white" CLASS="TableRowColor">
<TD ALIGN="right" VALIGN="top" WIDTH="1%"><FONT SIZE="-1">
<CODE>static&nbsp;int</CODE></FONT></TD>
<TD><CODE><B><A HREF="../ztex/Ztex1v1.html#FLASH_EC_BUSY">FLASH_EC_BUSY</A></B></CODE>
 
1060,6 → 1138,14
</TR>
<TR BGCOLOR="white" CLASS="TableRowColor">
<TD ALIGN="right" VALIGN="top" WIDTH="1%"><FONT SIZE="-1">
<CODE>&nbsp;int</CODE></FONT></TD>
<TD><CODE><B><A HREF="../ztex/Ztex1v1.html#numberOfFpgas()">numberOfFpgas</A></B>()</CODE>
 
<BR>
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;Returns the number of FPGA's</TD>
</TR>
<TR BGCOLOR="white" CLASS="TableRowColor">
<TD ALIGN="right" VALIGN="top" WIDTH="1%"><FONT SIZE="-1">
<CODE>&nbsp;void</CODE></FONT></TD>
<TD><CODE><B><A HREF="../ztex/Ztex1v1.html#printFpgaState()">printFpgaState</A></B>()</CODE>
 
1084,6 → 1170,14
</TR>
<TR BGCOLOR="white" CLASS="TableRowColor">
<TD ALIGN="right" VALIGN="top" WIDTH="1%"><FONT SIZE="-1">
<CODE>&nbsp;void</CODE></FONT></TD>
<TD><CODE><B><A HREF="../ztex/Ztex1v1.html#selectFpga(int)">selectFpga</A></B>(int&nbsp;num)</CODE>
 
<BR>
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;Select a FPGA</TD>
</TR>
<TR BGCOLOR="white" CLASS="TableRowColor">
<TD ALIGN="right" VALIGN="top" WIDTH="1%"><FONT SIZE="-1">
<CODE>&nbsp;java.lang.String</CODE></FONT></TD>
<TD><CODE><B><A HREF="../ztex/Ztex1v1.html#toString()">toString</A></B>()</CODE>
 
1386,6 → 1480,18
</DL>
<HR>
 
<A NAME="CAPABILITY_MULTI_FPGA"><!-- --></A><H3>
CAPABILITY_MULTI_FPGA</H3>
<PRE>
public static final int <B>CAPABILITY_MULTI_FPGA</B></PRE>
<DL>
<DD>Capability index for multi FPGA support
<P>
<DL>
<DT><B>See Also:</B><DD><A HREF="../constant-values.html#ztex.Ztex1v1.CAPABILITY_MULTI_FPGA">Constant Field Values</A></DL>
</DL>
<HR>
 
<A NAME="capabilityStrings"><!-- --></A><H3>
capabilityStrings</H3>
<PRE>
1398,6 → 1504,18
</DL>
<HR>
 
<A NAME="enableExtraFpgaConfigurationChecks"><!-- --></A><H3>
enableExtraFpgaConfigurationChecks</H3>
<PRE>
public boolean <B>enableExtraFpgaConfigurationChecks</B></PRE>
<DL>
<DD>Enables extra FPGA configuration checks. Certain Bistream settings may cause false warnings.
<P>
<DL>
</DL>
</DL>
<HR>
 
<A NAME="eepromBytes"><!-- --></A><H3>
eepromBytes</H3>
<PRE>
3106,6 → 3224,45
<DD><CODE>java.lang.IndexOutOfBoundsException</CODE> - If the buffer is smaller than 6 bytes.</DL>
</DD>
</DL>
<HR>
 
<A NAME="numberOfFpgas()"><!-- --></A><H3>
numberOfFpgas</H3>
<PRE>
public int <B>numberOfFpgas</B>()
throws <A HREF="../ztex/UsbException.html" title="class in ztex">UsbException</A>,
<A HREF="../ztex/InvalidFirmwareException.html" title="class in ztex">InvalidFirmwareException</A></PRE>
<DL>
<DD>Returns the number of FPGA's
<P>
<DD><DL>
 
<DT><B>Returns:</B><DD>number of FPGA's
<DT><B>Throws:</B>
<DD><CODE><A HREF="../ztex/InvalidFirmwareException.html" title="class in ztex">InvalidFirmwareException</A></CODE> - if interface 1 is not supported.
<DD><CODE><A HREF="../ztex/UsbException.html" title="class in ztex">UsbException</A></CODE> - if a communication error occurs.</DL>
</DD>
</DL>
<HR>
 
<A NAME="selectFpga(int)"><!-- --></A><H3>
selectFpga</H3>
<PRE>
public void <B>selectFpga</B>(int&nbsp;num)
throws <A HREF="../ztex/UsbException.html" title="class in ztex">UsbException</A>,
<A HREF="../ztex/InvalidFirmwareException.html" title="class in ztex">InvalidFirmwareException</A>,
java.lang.IndexOutOfBoundsException</PRE>
<DL>
<DD>Select a FPGA
<P>
<DD><DL>
<DT><B>Parameters:</B><DD><CODE>num</CODE> - FPGA to select. Valid values are 0 to <A HREF="../ztex/Ztex1v1.html#numberOfFpgas()"><CODE>numberOfFpgas()</CODE></A>-1
<DT><B>Throws:</B>
<DD><CODE><A HREF="../ztex/InvalidFirmwareException.html" title="class in ztex">InvalidFirmwareException</A></CODE> - if interface 1 is not supported.
<DD><CODE><A HREF="../ztex/UsbException.html" title="class in ztex">UsbException</A></CODE> - if a communication error occurs.
<DD><CODE>java.lang.IndexOutOfBoundsException</CODE> - If FPGA number is not in range.</DL>
</DD>
</DL>
<!-- ========= END OF CLASS DATA ========= -->
<HR>
 
/usb_fpga_1_11/trunk/docs/java/ztex/IncompatibleFirmwareException.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Mon Jul 18 15:52:41 CEST 2011 -->
<!-- Generated by javadoc (build 1.6.0_18) on Thu Apr 12 22:51:27 CEST 2012 -->
<TITLE>
IncompatibleFirmwareException
</TITLE>
 
<META NAME="date" CONTENT="2011-07-18">
<META NAME="date" CONTENT="2012-04-12">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../stylesheet.css" TITLE="Style">
 
/usb_fpga_1_11/trunk/docs/java/ztex/package-frame.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Mon Jul 18 15:52:41 CEST 2011 -->
<!-- Generated by javadoc (build 1.6.0_18) on Thu Apr 12 22:51:27 CEST 2012 -->
<TITLE>
ztex
</TITLE>
 
<META NAME="date" CONTENT="2011-07-18">
<META NAME="date" CONTENT="2012-04-12">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../stylesheet.css" TITLE="Style">
 
/usb_fpga_1_11/trunk/docs/java/ztex/ZtexIhxFile1.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Mon Jul 18 15:52:41 CEST 2011 -->
<!-- Generated by javadoc (build 1.6.0_18) on Thu Apr 12 22:51:27 CEST 2012 -->
<TITLE>
ZtexIhxFile1
</TITLE>
 
<META NAME="date" CONTENT="2011-07-18">
<META NAME="date" CONTENT="2012-04-12">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../stylesheet.css" TITLE="Style">
 
/usb_fpga_1_11/trunk/docs/java/ztex/JInputStream.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Mon Jul 18 15:52:41 CEST 2011 -->
<!-- Generated by javadoc (build 1.6.0_18) on Thu Apr 12 22:51:27 CEST 2012 -->
<TITLE>
JInputStream
</TITLE>
 
<META NAME="date" CONTENT="2011-07-18">
<META NAME="date" CONTENT="2012-04-12">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../stylesheet.css" TITLE="Style">
 
/usb_fpga_1_11/trunk/docs/java/ztex/package-summary.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Mon Jul 18 15:52:41 CEST 2011 -->
<!-- Generated by javadoc (build 1.6.0_18) on Thu Apr 12 22:51:27 CEST 2012 -->
<TITLE>
ztex
</TITLE>
 
<META NAME="date" CONTENT="2011-07-18">
<META NAME="date" CONTENT="2012-04-12">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../stylesheet.css" TITLE="Style">
 
/usb_fpga_1_11/trunk/docs/java/ztex/package-tree.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Mon Jul 18 15:52:41 CEST 2011 -->
<!-- Generated by javadoc (build 1.6.0_18) on Thu Apr 12 22:51:27 CEST 2012 -->
<TITLE>
ztex Class Hierarchy
</TITLE>
 
<META NAME="date" CONTENT="2011-07-18">
<META NAME="date" CONTENT="2012-04-12">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../stylesheet.css" TITLE="Style">
 
/usb_fpga_1_11/trunk/docs/java/ztex/EzUsb.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Mon Jul 18 15:52:41 CEST 2011 -->
<!-- Generated by javadoc (build 1.6.0_18) on Thu Apr 12 22:51:27 CEST 2012 -->
<TITLE>
EzUsb
</TITLE>
 
<META NAME="date" CONTENT="2011-07-18">
<META NAME="date" CONTENT="2012-04-12">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../stylesheet.css" TITLE="Style">
 
/usb_fpga_1_11/trunk/docs/java/ztex/IhxFile.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Mon Jul 18 15:52:41 CEST 2011 -->
<!-- Generated by javadoc (build 1.6.0_18) on Thu Apr 12 22:51:27 CEST 2012 -->
<TITLE>
IhxFile
</TITLE>
 
<META NAME="date" CONTENT="2011-07-18">
<META NAME="date" CONTENT="2012-04-12">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../stylesheet.css" TITLE="Style">
 
/usb_fpga_1_11/trunk/docs/java/ztex/ZtexScanBus1.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Mon Jul 18 15:52:41 CEST 2011 -->
<!-- Generated by javadoc (build 1.6.0_18) on Thu Apr 12 22:51:27 CEST 2012 -->
<TITLE>
ZtexScanBus1
</TITLE>
 
<META NAME="date" CONTENT="2011-07-18">
<META NAME="date" CONTENT="2012-04-12">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../stylesheet.css" TITLE="Style">
 
/usb_fpga_1_11/trunk/docs/java/ztex/ZtexDevice1.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Mon Jul 18 15:52:41 CEST 2011 -->
<!-- Generated by javadoc (build 1.6.0_18) on Thu Apr 12 22:51:27 CEST 2012 -->
<TITLE>
ZtexDevice1
</TITLE>
 
<META NAME="date" CONTENT="2011-07-18">
<META NAME="date" CONTENT="2012-04-12">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../stylesheet.css" TITLE="Style">
 
/usb_fpga_1_11/trunk/docs/java/ztex/CapabilityException.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Mon Jul 18 15:52:41 CEST 2011 -->
<!-- Generated by javadoc (build 1.6.0_18) on Thu Apr 12 22:51:27 CEST 2012 -->
<TITLE>
CapabilityException
</TITLE>
 
<META NAME="date" CONTENT="2011-07-18">
<META NAME="date" CONTENT="2012-04-12">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../stylesheet.css" TITLE="Style">
 
/usb_fpga_1_11/trunk/docs/java/ztex/FirmwareUploadException.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Mon Jul 18 15:52:41 CEST 2011 -->
<!-- Generated by javadoc (build 1.6.0_18) on Thu Apr 12 22:51:27 CEST 2012 -->
<TITLE>
FirmwareUploadException
</TITLE>
 
<META NAME="date" CONTENT="2011-07-18">
<META NAME="date" CONTENT="2012-04-12">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../stylesheet.css" TITLE="Style">
 
/usb_fpga_1_11/trunk/docs/java/ztex/InvalidFirmwareException.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Mon Jul 18 15:52:41 CEST 2011 -->
<!-- Generated by javadoc (build 1.6.0_18) on Thu Apr 12 22:51:27 CEST 2012 -->
<TITLE>
InvalidFirmwareException
</TITLE>
 
<META NAME="date" CONTENT="2011-07-18">
<META NAME="date" CONTENT="2012-04-12">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../stylesheet.css" TITLE="Style">
 
/usb_fpga_1_11/trunk/docs/java/ztex/IhxParseException.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Mon Jul 18 15:52:41 CEST 2011 -->
<!-- Generated by javadoc (build 1.6.0_18) on Thu Apr 12 22:51:27 CEST 2012 -->
<TITLE>
IhxParseException
</TITLE>
 
<META NAME="date" CONTENT="2011-07-18">
<META NAME="date" CONTENT="2012-04-12">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../stylesheet.css" TITLE="Style">
 
/usb_fpga_1_11/trunk/docs/java/ztex/DeviceNotSupportedException.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Mon Jul 18 15:52:41 CEST 2011 -->
<!-- Generated by javadoc (build 1.6.0_18) on Thu Apr 12 22:51:27 CEST 2012 -->
<TITLE>
DeviceNotSupportedException
</TITLE>
 
<META NAME="date" CONTENT="2011-07-18">
<META NAME="date" CONTENT="2012-04-12">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../stylesheet.css" TITLE="Style">
 
/usb_fpga_1_11/trunk/docs/java/ztex/BitstreamReadException.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Mon Jul 18 15:52:41 CEST 2011 -->
<!-- Generated by javadoc (build 1.6.0_18) on Thu Apr 12 22:51:27 CEST 2012 -->
<TITLE>
BitstreamReadException
</TITLE>
 
<META NAME="date" CONTENT="2011-07-18">
<META NAME="date" CONTENT="2012-04-12">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../stylesheet.css" TITLE="Style">
 
/usb_fpga_1_11/trunk/docs/java/ztex/AlreadyConfiguredException.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Mon Jul 18 15:52:41 CEST 2011 -->
<!-- Generated by javadoc (build 1.6.0_18) on Thu Apr 12 22:51:27 CEST 2012 -->
<TITLE>
AlreadyConfiguredException
</TITLE>
 
<META NAME="date" CONTENT="2011-07-18">
<META NAME="date" CONTENT="2012-04-12">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../stylesheet.css" TITLE="Style">
 
/usb_fpga_1_11/trunk/docs/java/ztex/UsbException.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Mon Jul 18 15:52:41 CEST 2011 -->
<!-- Generated by javadoc (build 1.6.0_18) on Thu Apr 12 22:51:27 CEST 2012 -->
<TITLE>
UsbException
</TITLE>
 
<META NAME="date" CONTENT="2011-07-18">
<META NAME="date" CONTENT="2012-04-12">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../stylesheet.css" TITLE="Style">
 
/usb_fpga_1_11/trunk/docs/java/ztex/IhxFileDamagedException.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Mon Jul 18 15:52:41 CEST 2011 -->
<!-- Generated by javadoc (build 1.6.0_18) on Thu Apr 12 22:51:27 CEST 2012 -->
<TITLE>
IhxFileDamagedException
</TITLE>
 
<META NAME="date" CONTENT="2011-07-18">
<META NAME="date" CONTENT="2012-04-12">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../stylesheet.css" TITLE="Style">
 
/usb_fpga_1_11/trunk/docs/java/ztex/Ztex1.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Mon Jul 18 15:52:41 CEST 2011 -->
<!-- Generated by javadoc (build 1.6.0_18) on Thu Apr 12 22:51:27 CEST 2012 -->
<TITLE>
Ztex1
</TITLE>
 
<META NAME="date" CONTENT="2011-07-18">
<META NAME="date" CONTENT="2012-04-12">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../stylesheet.css" TITLE="Style">
 
/usb_fpga_1_11/trunk/docs/java/help-doc.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Mon Jul 18 15:52:41 CEST 2011 -->
<!-- Generated by javadoc (build 1.6.0_18) on Thu Apr 12 22:51:28 CEST 2012 -->
<TITLE>
API Help
</TITLE>
 
<META NAME="date" CONTENT="2011-07-18">
<META NAME="date" CONTENT="2012-04-12">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="stylesheet.css" TITLE="Style">
 
/usb_fpga_1_11/trunk/docs/java/serialized-form.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Mon Jul 18 15:52:41 CEST 2011 -->
<!-- Generated by javadoc (build 1.6.0_18) on Thu Apr 12 22:51:27 CEST 2012 -->
<TITLE>
Serialized Form
</TITLE>
 
<META NAME="date" CONTENT="2011-07-18">
<META NAME="date" CONTENT="2012-04-12">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="stylesheet.css" TITLE="Style">
 
/usb_fpga_1_11/trunk/docs/java/overview-frame.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Mon Jul 18 15:52:41 CEST 2011 -->
<!-- Generated by javadoc (build 1.6.0_18) on Thu Apr 12 22:51:27 CEST 2012 -->
<TITLE>
Overview List
</TITLE>
 
<META NAME="date" CONTENT="2011-07-18">
<META NAME="date" CONTENT="2012-04-12">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="stylesheet.css" TITLE="Style">
 
/usb_fpga_1_11/trunk/docs/java/overview-summary.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Mon Jul 18 15:52:41 CEST 2011 -->
<!-- Generated by javadoc (build 1.6.0_18) on Thu Apr 12 22:51:28 CEST 2012 -->
<TITLE>
Overview
</TITLE>
 
<META NAME="date" CONTENT="2011-07-18">
<META NAME="date" CONTENT="2012-04-12">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="stylesheet.css" TITLE="Style">
 
/usb_fpga_1_11/trunk/docs/java/overview-tree.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Mon Jul 18 15:52:41 CEST 2011 -->
<!-- Generated by javadoc (build 1.6.0_18) on Thu Apr 12 22:51:27 CEST 2012 -->
<TITLE>
Class Hierarchy
</TITLE>
 
<META NAME="date" CONTENT="2011-07-18">
<META NAME="date" CONTENT="2012-04-12">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="stylesheet.css" TITLE="Style">
 
/usb_fpga_1_11/trunk/docs/java/index.html
2,7 → 2,7
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc on Mon Jul 18 15:52:41 CEST 2011-->
<!-- Generated by javadoc on Thu Apr 12 22:51:28 CEST 2012-->
<TITLE>
Generated Documentation (Untitled)
</TITLE>
/usb_fpga_1_11/trunk/docs/java/deprecated-list.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Mon Jul 18 15:52:41 CEST 2011 -->
<!-- Generated by javadoc (build 1.6.0_18) on Thu Apr 12 22:51:28 CEST 2012 -->
<TITLE>
Deprecated List
</TITLE>
 
<META NAME="date" CONTENT="2011-07-18">
<META NAME="date" CONTENT="2012-04-12">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="stylesheet.css" TITLE="Style">
 
/usb_fpga_1_11/trunk/docs/java/allclasses-noframe.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Mon Jul 18 15:52:41 CEST 2011 -->
<!-- Generated by javadoc (build 1.6.0_18) on Thu Apr 12 22:51:28 CEST 2012 -->
<TITLE>
All Classes
</TITLE>
 
<META NAME="date" CONTENT="2011-07-18">
<META NAME="date" CONTENT="2012-04-12">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="stylesheet.css" TITLE="Style">
 
/usb_fpga_1_11/trunk/makecopyright
1,4 → 1,4
#!/bin/sh
#!/bin/bash
#
# makecopyright - put a copyright info into source files
# Copyright (C) 2009-2011 ZTEX GmbH., http://www.ztex.de
/usb_fpga_1_11/trunk/libusbJava-src/build-w32.sh
1,3 → 1,5
#!/bin/bash
 
export PATH=/drv_t1/mingw/w32/bin:$PATH
triple=i686-pc-mingw32
JAVAPREFIX=/usr/local/java
/usb_fpga_1_11/trunk/libusbJava-src/build-w64.sh
1,3 → 1,5
#!/bin/bash
 
export PATH=/drv_t1/mingw/w64/bin:$PATH
triple=x86_64-w64-mingw32
JAVAPREFIX=/usr/local/java
/usb_fpga_1_11/trunk/libusbJava-src/Makefile.macosx
0,0 → 1,75
# Makefile for libusbJava, a Java libusb wrapper
# Copyright (C) 2009-2011 ZTEX GmbH
# http://www.ztex.de
#
# This Makefile ia a part of the reorganized version of the libusbJava source tree
# with proper makefiles. (SVN version of Apr. 6, 2009).
#
# Please visit http://libusbjava.sourceforge.net for more information about the
# original project.
 
#########################
# Configuration section #
#########################
 
# $(JAVAINCLUDE) should contain jni.h
JAVAINCLUDE=/System/Library/Frameworks/JavaVM.framework/Versions/A/Headers/
 
# location of local libraries, depends on the used port system
LOCALDIR=/usr/local
# LOCALDIR=/sw
 
###############################
# this should not be modified #
###############################
GCC=gcc
STRIP=strip -S
CHMOD=chmod -x
JAVAC=javac
RM=rm -f
ARCH=$(shell getconf LONG_BIT)
INSTALL=install
INSTALLDIR=$(INSTALL) -d
INSTALLEXE=$(INSTALL) -m 0755
INSTALLFILE=$(INSTALL) -m 0644
OBJEXTRADEPS=LibusbJava.h
LIBSRCS=LibusbJava.c
JAVASRCS=$(shell echo ch/ntb/usb/*.java) $(shell echo ch/ntb/usb/logger/*.java)
 
LIBTARGET=libusbJava.jnilib
LIBLIBS=-lusb -L${LOCALDIR}/lib
LIBINCS=-I $(JAVAINCLUDE) -I ${LOCALDIR}/include
 
.PHONY: all libs classes install install2 clean distclean
 
all: libs classes
 
classes: classes.made
 
libs: ${LIBTARGET}
 
%.o: %.c LibusbJava.h
$(GCC) -fPIC -g -c -std=c99 -Wall -Wno-pointer-to-int-cast $(LIBINCS) $< -o$@
 
$(LIBTARGET): $(LIBSRCS)
$(GCC) -fPIC -std=c99 -Wall -Wno-pointer-to-int-cast -bundle $(LIBINCS) $(LIBSRCS) $(LIBLIBS) -o $(LIBTARGET)
$(STRIP) $(LIBTARGET)
$(CHMOD) $(LIBTARGET)
 
classes.made: $(JAVASRCS)
$(JAVAC) $(JAVASRCS)
echo > classes.made
 
doc:
javadoc ch.ntb.usb -d ../docs/libusbJava ch/ntb/usb/logger/*.class
install2: all
$(INSTALLDIR) ../libusbJava/ch/ntb/usb/logger
$(INSTALLFILE) $(LIBTARGET) ../libusbJava
$(INSTALLFILE) ch/ntb/usb/*.class ../libusbJava/ch/ntb/usb
$(INSTALLFILE) ch/ntb/usb/logger/*.class ../libusbJava/ch/ntb/usb/logger
 
clean:
 
distclean:
$(RM) *.o $(LIBTARGET) ch/ntb/usb/*.class ch/ntb/usb/logger/*.class classes.made
/usb_fpga_1_11/trunk/libusbJava-src/ch/ntb/usb/LibusbJava.java
370,18 → 370,26
LibLoader.load( "libusbJava32" );
}
}
else if ( System.getProperty("os.arch").equalsIgnoreCase("amd64") ) {
LibLoader.load( "usbJava64" );
// System.err.println("loaded libusbJava64");
}
else {
try {
LibLoader.load( "usbJavaSh" );
// System.err.println("loaded libusbJavaSh");
LibLoader.load( "usbJava" );
// System.err.println("loaded libusbJava");
}
catch ( UnsatisfiedLinkError e ) {
LibLoader.load( "usbJavaSt" );
// System.err.println("loaded libusbJavaSt");
if ( System.getProperty("os.arch").equalsIgnoreCase("amd64") || System.getProperty("os.arch").equalsIgnoreCase("x86_64") ) {
LibLoader.load( "usbJava64" );
// System.err.println("loaded libusbJava64");
}
else {
try {
LibLoader.load( "usbJavaSh" );
// System.err.println("loaded libusbJavaSh");
}
catch ( UnsatisfiedLinkError e2 ) {
LibLoader.load( "usbJavaSt" );
// System.err.println("loaded libusbJavaSt");
}
}
}
}
// define the error codes
/usb_fpga_1_11/trunk/libusbJava-src/Makefile
1,5 → 1,5
# Makefile for libusbJava, a Java libusb wrapper
# Copyright (C) 2009 ZTEX e.K.
# Copyright (C) 2009-2011 ZTEX GmbH
# http://www.ztex.de
#
# This Makefile ia a part of the reorganized version of the libusbJava source tree
15,11 → 15,21
# $(JAVAPREFIX)/include should contain jni.h
JAVAPREFIX=/usr/local/java
 
#PREFIX base directory for installing
#default: /usr/local for OS=UNIX and c:\usr else
#e.g. PREFIX=/usr
 
#JAVADIR where to install jar's
#default: $(PREFIX)/share/java
 
#LIBDIR where to install jar's
#default: $(PREFIX)/lib
 
###############################
# this should not be modified #
###############################
GCC=gcc
STRIP=strip
STRIP=strip -S
CHMOD=chmod -x
JAVAC=javac
RM=rm -f
30,8 → 40,9
OBJEXTRADEPS=LibusbJava.h
LIBSRCS=LibusbJava.o
LIBSRCS64=LibusbJava.c
JAVASRCS=$(shell echo ch/ntb/usb/*.java) $(shell echo ch/ntb/usb/logger/*.java)
JAVASRCS=$(wildcard ch/ntb/usb/*.java) $(wildcard ch/ntb/usb/logger/*.java)
 
LIBTARGET=libusbJava.so
LIBTARGET_SH=libusbJavaSh.so
LIBTARGET_ST=libusbJavaSt.so
LIBTARGET_64=libusbJava64.so
38,10 → 49,24
LIBLIBS=-lusb
LIBINCS=-I $(JAVAPREFIX)/include -I $(JAVAPREFIX)/include/linux
 
.PHONY: all libs classes install2 clean distclean
ifndef PREFIX
PREFIX=/usr/local
endif
 
ifndef JAVADIR
JAVADIR=$(PREFIX)/share/java
endif
 
ifndef LIBDIR
LIBDIR=$(PREFIX)/lib
endif
 
.PHONY: all native-all libs classes install install2 clean distclean
 
all: libs classes
 
native-all: $(LIBTARGET) classes
 
classes: classes.made
 
libs: $(LIBTARGET_SH) $(LIBTARGET_ST) $(LIBTARGET_64)
60,6 → 85,11
$(STRIP) $(LIBTARGET_SH)
$(CHMOD) $(LIBTARGET_SH)
 
$(LIBTARGET): $(LIBSRCS)
$(GCC) -fPIC -shared -Wl,-soname,$(LIBTARGET) $(LIBINCS) $(LIBSRCS) -o $(LIBTARGET) $(LIBLIBS)
$(STRIP) $(LIBTARGET)
$(CHMOD) $(LIBTARGET)
 
$(LIBTARGET_64): $(LIBSRCS64)
$(GCC) -fPIC -m64 -shared -std=c99 -Wall -Wno-pointer-to-int-cast -Wl,-soname,$(LIBTARGET_64) $(LIBINCS) $(LIBSRCS64) $(LIBLIBS) -o $(LIBTARGET_64)
$(STRIP) $(LIBTARGET_64)
69,8 → 99,16
$(JAVAC) $(JAVASRCS)
echo > classes.made
 
install: native-all
# $(INSTALLDIR) $(JAVADIR)
# jar cf $(JAVADIR)/libusbJava.jar ch/ntb/usb/*.class
$(INSTALLDIR) $(JAVADIR)/ch/ntb/usb
$(INSTALLFILE) ch/ntb/usb/*.class $(JAVADIR)/ch/ntb/usb
$(INSTALLDIR) $(LIBDIR)
$(INSTALLFILE) $(LIBTARGET) $(LIBDIR)
 
doc:
javadoc ch.ntb.usb -d ../docs/libusbJava
javadoc ch.ntb.usb -d ../docs/libusbJava ch/ntb/usb/logger/*.class
install2: all
$(INSTALLDIR) ../libusbJava/ch/ntb/usb/logger
83,4 → 121,4
clean:
 
distclean:
$(RM) *.o $(LIBTARGET_SH) $(LIBTARGET_ST) $(LIBTARGET_64) libusbJava*.dll ch/ntb/usb/*.class ch/ntb/usb/logger/*.class classes.made
$(RM) *.o $(LIBTARGET) $(LIBTARGET_SH) $(LIBTARGET_ST) $(LIBTARGET_64) libusbJava*.dll ch/ntb/usb/*.class ch/ntb/usb/logger/*.class classes.made
/usb_fpga_1_11/trunk/bin/bmpsdcc.sh
1,8 → 1,18
#!/bin/bash
 
if [ "$1" = "" ]; then
echo "Usage: $0 <C file> <bmp flags> <sdcc flags>"
exit 1
fi
 
SDCC=$(which sdcc)
if [ -z "$SDCC" ]; then
echo "E: bmpsdcc: sdcc is not in PATH."
echo "I: sdcc is not related with ztex and ships with many Linux distributions or "
echo " is available at http://sdcc.sourceforge.net/ ."
exit 1
fi
 
exe=""
if [ "$WINDIR" != "" ]; then
exe=".exe"
16,9 → 26,12
 
if [ -f "$BINDIR/peeph.def" ]; then
PEEPH="--peep-file $BINDIR/peeph.def"
elif [ -f "/usr/local/share/ztex/peeph.def" ]; then
PEEPH="$PEEPH --peep-file /usr/local/share/ztex/peeph.def"
elif [ -f "/usr/share/ztex/peeph.def" ]; then
PEEPH="$PEEPH --peep-file /usr/share/ztex/peeph.def"
fi
 
 
inp="$1"
if [ ! -f "$inp" -a -f "$inp.c" ]; then
inp="$1.c"
43,7 → 56,7
exit $ec
fi
 
sdcc -mmcs51 --code-loc 0x0200 --code-size 0x3800 --xram-loc 0x3A00 --xram-size 0x600 --iram-size 256 $PEEPH $3 $base.tmp.c -o $base.ihx
"$SDCC" -mmcs51 --code-loc 0x0200 --code-size 0x3800 --xram-loc 0x3A00 --xram-size 0x600 --iram-size 256 $PEEPH $3 $base.tmp.c -o $base.ihx
ec="$?"
if [ "$ec" != 0 ]; then
exit $ec
/usb_fpga_1_11/trunk/Makefile
1,6 → 1,6
DIRS=bmp examples java libusbJava-src
 
.PHONY: default all docs clean distclean
.PHONY: default all clean distclean avr avrclean avrdistclean
 
default:
@echo "This makefile is intended to clean up the project or to build the utilties and examples"
14,7 → 14,16
make -C docs all
 
clean:
for i in $(DIRS); do make -C $$i clean; done
set -e; for i in $(DIRS); do make -C $$i clean; done
 
distclean: clean
for i in $(DIRS); do make -C $$i distclean; done
distclean:
set -e; for i in $(DIRS); do make -C $$i distclean; done
 
avr:
make -C examples avr
 
avrclean:
make -C examples avrclean
 
avrdistclean:
make -C examples avrdistclean
/usb_fpga_1_11/trunk/bmp/configure
1,4 → 1,4
#!/bin/sh
#!/bin/bash
# Makefile.config -- script for automatic configuration of Makefile variables
# Copyright (C) 2002-2003 Stefan Ziegenbalg
 
/usb_fpga_1_11/trunk/bmp/src/bmp.pas
303,14 → 303,14
end;
 
constructor CMacroBuf.insert(var mb:CMacroBuf);
var tmp : CMacroBuf;
var db : CTextBuf;
begin
tmp:=mb;
inherited create(mb, macrobuf_size);
last:=tmp.last;
tmp.last:=self;
mac:=tmp.mac;
tmp.mac:=nil;
inherited create(db, macrobuf_size);
last:=mb.last;
mb.last:=self;
mac:=mb.mac;
mb.mac:=nil;
mb:=self;
end;
{ ****** destroy ***************************************************** }
/usb_fpga_1_11/trunk/bmp/COPYING
0,0 → 1,674
GNU GENERAL PUBLIC LICENSE
Version 3, 29 June 2007
 
Copyright (C) 2007 Free Software Foundation, Inc. <http://fsf.org/>
Everyone is permitted to copy and distribute verbatim copies
of this license document, but changing it is not allowed.
 
Preamble
 
The GNU General Public License is a free, copyleft license for
software and other kinds of works.
 
The licenses for most software and other practical works are designed
to take away your freedom to share and change the works. By contrast,
the GNU General Public License is intended to guarantee your freedom to
share and change all versions of a program--to make sure it remains free
software for all its users. We, the Free Software Foundation, use the
GNU General Public License for most of our software; it applies also to
any other work released this way by its authors. You can apply it to
your programs, too.
 
When we speak of free software, we are referring to freedom, not
price. Our General Public Licenses are designed to make sure that you
have the freedom to distribute copies of free software (and charge for
them if you wish), that you receive source code or can get it if you
want it, that you can change the software or use pieces of it in new
free programs, and that you know you can do these things.
 
To protect your rights, we need to prevent others from denying you
these rights or asking you to surrender the rights. Therefore, you have
certain responsibilities if you distribute copies of the software, or if
you modify it: responsibilities to respect the freedom of others.
 
For example, if you distribute copies of such a program, whether
gratis or for a fee, you must pass on to the recipients the same
freedoms that you received. You must make sure that they, too, receive
or can get the source code. And you must show them these terms so they
know their rights.
 
Developers that use the GNU GPL protect your rights with two steps:
(1) assert copyright on the software, and (2) offer you this License
giving you legal permission to copy, distribute and/or modify it.
 
For the developers' and authors' protection, the GPL clearly explains
that there is no warranty for this free software. For both users' and
authors' sake, the GPL requires that modified versions be marked as
changed, so that their problems will not be attributed erroneously to
authors of previous versions.
 
Some devices are designed to deny users access to install or run
modified versions of the software inside them, although the manufacturer
can do so. This is fundamentally incompatible with the aim of
protecting users' freedom to change the software. The systematic
pattern of such abuse occurs in the area of products for individuals to
use, which is precisely where it is most unacceptable. Therefore, we
have designed this version of the GPL to prohibit the practice for those
products. If such problems arise substantially in other domains, we
stand ready to extend this provision to those domains in future versions
of the GPL, as needed to protect the freedom of users.
 
Finally, every program is threatened constantly by software patents.
States should not allow patents to restrict development and use of
software on general-purpose computers, but in those that do, we wish to
avoid the special danger that patents applied to a free program could
make it effectively proprietary. To prevent this, the GPL assures that
patents cannot be used to render the program non-free.
 
The precise terms and conditions for copying, distribution and
modification follow.
 
TERMS AND CONDITIONS
 
0. Definitions.
 
"This License" refers to version 3 of the GNU General Public License.
 
"Copyright" also means copyright-like laws that apply to other kinds of
works, such as semiconductor masks.
 
"The Program" refers to any copyrightable work licensed under this
License. Each licensee is addressed as "you". "Licensees" and
"recipients" may be individuals or organizations.
 
To "modify" a work means to copy from or adapt all or part of the work
in a fashion requiring copyright permission, other than the making of an
exact copy. The resulting work is called a "modified version" of the
earlier work or a work "based on" the earlier work.
 
A "covered work" means either the unmodified Program or a work based
on the Program.
 
To "propagate" a work means to do anything with it that, without
permission, would make you directly or secondarily liable for
infringement under applicable copyright law, except executing it on a
computer or modifying a private copy. Propagation includes copying,
distribution (with or without modification), making available to the
public, and in some countries other activities as well.
 
To "convey" a work means any kind of propagation that enables other
parties to make or receive copies. Mere interaction with a user through
a computer network, with no transfer of a copy, is not conveying.
 
An interactive user interface displays "Appropriate Legal Notices"
to the extent that it includes a convenient and prominently visible
feature that (1) displays an appropriate copyright notice, and (2)
tells the user that there is no warranty for the work (except to the
extent that warranties are provided), that licensees may convey the
work under this License, and how to view a copy of this License. If
the interface presents a list of user commands or options, such as a
menu, a prominent item in the list meets this criterion.
 
1. Source Code.
 
The "source code" for a work means the preferred form of the work
for making modifications to it. "Object code" means any non-source
form of a work.
 
A "Standard Interface" means an interface that either is an official
standard defined by a recognized standards body, or, in the case of
interfaces specified for a particular programming language, one that
is widely used among developers working in that language.
 
The "System Libraries" of an executable work include anything, other
than the work as a whole, that (a) is included in the normal form of
packaging a Major Component, but which is not part of that Major
Component, and (b) serves only to enable use of the work with that
Major Component, or to implement a Standard Interface for which an
implementation is available to the public in source code form. A
"Major Component", in this context, means a major essential component
(kernel, window system, and so on) of the specific operating system
(if any) on which the executable work runs, or a compiler used to
produce the work, or an object code interpreter used to run it.
 
The "Corresponding Source" for a work in object code form means all
the source code needed to generate, install, and (for an executable
work) run the object code and to modify the work, including scripts to
control those activities. However, it does not include the work's
System Libraries, or general-purpose tools or generally available free
programs which are used unmodified in performing those activities but
which are not part of the work. For example, Corresponding Source
includes interface definition files associated with source files for
the work, and the source code for shared libraries and dynamically
linked subprograms that the work is specifically designed to require,
such as by intimate data communication or control flow between those
subprograms and other parts of the work.
 
The Corresponding Source need not include anything that users
can regenerate automatically from other parts of the Corresponding
Source.
 
The Corresponding Source for a work in source code form is that
same work.
 
2. Basic Permissions.
 
All rights granted under this License are granted for the term of
copyright on the Program, and are irrevocable provided the stated
conditions are met. This License explicitly affirms your unlimited
permission to run the unmodified Program. The output from running a
covered work is covered by this License only if the output, given its
content, constitutes a covered work. This License acknowledges your
rights of fair use or other equivalent, as provided by copyright law.
 
You may make, run and propagate covered works that you do not
convey, without conditions so long as your license otherwise remains
in force. You may convey covered works to others for the sole purpose
of having them make modifications exclusively for you, or provide you
with facilities for running those works, provided that you comply with
the terms of this License in conveying all material for which you do
not control copyright. Those thus making or running the covered works
for you must do so exclusively on your behalf, under your direction
and control, on terms that prohibit them from making any copies of
your copyrighted material outside their relationship with you.
 
Conveying under any other circumstances is permitted solely under
the conditions stated below. Sublicensing is not allowed; section 10
makes it unnecessary.
 
3. Protecting Users' Legal Rights From Anti-Circumvention Law.
 
No covered work shall be deemed part of an effective technological
measure under any applicable law fulfilling obligations under article
11 of the WIPO copyright treaty adopted on 20 December 1996, or
similar laws prohibiting or restricting circumvention of such
measures.
 
When you convey a covered work, you waive any legal power to forbid
circumvention of technological measures to the extent such circumvention
is effected by exercising rights under this License with respect to
the covered work, and you disclaim any intention to limit operation or
modification of the work as a means of enforcing, against the work's
users, your or third parties' legal rights to forbid circumvention of
technological measures.
 
4. Conveying Verbatim Copies.
 
You may convey verbatim copies of the Program's source code as you
receive it, in any medium, provided that you conspicuously and
appropriately publish on each copy an appropriate copyright notice;
keep intact all notices stating that this License and any
non-permissive terms added in accord with section 7 apply to the code;
keep intact all notices of the absence of any warranty; and give all
recipients a copy of this License along with the Program.
 
You may charge any price or no price for each copy that you convey,
and you may offer support or warranty protection for a fee.
 
5. Conveying Modified Source Versions.
 
You may convey a work based on the Program, or the modifications to
produce it from the Program, in the form of source code under the
terms of section 4, provided that you also meet all of these conditions:
 
a) The work must carry prominent notices stating that you modified
it, and giving a relevant date.
 
b) The work must carry prominent notices stating that it is
released under this License and any conditions added under section
7. This requirement modifies the requirement in section 4 to
"keep intact all notices".
 
c) You must license the entire work, as a whole, under this
License to anyone who comes into possession of a copy. This
License will therefore apply, along with any applicable section 7
additional terms, to the whole of the work, and all its parts,
regardless of how they are packaged. This License gives no
permission to license the work in any other way, but it does not
invalidate such permission if you have separately received it.
 
d) If the work has interactive user interfaces, each must display
Appropriate Legal Notices; however, if the Program has interactive
interfaces that do not display Appropriate Legal Notices, your
work need not make them do so.
 
A compilation of a covered work with other separate and independent
works, which are not by their nature extensions of the covered work,
and which are not combined with it such as to form a larger program,
in or on a volume of a storage or distribution medium, is called an
"aggregate" if the compilation and its resulting copyright are not
used to limit the access or legal rights of the compilation's users
beyond what the individual works permit. Inclusion of a covered work
in an aggregate does not cause this License to apply to the other
parts of the aggregate.
 
6. Conveying Non-Source Forms.
 
You may convey a covered work in object code form under the terms
of sections 4 and 5, provided that you also convey the
machine-readable Corresponding Source under the terms of this License,
in one of these ways:
 
a) Convey the object code in, or embodied in, a physical product
(including a physical distribution medium), accompanied by the
Corresponding Source fixed on a durable physical medium
customarily used for software interchange.
 
b) Convey the object code in, or embodied in, a physical product
(including a physical distribution medium), accompanied by a
written offer, valid for at least three years and valid for as
long as you offer spare parts or customer support for that product
model, to give anyone who possesses the object code either (1) a
copy of the Corresponding Source for all the software in the
product that is covered by this License, on a durable physical
medium customarily used for software interchange, for a price no
more than your reasonable cost of physically performing this
conveying of source, or (2) access to copy the
Corresponding Source from a network server at no charge.
 
c) Convey individual copies of the object code with a copy of the
written offer to provide the Corresponding Source. This
alternative is allowed only occasionally and noncommercially, and
only if you received the object code with such an offer, in accord
with subsection 6b.
 
d) Convey the object code by offering access from a designated
place (gratis or for a charge), and offer equivalent access to the
Corresponding Source in the same way through the same place at no
further charge. You need not require recipients to copy the
Corresponding Source along with the object code. If the place to
copy the object code is a network server, the Corresponding Source
may be on a different server (operated by you or a third party)
that supports equivalent copying facilities, provided you maintain
clear directions next to the object code saying where to find the
Corresponding Source. Regardless of what server hosts the
Corresponding Source, you remain obligated to ensure that it is
available for as long as needed to satisfy these requirements.
 
e) Convey the object code using peer-to-peer transmission, provided
you inform other peers where the object code and Corresponding
Source of the work are being offered to the general public at no
charge under subsection 6d.
 
A separable portion of the object code, whose source code is excluded
from the Corresponding Source as a System Library, need not be
included in conveying the object code work.
 
A "User Product" is either (1) a "consumer product", which means any
tangible personal property which is normally used for personal, family,
or household purposes, or (2) anything designed or sold for incorporation
into a dwelling. In determining whether a product is a consumer product,
doubtful cases shall be resolved in favor of coverage. For a particular
product received by a particular user, "normally used" refers to a
typical or common use of that class of product, regardless of the status
of the particular user or of the way in which the particular user
actually uses, or expects or is expected to use, the product. A product
is a consumer product regardless of whether the product has substantial
commercial, industrial or non-consumer uses, unless such uses represent
the only significant mode of use of the product.
 
"Installation Information" for a User Product means any methods,
procedures, authorization keys, or other information required to install
and execute modified versions of a covered work in that User Product from
a modified version of its Corresponding Source. The information must
suffice to ensure that the continued functioning of the modified object
code is in no case prevented or interfered with solely because
modification has been made.
 
If you convey an object code work under this section in, or with, or
specifically for use in, a User Product, and the conveying occurs as
part of a transaction in which the right of possession and use of the
User Product is transferred to the recipient in perpetuity or for a
fixed term (regardless of how the transaction is characterized), the
Corresponding Source conveyed under this section must be accompanied
by the Installation Information. But this requirement does not apply
if neither you nor any third party retains the ability to install
modified object code on the User Product (for example, the work has
been installed in ROM).
 
The requirement to provide Installation Information does not include a
requirement to continue to provide support service, warranty, or updates
for a work that has been modified or installed by the recipient, or for
the User Product in which it has been modified or installed. Access to a
network may be denied when the modification itself materially and
adversely affects the operation of the network or violates the rules and
protocols for communication across the network.
 
Corresponding Source conveyed, and Installation Information provided,
in accord with this section must be in a format that is publicly
documented (and with an implementation available to the public in
source code form), and must require no special password or key for
unpacking, reading or copying.
 
7. Additional Terms.
 
"Additional permissions" are terms that supplement the terms of this
License by making exceptions from one or more of its conditions.
Additional permissions that are applicable to the entire Program shall
be treated as though they were included in this License, to the extent
that they are valid under applicable law. If additional permissions
apply only to part of the Program, that part may be used separately
under those permissions, but the entire Program remains governed by
this License without regard to the additional permissions.
 
When you convey a copy of a covered work, you may at your option
remove any additional permissions from that copy, or from any part of
it. (Additional permissions may be written to require their own
removal in certain cases when you modify the work.) You may place
additional permissions on material, added by you to a covered work,
for which you have or can give appropriate copyright permission.
 
Notwithstanding any other provision of this License, for material you
add to a covered work, you may (if authorized by the copyright holders of
that material) supplement the terms of this License with terms:
 
a) Disclaiming warranty or limiting liability differently from the
terms of sections 15 and 16 of this License; or
 
b) Requiring preservation of specified reasonable legal notices or
author attributions in that material or in the Appropriate Legal
Notices displayed by works containing it; or
 
c) Prohibiting misrepresentation of the origin of that material, or
requiring that modified versions of such material be marked in
reasonable ways as different from the original version; or
 
d) Limiting the use for publicity purposes of names of licensors or
authors of the material; or
 
e) Declining to grant rights under trademark law for use of some
trade names, trademarks, or service marks; or
 
f) Requiring indemnification of licensors and authors of that
material by anyone who conveys the material (or modified versions of
it) with contractual assumptions of liability to the recipient, for
any liability that these contractual assumptions directly impose on
those licensors and authors.
 
All other non-permissive additional terms are considered "further
restrictions" within the meaning of section 10. If the Program as you
received it, or any part of it, contains a notice stating that it is
governed by this License along with a term that is a further
restriction, you may remove that term. If a license document contains
a further restriction but permits relicensing or conveying under this
License, you may add to a covered work material governed by the terms
of that license document, provided that the further restriction does
not survive such relicensing or conveying.
 
If you add terms to a covered work in accord with this section, you
must place, in the relevant source files, a statement of the
additional terms that apply to those files, or a notice indicating
where to find the applicable terms.
 
Additional terms, permissive or non-permissive, may be stated in the
form of a separately written license, or stated as exceptions;
the above requirements apply either way.
 
8. Termination.
 
You may not propagate or modify a covered work except as expressly
provided under this License. Any attempt otherwise to propagate or
modify it is void, and will automatically terminate your rights under
this License (including any patent licenses granted under the third
paragraph of section 11).
 
However, if you cease all violation of this License, then your
license from a particular copyright holder is reinstated (a)
provisionally, unless and until the copyright holder explicitly and
finally terminates your license, and (b) permanently, if the copyright
holder fails to notify you of the violation by some reasonable means
prior to 60 days after the cessation.
 
Moreover, your license from a particular copyright holder is
reinstated permanently if the copyright holder notifies you of the
violation by some reasonable means, this is the first time you have
received notice of violation of this License (for any work) from that
copyright holder, and you cure the violation prior to 30 days after
your receipt of the notice.
 
Termination of your rights under this section does not terminate the
licenses of parties who have received copies or rights from you under
this License. If your rights have been terminated and not permanently
reinstated, you do not qualify to receive new licenses for the same
material under section 10.
 
9. Acceptance Not Required for Having Copies.
 
You are not required to accept this License in order to receive or
run a copy of the Program. Ancillary propagation of a covered work
occurring solely as a consequence of using peer-to-peer transmission
to receive a copy likewise does not require acceptance. However,
nothing other than this License grants you permission to propagate or
modify any covered work. These actions infringe copyright if you do
not accept this License. Therefore, by modifying or propagating a
covered work, you indicate your acceptance of this License to do so.
 
10. Automatic Licensing of Downstream Recipients.
 
Each time you convey a covered work, the recipient automatically
receives a license from the original licensors, to run, modify and
propagate that work, subject to this License. You are not responsible
for enforcing compliance by third parties with this License.
 
An "entity transaction" is a transaction transferring control of an
organization, or substantially all assets of one, or subdividing an
organization, or merging organizations. If propagation of a covered
work results from an entity transaction, each party to that
transaction who receives a copy of the work also receives whatever
licenses to the work the party's predecessor in interest had or could
give under the previous paragraph, plus a right to possession of the
Corresponding Source of the work from the predecessor in interest, if
the predecessor has it or can get it with reasonable efforts.
 
You may not impose any further restrictions on the exercise of the
rights granted or affirmed under this License. For example, you may
not impose a license fee, royalty, or other charge for exercise of
rights granted under this License, and you may not initiate litigation
(including a cross-claim or counterclaim in a lawsuit) alleging that
any patent claim is infringed by making, using, selling, offering for
sale, or importing the Program or any portion of it.
 
11. Patents.
 
A "contributor" is a copyright holder who authorizes use under this
License of the Program or a work on which the Program is based. The
work thus licensed is called the contributor's "contributor version".
 
A contributor's "essential patent claims" are all patent claims
owned or controlled by the contributor, whether already acquired or
hereafter acquired, that would be infringed by some manner, permitted
by this License, of making, using, or selling its contributor version,
but do not include claims that would be infringed only as a
consequence of further modification of the contributor version. For
purposes of this definition, "control" includes the right to grant
patent sublicenses in a manner consistent with the requirements of
this License.
 
Each contributor grants you a non-exclusive, worldwide, royalty-free
patent license under the contributor's essential patent claims, to
make, use, sell, offer for sale, import and otherwise run, modify and
propagate the contents of its contributor version.
 
In the following three paragraphs, a "patent license" is any express
agreement or commitment, however denominated, not to enforce a patent
(such as an express permission to practice a patent or covenant not to
sue for patent infringement). To "grant" such a patent license to a
party means to make such an agreement or commitment not to enforce a
patent against the party.
 
If you convey a covered work, knowingly relying on a patent license,
and the Corresponding Source of the work is not available for anyone
to copy, free of charge and under the terms of this License, through a
publicly available network server or other readily accessible means,
then you must either (1) cause the Corresponding Source to be so
available, or (2) arrange to deprive yourself of the benefit of the
patent license for this particular work, or (3) arrange, in a manner
consistent with the requirements of this License, to extend the patent
license to downstream recipients. "Knowingly relying" means you have
actual knowledge that, but for the patent license, your conveying the
covered work in a country, or your recipient's use of the covered work
in a country, would infringe one or more identifiable patents in that
country that you have reason to believe are valid.
 
If, pursuant to or in connection with a single transaction or
arrangement, you convey, or propagate by procuring conveyance of, a
covered work, and grant a patent license to some of the parties
receiving the covered work authorizing them to use, propagate, modify
or convey a specific copy of the covered work, then the patent license
you grant is automatically extended to all recipients of the covered
work and works based on it.
 
A patent license is "discriminatory" if it does not include within
the scope of its coverage, prohibits the exercise of, or is
conditioned on the non-exercise of one or more of the rights that are
specifically granted under this License. You may not convey a covered
work if you are a party to an arrangement with a third party that is
in the business of distributing software, under which you make payment
to the third party based on the extent of your activity of conveying
the work, and under which the third party grants, to any of the
parties who would receive the covered work from you, a discriminatory
patent license (a) in connection with copies of the covered work
conveyed by you (or copies made from those copies), or (b) primarily
for and in connection with specific products or compilations that
contain the covered work, unless you entered into that arrangement,
or that patent license was granted, prior to 28 March 2007.
 
Nothing in this License shall be construed as excluding or limiting
any implied license or other defenses to infringement that may
otherwise be available to you under applicable patent law.
 
12. No Surrender of Others' Freedom.
 
If conditions are imposed on you (whether by court order, agreement or
otherwise) that contradict the conditions of this License, they do not
excuse you from the conditions of this License. If you cannot convey a
covered work so as to satisfy simultaneously your obligations under this
License and any other pertinent obligations, then as a consequence you may
not convey it at all. For example, if you agree to terms that obligate you
to collect a royalty for further conveying from those to whom you convey
the Program, the only way you could satisfy both those terms and this
License would be to refrain entirely from conveying the Program.
 
13. Use with the GNU Affero General Public License.
 
Notwithstanding any other provision of this License, you have
permission to link or combine any covered work with a work licensed
under version 3 of the GNU Affero General Public License into a single
combined work, and to convey the resulting work. The terms of this
License will continue to apply to the part which is the covered work,
but the special requirements of the GNU Affero General Public License,
section 13, concerning interaction through a network will apply to the
combination as such.
 
14. Revised Versions of this License.
 
The Free Software Foundation may publish revised and/or new versions of
the GNU General Public License from time to time. Such new versions will
be similar in spirit to the present version, but may differ in detail to
address new problems or concerns.
 
Each version is given a distinguishing version number. If the
Program specifies that a certain numbered version of the GNU General
Public License "or any later version" applies to it, you have the
option of following the terms and conditions either of that numbered
version or of any later version published by the Free Software
Foundation. If the Program does not specify a version number of the
GNU General Public License, you may choose any version ever published
by the Free Software Foundation.
 
If the Program specifies that a proxy can decide which future
versions of the GNU General Public License can be used, that proxy's
public statement of acceptance of a version permanently authorizes you
to choose that version for the Program.
 
Later license versions may give you additional or different
permissions. However, no additional obligations are imposed on any
author or copyright holder as a result of your choosing to follow a
later version.
 
15. Disclaimer of Warranty.
 
THERE IS NO WARRANTY FOR THE PROGRAM, TO THE EXTENT PERMITTED BY
APPLICABLE LAW. EXCEPT WHEN OTHERWISE STATED IN WRITING THE COPYRIGHT
HOLDERS AND/OR OTHER PARTIES PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY
OF ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO,
THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
PURPOSE. THE ENTIRE RISK AS TO THE QUALITY AND PERFORMANCE OF THE PROGRAM
IS WITH YOU. SHOULD THE PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF
ALL NECESSARY SERVICING, REPAIR OR CORRECTION.
 
16. Limitation of Liability.
 
IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MODIFIES AND/OR CONVEYS
THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, INCLUDING ANY
GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THE
USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED TO LOSS OF
DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY YOU OR THIRD
PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER PROGRAMS),
EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF
SUCH DAMAGES.
 
17. Interpretation of Sections 15 and 16.
 
If the disclaimer of warranty and limitation of liability provided
above cannot be given local legal effect according to their terms,
reviewing courts shall apply local law that most closely approximates
an absolute waiver of all civil liability in connection with the
Program, unless a warranty or assumption of liability accompanies a
copy of the Program in return for a fee.
 
END OF TERMS AND CONDITIONS
 
How to Apply These Terms to Your New Programs
 
If you develop a new program, and you want it to be of the greatest
possible use to the public, the best way to achieve this is to make it
free software which everyone can redistribute and change under these terms.
 
To do so, attach the following notices to the program. It is safest
to attach them to the start of each source file to most effectively
state the exclusion of warranty; and each file should have at least
the "copyright" line and a pointer to where the full notice is found.
 
<one line to give the program's name and a brief idea of what it does.>
Copyright (C) <year> <name of author>
 
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
 
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
 
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
 
Also add information on how to contact you by electronic and paper mail.
 
If the program does terminal interaction, make it output a short
notice like this when it starts in an interactive mode:
 
<program> Copyright (C) <year> <name of author>
This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
This is free software, and you are welcome to redistribute it
under certain conditions; type `show c' for details.
 
The hypothetical commands `show w' and `show c' should show the appropriate
parts of the General Public License. Of course, your program's commands
might be different; for a GUI interface, you would use an "about box".
 
You should also get your employer (if you work as a programmer) or school,
if any, to sign a "copyright disclaimer" for the program, if necessary.
For more information on this, and how to apply and follow the GNU GPL, see
<http://www.gnu.org/licenses/>.
 
The GNU General Public License does not permit incorporating your program
into proprietary programs. If your program is a subroutine library, you
may consider it more useful to permit linking proprietary applications with
the library. If this is what you want to do, use the GNU Lesser General
Public License instead of this License. But first, please read
<http://www.gnu.org/philosophy/why-not-lgpl.html>.
/usb_fpga_1_11/trunk/bmp/copyright
0,0 → 1,28
Format: http://dep.debian.net/deps/dep5
Upstream-Name: bmp
Source: http://www.ztex.de
 
Files: *
Copyright: (C) 2009-2011 Stefan Ziegenbalg
Author: Stefan Ziegenbalg <stefan.ziegenbalg@ztex.de>
License: GPL-3+
Files: debian/*
Copyright: 2011 Steffen Moeller <moeller@debian.org>
License: GPL-3
 
License: GPL-3
This package is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation at either version 3 of the License.
.
This package is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>
.
On Debian systems, the complete text of the GNU General
Public License version 3 can be found in "/usr/share/common-licenses/GPL-3".
/usb_fpga_1_11/trunk/bmp/Makefile
1,4 → 1,4
# Copyright (C) 1999-2009 Stefan Ziegenbalg
# Copyright (C) 1999-2011 Stefan Ziegenbalg
#
# main targets:
# all build bmp
28,6 → 28,9
#default: $(PREFIX)/bin
#e.g. BINDIR=/usr/bin
 
#MANDIR where to install mans's
#default: $(PREFIX)/share/man/man1
 
################################
# DO NOT CHANAGE THE FOLLOWING #
################################
46,6 → 49,7
PCFLAGS:=-Scgm -O3rGp3 -FE. -Xs $(PCEXTRAFLAGS)
INSTALLDIR=$(INSTALL) -d
INSTALLEXE=$(INSTALL) -m 0755
INSTALLFILE=$(INSTALL) -m 0644
RM=rm -f
ECHO=echo
 
80,9 → 84,13
endif
 
ifndef BINDIR
BINDIR=$(PREFIX)/bin
BINDIR=$(DESTDIR)$(PREFIX)/bin
endif
 
ifndef MANDIR
MANDIR=$(DESTDIR)$(PREFIX)/share/man/man1
endif
 
.PHONY: all install uninstall resetconf clean distclean
 
all: bmp.made
96,6 → 104,8
install: $(TARGETS)
$(INSTALLDIR) $(BINDIR)
$(INSTALLEXE) $(TARGETS) $(BINDIR)
$(INSTALLDIR) $(MANDIR)
$(INSTALLFILE) bmp.1 $(MANDIR)
 
install2: $(TARGETS)
$(INSTALLEXE) $(TARGETS) ../bin
/usb_fpga_1_11/trunk/bmp/Readme
1,13 → 1,13
What is bmp
-----------
 
BMP is a universal macro processor.
BMP is a universal macro processor. A detailed description can be found
at http://wiki.ztex.de/doku.php?id=en:software:compilation:bmp
 
 
Compiling
---------
 
For compilation the freepascal compiler (http://www.freepascal.org) is
For compilation the Freepascal compiler (http://www.freepascal.org) is
required.
 
To build and install everything just run make, make install, ...
20,16 → 20,3
clean clean everything but exe's
distclean clean everything
 
 
Examples/ Tests
---------------
 
The directory `tests' contains some examples and tests. They can be build with
`make test*'. (see Makefile)
 
 
Author:
-------
 
Stefan Ziegenbalg
email: stefan.ziegenbalg@simg.de
/usb_fpga_1_11/trunk/bmp/bmp.1
0,0 → 1,88
.\" THIS FILE was generated by help2man 1.40.4 and then manually modified
.TH BMP "1" "September 2011"
.SH NAME
bmp: \- babel universal macro processor
.SH SYNOPSIS
.B bmp
[\fI<Options>\fR] [\fI<filename1> \fR[\fI<filename2> \fR...]]
.SH OPTIONS
.TP
\fB\-o\fR <fileneme>
Output file
.TP
\fB\-p\fR
Pascal mode (default), equal to \fB\-mm\fR "//" \fB\-mo\fR "[" \fB\-mc\fR "]" \fB\-mp\fR "#"
.TP
\fB\-c\fR
C mode, equal to \fB\-mm\fR "#" \fB\-mo\fR "[" \fB\-mc\fR "]" \fB\-mp\fR "$" \fB\-l\fR '#line %2 "%1"'
.TP
\fB\-i\fR
Ignore upper/lower case
.TP
\fB\-l\fR
Line info (default for C mode: '#line %2 "%1"')
.TP
\fB\-I\fR
<directory> Include path
.TP
\fB\-D\fR
<symbol> Define symbol <symbol>
.TP
\fB\-mm\fR <string>
Meta macro start string
.TP
\fB\-mo\fR <char>
Open bracket
.TP
\fB\-mc\fR <char>
Close bracket
.TP
\fB\-mp\fR <char>
Parameter character
.TP
\fB\-dd\fR
Print definitions
.TP
\fB\-h\fR
Help
.TP
\fB\-o\fR <fileneme>
Output file
.TP
\fB\-p\fR
Pascal mode (default), equal to \fB\-mm\fR "//" \fB\-mo\fR "[" \fB\-mc\fR "]" \fB\-mp\fR "#"
.TP
\fB\-c\fR
C mode, equal to \fB\-mm\fR "#" \fB\-mo\fR "[" \fB\-mc\fR "]" \fB\-mp\fR "$" \fB\-l\fR '#line %2 "%1"'
.TP
\fB\-i\fR
Ignore upper/lower case
.TP
\fB\-l\fR
Line info (default for C mode: '#line %2 "%1"')
.TP
\fB\-I\fR
<directory> Include path
.TP
\fB\-D\fR
<symbol> Define symbol <symbol>
.TP
\fB\-mm\fR <string>
Meta macro start string
.TP
\fB\-mo\fR <char>
Open bracket
.TP
\fB\-mc\fR <char>
Close bracket
.TP
\fB\-mp\fR <char>
Parameter character
.TP
\fB\-dd\fR
Print definitions
.TP
\fB\-h\fR
Help
.SH "SEE ALSO"
http://wiki.ztex.de/doku.php?id=en:software:compilation:bmp
/usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/default/default.c
0,0 → 1,43
/*!
default -- Default Firmware for ZTEX USB-FPGA Modules 1.15y
Copyright (C) 2009-2011 ZTEX GmbH.
http://www.ztex.de
 
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License version 3 as
published by the Free Software Foundation.
 
This program is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
General Public License for more details.
 
You should have received a copy of the GNU General Public License
along with this program; if not, see http://www.gnu.org/licenses/.
!*/
 
#include[ztex-conf.h] // Loads the configuration macros, see ztex-conf.h for the available macros
#include[ztex-utils.h] // include basic functions and variables
 
// Endpoint 2 is used to high speed FPGA configuration
EP_CONFIG(2,0,BULK,OUT,512,4);
 
// select ZTEX USB FPGA Module 1.15y as target (required for FPGA configuration)
IDENTITY_UFM_1_15Y(10.15.0.0,0);
 
// enables high speed FPGA configuration, use EP 2
ENABLE_HS_FPGA_CONF(2);
 
// this product string can also used for identification by the host software
#define[PRODUCT_STRING]["USB-FPGA Module 1.15y (default)"]
 
#include[ztex.h]
 
void main(void)
{
init_USB(); // init everything
while (1) { } // twiddle thumbs
}
 
 
/usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/default/Makefile
0,0 → 1,23
#########################
# configuration section #
#########################
 
ZTEXPREFIX=../../..
 
JARTARGET=
CLASSTARGETS=
CLASSEXTRADEPS=
 
IHXTARGETS=default.ihx
IHXEXTRADEPS=
EXTRAJARFILES=
EXTRADISTCLEANFILES=
 
default: all
 
################################
# DO NOT CHANAGE THE FOLLOWING #
################################
 
include $(ZTEXPREFIX)/Makefile.mk
 
/usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/default/Readme
0,0 → 1,23
Default Firmware for USB-FPGA Modules 1.15x.
/usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/default/default.sh
0,0 → 1,2
../../../java/FWLoader -c -uu default.ihx -ue default.ihx
 
usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/default/default.sh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/intraffic/InTraffic.java =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/intraffic/InTraffic.java (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/intraffic/InTraffic.java (revision 6) @@ -0,0 +1,328 @@ +/*! + intraffic -- example showing how the EZ-USB FIFO interface is used on ZTEX USB-FPGA Module 1.15b + Copyright (C) 2009-2011 ZTEX GmbH. + http://www.ztex.de + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License version 3 as + published by the Free Software Foundation. + + This program is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, see http://www.gnu.org/licenses/. +!*/ + +import java.io.*; +import java.util.*; + +import ch.ntb.usb.*; + +import ztex.*; + +// ***************************************************************************** +// ******* ParameterException ************************************************** +// ***************************************************************************** +// Exception the prints a help message +class ParameterException extends Exception { + public final static String helpMsg = new String ( + "Parameters:\n"+ + " -d Device Number (default: 0)\n" + + " -f Force uploads\n" + + " -p Print bus info\n" + + " -w Enable certain workarounds\n"+ + " -h This help" ); + + public ParameterException (String msg) { + super( msg + "\n" + helpMsg ); + } +} + +// ***************************************************************************** +// ******* USBReader *********************************************************** +// ***************************************************************************** +class UsbReader extends Thread { + private final int bufNum = 8; + public final int bufSize = 512*1024; + public byte[][] buf = new byte[bufNum][]; + public int[] bufBytes = new int[bufNum]; + private int readCount = -1; + private int getCount = -1; + public boolean terminate = false; + private Ztex1v1 ztex; + + public UsbReader ( Ztex1v1 p_ztex ) { + super (); + ztex = p_ztex; + for (int i=0; i= readCount) { + try { + sleep(1); + } + catch ( InterruptedException e) { + } + } + return getCount % bufNum; + } + + public void reset () { + getCount = readCount + 1; + } + + public void run() { + setPriority(MAX_PRIORITY); + +// claim interface 0 + try { + ztex.trySetConfiguration ( 1 ); + ztex.claimInterface ( 0 ); + } + catch ( Exception e) { + System.out.println("Error: "+e.getLocalizedMessage() ); + System.exit(2); + } + + +// reader loop + while ( !terminate ) { + readCount += 1; + + while ( readCount - bufNum >= getCount ) { + try { + sleep(1); + } + catch ( InterruptedException e) { + } + } + + int i = readCount % bufNum; + bufBytes[i] = LibusbJava.usb_bulk_read(ztex.handle(), 0x82, buf[i], bufSize, 1000); +// System.out.println("Buffer " + i +": read " + bufBytes[i] + " bytes"); + } + +// release interface 0 + ztex.releaseInterface( 0 ); + + } +} + + +// ***************************************************************************** +// ******* Test0 *************************************************************** +// ***************************************************************************** +class InTraffic extends Ztex1v1 { + +// ******* InTraffic ************************************************************** +// constructor + public InTraffic ( ZtexDevice1 pDev ) throws UsbException { + super ( pDev ); + } + +// ******* main **************************************************************** + public static void main (String args[]) { + + int devNum = 0; + boolean force = false; + boolean workarounds = false; + + try { +// init USB stuff + LibusbJava.usb_init(); + +// scan the USB bus + ZtexScanBus1 bus = new ZtexScanBus1( ZtexDevice1.ztexVendorId, ZtexDevice1.ztexProductId, true, false, 1); + if ( bus.numberOfDevices() <= 0) { + System.err.println("No devices found"); + System.exit(0); + } + +// scan the command line arguments + for (int i=0; i=args.length) throw new Exception(); + devNum = Integer.parseInt( args[i] ); + } + catch (Exception e) { + throw new ParameterException("Device number expected after -d"); + } + } + else if ( args[i].equals("-f") ) { + force = true; + } + else if ( args[i].equals("-p") ) { + bus.printBus(System.out); + System.exit(0); + } + else if ( args[i].equals("-p") ) { + bus.printBus(System.out); + System.exit(0); + } + else if ( args[i].equals("-w") ) { + workarounds = true; + } + else if ( args[i].equals("-h") ) { + System.err.println(ParameterException.helpMsg); + System.exit(0); + } + else throw new ParameterException("Invalid Parameter: "+args[i]); + } + + +// create the main class + InTraffic ztex = new InTraffic ( bus.device(devNum) ); + ztex.certainWorkarounds = workarounds; + +// upload the firmware if necessary + if ( force || ! ztex.valid() || ! ztex.dev().productString().equals("intraffic example for UFM 1.15y") ) { + System.out.println("Firmware upload time: " + ztex.uploadFirmware( "intraffic.ihx", force ) + " ms"); + force=true; + } + + System.out.println("" + ztex.numberOfFpgas() + " FPGA's found"); + +// upload the bitstream if necessary + for (int i=0; i 5) ) { + System.out.println("Error: 0b" + Integer.toBinaryString(vcurrent) + " expected at " + i + ":" + (k-3) + " but " ); + System.out.println(" 0b" + Integer.toBinaryString(current) + " found"); + errors+=1; + prevErrors+=1; + } + vcurrent = current; + } + else { +// if ( prevErrors > 0 ) System.out.println(" 0b" + Integer.toBinaryString(current) ); + if ( prevErrors == 1 ) + ferrors +=1; + prevErrors = 0; + } + + lastwi = 1; +// System.out.println(current); + } +// System.out.println(b[k]+" " +b[k+1]); + } + System.out.print("Buffer " + i + ": " + (errors-ferrors) + " errors, " + ferrors + " FIFO errors, " + aerrors + " alignment errors \r"); + } + System.out.println(); + +// performance test (continous mode) + ztex.vendorCommand (0x60, "Set test mode", 1, 0); + reader.reset(); + + int words = 0; + int intSum = 0; + int intMax = 0; + int intAdj = 0; + int lastwi = -1; + for (int i=0; i<300; i++) { + int j = reader.getBuffer(); + int bb = reader.bufBytes[j]; + byte[] b = reader.buf[j]; + int current = vcurrent+1; + + for (int k=1; k 0 && words > 0) { + intSum += it; + if ( it > intMax ) + intMax = it; + } + words += 2; + vcurrent = current; + intAdj = 0; + } + lastwi = 1; +// System.out.println(current); + } +// System.out.println(b[k]+" " +b[k+1]); + } + System.out.print("Buffer " + i + ": " + Math.round(words*6000.0/(words+intSum))/100.0 + "MB/s, max. interrupt: " + Math.round(intMax/150.0)/100 + "ms \r"); + } + System.out.println(); + } + + + reader.terminate=true; + + } + catch (Exception e) { + System.out.println("Error: "+e.getLocalizedMessage() ); + } + } + +} Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/intraffic/intraffic.c =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/intraffic/intraffic.c (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/intraffic/intraffic.c (revision 6) @@ -0,0 +1,94 @@ +/*! + intraffic -- example showing how the EZ-USB FIFO interface is used on ZTEX USB-FPGA Module 1.15b + Copyright (C) 2009-2011 ZTEX GmbH. + http://www.ztex.de + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License version 3 as + published by the Free Software Foundation. + + This program is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, see http://www.gnu.org/licenses/. +!*/ + +#include[ztex-conf.h] // Loads the configuration macros, see ztex-conf.h for the available macros +#include[ztex-utils.h] // include basic functions + +// configure endpoint 2, in, quad buffered, 512 bytes, interface 0 +EP_CONFIG(2,0,BULK,IN,512,4); + +// configure endpoint 6, out, doublebuffered, 512 bytes, interface 0 +EP_CONFIG(6,0,BULK,OUT,512,2); + +// select ZTEX USB FPGA Module 1.15 as target (required for FPGA configuration) +IDENTITY_UFM_1_15Y(10.15.0.0,0); + +// this product string is also used for identification by the host software +#define[PRODUCT_STRING]["intraffic example for UFM 1.15y"] + +// enables high speed FPGA configuration via EP6 +ENABLE_HS_FPGA_CONF(6); + +// this is called automatically after FPGA configuration +#define[POST_FPGA_CONFIG][POST_FPGA_CONFIG + IOA0 = 1; // controlled mode + IOA7 = 1; // reset on + OEA = bmBIT0 | bmBIT7; + + EP2CS &= ~bmBIT0; // clear stall bit + + REVCTL = 0x1; + SYNCDELAY; + + IFCONFIG = bmBIT7 | bmBIT5 | 3; // internal IFCLK, 30 MHz, OE, slave FIFO interface + SYNCDELAY; + EP2FIFOCFG = bmBIT3 | bmBIT0; // AOTUOIN, WORDWIDE + SYNCDELAY; + + EP2AUTOINLENH = 2; // 512 bytes + SYNCDELAY; + EP2AUTOINLENL = 0; + SYNCDELAY; + + FIFORESET = 0x80; // reset FIFO + SYNCDELAY; + FIFORESET = 2; + SYNCDELAY; + FIFORESET = 0x00; + SYNCDELAY; + + FIFOPINPOLAR = 0; + SYNCDELAY; + PINFLAGSAB = 0; + SYNCDELAY; + PINFLAGSCD = 0; + SYNCDELAY; + + IOA7 = 0; // reset off +] + +// set mode +ADD_EP0_VENDOR_COMMAND((0x60,, + IOA7 = 1; // reset on + IOA0 = SETUPDAT[2] ? 1 : 0; + IOA7 = 0; // reset off +,, + NOP; +));; + +// include the main part of the firmware kit, define the descriptors, ... +#include[ztex.h] + +void main(void) +{ + init_USB(); + + while (1) { + } +} + Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/intraffic/fpga/intraffic.ucf =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/intraffic/fpga/intraffic.ucf (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/intraffic/fpga/intraffic.ucf (revision 6) @@ -0,0 +1,46 @@ +# NET "CLK" TNM_NET = "FXCLK"; +# TIMESPEC "TS_CLK" = PERIOD "FXCLK" 20.83333 ns HIGH 50 %; +# NET "CLK" LOC = "L22" | IOSTANDARD = LVCMOS33 ; + +NET "IFCLK" TNM_NET = "IFCLK"; +TIMESPEC "TS_IFCLK" = PERIOD "IFCLK" 20 ns HIGH 50 %; +NET "IFCLK" LOC = "K20" | IOSTANDARD = LVCMOS33 ; + +NET "CS" LOC = "AB11" | IOSTANDARD = LVCMOS33 ; + +# TIMESPEC "TS_CLK_IFCLK" = FROM "CLK" TO "IFCLK" 3ns DATAPATHONLY; +# TIMESPEC "TS_IFCLK_CLK" = FROM "IFCLK" TO "CLK" 3ns DATAPATHONLY; + +NET "SLOE" LOC = "U15" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # PA2 +NET "FIFOADR0" LOC = "AB21" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # PA4 +NET "FIFOADR1" LOC = "Y18" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # PA5 +NET "PKTEND" LOC = "AB5" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # PA6 +NET "RESET" LOC = "AB17" | IOSTANDARD = LVCMOS33 ; # PA7 + +NET "CONT" LOC = "AA22" | IOSTANDARD = LVCMOS33 ; # PA0 + +NET "fd<0>" LOC = "Y17" | IOSTANDARD = LVCMOS33 ; +NET "fd<1>" LOC = "V13" | IOSTANDARD = LVCMOS33 ; +NET "fd<2>" LOC = "W13" | IOSTANDARD = LVCMOS33 ; +NET "fd<3>" LOC = "AA8" | IOSTANDARD = LVCMOS33 ; +NET "fd<4>" LOC = "AB8" | IOSTANDARD = LVCMOS33 ; +NET "fd<5>" LOC = "W6" | IOSTANDARD = LVCMOS33 ; +NET "fd<6>" LOC = "Y6" | IOSTANDARD = LVCMOS33 ; +NET "fd<7>" LOC = "Y9" | IOSTANDARD = LVCMOS33 ; +NET "fd<8>" LOC = "V21" | IOSTANDARD = LVCMOS33 ; +NET "fd<9>" LOC = "V22" | IOSTANDARD = LVCMOS33 ; +NET "fd<10>" LOC = "U20" | IOSTANDARD = LVCMOS33 ; +NET "fd<11>" LOC = "U22" | IOSTANDARD = LVCMOS33 ; +NET "fd<12>" LOC = "R20" | IOSTANDARD = LVCMOS33 ; +NET "fd<13>" LOC = "R22" | IOSTANDARD = LVCMOS33 ; +NET "fd<14>" LOC = "P18" | IOSTANDARD = LVCMOS33 ; +NET "fd<15>" LOC = "P19" | IOSTANDARD = LVCMOS33 ; + +NET "FLAGB" LOC = "F19" | IOSTANDARD = LVCMOS33 ; + +NET "SLRD" LOC = "N22" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "SLWR" LOC = "M22" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; + +# NET "SCL" LOC = "F22" | IOSTANDARD = LVCMOS33 ; +# NET "SDA" LOC = "E22" | IOSTANDARD = LVCMOS33 ; + Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/intraffic/fpga/intraffic.vhd =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/intraffic/fpga/intraffic.vhd (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/intraffic/fpga/intraffic.vhd (revision 6) @@ -0,0 +1,99 @@ +library ieee; +use IEEE.std_logic_1164.all; +use IEEE.std_logic_arith.all; +use IEEE.std_logic_unsigned.all; + + +entity intraffic is + port( + RESET : in std_logic; + CS : in std_logic; + CONT : in std_logic; + IFCLK : in std_logic; + + FD : out std_logic_vector(15 downto 0); + + SLOE : out std_logic; + SLRD : out std_logic; + SLWR : out std_logic; + FIFOADR0 : out std_logic; + FIFOADR1 : out std_logic; + PKTEND : out std_logic; + + FLAGB : in std_logic + +-- SCL : in std_logic; +-- SDA : in std_logic + ); +end intraffic; + +architecture RTL of intraffic is + +---------------------------- +-- test pattern generator -- +---------------------------- +-- 30 bit counter +signal GEN_CNT : std_logic_vector(29 downto 0); +signal INT_CNT : std_logic_vector(6 downto 0); + +signal FIFO_WORD : std_logic; +signal SLWR_R : std_logic; +signal FD_R : std_logic_vector(15 downto 0); + +begin + + SLOE <= '1' when CS = '1' else 'Z'; + SLRD <= '1' when CS = '1' else 'Z'; + SLWR <= SLWR_R when CS = '1' else 'Z'; + FIFOADR0 <= '0' when CS = '1' else 'Z'; + FIFOADR1 <= '0' when CS = '1' else 'Z'; + PKTEND <= '1' when CS = '1' else 'Z'; -- no data alignment + FD <= FD_R when CS = '1' else (others => 'Z'); + + dpIFCLK: process (IFCLK, RESET) + begin +-- reset + if RESET = '1' + then + GEN_CNT <= ( others => '0' ); + INT_CNT <= ( others => '0' ); + FIFO_WORD <= '0'; + SLWR_R <= '1'; +-- IFCLK + elsif IFCLK'event and IFCLK = '1' + then + + if CONT = '1' or FLAGB = '1' + then + if FIFO_WORD = '0' + then + FD_R(14 downto 0) <= GEN_CNT(14 downto 0); + else + FD_R(14 downto 0) <= GEN_CNT(29 downto 15); + end if; + FD_R(15) <= FIFO_WORD; + + if FIFO_WORD = '1' + then + GEN_CNT <= GEN_CNT + '1'; + if INT_CNT = conv_std_logic_vector(99,7) + then + INT_CNT <= ( others => '0' ); + else + INT_CNT <= INT_CNT + '1'; + end if; + end if; + FIFO_WORD <= not FIFO_WORD; + end if; + + if ( INT_CNT >= conv_std_logic_vector(90,7) ) and ( CONT = '0' ) + then + SLWR_R <= '1'; + else + SLWR_R <= '0'; + end if; + + end if; + end process dpIFCLK; + +end RTL; Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/intraffic/fpga/clean.sh =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/intraffic/fpga/clean.sh (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/intraffic/fpga/clean.sh (revision 6) @@ -0,0 +1,79 @@ +#!/bin/bash + +# This files / directories from this directory will not be removed +# Filenames with spaces or other spuid characters will be ignored +sourcefiles="*.vhd *.ucf *.sh *.ise *.bit *.bin *.xise" +subdirs="ipcore_dir" + +# This sould not be edited. +list_files() { + if [ "$2" != "" ]; then + echo "$1" + for i in $2; do + echo " $i" + done + fi +} + +rmfiles="" +rmdirs="" +keepfiles="" +keepdirs="" +allfiles=`ls -A` +for f in $allfiles; do + keep=false + for i in $sourcefiles; do + if [ "$i" == "$f" ]; then + keep=true + fi + done + for i in $subdirs; do + if [ "$i" == "$f" ]; then + keep=true + fi + done + if [ -d "$f" ]; then + if $keep; then + keepdirs+=" $f" + else + rmdirs+=" $f" + fi + fi + if [ -f "$f" ]; then + if $keep; then + keepfiles+=" $f" + else + rmfiles+=" $f" + fi + fi +done + +echo +echo "Directory $PWD:" +list_files "This directories will NOT be removed:" "$keepdirs" +list_files "This files will NOT be removed:" "$keepfiles" +list_files "This directories will be removed:" "$rmdirs" +list_files "This files will be removed:" "$rmfiles" + +if [ "$rmfiles" == "" -a "$rmdirs" == "" ]; then + c="yes" +else + echo -n 'Confirm this by entering "yes": ' + read c +fi + +if [ "$c" == "yes" ]; then + [ "$rmfiles" != "" ] && rm $rmfiles + [ "$rmdirs" != "" ] && rm -r $rmdirs + + for d in $subdirs; do + if [ -x "$d/clean.sh" ]; then + cd $d + ./clean.sh || exit 1 + cd .. + fi + done + + exit 0 +fi +exit 1
usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/intraffic/fpga/clean.sh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/intraffic/fpga/intraffic.xise =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/intraffic/fpga/intraffic.xise (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/intraffic/fpga/intraffic.xise (revision 6) @@ -0,0 +1,471 @@ + + + +
+ + + + + + + + +
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/intraffic/Readme =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/intraffic/Readme (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/intraffic/Readme (revision 6) @@ -0,0 +1,18 @@ +intraffic +--------- + +This example shows how the EZ-USB input FIFO interface is used. + +A traffic generator sends test data to the EZ-USB. The hosts PC reads +out this data and verifies it. + +The traffic generator is implemented in the FPGA and supports two modes: + +1. (IOA3=0) This mode supports data flow control using FIFO full flag + (FLAGB) and SLWR control pin. Use this mode as starting point for + data acquisition applications. + +2. (IOA=3) In this mode and uninterrupted test pattern is generated, + i.e. flow control is disabled. This mode is used for performance + measurements (speed rate and interrupt measurements) + Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/intraffic/Makefile =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/intraffic/Makefile (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/intraffic/Makefile (revision 6) @@ -0,0 +1,27 @@ +######################### +# configuration section # +######################### + +# Defines the location of the EZ-USB SDK +ZTEXPREFIX=../../.. + +# The name of the jar archive +JARTARGET=InTraffic.jar +# Java Classes that have to be build +CLASSTARGETS=InTraffic.class +# Extra dependencies for Java Classes +CLASSEXTRADEPS= + +# ihx files (firmware ROM files) that have to be build +IHXTARGETS=intraffic.ihx +# Extra Dependencies for ihx files +IHXEXTRADEPS= + +# Extra files that should be included into th jar archive +EXTRAJARFILES=intraffic.ihx fpga/intraffic.bit + +################################ +# DO NOT CHANAGE THE FOLLOWING # +################################ +# includes the main Makefile +include $(ZTEXPREFIX)/Makefile.mk Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/intraffic/intraffic.sh =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/intraffic/intraffic.sh (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/intraffic/intraffic.sh (revision 6) @@ -0,0 +1,4 @@ +#make -C ../../../java distclean all || exit +#make distclean all || exit +#make || exit +java -cp InTraffic.jar InTraffic $@
usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/intraffic/intraffic.sh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/ucecho/ucecho.sh =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/ucecho/ucecho.sh (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/ucecho/ucecho.sh (revision 6) @@ -0,0 +1,4 @@ +#make -C ../../../java distclean all || exit +#make distclean all || exit +#make || exit +java -cp UCEcho.jar UCEcho $@
usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/ucecho/ucecho.sh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/ucecho/UCEcho.java =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/ucecho/UCEcho.java (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/ucecho/UCEcho.java (revision 6) @@ -0,0 +1,179 @@ +/*!2 + ucecho -- uppercase conversion example for ZTEX USB-FPGA Module 1.15b + Copyright (C) 2009-2011 ZTEX GmbH. + http://www.ztex.de + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License version 3 as + published by the Free Software Foundation. + + This program is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, see http://www.gnu.org/licenses/. +!*/ + +import java.io.*; +import java.util.*; + +import ch.ntb.usb.*; + +import ztex.*; + +// ***************************************************************************** +// ******* ParameterException ************************************************** +// ***************************************************************************** +// Exception the prints a help message +class ParameterException extends Exception { + public final static String helpMsg = new String ( + "Parameters:\n"+ + " -d Device Number (default: 0)\n" + + " -f Force uploads\n" + + " -p Print bus info\n" + + " -w Enable certain workarounds\n"+ + " -h This help" ); + + public ParameterException (String msg) { + super( msg + "\n" + helpMsg ); + } +} + +// ***************************************************************************** +// ******* Test0 *************************************************************** +// ***************************************************************************** +class UCEcho extends Ztex1v1 { + +// ******* UCEcho ************************************************************** +// constructor + public UCEcho ( ZtexDevice1 pDev ) throws UsbException { + super ( pDev ); + } + +// ******* echo **************************************************************** +// writes a string to Endpoint 4, reads it back from Endpoint 2 and writes the output to System.out + public void echo ( int fpga, String input ) throws UsbException, InvalidFirmwareException, IndexOutOfBoundsException { + byte buf[] = input.getBytes(); + + selectFpga(fpga); + + int i = LibusbJava.usb_bulk_write(handle(), 0x04, buf, buf.length, 1000); + if ( i<0 ) + throw new UsbException("Error sending data: " + LibusbJava.usb_strerror()); + System.out.println("FPGA " + fpga + ": Send "+i+" bytes: `"+input+"'" ); + + try { + Thread.sleep( 10 ); + } + catch ( InterruptedException e ) { + } + + buf = new byte[1024]; + i = LibusbJava.usb_bulk_read(handle(), 0x82, buf, 1024, 1000); + if ( i<0 ) + throw new UsbException("Error receiving data: " + LibusbJava.usb_strerror()); + System.out.println("FPGA " + fpga + ": Read "+i+" bytes: `"+new String(buf,0,i)+"'" ); + } + +// ******* main **************************************************************** + public static void main (String args[]) { + + int devNum = 0; + boolean force = false; + boolean workarounds = false; + + try { +// init USB stuff + LibusbJava.usb_init(); + +// scan the USB bus + ZtexScanBus1 bus = new ZtexScanBus1( ZtexDevice1.ztexVendorId, ZtexDevice1.ztexProductId, true, false, 1); + if ( bus.numberOfDevices() <= 0) { + System.err.println("No devices found"); + System.exit(0); + } + +// scan the command line arguments + for (int i=0; i=args.length) throw new Exception(); + devNum = Integer.parseInt( args[i] ); + } + catch (Exception e) { + throw new ParameterException("Device number expected after -d"); + } + } + else if ( args[i].equals("-f") ) { + force = true; + } + else if ( args[i].equals("-p") ) { + bus.printBus(System.out); + System.exit(0); + } + else if ( args[i].equals("-p") ) { + bus.printBus(System.out); + System.exit(0); + } + else if ( args[i].equals("-w") ) { + workarounds = true; + } + else if ( args[i].equals("-h") ) { + System.err.println(ParameterException.helpMsg); + System.exit(0); + } + else throw new ParameterException("Invalid Parameter: "+args[i]); + } + + +// create the main class + UCEcho ztex = new UCEcho ( bus.device(devNum) ); + ztex.certainWorkarounds = workarounds; + +// upload the firmware if necessary + if ( force || ! ztex.valid() || ! ztex.dev().productString().equals("ucecho example for UFM 1.15y") ) { + System.out.println("Firmware upload time: " + ztex.uploadFirmware( "ucecho.ihx", force ) + " ms"); + force=true; + } + + System.out.println("" + ztex.numberOfFpgas() + " FPGA's found"); + +// upload the bitstream if necessary + for (int i=0; i0 && size<=512 && !(EP2CS & bmBIT3)) { // EP2 is not full + for ( i=0; i> 8; + SYNCDELAY; + EP2BCL = size & 255; // arm EP2 + } + SYNCDELAY; + EP4BCL = 0x80; // (re)arm EP4 + } + } +} Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/ucecho/ucecho.bat =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/ucecho/ucecho.bat (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/ucecho/ucecho.bat (revision 6) @@ -0,0 +1,2 @@ +java -cp UCEcho.jar UCEcho +pause Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/ucecho/fpga/ucecho.ucf =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/ucecho/fpga/ucecho.ucf (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/ucecho/fpga/ucecho.ucf (revision 6) @@ -0,0 +1,27 @@ +NET "CLK" TNM_NET = "CLK"; +TIMESPEC "TS_CLK" = PERIOD "CLK" 20 ns HIGH 50 %; +NET "CLK" LOC = "L22" | IOSTANDARD = LVCMOS33 ; + +NET "CS" LOC = "AB11" | IOSTANDARD = LVCMOS33 ; + +NET "pb<0>" LOC = "Y17" | IOSTANDARD = LVCMOS33 ; +NET "pb<1>" LOC = "V13" | IOSTANDARD = LVCMOS33 ; +NET "pb<2>" LOC = "W13" | IOSTANDARD = LVCMOS33 ; +NET "pb<3>" LOC = "AA8" | IOSTANDARD = LVCMOS33 ; +NET "pb<4>" LOC = "AB8" | IOSTANDARD = LVCMOS33 ; +NET "pb<5>" LOC = "W6" | IOSTANDARD = LVCMOS33 ; +NET "pb<6>" LOC = "Y6" | IOSTANDARD = LVCMOS33 ; +NET "pb<7>" LOC = "Y9" | IOSTANDARD = LVCMOS33 ; + +NET "pc<0>" LOC = "G20" | IOSTANDARD = LVCMOS33 ; +NET "pc<1>" LOC = "T20" | IOSTANDARD = LVCMOS33 ; +NET "pc<2>" LOC = "Y5" | IOSTANDARD = LVCMOS33 ; +NET "pc<3>" LOC = "AB9" | IOSTANDARD = LVCMOS33 ; +NET "pc<4>" LOC = "G19" | IOSTANDARD = LVCMOS33 ; +NET "pc<5>" LOC = "H20" | IOSTANDARD = LVCMOS33 ; +NET "pc<6>" LOC = "H19" | IOSTANDARD = LVCMOS33 ; +NET "pc<7>" LOC = "H18" | IOSTANDARD = LVCMOS33 ; + +# NET "SCL" LOC = "F22" | IOSTANDARD = LVCMOS33 ; +# NET "SDA" LOC = "E22" | IOSTANDARD = LVCMOS33 ; + Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/ucecho/fpga/ucecho.vhd =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/ucecho/fpga/ucecho.vhd (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/ucecho/fpga/ucecho.vhd (revision 6) @@ -0,0 +1,38 @@ +library ieee; +use IEEE.std_logic_1164.all; +use IEEE.numeric_std.all; + +entity ucecho is + port( + pc : in unsigned(7 downto 0); + pb : out std_logic_vector(7 downto 0); + CS : in std_logic; + CLK : in std_logic + +-- SCL : in std_logic; +-- SDA : in std_logic + ); +end ucecho; + + +architecture RTL of ucecho is + +--signal declaration +signal pb_buf : unsigned(7 downto 0); + +begin + pb <= std_logic_vector( pb_buf ) when CS = '1' else (others => 'Z'); + + dpUCECHO: process(CLK) + begin + if CLK' event and CLK = '1' then + if ( pc >= 97 ) and ( pc <= 122) + then + pb_buf <= pc - 32; + else + pb_buf <= pc; + end if; + end if; + end process dpUCECHO; + +end RTL; Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/ucecho/fpga/clean.sh =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/ucecho/fpga/clean.sh (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/ucecho/fpga/clean.sh (revision 6) @@ -0,0 +1,80 @@ +#!/bin/bash + +# This files / directories from this directory will not be removed +# Filenames with spaces or other spuid characters will be ignored +sourcefiles="*.vhd *.ucf *.sh *.ise *.bit *.bin *.xise" +subdirs="ipcore_dir" + + +# This sould not be edited. +list_files() { + if [ "$2" != "" ]; then + echo "$1" + for i in $2; do + echo " $i" + done + fi +} + +rmfiles="" +rmdirs="" +keepfiles="" +keepdirs="" +allfiles=`ls -A` +for f in $allfiles; do + keep=false + for i in $sourcefiles; do + if [ "$i" == "$f" ]; then + keep=true + fi + done + for i in $subdirs; do + if [ "$i" == "$f" ]; then + keep=true + fi + done + if [ -d "$f" ]; then + if $keep; then + keepdirs+=" $f" + else + rmdirs+=" $f" + fi + fi + if [ -f "$f" ]; then + if $keep; then + keepfiles+=" $f" + else + rmfiles+=" $f" + fi + fi +done + +echo +echo "Directory $PWD:" +list_files "This directories will NOT be removed:" "$keepdirs" +list_files "This files will NOT be removed:" "$keepfiles" +list_files "This directories will be removed:" "$rmdirs" +list_files "This files will be removed:" "$rmfiles" + +if [ "$rmfiles" == "" -a "$rmdirs" == "" ]; then + c="yes" +else + echo -n 'Confirm this by entering "yes": ' + read c +fi + +if [ "$c" == "yes" ]; then + [ "$rmfiles" != "" ] && rm $rmfiles + [ "$rmdirs" != "" ] && rm -r $rmdirs + + for d in $subdirs; do + if [ -x "$d/clean.sh" ]; then + cd $d + ./clean.sh || exit 1 + cd .. + fi + done + + exit 0 +fi +exit 1
usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/ucecho/fpga/clean.sh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/ucecho/fpga/ucecho.xise =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/ucecho/fpga/ucecho.xise (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/ucecho/fpga/ucecho.xise (revision 6) @@ -0,0 +1,67 @@ + + + +
+ + + + + + + + +
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/ucecho/Makefile =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/ucecho/Makefile (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/ucecho/Makefile (revision 6) @@ -0,0 +1,27 @@ +######################### +# configuration section # +######################### + +# Defines the location of the EZ-USB SDK +ZTEXPREFIX=../../.. + +# The name of the jar archive +JARTARGET=UCEcho.jar +# Java Classes that have to be build +CLASSTARGETS=UCEcho.class +# Extra dependencies for Java Classes +CLASSEXTRADEPS= + +# ihx files (firmware ROM files) that have to be build +IHXTARGETS=ucecho.ihx +# Extra Dependencies for ihx files +IHXEXTRADEPS= + +# Extra files that should be included into th jar archive +EXTRAJARFILES=ucecho.ihx fpga/ucecho.bit + +################################ +# DO NOT CHANAGE THE FOLLOWING # +################################ +# includes the main Makefile +include $(ZTEXPREFIX)/Makefile.mk Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/ucecho/Readme =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/ucecho/Readme (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/ucecho/Readme (revision 6) @@ -0,0 +1,21 @@ +ucecho +------ + +This example is intended for ZTEX USB-FPGA-Modules. + +The firmware (defined in ucecho.c) declares Endpoint 2 and Endpoint 4 +(both 512 bytes, double buffered, bulk transfer, belong to interface 0). +All data that is written to Endpoint 4 is converted to uppercase by +the FPGA and can be read back from Endpoint 2. + +This example does the same as the example in directory ../../all/ucecho +except that the uppercase - lowercase conversion is made by the FPGA. + +The driver (defined in UCEcho.java) uploads the the Firmware (ucecho.ihx) +to the EZ-USB Microcontroller and the Bitstream (fpga/ucecho.bit) to the +FPGA if necessary, sends user string to the device and reads them back. + +Uploading the Firmware to EEPROM is also supported by the firmware (e.g. +using the FWLoader utility). + +This example may serve a good starting point for own projects. Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/Makefile =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/Makefile (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15y/Makefile (revision 6) @@ -0,0 +1,25 @@ +DIRS=intraffic ucecho default + +.PHONY: default all clean distclean avr avrclean avrdistclean + +default: + @echo "This makefile is intended to clean up the project or to build all examples in this subdirectory" + @echo "Usage: make all | clean | distclean" + +all: + set -e; for i in $(DIRS); do make -C $$i all; done + +clean: + set -e; for i in $(DIRS); do make -C $$i clean; done + +distclean: + set -e; for i in $(DIRS); do make -C $$i distclean; done + +avr: + set -e; for i in $(DIRS); do make -C $$i avr; done + +avrclean: + set -e; for i in $(DIRS); do make -C $$i avrclean; done + +avrdistclean: + set -e; for i in $(DIRS); do make -C $$i avrdistclean; done Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.11/nvmtest/Makefile =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.11/nvmtest/Makefile (revision 5) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.11/nvmtest/Makefile (revision 6) @@ -7,11 +7,11 @@ JARTARGET=NVMTest.jar CLASSTARGETS=NVMTest.class CLASSEXTRADEPS= -CLASSEXTRADEPS:=$(shell echo $(ZTEXPREFIX)/java/ztex/*.java) +CLASSEXTRADEPS:=$(wildcard $(ZTEXPREFIX)/java/ztex/*.java) IHXTARGETS=nvmtest.ihx IHXEXTRADEPS= -IHXEXTRADEPS:=$(shell echo $(ZTEXPREFIX)/include/*.h) +IHXEXTRADEPS:=$(wildcard $(ZTEXPREFIX)/include/*.h) EXTRAJARFILES=nvmtest.ihx ################################
/usb_fpga_1_11/trunk/examples/usb-fpga-1.11/1.11a/intraffic/InTraffic.java
186,6 → 186,7
// upload the firmware if necessary
if ( force || ! ztex.valid() || ! ztex.dev().productString().equals("intraffic example for UFM 1.11") ) {
System.out.println("Firmware upload time: " + ztex.uploadFirmware( "intraffic.ihx", force ) + " ms");
force = true;
}
// upload the bitstream if necessary
/usb_fpga_1_11/trunk/examples/usb-fpga-1.11/1.11a/ucecho/UCEcho.java
133,6 → 133,7
// upload the firmware if necessary
if ( force || ! ztex.valid() || ! ztex.dev().productString().equals("ucecho example for UFM 1.11") ) {
System.out.println("Firmware upload time: " + ztex.uploadFirmware( "ucecho.ihx", force ) + " ms");
force = true;
}
// upload the bitstream if necessary
/usb_fpga_1_11/trunk/examples/usb-fpga-1.11/1.11a/lightshow/avr/lightshow.ihx
1,45 → 1,44
:100000000C94FA000C941B010C941B010C941B0122
:100010000C941B010C941B010C941B010C941B01F0
:100020000C941B010C941B010C941B010C941B01E0
:100030000C941B010C941B010C941B010C941B01D0
:100040000C941B010C941B010C941B010C941B01C0
:100050000C941B010C941B010C941B010C941B01B0
:100060000C941B010C941B010C941B010C941B01A0
:100070000C941B010C941B010C941B010C941B0190
:100080000C941B010C941B010C941B010C941B0180
:100090000C941B010C941B010C941B010C941B0170
:1000A0000C941B010C941B010C941B010C941B0160
:1000B0000C941B010C941B010C941B010C941B0150
:1000C0000C941B010C941B010C941B010C941B0140
:1000D0000C941B010C941B010C941B010C941B0130
:1000E0000C941B010C941B010C941B010C941B0120
:1000F0000C941B010C941B010C941B010C941B0110
:100100000C941B010C941B010C941B010C941B01FF
:100110000C941B010C941B010C941B010C941B01EF
:100120000C941B010C941B010C941B010C941B01DF
:100130000C941B010C941B010C941B010C941B01CF
:100140000C941B010C941B010C941B010C941B01BF
:100150000C941B010C941B010C941B010C941B01AF
:100160000C941B010C941B010C941B010C941B019F
:100170000C941B010C941B010C941B010C941B018F
:100180000C941B010C941B010C941B010C941B017F
:100190000C941B010C941B010C941B010C941B016F
:1001A0000C941B010C941B010C941B010C941B015F
:1001B0000C941B010C941B010C941B010C941B014F
:1001C0000C941B010C941B010C941B010C941B013F
:1001D0000C941B010C941B010C941B010C941B012F
:1001E0000C941B010C941B010C941B010C941B011F
:1001F0000C941B0111241FBECFEFDFE3DEBFCDBF88
:1002000000E00CBF10E2A0E0B0E2E2EBF2E000E0C0
:100210000BBF02C007900D92A030B107D9F710E2D2
:10022000A0E0B0E201C01D92A030B107E1F70E944A
:100230001D010C9457010C94000088ED77E084BFF9
:10024000709350008091510087708730D9F788ED06
:1002500071E084BF7093600084BF7093680084BFB6
:100260007093400088ED71E084BF7093960082E047
:10027000E0EBF0E0848380E8809360061092000752
:100280001092E006809160068F60809360068FEF89
:100290008093A006A0E6B6E0E0EAF6E080910807C9
:1002A00014968C9314978091E8068483F7CFF89482
:0202B000FFCF7E
:100000000C94FA000C9418010C9418010C9418012B
:100010000C9418010C9418010C9418010C941801FC
:100020000C9418010C9418010C9418010C941801EC
:100030000C9418010C9418010C9418010C941801DC
:100040000C9418010C9418010C9418010C941801CC
:100050000C9418010C9418010C9418010C941801BC
:100060000C9418010C9418010C9418010C941801AC
:100070000C9418010C9418010C9418010C9418019C
:100080000C9418010C9418010C9418010C9418018C
:100090000C9418010C9418010C9418010C9418017C
:1000A0000C9418010C9418010C9418010C9418016C
:1000B0000C9418010C9418010C9418010C9418015C
:1000C0000C9418010C9418010C9418010C9418014C
:1000D0000C9418010C9418010C9418010C9418013C
:1000E0000C9418010C9418010C9418010C9418012C
:1000F0000C9418010C9418010C9418010C9418011C
:100100000C9418010C9418010C9418010C9418010B
:100110000C9418010C9418010C9418010C941801FB
:100120000C9418010C9418010C9418010C941801EB
:100130000C9418010C9418010C9418010C941801DB
:100140000C9418010C9418010C9418010C941801CB
:100150000C9418010C9418010C9418010C941801BB
:100160000C9418010C9418010C9418010C941801AB
:100170000C9418010C9418010C9418010C9418019B
:100180000C9418010C9418010C9418010C9418018B
:100190000C9418010C9418010C9418010C9418017B
:1001A0000C9418010C9418010C9418010C9418016B
:1001B0000C9418010C9418010C9418010C9418015B
:1001C0000C9418010C9418010C9418010C9418014B
:1001D0000C9418010C9418010C9418010C9418013B
:1001E0000C9418010C9418010C9418010C9418012B
:1001F0000C94180111241FBECFEFDFE3DEBFCDBF8B
:1002000000E00CBF18BE19BE1ABE1BBE10E2A0E073
:10021000B0E2ECEAF2E000E00BBF02C007900D9202
:10022000A030B107D9F71BBE0E941A010C945401EB
:100230000C94000088ED77E084BF709350008091AB
:10024000510087708730D9F788ED71E084BF7093D3
:10025000600084BF7093680084BF7093400088ED95
:1002600071E084BF7093960082E0E0EBF0E084835D
:1002700080E880936006109200071092E00680915B
:1002800060068F60809360068FEF8093A006A0E6E3
:10029000B6E0E0EAF6E08091080714968C93149794
:0C02A0008091E8068483F7CFF894FFCF2C
:00000001FF
/usb_fpga_1_11/trunk/examples/usb-fpga-1.11/1.11a/lightshow/Makefile
7,11 → 7,11
JARTARGET=Lightshow.jar
CLASSTARGETS=Lightshow.class
CLASSEXTRADEPS=
#CLASSEXTRADEPS:=$(shell echo $(ZTEXPREFIX)/java/ztex/*.java)
#CLASSEXTRADEPS:=$(wildcard $(ZTEXPREFIX)/java/ztex/*.java)
 
IHXTARGETS=lightshow.ihx
IHXEXTRADEPS=
#IHXEXTRADEPS:=$(shell echo $(ZTEXPREFIX)/include/*.h)
#IHXEXTRADEPS:=$(wildcard $(ZTEXPREFIX)/include/*.h)
EXTRAJARFILES=lightshow.ihx avr/lightshow.ihx fpga/lightshow.bit
 
################################
/usb_fpga_1_11/trunk/examples/usb-fpga-1.11/1.11a/Makefile
1,6 → 1,6
DIRS=ucecho intraffic memtest lightshow
 
.PHONY: default all clean distclean
.PHONY: default all clean distclean avr avrclean avrdistclean
 
default:
@echo "This makefile is intended to clean up the project or to build all examples in this subdirectory"
7,10 → 7,19
@echo "Usage: make all | clean | distclean"
 
all:
for i in $(DIRS); do make -C $$i all; done
set -e; for i in $(DIRS); do make -C $$i all; done
 
clean:
for i in $(DIRS); do make -C $$i clean; done
set -e; for i in $(DIRS); do make -C $$i clean; done
 
distclean: clean
for i in $(DIRS); do make -C $$i distclean; done
distclean:
set -e; for i in $(DIRS); do make -C $$i distclean; done
 
avr:
set -e; for i in $(DIRS); do make -C $$i avr; done
 
avrclean:
set -e; for i in $(DIRS); do make -C $$i avrclean; done
 
avrdistclean:
set -e; for i in $(DIRS); do make -C $$i avrdistclean; done
/usb_fpga_1_11/trunk/examples/usb-fpga-1.11/1.11a/memtest/MemTest.java
187,6 → 187,7
// upload the firmware if necessary
if ( force || ! ztex.valid() || ! ztex.dev().productString().equals("memtest example for UFM 1.11") ) {
System.out.println("Firmware upload time: " + ztex.uploadFirmware( "memtest.ihx", force ) + " ms");
force = true;
}
 
ztex.vendorCommand (0x60, "Set test pattern", (genMode ? 1 : 0), 0);
/usb_fpga_1_11/trunk/examples/usb-fpga-1.11/1.11b/intraffic/InTraffic.java
186,6 → 186,7
// upload the firmware if necessary
if ( force || ! ztex.valid() || ! ztex.dev().productString().equals("intraffic example for UFM 1.11") ) {
System.out.println("Firmware upload time: " + ztex.uploadFirmware( "intraffic.ihx", force ) + " ms");
force = true;
}
// upload the bitstream if necessary
/usb_fpga_1_11/trunk/examples/usb-fpga-1.11/1.11b/ucecho/UCEcho.java
133,6 → 133,7
// upload the firmware if necessary
if ( force || ! ztex.valid() || ! ztex.dev().productString().equals("ucecho example for UFM 1.11") ) {
System.out.println("Firmware upload time: " + ztex.uploadFirmware( "ucecho.ihx", force ) + " ms");
force = true;
}
// upload the bitstream if necessary
/usb_fpga_1_11/trunk/examples/usb-fpga-1.11/1.11b/lightshow/avr/lightshow.ihx
1,45 → 1,44
:100000000C94FA000C941B010C941B010C941B0122
:100010000C941B010C941B010C941B010C941B01F0
:100020000C941B010C941B010C941B010C941B01E0
:100030000C941B010C941B010C941B010C941B01D0
:100040000C941B010C941B010C941B010C941B01C0
:100050000C941B010C941B010C941B010C941B01B0
:100060000C941B010C941B010C941B010C941B01A0
:100070000C941B010C941B010C941B010C941B0190
:100080000C941B010C941B010C941B010C941B0180
:100090000C941B010C941B010C941B010C941B0170
:1000A0000C941B010C941B010C941B010C941B0160
:1000B0000C941B010C941B010C941B010C941B0150
:1000C0000C941B010C941B010C941B010C941B0140
:1000D0000C941B010C941B010C941B010C941B0130
:1000E0000C941B010C941B010C941B010C941B0120
:1000F0000C941B010C941B010C941B010C941B0110
:100100000C941B010C941B010C941B010C941B01FF
:100110000C941B010C941B010C941B010C941B01EF
:100120000C941B010C941B010C941B010C941B01DF
:100130000C941B010C941B010C941B010C941B01CF
:100140000C941B010C941B010C941B010C941B01BF
:100150000C941B010C941B010C941B010C941B01AF
:100160000C941B010C941B010C941B010C941B019F
:100170000C941B010C941B010C941B010C941B018F
:100180000C941B010C941B010C941B010C941B017F
:100190000C941B010C941B010C941B010C941B016F
:1001A0000C941B010C941B010C941B010C941B015F
:1001B0000C941B010C941B010C941B010C941B014F
:1001C0000C941B010C941B010C941B010C941B013F
:1001D0000C941B010C941B010C941B010C941B012F
:1001E0000C941B010C941B010C941B010C941B011F
:1001F0000C941B0111241FBECFEFDFE3DEBFCDBF88
:1002000000E00CBF10E2A0E0B0E2E2EBF2E000E0C0
:100210000BBF02C007900D92A030B107D9F710E2D2
:10022000A0E0B0E201C01D92A030B107E1F70E944A
:100230001D010C9457010C94000088ED77E084BFF9
:10024000709350008091510087708730D9F788ED06
:1002500071E084BF7093600084BF7093680084BFB6
:100260007093400088ED71E084BF7093960082E047
:10027000E0EBF0E0848380E8809360061092000752
:100280001092E006809160068F60809360068FEF89
:100290008093A006A0E6B6E0E0EAF6E080910807C9
:1002A00014968C9314978091E8068483F7CFF89482
:0202B000FFCF7E
:100000000C94FA000C9418010C9418010C9418012B
:100010000C9418010C9418010C9418010C941801FC
:100020000C9418010C9418010C9418010C941801EC
:100030000C9418010C9418010C9418010C941801DC
:100040000C9418010C9418010C9418010C941801CC
:100050000C9418010C9418010C9418010C941801BC
:100060000C9418010C9418010C9418010C941801AC
:100070000C9418010C9418010C9418010C9418019C
:100080000C9418010C9418010C9418010C9418018C
:100090000C9418010C9418010C9418010C9418017C
:1000A0000C9418010C9418010C9418010C9418016C
:1000B0000C9418010C9418010C9418010C9418015C
:1000C0000C9418010C9418010C9418010C9418014C
:1000D0000C9418010C9418010C9418010C9418013C
:1000E0000C9418010C9418010C9418010C9418012C
:1000F0000C9418010C9418010C9418010C9418011C
:100100000C9418010C9418010C9418010C9418010B
:100110000C9418010C9418010C9418010C941801FB
:100120000C9418010C9418010C9418010C941801EB
:100130000C9418010C9418010C9418010C941801DB
:100140000C9418010C9418010C9418010C941801CB
:100150000C9418010C9418010C9418010C941801BB
:100160000C9418010C9418010C9418010C941801AB
:100170000C9418010C9418010C9418010C9418019B
:100180000C9418010C9418010C9418010C9418018B
:100190000C9418010C9418010C9418010C9418017B
:1001A0000C9418010C9418010C9418010C9418016B
:1001B0000C9418010C9418010C9418010C9418015B
:1001C0000C9418010C9418010C9418010C9418014B
:1001D0000C9418010C9418010C9418010C9418013B
:1001E0000C9418010C9418010C9418010C9418012B
:1001F0000C94180111241FBECFEFDFE3DEBFCDBF8B
:1002000000E00CBF18BE19BE1ABE1BBE10E2A0E073
:10021000B0E2ECEAF2E000E00BBF02C007900D9202
:10022000A030B107D9F71BBE0E941A010C945401EB
:100230000C94000088ED77E084BF709350008091AB
:10024000510087708730D9F788ED71E084BF7093D3
:10025000600084BF7093680084BF7093400088ED95
:1002600071E084BF7093960082E0E0EBF0E084835D
:1002700080E880936006109200071092E00680915B
:1002800060068F60809360068FEF8093A006A0E6E3
:10029000B6E0E0EAF6E08091080714968C93149794
:0C02A0008091E8068483F7CFF894FFCF2C
:00000001FF
/usb_fpga_1_11/trunk/examples/usb-fpga-1.11/1.11b/lightshow/Makefile
7,11 → 7,11
JARTARGET=Lightshow.jar
CLASSTARGETS=Lightshow.class
CLASSEXTRADEPS=
#CLASSEXTRADEPS:=$(shell echo $(ZTEXPREFIX)/java/ztex/*.java)
#CLASSEXTRADEPS:=$(wildcard $(ZTEXPREFIX)/java/ztex/*.java)
 
IHXTARGETS=lightshow.ihx
IHXEXTRADEPS=
#IHXEXTRADEPS:=$(shell echo $(ZTEXPREFIX)/include/*.h)
#IHXEXTRADEPS:=$(wildcard $(ZTEXPREFIX)/include/*.h)
EXTRAJARFILES=lightshow.ihx avr/lightshow.ihx fpga/lightshow.bit
 
################################
/usb_fpga_1_11/trunk/examples/usb-fpga-1.11/1.11b/Makefile
1,6 → 1,6
DIRS=ucecho intraffic memtest lightshow
 
.PHONY: default all clean distclean
.PHONY: default all clean distclean avr avrclean avrdistclean
 
default:
@echo "This makefile is intended to clean up the project or to build all examples in this subdirectory"
7,10 → 7,19
@echo "Usage: make all | clean | distclean"
 
all:
for i in $(DIRS); do make -C $$i all; done
set -e; for i in $(DIRS); do make -C $$i all; done
 
clean:
for i in $(DIRS); do make -C $$i clean; done
set -e; for i in $(DIRS); do make -C $$i clean; done
 
distclean: clean
for i in $(DIRS); do make -C $$i distclean; done
distclean:
set -e; for i in $(DIRS); do make -C $$i distclean; done
 
avr:
set -e; for i in $(DIRS); do make -C $$i avr; done
 
avrclean:
set -e; for i in $(DIRS); do make -C $$i avrclean; done
 
avrdistclean:
set -e; for i in $(DIRS); do make -C $$i avrdistclean; done
/usb_fpga_1_11/trunk/examples/usb-fpga-1.11/1.11b/memtest/MemTest.java
187,6 → 187,7
// upload the firmware if necessary
if ( force || ! ztex.valid() || ! ztex.dev().productString().equals("memtest example for UFM 1.11") ) {
System.out.println("Firmware upload time: " + ztex.uploadFirmware( "memtest.ihx", force ) + " ms");
force = true;
}
 
ztex.vendorCommand (0x60, "Set test pattern", (genMode ? 1 : 0), 0);
/usb_fpga_1_11/trunk/examples/usb-fpga-1.11/1.11c/intraffic/InTraffic.java
186,6 → 186,7
// upload the firmware if necessary
if ( force || ! ztex.valid() || ! ztex.dev().productString().equals("intraffic example for UFM 1.11") ) {
System.out.println("Firmware upload time: " + ztex.uploadFirmware( "intraffic.ihx", force ) + " ms");
force = true;
}
// upload the bitstream if necessary
/usb_fpga_1_11/trunk/examples/usb-fpga-1.11/1.11c/ucecho/UCEcho.java
133,6 → 133,7
// upload the firmware if necessary
if ( force || ! ztex.valid() || ! ztex.dev().productString().equals("ucecho example for UFM 1.11") ) {
System.out.println("Firmware upload time: " + ztex.uploadFirmware( "ucecho.ihx", force ) + " ms");
force = true;
}
// upload the bitstream if necessary
/usb_fpga_1_11/trunk/examples/usb-fpga-1.11/1.11c/lightshow/avr/lightshow.ihx
1,45 → 1,44
:100000000C94FA000C941B010C941B010C941B0122
:100010000C941B010C941B010C941B010C941B01F0
:100020000C941B010C941B010C941B010C941B01E0
:100030000C941B010C941B010C941B010C941B01D0
:100040000C941B010C941B010C941B010C941B01C0
:100050000C941B010C941B010C941B010C941B01B0
:100060000C941B010C941B010C941B010C941B01A0
:100070000C941B010C941B010C941B010C941B0190
:100080000C941B010C941B010C941B010C941B0180
:100090000C941B010C941B010C941B010C941B0170
:1000A0000C941B010C941B010C941B010C941B0160
:1000B0000C941B010C941B010C941B010C941B0150
:1000C0000C941B010C941B010C941B010C941B0140
:1000D0000C941B010C941B010C941B010C941B0130
:1000E0000C941B010C941B010C941B010C941B0120
:1000F0000C941B010C941B010C941B010C941B0110
:100100000C941B010C941B010C941B010C941B01FF
:100110000C941B010C941B010C941B010C941B01EF
:100120000C941B010C941B010C941B010C941B01DF
:100130000C941B010C941B010C941B010C941B01CF
:100140000C941B010C941B010C941B010C941B01BF
:100150000C941B010C941B010C941B010C941B01AF
:100160000C941B010C941B010C941B010C941B019F
:100170000C941B010C941B010C941B010C941B018F
:100180000C941B010C941B010C941B010C941B017F
:100190000C941B010C941B010C941B010C941B016F
:1001A0000C941B010C941B010C941B010C941B015F
:1001B0000C941B010C941B010C941B010C941B014F
:1001C0000C941B010C941B010C941B010C941B013F
:1001D0000C941B010C941B010C941B010C941B012F
:1001E0000C941B010C941B010C941B010C941B011F
:1001F0000C941B0111241FBECFEFDFE3DEBFCDBF88
:1002000000E00CBF10E2A0E0B0E2E2EBF2E000E0C0
:100210000BBF02C007900D92A030B107D9F710E2D2
:10022000A0E0B0E201C01D92A030B107E1F70E944A
:100230001D010C9457010C94000088ED77E084BFF9
:10024000709350008091510087708730D9F788ED06
:1002500071E084BF7093600084BF7093680084BFB6
:100260007093400088ED71E084BF7093960082E047
:10027000E0EBF0E0848380E8809360061092000752
:100280001092E006809160068F60809360068FEF89
:100290008093A006A0E6B6E0E0EAF6E080910807C9
:1002A00014968C9314978091E8068483F7CFF89482
:0202B000FFCF7E
:100000000C94FA000C9418010C9418010C9418012B
:100010000C9418010C9418010C9418010C941801FC
:100020000C9418010C9418010C9418010C941801EC
:100030000C9418010C9418010C9418010C941801DC
:100040000C9418010C9418010C9418010C941801CC
:100050000C9418010C9418010C9418010C941801BC
:100060000C9418010C9418010C9418010C941801AC
:100070000C9418010C9418010C9418010C9418019C
:100080000C9418010C9418010C9418010C9418018C
:100090000C9418010C9418010C9418010C9418017C
:1000A0000C9418010C9418010C9418010C9418016C
:1000B0000C9418010C9418010C9418010C9418015C
:1000C0000C9418010C9418010C9418010C9418014C
:1000D0000C9418010C9418010C9418010C9418013C
:1000E0000C9418010C9418010C9418010C9418012C
:1000F0000C9418010C9418010C9418010C9418011C
:100100000C9418010C9418010C9418010C9418010B
:100110000C9418010C9418010C9418010C941801FB
:100120000C9418010C9418010C9418010C941801EB
:100130000C9418010C9418010C9418010C941801DB
:100140000C9418010C9418010C9418010C941801CB
:100150000C9418010C9418010C9418010C941801BB
:100160000C9418010C9418010C9418010C941801AB
:100170000C9418010C9418010C9418010C9418019B
:100180000C9418010C9418010C9418010C9418018B
:100190000C9418010C9418010C9418010C9418017B
:1001A0000C9418010C9418010C9418010C9418016B
:1001B0000C9418010C9418010C9418010C9418015B
:1001C0000C9418010C9418010C9418010C9418014B
:1001D0000C9418010C9418010C9418010C9418013B
:1001E0000C9418010C9418010C9418010C9418012B
:1001F0000C94180111241FBECFEFDFE3DEBFCDBF8B
:1002000000E00CBF18BE19BE1ABE1BBE10E2A0E073
:10021000B0E2ECEAF2E000E00BBF02C007900D9202
:10022000A030B107D9F71BBE0E941A010C945401EB
:100230000C94000088ED77E084BF709350008091AB
:10024000510087708730D9F788ED71E084BF7093D3
:10025000600084BF7093680084BF7093400088ED95
:1002600071E084BF7093960082E0E0EBF0E084835D
:1002700080E880936006109200071092E00680915B
:1002800060068F60809360068FEF8093A006A0E6E3
:10029000B6E0E0EAF6E08091080714968C93149794
:0C02A0008091E8068483F7CFF894FFCF2C
:00000001FF
/usb_fpga_1_11/trunk/examples/usb-fpga-1.11/1.11c/lightshow/Makefile
7,11 → 7,11
JARTARGET=Lightshow.jar
CLASSTARGETS=Lightshow.class
CLASSEXTRADEPS=
#CLASSEXTRADEPS:=$(shell echo $(ZTEXPREFIX)/java/ztex/*.java)
#CLASSEXTRADEPS:=$(wildcard $(ZTEXPREFIX)/java/ztex/*.java)
 
IHXTARGETS=lightshow.ihx
IHXEXTRADEPS=
#IHXEXTRADEPS:=$(shell echo $(ZTEXPREFIX)/include/*.h)
#IHXEXTRADEPS:=$(wildcard $(ZTEXPREFIX)/include/*.h)
EXTRAJARFILES=lightshow.ihx avr/lightshow.ihx fpga/lightshow.bit
 
################################
/usb_fpga_1_11/trunk/examples/usb-fpga-1.11/1.11c/Makefile
1,6 → 1,6
DIRS=ucecho intraffic memtest lightshow
 
.PHONY: default all clean distclean
.PHONY: default all clean distclean avr avrclean avrdistclean
 
default:
@echo "This makefile is intended to clean up the project or to build all examples in this subdirectory"
7,10 → 7,19
@echo "Usage: make all | clean | distclean"
 
all:
for i in $(DIRS); do make -C $$i all; done
set -e; for i in $(DIRS); do make -C $$i all; done
 
clean:
for i in $(DIRS); do make -C $$i clean; done
set -e; for i in $(DIRS); do make -C $$i clean; done
 
distclean: clean
for i in $(DIRS); do make -C $$i distclean; done
distclean:
set -e; for i in $(DIRS); do make -C $$i distclean; done
 
avr:
set -e; for i in $(DIRS); do make -C $$i avr; done
 
avrclean:
set -e; for i in $(DIRS); do make -C $$i avrclean; done
 
avrdistclean:
set -e; for i in $(DIRS); do make -C $$i avrdistclean; done
/usb_fpga_1_11/trunk/examples/usb-fpga-1.11/1.11c/memtest/MemTest.java
187,6 → 187,7
// upload the firmware if necessary
if ( force || ! ztex.valid() || ! ztex.dev().productString().equals("memtest example for UFM 1.11") ) {
System.out.println("Firmware upload time: " + ztex.uploadFirmware( "memtest.ihx", force ) + " ms");
force = true;
}
 
ztex.vendorCommand (0x60, "Set test pattern", (genMode ? 1 : 0), 0);
/usb_fpga_1_11/trunk/examples/usb-fpga-1.11/Makefile
1,6 → 1,6
DIRS=flashdemo flashbench standalone nvmtest 1.11a 1.11b 1.11c
 
.PHONY: default all clean distclean
.PHONY: default all clean distclean avr avrclean avrdistclean
 
default:
@echo "This makefile is intended to clean up the project or to build all examples in this subdirectory"
7,10 → 7,19
@echo "Usage: make all | clean | distclean"
 
all:
for i in $(DIRS); do make -C $$i all; done
set -e; for i in $(DIRS); do make -C $$i all; done
 
clean:
for i in $(DIRS); do make -C $$i clean; done
set -e; for i in $(DIRS); do make -C $$i clean; done
 
distclean: clean
for i in $(DIRS); do make -C $$i distclean; done
distclean:
set -e; for i in $(DIRS); do make -C $$i distclean; done
 
avr:
set -e; for i in $(DIRS); do make -C $$i avr; done
 
avrclean:
set -e; for i in $(DIRS); do make -C $$i avrclean; done
 
avrdistclean:
set -e; for i in $(DIRS); do make -C $$i avrdistclean; done
/usb_fpga_1_11/trunk/examples/usb-fpga-1.11/flashbench/Makefile
7,11 → 7,11
JARTARGET=FlashBench.jar
CLASSTARGETS=FlashBench.class
CLASSEXTRADEPS=
#CLASSEXTRADEPS:=$(shell echo $(ZTEXPREFIX)/java/ztex/*.java)
#CLASSEXTRADEPS:=$(wildcard $(ZTEXPREFIX)/java/ztex/*.java)
 
IHXTARGETS=flashbench.ihx
IHXEXTRADEPS=
#IHXEXTRADEPS:=$(shell echo $(ZTEXPREFIX)/include/*.h)
#IHXEXTRADEPS:=$(wildcard $(ZTEXPREFIX)/include/*.h)
EXTRAJARFILES=flashbench.ihx
 
################################
/usb_fpga_1_11/trunk/examples/usb-fpga-1.2/nvmtest/Makefile
7,11 → 7,11
JARTARGET=NVMTest.jar
CLASSTARGETS=NVMTest.class
CLASSEXTRADEPS=
CLASSEXTRADEPS:=$(shell echo $(ZTEXPREFIX)/java/ztex/*.java)
#CLASSEXTRADEPS:=$(wildcard $(ZTEXPREFIX)/java/ztex/*.java)
 
IHXTARGETS=nvmtest.ihx
IHXEXTRADEPS=
IHXEXTRADEPS:=$(shell echo $(ZTEXPREFIX)/include/*.h)
#IHXEXTRADEPS:=$(wildcard $(ZTEXPREFIX)/include/*.h)
EXTRAJARFILES=nvmtest.ihx
 
################################
/usb_fpga_1_11/trunk/examples/usb-fpga-1.2/lightshow/avr/lightshow.ihx
1,45 → 1,44
:100000000C94FA000C941B010C941B010C941B0122
:100010000C941B010C941B010C941B010C941B01F0
:100020000C941B010C941B010C941B010C941B01E0
:100030000C941B010C941B010C941B010C941B01D0
:100040000C941B010C941B010C941B010C941B01C0
:100050000C941B010C941B010C941B010C941B01B0
:100060000C941B010C941B010C941B010C941B01A0
:100070000C941B010C941B010C941B010C941B0190
:100080000C941B010C941B010C941B010C941B0180
:100090000C941B010C941B010C941B010C941B0170
:1000A0000C941B010C941B010C941B010C941B0160
:1000B0000C941B010C941B010C941B010C941B0150
:1000C0000C941B010C941B010C941B010C941B0140
:1000D0000C941B010C941B010C941B010C941B0130
:1000E0000C941B010C941B010C941B010C941B0120
:1000F0000C941B010C941B010C941B010C941B0110
:100100000C941B010C941B010C941B010C941B01FF
:100110000C941B010C941B010C941B010C941B01EF
:100120000C941B010C941B010C941B010C941B01DF
:100130000C941B010C941B010C941B010C941B01CF
:100140000C941B010C941B010C941B010C941B01BF
:100150000C941B010C941B010C941B010C941B01AF
:100160000C941B010C941B010C941B010C941B019F
:100170000C941B010C941B010C941B010C941B018F
:100180000C941B010C941B010C941B010C941B017F
:100190000C941B010C941B010C941B010C941B016F
:1001A0000C941B010C941B010C941B010C941B015F
:1001B0000C941B010C941B010C941B010C941B014F
:1001C0000C941B010C941B010C941B010C941B013F
:1001D0000C941B010C941B010C941B010C941B012F
:1001E0000C941B010C941B010C941B010C941B011F
:1001F0000C941B0111241FBECFEFDFE3DEBFCDBF88
:1002000000E00CBF10E2A0E0B0E2E2EBF2E000E0C0
:100210000BBF02C007900D92A030B107D9F710E2D2
:10022000A0E0B0E201C01D92A030B107E1F70E944A
:100230001D010C9457010C94000088ED77E084BFF9
:10024000709350008091510087708730D9F788ED06
:1002500071E084BF7093600084BF7093680084BFB6
:100260007093400088ED71E084BF7093960082E047
:10027000E0EBF0E0848380E8809360061092000752
:100280001092E006809160068F60809360068FEF89
:100290008093A006A0E6B6E0E0EAF6E080910807C9
:1002A00014968C9314978091E8068483F7CFF89482
:0202B000FFCF7E
:100000000C94FA000C9418010C9418010C9418012B
:100010000C9418010C9418010C9418010C941801FC
:100020000C9418010C9418010C9418010C941801EC
:100030000C9418010C9418010C9418010C941801DC
:100040000C9418010C9418010C9418010C941801CC
:100050000C9418010C9418010C9418010C941801BC
:100060000C9418010C9418010C9418010C941801AC
:100070000C9418010C9418010C9418010C9418019C
:100080000C9418010C9418010C9418010C9418018C
:100090000C9418010C9418010C9418010C9418017C
:1000A0000C9418010C9418010C9418010C9418016C
:1000B0000C9418010C9418010C9418010C9418015C
:1000C0000C9418010C9418010C9418010C9418014C
:1000D0000C9418010C9418010C9418010C9418013C
:1000E0000C9418010C9418010C9418010C9418012C
:1000F0000C9418010C9418010C9418010C9418011C
:100100000C9418010C9418010C9418010C9418010B
:100110000C9418010C9418010C9418010C941801FB
:100120000C9418010C9418010C9418010C941801EB
:100130000C9418010C9418010C9418010C941801DB
:100140000C9418010C9418010C9418010C941801CB
:100150000C9418010C9418010C9418010C941801BB
:100160000C9418010C9418010C9418010C941801AB
:100170000C9418010C9418010C9418010C9418019B
:100180000C9418010C9418010C9418010C9418018B
:100190000C9418010C9418010C9418010C9418017B
:1001A0000C9418010C9418010C9418010C9418016B
:1001B0000C9418010C9418010C9418010C9418015B
:1001C0000C9418010C9418010C9418010C9418014B
:1001D0000C9418010C9418010C9418010C9418013B
:1001E0000C9418010C9418010C9418010C9418012B
:1001F0000C94180111241FBECFEFDFE3DEBFCDBF8B
:1002000000E00CBF18BE19BE1ABE1BBE10E2A0E073
:10021000B0E2ECEAF2E000E00BBF02C007900D9202
:10022000A030B107D9F71BBE0E941A010C945401EB
:100230000C94000088ED77E084BF709350008091AB
:10024000510087708730D9F788ED71E084BF7093D3
:10025000600084BF7093680084BF7093400088ED95
:1002600071E084BF7093960082E0E0EBF0E084835D
:1002700080E880936006109200071092E00680915B
:1002800060068F60809360068FEF8093A006A0E6E3
:10029000B6E0E0EAF6E08091080714968C93149794
:0C02A0008091E8068483F7CFF894FFCF2C
:00000001FF
/usb_fpga_1_11/trunk/examples/usb-fpga-1.2/lightshow/Makefile
7,11 → 7,11
JARTARGET=Lightshow.jar
CLASSTARGETS=Lightshow.class
CLASSEXTRADEPS=
#CLASSEXTRADEPS:=$(shell echo $(ZTEXPREFIX)/java/ztex/*.java)
#CLASSEXTRADEPS:=$(wildcard $(ZTEXPREFIX)/java/ztex/*.java)
 
IHXTARGETS=lightshow.ihx
IHXEXTRADEPS=
#IHXEXTRADEPS:=$(shell echo $(ZTEXPREFIX)/include/*.h)
#IHXEXTRADEPS:=$(wildcard $(ZTEXPREFIX)/include/*.h)
EXTRAJARFILES=lightshow.ihx avr/lightshow.ihx fpga/lightshow.bit
 
################################
/usb_fpga_1_11/trunk/examples/usb-fpga-1.2/Makefile
1,6 → 1,6
DIRS=ucecho flashdemo flashbench intraffic standalone nvmtest lightshow
 
.PHONY: default all clean distclean
.PHONY: default all clean distclean avr avrclean avrdistclean
 
default:
@echo "This makefile is intended to clean up the project or to build all examples in this subdirectory"
7,10 → 7,19
@echo "Usage: make all | clean | distclean"
 
all:
for i in $(DIRS); do make -C $$i all; done
set -e; for i in $(DIRS); do make -C $$i all; done
 
clean:
for i in $(DIRS); do make -C $$i clean; done
set -e; for i in $(DIRS); do make -C $$i clean; done
 
distclean: clean
for i in $(DIRS); do make -C $$i distclean; done
distclean:
set -e; for i in $(DIRS); do make -C $$i distclean; done
 
avr:
set -e; for i in $(DIRS); do make -C $$i avr; done
 
avrclean:
set -e; for i in $(DIRS); do make -C $$i avrclean; done
 
avrdistclean:
set -e; for i in $(DIRS); do make -C $$i avrdistclean; done
/usb_fpga_1_11/trunk/examples/usb-fpga-1.2/flashbench/Makefile
7,11 → 7,11
JARTARGET=FlashBench.jar
CLASSTARGETS=FlashBench.class
CLASSEXTRADEPS=
#CLASSEXTRADEPS:=$(shell echo $(ZTEXPREFIX)/java/ztex/*.java)
#CLASSEXTRADEPS:=$(wildcard $(ZTEXPREFIX)/java/ztex/*.java)
 
IHXTARGETS=flashbench.ihx
IHXEXTRADEPS=
#IHXEXTRADEPS:=$(shell echo $(ZTEXPREFIX)/include/*.h)
#IHXEXTRADEPS:=$(wildcard $(ZTEXPREFIX)/include/*.h)
EXTRAJARFILES=flashbench.ihx
 
################################
/usb_fpga_1_11/trunk/examples/usb-xmega-1.0/nvmtest/Makefile
7,11 → 7,11
JARTARGET=NVMTest.jar
CLASSTARGETS=NVMTest.class
CLASSEXTRADEPS=
CLASSEXTRADEPS:=$(shell echo $(ZTEXPREFIX)/java/ztex/*.java)
CLASSEXTRADEPS:=$(wildcard $(ZTEXPREFIX)/java/ztex/*.java)
 
IHXTARGETS=nvmtest.ihx
IHXEXTRADEPS=
IHXEXTRADEPS:=$(shell echo $(ZTEXPREFIX)/include/*.h)
IHXEXTRADEPS:=$(wildcard $(ZTEXPREFIX)/include/*.h)
EXTRAJARFILES=nvmtest.ihx
 
################################
/usb_fpga_1_11/trunk/examples/usb-xmega-1.0/ucecho/avr/ucecho.ihx
1,43 → 1,42
:100000000C94FA000C941B010C941B010C941B0122
:100010000C941B010C941B010C941B010C941B01F0
:100020000C941B010C941B010C941B010C941B01E0
:100030000C941B010C941B010C941B010C941B01D0
:100040000C941B010C941B010C941B010C941B01C0
:100050000C941B010C941B010C941B010C941B01B0
:100060000C941B010C941B010C941B010C941B01A0
:100070000C941B010C941B010C941B010C941B0190
:100080000C941B010C941B010C941B010C941B0180
:100090000C941B010C941B010C941B010C941B0170
:1000A0000C941B010C941B010C941B010C941B0160
:1000B0000C941B010C941B010C941B010C941B0150
:1000C0000C941B010C941B010C941B010C941B0140
:1000D0000C941B010C941B010C941B010C941B0130
:1000E0000C941B010C941B010C941B010C941B0120
:1000F0000C941B010C941B010C941B010C941B0110
:100100000C941B010C941B010C941B010C941B01FF
:100110000C941B010C941B010C941B010C941B01EF
:100120000C941B010C941B010C941B010C941B01DF
:100130000C941B010C941B010C941B010C941B01CF
:100140000C941B010C941B010C941B010C941B01BF
:100150000C941B010C941B010C941B010C941B01AF
:100160000C941B010C941B010C941B010C941B019F
:100170000C941B010C941B010C941B010C941B018F
:100180000C941B010C941B010C941B010C941B017F
:100190000C941B010C941B010C941B010C941B016F
:1001A0000C941B010C941B010C941B010C941B015F
:1001B0000C941B010C941B010C941B010C941B014F
:1001C0000C941B010C941B010C941B010C941B013F
:1001D0000C941B010C941B010C941B010C941B012F
:1001E0000C941B010C941B010C941B010C941B011F
:1001F0000C941B0111241FBECFEFDFE3DEBFCDBF88
:1002000000E00CBF10E2A0E0B0E2E2E9F2E000E0C2
:100210000BBF02C007900D92A030B107D9F710E2D2
:10022000A0E0B0E201C01D92A030B107E1F70E944A
:100230001D010C9447010C94000088ED77E084BF09
:10024000709350008091510087708730D9F788ED06
:1002500071E084BF7093600084BF7093680084BFB6
:100260007093400088ED71E084BF70939600109207
:10027000E0068FEF80932007E0E2F7E09091E80638
:10028000892F81568A3108F490529483F7CFF894DD
:02029000FFCF9E
:100000000C94FA000C9418010C9418010C9418012B
:100010000C9418010C9418010C9418010C941801FC
:100020000C9418010C9418010C9418010C941801EC
:100030000C9418010C9418010C9418010C941801DC
:100040000C9418010C9418010C9418010C941801CC
:100050000C9418010C9418010C9418010C941801BC
:100060000C9418010C9418010C9418010C941801AC
:100070000C9418010C9418010C9418010C9418019C
:100080000C9418010C9418010C9418010C9418018C
:100090000C9418010C9418010C9418010C9418017C
:1000A0000C9418010C9418010C9418010C9418016C
:1000B0000C9418010C9418010C9418010C9418015C
:1000C0000C9418010C9418010C9418010C9418014C
:1000D0000C9418010C9418010C9418010C9418013C
:1000E0000C9418010C9418010C9418010C9418012C
:1000F0000C9418010C9418010C9418010C9418011C
:100100000C9418010C9418010C9418010C9418010B
:100110000C9418010C9418010C9418010C941801FB
:100120000C9418010C9418010C9418010C941801EB
:100130000C9418010C9418010C9418010C941801DB
:100140000C9418010C9418010C9418010C941801CB
:100150000C9418010C9418010C9418010C941801BB
:100160000C9418010C9418010C9418010C941801AB
:100170000C9418010C9418010C9418010C9418019B
:100180000C9418010C9418010C9418010C9418018B
:100190000C9418010C9418010C9418010C9418017B
:1001A0000C9418010C9418010C9418010C9418016B
:1001B0000C9418010C9418010C9418010C9418015B
:1001C0000C9418010C9418010C9418010C9418014B
:1001D0000C9418010C9418010C9418010C9418013B
:1001E0000C9418010C9418010C9418010C9418012B
:1001F0000C94180111241FBECFEFDFE3DEBFCDBF8B
:1002000000E00CBF18BE19BE1ABE1BBE10E2A0E073
:10021000B0E2ECE8F2E000E00BBF02C007900D9204
:10022000A030B107D9F71BBE0E941A010C944401FB
:100230000C94000088ED77E084BF709350008091AB
:10024000510087708730D9F788ED71E084BF7093D3
:10025000600084BF7093680084BF7093400088ED95
:1002600071E084BF709396001092E0068FEF809348
:100270002007E0E2F7E09091E806892F81568A3165
:0C02800008F490529483F7CFF894FFCF5D
:00000001FF
/usb_fpga_1_11/trunk/examples/usb-xmega-1.0/Makefile
1,6 → 1,6
DIRS=flashdemo flashbench nvmtest ucecho
 
.PHONY: default all clean distclean
.PHONY: default all clean distclean avr avrclean avrdistclean
 
default:
@echo "This makefile is intended to clean up the project or to build all examples in this subdirectory"
7,10 → 7,19
@echo "Usage: make all | clean | distclean"
 
all:
for i in $(DIRS); do make -C $$i all; done
set -e; for i in $(DIRS); do make -C $$i all; done
 
clean:
for i in $(DIRS); do make -C $$i clean; done
set -e; for i in $(DIRS); do make -C $$i clean; done
 
distclean: clean
for i in $(DIRS); do make -C $$i distclean; done
distclean:
set -e; for i in $(DIRS); do make -C $$i distclean; done
 
avr:
set -e; for i in $(DIRS); do make -C $$i avr; done
 
avrclean:
set -e; for i in $(DIRS); do make -C $$i avrclean; done
 
avrdistclean:
set -e; for i in $(DIRS); do make -C $$i avrdistclean; done
/usb_fpga_1_11/trunk/examples/usb-xmega-1.0/flashbench/Makefile
7,11 → 7,11
JARTARGET=FlashBench.jar
CLASSTARGETS=FlashBench.class
CLASSEXTRADEPS=
#CLASSEXTRADEPS:=$(shell echo $(ZTEXPREFIX)/java/ztex/*.java)
#CLASSEXTRADEPS:=$(wildcard $(ZTEXPREFIX)/java/ztex/*.java)
 
IHXTARGETS=flashbench.ihx
IHXEXTRADEPS=
#IHXEXTRADEPS:=$(shell echo $(ZTEXPREFIX)/include/*.h)
#IHXEXTRADEPS:=$(wildcard $(ZTEXPREFIX)/include/*.h)
EXTRAJARFILES=flashbench.ihx
 
################################
/usb_fpga_1_11/trunk/examples/usb-1.0/Makefile
1,6 → 1,6
DIRS=flashdemo flashbench
 
.PHONY: default all clean distclean
.PHONY: default all clean distclean avr avrclean avrdistclean
 
default:
@echo "This makefile is intended to clean up the project or to build all examples in this subdirectory"
7,10 → 7,20
@echo "Usage: make all | clean | distclean"
 
all:
for i in $(DIRS); do make -C $$i all; done
set -e; for i in $(DIRS); do make -C $$i all; done
 
clean:
for i in $(DIRS); do make -C $$i clean; done
set -e; for i in $(DIRS); do make -C $$i clean; done
 
distclean: clean
for i in $(DIRS); do make -C $$i distclean; done
distclean:
set -e; for i in $(DIRS); do make -C $$i distclean; done
 
avr:
set -e; for i in $(DIRS); do make -C $$i avr; done
 
avrclean:
set -e; for i in $(DIRS); do make -C $$i avrclean; done
 
avrdistclean:
set -e; for i in $(DIRS); do make -C $$i avrdistclean; done
 
/usb_fpga_1_11/trunk/examples/usb-1.0/flashbench/Makefile
7,11 → 7,11
JARTARGET=FlashBench.jar
CLASSTARGETS=FlashBench.class
CLASSEXTRADEPS=
#CLASSEXTRADEPS:=$(shell echo $(ZTEXPREFIX)/java/ztex/*.java)
#CLASSEXTRADEPS:=$(wildcard $(ZTEXPREFIX)/java/ztex/*.java)
 
IHXTARGETS=flashbench.ihx
IHXEXTRADEPS=
#IHXEXTRADEPS:=$(shell echo $(ZTEXPREFIX)/include/*.h)
#IHXEXTRADEPS:=$(wildcard $(ZTEXPREFIX)/include/*.h)
EXTRAJARFILES=flashbench.ihx
 
################################
/usb_fpga_1_11/trunk/examples/usb-fpga-1.15/nvmtest/Makefile
7,11 → 7,11
JARTARGET=NVMTest.jar
CLASSTARGETS=NVMTest.class
CLASSEXTRADEPS=
CLASSEXTRADEPS:=$(shell echo $(ZTEXPREFIX)/java/ztex/*.java)
CLASSEXTRADEPS:=$(wildcard $(ZTEXPREFIX)/java/ztex/*.java)
 
IHXTARGETS=nvmtest.ihx
IHXEXTRADEPS=
IHXEXTRADEPS:=$(shell echo $(ZTEXPREFIX)/include/*.h)
IHXEXTRADEPS:=$(wildcard $(ZTEXPREFIX)/include/*.h)
EXTRAJARFILES=nvmtest.ihx
 
################################
/usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/mmio/ucecho.sh
0,0 → 1,4
#make -C ../../../java distclean all || exit
#make distclean all || exit
#make || exit
java -cp UCEcho.jar UCEcho $@
usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/mmio/ucecho.sh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/mmio/UCEcho.java =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/mmio/UCEcho.java (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/mmio/UCEcho.java (revision 6) @@ -0,0 +1,169 @@ +/*! + mmio -- Memory mapped I/O example for ZTEX USB-FPGA Module 1.15b + Copyright (C) 2009-2011 ZTEX GmbH. + http://www.ztex.de + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License version 3 as + published by the Free Software Foundation. + + This program is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, see http://www.gnu.org/licenses/. +!*/ + +import java.io.*; +import java.util.*; + +import ch.ntb.usb.*; + +import ztex.*; + +// ***************************************************************************** +// ******* ParameterException ************************************************** +// ***************************************************************************** +// Exception the prints a help message +class ParameterException extends Exception { + public final static String helpMsg = new String ( + "Parameters:\n"+ + " -d Device Number (default: 0)\n" + + " -f Force uploads\n" + + " -p Print bus info\n" + + " -w Enable certain workarounds\n"+ + " -h This help" ); + + public ParameterException (String msg) { + super( msg + "\n" + helpMsg ); + } +} + +// ***************************************************************************** +// ******* Test0 *************************************************************** +// ***************************************************************************** +class UCEcho extends Ztex1v1 { + +// ******* UCEcho ************************************************************** +// constructor + public UCEcho ( ZtexDevice1 pDev ) throws UsbException { + super ( pDev ); + } + +// ******* echo **************************************************************** +// writes a string to Endpoint 4, reads it back from Endpoint 2 and writes the output to System.out + public void echo ( String input ) throws UsbException { + byte buf[] = input.getBytes(); + int i = LibusbJava.usb_bulk_write(handle(), 0x04, buf, buf.length, 1000); + if ( i<0 ) + throw new UsbException("Error sending data: " + LibusbJava.usb_strerror()); + System.out.println("Send "+i+" bytes: `"+input+"'" ); + + try { + Thread.sleep( 10 ); + } + catch ( InterruptedException e ) { + } + + buf = new byte[1024]; + i = LibusbJava.usb_bulk_read(handle(), 0x82, buf, 1024, 1000); + if ( i<0 ) + throw new UsbException("Error receiving data: " + LibusbJava.usb_strerror()); + System.out.println("Read "+i+" bytes: `"+new String(buf,0,i)+"'" ); + } + +// ******* main **************************************************************** + public static void main (String args[]) { + + int devNum = 0; + boolean force = false; + boolean workarounds = false; + + try { +// init USB stuff + LibusbJava.usb_init(); + +// scan the USB bus + ZtexScanBus1 bus = new ZtexScanBus1( ZtexDevice1.ztexVendorId, ZtexDevice1.ztexProductId, true, false, 1); + if ( bus.numberOfDevices() <= 0) { + System.err.println("No devices found"); + System.exit(0); + } + +// scan the command line arguments + for (int i=0; i=args.length) throw new Exception(); + devNum = Integer.parseInt( args[i] ); + } + catch (Exception e) { + throw new ParameterException("Device number expected after -d"); + } + } + else if ( args[i].equals("-f") ) { + force = true; + } + else if ( args[i].equals("-p") ) { + bus.printBus(System.out); + System.exit(0); + } + else if ( args[i].equals("-p") ) { + bus.printBus(System.out); + System.exit(0); + } + else if ( args[i].equals("-w") ) { + workarounds = true; + } + else if ( args[i].equals("-h") ) { + System.err.println(ParameterException.helpMsg); + System.exit(0); + } + else throw new ParameterException("Invalid Parameter: "+args[i]); + } + + +// create the main class + UCEcho ztex = new UCEcho ( bus.device(devNum) ); + ztex.certainWorkarounds = workarounds; + +// upload the firmware if necessary + if ( force || ! ztex.valid() || ! ztex.dev().productString().equals("ucecho example for UFM 1.15") ) { + System.out.println("Firmware upload time: " + ztex.uploadFirmware( "ucecho.ihx", force ) + " ms"); + force = true; + } + +// upload the bitstream if necessary + if ( force || ! ztex.getFpgaConfiguration() ) { + System.out.println("FPGA configuration time: " + ztex.configureFpga( "fpga/ucecho.bit" , force ) + " ms"); + } + + +// claim interface 0 + ztex.trySetConfiguration ( 1 ); + ztex.claimInterface ( 0 ); + +// read string from stdin and write it to USB device + String str = ""; + BufferedReader reader = new BufferedReader( new InputStreamReader( System.in ) ); + while ( ! str.equals("quit") ) { + System.out.print("Enter a string or `quit' to exit the program: "); + str = reader.readLine(); + if ( ! str.equals("") ) + ztex.echo(str); + System.out.println(""); + } + +// release interface 0 + ztex.releaseInterface( 0 ); + + } + catch (Exception e) { + System.out.println("Error: "+e.getLocalizedMessage() ); + } + } + +} Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/mmio/ucecho.c =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/mmio/ucecho.c (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/mmio/ucecho.c (revision 6) @@ -0,0 +1,103 @@ +/*! + mmio -- Memory mapped I/O example for ZTEX USB-FPGA Module 1.15b + Copyright (C) 2009-2011 ZTEX GmbH. + http://www.ztex.de + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License version 3 as + published by the Free Software Foundation. + + This program is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, see http://www.gnu.org/licenses/. +!*/ + +#include[ztex-conf.h] // Loads the configuration macros, see ztex-conf.h for the available macros +#include[ztex-utils.h] // include basic functions + +// configure endpoints 2 and 4, both belong to interface 0 (in/out are from the point of view of the host) +EP_CONFIG(2,0,BULK,IN,512,2); +EP_CONFIG(4,0,BULK,OUT,512,2); + +// select ZTEX USB FPGA Module 1.15 as target (required for FPGA configuration) +IDENTITY_UFM_1_15(10.13.0.0,0); + +// enables high speed FPGA configuration, (re)use EP 4 +ENABLE_HS_FPGA_CONF(4); + +// this product string is also used for identification by the host software +#define[PRODUCT_STRING]["memeory mapping example for UFM 1.15"] + +__xdata BYTE run; + +#define[PRE_FPGA_RESET][PRE_FPGA_RESET + run = 0; +] + +#define[POST_FPGA_CONFIG][POST_FPGA_CONFIG + IFCONFIG = bmBIT7; // internel 30MHz clock, drive IFCLK ouput, slave FIFO interface + SYNCDELAY; + EP2FIFOCFG = 0; + SYNCDELAY; + EP4FIFOCFG = 0; + SYNCDELAY; + + REVCTL = 0x0; // reset + SYNCDELAY; + EP2CS &= ~bmBIT0; // stall = 0 + SYNCDELAY; + EP4CS &= ~bmBIT0; // stall = 0 + + SYNCDELAY; // first two packages are waste + EP4BCL = 0x80; // skip package, (re)arm EP4 + SYNCDELAY; + EP4BCL = 0x80; // skip package, (re)arm EP4 + + FIFORESET = 0x80; // reset FIFO + SYNCDELAY; + FIFORESET = 0x82; + SYNCDELAY; + FIFORESET = 0x00; + SYNCDELAY; + + run = 1; +] + +// include the main part of the firmware kit, define the descriptors, ... +#include[ztex.h] + + +__xdata __at 0x5001 volatile BYTE OUT_REG; // FPGA register where the data is written to +__xdata __at 0x5002 volatile BYTE IN_REG; // FPGA register where the result is read from + + +void main(void) +{ + WORD i,size; + +// init everything + init_USB(); + + while (1) { + if ( run & !(EP4CS & bmBIT2) ) { // EP4 is not empty + size = (EP4BCH << 8) | EP4BCL; + if ( size>0 && size<=512 && !(EP2CS & bmBIT3)) { // EP2 is not full + for ( i=0; i> 8; + SYNCDELAY; + EP2BCL = size & 255; // arm EP2 + SYNCDELAY; + INPKTEND = 0x2; + } + SYNCDELAY; + EP4BCL = 0x80; // (re)arm EP4 + } + } +} Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/mmio/ucecho.bat =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/mmio/ucecho.bat (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/mmio/ucecho.bat (revision 6) @@ -0,0 +1,2 @@ +java -cp UCEcho.jar UCEcho +pause Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/mmio/fpga/ucecho.ucf =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/mmio/fpga/ucecho.ucf (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/mmio/fpga/ucecho.ucf (revision 6) @@ -0,0 +1,33 @@ +NET "FXCLK" TNM_NET = "FXCLK"; +TIMESPEC "TS_FXCLK" = PERIOD "FXCLK" 48 MHz HIGH 50 %; +NET "FXCLK" LOC = "L22" | IOSTANDARD = LVCMOS33 ; + +NET "MM_A<0>" LOC = "M20" | IOSTANDARD = LVCMOS33 ; +NET "MM_A<1>" LOC = "M19" | IOSTANDARD = LVCMOS33 ; +NET "MM_A<2>" LOC = "M18" | IOSTANDARD = LVCMOS33 ; +NET "MM_A<3>" LOC = "N19" | IOSTANDARD = LVCMOS33 ; +NET "MM_A<4>" LOC = "T19" | IOSTANDARD = LVCMOS33 ; +NET "MM_A<5>" LOC = "T21" | IOSTANDARD = LVCMOS33 ; +NET "MM_A<6>" LOC = "T22" | IOSTANDARD = LVCMOS33 ; +NET "MM_A<7>" LOC = "R19" | IOSTANDARD = LVCMOS33 ; +NET "MM_A<8>" LOC = "P20" | IOSTANDARD = LVCMOS33 ; +NET "MM_A<9>" LOC = "P21" | IOSTANDARD = LVCMOS33 ; +NET "MM_A<10>" LOC = "P22" | IOSTANDARD = LVCMOS33 ; +NET "MM_A<11>" LOC = "J22" | IOSTANDARD = LVCMOS33 ; +NET "MM_A<12>" LOC = "H21" | IOSTANDARD = LVCMOS33 ; +NET "MM_A<13>" LOC = "H22" | IOSTANDARD = LVCMOS33 ; +NET "MM_A<14>" LOC = "G22" | IOSTANDARD = LVCMOS33 ; +NET "MM_A<15>" LOC = "F21" | IOSTANDARD = LVCMOS33 ; + +NET "MM_D<0>" LOC = "D20" | IOSTANDARD = LVCMOS33 | DRIVE = 2; +NET "MM_D<1>" LOC = "C20" | IOSTANDARD = LVCMOS33 | DRIVE = 2; +NET "MM_D<2>" LOC = "C19" | IOSTANDARD = LVCMOS33 | DRIVE = 2; +NET "MM_D<3>" LOC = "B21" | IOSTANDARD = LVCMOS33 | DRIVE = 2; +NET "MM_D<4>" LOC = "B20" | IOSTANDARD = LVCMOS33 | DRIVE = 2; +NET "MM_D<5>" LOC = "J19" | IOSTANDARD = LVCMOS33 | DRIVE = 2; +NET "MM_D<6>" LOC = "K19" | IOSTANDARD = LVCMOS33 | DRIVE = 2; +NET "MM_D<7>" LOC = "L19" | IOSTANDARD = LVCMOS33 | DRIVE = 2; + +NET "MM_WRN" LOC = "C22" | IOSTANDARD = LVCMOS33 ; +NET "MM_RDN" LOC = "D21" | IOSTANDARD = LVCMOS33 ; +NET "MM_PSENN" LOC = "D22" | IOSTANDARD = LVCMOS33 ; Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/mmio/fpga/ucecho.ise =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/mmio/fpga/ucecho.ise =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/mmio/fpga/ucecho.ise (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/mmio/fpga/ucecho.ise (revision 6)
usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/mmio/fpga/ucecho.ise Property changes : Added: svn:mime-type ## -0,0 +1 ## +application/octet-stream \ No newline at end of property Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/mmio/fpga/ucecho.vhd =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/mmio/fpga/ucecho.vhd (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/mmio/fpga/ucecho.vhd (revision 6) @@ -0,0 +1,63 @@ +library ieee; +use IEEE.std_logic_1164.all; +use IEEE.std_logic_arith.all; +use IEEE.std_logic_unsigned.all; +--#use IEEE.numeric_std.all; + + +entity ucecho is + port( + FXCLK : in std_logic; + MM_A : in std_logic_vector(15 downto 0); + MM_D : inout std_logic_vector(7 downto 0); + MM_WRN : in std_logic; + MM_RDN : in std_logic; + MM_PSENN : in std_logic + ); +end ucecho; + +architecture RTL of ucecho is + +--signal declaration +signal rd : std_logic := '1'; +signal rd_prev : std_logic := '1'; +signal wr : std_logic := '1'; +signal wr_prev : std_logic := '1'; + +signal datain : std_logic_vector(7 downto 0); +signal dataout : std_logic_vector(7 downto 0); + +begin + rd <= MM_RDN and MM_PSENN; + wr <= MM_WRN; + + MM_D <= dataout when ((rd_prev or rd) = '0') else ( others => 'Z' ); -- enable output + + dpUCECHO: process(FXCLK) + begin + if FXCLK' event and FXCLK = '1' then + if (wr_prev = '1') and (wr = '0') -- EZ-USB write strobe + then + if MM_A = conv_std_logic_vector(16#5001#,16) -- read data from EZ-USB if addr=0x5001 + then + datain <= MM_D; + end if; + elsif (rd_prev = '1') and (rd = '0') -- EZ-USB read strobe + then + if MM_A = conv_std_logic_vector(16#5002#,16) -- write data to EZ-USB if addr=0x5002 + then + if ( datain >= conv_std_logic_vector(97,8) ) and ( datain <= conv_std_logic_vector(122,8) ) -- do the upercase conversion + then + dataout <= datain - conv_std_logic_vector(32,8); + else + dataout <= datain ; + end if; + end if; + end if; + + rd_prev <= rd; + wr_prev <= wr; + end if; + end process dpUCECHO; + +end RTL; Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/mmio/fpga/clean.sh =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/mmio/fpga/clean.sh (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/mmio/fpga/clean.sh (revision 6) @@ -0,0 +1,80 @@ +#!/bin/bash + +# This files / directories from this directory will not be removed +# Filenames with spaces or other spuid characters will be ignored +sourcefiles="*.vhd *.ucf *.sh *.ise *.bit *.bin *.xise" +subdirs="ipcore_dir" + + +# This sould not be edited. +list_files() { + if [ "$2" != "" ]; then + echo "$1" + for i in $2; do + echo " $i" + done + fi +} + +rmfiles="" +rmdirs="" +keepfiles="" +keepdirs="" +allfiles=`ls -A` +for f in $allfiles; do + keep=false + for i in $sourcefiles; do + if [ "$i" == "$f" ]; then + keep=true + fi + done + for i in $subdirs; do + if [ "$i" == "$f" ]; then + keep=true + fi + done + if [ -d "$f" ]; then + if $keep; then + keepdirs+=" $f" + else + rmdirs+=" $f" + fi + fi + if [ -f "$f" ]; then + if $keep; then + keepfiles+=" $f" + else + rmfiles+=" $f" + fi + fi +done + +echo +echo "Directory $PWD:" +list_files "This directories will NOT be removed:" "$keepdirs" +list_files "This files will NOT be removed:" "$keepfiles" +list_files "This directories will be removed:" "$rmdirs" +list_files "This files will be removed:" "$rmfiles" + +if [ "$rmfiles" == "" -a "$rmdirs" == "" ]; then + c="yes" +else + echo -n 'Confirm this by entering "yes": ' + read c +fi + +if [ "$c" == "yes" ]; then + [ "$rmfiles" != "" ] && rm $rmfiles + [ "$rmdirs" != "" ] && rm -r $rmdirs + + for d in $subdirs; do + if [ -x "$d/clean.sh" ]; then + cd $d + ./clean.sh || exit 1 + cd .. + fi + done + + exit 0 +fi +exit 1
usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/mmio/fpga/clean.sh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/mmio/fpga/ucecho.xise =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/mmio/fpga/ucecho.xise (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/mmio/fpga/ucecho.xise (revision 6) @@ -0,0 +1,56 @@ + + + +
+ + + + + + + + +
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/mmio/Readme =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/mmio/Readme (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/mmio/Readme (revision 6) @@ -0,0 +1,24 @@ +mmio +---- + +This example is intended for ZTEX USB-FPGA Modules 1.15. It demonstrates +memory mapped I/O between the EZ-USB FX2 and the FPGA. + +The firmware (defined in ucecho.c) declares Endpoint 2 and Endpoint 4 +(both 512 bytes, double buffered, bulk transfer, belong to interface 0). +All data that is written to Endpoint 4 is converted to uppercase by +the FPGA and can be read back from Endpoint 2. + +This example does the same as the example in directory ../../all/ucecho +except that the uppercase - lowercase conversion is made by the FPGA +through memory mapped I/O: The EZ-USB FX2 writes the data to address +0x5001 and reads the converted data back from 0x5002. + +The driver (defined in UCEcho.java) uploads the the Firmware (ucecho.ihx) +to the EZ-USB Microcontroller and the Bitstream (fpga/ucecho.bit) to the +FPGA if necessary, sends user string to the device and reads them back. + +Uploading the Firmware to EEPROM is also supported by the firmware (e.g. +using the FWLoader utility). + +This example may serve a good starting point for own projects. Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/mmio/Makefile =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/mmio/Makefile (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/mmio/Makefile (revision 6) @@ -0,0 +1,27 @@ +######################### +# configuration section # +######################### + +# Defines the location of the EZ-USB SDK +ZTEXPREFIX=../../../.. + +# The name of the jar archive +JARTARGET=UCEcho.jar +# Java Classes that have to be build +CLASSTARGETS=UCEcho.class +# Extra dependencies for Java Classes +CLASSEXTRADEPS= + +# ihx files (firmware ROM files) that have to be build +IHXTARGETS=ucecho.ihx +# Extra Dependencies for ihx files +IHXEXTRADEPS= + +# Extra files that should be included into th jar archive +EXTRAJARFILES=ucecho.ihx fpga/ucecho.bit + +################################ +# DO NOT CHANAGE THE FOLLOWING # +################################ +# includes the main Makefile +include $(ZTEXPREFIX)/Makefile.mk Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/intraffic/InTraffic.java =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/intraffic/InTraffic.java (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/intraffic/InTraffic.java (revision 6) @@ -0,0 +1,317 @@ +/*! + intraffic -- example showing how the EZ-USB FIFO interface is used on ZTEX USB-FPGA Module 1.15b + Copyright (C) 2009-2011 ZTEX GmbH. + http://www.ztex.de + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License version 3 as + published by the Free Software Foundation. + + This program is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, see http://www.gnu.org/licenses/. +!*/ + +import java.io.*; +import java.util.*; + +import ch.ntb.usb.*; + +import ztex.*; + +// ***************************************************************************** +// ******* ParameterException ************************************************** +// ***************************************************************************** +// Exception the prints a help message +class ParameterException extends Exception { + public final static String helpMsg = new String ( + "Parameters:\n"+ + " -d Device Number (default: 0)\n" + + " -f Force uploads\n" + + " -p Print bus info\n" + + " -w Enable certain workarounds\n"+ + " -h This help" ); + + public ParameterException (String msg) { + super( msg + "\n" + helpMsg ); + } +} + +// ***************************************************************************** +// ******* USBReader *********************************************************** +// ***************************************************************************** +class UsbReader extends Thread { + private final int bufNum = 8; + public final int bufSize = 512*1024; + public byte[][] buf = new byte[bufNum][]; + public int[] bufBytes = new int[bufNum]; + private int readCount = -1; + private int getCount = -1; + public boolean terminate = false; + private Ztex1v1 ztex; + + public UsbReader ( Ztex1v1 p_ztex ) { + super (); + ztex = p_ztex; + for (int i=0; i= readCount) { + try { + sleep(1); + } + catch ( InterruptedException e) { + } + } + return getCount % bufNum; + } + + public void reset () { + getCount = readCount + 1; + } + + public void run() { + setPriority(MAX_PRIORITY); + +// claim interface 0 + try { + ztex.trySetConfiguration ( 1 ); + ztex.claimInterface ( 0 ); + } + catch ( Exception e) { + System.out.println("Error: "+e.getLocalizedMessage() ); + System.exit(2); + } + + +// reader loop + while ( !terminate ) { + readCount += 1; + + while ( readCount - bufNum >= getCount ) { + try { + sleep(1); + } + catch ( InterruptedException e) { + } + } + + int i = readCount % bufNum; + bufBytes[i] = LibusbJava.usb_bulk_read(ztex.handle(), 0x82, buf[i], bufSize, 1000); +// System.out.println("Buffer " + i +": read " + bufBytes[i] + " bytes"); + } + +// release interface 0 + ztex.releaseInterface( 0 ); + + } +} + + +// ***************************************************************************** +// ******* Test0 *************************************************************** +// ***************************************************************************** +class InTraffic extends Ztex1v1 { + +// ******* InTraffic ************************************************************** +// constructor + public InTraffic ( ZtexDevice1 pDev ) throws UsbException { + super ( pDev ); + } + +// ******* main **************************************************************** + public static void main (String args[]) { + + int devNum = 0; + boolean force = false; + boolean workarounds = false; + + try { +// init USB stuff + LibusbJava.usb_init(); + +// scan the USB bus + ZtexScanBus1 bus = new ZtexScanBus1( ZtexDevice1.ztexVendorId, ZtexDevice1.ztexProductId, true, false, 1); + if ( bus.numberOfDevices() <= 0) { + System.err.println("No devices found"); + System.exit(0); + } + +// scan the command line arguments + for (int i=0; i=args.length) throw new Exception(); + devNum = Integer.parseInt( args[i] ); + } + catch (Exception e) { + throw new ParameterException("Device number expected after -d"); + } + } + else if ( args[i].equals("-f") ) { + force = true; + } + else if ( args[i].equals("-p") ) { + bus.printBus(System.out); + System.exit(0); + } + else if ( args[i].equals("-p") ) { + bus.printBus(System.out); + System.exit(0); + } + else if ( args[i].equals("-w") ) { + workarounds = true; + } + else if ( args[i].equals("-h") ) { + System.err.println(ParameterException.helpMsg); + System.exit(0); + } + else throw new ParameterException("Invalid Parameter: "+args[i]); + } + + +// create the main class + InTraffic ztex = new InTraffic ( bus.device(devNum) ); + ztex.certainWorkarounds = workarounds; + +// upload the firmware if necessary + if ( force || ! ztex.valid() || ! ztex.dev().productString().equals("intraffic example for UFM 1.15") ) { + System.out.println("Firmware upload time: " + ztex.uploadFirmware( "intraffic.ihx", force ) + " ms"); + force = true; + } + +// upload the bitstream if necessary + if ( force || ! ztex.getFpgaConfiguration() ) { + System.out.println("FPGA configuration time: " + ztex.configureFpga( "fpga/intraffic.bit" , force ) + " ms"); + } + +// read the traffic + UsbReader reader = new UsbReader( ztex ); + reader.start(); + +// EZ-USB FIFO test (controlled mode) + ztex.vendorCommand (0x60, "Set test mode", 0, 0); + reader.reset(); + + int vcurrent = -1; + for (int i=0; i<1000; i++) { + int j = reader.getBuffer(); + int bb = reader.bufBytes[j]; + byte[] b = reader.buf[j]; + int current = vcurrent+1; + int lastwi = -1; + int aerrors = 0; + int ferrors = 0; + int errors = 0; + int prevErrors = 0; + + for (int k=1; k 0 ) System.out.println(" 0b" + Integer.toBinaryString(current) ); + if ( prevErrors == 1 ) + ferrors +=1; + prevErrors = 0; + } + + lastwi = 1; +// System.out.println(current); + } +// System.out.println(b[k]+" " +b[k+1]); + } + System.out.print("Buffer " + i + ": " + (errors-ferrors) + " errors, " + ferrors + " FIFO errors, " + aerrors + " alignment errors \r"); + } + System.out.println(); + +// performance test (continous mode) + ztex.vendorCommand (0x60, "Set test mode", 1, 0); + reader.reset(); + + int words = 0; + int intSum = 0; + int intMax = 0; + int intAdj = 0; + int lastwi = -1; + for (int i=0; i<1000; i++) { + int j = reader.getBuffer(); + int bb = reader.bufBytes[j]; + byte[] b = reader.buf[j]; + int current = vcurrent+1; + + for (int k=1; k 0 && words > 0) { + intSum += it; + if ( it > intMax ) + intMax = it; + } + words += 2; + vcurrent = current; + intAdj = 0; + } + lastwi = 1; +// System.out.println(current); + } +// System.out.println(b[k]+" " +b[k+1]); + } + System.out.print("Buffer " + i + ": " + Math.round(words*6000.0/(words+intSum))/100.0 + "MB/s, max. interrupt: " + Math.round(intMax/150.0)/100 + "ms \r"); + } + System.out.println(); + + + reader.terminate=true; + + } + catch (Exception e) { + System.out.println("Error: "+e.getLocalizedMessage() ); + } + } + +} Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/intraffic/intraffic.c =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/intraffic/intraffic.c (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/intraffic/intraffic.c (revision 6) @@ -0,0 +1,99 @@ +/*! + intraffic -- example showing how the EZ-USB FIFO interface is used on ZTEX USB-FPGA Module 1.15b + Copyright (C) 2009-2011 ZTEX GmbH. + http://www.ztex.de + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License version 3 as + published by the Free Software Foundation. + + This program is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, see http://www.gnu.org/licenses/. +!*/ + +#include[ztex-conf.h] // Loads the configuration macros, see ztex-conf.h for the available macros +#include[ztex-utils.h] // include basic functions + +// configure endpoint 2, in, quad buffered, 512 bytes, interface 0 +EP_CONFIG(2,0,BULK,IN,512,4); + +// configure endpoint 6, out, doublebuffered, 512 bytes, interface 0 +EP_CONFIG(6,0,BULK,OUT,512,2); + +// select ZTEX USB FPGA Module 1.15 as target (required for FPGA configuration) +IDENTITY_UFM_1_15(10.13.0.0,0); + +// this product string is also used for identification by the host software +#define[PRODUCT_STRING]["intraffic example for UFM 1.15"] + +// enables high speed FPGA configuration via EP6 +ENABLE_HS_FPGA_CONF(6); + +// this is called automatically after FPGA configuration +#define[POST_FPGA_CONFIG][POST_FPGA_CONFIG + IOA7 = 1; // reset on + OEA |= bmBIT7; + IOC0 = 0; // controlled mode + OEC = 1; + + EP2CS &= ~bmBIT0; // clear stall bit + + REVCTL = 0x3; + SYNCDELAY; + + IFCONFIG = bmBIT7 | bmBIT5 | 3; // internel 30MHz clock, drive IFCLK ouput, slave FIFO interface + SYNCDELAY; + EP2FIFOCFG = bmBIT3 | bmBIT0; // AOTUOIN, WORDWIDE + SYNCDELAY; + +#ifdef[fastmode] + EP2AUTOINLENH = 4; // 1024 bytes +#else + EP2AUTOINLENH = 2; // 512 bytes +#endif + SYNCDELAY; + EP2AUTOINLENL = 0; + SYNCDELAY; + + FIFORESET = 0x80; // reset FIFO + SYNCDELAY; + FIFORESET = 2; + SYNCDELAY; + FIFORESET = 0x00; + SYNCDELAY; + + FIFOPINPOLAR = 0; + SYNCDELAY; + PINFLAGSAB = 0; + SYNCDELAY; + PINFLAGSCD = 0; + SYNCDELAY; + + IOA7 = 0; // reset off +] + +// set mode +ADD_EP0_VENDOR_COMMAND((0x60,, + IOA7 = 1; // reset on + IOC0 = SETUPDAT[2] ? 1 : 0; + IOA7 = 0; // reset off +,, + NOP; +));; + +// include the main part of the firmware kit, define the descriptors, ... +#include[ztex.h] + +void main(void) +{ + init_USB(); + + while (1) { + } +} + Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/intraffic/fpga/intraffic.ucf =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/intraffic/fpga/intraffic.ucf (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/intraffic/fpga/intraffic.ucf (revision 6) @@ -0,0 +1,41 @@ +# NET "CLK" TNM_NET = "FXCLK"; +# TIMESPEC "TS_CLK" = PERIOD "FXCLK" 20.83333 ns HIGH 50 %; +# NET "CLK" LOC = "L22" | IOSTANDARD = LVCMOS33 ; + +NET "IFCLK" TNM_NET = "IFCLK"; +TIMESPEC "TS_IFCLK" = PERIOD "IFCLK" 20 ns HIGH 50 %; +NET "IFCLK" LOC = "K20" | IOSTANDARD = LVCMOS33 ; + +# TIMESPEC "TS_CLK_IFCLK" = FROM "CLK" TO "IFCLK" 3ns DATAPATHONLY; +# TIMESPEC "TS_IFCLK_CLK" = FROM "IFCLK" TO "CLK" 3ns DATAPATHONLY; + +NET "SLOE" LOC = "U15" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # PA2 +NET "FIFOADR0" LOC = "W17" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # PA4 +NET "FIFOADR1" LOC = "Y18" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # PA5 +NET "PKTEND" LOC = "AB5" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # PA6 +NET "RESET" LOC = "AB17" | IOSTANDARD = LVCMOS33 ; # PA7 + +NET "CONT" LOC = "G20" | IOSTANDARD = LVCMOS33 ; # PA3 + +NET "fd<0>" LOC = "Y17" | IOSTANDARD = LVCMOS33 ; +NET "fd<1>" LOC = "V13" | IOSTANDARD = LVCMOS33 ; +NET "fd<2>" LOC = "W13" | IOSTANDARD = LVCMOS33 ; +NET "fd<3>" LOC = "AA8" | IOSTANDARD = LVCMOS33 ; +NET "fd<4>" LOC = "AB8" | IOSTANDARD = LVCMOS33 ; +NET "fd<5>" LOC = "W6" | IOSTANDARD = LVCMOS33 ; +NET "fd<6>" LOC = "Y6" | IOSTANDARD = LVCMOS33 ; +NET "fd<7>" LOC = "Y9" | IOSTANDARD = LVCMOS33 ; +NET "fd<8>" LOC = "V21" | IOSTANDARD = LVCMOS33 ; +NET "fd<9>" LOC = "V22" | IOSTANDARD = LVCMOS33 ; +NET "fd<10>" LOC = "U20" | IOSTANDARD = LVCMOS33 ; +NET "fd<11>" LOC = "U22" | IOSTANDARD = LVCMOS33 ; +NET "fd<12>" LOC = "R20" | IOSTANDARD = LVCMOS33 ; +NET "fd<13>" LOC = "R22" | IOSTANDARD = LVCMOS33 ; +NET "fd<14>" LOC = "P18" | IOSTANDARD = LVCMOS33 ; +NET "fd<15>" LOC = "P19" | IOSTANDARD = LVCMOS33 ; + +NET "FLAGB" LOC = "F19" | IOSTANDARD = LVCMOS33 ; + +NET "SLRD" LOC = "N22" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "SLWR" LOC = "M22" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; + Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/intraffic/fpga/intraffic.ise =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/intraffic/fpga/intraffic.ise =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/intraffic/fpga/intraffic.ise (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/intraffic/fpga/intraffic.ise (revision 6)
usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/intraffic/fpga/intraffic.ise Property changes : Added: svn:mime-type ## -0,0 +1 ## +application/octet-stream \ No newline at end of property Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/intraffic/fpga/intraffic.vhd =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/intraffic/fpga/intraffic.vhd (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/intraffic/fpga/intraffic.vhd (revision 6) @@ -0,0 +1,91 @@ +library ieee; +use IEEE.std_logic_1164.all; +use IEEE.std_logic_arith.all; +use IEEE.std_logic_unsigned.all; + + +entity intraffic is + port( + RESET : in std_logic; + CONT : in std_logic; + IFCLK : in std_logic; + + FD : out std_logic_vector(15 downto 0); + + SLOE : out std_logic; + SLRD : out std_logic; + SLWR : out std_logic; + FIFOADR0 : out std_logic; + FIFOADR1 : out std_logic; + PKTEND : out std_logic; + + FLAGB : in std_logic + ); +end intraffic; + +architecture RTL of intraffic is + +---------------------------- +-- test pattern generator -- +---------------------------- +-- 30 bit counter +signal GEN_CNT : std_logic_vector(29 downto 0); +signal INT_CNT : std_logic_vector(6 downto 0); + +signal FIFO_WORD : std_logic; + +begin + + SLOE <= '1'; + SLRD <= '1'; + FIFOADR0 <= '0'; + FIFOADR1 <= '0'; + PKTEND <= '1'; -- no data alignment + + dpIFCLK: process (IFCLK, RESET) + begin +-- reset + if RESET = '1' + then + GEN_CNT <= ( others => '0' ); + INT_CNT <= ( others => '0' ); + FIFO_WORD <= '0'; + SLWR <= '1'; +-- IFCLK + elsif IFCLK'event and IFCLK = '1' + then + + if CONT = '1' or FLAGB = '1' + then + if FIFO_WORD = '0' + then + FD(14 downto 0) <= GEN_CNT(14 downto 0); + else + FD(14 downto 0) <= GEN_CNT(29 downto 15); + end if; + FD(15) <= FIFO_WORD; + + if FIFO_WORD = '1' + then + GEN_CNT <= GEN_CNT + '1'; + if INT_CNT = conv_std_logic_vector(99,7) + then + INT_CNT <= ( others => '0' ); + else + INT_CNT <= INT_CNT + '1'; + end if; + end if; + FIFO_WORD <= not FIFO_WORD; + end if; + + if ( INT_CNT >= conv_std_logic_vector(90,7) ) and ( CONT = '0' ) + then + SLWR <= '1'; + else + SLWR <= '0'; + end if; + + end if; + end process dpIFCLK; + +end RTL; Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/intraffic/fpga/clean.sh =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/intraffic/fpga/clean.sh (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/intraffic/fpga/clean.sh (revision 6) @@ -0,0 +1,79 @@ +#!/bin/bash + +# This files / directories from this directory will not be removed +# Filenames with spaces or other spuid characters will be ignored +sourcefiles="*.vhd *.ucf *.sh *.ise *.bit *.bin *.xise" +subdirs="ipcore_dir" + +# This sould not be edited. +list_files() { + if [ "$2" != "" ]; then + echo "$1" + for i in $2; do + echo " $i" + done + fi +} + +rmfiles="" +rmdirs="" +keepfiles="" +keepdirs="" +allfiles=`ls -A` +for f in $allfiles; do + keep=false + for i in $sourcefiles; do + if [ "$i" == "$f" ]; then + keep=true + fi + done + for i in $subdirs; do + if [ "$i" == "$f" ]; then + keep=true + fi + done + if [ -d "$f" ]; then + if $keep; then + keepdirs+=" $f" + else + rmdirs+=" $f" + fi + fi + if [ -f "$f" ]; then + if $keep; then + keepfiles+=" $f" + else + rmfiles+=" $f" + fi + fi +done + +echo +echo "Directory $PWD:" +list_files "This directories will NOT be removed:" "$keepdirs" +list_files "This files will NOT be removed:" "$keepfiles" +list_files "This directories will be removed:" "$rmdirs" +list_files "This files will be removed:" "$rmfiles" + +if [ "$rmfiles" == "" -a "$rmdirs" == "" ]; then + c="yes" +else + echo -n 'Confirm this by entering "yes": ' + read c +fi + +if [ "$c" == "yes" ]; then + [ "$rmfiles" != "" ] && rm $rmfiles + [ "$rmdirs" != "" ] && rm -r $rmdirs + + for d in $subdirs; do + if [ -x "$d/clean.sh" ]; then + cd $d + ./clean.sh || exit 1 + cd .. + fi + done + + exit 0 +fi +exit 1
usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/intraffic/fpga/clean.sh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/intraffic/fpga/intraffic.xise =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/intraffic/fpga/intraffic.xise (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/intraffic/fpga/intraffic.xise (revision 6) @@ -0,0 +1,442 @@ + + + +
+ + + + + + + + +
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/intraffic/Readme =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/intraffic/Readme (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/intraffic/Readme (revision 6) @@ -0,0 +1,18 @@ +intraffic +--------- + +This example shows how the EZ-USB input FIFO interface is used. + +A traffic generator sends test data to the EZ-USB. The hosts PC reads +out this data and verifies it. + +The traffic generator is implemented in the FPGA and supports two modes: + +1. (IOA3=0) This mode supports data flow control using FIFO full flag + (FLAGB) and SLWR control pin. Use this mode as starting point for + data acquisition applications. + +2. (IOA=3) In this mode and uninterrupted test pattern is generated, + i.e. flow control is disabled. This mode is used for performance + measurements (speed rate and interrupt measurements) + Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/intraffic/Makefile =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/intraffic/Makefile (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/intraffic/Makefile (revision 6) @@ -0,0 +1,27 @@ +######################### +# configuration section # +######################### + +# Defines the location of the EZ-USB SDK +ZTEXPREFIX=../../../.. + +# The name of the jar archive +JARTARGET=InTraffic.jar +# Java Classes that have to be build +CLASSTARGETS=InTraffic.class +# Extra dependencies for Java Classes +CLASSEXTRADEPS= + +# ihx files (firmware ROM files) that have to be build +IHXTARGETS=intraffic.ihx +# Extra Dependencies for ihx files +IHXEXTRADEPS= + +# Extra files that should be included into th jar archive +EXTRAJARFILES=intraffic.ihx fpga/intraffic.bit + +################################ +# DO NOT CHANAGE THE FOLLOWING # +################################ +# includes the main Makefile +include $(ZTEXPREFIX)/Makefile.mk Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/intraffic/intraffic.sh =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/intraffic/intraffic.sh (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/intraffic/intraffic.sh (revision 6) @@ -0,0 +1,4 @@ +#make -C ../../../java distclean all || exit +#make distclean all || exit +#make || exit +java -cp InTraffic.jar InTraffic $@
usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/intraffic/intraffic.sh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/ucecho/ucecho.sh =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/ucecho/ucecho.sh (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/ucecho/ucecho.sh (revision 6) @@ -0,0 +1,4 @@ +#make -C ../../../java distclean all || exit +#make distclean all || exit +#make || exit +java -cp UCEcho.jar UCEcho $@
usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/ucecho/ucecho.sh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/ucecho/UCEcho.java =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/ucecho/UCEcho.java (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/ucecho/UCEcho.java (revision 6) @@ -0,0 +1,169 @@ +/*! + ucecho -- uppercase conversion example for ZTEX USB-FPGA Module 1.15b + Copyright (C) 2009-2011 ZTEX GmbH. + http://www.ztex.de + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License version 3 as + published by the Free Software Foundation. + + This program is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, see http://www.gnu.org/licenses/. +!*/ + +import java.io.*; +import java.util.*; + +import ch.ntb.usb.*; + +import ztex.*; + +// ***************************************************************************** +// ******* ParameterException ************************************************** +// ***************************************************************************** +// Exception the prints a help message +class ParameterException extends Exception { + public final static String helpMsg = new String ( + "Parameters:\n"+ + " -d Device Number (default: 0)\n" + + " -f Force uploads\n" + + " -p Print bus info\n" + + " -w Enable certain workarounds\n"+ + " -h This help" ); + + public ParameterException (String msg) { + super( msg + "\n" + helpMsg ); + } +} + +// ***************************************************************************** +// ******* Test0 *************************************************************** +// ***************************************************************************** +class UCEcho extends Ztex1v1 { + +// ******* UCEcho ************************************************************** +// constructor + public UCEcho ( ZtexDevice1 pDev ) throws UsbException { + super ( pDev ); + } + +// ******* echo **************************************************************** +// writes a string to Endpoint 4, reads it back from Endpoint 2 and writes the output to System.out + public void echo ( String input ) throws UsbException { + byte buf[] = input.getBytes(); + int i = LibusbJava.usb_bulk_write(handle(), 0x04, buf, buf.length, 1000); + if ( i<0 ) + throw new UsbException("Error sending data: " + LibusbJava.usb_strerror()); + System.out.println("Send "+i+" bytes: `"+input+"'" ); + + try { + Thread.sleep( 10 ); + } + catch ( InterruptedException e ) { + } + + buf = new byte[1024]; + i = LibusbJava.usb_bulk_read(handle(), 0x82, buf, 1024, 1000); + if ( i<0 ) + throw new UsbException("Error receiving data: " + LibusbJava.usb_strerror()); + System.out.println("Read "+i+" bytes: `"+new String(buf,0,i)+"'" ); + } + +// ******* main **************************************************************** + public static void main (String args[]) { + + int devNum = 0; + boolean force = false; + boolean workarounds = false; + + try { +// init USB stuff + LibusbJava.usb_init(); + +// scan the USB bus + ZtexScanBus1 bus = new ZtexScanBus1( ZtexDevice1.ztexVendorId, ZtexDevice1.ztexProductId, true, false, 1); + if ( bus.numberOfDevices() <= 0) { + System.err.println("No devices found"); + System.exit(0); + } + +// scan the command line arguments + for (int i=0; i=args.length) throw new Exception(); + devNum = Integer.parseInt( args[i] ); + } + catch (Exception e) { + throw new ParameterException("Device number expected after -d"); + } + } + else if ( args[i].equals("-f") ) { + force = true; + } + else if ( args[i].equals("-p") ) { + bus.printBus(System.out); + System.exit(0); + } + else if ( args[i].equals("-p") ) { + bus.printBus(System.out); + System.exit(0); + } + else if ( args[i].equals("-w") ) { + workarounds = true; + } + else if ( args[i].equals("-h") ) { + System.err.println(ParameterException.helpMsg); + System.exit(0); + } + else throw new ParameterException("Invalid Parameter: "+args[i]); + } + + +// create the main class + UCEcho ztex = new UCEcho ( bus.device(devNum) ); + ztex.certainWorkarounds = workarounds; + +// upload the firmware if necessary + if ( force || ! ztex.valid() || ! ztex.dev().productString().equals("ucecho example for UFM 1.15") ) { + System.out.println("Firmware upload time: " + ztex.uploadFirmware( "ucecho.ihx", force ) + " ms"); + force = true; + } + +// upload the bitstream if necessary + if ( force || ! ztex.getFpgaConfiguration() ) { + System.out.println("FPGA configuration time: " + ztex.configureFpga( "fpga/ucecho.bit" , force ) + " ms"); + } + + +// claim interface 0 + ztex.trySetConfiguration ( 1 ); + ztex.claimInterface ( 0 ); + +// read string from stdin and write it to USB device + String str = ""; + BufferedReader reader = new BufferedReader( new InputStreamReader( System.in ) ); + while ( ! str.equals("quit") ) { + System.out.print("Enter a string or `quit' to exit the program: "); + str = reader.readLine(); + if ( ! str.equals("") ) + ztex.echo(str); + System.out.println(""); + } + +// release interface 0 + ztex.releaseInterface( 0 ); + + } + catch (Exception e) { + System.out.println("Error: "+e.getLocalizedMessage() ); + } + } + +} Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/ucecho/ucecho.c =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/ucecho/ucecho.c (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/ucecho/ucecho.c (revision 6) @@ -0,0 +1,97 @@ +/*! + ucecho -- uppercase conversion example for ZTEX USB-FPGA Module 1.15b + Copyright (C) 2009-2011 ZTEX GmbH. + http://www.ztex.de + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License version 3 as + published by the Free Software Foundation. + + This program is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, see http://www.gnu.org/licenses/. +!*/ + +#include[ztex-conf.h] // Loads the configuration macros, see ztex-conf.h for the available macros +#include[ztex-utils.h] // include basic functions + +// configure endpoints 2 and 4, both belong to interface 0 (in/out are from the point of view of the host) +EP_CONFIG(2,0,BULK,IN,512,2); +EP_CONFIG(4,0,BULK,OUT,512,2); + +// select ZTEX USB FPGA Module 1.15 as target (required for FPGA configuration) +IDENTITY_UFM_1_15(10.13.0.0,0); + +// this product string is also used for identification by the host software +#define[PRODUCT_STRING]["ucecho example for UFM 1.15"] + +// enables high speed FPGA configuration via EP4 +ENABLE_HS_FPGA_CONF(4); + +__xdata BYTE run; + +#define[PRE_FPGA_RESET][PRE_FPGA_RESET + run = 0; +] +// this is called automatically after FPGA configuration +#define[POST_FPGA_CONFIG][POST_FPGA_CONFIG + IFCONFIG = bmBIT7; // internel 30MHz clock, drive IFCLK ouput, slave FIFO interface + SYNCDELAY; + EP2FIFOCFG = 0; + SYNCDELAY; + EP4FIFOCFG = 0; + SYNCDELAY; + + REVCTL = 0x0; // reset + SYNCDELAY; + EP2CS &= ~bmBIT0; // stall = 0 + SYNCDELAY; + EP4CS &= ~bmBIT0; // stall = 0 + + SYNCDELAY; // first two packages are waste + EP4BCL = 0x80; // skip package, (re)arm EP4 + SYNCDELAY; + EP4BCL = 0x80; // skip package, (re)arm EP4 + + FIFORESET = 0x80; // reset FIFO + SYNCDELAY; + FIFORESET = 0x82; + SYNCDELAY; + FIFORESET = 0x00; + SYNCDELAY; + + OEC = 255; + run = 1; +] + +// include the main part of the firmware kit, define the descriptors, ... +#include[ztex.h] + +void main(void) +{ + WORD i,size; + +// init everything + init_USB(); + + while (1) { + if ( run && !(EP4CS & bmBIT2) ) { // EP4 is not empty + size = (EP4BCH << 8) | EP4BCL; + if ( size>0 && size<=512 && !(EP2CS & bmBIT3)) { // EP2 is not full + for ( i=0; i> 8; + SYNCDELAY; + EP2BCL = size & 255; // arm EP2 + } + SYNCDELAY; + EP4BCL = 0x80; // (re)arm EP4 + } + } +} Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/ucecho/ucecho.bat =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/ucecho/ucecho.bat (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/ucecho/ucecho.bat (revision 6) @@ -0,0 +1,2 @@ +java -cp UCEcho.jar UCEcho +pause Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/ucecho/fpga/ucecho.ucf =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/ucecho/fpga/ucecho.ucf (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/ucecho/fpga/ucecho.ucf (revision 6) @@ -0,0 +1,21 @@ +NET "CLK" TNM_NET = "CLK"; +TIMESPEC "TS_CLK" = PERIOD "CLK" 20 ns HIGH 50 %; +NET "CLK" LOC = "L22" | IOSTANDARD = LVCMOS33 ; + +NET "pb<0>" LOC = "Y17" | IOSTANDARD = LVCMOS33 ; +NET "pb<1>" LOC = "V13" | IOSTANDARD = LVCMOS33 ; +NET "pb<2>" LOC = "W13" | IOSTANDARD = LVCMOS33 ; +NET "pb<3>" LOC = "AA8" | IOSTANDARD = LVCMOS33 ; +NET "pb<4>" LOC = "AB8" | IOSTANDARD = LVCMOS33 ; +NET "pb<5>" LOC = "W6" | IOSTANDARD = LVCMOS33 ; +NET "pb<6>" LOC = "Y6" | IOSTANDARD = LVCMOS33 ; +NET "pb<7>" LOC = "Y9" | IOSTANDARD = LVCMOS33 ; + +NET "pc<0>" LOC = "G20" | IOSTANDARD = LVCMOS33 ; +NET "pc<1>" LOC = "T20" | IOSTANDARD = LVCMOS33 ; +NET "pc<2>" LOC = "Y5" | IOSTANDARD = LVCMOS33 ; +NET "pc<3>" LOC = "AB9" | IOSTANDARD = LVCMOS33 ; +NET "pc<4>" LOC = "G19" | IOSTANDARD = LVCMOS33 ; +NET "pc<5>" LOC = "H20" | IOSTANDARD = LVCMOS33 ; +NET "pc<6>" LOC = "H19" | IOSTANDARD = LVCMOS33 ; +NET "pc<7>" LOC = "H18" | IOSTANDARD = LVCMOS33 ; Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/ucecho/fpga/ucecho.ise =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/ucecho/fpga/ucecho.ise =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/ucecho/fpga/ucecho.ise (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/ucecho/fpga/ucecho.ise (revision 6)
usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/ucecho/fpga/ucecho.ise Property changes : Added: svn:mime-type ## -0,0 +1 ## +application/octet-stream \ No newline at end of property Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/ucecho/fpga/ucecho.vhd =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/ucecho/fpga/ucecho.vhd (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/ucecho/fpga/ucecho.vhd (revision 6) @@ -0,0 +1,33 @@ +library ieee; +use IEEE.std_logic_1164.all; +use IEEE.numeric_std.all; + +entity ucecho is + port( + pc : in unsigned(7 downto 0); + pb : out unsigned(7 downto 0); + CLK : in std_logic + ); +end ucecho; + + +architecture RTL of ucecho is + +--signal declaration +signal pb_buf : unsigned(7 downto 0); + +begin + dpUCECHO: process(CLK) + begin + if CLK' event and CLK = '1' then + if ( pc >= 97 ) and ( pc <= 122) + then + pb_buf <= pc - 32; + else + pb_buf <= pc; + end if; + pb <= pb_buf; + end if; + end process dpUCECHO; + +end RTL; Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/ucecho/fpga/clean.sh =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/ucecho/fpga/clean.sh (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/ucecho/fpga/clean.sh (revision 6) @@ -0,0 +1,80 @@ +#!/bin/bash + +# This files / directories from this directory will not be removed +# Filenames with spaces or other spuid characters will be ignored +sourcefiles="*.vhd *.ucf *.sh *.ise *.bit *.bin *.xise" +subdirs="ipcore_dir" + + +# This sould not be edited. +list_files() { + if [ "$2" != "" ]; then + echo "$1" + for i in $2; do + echo " $i" + done + fi +} + +rmfiles="" +rmdirs="" +keepfiles="" +keepdirs="" +allfiles=`ls -A` +for f in $allfiles; do + keep=false + for i in $sourcefiles; do + if [ "$i" == "$f" ]; then + keep=true + fi + done + for i in $subdirs; do + if [ "$i" == "$f" ]; then + keep=true + fi + done + if [ -d "$f" ]; then + if $keep; then + keepdirs+=" $f" + else + rmdirs+=" $f" + fi + fi + if [ -f "$f" ]; then + if $keep; then + keepfiles+=" $f" + else + rmfiles+=" $f" + fi + fi +done + +echo +echo "Directory $PWD:" +list_files "This directories will NOT be removed:" "$keepdirs" +list_files "This files will NOT be removed:" "$keepfiles" +list_files "This directories will be removed:" "$rmdirs" +list_files "This files will be removed:" "$rmfiles" + +if [ "$rmfiles" == "" -a "$rmdirs" == "" ]; then + c="yes" +else + echo -n 'Confirm this by entering "yes": ' + read c +fi + +if [ "$c" == "yes" ]; then + [ "$rmfiles" != "" ] && rm $rmfiles + [ "$rmdirs" != "" ] && rm -r $rmdirs + + for d in $subdirs; do + if [ -x "$d/clean.sh" ]; then + cd $d + ./clean.sh || exit 1 + cd .. + fi + done + + exit 0 +fi +exit 1
usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/ucecho/fpga/clean.sh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/ucecho/fpga/ucecho.xise =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/ucecho/fpga/ucecho.xise (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/ucecho/fpga/ucecho.xise (revision 6) @@ -0,0 +1,56 @@ + + + +
+ + + + + + + + +
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/ucecho/Makefile =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/ucecho/Makefile (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/ucecho/Makefile (revision 6) @@ -0,0 +1,27 @@ +######################### +# configuration section # +######################### + +# Defines the location of the EZ-USB SDK +ZTEXPREFIX=../../../.. + +# The name of the jar archive +JARTARGET=UCEcho.jar +# Java Classes that have to be build +CLASSTARGETS=UCEcho.class +# Extra dependencies for Java Classes +CLASSEXTRADEPS= + +# ihx files (firmware ROM files) that have to be build +IHXTARGETS=ucecho.ihx +# Extra Dependencies for ihx files +IHXEXTRADEPS= + +# Extra files that should be included into th jar archive +EXTRAJARFILES=ucecho.ihx fpga/ucecho.bit + +################################ +# DO NOT CHANAGE THE FOLLOWING # +################################ +# includes the main Makefile +include $(ZTEXPREFIX)/Makefile.mk Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/ucecho/Readme =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/ucecho/Readme (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/ucecho/Readme (revision 6) @@ -0,0 +1,21 @@ +ucecho +------ + +This example is intended for ZTEX USB-FPGA-Modules. + +The firmware (defined in ucecho.c) declares Endpoint 2 and Endpoint 4 +(both 512 bytes, double buffered, bulk transfer, belong to interface 0). +All data that is written to Endpoint 4 is converted to uppercase by +the FPGA and can be read back from Endpoint 2. + +This example does the same as the example in directory ../../all/ucecho +except that the uppercase - lowercase conversion is made by the FPGA. + +The driver (defined in UCEcho.java) uploads the the Firmware (ucecho.ihx) +to the EZ-USB Microcontroller and the Bitstream (fpga/ucecho.bit) to the +FPGA if necessary, sends user string to the device and reads them back. + +Uploading the Firmware to EEPROM is also supported by the firmware (e.g. +using the FWLoader utility). + +This example may serve a good starting point for own projects. Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/lightshow.sh =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/lightshow.sh (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/lightshow.sh (revision 6) @@ -0,0 +1,4 @@ +#make -C ../../../java distclean all || exit +#make distclean all || exit +#make || exit +java -cp Lightshow.jar Lightshow $@
usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/lightshow.sh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/lightshow-prog.sh =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/lightshow-prog.sh (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/lightshow-prog.sh (revision 6) @@ -0,0 +1,7 @@ +# programms the EEPROM and the FPGA for standalone usage +#make -C ../../../../java distclean all || exit +#make distclean all || exit + +java -cp Lightshow.jar Lightshow $@ +../../../../java/FWLoader -ue lightshow.ihx -um fpga/lightshow.bit +
usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/lightshow-prog.sh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/avr/lightshow.ihx =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/avr/lightshow.ihx (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/avr/lightshow.ihx (revision 6) @@ -0,0 +1,44 @@ +:100000000C94FA000C9418010C9418010C9418012B +:100010000C9418010C9418010C9418010C941801FC +:100020000C9418010C9418010C9418010C941801EC +:100030000C9418010C9418010C9418010C941801DC +:100040000C9418010C9418010C9418010C941801CC +:100050000C9418010C9418010C9418010C941801BC +:100060000C9418010C9418010C9418010C941801AC +:100070000C9418010C9418010C9418010C9418019C +:100080000C9418010C9418010C9418010C9418018C +:100090000C9418010C9418010C9418010C9418017C +:1000A0000C9418010C9418010C9418010C9418016C +:1000B0000C9418010C9418010C9418010C9418015C +:1000C0000C9418010C9418010C9418010C9418014C +:1000D0000C9418010C9418010C9418010C9418013C +:1000E0000C9418010C9418010C9418010C9418012C +:1000F0000C9418010C9418010C9418010C9418011C +:100100000C9418010C9418010C9418010C9418010B +:100110000C9418010C9418010C9418010C941801FB +:100120000C9418010C9418010C9418010C941801EB +:100130000C9418010C9418010C9418010C941801DB +:100140000C9418010C9418010C9418010C941801CB +:100150000C9418010C9418010C9418010C941801BB +:100160000C9418010C9418010C9418010C941801AB +:100170000C9418010C9418010C9418010C9418019B +:100180000C9418010C9418010C9418010C9418018B +:100190000C9418010C9418010C9418010C9418017B +:1001A0000C9418010C9418010C9418010C9418016B +:1001B0000C9418010C9418010C9418010C9418015B +:1001C0000C9418010C9418010C9418010C9418014B +:1001D0000C9418010C9418010C9418010C9418013B +:1001E0000C9418010C9418010C9418010C9418012B +:1001F0000C94180111241FBECFEFDFE3DEBFCDBF8B +:1002000000E00CBF18BE19BE1ABE1BBE10E2A0E073 +:10021000B0E2ECEAF2E000E00BBF02C007900D9202 +:10022000A030B107D9F71BBE0E941A010C945401EB +:100230000C94000088ED77E084BF709350008091AB +:10024000510087708730D9F788ED71E084BF7093D3 +:10025000600084BF7093680084BF7093400088ED95 +:1002600071E084BF7093960082E0E0EBF0E084835D +:1002700080E880936006109200071092E00680915B +:1002800060068F60809360068FEF8093A006A0E6E3 +:10029000B6E0E0EAF6E08091080714968C93149794 +:0C02A0008091E8068483F7CFF894FFCF2C +:00000001FF Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/avr/avrdude.sh =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/avr/avrdude.sh (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/avr/avrdude.sh (revision 6) @@ -0,0 +1,2 @@ +make || exit +avrdude -p x128a1 -c avrispmkii -P usb -e -U flash:w:test.ihx:i
usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/avr/avrdude.sh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/avr/lightshow.c =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/avr/lightshow.c (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/avr/lightshow.c (revision 6) @@ -0,0 +1,76 @@ +/*! + lightshow -- lightshow on Experimental Board 1.10 + Copyright (C) 2009-2010 ZTEX e.K. + http://www.ztex.de + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License version 3 as + published by the Free Software Foundation. + + This program is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, see http://www.gnu.org/licenses/. +!*/ + +#include + +#define F_CPU 32000000UL +#include + +typedef uint8_t byte; + +int main(void) +{ + // enable 32.768 kHz, 32 MHz, 2 Mhz clocks + asm volatile ( + "ldi r24,0xd8" "\n\t" + "ldi r23,7" "\n\t" + "out 0x34,r24" "\n\t" + "sts 0x50,r23" + ::: "r24", "r23" + ); + + // wait until clocks are ready + while ( (OSC.STATUS & 7) != 7 ) { } + + // enable run time configuration of 32 MHz and 2 MHz clocks; select 32 MHz clock as system clock + asm volatile ( + "ldi r24,0xd8" "\n\t" + "ldi r23,1" "\n\t" + "out 0x34,r24" "\n\t" + "sts 0x60,r23" "\n\t" + "out 0x34,r24" "\n\t" + "sts 0x68,r23" "\n\t" + "out 0x34,r24" "\n\t" + "sts 0x40,r23" + ::: "r24", "r23" + ); + + // disable JTAG at portb + asm volatile ( + "ldi r24,0xd8" "\n\t" + "ldi r23,1" "\n\t" + "out 0x34,r24" "\n\t" + "sts 0x96,r23" "\n\t" + ::: "r24", "r23" + ); + + // clock output to PD7 + PORTCFG.CLKEVOUT = 2; + PORTD.DIR = 128; + + PORTJ.DIR = 0; // input: 4 LED's + PORTH.DIR = 0; // input: 8 LED's + PORTD.DIR |= 15; // output: 4 LED's + PORTF.DIR = 255; // output: 8 LED's + + while (1) { + PORTD.OUT = PORTJ.IN; + PORTF.OUT = PORTH.IN; + } +} + Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/avr/Makefile =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/avr/Makefile (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/avr/Makefile (revision 6) @@ -0,0 +1,16 @@ +AVRGCC=avr-gcc -std=gnu99 -save-temps -mmcu=atxmega128a1 -O2 +OBJ2HEX=avr-objcopy + +all: lightshow.ihx + +%.obj : %.c + $(AVRGCC) $< -o $@ + +%.ihx : %.obj + $(OBJ2HEX) -R .eeprom -O ihex $< $@ + +clean: + rm -f *.o *.i *.s *.obj *.old *.bak *~ + +distclean: + rm -f *.ihx Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/Lightshow.java =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/Lightshow.java (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/Lightshow.java (revision 6) @@ -0,0 +1,130 @@ +/*! + lightshow -- lightshow on ZTEX USB-FPGA Module 1.15b plus Experimental Board 1.10 + Copyright (C) 2009-2011 ZTEX GmbH. + http://www.ztex.de + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License version 3 as + published by the Free Software Foundation. + + This program is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, see http://www.gnu.org/licenses/. +!*/ + +import java.io.*; +import java.util.*; + +import ch.ntb.usb.*; + +import ztex.*; + +// ***************************************************************************** +// ******* ParameterException ************************************************** +// ***************************************************************************** +// Exception the prints a help message +class ParameterException extends Exception { + public final static String helpMsg = new String ( + "Parameters:\n"+ + " -d Device Number (default: 0)\n" + + " -f Force uploads\n" + + " -p Print bus info\n" + + " -h This help" ); + + public ParameterException (String msg) { + super( msg + "\n" + helpMsg ); + } +} + +// ***************************************************************************** +// ******* Test0 *************************************************************** +// ***************************************************************************** +class Lightshow extends Ztex1v1 { + +// ******* Lightshow *********************************************************** +// constructor + public Lightshow ( ZtexDevice1 pDev ) throws UsbException { + super ( pDev ); + } + +// ******* main **************************************************************** + public static void main (String args[]) { + + int devNum = 0; + boolean force = false; + boolean workarounds = false; + + try { +// init USB stuff + LibusbJava.usb_init(); + +// scan the USB bus + ZtexScanBus1 bus = new ZtexScanBus1( ZtexDevice1.ztexVendorId, ZtexDevice1.ztexProductId, true, false, 1); + if ( bus.numberOfDevices() <= 0) { + System.err.println("No devices found"); + System.exit(0); + } + +// scan the command line arguments + for (int i=0; i=args.length) throw new Exception(); + devNum = Integer.parseInt( args[i] ); + } + catch (Exception e) { + throw new ParameterException("Device number expected after -d"); + } + } + else if ( args[i].equals("-f") ) { + force = true; + } + else if ( args[i].equals("-p") ) { + bus.printBus(System.out); + System.exit(0); + } + else if ( args[i].equals("-p") ) { + bus.printBus(System.out); + System.exit(0); + } + else if ( args[i].equals("-h") ) { + System.err.println(ParameterException.helpMsg); + System.exit(0); + } + else throw new ParameterException("Invalid Parameter: "+args[i]); + } + + +// create the main class + Lightshow ztex = new Lightshow ( bus.device(devNum) ); + +// upload the firmware if necessary + if ( force || ! ztex.valid() || ! ztex.dev().productString().equals("lightshow for EXP-1.10") ) { + System.out.println("Firmware upload time: " + ztex.uploadFirmware( "lightshow.ihx", force ) + " ms"); + } + +// check for Experimental Bord 1.10 + if ( ! ztex.xmegaEnabled() ) + throw new Exception("Experimental Board 1.10 required"); + +// upload the bitstream if necessary + System.out.println("FPGA configuration time: " + ztex.configureFpga( "fpga/lightshow.bit" , true ) + " ms"); + +// bitstream if necessary + System.out.println("AVR Firmware upload time: " + ztex.xmegaWriteFirmware( new IhxFile("avr/lightshow.ihx" ) ) + " ms"); + +// program the ATxmega + System.out.println( ztex ); + + } + catch (Exception e) { + System.out.println("Error: "+e.getLocalizedMessage() ); + } + } + +} Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/lightshow.c =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/lightshow.c (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/lightshow.c (revision 6) @@ -0,0 +1,50 @@ +/*! + lightshow -- lightshow on ZTEX USB-FPGA Module 1.15b plus Experimental Board 1.10 + Copyright (C) 2009-2011 ZTEX GmbH. + http://www.ztex.de + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License version 3 as + published by the Free Software Foundation. + + This program is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, see http://www.gnu.org/licenses/. +!*/ + +#include[ztex-conf.h] // Loads the configuration macros, see ztex-conf.h for the available macros +#include[ztex-utils.h] // include basic functions + +// Endpoint 2 is used to high speed FPGA configuration +EP_CONFIG(2,0,BULK,OUT,512,4); + +// select ZTEX USB FPGA Module 1.15 + Experimental Board 1.10 as target +IDENTITY_UFM_1_15(10.13.0.0,0); +EXTENSION_EXP_1_10; + +// enables high speed FPGA configuration, use EP 2 +ENABLE_HS_FPGA_CONF(2); + +// this product string is also used for identification by the host software +#define[PRODUCT_STRING]["lightshow for EXP-1.10"] + +// enable Flash support +ENABLE_FLASH; +ENABLE_FLASH_BITSTREAM; + +// include the main part of the firmware kit, define the descriptors, ... +#include[ztex.h] + +void main(void) +{ +// init everything + init_USB(); + + while ( 1 ) { + } +} + Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/fpga/lightshow.xise =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/fpga/lightshow.xise (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/fpga/lightshow.xise (revision 6) @@ -0,0 +1,327 @@ + + + +
+ + + + + + + + +
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/fpga/lightshow.ucf =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/fpga/lightshow.ucf (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/fpga/lightshow.ucf (revision 6) @@ -0,0 +1,17 @@ +NET "CLK" TNM_NET = "CLK"; +TIMESPEC "TS_CLK" = PERIOD "CLK" 20 ns HIGH 50 %; +# NET "CLK" LOC = "L22" | IOSTANDARD = LVCMOS33 ; # EZ-USB clock +NET "CLK" LOC = "AB12" | IOSTANDARD = LVCMOS33 ; # xmega clock + +NET "led<0>" LOC = "D11" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # ph<0> +NET "led<1>" LOC = "F10" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # ph<1> +NET "led<2>" LOC = "D10" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # ph<2> +NET "led<3>" LOC = "D9" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # ph<3> +NET "led<4>" LOC = "B8" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # ph<4> +NET "led<5>" LOC = "D7" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # ph<5> +NET "led<6>" LOC = "D6" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # ph<6> +NET "led<7>" LOC = "C5" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # ph<7> +NET "led<8>" LOC = "W12" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # pj<0> +NET "led<9>" LOC = "W9" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # pj<1> +NET "led<10>" LOC = "T14" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # pj<2> +NET "led<11>" LOC = "Y13" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # pj<3> Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/fpga/lightshow.ise =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/fpga/lightshow.ise =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/fpga/lightshow.ise (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/fpga/lightshow.ise (revision 6)
usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/fpga/lightshow.ise Property changes : Added: svn:mime-type ## -0,0 +1 ## +application/octet-stream \ No newline at end of property Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/fpga/lightshow.vhd =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/fpga/lightshow.vhd (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/fpga/lightshow.vhd (revision 6) @@ -0,0 +1,84 @@ +library ieee; +use IEEE.std_logic_1164.all; +use IEEE.std_logic_arith.all; +use IEEE.std_logic_unsigned.all; + +entity lightshow is + port( + led : out std_logic_vector(11 downto 0); + CLK : in std_logic -- 32 MHz + ); +end lightshow; + +--signal declaration +architecture RTL of lightshow is + +type tPattern is array(11 downto 0) of integer range 0 to 15; + +signal pattern1 : tPattern := (0, 1, 2, 3, 4, 5, 6, 5, 4, 3, 2, 1); +signal pattern2 : tPattern := (6, 5, 4, 3, 2, 1, 0, 1, 2, 3, 4, 5); +signal pattern3 : tPattern := (0, 1, 4, 9, 4, 1, 0, 0, 0, 0, 0, 0); + +type tXlatTable1 is array(0 to 12) of integer range 0 to 1023; +constant xt1 : tXlatTable1 := (0, 0, 1, 4, 13, 31, 64, 118, 202, 324, 493, 722, 1023); +type tXlatTable2 is array(0 to 9) of integer range 0 to 255; +--constant xt2 : tXlatTable2 := (0, 1, 11, 38, 90, 175, 303, 481, 718, 1023); +constant xt2 : tXlatTable2 := (0, 0, 3, 9, 22, 44, 76, 120, 179, 255); + +signal cp1 : std_logic_vector(22 downto 0); +signal cp2 : std_logic_vector(22 downto 0); +signal cp3 : std_logic_vector(22 downto 0); +signal d : std_logic_vector(16 downto 0); + +begin + dpCLK: process(CLK) + begin + if CLK' event and CLK = '1' then + + if ( cp1 = conv_std_logic_vector(3000000,23) ) + then + pattern1(10 downto 0) <= pattern1(11 downto 1); + pattern1(11) <= pattern1(0); + cp1 <= (others => '0'); + else + cp1 <= cp1 + 1; + end if; + + if ( cp2 = conv_std_logic_vector(2200000,23) ) + then + pattern2(10 downto 0) <= pattern2(11 downto 1); + pattern2(11) <= pattern2(0); + cp2 <= (others => '0'); + else + cp2 <= cp2 + 1; + end if; + + if ( cp3 = conv_std_logic_vector(1500000,23) ) + then + pattern3(11 downto 1) <= pattern3(10 downto 0); + pattern3(0) <= pattern3(11); + cp3 <= (others => '0'); + else + cp3 <= cp3 + 1; + end if; + + if ( d = conv_std_logic_vector(1278*64-1,17) ) + then + d <= (others => '0'); + else + d <= d + 1; + end if; + + for i in 0 to 11 loop + if ( d(16 downto 6) < conv_std_logic_vector( xt1(pattern1(i) + pattern2(i)) + xt2(pattern3(i)) ,11) ) + then + led(i) <= '1'; + else + led(i) <= '0'; + end if; + end loop; + + end if; + end process dpCLK; + +end RTL; Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/fpga/clean.sh =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/fpga/clean.sh (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/fpga/clean.sh (revision 6) @@ -0,0 +1,80 @@ +#!/bin/bash + +# This files / directories from this directory will not be removed +# Filenames with spaces or other spuid characters will be ignored +sourcefiles="*.vhd *.ucf *.sh *.ise *.bit *.bin *.xise" +subdirs="ipcore_dir" + + +# This sould not be edited. +list_files() { + if [ "$2" != "" ]; then + echo "$1" + for i in $2; do + echo " $i" + done + fi +} + +rmfiles="" +rmdirs="" +keepfiles="" +keepdirs="" +allfiles=`ls -A` +for f in $allfiles; do + keep=false + for i in $sourcefiles; do + if [ "$i" == "$f" ]; then + keep=true + fi + done + for i in $subdirs; do + if [ "$i" == "$f" ]; then + keep=true + fi + done + if [ -d "$f" ]; then + if $keep; then + keepdirs+=" $f" + else + rmdirs+=" $f" + fi + fi + if [ -f "$f" ]; then + if $keep; then + keepfiles+=" $f" + else + rmfiles+=" $f" + fi + fi +done + +echo +echo "Directory $PWD:" +list_files "This directories will NOT be removed:" "$keepdirs" +list_files "This files will NOT be removed:" "$keepfiles" +list_files "This directories will be removed:" "$rmdirs" +list_files "This files will be removed:" "$rmfiles" + +if [ "$rmfiles" == "" -a "$rmdirs" == "" ]; then + c="yes" +else + echo -n 'Confirm this by entering "yes": ' + read c +fi + +if [ "$c" == "yes" ]; then + [ "$rmfiles" != "" ] && rm $rmfiles + [ "$rmdirs" != "" ] && rm -r $rmdirs + + for d in $subdirs; do + if [ -x "$d/clean.sh" ]; then + cd $d + ./clean.sh || exit 1 + cd .. + fi + done + + exit 0 +fi +exit 1
usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/fpga/clean.sh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/Makefile =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/Makefile (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/Makefile (revision 6) @@ -0,0 +1,21 @@ +######################### +# configuration section # +######################### + +ZTEXPREFIX=../../../.. + +JARTARGET=Lightshow.jar +CLASSTARGETS=Lightshow.class +CLASSEXTRADEPS= +#CLASSEXTRADEPS:=$(wildcard $(ZTEXPREFIX)/java/ztex/*.java) + +IHXTARGETS=lightshow.ihx +IHXEXTRADEPS= +#IHXEXTRADEPS:=$(wildcard $(ZTEXPREFIX)/include/*.h) +EXTRAJARFILES=lightshow.ihx avr/lightshow.ihx fpga/lightshow.bit + +################################ +# DO NOT CHANAGE THE FOLLOWING # +################################ + +include $(ZTEXPREFIX)/Makefile.mk Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/Readme =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/Readme (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/Readme (revision 6) @@ -0,0 +1,6 @@ +lightshow +--------- + +This example requires the Experimental Board 1.10. + +It implements a light show using the LED's on the board. Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/lightshow.bat =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/lightshow.bat (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/lightshow/lightshow.bat (revision 6) @@ -0,0 +1,2 @@ +java -cp Lightshow.jar Lightshow +pause Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/Makefile =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/Makefile (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/Makefile (revision 6) @@ -0,0 +1,26 @@ +DIRS=ucecho intraffic memtest lightshow mmio + +.PHONY: default all clean distclean avr avrclean avrdistclean + +default: + @echo "This makefile is intended to clean up the project or to build all examples in this subdirectory" + @echo "Usage: make all | clean | distclean" + +all: + set -e; for i in $(DIRS); do make -C $$i all; done + +clean: + set -e; for i in $(DIRS); do make -C $$i clean; done + +distclean: + set -e; for i in $(DIRS); do make -C $$i distclean; done + +avr: + set -e; for i in $(DIRS); do make -C $$i avr; done + +avrclean: + set -e; for i in $(DIRS); do make -C $$i avrclean; done + +avrdistclean: + set -e; for i in $(DIRS); do make -C $$i avrdistclean; done + Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/memtest.c =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/memtest.c (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/memtest.c (revision 6) @@ -0,0 +1,96 @@ +/*! + memtest -- DDR2 SDRAM FIFO for testing memory on ZTEX USB-FPGA Module 1.15b + Copyright (C) 2009-2011 ZTEX GmbH. + http://www.ztex.de + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License version 3 as + published by the Free Software Foundation. + + This program is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, see http://www.gnu.org/licenses/. +!*/ + +#include[ztex-conf.h] // Loads the configuration macros, see ztex-conf.h for the available macros +#include[ztex-utils.h] // include basic functions + +// configure endpoint 2, in, quad buffered, 512 bytes, interface 0 +EP_CONFIG(2,0,BULK,IN,512,4); + +// configure endpoint 6, out, doublebuffered, 512 bytes, interface 0 +EP_CONFIG(6,0,BULK,OUT,512,2); + +// select ZTEX USB FPGA Module 1.11 as target (required for FPGA configuration) +IDENTITY_UFM_1_15(10.13.0.0,0); + +// enables high speed FPGA configuration via EP6 +ENABLE_HS_FPGA_CONF(6); + +// this product string is also used for identification by the host software +#define[PRODUCT_STRING]["memtest example for UFM 1.15"] + +// 0 : counter mode; 1: shift pattern mode +__xdata BYTE mode = 0; + +// this is called automatically after FPGA configuration +#define[POST_FPGA_CONFIG][POST_FPGA_CONFIG + IOA7 = 1; // reset on + OEA |= bmBIT7; + IOC0 = mode ? 1 : 0; + OEC = bmBIT0; + + EP2CS &= ~bmBIT0; // clear stall bit + + REVCTL = 0x3; + SYNCDELAY; + + IFCONFIG = bmBIT7 | bmBIT5 | 3; // internel 30MHz clock, drive IFCLK ouput, slave FIFO interface + SYNCDELAY; + EP2FIFOCFG = bmBIT3 | bmBIT0; // AOTUOIN, WORDWIDE + SYNCDELAY; + + EP2AUTOINLENH = 2; // 512 bytes + SYNCDELAY; + EP2AUTOINLENL = 0; + SYNCDELAY; + + FIFORESET = 0x80; // reset FIFO + SYNCDELAY; + FIFORESET = 2; + SYNCDELAY; + FIFORESET = 0x00; + SYNCDELAY; + + FIFOPINPOLAR = 0; + SYNCDELAY; + PINFLAGSAB = 0; + SYNCDELAY; + PINFLAGSCD = 0; + SYNCDELAY; + + IOA7 = 0; // reset off +] + +// set the test pattern +ADD_EP0_VENDOR_COMMAND((0x60,, + mode = SETUPDAT[2]; +,, + NOP; +));; + +// include the main part of the firmware kit, define the descriptors, ... +#include[ztex.h] + +void main(void) +{ + init_USB(); + + while (1) { + } +} + Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/memtest.bat =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/memtest.bat (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/memtest.bat (revision 6) @@ -0,0 +1,3 @@ +java -cp MemTest.jar MemTest +pause + Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/memtest.sh =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/memtest.sh (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/memtest.sh (revision 6) @@ -0,0 +1,6 @@ +#make -C ../../../java distclean all || exit +#cd fpga +#./promgen.sh +#cd .. +#make distclean all || exit +java -cp MemTest.jar MemTest $@
usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/memtest.sh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/ipcore_dir/mem0.xise =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/ipcore_dir/mem0.xise (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/ipcore_dir/mem0.xise (revision 6) @@ -0,0 +1,122 @@ + + + +
+ + + + + + + + +
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/ipcore_dir/mem0.xco =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/ipcore_dir/mem0.xco (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/ipcore_dir/mem0.xco (revision 6) @@ -0,0 +1,42 @@ +############################################################## +# +# Xilinx Core Generator version 12.2 +# Date: Wed Jul 20 10:38:33 2011 +# +############################################################## +# +# This file contains the customisation parameters for a +# Xilinx CORE Generator IP GUI. It is strongly recommended +# that you do not manually alter this file as it may cause +# unexpected and unsupported behavior. +# +############################################################## +# +# BEGIN Project Options +SET addpads = false +SET asysymbol = true +SET busformat = BusFormatAngleBracketNotRipped +SET createndf = false +SET designentry = VHDL +SET device = xc6slx45 +SET devicefamily = spartan6 +SET flowvendor = Other +SET formalverification = false +SET foundationsym = false +SET implementationfiletype = Ngc +SET package = csg484 +SET removerpms = false +SET simulationfiles = Behavioral +SET speedgrade = -2 +SET verilogsim = false +SET vhdlsim = true +# END Project Options +# BEGIN Select +SELECT MIG family Xilinx,_Inc. 3.5 +# END Select +# BEGIN Parameters +CSET component_name=mem0 +CSET xml_input_file=./mem0/user_design/mig.prj +# END Parameters +GENERATE +# CRC: b055767e Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/ipcore_dir/clean.sh =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/ipcore_dir/clean.sh (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/ipcore_dir/clean.sh (revision 6) @@ -0,0 +1,85 @@ +#!/bin/bash + +# This files / directories from this directory will not be removed +# Filenames with spaces or other spuid characters will be ignored +sourcefiles="*.vhd *.sh *.ise *.xco *.xise *.tcl" +subdirs="mem0 custom_part" + +# This sould not be edited. +list_files() { + if [ "$2" != "" ]; then + echo "$1" + for i in $2; do + echo " $i" + done + fi +} + +rmfiles="" +rmdirs="" +keepfiles="" +keepdirs="" +allfiles=`ls -A` +for f in $allfiles; do + keep=false + for i in $sourcefiles; do + if [ "$i" == "$f" ]; then + keep=true + fi + done + for i in $subdirs; do + if [ "$i" == "$f" ]; then + keep=true + fi + done + for i in $binfiles; do # binfiles is set by distclean.sh + if [ "$i" == "$f" ]; then + keep=false + fi + done + if [ -d "$f" ]; then + if $keep; then + keepdirs+=" $f" + else + rmdirs+=" $f" + fi + fi + if [ -f "$f" ]; then + if $keep; then + keepfiles+=" $f" + else + rmfiles+=" $f" + fi + fi +done + + +echo +echo "Directory $PWD:" +list_files "This directories will NOT be removed:" "$keepdirs" +list_files "This files will NOT be removed:" "$keepfiles" +list_files "This directories will be removed:" "$rmdirs" +list_files "This files will be removed:" "$rmfiles" + +if [ "$rmfiles" == "" -a "$rmdirs" == "" ]; then + c="yes" +else + echo -n 'Confirm this by entering "yes": ' + read c +fi + +if [ "$c" == "yes" ]; then + [ "$rmfiles" != "" ] && rm $rmfiles + [ "$rmdirs" != "" ] && rm -r $rmdirs + + for d in $subdirs; do + if [ -x "$d/clean.sh" ]; then + cd $d + ./clean.sh || exit 1 + cd .. + fi + done + + exit 0 +fi +exit 1
usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/ipcore_dir/clean.sh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/ipcore_dir/mem0/user_design/rtl/memc3_infrastructure.vhd.diff =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/ipcore_dir/mem0/user_design/rtl/memc3_infrastructure.vhd.diff (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/ipcore_dir/mem0/user_design/rtl/memc3_infrastructure.vhd.diff (revision 6) @@ -0,0 +1,61 @@ +--- memc3_infrastructure.orig.vhd 2010-08-20 11:42:53.000000000 +0200 ++++ memc3_infrastructure.vhd 2010-08-20 11:48:07.000000000 +0200 +@@ -122,7 +122,6 @@ + signal mcb_drp_clk_bufg_in : std_logic; + signal clkfbout_clkfbin : std_logic; + signal rst_tmp : std_logic; +- signal sys_clk_ibufg : std_logic; + signal sys_rst : std_logic; + signal rst0_sync_r : std_logic_vector(RST_SYNC_NUM-1 downto 0); + signal powerup_pll_locked : std_logic; +@@ -135,7 +134,6 @@ + attribute KEEP : string; + attribute max_fanout of rst0_sync_r : signal is "10"; + attribute syn_maxfan of rst0_sync_r : signal is 10; +- attribute KEEP of sys_clk_ibufg : signal is "TRUE"; + + begin + +@@ -144,33 +142,6 @@ + pll_lock <= bufpll_mcb_locked; + mcb_drp_clk <= mcb_drp_clk_sig; + +- diff_input_clk : if(C_INPUT_CLK_TYPE = "DIFFERENTIAL") generate +- --*********************************************************************** +- -- Differential input clock input buffers +- --*********************************************************************** +- u_ibufg_sys_clk : IBUFGDS +- generic map ( +- DIFF_TERM => TRUE +- ) +- port map ( +- I => sys_clk_p, +- IB => sys_clk_n, +- O => sys_clk_ibufg +- ); +- end generate; +- +- +- se_input_clk : if(C_INPUT_CLK_TYPE = "SINGLE_ENDED") generate +- --*********************************************************************** +- -- SINGLE_ENDED input clock input buffers +- --*********************************************************************** +- u_ibufg_sys_clk : IBUFG +- port map ( +- I => sys_clk, +- O => sys_clk_ibufg +- ); +- end generate; +- + --*************************************************************************** + -- Global clock generation and distribution + --*************************************************************************** +@@ -209,7 +180,7 @@ + ( + CLKFBIN => clkfbout_clkfbin, + CLKINSEL => '1', +- CLKIN1 => sys_clk_ibufg, ++ CLKIN1 => sys_clk, + CLKIN2 => '0', + DADDR => (others => '0'), + DCLK => '0', Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/ipcore_dir/mem0/user_design/par/ila_coregen.xco =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/ipcore_dir/mem0/user_design/par/ila_coregen.xco (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/ipcore_dir/mem0/user_design/par/ila_coregen.xco (revision 6) @@ -0,0 +1,131 @@ +############################################################## +# +# Xilinx Core Generator version 11.1 +# Date: Wed Mar 11 06:55:40 2009 +# +############################################################## +# +# This file contains the customisation parameters for a +# Xilinx CORE Generator IP GUI. It is strongly recommended +# that you do not manually alter this file as it may cause +# unexpected and unsupported behavior. +# +############################################################## +# +# BEGIN Project Options +SET addpads = False +SET asysymbol = False +SET busformat = BusFormatAngleBracketNotRipped +SET createndf = False +SET designentry = vhdl +SET device = xc6slx45 +SET devicefamily = spartan6 +SET flowvendor = ISE +SET formalverification = False +SET foundationsym = False +SET implementationfiletype = Ngc +SET package = csg484 +SET removerpms = False +SET simulationfiles = Structural +SET speedgrade = -2 +SET verilogsim = False +SET vhdlsim = False +# END Project Options +# BEGIN Select +SELECT ILA_(ChipScope_Pro_-_Integrated_Logic_Analyzer) family Xilinx,_Inc. 1.03.a +# END Select +# BEGIN Parameters +CSET component_name=ila +CSET counter_width_1=Disabled +CSET counter_width_10=Disabled +CSET counter_width_11=Disabled +CSET counter_width_12=Disabled +CSET counter_width_13=Disabled +CSET counter_width_14=Disabled +CSET counter_width_15=Disabled +CSET counter_width_16=Disabled +CSET counter_width_2=Disabled +CSET counter_width_3=Disabled +CSET counter_width_4=Disabled +CSET counter_width_5=Disabled +CSET counter_width_6=Disabled +CSET counter_width_7=Disabled +CSET counter_width_8=Disabled +CSET counter_width_9=Disabled +CSET data_port_width=256 +CSET data_same_as_trigger=false +CSET enable_storage_qualification=true +CSET enable_trigger_output_port=false +CSET exclude_from_data_storage_1=true +CSET exclude_from_data_storage_10=true +CSET exclude_from_data_storage_11=true +CSET exclude_from_data_storage_12=true +CSET exclude_from_data_storage_13=true +CSET exclude_from_data_storage_14=true +CSET exclude_from_data_storage_15=true +CSET exclude_from_data_storage_16=true +CSET exclude_from_data_storage_2=true +CSET exclude_from_data_storage_3=true +CSET exclude_from_data_storage_4=true +CSET exclude_from_data_storage_5=true +CSET exclude_from_data_storage_6=true +CSET exclude_from_data_storage_7=true +CSET exclude_from_data_storage_8=true +CSET exclude_from_data_storage_9=true +CSET match_type_1=basic_with_edges +CSET match_type_10=basic +CSET match_type_11=basic +CSET match_type_12=basic +CSET match_type_13=basic +CSET match_type_14=basic +CSET match_type_15=basic +CSET match_type_16=basic +CSET match_type_2=basic +CSET match_type_3=basic +CSET match_type_4=basic +CSET match_type_5=basic +CSET match_type_6=basic +CSET match_type_7=basic +CSET match_type_8=basic +CSET match_type_9=basic +CSET match_units_1=1 +CSET match_units_10=1 +CSET match_units_11=1 +CSET match_units_12=1 +CSET match_units_13=1 +CSET match_units_14=1 +CSET match_units_15=1 +CSET match_units_16=1 +CSET match_units_2=1 +CSET match_units_3=1 +CSET match_units_4=1 +CSET match_units_5=1 +CSET match_units_6=1 +CSET match_units_7=1 +CSET match_units_8=1 +CSET match_units_9=1 +CSET max_sequence_levels=1 +CSET number_of_trigger_ports=1 +CSET sample_data_depth=1024 +CSET sample_on=Rising +CSET trigger_port_width_1=2 +CSET trigger_port_width_10=8 +CSET trigger_port_width_11=8 +CSET trigger_port_width_12=8 +CSET trigger_port_width_13=8 +CSET trigger_port_width_14=8 +CSET trigger_port_width_15=8 +CSET trigger_port_width_16=8 +CSET trigger_port_width_2=8 +CSET trigger_port_width_3=8 +CSET trigger_port_width_4=8 +CSET trigger_port_width_5=8 +CSET trigger_port_width_6=8 +CSET trigger_port_width_7=8 +CSET trigger_port_width_8=8 +CSET trigger_port_width_9=8 +CSET use_rpms=true +# END Parameters +GENERATE +# CRC: eff89f81 + Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/ipcore_dir/mem0/user_design/par/ise_flow.sh =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/ipcore_dir/mem0/user_design/par/ise_flow.sh (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/ipcore_dir/mem0/user_design/par/ise_flow.sh (revision 6) @@ -0,0 +1,86 @@ +#!/bin/csh -f +#***************************************************************************** +# (c) Copyright 2009 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +# +# **************************************************************************** +# ____ ____ +# / /\/ / +# /___/ \ / Vendor : Xilinx +# \ \ \/ Version : 3.5 +# \ \ Application : MIG +# / / Filename : ise_flow.bat +# /___/ /\ Date Last Modified : $Date: 2010/06/06 09:42:27 $ +# \ \ / \ Date Created : Fri Feb 06 2009 +# \___\/\___\ +# +# Device : Spartan-6 +# Design Name : DDR/DDR2/DDR3/LPDDR +# Purpose : Batch file to run PAR through ISE batch mode +# Reference : +# Revision History : +# **************************************************************************** + +./rem_files.sh + + + + +echo Synthesis Tool: XST + +mkdir "../synth/__projnav" > ise_flow_results.txt +mkdir "../synth/xst" >> ise_flow_results.txt +mkdir "../synth/xst/work" >> ise_flow_results.txt + +xst -ifn ise_run.txt -ofn mem_interface_top.syr -intstyle ise >> ise_flow_results.txt +ngdbuild -intstyle ise -dd ../synth/_ngo -uc mem0.ucf -p xc6slx45csg484-2 mem0.ngc mem0.ngd >> ise_flow_results.txt + +map -intstyle ise -detail -w -pr off -c 100 -o mem0_map.ncd mem0.ngd mem0.pcf >> ise_flow_results.txt +par -w -intstyle ise -ol std mem0_map.ncd mem0.ncd mem0.pcf >> ise_flow_results.txt +trce -e 100 mem0.ncd mem0.pcf >> ise_flow_results.txt +bitgen -intstyle ise -f mem_interface_top.ut mem0.ncd >> ise_flow_results.txt + +echo done!
usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/ipcore_dir/mem0/user_design/par/ise_flow.sh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/ipcore_dir/mem0/user_design/par/makeproj.sh =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/ipcore_dir/mem0/user_design/par/makeproj.sh (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/ipcore_dir/mem0/user_design/par/makeproj.sh (revision 6) @@ -0,0 +1,2 @@ +NEWPROJECT . +SETPROJECT .
usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/ipcore_dir/mem0/user_design/par/makeproj.sh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/ipcore_dir/mem0/user_design/par/icon_coregen.xco =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/ipcore_dir/mem0/user_design/par/icon_coregen.xco (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/ipcore_dir/mem0/user_design/par/icon_coregen.xco (revision 6) @@ -0,0 +1,48 @@ +############################################################## +# +# Xilinx Core Generator version 11.1 +# Date: Wed Mar 11 07:09:11 2009 +# +############################################################## +# +# This file contains the customisation parameters for a +# Xilinx CORE Generator IP GUI. It is strongly recommended +# that you do not manually alter this file as it may cause +# unexpected and unsupported behavior. +# +############################################################## +# +# BEGIN Project Options +SET addpads = False +SET asysymbol = True +SET busformat = BusFormatAngleBracketNotRipped +SET createndf = False +SET designentry = vhdl +SET device = xc6slx45 +SET devicefamily = spartan6 +SET flowvendor = ISE +SET formalverification = False +SET foundationsym = False +SET implementationfiletype = Ngc +SET package = csg484 +SET removerpms = False +SET simulationfiles = Structural +SET speedgrade = -2 +SET verilogsim = False +SET vhdlsim = False +# END Project Options +# BEGIN Select +SELECT ICON_(ChipScope_Pro_-_Integrated_Controller) family Xilinx,_Inc. 1.04.a +# END Select +# BEGIN Parameters +CSET component_name=icon +CSET enable_jtag_bufg=true +CSET number_control_ports=2 +CSET use_ext_bscan=false +CSET use_softbscan=false +CSET use_unused_bscan=false +CSET user_scan_chain=USER1 +# END Parameters +GENERATE +# CRC: 7da1f376 + Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/ipcore_dir/mem0/user_design/par/vio_coregen.xco =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/ipcore_dir/mem0/user_design/par/vio_coregen.xco (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/ipcore_dir/mem0/user_design/par/vio_coregen.xco (revision 6) @@ -0,0 +1,51 @@ +############################################################## +# +# Xilinx Core Generator version 11.2 +# Date: Fri Jun 12 05:42:56 2009 +# +############################################################## +# +# This file contains the customisation parameters for a +# Xilinx CORE Generator IP GUI. It is strongly recommended +# that you do not manually alter this file as it may cause +# unexpected and unsupported behavior. +# +############################################################## +# +# BEGIN Project Options +SET addpads = False +SET asysymbol = False +SET busformat = BusFormatAngleBracketNotRipped +SET createndf = False +SET designentry = vhdl +SET device = xc6slx45 +SET devicefamily = spartan6 +SET flowvendor = ISE +SET formalverification = False +SET foundationsym = False +SET implementationfiletype = Ngc +SET package = csg484 +SET removerpms = False +SET simulationfiles = Structural +SET speedgrade = -2 +SET verilogsim = False +SET vhdlsim = False +# END Project Options +# BEGIN Select +SELECT VIO_(ChipScope_Pro_-_Virtual_Input/Output) family Xilinx,_Inc. 1.03.a +# END Select +# BEGIN Parameters +CSET asynchronous_input_port_width=8 +CSET asynchronous_output_port_width=7 +CSET component_name=vio +CSET enable_asynchronous_input_port=false +CSET enable_asynchronous_output_port=true +CSET enable_synchronous_input_port=false +CSET enable_synchronous_output_port=false +CSET invert_clock_input=false +CSET synchronous_input_port_width=8 +CSET synchronous_output_port_width=8 +# END Parameters +GENERATE +# CRC: 66fe39ed + Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/ipcore_dir/mem0/user_design/par/create_ise.sh =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/ipcore_dir/mem0/user_design/par/create_ise.sh (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/ipcore_dir/mem0/user_design/par/create_ise.sh (revision 6) @@ -0,0 +1,72 @@ +#!/bin/csh -f +#***************************************************************************** +# (c) Copyright 2009 Xilinx, Inc. All rights reserved. +# +# This file contains confidential and proprietary information +# of Xilinx, Inc. and is protected under U.S. and +# international copyright and other intellectual property +# laws. +# +# DISCLAIMER +# This disclaimer is not a license and does not grant any +# rights to the materials distributed herewith. Except as +# otherwise provided in a valid license issued to you by +# Xilinx, and to the maximum extent permitted by applicable +# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +# (2) Xilinx shall not be liable (whether in contract or tort, +# including negligence, or under any other theory of +# liability) for any loss or damage of any kind or nature +# related to, arising under or in connection with these +# materials, including for any direct, or any indirect, +# special, incidental, or consequential loss or damage +# (including loss of data, profits, goodwill, or any type of +# loss or damage suffered as a result of any action brought +# by a third party) even if such damage or loss was +# reasonably foreseeable or Xilinx had been advised of the +# possibility of the same. +# +# CRITICAL APPLICATIONS +# Xilinx products are not designed or intended to be fail- +# safe, or for use in any application requiring fail-safe +# performance, such as life-support or safety devices or +# systems, Class III medical devices, nuclear facilities, +# applications related to the deployment of airbags, or any +# other applications that could lead to death, personal +# injury, or severe property or environmental damage +# (individually and collectively, "Critical +# Applications"). Customer assumes the sole risk and +# liability of any use of Xilinx products in Critical +# Applications, subject only to applicable laws and +# regulations governing limitations on product liability. +# +# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +# PART OF THIS FILE AT ALL TIMES. +# +# **************************************************************************** +# ____ ____ +# / /\/ / +# /___/ \ / Vendor : Xilinx +# \ \ \/ Version : 3.5 +# \ \ Application : MIG +# / / Filename : create_ise.bat +# /___/ /\ Date Last Modified : $Date: 2010/03/21 17:21:12 $ +# \ \ / \ Date Created : Fri Feb 06 2009 +# \___\/\___\ +# +# Device : Spartan-6 +# Design Name : DDR/DDR2/DDR3/LPDDR +# Purpose : Batch file to run PAR through ISE +# Reference : +# Revision History : +# **************************************************************************** + +./rem_files.sh + + + + +xtclsh set_ise_prop.tcl
usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/ipcore_dir/mem0/user_design/par/create_ise.sh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/ipcore_dir/mem0/user_design/par/rem_files.sh =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/ipcore_dir/mem0/user_design/par/rem_files.sh (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/ipcore_dir/mem0/user_design/par/rem_files.sh (revision 6) @@ -0,0 +1,169 @@ +##!/bin/csh -f +##**************************************************************************** +## (c) Copyright 2009 Xilinx, Inc. All rights reserved. +## +## This file contains confidential and proprietary information +## of Xilinx, Inc. and is protected under U.S. and +## international copyright and other intellectual property +## laws. +## +## DISCLAIMER +## This disclaimer is not a license and does not grant any +## rights to the materials distributed herewith. Except as +## otherwise provided in a valid license issued to you by +## Xilinx, and to the maximum extent permitted by applicable +## law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND +## WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES +## AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING +## BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- +## INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and +## (2) Xilinx shall not be liable (whether in contract or tort, +## including negligence, or under any other theory of +## liability) for any loss or damage of any kind or nature +## related to, arising under or in connection with these +## materials, including for any direct, or any indirect, +## special, incidental, or consequential loss or damage +## (including loss of data, profits, goodwill, or any type of +## loss or damage suffered as a result of any action brought +## by a third party) even if such damage or loss was +## reasonably foreseeable or Xilinx had been advised of the +## possibility of the same. +## +## CRITICAL APPLICATIONS +## Xilinx products are not designed or intended to be fail- +## safe, or for use in any application requiring fail-safe +## performance, such as life-support or safety devices or +## systems, Class III medical devices, nuclear facilities, +## applications related to the deployment of airbags, or any +## other applications that could lead to death, personal +## injury, or severe property or environmental damage +## (individually and collectively, "Critical +## Applications"). Customer assumes the sole risk and +## liability of any use of Xilinx products in Critical +## Applications, subject only to applicable laws and +## regulations governing limitations on product liability. +## +## THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS +## PART OF THIS FILE AT ALL TIMES. +## +##**************************************************************************** +## ____ ____ +## / /\/ / +## /___/ \ / Vendor : Xilinx +## \ \ \/ Version : 3.5 +## \ \ Application : MIG +## / / Filename : rem_files.bat +## /___/ /\ Date Last Modified : $Date: 2010/05/21 10:07:50 $ +## \ \ / \ Date Created : Fri Feb 06 2009 +## \___\/\___\ +## +## Device : Spartan-6 +## Design Name : DDR/DDR2/DDR3/LPDDR +## Purpose : Batch file to remove files generated from ISE +## Reference : +## Revision History : +##**************************************************************************** + +rm -rf "../synth/__projnav" +rm -rf "../synth/xst" +rm -rf "../synth/_ngo" + +rm -rf tmp +rm -rf _xmsgs +rm -rf ila_xdb +rm -rf icon_xdb +rm -rf vio_xdb + +rm -rf xlnx_auto_0_xdb + +rm -rf vio_xmdf.tcl +rm -rf vio_readme.txt +rm -rf vio_flist.txt +rm -rf vio.xise del +rm -rf vio.xco del +rm -rf vio.ngc del +rm -rf vio.ise del +rm -rf vio.gise del +rm -rf vio.cdc del + +rm -rf coregen.cgp +rm -rf coregen.cgc +rm -rf coregen.log +rm -rf ila.cdc +rm -rf ila.gise +rm -rf ila.ise +rm -rf ila.ngc +rm -rf ila.xco +rm -rf ila.xise +rm -rf ila_flist.txt +rm -rf ila_readme.txt +rm -rf ila_xmdf.tcl + +rm -rf icon.asy +rm -rf icon.gise +rm -rf icon.ise +rm -rf icon.ncf +rm -rf icon.ngc +rm -rf icon.xco +rm -rf icon.xise +rm -rf icon_flist.txt +rm -rf icon_readme.txt +rm -rf icon_xmdf.tcl + +rm -rf ise_flow_results.txt +rm -rf mem0_vhdl.prj +rm -rf mem_interface_top.syr +rm -rf mem0.ngc +rm -rf mem0.ngr +rm -rf mem0_xst.xrpt +rm -rf mem0.bld +rm -rf mem0.ngd +rm -rf mem0_ngdbuild.xrpt +rm -rf mem0_map.map +rm -rf mem0_map.mrp +rm -rf mem0_map.ngm +rm -rf mem0.pcf +rm -rf mem0_map.ncd +rm -rf mem0_map.xrpt +rm -rf mem0_summary.xml +rm -rf mem0_usage.xml +rm -rf mem0.ncd +rm -rf mem0.par +rm -rf mem0.xpi +rm -rf mem0.ptwx +rm -rf mem0.pad +rm -rf mem0.unroutes +rm -rf mem0_pad.csv +rm -rf mem0_pad.txt +rm -rf mem0_par.xrpt +rm -rf mem0.twx +rm -rf mem0.bgn +rm -rf mem0.twr +rm -rf mem0.drc +rm -rf mem0_bitgen.xwbt +rm -rf mem0.bit + +# Files and folders generated by create ise +rm -rf test_xdb +rm -rf _xmsgs +rm -rf test.gise +rm -rf test.xise +rm -rf test.xise + +# Files and folders generated by ISE through GUI mode +rm -rf _ngo +rm -rf xst +rm -rf mem0.lso +rm -rf mem0.prj +rm -rf mem0.xst +rm -rf mem0.stx +rm -rf mem0_prev_built.ngd +rm -rf test.ntrc_log +rm -rf mem0_guide.ncd +rm -rf mem0.cmd_log +rm -rf mem0_summary.html +rm -rf mem0.ut +rm -rf par_usage_statistics.html +rm -rf usage_statistics_webtalk.html +rm -rf webtalk.log +rm -rf device_usage_statistics.html
usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/ipcore_dir/mem0/user_design/par/rem_files.sh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/ipcore_dir/mem0/user_design/synth/mem0.prj =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/ipcore_dir/mem0/user_design/synth/mem0.prj (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/ipcore_dir/mem0/user_design/synth/mem0.prj (revision 6) @@ -0,0 +1,8 @@ +vhdl work ../rtl/iodrp_controller.vhd +vhdl work ../rtl/iodrp_mcb_controller.vhd +vhdl work ../rtl/mcb_raw_wrapper.vhd +vhdl work ../rtl/mcb_soft_calibration.vhd +vhdl work ../rtl/mcb_soft_calibration_top.vhd +vhdl work ../rtl/mem0.vhd +vhdl work ../rtl/memc3_infrastructure.vhd +vhdl work ../rtl/memc3_wrapper.vhd Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/ipcore_dir/mem0/user_design/mig.prj =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/ipcore_dir/mem0/user_design/mig.prj (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/ipcore_dir/mem0/user_design/mig.prj (revision 6) @@ -0,0 +1,60 @@ + + + mem0 + xc6slx45-csg484/-2 + 3.5 + + DDR2_SDRAM/Components/MT47H64M16XX-25E + 2500 + 1 + 1 + FALSE + + 13 + 10 + 3 + + + + 4(010) + 5 + Enable-Normal + Fullstrength + RTT Disabled + 0 + OCD Exit + Enable + Disable + Enable + Disable + Class II + Class II + CALIB_TERM + 25 Ohms + + + + 1 + Disable + Single-Ended + Two 32-bit bi-directional and four 32-bit unidirectional ports + AA2 + Y2 + Port0,Port1,Port2,Port3,Port4,Port5 + Bi-directional,Bi-directional,Write,Read,Write,Read + ROW_BANK_COLUMN + Round Robin + 012345 + 123450 + 234501 + 345012 + 450123 + 501234 + 012345 + 123450 + 234501 + 345012 + 450123 + 501234 + + Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/ipcore_dir/mem0/user_design/clean.sh =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/ipcore_dir/mem0/user_design/clean.sh (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/ipcore_dir/mem0/user_design/clean.sh (revision 6) @@ -0,0 +1,85 @@ +#!/bin/bash + +# This files / directories from this directory will not be removed +# Filenames with spaces or other spuid characters will be ignored +sourcefiles="*.sh *.prj" +subdirs="par rtl synth" + +# This sould not be edited. +list_files() { + if [ "$2" != "" ]; then + echo "$1" + for i in $2; do + echo " $i" + done + fi +} + +rmfiles="" +rmdirs="" +keepfiles="" +keepdirs="" +allfiles=`ls -A` +for f in $allfiles; do + keep=false + for i in $sourcefiles; do + if [ "$i" == "$f" ]; then + keep=true + fi + done + for i in $subdirs; do + if [ "$i" == "$f" ]; then + keep=true + fi + done + for i in $binfiles; do # binfiles is set by distclean.sh + if [ "$i" == "$f" ]; then + keep=false + fi + done + if [ -d "$f" ]; then + if $keep; then + keepdirs+=" $f" + else + rmdirs+=" $f" + fi + fi + if [ -f "$f" ]; then + if $keep; then + keepfiles+=" $f" + else + rmfiles+=" $f" + fi + fi +done + + +echo +echo "Directory $PWD:" +list_files "This directories will NOT be removed:" "$keepdirs" +list_files "This files will NOT be removed:" "$keepfiles" +list_files "This directories will be removed:" "$rmdirs" +list_files "This files will be removed:" "$rmfiles" + +if [ "$rmfiles" == "" -a "$rmdirs" == "" ]; then + c="yes" +else + echo -n 'Confirm this by entering "yes": ' + read c +fi + +if [ "$c" == "yes" ]; then + [ "$rmfiles" != "" ] && rm $rmfiles + [ "$rmdirs" != "" ] && rm -r $rmdirs + + for d in $subdirs; do + if [ -x "$d/clean.sh" ]; then + cd $d + ./clean.sh || exit 1 + cd .. + fi + done + + exit 0 +fi +exit 1
usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/ipcore_dir/mem0/user_design/clean.sh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/ipcore_dir/mem0/clean.sh =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/ipcore_dir/mem0/clean.sh (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/ipcore_dir/mem0/clean.sh (revision 6) @@ -0,0 +1,86 @@ +#!/bin/bash + +# This files / directories from this directory will not be removed +# Filenames with spaces or other spuid characters will be ignored +sourcefiles="*.sh" +subdirs="user_design" + + +# This sould not be edited. +list_files() { + if [ "$2" != "" ]; then + echo "$1" + for i in $2; do + echo " $i" + done + fi +} + +rmfiles="" +rmdirs="" +keepfiles="" +keepdirs="" +allfiles=`ls -A` +for f in $allfiles; do + keep=false + for i in $sourcefiles; do + if [ "$i" == "$f" ]; then + keep=true + fi + done + for i in $subdirs; do + if [ "$i" == "$f" ]; then + keep=true + fi + done + for i in $binfiles; do # binfiles is set by distclean.sh + if [ "$i" == "$f" ]; then + keep=false + fi + done + if [ -d "$f" ]; then + if $keep; then + keepdirs+=" $f" + else + rmdirs+=" $f" + fi + fi + if [ -f "$f" ]; then + if $keep; then + keepfiles+=" $f" + else + rmfiles+=" $f" + fi + fi +done + + +echo +echo "Directory $PWD:" +list_files "This directories will NOT be removed:" "$keepdirs" +list_files "This files will NOT be removed:" "$keepfiles" +list_files "This directories will be removed:" "$rmdirs" +list_files "This files will be removed:" "$rmfiles" + +if [ "$rmfiles" == "" -a "$rmdirs" == "" ]; then + c="yes" +else + echo -n 'Confirm this by entering "yes": ' + read c +fi + +if [ "$c" == "yes" ]; then + [ "$rmfiles" != "" ] && rm $rmfiles + [ "$rmdirs" != "" ] && rm -r $rmdirs + + for d in $subdirs; do + if [ -x "$d/clean.sh" ]; then + cd $d + ./clean.sh || exit 1 + cd .. + fi + done + + exit 0 +fi +exit 1
usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/ipcore_dir/mem0/clean.sh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/memtest.xise =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/memtest.xise (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/memtest.xise (revision 6) @@ -0,0 +1,481 @@ + + + +
+ + + + + + + + +
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/memtest.ucf =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/memtest.ucf (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/memtest.ucf (revision 6) @@ -0,0 +1,159 @@ +NET "FXCLK" TNM_NET = "FXCLK"; +TIMESPEC "TS_FXCLK" = PERIOD "FXCLK" 20.83333 ns HIGH 50 %; +NET "FXCLK" LOC = "L22" | IOSTANDARD = LVCMOS33 ; + +NET "IFCLK" TNM_NET = "IFCLK"; +TIMESPEC "TS_IFCLK" = PERIOD "IFCLK" 20 ns HIGH 50 %; +NET "IFCLK" LOC = "K20" | IOSTANDARD = LVCMOS33 ; + +NET "CLK" TNM_NET = "CLK"; +TIMESPEC "TS_CLK_IFCLK" = FROM "CLK" TO "IFCLK" 3ns DATAPATHONLY; +TIMESPEC "TS_IFCLK_CLK" = FROM "IFCLK" TO "CLK" 3ns DATAPATHONLY; + +NET "SLOE" LOC = "U15" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # PA2 +NET "FIFOADR0" LOC = "W17" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # PA4 +NET "FIFOADR1" LOC = "Y18" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # PA5 +NET "PKTEND" LOC = "AB5" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # PA6 +NET "RESET_IN" LOC = "AB17" | IOSTANDARD = LVCMOS33 ; # PA7 + +NET "PC0" LOC = "G20" | IOSTANDARD = LVCMOS33 ; + +NET "fd<0>" LOC = "Y17" | IOSTANDARD = LVCMOS33 ; +NET "fd<1>" LOC = "V13" | IOSTANDARD = LVCMOS33 ; +NET "fd<2>" LOC = "W13" | IOSTANDARD = LVCMOS33 ; +NET "fd<3>" LOC = "AA8" | IOSTANDARD = LVCMOS33 ; +NET "fd<4>" LOC = "AB8" | IOSTANDARD = LVCMOS33 ; +NET "fd<5>" LOC = "W6" | IOSTANDARD = LVCMOS33 ; +NET "fd<6>" LOC = "Y6" | IOSTANDARD = LVCMOS33 ; +NET "fd<7>" LOC = "Y9" | IOSTANDARD = LVCMOS33 ; +NET "fd<8>" LOC = "V21" | IOSTANDARD = LVCMOS33 ; +NET "fd<9>" LOC = "V22" | IOSTANDARD = LVCMOS33 ; +NET "fd<10>" LOC = "U20" | IOSTANDARD = LVCMOS33 ; +NET "fd<11>" LOC = "U22" | IOSTANDARD = LVCMOS33 ; +NET "fd<12>" LOC = "R20" | IOSTANDARD = LVCMOS33 ; +NET "fd<13>" LOC = "R22" | IOSTANDARD = LVCMOS33 ; +NET "fd<14>" LOC = "P18" | IOSTANDARD = LVCMOS33 ; +NET "fd<15>" LOC = "P19" | IOSTANDARD = LVCMOS33 ; + +NET "FLAGB" LOC = "F19" | IOSTANDARD = LVCMOS33 ; + +NET "SLRD" LOC = "N22" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "SLWR" LOC = "M22" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; + + +############################################################################ +# VCC AUX VOLTAGE +############################################################################ +CONFIG VCCAUX=2.5; + +############################################################################ +## Memory Controller 3 +## Memory Device: DDR_SDRAM->MT46V32M16XX-5B-IT +## Frequency: 200 MHz +## Time Period: 5000 ps +## Supported Part Numbers: MT46V32M16BN-5B-IT +############################################################################ +CONFIG MCB_PERFORMANCE= EXTENDED; + +############################################################################ +## I/O TERMINATION +############################################################################ +#NET "mcb3_dram_dq[*]" IN_TERM = UNTUNED_SPLIT_50; +#NET "mcb3_dram_dqs" IN_TERM = UNTUNED_SPLIT_50; +#NET "mcb3_dram_dqs_n" IN_TERM = UNTUNED_SPLIT_50; +#NET "mcb3_dram_udqs" IN_TERM = UNTUNED_SPLIT_50; +#NET "mcb3_dram_udqs_n" IN_TERM = UNTUNED_SPLIT_50; +NET "mcb3_dram_dq[*]" IN_TERM = NONE; +NET "mcb3_dram_dqs" IN_TERM = NONE; +NET "mcb3_dram_dqs_n" IN_TERM = NONE; +NET "mcb3_dram_udqs" IN_TERM = NONE; +NET "mcb3_dram_udqs_n" IN_TERM = NONE; + +#NET "mcb3_dram_dq[*]" OUT_TERM = UNTUNED_50; +NET "mcb3_dram_a[*]" OUT_TERM = UNTUNED_50; +NET "mcb3_dram_ba[*]" OUT_TERM = UNTUNED_50; +NET "mcb3_dram_ck" OUT_TERM = UNTUNED_50; +NET "mcb3_dram_ck_n" OUT_TERM = UNTUNED_50; +NET "mcb3_dram_cke" OUT_TERM = UNTUNED_50; +NET "mcb3_dram_ras_n" OUT_TERM = UNTUNED_50; +NET "mcb3_dram_cas_n" OUT_TERM = UNTUNED_50; +NET "mcb3_dram_we_n" OUT_TERM = UNTUNED_50; +#NET "mcb3_dram_odt" OUT_TERM = UNTUNED_50; +NET "mcb3_dram_dm" OUT_TERM = UNTUNED_50; +NET "mcb3_dram_udm" OUT_TERM = UNTUNED_50; + +############################################################################ +# I/O STANDARDS +############################################################################ +NET "mcb3_dram_dq[*]" IOSTANDARD = SSTL18_II; +NET "mcb3_dram_a[*]" IOSTANDARD = SSTL18_II; +NET "mcb3_dram_ba[*]" IOSTANDARD = SSTL18_II; +NET "mcb3_dram_dqs" IOSTANDARD = DIFF_SSTL18_II; +NET "mcb3_dram_udqs" IOSTANDARD = DIFF_SSTL18_II; +NET "mcb3_dram_dqs_n" IOSTANDARD = DIFF_SSTL18_II; +NET "mcb3_dram_udqs_n" IOSTANDARD = DIFF_SSTL18_II; +NET "mcb3_dram_ck" IOSTANDARD = DIFF_SSTL18_II; +NET "mcb3_dram_ck_n" IOSTANDARD = DIFF_SSTL18_II; +NET "mcb3_dram_cke" IOSTANDARD = SSTL18_II; +NET "mcb3_dram_ras_n" IOSTANDARD = SSTL18_II; +NET "mcb3_dram_cas_n" IOSTANDARD = SSTL18_II; +NET "mcb3_dram_we_n" IOSTANDARD = SSTL18_II; +#NET "mcb3_dram_odt" IOSTANDARD = SSTL18_II; +NET "mcb3_dram_dm" IOSTANDARD = SSTL18_II; +NET "mcb3_dram_udm" IOSTANDARD = SSTL18_II; +NET "mcb3_rzq" IOSTANDARD = SSTL18_II; +NET "mcb3_zio" IOSTANDARD = SSTL18_II; + +############################################################################ +# MCB 3 +# Pin Location Constraints for Clock, Masks, Address, and Controls +############################################################################ +NET "mcb3_dram_a[0]" LOC = "M5" ; +NET "mcb3_dram_a[10]" LOC = "K6" ; +NET "mcb3_dram_a[11]" LOC = "B1" ; +NET "mcb3_dram_a[12]" LOC = "J4" ; +NET "mcb3_dram_a[1]" LOC = "L4" ; +NET "mcb3_dram_a[2]" LOC = "K3" ; +NET "mcb3_dram_a[3]" LOC = "M4" ; +NET "mcb3_dram_a[4]" LOC = "K5" ; +NET "mcb3_dram_a[5]" LOC = "G3" ; +NET "mcb3_dram_a[6]" LOC = "G1" ; +NET "mcb3_dram_a[7]" LOC = "K4" ; +NET "mcb3_dram_a[8]" LOC = "C3" ; +NET "mcb3_dram_a[9]" LOC = "C1" ; +NET "mcb3_dram_ba[0]" LOC = "E3" ; +NET "mcb3_dram_ba[1]" LOC = "E1" ; +NET "mcb3_dram_ba[2]" LOC = "D1" ; +NET "mcb3_dram_cas_n" LOC = "P3" ; +NET "mcb3_dram_ck" LOC = "F2" ; +NET "mcb3_dram_ck_n" LOC = "F1" ; +NET "mcb3_dram_cke" LOC = "J6" ; +NET "mcb3_dram_dm" LOC = "H1" ; +NET "mcb3_dram_dq[0]" LOC = "N3" ; +NET "mcb3_dram_dq[10]" LOC = "R3" ; +NET "mcb3_dram_dq[11]" LOC = "R1" ; +NET "mcb3_dram_dq[12]" LOC = "U3" ; +NET "mcb3_dram_dq[13]" LOC = "U1" ; +NET "mcb3_dram_dq[14]" LOC = "V2" ; +NET "mcb3_dram_dq[15]" LOC = "V1" ; +NET "mcb3_dram_dq[1]" LOC = "N1" ; +NET "mcb3_dram_dq[2]" LOC = "M2" ; +NET "mcb3_dram_dq[3]" LOC = "M1" ; +NET "mcb3_dram_dq[4]" LOC = "J3" ; +NET "mcb3_dram_dq[5]" LOC = "J1" ; +NET "mcb3_dram_dq[6]" LOC = "K2" ; +NET "mcb3_dram_dq[7]" LOC = "K1" ; +NET "mcb3_dram_dq[8]" LOC = "P2" ; +NET "mcb3_dram_dq[9]" LOC = "P1" ; +NET "mcb3_dram_dqs" LOC = "L3" ; +NET "mcb3_dram_dqs_n" LOC = "L1" ; +#NET "mcb3_dram_odt" LOC = "M3" ; +NET "mcb3_dram_ras_n" LOC = "N4" ; +NET "mcb3_dram_udm" LOC = "H2" ; +NET "mcb3_dram_udqs" LOC = "T2" ; +NET "mcb3_dram_udqs_n" LOC = "T1" ; +NET "mcb3_dram_we_n" LOC = "D2" ; + +# The following pins are available for used as RZQ or ZIO pins# +NET "mcb3_rzq" LOC = "AA2" ; +NET "mcb3_zio" LOC = "Y2" ; Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/clean.sh =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/clean.sh (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/clean.sh (revision 6) @@ -0,0 +1,80 @@ +#!/bin/bash + +# This files / directories from this directory will not be removed +# Filenames with spaces or other spuid characters will be ignored +sourcefiles="*.vhd *.ucf *.sh *.ise *.bit *.bin *.xise" +subdirs="ipcore_dir" + + +# This sould not be edited. +list_files() { + if [ "$2" != "" ]; then + echo "$1" + for i in $2; do + echo " $i" + done + fi +} + +rmfiles="" +rmdirs="" +keepfiles="" +keepdirs="" +allfiles=`ls -A` +for f in $allfiles; do + keep=false + for i in $sourcefiles; do + if [ "$i" == "$f" ]; then + keep=true + fi + done + for i in $subdirs; do + if [ "$i" == "$f" ]; then + keep=true + fi + done + if [ -d "$f" ]; then + if $keep; then + keepdirs+=" $f" + else + rmdirs+=" $f" + fi + fi + if [ -f "$f" ]; then + if $keep; then + keepfiles+=" $f" + else + rmfiles+=" $f" + fi + fi +done + +echo +echo "Directory $PWD:" +list_files "This directories will NOT be removed:" "$keepdirs" +list_files "This files will NOT be removed:" "$keepfiles" +list_files "This directories will be removed:" "$rmdirs" +list_files "This files will be removed:" "$rmfiles" + +if [ "$rmfiles" == "" -a "$rmdirs" == "" ]; then + c="yes" +else + echo -n 'Confirm this by entering "yes": ' + read c +fi + +if [ "$c" == "yes" ]; then + [ "$rmfiles" != "" ] && rm $rmfiles + [ "$rmdirs" != "" ] && rm -r $rmdirs + + for d in $subdirs; do + if [ -x "$d/clean.sh" ]; then + cd $d + ./clean.sh || exit 1 + cd .. + fi + done + + exit 0 +fi +exit 1
usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/clean.sh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/memtest.vhd =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/memtest.vhd (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/fpga/memtest.vhd (revision 6) @@ -0,0 +1,634 @@ +library ieee; +use IEEE.std_logic_1164.all; +use IEEE.std_logic_arith.all; +use IEEE.std_logic_unsigned.all; +Library UNISIM; +use UNISIM.vcomponents.all; + +entity memtest is + port( + FXCLK : in std_logic; + RESET_IN : in std_logic; + IFCLK : in std_logic; + PC0 : in std_logic; + + -- FX2 FIFO + FD : out std_logic_vector(15 downto 0); + + SLOE : out std_logic; + SLRD : out std_logic; + SLWR : out std_logic; + FIFOADR0 : out std_logic; + FIFOADR1 : out std_logic; + PKTEND : out std_logic; + + FLAGB : in std_logic; + + -- DDR-SDRAM + mcb3_dram_dq : inout std_logic_vector(15 downto 0); + mcb3_rzq : inout std_logic; + mcb3_zio : inout std_logic; + mcb3_dram_udqs : inout std_logic; + mcb3_dram_udqs_n : inout std_logic; + mcb3_dram_dqs : inout std_logic; + mcb3_dram_dqs_n : inout std_logic; + mcb3_dram_a : out std_logic_vector(12 downto 0); + mcb3_dram_ba : out std_logic_vector(2 downto 0); + mcb3_dram_cke : out std_logic; + mcb3_dram_ras_n : out std_logic; + mcb3_dram_cas_n : out std_logic; + mcb3_dram_we_n : out std_logic; +-- mcb3_dram_odt : out std_logic; + mcb3_dram_dm : out std_logic; + mcb3_dram_udm : out std_logic; + mcb3_dram_ck : out std_logic; + mcb3_dram_ck_n : out std_logic + ); +end memtest; + + +architecture RTL of memtest is + +component mem0 + generic ( + C3_P0_MASK_SIZE : integer := 4; + C3_P0_DATA_PORT_SIZE : integer := 32; + C3_P1_MASK_SIZE : integer := 4; + C3_P1_DATA_PORT_SIZE : integer := 32; + C3_MEMCLK_PERIOD : integer := 2500; + C3_INPUT_CLK_TYPE : string := "SINGLE_ENDED"; + C3_RST_ACT_LOW : integer := 0; + C3_CALIB_SOFT_IP : string := "FALSE"; + C3_MEM_ADDR_ORDER : string := "ROW_BANK_COLUMN"; + C3_NUM_DQ_PINS : integer := 16; + C3_MEM_ADDR_WIDTH : integer := 13; + C3_MEM_BANKADDR_WIDTH : integer := 3 + ); + + port ( + mcb3_dram_dq : inout std_logic_vector(C3_NUM_DQ_PINS-1 downto 0); + mcb3_dram_a : out std_logic_vector(C3_MEM_ADDR_WIDTH-1 downto 0); + mcb3_dram_ba : out std_logic_vector(C3_MEM_BANKADDR_WIDTH-1 downto 0); + mcb3_dram_cke : out std_logic; + mcb3_dram_ras_n : out std_logic; + mcb3_dram_cas_n : out std_logic; + mcb3_dram_we_n : out std_logic; + mcb3_dram_dm : out std_logic; + mcb3_dram_udqs : inout std_logic; + mcb3_dram_udqs_n : inout std_logic; + mcb3_rzq : inout std_logic; + mcb3_zio : inout std_logic; + mcb3_dram_udm : out std_logic; + mcb3_dram_dqs : inout std_logic; + mcb3_dram_dqs_n : inout std_logic; + mcb3_dram_ck : out std_logic; + mcb3_dram_ck_n : out std_logic; +-- mcb3_dram_odt : out std_logic; + + c3_sys_clk : in std_logic; + c3_sys_rst_n : in std_logic; + + c3_calib_done : out std_logic; + c3_clk0 : out std_logic; + c3_rst0 : out std_logic; + + c3_p0_cmd_clk : in std_logic; + c3_p0_cmd_en : in std_logic; + c3_p0_cmd_instr : in std_logic_vector(2 downto 0); + c3_p0_cmd_bl : in std_logic_vector(5 downto 0); + c3_p0_cmd_byte_addr : in std_logic_vector(29 downto 0); + c3_p0_cmd_empty : out std_logic; + c3_p0_cmd_full : out std_logic; + c3_p0_wr_clk : in std_logic; + c3_p0_wr_en : in std_logic; + c3_p0_wr_mask : in std_logic_vector(C3_P0_MASK_SIZE - 1 downto 0); + c3_p0_wr_data : in std_logic_vector(C3_P0_DATA_PORT_SIZE - 1 downto 0); + c3_p0_wr_full : out std_logic; + c3_p0_wr_empty : out std_logic; + c3_p0_wr_count : out std_logic_vector(6 downto 0); + c3_p0_wr_underrun : out std_logic; + c3_p0_wr_error : out std_logic; + c3_p0_rd_clk : in std_logic; + c3_p0_rd_en : in std_logic; + c3_p0_rd_data : out std_logic_vector(C3_P0_DATA_PORT_SIZE - 1 downto 0); + c3_p0_rd_full : out std_logic; + c3_p0_rd_empty : out std_logic; + c3_p0_rd_count : out std_logic_vector(6 downto 0); + c3_p0_rd_overflow : out std_logic; + c3_p0_rd_error : out std_logic; + + c3_p1_cmd_clk : in std_logic; + c3_p1_cmd_en : in std_logic; + c3_p1_cmd_instr : in std_logic_vector(2 downto 0); + c3_p1_cmd_bl : in std_logic_vector(5 downto 0); + c3_p1_cmd_byte_addr : in std_logic_vector(29 downto 0); + c3_p1_cmd_empty : out std_logic; + c3_p1_cmd_full : out std_logic; + c3_p1_wr_clk : in std_logic; + c3_p1_wr_en : in std_logic; + c3_p1_wr_mask : in std_logic_vector(C3_P1_MASK_SIZE - 1 downto 0); + c3_p1_wr_data : in std_logic_vector(C3_P1_DATA_PORT_SIZE - 1 downto 0); + c3_p1_wr_full : out std_logic; + c3_p1_wr_empty : out std_logic; + c3_p1_wr_count : out std_logic_vector(6 downto 0); + c3_p1_wr_underrun : out std_logic; + c3_p1_wr_error : out std_logic; + c3_p1_rd_clk : in std_logic; + c3_p1_rd_en : in std_logic; + c3_p1_rd_data : out std_logic_vector(C3_P1_DATA_PORT_SIZE - 1 downto 0); + c3_p1_rd_full : out std_logic; + c3_p1_rd_empty : out std_logic; + c3_p1_rd_count : out std_logic_vector(6 downto 0); + c3_p1_rd_overflow : out std_logic; + c3_p1_rd_error : out std_logic; + + c3_p2_cmd_clk : in std_logic; + c3_p2_cmd_en : in std_logic; + c3_p2_cmd_instr : in std_logic_vector(2 downto 0); + c3_p2_cmd_bl : in std_logic_vector(5 downto 0); + c3_p2_cmd_byte_addr : in std_logic_vector(29 downto 0); + c3_p2_cmd_empty : out std_logic; + c3_p2_cmd_full : out std_logic; + c3_p2_wr_clk : in std_logic; + c3_p2_wr_en : in std_logic; + c3_p2_wr_mask : in std_logic_vector(3 downto 0); + c3_p2_wr_data : in std_logic_vector(31 downto 0); + c3_p2_wr_full : out std_logic; + c3_p2_wr_empty : out std_logic; + c3_p2_wr_count : out std_logic_vector(6 downto 0); + c3_p2_wr_underrun : out std_logic; + c3_p2_wr_error : out std_logic; + + c3_p3_cmd_clk : in std_logic; + c3_p3_cmd_en : in std_logic; + c3_p3_cmd_instr : in std_logic_vector(2 downto 0); + c3_p3_cmd_bl : in std_logic_vector(5 downto 0); + c3_p3_cmd_byte_addr : in std_logic_vector(29 downto 0); + c3_p3_cmd_empty : out std_logic; + c3_p3_cmd_full : out std_logic; + c3_p3_rd_clk : in std_logic; + c3_p3_rd_en : in std_logic; + c3_p3_rd_data : out std_logic_vector(31 downto 0); + c3_p3_rd_full : out std_logic; + c3_p3_rd_empty : out std_logic; + c3_p3_rd_count : out std_logic_vector(6 downto 0); + c3_p3_rd_overflow : out std_logic; + c3_p3_rd_error : out std_logic; + + c3_p4_cmd_clk : in std_logic; + c3_p4_cmd_en : in std_logic; + c3_p4_cmd_instr : in std_logic_vector(2 downto 0); + c3_p4_cmd_bl : in std_logic_vector(5 downto 0); + c3_p4_cmd_byte_addr : in std_logic_vector(29 downto 0); + c3_p4_cmd_empty : out std_logic; + c3_p4_cmd_full : out std_logic; + c3_p4_wr_clk : in std_logic; + c3_p4_wr_en : in std_logic; + c3_p4_wr_mask : in std_logic_vector(3 downto 0); + c3_p4_wr_data : in std_logic_vector(31 downto 0); + c3_p4_wr_full : out std_logic; + c3_p4_wr_empty : out std_logic; + c3_p4_wr_count : out std_logic_vector(6 downto 0); + c3_p4_wr_underrun : out std_logic; + c3_p4_wr_error : out std_logic; + + c3_p5_cmd_clk : in std_logic; + c3_p5_cmd_en : in std_logic; + c3_p5_cmd_instr : in std_logic_vector(2 downto 0); + c3_p5_cmd_bl : in std_logic_vector(5 downto 0); + c3_p5_cmd_byte_addr : in std_logic_vector(29 downto 0); + c3_p5_cmd_empty : out std_logic; + c3_p5_cmd_full : out std_logic; + c3_p5_rd_clk : in std_logic; + c3_p5_rd_en : in std_logic; + c3_p5_rd_data : out std_logic_vector(31 downto 0); + c3_p5_rd_full : out std_logic; + c3_p5_rd_empty : out std_logic; + c3_p5_rd_count : out std_logic_vector(6 downto 0); + c3_p5_rd_overflow : out std_logic; + c3_p5_rd_error : out std_logic +); +end component; + +--attribute optimize : string; +--attribute optimize of counters:entity is "off"; + +signal fxclk_buf : std_logic; +signal CLK : std_logic; +signal RESET0 : std_logic; -- released after dcm0 is ready +signal RESET : std_logic; -- released after MCB is ready + +signal DCM0_LOCKED : std_logic; +--signal DCM0_CLK_VALID : std_logic; + +---------------------------- +-- test pattern generator -- +---------------------------- +signal GEN_CNT : std_logic_vector(29 downto 0); +signal GEN_PATTERN : std_logic_vector(29 downto 0); + +signal FIFO_WORD : std_logic; + +----------------------- +-- memory controller -- +----------------------- +signal MEM_CLK : std_logic; +signal C3_CALIB_DONE : std_logic; +signal C3_RST0 : std_logic; + +--------------- +-- DRAM FIFO -- +--------------- +signal WR_CLK : std_logic; +signal WR_CMD_EN : std_logic_vector(2 downto 0); +type WR_CMD_ADDR_ARRAY is array(2 downto 0) of std_logic_vector(29 downto 0); +signal WR_CMD_ADDR : WR_CMD_ADDR_ARRAY; +signal WR_ADDR : std_logic_vector(18 downto 0); -- in 256 bytes burst blocks +signal WR_EN : std_logic_vector(2 downto 0); +signal WR_EN_TMP : std_logic_vector(2 downto 0); +signal WR_DATA : std_logic_vector(31 downto 0); +signal WR_EMPTY : std_logic_vector(2 downto 0); +signal WR_UNDERRUN : std_logic_vector(2 downto 0); +signal WR_ERROR : std_logic_vector(2 downto 0); +type WR_COUNT_ARRAY is array(2 downto 0) of std_logic_vector(6 downto 0); +signal WR_COUNT : WR_COUNT_ARRAY; +signal WR_PORT : std_logic_vector(1 downto 0); + +signal RD_CLK : std_logic; +signal RD_CMD_EN : std_logic_vector(2 downto 0); +type RD_CMD_ADDR_ARRAY is array(2 downto 0) of std_logic_vector(29 downto 0); +signal RD_CMD_ADDR : WR_CMD_ADDR_ARRAY; +signal RD_ADDR : std_logic_vector(18 downto 0); -- in 256 bytes burst blocks +signal RD_EN : std_logic_vector(2 downto 0); +type RD_DATA_ARRAY is array(2 downto 0) of std_logic_vector(31 downto 0); +signal RD_DATA : RD_DATA_ARRAY; +signal RD_EMPTY : std_logic_vector(2 downto 0); +signal RD_OVERFLOW : std_logic_vector(2 downto 0); +signal RD_ERROR : std_logic_vector(2 downto 0); +signal RD_PORT : std_logic_vector(1 downto 0); +type RD_COUNT_ARRAY is array(2 downto 0) of std_logic_vector(6 downto 0); +signal RD_COUNT : RD_COUNT_ARRAY; + +signal FD_TMP : std_logic_vector(15 downto 0); + +signal RD_ADDR2 : std_logic_vector(18 downto 0); -- 256 bytes burst block currently beeing read +signal RD_ADDR2_BAK1 : std_logic_vector(18 downto 0); -- backup for synchronization +signal RD_ADDR2_BAK2 : std_logic_vector(18 downto 0); -- backup for synchronization +signal WR_ADDR2 : std_logic_vector(18 downto 0); -- 256 bytes burst block currently beeing written +signal WR_ADDR2_BAK1 : std_logic_vector(18 downto 0); -- backup for synchronization +signal WR_ADDR2_BAK2 : std_logic_vector(18 downto 0); -- backup for synchronization + +signal RD_STOP : std_logic; + +begin + + clkin_buf : IBUFG + port map ( + O => FXCLK_BUF, + I => FXCLK + ); + + dcm0 : DCM_CLKGEN + generic map ( + CLKFX_DIVIDE => 3, +-- CLKFX_MULTIPLY => 33, + CLKFX_MULTIPLY => 21, + CLKFXDV_DIVIDE => 8, + SPREAD_SPECTRUM => "NONE", + STARTUP_WAIT => FALSE, + CLKIN_PERIOD => 20.83333, + CLKFX_MD_MAX => 0.000 + ) + port map ( + CLKIN => FXCLK_BUF, + CLKFX => MEM_CLK, + CLKFX180 => open, + CLKFXDV => CLK, + LOCKED => DCM0_LOCKED, + PROGDONE => open, + STATUS => open, + FREEZEDCM => '0', + PROGCLK => '0', + PROGDATA => '0', + PROGEN => '0', + RST => '0' + ); + + inst_mem0 : mem0 port map ( + mcb3_dram_dq => mcb3_dram_dq, + mcb3_dram_a => mcb3_dram_a, + mcb3_dram_ba => mcb3_dram_ba, + mcb3_dram_ras_n => mcb3_dram_ras_n, + mcb3_dram_cas_n => mcb3_dram_cas_n, + mcb3_dram_we_n => mcb3_dram_we_n, +-- mcb3_dram_odt => mcb3_dram_odt, + mcb3_dram_cke => mcb3_dram_cke, + mcb3_dram_ck => mcb3_dram_ck, + mcb3_dram_ck_n => mcb3_dram_ck_n, + mcb3_dram_dqs => mcb3_dram_dqs, + mcb3_dram_dqs_n => mcb3_dram_dqs_n, + mcb3_dram_udqs => mcb3_dram_udqs, -- for X16 parts + mcb3_dram_udqs_n=> mcb3_dram_udqs_n, -- for X16 parts + mcb3_dram_udm => mcb3_dram_udm, -- for X16 parts + mcb3_dram_dm => mcb3_dram_dm, + mcb3_rzq => mcb3_rzq, + mcb3_zio => mcb3_zio, + + c3_sys_clk => MEM_CLK, + c3_sys_rst_n => RESET0, + + c3_clk0 => open, + c3_rst0 => C3_RST0, + c3_calib_done => C3_CALIB_DONE, + + c3_p0_cmd_clk => WR_CLK, + c3_p0_cmd_en => WR_CMD_EN(0), + c3_p0_cmd_instr => "000", + c3_p0_cmd_bl => ( others => '1' ), + c3_p0_cmd_byte_addr => WR_CMD_ADDR(0), + c3_p0_cmd_empty => open, + c3_p0_cmd_full => open, + c3_p0_wr_clk => WR_CLK, + c3_p0_wr_en => WR_EN(0), + c3_p0_wr_mask => ( others => '0' ), + c3_p0_wr_data => WR_DATA, + c3_p0_wr_full => open, + c3_p0_wr_empty => WR_EMPTY(0), + c3_p0_wr_count => open, + c3_p0_wr_underrun => WR_UNDERRUN(0), + c3_p0_wr_error => WR_ERROR(0), + c3_p0_rd_clk => WR_CLK, + c3_p0_rd_en => '0', + c3_p0_rd_data => open, + c3_p0_rd_full => open, + c3_p0_rd_empty => open, + c3_p0_rd_count => open, + c3_p0_rd_overflow => open, + c3_p0_rd_error => open, + + c3_p2_cmd_clk => WR_CLK, + c3_p2_cmd_en => WR_CMD_EN(1), + c3_p2_cmd_instr => "000", + c3_p2_cmd_bl => ( others => '1' ), + c3_p2_cmd_byte_addr => WR_CMD_ADDR(1), + c3_p2_cmd_empty => open, + c3_p2_cmd_full => open, + c3_p2_wr_clk => WR_CLK, + c3_p2_wr_en => WR_EN(1), + c3_p2_wr_mask => ( others => '0' ), + c3_p2_wr_data => WR_DATA, + c3_p2_wr_full => open, + c3_p2_wr_empty => WR_EMPTY(1), + c3_p2_wr_count => open, + c3_p2_wr_underrun => WR_UNDERRUN(1), + c3_p2_wr_error => WR_ERROR(1), + + c3_p4_cmd_clk => WR_CLK, + c3_p4_cmd_en => WR_CMD_EN(2), + c3_p4_cmd_instr => "000", + c3_p4_cmd_bl => ( others => '1' ), + c3_p4_cmd_byte_addr => WR_CMD_ADDR(2), + c3_p4_cmd_empty => open, + c3_p4_cmd_full => open, + c3_p4_wr_clk => WR_CLK, + c3_p4_wr_en => WR_EN(2), + c3_p4_wr_mask => ( others => '0' ), + c3_p4_wr_data => WR_DATA, + c3_p4_wr_full => open, + c3_p4_wr_empty => WR_EMPTY(2), + c3_p4_wr_count => open, + c3_p4_wr_underrun => WR_UNDERRUN(2), + c3_p4_wr_error => WR_ERROR(2), + + c3_p1_cmd_clk => RD_CLK, + c3_p1_cmd_en => RD_CMD_EN(0), + c3_p1_cmd_instr => "001", + c3_p1_cmd_bl => ( others => '1' ), + c3_p1_cmd_byte_addr => RD_CMD_ADDR(0), + c3_p1_cmd_empty => open, + c3_p1_cmd_full => open, + c3_p1_wr_clk => RD_CLK, + c3_p1_wr_en => '0', + c3_p1_wr_mask => ( others => '0' ), + c3_p1_wr_data => ( others => '0' ), + c3_p1_wr_full => open, + c3_p1_wr_empty => open, + c3_p1_wr_count => open, + c3_p1_wr_underrun => open, + c3_p1_wr_error => open, + c3_p1_rd_clk => RD_CLK, + c3_p1_rd_en => RD_EN(0), + c3_p1_rd_data => RD_DATA(0), + c3_p1_rd_full => open, + c3_p1_rd_empty => RD_EMPTY(0), + c3_p1_rd_count => open, + c3_p1_rd_overflow => RD_OVERFLOW(0), + c3_p1_rd_error => RD_ERROR(0), + + c3_p3_cmd_clk => RD_CLK, + c3_p3_cmd_en => RD_CMD_EN(1), + c3_p3_cmd_instr => "001", + c3_p3_cmd_bl => ( others => '1' ), + c3_p3_cmd_byte_addr => RD_CMD_ADDR(1), + c3_p3_cmd_empty => open, + c3_p3_cmd_full => open, + c3_p3_rd_clk => RD_CLK, + c3_p3_rd_en => RD_EN(1), + c3_p3_rd_data => RD_DATA(1), + c3_p3_rd_full => open, + c3_p3_rd_empty => RD_EMPTY(1), + c3_p3_rd_count => open, + c3_p3_rd_overflow => RD_OVERFLOW(1), + c3_p3_rd_error => RD_ERROR(1), + + c3_p5_cmd_clk => RD_CLK, + c3_p5_cmd_en => RD_CMD_EN(2), + c3_p5_cmd_instr => "001", + c3_p5_cmd_bl => ( others => '1' ), + c3_p5_cmd_byte_addr => RD_CMD_ADDR(2), + c3_p5_cmd_empty => open, + c3_p5_cmd_full => open, + c3_p5_rd_clk => RD_CLK, + c3_p5_rd_en => RD_EN(2), + c3_p5_rd_data => RD_DATA(2), + c3_p5_rd_full => open, + c3_p5_rd_empty => RD_EMPTY(2), + c3_p5_rd_count => open, + c3_p5_rd_overflow => RD_OVERFLOW(2), + c3_p5_rd_error => RD_ERROR(2) +); + + SLOE <= '1'; + SLRD <= '1'; + FIFOADR0 <= '0'; + FIFOADR1 <= '0'; + PKTEND <= '1'; + + WR_CLK <= CLK; + RD_CLK <= IFCLK; + + +-- DCM0_CLK_VALID <= ( DCM0_LOCKED and ( not status_internal(2) ) ); +-- RESET0 <= RESET_IN or (not DCM0_LOCKED) or (not DCM0_CLK_VALID); + RESET0 <= RESET_IN or (not DCM0_LOCKED); + RESET <= RESET0 or (not C3_CALIB_DONE) or C3_RST0; + + + dpCLK: process (CLK, RESET) + begin +-- reset + if RESET = '1' + then + GEN_CNT <= ( others => '0' ); + GEN_PATTERN <= "100101010101010101010101010101"; + + WR_CMD_EN <= ( others => '0' ); + WR_CMD_ADDR(0) <= ( others => '0' ); + WR_CMD_ADDR(1) <= ( others => '0' ); + WR_CMD_ADDR(2) <= ( others => '0' ); + WR_ADDR <= conv_std_logic_vector(3,19); + WR_EN <= ( others => '0' ); + WR_COUNT(0) <= ( others => '0' ); + WR_COUNT(1) <= ( others => '0' ); + WR_COUNT(2) <= ( others => '0' ); + WR_PORT <= ( others => '0' ); + + WR_ADDR2 <= ( others => '0' ); + RD_ADDR2_BAK1 <= ( others => '0' ); + RD_ADDR2_BAK2 <= ( others => '0' ); + +-- CLK + elsif CLK'event and CLK = '1' + then + WR_CMD_EN <= ( others => '0' ); + WR_EN <= ( others => '0' ); + WR_CMD_ADDR(conv_integer(WR_PORT))(26 downto 8) <= WR_ADDR; + + if ( WR_COUNT(conv_integer(WR_PORT)) = conv_std_logic_vector(64,7) ) + then + -- FF flag = 1 + if ( RD_ADDR2_BAK1 = RD_ADDR2_BAK2 ) and ( RD_ADDR2_BAK2 /= WR_ADDR ) + then + WR_CMD_EN(conv_integer(WR_PORT)) <= '1'; + WR_COUNT(conv_integer(WR_PORT)) <= ( others => '0' ); + if WR_PORT = "10" + then + WR_PORT <= "00"; + else + WR_PORT <= WR_PORT + 1; + end if; + WR_ADDR <= WR_ADDR + 1; + WR_ADDR2 <= WR_ADDR2 + 1; + end if; + elsif ( WR_COUNT(conv_integer(WR_PORT)) = conv_std_logic_vector(0,7)) and (WR_EMPTY(conv_integer(WR_PORT)) = '0' ) -- write port fifo not empty + then + -- FF flag = 1 + else + WR_EN(conv_integer(WR_PORT)) <= '1'; + WR_DATA(31) <= '1'; + WR_DATA(15) <= '0'; + if PC0 = '1' + then + WR_DATA(30 downto 16) <= GEN_PATTERN(29 downto 15); + WR_DATA(14 downto 0) <= GEN_PATTERN(14 downto 0); + else + WR_DATA(30 downto 16) <= GEN_CNT(29 downto 15); + WR_DATA(14 downto 0) <= GEN_CNT(14 downto 0); + end if; + GEN_CNT <= GEN_CNT + 1; + GEN_PATTERN(29) <= GEN_PATTERN(0); + GEN_PATTERN(28 downto 0) <= GEN_PATTERN(29 downto 1); +-- if ( WR_COUNT(conv_integer(WR_PORT)) = conv_std_logic_vector(63,7) ) and ( RD_ADDR2_BAK1 = RD_ADDR2_BAK2 ) and ( RD_ADDR2_BAK2 /= WR_ADDR ) +-- Add code from above here. This saves one clock cylcle and is required for uninterrupred input. +-- then +-- else + WR_COUNT(conv_integer(WR_PORT)) <= WR_COUNT(conv_integer(WR_PORT)) + 1; +-- end if; + end if; + + RD_ADDR2_BAK1 <= RD_ADDR2; + RD_ADDR2_BAK2 <= RD_ADDR2_BAK1; + + end if; + end process dpCLK; + + + dpIFCLK: process (IFCLK, RESET) + begin +-- reset + if RESET = '1' + then + FIFO_WORD <= '0'; + SLWR <= '1'; + + RD_CMD_EN <= ( others => '0' ); + RD_CMD_ADDR(0) <= ( others => '0' ); + RD_CMD_ADDR(1) <= ( others => '0' ); + RD_CMD_ADDR(2) <= ( others => '0' ); + RD_ADDR <= conv_std_logic_vector(3,19); + RD_EN <= ( others => '0' ); + RD_COUNT(0) <= conv_std_logic_vector(64,7); + RD_COUNT(1) <= conv_std_logic_vector(64,7); + RD_COUNT(2) <= conv_std_logic_vector(64,7); + RD_PORT <= ( others => '0' ); + + RD_ADDR2 <= ( others => '0' ); + WR_ADDR2_BAK1 <= ( others => '0' ); + WR_ADDR2_BAK2 <= ( others => '0' ); + + RD_STOP <= '1'; + +-- IFCLK + elsif IFCLK'event and IFCLK = '1' + then + + RD_CMD_EN <= ( others => '0' ); + RD_CMD_ADDR(conv_integer(RD_PORT))(26 downto 8) <= RD_ADDR; + RD_EN(conv_integer(RD_PORT)) <= '0'; + + if FLAGB = '1' + then + if ( RD_EMPTY(conv_integer(RD_PORT)) = '1' ) or ( RD_COUNT(conv_integer(RD_PORT)) = conv_std_logic_vector(64,7) ) + then + SLWR <= '1'; + if ( RD_COUNT(conv_integer(RD_PORT)) = conv_std_logic_vector(64,7) ) and ( RD_EMPTY(conv_integer(RD_PORT)) = '1' ) and ( WR_ADDR2_BAK2 = WR_ADDR2_BAK1 ) and ( WR_ADDR2_BAK2 /= RD_ADDR ) and ( RD_STOP = '0' ) + then + RD_CMD_EN(conv_integer(RD_PORT)) <= '1'; + RD_COUNT(conv_integer(RD_PORT)) <= ( others => '0' ); + if RD_PORT = "10" + then + RD_PORT <= "00"; + else + RD_PORT <= RD_PORT + 1; + end if; + RD_ADDR <= RD_ADDR + 1; + RD_ADDR2 <= RD_ADDR2 + 1; + end if; + else + SLWR <= '0'; + if FIFO_WORD = '0' + then + FD(15 downto 0) <= RD_DATA(conv_integer(RD_PORT))(15 downto 0); + FD_TMP <= RD_DATA(conv_integer(RD_PORT))(31 downto 16); + RD_EN(conv_integer(RD_PORT)) <= '1'; + else + FD(15 downto 0) <= FD_TMP; + RD_COUNT(conv_integer(RD_PORT)) <= RD_COUNT(conv_integer(RD_PORT)) + 1; + end if; + FIFO_WORD <= not FIFO_WORD; + end if; + end if; + + WR_ADDR2_BAK1 <= WR_ADDR2; + WR_ADDR2_BAK2 <= WR_ADDR2_BAK1; + + if ( WR_ADDR2_BAK1 = WR_ADDR2_BAK2 ) and ( WR_ADDR2_BAK2(3) = '1') + then + RD_STOP <= '0'; + end if; + + end if; + end process dpIFCLK; + +end RTL; + Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/Makefile =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/Makefile (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/Makefile (revision 6) @@ -0,0 +1,27 @@ +######################### +# configuration section # +######################### + +# Defines the location of the EZ-USB SDK +ZTEXPREFIX=../../../.. + +# The name of the jar archive +JARTARGET=MemTest.jar +# Java Classes that have to be build +CLASSTARGETS=MemTest.class +# Extra dependencies for Java Classes +CLASSEXTRADEPS= + +# ihx files (firmware ROM files) that have to be build +IHXTARGETS=memtest.ihx +# Extra Dependencies for ihx files +IHXEXTRADEPS= + +# Extra files that should be included into th jar archive +EXTRAJARFILES=memtest.ihx fpga/memtest.bit + +################################ +# DO NOT CHANAGE THE FOLLOWING # +################################ +# includes the main Makefile +include $(ZTEXPREFIX)/Makefile.mk Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/Readme =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/Readme (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/Readme (revision 6) @@ -0,0 +1,12 @@ +memtest +------- + +This example implements a FIFO using DDR2 SDRAM. + +The input data is generated by a test pattern generator and is written +continuously to the SDRAM FIFO. This FIFO is read out continuously and +the data is written to the EZ-USB using the slave FIFO interface of the +EZ-USB. The host PC's reads out this data via USB and verifies it. + +Use this example as starting point for high speed (uninterrupted) +data acquisition applications. Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/MemTest.java =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/MemTest.java (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15a/memtest/MemTest.java (revision 6) @@ -0,0 +1,283 @@ +/*! + memtest -- DDR2 SDRAM FIFO for testing memory on ZTEX USB-FPGA Module 1.15b + Copyright (C) 2009-2011 ZTEX GmbH. + http://www.ztex.de + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License version 3 as + published by the Free Software Foundation. + + This program is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, see http://www.gnu.org/licenses/. +!*/ + +import java.io.*; +import java.util.*; + +import ch.ntb.usb.*; + +import ztex.*; + +// ***************************************************************************** +// ******* ParameterException ************************************************** +// ***************************************************************************** +// Exception the prints a help message +class ParameterException extends Exception { + public final static String helpMsg = new String ( + "Parameters:\n"+ + " -d Device Number (default: 0)\n" + + " -c Counter test patttern\n" + + " -f Force uploads\n" + + " -p Print bus info\n" + + " -w Enable certain workarounds\n"+ + " -h This help" ); + + public ParameterException (String msg) { + super( msg + "\n" + helpMsg ); + } +} + +// ***************************************************************************** +// ******* USBReader *********************************************************** +// ***************************************************************************** +class UsbReader extends Thread { + private final int bufNum = 8; + public final int bufSize = 512*1024; + public byte[][] buf = new byte[bufNum][]; + public int[] bufBytes = new int[bufNum]; + private int readCount = -1; + private int getCount = -1; + public boolean terminate = false; + private Ztex1v1 ztex; + + public UsbReader ( Ztex1v1 p_ztex ) { + super (); + ztex = p_ztex; + for (int i=0; i= readCount) { + try { + sleep(1); + } + catch ( InterruptedException e) { + } + } + return getCount % bufNum; + } + + + public void run() { + setPriority(MAX_PRIORITY); + +// claim interface 0 + try { + ztex.trySetConfiguration ( 1 ); + ztex.claimInterface ( 0 ); + } + catch ( Exception e) { + System.out.println("Error: "+e.getLocalizedMessage() ); + System.exit(2); + } + + +// reader loop + while ( !terminate ) { + readCount += 1; + + while ( readCount - bufNum >= getCount ) { + try { + sleep(1); + } + catch ( InterruptedException e) { + } + } + + int i = readCount % bufNum; + bufBytes[i] = LibusbJava.usb_bulk_read(ztex.handle(), 0x82, buf[i], bufSize, 1000); +// System.out.println("Buffer " + i +": read " + bufBytes[i] + " bytes"); + } + +// release interface 0 + ztex.releaseInterface( 0 ); + + } +} + +// ***************************************************************************** +// ******* Test0 *************************************************************** +// ***************************************************************************** +class MemTest extends Ztex1v1 { + +// ******* MemTest ************************************************************** +// constructor + public MemTest ( ZtexDevice1 pDev ) throws UsbException { + super ( pDev ); + } + +// ******* main **************************************************************** + public static void main (String args[]) { + + int devNum = 0; + boolean force = false; + boolean workarounds = false; + boolean genMode = true; + + try { +// init USB stuff + LibusbJava.usb_init(); + +// scan the USB bus + ZtexScanBus1 bus = new ZtexScanBus1( ZtexDevice1.ztexVendorId, ZtexDevice1.ztexProductId, true, false, 1); + if ( bus.numberOfDevices() <= 0) { + System.err.println("No devices found"); + System.exit(0); + } + +// scan the command line arguments + for (int i=0; i=args.length) throw new Exception(); + devNum = Integer.parseInt( args[i] ); + } + catch (Exception e) { + throw new ParameterException("Device number expected after -d"); + } + } + else if ( args[i].equals("-f") ) { + force = true; + } + else if ( args[i].equals("-c") ) { + genMode = false; + } + else if ( args[i].equals("-p") ) { + bus.printBus(System.out); + System.exit(0); + } + else if ( args[i].equals("-p") ) { + bus.printBus(System.out); + System.exit(0); + } + else if ( args[i].equals("-w") ) { + workarounds = true; + } + else if ( args[i].equals("-h") ) { + System.err.println(ParameterException.helpMsg); + System.exit(0); + } + else throw new ParameterException("Invalid Parameter: "+args[i]); + } + + +// create the main class + MemTest ztex = new MemTest ( bus.device(devNum) ); + ztex.certainWorkarounds = workarounds; + +// upload the firmware if necessary + if ( force || ! ztex.valid() || ! ztex.dev().productString().equals("memtest example for UFM 1.15") ) { + System.out.println("Firmware upload time: " + ztex.uploadFirmware( "memtest.ihx", force ) + " ms"); + force = true; + } + + ztex.vendorCommand (0x60, "Set test pattern", (genMode ? 1 : 0), 0); + +// upload the bitstream if necessary + if ( force || ! ztex.getFpgaConfiguration() ) { + System.out.println("FPGA configuration time: " + ztex.configureFpga( "fpga/memtest.bit" , force ) + " ms"); + } + +// read the traffic + UsbReader reader = new UsbReader( ztex ); + reader.start(); + +// test + int vcurrent = -1; + int prevErrors = 0; + + for (int i=0; i<1921; i++) { + int j = reader.getBuffer(); + int bb = reader.bufBytes[j]; + byte[] b = reader.buf[j]; + int current = vcurrent+1; + int lastwi = 1; + int aerrors = 0; + int ferrors = 0; + int errors = 0; + + if ( bb != reader.bufSize ) { + System.out.println("Unable to read data"); + } + + for (int k=1; k> 1) | (1 << 29); + else + vcurrent = (vcurrent >> 1); + } + else { + vcurrent += 1; + } + + if ( lastwi == 1 ) { + aerrors+=1; + System.out.println("Alignment error: 1 at " + i + ":" + (k-1) ); + } + else if ( vcurrent != current ) { + if ( (i != 0) && ( k != 3) ) { + System.out.println("Error: 0b" + Integer.toBinaryString(vcurrent) + " expected at " + i + ":" + (k-3) + " but " ); + System.out.println(" 0b" + Integer.toBinaryString(current) + " found"); + errors+=1; + prevErrors+=1; + } + vcurrent = current; + } + else { +// if ( prevErrors > 0 ) System.out.println(" 0b" + Integer.toBinaryString(current) ); + if ( prevErrors == 1 ) + ferrors +=1; + prevErrors = 0; + } + + lastwi = 1; +// System.out.println(current); + } +// System.out.println( (((b[k] & 0x7f) << 8) | (b[k-1] & 0xff)) + " " + Integer.toBinaryString(b[k] & 255) + " " + Integer.toBinaryString(b[k-1] & 255)); + } + System.out.print("Buffer " + i + ": " + (errors-ferrors) + " errors, " + ferrors + " FIFO errors, " + aerrors + " alignment errors \r"); + if ( errors != 0 | aerrors != 0 ) System.out.println(); + } + System.out.println(); + +// stop the reader + reader.terminate=true; + + } + catch (Exception e) { + System.out.println("Error: "+e.getLocalizedMessage() ); + } + } + +} Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15b/mmio/UCEcho.java =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15b/mmio/UCEcho.java (revision 5) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15b/mmio/UCEcho.java (revision 6) @@ -133,6 +133,7 @@ // upload the firmware if necessary if ( force || ! ztex.valid() || ! ztex.dev().productString().equals("ucecho example for UFM 1.15") ) { System.out.println("Firmware upload time: " + ztex.uploadFirmware( "ucecho.ihx", force ) + " ms"); + force = true; } // upload the bitstream if necessary
/usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15b/mmio/ucecho.c
32,7 → 32,7
// this product string is also used for identification by the host software
#define[PRODUCT_STRING]["memeory mapping example for UFM 1.15"]
 
xdata BYTE run;
__xdata BYTE run;
 
#define[PRE_FPGA_RESET][PRE_FPGA_RESET
run = 0;
/usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15b/intraffic/InTraffic.java
186,6 → 186,7
// upload the firmware if necessary
if ( force || ! ztex.valid() || ! ztex.dev().productString().equals("intraffic example for UFM 1.15") ) {
System.out.println("Firmware upload time: " + ztex.uploadFirmware( "intraffic.ihx", force ) + " ms");
force = true;
}
// upload the bitstream if necessary
/usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15b/ucecho/UCEcho.java
133,6 → 133,7
// upload the firmware if necessary
if ( force || ! ztex.valid() || ! ztex.dev().productString().equals("ucecho example for UFM 1.15") ) {
System.out.println("Firmware upload time: " + ztex.uploadFirmware( "ucecho.ihx", force ) + " ms");
force = true;
}
// upload the bitstream if necessary
/usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15b/ucecho/ucecho.c
32,7 → 32,7
// enables high speed FPGA configuration via EP4
ENABLE_HS_FPGA_CONF(4);
 
xdata BYTE run;
__xdata BYTE run;
 
#define[PRE_FPGA_RESET][PRE_FPGA_RESET
run = 0;
/usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15b/lightshow/avr/lightshow.ihx
1,45 → 1,44
:100000000C94FA000C941B010C941B010C941B0122
:100010000C941B010C941B010C941B010C941B01F0
:100020000C941B010C941B010C941B010C941B01E0
:100030000C941B010C941B010C941B010C941B01D0
:100040000C941B010C941B010C941B010C941B01C0
:100050000C941B010C941B010C941B010C941B01B0
:100060000C941B010C941B010C941B010C941B01A0
:100070000C941B010C941B010C941B010C941B0190
:100080000C941B010C941B010C941B010C941B0180
:100090000C941B010C941B010C941B010C941B0170
:1000A0000C941B010C941B010C941B010C941B0160
:1000B0000C941B010C941B010C941B010C941B0150
:1000C0000C941B010C941B010C941B010C941B0140
:1000D0000C941B010C941B010C941B010C941B0130
:1000E0000C941B010C941B010C941B010C941B0120
:1000F0000C941B010C941B010C941B010C941B0110
:100100000C941B010C941B010C941B010C941B01FF
:100110000C941B010C941B010C941B010C941B01EF
:100120000C941B010C941B010C941B010C941B01DF
:100130000C941B010C941B010C941B010C941B01CF
:100140000C941B010C941B010C941B010C941B01BF
:100150000C941B010C941B010C941B010C941B01AF
:100160000C941B010C941B010C941B010C941B019F
:100170000C941B010C941B010C941B010C941B018F
:100180000C941B010C941B010C941B010C941B017F
:100190000C941B010C941B010C941B010C941B016F
:1001A0000C941B010C941B010C941B010C941B015F
:1001B0000C941B010C941B010C941B010C941B014F
:1001C0000C941B010C941B010C941B010C941B013F
:1001D0000C941B010C941B010C941B010C941B012F
:1001E0000C941B010C941B010C941B010C941B011F
:1001F0000C941B0111241FBECFEFDFE3DEBFCDBF88
:1002000000E00CBF10E2A0E0B0E2E2EBF2E000E0C0
:100210000BBF02C007900D92A030B107D9F710E2D2
:10022000A0E0B0E201C01D92A030B107E1F70E944A
:100230001D010C9457010C94000088ED77E084BFF9
:10024000709350008091510087708730D9F788ED06
:1002500071E084BF7093600084BF7093680084BFB6
:100260007093400088ED71E084BF7093960082E047
:10027000E0EBF0E0848380E8809360061092000752
:100280001092E006809160068F60809360068FEF89
:100290008093A006A0E6B6E0E0EAF6E080910807C9
:1002A00014968C9314978091E8068483F7CFF89482
:0202B000FFCF7E
:100000000C94FA000C9418010C9418010C9418012B
:100010000C9418010C9418010C9418010C941801FC
:100020000C9418010C9418010C9418010C941801EC
:100030000C9418010C9418010C9418010C941801DC
:100040000C9418010C9418010C9418010C941801CC
:100050000C9418010C9418010C9418010C941801BC
:100060000C9418010C9418010C9418010C941801AC
:100070000C9418010C9418010C9418010C9418019C
:100080000C9418010C9418010C9418010C9418018C
:100090000C9418010C9418010C9418010C9418017C
:1000A0000C9418010C9418010C9418010C9418016C
:1000B0000C9418010C9418010C9418010C9418015C
:1000C0000C9418010C9418010C9418010C9418014C
:1000D0000C9418010C9418010C9418010C9418013C
:1000E0000C9418010C9418010C9418010C9418012C
:1000F0000C9418010C9418010C9418010C9418011C
:100100000C9418010C9418010C9418010C9418010B
:100110000C9418010C9418010C9418010C941801FB
:100120000C9418010C9418010C9418010C941801EB
:100130000C9418010C9418010C9418010C941801DB
:100140000C9418010C9418010C9418010C941801CB
:100150000C9418010C9418010C9418010C941801BB
:100160000C9418010C9418010C9418010C941801AB
:100170000C9418010C9418010C9418010C9418019B
:100180000C9418010C9418010C9418010C9418018B
:100190000C9418010C9418010C9418010C9418017B
:1001A0000C9418010C9418010C9418010C9418016B
:1001B0000C9418010C9418010C9418010C9418015B
:1001C0000C9418010C9418010C9418010C9418014B
:1001D0000C9418010C9418010C9418010C9418013B
:1001E0000C9418010C9418010C9418010C9418012B
:1001F0000C94180111241FBECFEFDFE3DEBFCDBF8B
:1002000000E00CBF18BE19BE1ABE1BBE10E2A0E073
:10021000B0E2ECEAF2E000E00BBF02C007900D9202
:10022000A030B107D9F71BBE0E941A010C945401EB
:100230000C94000088ED77E084BF709350008091AB
:10024000510087708730D9F788ED71E084BF7093D3
:10025000600084BF7093680084BF7093400088ED95
:1002600071E084BF7093960082E0E0EBF0E084835D
:1002700080E880936006109200071092E00680915B
:1002800060068F60809360068FEF8093A006A0E6E3
:10029000B6E0E0EAF6E08091080714968C93149794
:0C02A0008091E8068483F7CFF894FFCF2C
:00000001FF
/usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15b/lightshow/lightshow.c
19,7 → 19,7
#include[ztex-conf.h] // Loads the configuration macros, see ztex-conf.h for the available macros
#include[ztex-utils.h] // include basic functions
 
// Endpoint 2 is used to high spee FPGA configuration
// Endpoint 2 is used to high speed FPGA configuration
EP_CONFIG(2,0,BULK,OUT,512,4);
 
// select ZTEX USB FPGA Module 1.15 + Experimental Board 1.10 as target
/usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15b/lightshow/Makefile
7,11 → 7,11
JARTARGET=Lightshow.jar
CLASSTARGETS=Lightshow.class
CLASSEXTRADEPS=
#CLASSEXTRADEPS:=$(shell echo $(ZTEXPREFIX)/java/ztex/*.java)
#CLASSEXTRADEPS:=$(wildcard $(ZTEXPREFIX)/java/ztex/*.java)
 
IHXTARGETS=lightshow.ihx
IHXEXTRADEPS=
#IHXEXTRADEPS:=$(shell echo $(ZTEXPREFIX)/include/*.h)
#IHXEXTRADEPS:=$(wildcard $(ZTEXPREFIX)/include/*.h)
EXTRAJARFILES=lightshow.ihx avr/lightshow.ihx fpga/lightshow.bit
 
################################
/usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15b/Makefile
1,6 → 1,6
DIRS=ucecho intraffic memtest lightshow mmio
 
.PHONY: default all clean distclean
.PHONY: default all clean distclean avr avrclean avrdistclean
 
default:
@echo "This makefile is intended to clean up the project or to build all examples in this subdirectory"
7,10 → 7,20
@echo "Usage: make all | clean | distclean"
 
all:
for i in $(DIRS); do make -C $$i all; done
set -e; for i in $(DIRS); do make -C $$i all; done
 
clean:
for i in $(DIRS); do make -C $$i clean; done
set -e; for i in $(DIRS); do make -C $$i clean; done
 
distclean: clean
for i in $(DIRS); do make -C $$i distclean; done
distclean:
set -e; for i in $(DIRS); do make -C $$i distclean; done
 
avr:
set -e; for i in $(DIRS); do make -C $$i avr; done
 
avrclean:
set -e; for i in $(DIRS); do make -C $$i avrclean; done
 
avrdistclean:
set -e; for i in $(DIRS); do make -C $$i avrdistclean; done
 
/usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15b/memtest/MemTest.java
187,6 → 187,7
// upload the firmware if necessary
if ( force || ! ztex.valid() || ! ztex.dev().productString().equals("memtest example for UFM 1.15") ) {
System.out.println("Firmware upload time: " + ztex.uploadFirmware( "memtest.ihx", force ) + " ms");
force = true;
}
 
ztex.vendorCommand (0x60, "Set test pattern", (genMode ? 1 : 0), 0);
/usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15d/mmio/UCEcho.java
133,6 → 133,7
// upload the firmware if necessary
if ( force || ! ztex.valid() || ! ztex.dev().productString().equals("ucecho example for UFM 1.15") ) {
System.out.println("Firmware upload time: " + ztex.uploadFirmware( "ucecho.ihx", force ) + " ms");
force = true;
}
// upload the bitstream if necessary
/usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15d/mmio/ucecho.c
25,6 → 25,7
 
// select ZTEX USB FPGA Module 1.15 as target (required for FPGA configuration)
IDENTITY_UFM_1_15(10.13.0.0,0);
ENABLE_UFM_1_15X_DETECTION; // avoids some warnings
 
// enables high speed FPGA configuration, (re)use EP 4
ENABLE_HS_FPGA_CONF(4);
32,7 → 33,7
// this product string is also used for identification by the host software
#define[PRODUCT_STRING]["memeory mapping example for UFM 1.15"]
 
xdata BYTE run;
__xdata BYTE run;
 
#define[PRE_FPGA_RESET][PRE_FPGA_RESET
run = 0;
/usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15d/intraffic/InTraffic.java
186,6 → 186,7
// upload the firmware if necessary
if ( force || ! ztex.valid() || ! ztex.dev().productString().equals("intraffic example for UFM 1.15") ) {
System.out.println("Firmware upload time: " + ztex.uploadFirmware( "intraffic.ihx", force ) + " ms");
force = true;
}
// upload the bitstream if necessary
/usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15d/intraffic/intraffic.c
27,6 → 27,7
 
// select ZTEX USB FPGA Module 1.15 as target (required for FPGA configuration)
IDENTITY_UFM_1_15(10.13.0.0,0);
ENABLE_UFM_1_15X_DETECTION; // avoids some warnings
 
// this product string is also used for identification by the host software
#define[PRODUCT_STRING]["intraffic example for UFM 1.15"]
/usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15d/intraffic/intraffic.sh
1,4 → 1,4
#make -C ../../../java distclean all || exit
#make distclean all || exit
make distclean all || exit
#make || exit
java -cp InTraffic.jar InTraffic $@
/usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15d/ucecho/UCEcho.java
133,6 → 133,7
// upload the firmware if necessary
if ( force || ! ztex.valid() || ! ztex.dev().productString().equals("ucecho example for UFM 1.15") ) {
System.out.println("Firmware upload time: " + ztex.uploadFirmware( "ucecho.ihx", force ) + " ms");
force = true;
}
// upload the bitstream if necessary
/usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15d/ucecho/ucecho.c
25,6 → 25,7
 
// select ZTEX USB FPGA Module 1.15 as target (required for FPGA configuration)
IDENTITY_UFM_1_15(10.13.0.0,0);
ENABLE_UFM_1_15X_DETECTION; // avoids some warnings
 
// this product string is also used for identification by the host software
#define[PRODUCT_STRING]["ucecho example for UFM 1.15"]
32,7 → 33,7
// enables high speed FPGA configuration via EP4
ENABLE_HS_FPGA_CONF(4);
 
xdata BYTE run;
__xdata BYTE run;
 
#define[PRE_FPGA_RESET][PRE_FPGA_RESET
run = 0;
/usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15d/lightshow/avr/lightshow.ihx
1,45 → 1,44
:100000000C94FA000C941B010C941B010C941B0122
:100010000C941B010C941B010C941B010C941B01F0
:100020000C941B010C941B010C941B010C941B01E0
:100030000C941B010C941B010C941B010C941B01D0
:100040000C941B010C941B010C941B010C941B01C0
:100050000C941B010C941B010C941B010C941B01B0
:100060000C941B010C941B010C941B010C941B01A0
:100070000C941B010C941B010C941B010C941B0190
:100080000C941B010C941B010C941B010C941B0180
:100090000C941B010C941B010C941B010C941B0170
:1000A0000C941B010C941B010C941B010C941B0160
:1000B0000C941B010C941B010C941B010C941B0150
:1000C0000C941B010C941B010C941B010C941B0140
:1000D0000C941B010C941B010C941B010C941B0130
:1000E0000C941B010C941B010C941B010C941B0120
:1000F0000C941B010C941B010C941B010C941B0110
:100100000C941B010C941B010C941B010C941B01FF
:100110000C941B010C941B010C941B010C941B01EF
:100120000C941B010C941B010C941B010C941B01DF
:100130000C941B010C941B010C941B010C941B01CF
:100140000C941B010C941B010C941B010C941B01BF
:100150000C941B010C941B010C941B010C941B01AF
:100160000C941B010C941B010C941B010C941B019F
:100170000C941B010C941B010C941B010C941B018F
:100180000C941B010C941B010C941B010C941B017F
:100190000C941B010C941B010C941B010C941B016F
:1001A0000C941B010C941B010C941B010C941B015F
:1001B0000C941B010C941B010C941B010C941B014F
:1001C0000C941B010C941B010C941B010C941B013F
:1001D0000C941B010C941B010C941B010C941B012F
:1001E0000C941B010C941B010C941B010C941B011F
:1001F0000C941B0111241FBECFEFDFE3DEBFCDBF88
:1002000000E00CBF10E2A0E0B0E2E2EBF2E000E0C0
:100210000BBF02C007900D92A030B107D9F710E2D2
:10022000A0E0B0E201C01D92A030B107E1F70E944A
:100230001D010C9457010C94000088ED77E084BFF9
:10024000709350008091510087708730D9F788ED06
:1002500071E084BF7093600084BF7093680084BFB6
:100260007093400088ED71E084BF7093960082E047
:10027000E0EBF0E0848380E8809360061092000752
:100280001092E006809160068F60809360068FEF89
:100290008093A006A0E6B6E0E0EAF6E080910807C9
:1002A00014968C9314978091E8068483F7CFF89482
:0202B000FFCF7E
:100000000C94FA000C9418010C9418010C9418012B
:100010000C9418010C9418010C9418010C941801FC
:100020000C9418010C9418010C9418010C941801EC
:100030000C9418010C9418010C9418010C941801DC
:100040000C9418010C9418010C9418010C941801CC
:100050000C9418010C9418010C9418010C941801BC
:100060000C9418010C9418010C9418010C941801AC
:100070000C9418010C9418010C9418010C9418019C
:100080000C9418010C9418010C9418010C9418018C
:100090000C9418010C9418010C9418010C9418017C
:1000A0000C9418010C9418010C9418010C9418016C
:1000B0000C9418010C9418010C9418010C9418015C
:1000C0000C9418010C9418010C9418010C9418014C
:1000D0000C9418010C9418010C9418010C9418013C
:1000E0000C9418010C9418010C9418010C9418012C
:1000F0000C9418010C9418010C9418010C9418011C
:100100000C9418010C9418010C9418010C9418010B
:100110000C9418010C9418010C9418010C941801FB
:100120000C9418010C9418010C9418010C941801EB
:100130000C9418010C9418010C9418010C941801DB
:100140000C9418010C9418010C9418010C941801CB
:100150000C9418010C9418010C9418010C941801BB
:100160000C9418010C9418010C9418010C941801AB
:100170000C9418010C9418010C9418010C9418019B
:100180000C9418010C9418010C9418010C9418018B
:100190000C9418010C9418010C9418010C9418017B
:1001A0000C9418010C9418010C9418010C9418016B
:1001B0000C9418010C9418010C9418010C9418015B
:1001C0000C9418010C9418010C9418010C9418014B
:1001D0000C9418010C9418010C9418010C9418013B
:1001E0000C9418010C9418010C9418010C9418012B
:1001F0000C94180111241FBECFEFDFE3DEBFCDBF8B
:1002000000E00CBF18BE19BE1ABE1BBE10E2A0E073
:10021000B0E2ECEAF2E000E00BBF02C007900D9202
:10022000A030B107D9F71BBE0E941A010C945401EB
:100230000C94000088ED77E084BF709350008091AB
:10024000510087708730D9F788ED71E084BF7093D3
:10025000600084BF7093680084BF7093400088ED95
:1002600071E084BF7093960082E0E0EBF0E084835D
:1002700080E880936006109200071092E00680915B
:1002800060068F60809360068FEF8093A006A0E6E3
:10029000B6E0E0EAF6E08091080714968C93149794
:0C02A0008091E8068483F7CFF894FFCF2C
:00000001FF
/usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15d/lightshow/Makefile
7,11 → 7,11
JARTARGET=Lightshow.jar
CLASSTARGETS=Lightshow.class
CLASSEXTRADEPS=
#CLASSEXTRADEPS:=$(shell echo $(ZTEXPREFIX)/java/ztex/*.java)
#CLASSEXTRADEPS:=$(wildcard $(ZTEXPREFIX)/java/ztex/*.java)
 
IHXTARGETS=lightshow.ihx
IHXEXTRADEPS=
#IHXEXTRADEPS:=$(shell echo $(ZTEXPREFIX)/include/*.h)
#IHXEXTRADEPS:=$(wildcard $(ZTEXPREFIX)/include/*.h)
EXTRAJARFILES=lightshow.ihx avr/lightshow.ihx fpga/lightshow.bit
 
################################
/usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15d/Makefile
1,6 → 1,6
DIRS=ucecho intraffic memtest lightshow mmio
 
.PHONY: default all clean distclean
.PHONY: default all clean distclean avr avrclean avrdistclean
 
default:
@echo "This makefile is intended to clean up the project or to build all examples in this subdirectory"
7,10 → 7,19
@echo "Usage: make all | clean | distclean"
 
all:
for i in $(DIRS); do make -C $$i all; done
set -e; for i in $(DIRS); do make -C $$i all; done
 
clean:
for i in $(DIRS); do make -C $$i clean; done
set -e; for i in $(DIRS); do make -C $$i clean; done
 
distclean: clean
for i in $(DIRS); do make -C $$i distclean; done
distclean:
set -e; for i in $(DIRS); do make -C $$i distclean; done
 
avr:
set -e; for i in $(DIRS); do make -C $$i avr; done
 
avrclean:
set -e; for i in $(DIRS); do make -C $$i avrclean; done
 
avrdistclean:
set -e; for i in $(DIRS); do make -C $$i avrdistclean; done
/usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15d/memtest/MemTest.java
187,6 → 187,7
// upload the firmware if necessary
if ( force || ! ztex.valid() || ! ztex.dev().productString().equals("memtest example for UFM 1.15") ) {
System.out.println("Firmware upload time: " + ztex.uploadFirmware( "memtest.ihx", force ) + " ms");
force = true;
}
 
ztex.vendorCommand (0x60, "Set test pattern", (genMode ? 1 : 0), 0);
/usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15x/default/default.c
0,0 → 1,44
/*!
default -- Default Firmware for ZTEX USB-FPGA Modules 1.15x
Copyright (C) 2009-2011 ZTEX GmbH.
http://www.ztex.de
 
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License version 3 as
published by the Free Software Foundation.
 
This program is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
General Public License for more details.
 
You should have received a copy of the GNU General Public License
along with this program; if not, see http://www.gnu.org/licenses/.
!*/
 
#include[ztex-conf.h] // Loads the configuration macros, see ztex-conf.h for the available macros
#include[ztex-utils.h] // include basic functions and variables
 
// Endpoint 2 is used to high speed FPGA configuration
EP_CONFIG(2,0,BULK,OUT,512,4);
 
// select ZTEX USB FPGA Module 1.15 as target (required for FPGA configuration)
IDENTITY_UFM_1_15(10.13.0.0,0);
ENABLE_UFM_1_15X_DETECTION; // avoids some warnings
 
// enables high speed FPGA configuration, use EP 2
ENABLE_HS_FPGA_CONF(2);
 
// this product string can also used for identification by the host software
#define[PRODUCT_STRING]["USB-FPGA Module 1.15x (default)"]
 
#include[ztex.h]
 
void main(void)
{
init_USB(); // init everything
while (1) { } // twiddle thumbs
}
 
 
/usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15x/default/Makefile
0,0 → 1,23
#########################
# configuration section #
#########################
 
ZTEXPREFIX=../../../..
 
JARTARGET=
CLASSTARGETS=
CLASSEXTRADEPS=
 
IHXTARGETS=default.ihx
IHXEXTRADEPS=
EXTRAJARFILES=
EXTRADISTCLEANFILES=
 
default: all
 
################################
# DO NOT CHANAGE THE FOLLOWING #
################################
 
include $(ZTEXPREFIX)/Makefile.mk
 
/usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15x/default/default.sh
0,0 → 1,2
../../../../java/FWLoader -c -uu default.ihx -ue default.ihx
 
usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15x/default/default.sh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15x/default/Readme =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15x/default/Readme (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15x/default/Readme (revision 6) @@ -0,0 +1 @@ +Default Firmware for USB-FPGA Modules 1.15x. Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15x/Makefile =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15x/Makefile (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15x/Makefile (revision 6) @@ -0,0 +1,25 @@ +DIRS=default + +.PHONY: default all clean distclean avr avrclean avrdistclean + +default: + @echo "This makefile is intended to clean up the project or to build all examples in this subdirectory" + @echo "Usage: make all | clean | distclean" + +all: + set -e; for i in $(DIRS); do make -C $$i all; done + +clean: + set -e; for i in $(DIRS); do make -C $$i clean; done + +distclean: + set -e; for i in $(DIRS); do make -C $$i distclean; done + +avr: + set -e; for i in $(DIRS); do make -C $$i avr; done + +avrclean: + set -e; for i in $(DIRS); do make -C $$i avrclean; done + +avrdistclean: + set -e; for i in $(DIRS); do make -C $$i avrdistclean; done Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15x/Readme =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15x/Readme (nonexistent) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/1.15x/Readme (revision 6) @@ -0,0 +1,12 @@ +USB-FPGA Modules 1.15x and 1.15d can use the same Firmware and +Bitstreams. Nevertheless, 1.15x detection can be added by calling the +macro `ENABLE_UFM_1_15X_DETECTION;', see the description in +include/ztex.conf and the examples below. + +The following examples are supported by USB-FPGA Modules 1.15x: +../1.15d/intraffic +../1.15d/mmio +../1.15d/ucecho + + + Index: usb_fpga_1_11/trunk/examples/usb-fpga-1.15/Makefile =================================================================== --- usb_fpga_1_11/trunk/examples/usb-fpga-1.15/Makefile (revision 5) +++ usb_fpga_1_11/trunk/examples/usb-fpga-1.15/Makefile (revision 6) @@ -1,6 +1,6 @@ -DIRS=flashdemo flashbench standalone nvmtest 1.15b 1.15d +DIRS=flashdemo flashbench standalone nvmtest 1.15a 1.15b 1.15d 1.15x -.PHONY: default all clean distclean +.PHONY: default all clean distclean avr avrclean avrdistclean default: @echo "This makefile is intended to clean up the project or to build all examples in this subdirectory" @@ -7,10 +7,19 @@ @echo "Usage: make all | clean | distclean" all: - for i in $(DIRS); do make -C $$i all; done + set -e; for i in $(DIRS); do make -C $$i all; done clean: - for i in $(DIRS); do make -C $$i clean; done + set -e; for i in $(DIRS); do make -C $$i clean; done -distclean: clean - for i in $(DIRS); do make -C $$i distclean; done +distclean: + set -e; for i in $(DIRS); do make -C $$i distclean; done + +avr: + set -e; for i in $(DIRS); do make -C $$i avr; done + +avrclean: + set -e; for i in $(DIRS); do make -C $$i avrclean; done + +avrdistclean: + set -e; for i in $(DIRS); do make -C $$i avrdistclean; done
/usb_fpga_1_11/trunk/examples/usb-fpga-1.15/flashbench/Makefile
7,11 → 7,11
JARTARGET=FlashBench.jar
CLASSTARGETS=FlashBench.class
CLASSEXTRADEPS=
#CLASSEXTRADEPS:=$(shell echo $(ZTEXPREFIX)/java/ztex/*.java)
#CLASSEXTRADEPS:=$(wildcard $(ZTEXPREFIX)/java/ztex/*.java)
 
IHXTARGETS=flashbench.ihx
IHXEXTRADEPS=
#IHXEXTRADEPS:=$(shell echo $(ZTEXPREFIX)/include/*.h)
#IHXEXTRADEPS:=$(wildcard $(ZTEXPREFIX)/include/*.h)
EXTRAJARFILES=flashbench.ihx
 
################################
/usb_fpga_1_11/trunk/examples/all/debug/Makefile
7,11 → 7,11
JARTARGET=Debug.jar
CLASSTARGETS=Debug.class
CLASSEXTRADEPS=
#CLASSEXTRADEPS:=$(shell echo $(ZTEXPREFIX)/java/ztex/*.java)
#CLASSEXTRADEPS:=$(wildcard $(ZTEXPREFIX)/java/ztex/*.java)
 
IHXTARGETS=debug.ihx
IHXEXTRADEPS=
#IHXEXTRADEPS:=$(shell echo $(ZTEXPREFIX)/include/*.h)
#IHXEXTRADEPS:=$(wildcard $(ZTEXPREFIX)/include/*.h)
EXTRAJARFILES=debug.ihx
 
################################
/usb_fpga_1_11/trunk/examples/all/ucecho/Makefile
7,11 → 7,11
JARTARGET=UCEcho.jar
CLASSTARGETS=UCEcho.class
CLASSEXTRADEPS=
#CLASSEXTRADEPS:=$(shell echo $(ZTEXPREFIX)/java/ztex/*.java)
#CLASSEXTRADEPS:=$(wildcard $(ZTEXPREFIX)/java/ztex/*.java)
 
IHXTARGETS=ucecho.ihx
IHXEXTRADEPS=
#IHXEXTRADEPS:=$(shell echo $(ZTEXPREFIX)/include/*.h)
#IHXEXTRADEPS:=$(wildcard $(ZTEXPREFIX)/include/*.h)
EXTRAJARFILES=ucecho.ihx
 
################################
/usb_fpga_1_11/trunk/examples/all/Makefile
1,6 → 1,6
DIRS=ucecho debug
 
.PHONY: default all clean distclean
.PHONY: default all clean distclean avr avrclean avrdistclean
 
default:
@echo "This makefile is intended to clean up the project or to build all examples in this subdirectory"
7,10 → 7,19
@echo "Usage: make all | clean | distclean"
 
all:
for i in $(DIRS); do make -C $$i all; done
set -e; for i in $(DIRS); do make -C $$i all; done
 
clean:
for i in $(DIRS); do make -C $$i clean; done
set -e; for i in $(DIRS); do make -C $$i clean; done
 
distclean: clean
for i in $(DIRS); do make -C $$i distclean; done
distclean:
set -e; for i in $(DIRS); do make -C $$i distclean; done
 
avr:
set -e; for i in $(DIRS); do make -C $$i avr; done
 
avrclean:
set -e; for i in $(DIRS); do make -C $$i avrclean; done
 
avrdistclean:
set -e; for i in $(DIRS); do make -C $$i avrdistclean; done
/usb_fpga_1_11/trunk/examples/Makefile
1,6 → 1,6
DIRS=all usb-fpga-1.2 usb-1.0 usb-fpga-1.11 usb-xmega-1.0 usb-fpga-1.15
DIRS=all usb-fpga-1.2 usb-1.0 usb-fpga-1.11 usb-xmega-1.0 usb-fpga-1.15 usb-fpga-1.15y
 
.PHONY: default all clean distclean
.PHONY: default all clean distclean avr avrclean avrdistclean
 
default:
@echo "This makefile is intended to clean up the project or to build all examples"
7,10 → 7,19
@echo "Usage: make all | clean | distclean"
 
all:
for i in $(DIRS); do make -C $$i all; done
set -e; for i in $(DIRS); do make -C $$i all; done
 
clean:
for i in $(DIRS); do make -C $$i clean; done
set -e; for i in $(DIRS); do make -C $$i clean; done
 
distclean: clean
for i in $(DIRS); do make -C $$i distclean; done
distclean:
set -e; for i in $(DIRS); do make -C $$i distclean; done
 
avr:
set -e; for i in $(DIRS); do make -C $$i avr; done
 
avrclean:
set -e; for i in $(DIRS); do make -C $$i avrclean; done
 
avrdistclean:
set -e; for i in $(DIRS); do make -C $$i avrdistclean; done

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.