OpenCores
URL https://opencores.org/ocsvn/rtcclock/rtcclock/trunk

Subversion Repositories rtcclock

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  • This comparison shows the changes necessary to convert path
    /
    from Rev 7 to Rev 8
    Reverse comparison

Rev 7 → Rev 8

/rtcclock/trunk/rtl/rtclight.v
14,7 → 14,7
//
//
// Creator: Dan Gisselquist, Ph.D.
// Gisselquist Tecnology, LLC
// Gisselquist Technology, LLC
//
///////////////////////////////////////////////////////////////////////////
//
52,7 → 52,7
o_interrupt,
// A once-per-day strobe on the last clock of the day
o_ppd);
parameter DEFAULT_SPEED = 32'd2814750;
parameter DEFAULT_SPEED = 32'd2814750; // 100 Mhz
input i_clk;
input i_wb_cyc, i_wb_stb, i_wb_we;
input [2:0] i_wb_addr;
/rtcclock/trunk/rtl/rtcgps.v
13,7 → 13,7
//
//
// Creator: Dan Gisselquist, Ph.D.
// Gisselquist Tecnology, LLC
// Gisselquist Technology, LLC
//
///////////////////////////////////////////////////////////////////////////
//
52,7 → 52,9
// A once-per-day strobe on the last clock of the day
o_ppd,
// GPS interface
i_gps_valid, i_gps_pps, i_gps_ckspeed);
i_gps_valid, i_gps_pps, i_gps_ckspeed,
// Our personal timing, for debug purposes
o_rtc_pps);
parameter DEFAULT_SPEED = 32'd2814750; //2af31e = 2^48 / 100e6 MHz
input i_clk;
input i_wb_cyc, i_wb_stb, i_wb_we;
66,6 → 68,8
// GPS interface
input i_gps_valid, i_gps_pps;
input [31:0] i_gps_ckspeed;
// Personal PPS
output wire o_rtc_pps;
 
reg [23:0] clock;
reg [31:0] stopwatch, ckspeed;
80,23 → 84,40
reg [39:0] ck_counter;
reg ck_carry;
always @(posedge i_clk)
{ ck_carry, ck_counter } <= ck_counter + { 8'h00, ckspeed };
if ((i_gps_valid)&&(i_gps_pps))
begin
ck_carry <= 0;
// Start our counter 2 clocks into the future.
// Why? Because if we hit the PPS, we'll be delayed
// one clock from true time. This (hopefully) locks
// us back onto true time. Further, if we end up
// off (i.e., go off before the GPS tick ...) then
// the GPS tick will put us back on track ... likewise
// we've got code following that should keep us from
// ever producing two PPS's per second.
ck_counter <= { 7'h00, ckspeed, 1'b0 };
end else
{ ck_carry, ck_counter }<=ck_counter+{ 8'h00, ckspeed };
 
wire ck_pps;
reg ck_prepps, ck_ppm, ck_pph, ck_ppd;
reg ck_pps;
reg ck_ppm, ck_pph, ck_ppd;
reg [7:0] ck_sub;
initial clock = 24'h00000000;
assign ck_pps = (ck_carry)&&(ck_prepps);
always @(posedge i_clk)
if ((i_gps_pps)&&(i_gps_valid)&&(ck_sub[7]))
ck_pps <= 1'b1;
else if ((ck_carry)&&(ck_sub == 8'hff))
ck_pps <= 1'b1;
else
ck_pps <= 1'b0;
 
assign o_rtc_pps = ck_pps;
always @(posedge i_clk)
begin
if ((i_gps_valid)&&(i_gps_pps))
ck_sub <= 0;
else if (ck_carry)
ck_sub <= ck_sub + 1;
if (i_gps_valid)
ck_prepps <= i_gps_pps;
else
ck_prepps <= (ck_sub == 8'hff);
 
if (ck_pps)
begin // advance the seconds
427,9 → 448,11
endcase
 
wire [31:0] w_sseg;
assign w_sseg[ 0] = (~ck_sub[7]);
assign w_sseg[ 8] = (~ck_sub[6])&&(~ck_sub[7]);
assign w_sseg[16] = (~ck_sub[5])&&(~ck_sub[6])&&(~ck_sub[7]);
assign w_sseg[ 0] = (i_gps_valid)?(ck_sub[7:5]==3'h0):(~ck_sub[0]);
assign w_sseg[ 8] = (i_gps_valid)?(ck_sub[7:5]==3'h0):(~ck_sub[0]);
assign w_sseg[16] = (i_gps_valid)?(ck_sub[7:5]==3'h0):(~ck_sub[0]);
// assign w_sseg[ 8] = w_sseg[0];
// assign w_sseg[16] = w_sseg[0];
assign w_sseg[24] = 1'b0;
hexmap ha(i_clk, h_sseg[ 3: 0], w_sseg[ 7: 1]);
hexmap hb(i_clk, h_sseg[ 7: 4], w_sseg[15: 9]);
/rtcclock/trunk/rtl/rtcclock.v
9,7 → 9,7
//
//
// Creator: Dan Gisselquist, Ph.D.
// Gisselquist Tecnology, LLC
// Gisselquist Technology, LLC
//
///////////////////////////////////////////////////////////////////////////
//
/rtcclock/trunk/rtl/rtcdate.v
24,7 → 24,7
//
//
// Creator: Dan Gisselquist, Ph.D.
// Gisselquist Tecnology, LLC
// Gisselquist Technology, LLC
//
///////////////////////////////////////////////////////////////////////////
//

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