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URL https://opencores.org/ocsvn/aemb/aemb/trunk

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  • This comparison shows the changes necessary to convert path 
    /aemb
    from Rev 198 to Rev 199
    ↔ Reverse comparison
  •

Rev 198 → Rev 199

/trunk/sw/iss/iss.cc
17,11 → 17,13
<http://www.gnu.org/licenses/>.
*/
 
#include "mem/aembInstMemory.hh"
#include "mem/InstMemory.hh"
#include "cpu/FetchUnit.hh"
 
#include <stdio.h>
 
using namespace std;
using namespace aemb;
 
int main(int argc, char *argv[])
{
30,9 → 32,18
printf("This program comes with ABSOLUTELY NO WARRANTY.\n");
printf("This is free software, and you are welcome to redistribute it under certain conditions.\n");
aembInstMemory imem;
imem.getVmem();
imem.dumpMem();
InstMemory imem;
FetchUnit inst;
imem.readVmem();
//imem.dumpMem();
 
InstFormat i;
 
for (int j=0x100; j<512; j += 4) {
i = inst.tokInst(imem.getInst(j)); //inst.getDecoded(imem.getInst(0));
printf("\nOPC:%.2o RD:%.2d RA:%.2d RB:%.2d", i.r.op, i.r.rd, i.r.ra, i.r.rb);
printf("\nOPC:%.2o RD:%.2d RA:%.2d IMM:%.8x", i.i.op, i.i.rd, i.i.ra, i.i.im);
}
return 0;
}
/trunk/sw/iss/cpu/aembInstruction.cc File deleted
/trunk/sw/iss/cpu/aembRegisterGP.cc File deleted
/trunk/sw/iss/cpu/aembRegisterGP.hh File deleted
/trunk/sw/iss/cpu/aembInstruction.hh File deleted
/trunk/sw/iss/cpu/RegisterFile.hh
0,0 → 1,94
/*!
AEMB INSTRUCTION SET SIMULATOR
Copyright (C) 2009 Shawn Tan <shawn.tan@aeste.net>
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
 
This program is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
General Public License for more details.
 
You should have received a copy of the GNU General Public License
along with this program. If not, see
<http://www.gnu.org/licenses/>.
*/
 
#ifndef _AEMBREGISTERGP_H_
#define _AEMBREGISTERGP_H_
 
#include <vector>
 
using std::vector;
 
namespace aemb {
 
/**
* List of special function registers
*/
typedef enum
{
SFR_PC = 0,
SFR_MSR = 1,
SFR_EAR = 3,
SFR_ESR = 5,
} SpecialRegs;
 
/**
Behavioral class for the general purpose register file that can
only be read from and written to. It has internal mechanisms to
check for data hazards.
*/
 
class RegisterFile
{
vector<int> regfile; ///< internal general purpose register file
int rsfr;
public:
void reset();
 
/**
* Put a value into a register.
* @param gpr Register number [0:31].
* @param data Register data to write
*/
void setRegister(const int gpr, const int data);
/**
* Get a value from a register.
* @param gpr Register number [0:31].
* @return Value of the register.
*/
int getRegister(const int gpr);
/**
* Get the value of a special register.
* @param sfr Special register number
* @return Special register value
*/
int getSpecial(const int sfr);
/**
* Set the value of a special register
* @param sfr Special register number
* @param imm32 Special register value
*/
void setSpecial(const int sfr, const int imm32);
int clrSpecial(const int imm14);
int setSpecial(const int imm14);
RegisterFile();
~RegisterFile();
};
 
}
#endif
/trunk/sw/iss/cpu/FetchUnit.hh
0,0 → 1,136
/*!
AEMB INSTRUCTION SET SIMULATOR
Copyright (C) 2009 Shawn Tan <shawn.tan@aeste.net>
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
 
This program is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
General Public License for more details.
 
You should have received a copy of the GNU General Public License
along with this program. If not, see
<http://www.gnu.org/licenses/>.
*/
 
#ifndef AEMBINSTRUCTION_H_
#define AEMBINSTRUCTION_H_
 
using namespace std;
 
namespace aemb
{
typedef enum
{
OPC_ADD = 000,
OPC_RSUB = 001,
OPC_ADDC = 002,
OPC_RSUBC = 003,
OPC_ADDK = 004,
OPC_RSUBK = 005,
OPC_ADDKC = 006,
OPC_RSUBKC = 007,
 
OPC_CMP = 005,
OPC_CMPU = 005,
OPC_ADDI = 010,
OPC_RSUBI = 011,
OPC_ADDIC = 012,
OPC_RSUBIC = 013,
OPC_ADDIK = 014,
OPC_RSUBIK = 015,
OPC_ADDIKC = 016,
OPC_RSUBIKC = 017,
OPC_MUL = 020,
OPC_BSRL = 021,
OPC_BSRA = 021,
OPC_BSLL = 021,
OPC_MULI = 030,
OPC_BSRLI = 031,
OPC_BSRAI = 031,
OPC_BSLLI = 031,
OPC_IDIV = 032,
OPC_IDIVU = 032,
OPC_OR = 040,
OPC_AND = 041,
OPC_XOR = 042,
OPC_ANDN = 043,
} opcodes;
 
/**
* FetchUnit formats.
*/
union uInstFormat
{
int word;
/**
* R-format opcode
*/
struct sFormatR
{
int im:11; // reserved
unsigned int rb:5; // rb
unsigned int ra:5; // ra
unsigned int rd:5; // rd
unsigned int op:6; // opcode
} r;
 
/**
* I-format opcode
*/
struct sFormatI
{
int im:16; // immediate
unsigned int ra:5; // ra
unsigned int rd:5; // rd
unsigned int op:6; // opcode
} i;
};
 
typedef uInstFormat InstFormat;
 
class FetchUnit
{
int r_pc;
public:
 
void reset();
 
/**
* Tokenise instructions.
* Decode the raw instructions into the opcode structure.
* @param opc Opcode raw value
* @return structure holding the opcode
*/
InstFormat tokInst(const int opc);
/**
* Get PC
*/
int getPC();
/**
* Set PC
*/
void setPC(const int pc);
FetchUnit();
virtual ~FetchUnit();
};
 
}
#endif /*InstRUCTION_H_*/
/trunk/sw/iss/cpu/FixedPointUnit.hh
0,0 → 1,11
#ifndef FIXEDPOINTUNIT_H_
#define FIXEDPOINTUNIT_H_
 
class FixedPointUnit
{
public:
FixedPointUnit();
virtual ~FixedPointUnit();
};
 
#endif /*FIXEDPOINTUNIT_H_*/
/trunk/sw/iss/cpu/RegisterFile.cc
0,0 → 1,80
/*!
AEMB INSTRUCTION SET SIMULATOR
Copyright (C) 2009 Shawn Tan <shawn.tan@aeste.net>
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
 
This program is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
General Public License for more details.
 
You should have received a copy of the GNU General Public License
along with this program. If not, see
<http://www.gnu.org/licenses/>.
*/
 
#include <assert.h>
 
#include "RegisterFile.hh"
 
using namespace std;
 
namespace aemb {
 
void RegisterFile::setRegister(const int gpr, const int data)
{
regfile.at(gpr) = data;
}
 
int RegisterFile::getRegister(const int gpr)
{
return (gpr > 0) ? regfile.at(gpr) : 0;
}
 
int RegisterFile::getSpecial(const int sfr)
{
int tmp;
switch (sfr) {
case SFR_MSR:
tmp = rsfr;
break;
default: // invalid sfr
assert(0);
break;
}
return tmp;
}
 
void RegisterFile::setSpecial(const int sfr, const int imm32)
{
switch (sfr) {
case SFR_MSR:
rsfr = imm32;
break;
default: // invalid sfr
assert(0);
break;
}
}
 
void RegisterFile::reset()
{
regfile.clear();
for (int i=0; i<32; ++i) {
regfile.push_back(0);
}
}
 
RegisterFile::RegisterFile()
{
}
 
RegisterFile::~RegisterFile()
{
}
 
}
/trunk/sw/iss/cpu/FetchUnit.cc
0,0 → 1,57
/*!
AEMB INSTRUCTION SET SIMULATOR
Copyright (C) 2009 Shawn Tan <shawn.tan@aeste.net>
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
 
This program is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
General Public License for more details.
 
You should have received a copy of the GNU General Public License
along with this program. If not, see
<http://www.gnu.org/licenses/>.
*/
 
#include <assert.h>
#include "FetchUnit.hh"
 
namespace aemb
{
 
int FetchUnit::getPC()
{
return r_pc;
}
 
void FetchUnit::setPC(const int pc)
{
assert( !(pc & 0x03) ); // check for alignment
r_pc = pc;
}
InstFormat FetchUnit::tokInst(const int opc)
{
InstFormat tmp;
tmp.word = opc;
return tmp;
}
 
void FetchUnit::reset()
{
setPC(0);
}
 
FetchUnit::FetchUnit()
{
}
 
FetchUnit::~FetchUnit()
{
}
 
}
/trunk/sw/iss/cpu/FixedPointUnit.cc
0,0 → 1,9
#include "FixedPointUnit.hh"
 
FixedPointUnit::FixedPointUnit()
{
}
 
FixedPointUnit::~FixedPointUnit()
{
}
/trunk/sw/iss/mem/aembDataMemory.cc File deleted
/trunk/sw/iss/mem/aembInstMemory.cc File deleted
/trunk/sw/iss/mem/aembDataMemory.hh File deleted
/trunk/sw/iss/mem/aembInstMemory.hh File deleted
/trunk/sw/iss/mem/DataMemory.hh
0,0 → 1,54
/*!
AEMB INSTRUCTION SET SIMULATOR
Copyright (C) 2009 Shawn Tan <shawn.tan@aeste.net>
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
 
This program is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
General Public License for more details.
 
You should have received a copy of the GNU General Public License
along with this program. If not, see
<http://www.gnu.org/licenses/>.
*/
 
#ifndef DataMemory_H_
#define DataMemory_H_
 
#include <map>
 
using std::map;
 
class DataMemory
{
map<int,int> mem;
public:
/**
* Generic memory read
* @param addr Address to read.
* @return memory word read.
* */
int getData(const int addr);
 
/**
* Generic memory write
* @param addr Address to write
* @param data Data to write
*/
void putData(const int addr, const int data);
 
/**
* Align address
* @param addr Address to align
**/
 
DataMemory();
virtual ~DataMemory();
};
 
#endif /*DataMemory_H_*/
/trunk/sw/iss/mem/InstMemory.hh
0,0 → 1,65
/*!
AEMB INSTRUCTION SET SIMULATOR
Copyright (C) 2009 Shawn Tan <shawn.tan@aeste.net>
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
 
This program is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
General Public License for more details.
 
You should have received a copy of the GNU General Public License
along with this program. If not, see
<http://www.gnu.org/licenses/>.
*/
 
#ifndef AEMBINSTMEMORY_H_
#define AEMBINSTMEMORY_H_
 
#include <map>
 
using std::map;
 
namespace aemb
{
 
class InstMemory
{
map<int,int> mem; ///< Instruction memory storage
 
/**
* Generic memory write
* @param addr Address to write
* @param data Data to write
*/
void putInst(const int addr, const int data);
 
public:
/**
* Generic memory read
* @param addr Address to read.
* @return memory word read.
* */
int getInst(const int addr);
 
/**
* Read VMEM from stdin.
* @return size of the instruction space
**/
int readVmem();
 
void dumpMem();
 
InstMemory();
virtual ~InstMemory();
};
 
}
#endif /*AEMBINSTMEMORY_H_*/
/trunk/sw/iss/mem/DataMemory.cc
0,0 → 1,44
/*!
AEMB INSTRUCTION SET SIMULATOR
Copyright (C) 2009 Shawn Tan <shawn.tan@aeste.net>
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
 
This program is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
General Public License for more details.
 
You should have received a copy of the GNU General Public License
along with this program. If not, see
<http://www.gnu.org/licenses/>.
*/
#include "DataMemory.hh"
#include <utility>
 
using std::map;
using std::make_pair;
 
void DataMemory::putData(const int addr, const int data)
{
int word = addr >> 2; // word align the address
mem.insert(make_pair(word, data));
}
 
int DataMemory::getData(const int addr)
{
int word = addr >> 2; // word align the address
map<int,int>::iterator data = mem.find(word);
return data->second;
}
 
DataMemory::DataMemory()
{
}
 
DataMemory::~DataMemory()
{
}
/trunk/sw/iss/mem/InstMemory.cc
0,0 → 1,116
/*!
AEMB INSTRUCTION SET SIMULATOR
Copyright (C) 2009 Shawn Tan <shawn.tan@aeste.net>
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
 
This program is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
General Public License for more details.
 
You should have received a copy of the GNU General Public License
along with this program. If not, see
<http://www.gnu.org/licenses/>.
*/
 
#include "InstMemory.hh"
 
#include <utility>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <assert.h>
 
using namespace std;
 
namespace aemb
{
 
void InstMemory::putInst(const int addr, const int data)
{
int word = addr >> 2; // word align the address
mem.insert(make_pair(word, data));
}
 
int InstMemory::getInst(const int addr)
{
int word = addr >> 2; // word align the address
assert(!(addr & 0x03)); // check word alignment
map<int,int>::iterator data = mem.find(word);
assert(data != mem.end()); // check if the address is valid
return data->second;
}
 
int InstMemory::readVmem()
{
char str[255];
char *tok = NULL;
char *cend = NULL;
long addr, data;
 
while (fgets(str, 255, stdin) != NULL) {
switch(str[0]) {
case '@':
// extract address
tok = strtok(str," ");
cend = tok;
cend++;
addr = strtoul(cend, &cend, 16);
#ifndef NDEBUG
printf("\n");
#endif
// extract data
//tok = strtok(NULL," ");
while ((tok = strtok(NULL, " ")) != NULL) {
data = strtoul(tok, &cend, 16);
putInst((addr << 2), data);
 
#ifndef NDEBUG
printf("\t%X:%.8X", (unsigned int)addr,(unsigned int)data);
#endif
 
++addr;
}
break;
 
default: // ignored line
//fprintf(stderr,"*** Error parsing VMEM format ***\n");
break;
}
}
#ifndef NDEBUG
printf("\nVMEM size: %d",mem.size());
#endif
return mem.size();
}
 
void InstMemory::dumpMem()
{
map<int,int>::iterator iter;
for (iter = mem.begin(); iter != mem.end(); ++iter) {
#ifndef NDEBUG
printf("\n%X : %.8X",iter->first, iter->second);
#endif
}
}
 
InstMemory::InstMemory()
{
}
 
InstMemory::~InstMemory()
{
}
 
}

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