OpenCores
URL https://opencores.org/ocsvn/ahb_master/ahb_master/trunk

Subversion Repositories ahb_master

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  • This comparison shows the changes necessary to convert path
    /ahb_master
    from Rev 8 to Rev 9
    Reverse comparison

Rev 8 → Rev 9

/trunk/run/robust_ahb_master.pro
0,0 → 1,14
##RobustVerilog project
 
SRCFILE = ahb_master.v
DEFFILE =
 
OUTDIR = out
 
INCDIR += ../src/base
INCDIR += ../src/gen
 
LIST = list.txt
+LISTPATH
 
+HEADER
/trunk/run/run.bat
1,4 → 1,6
 
echo off
 
..\..\..\robust.exe ../src/base/ahb_master.v -od out -I ../src/gen -list list.txt -listpath -header -gui
::..\..\..\robust.exe ../src/base/ahb_master.v -od out -I ../src/gen -list list.txt -listpath -header -gui
 
..\..\..\robust.exe robust_ahb_master.pro -gui %1 %2 %3
/trunk/run/run.sh
1,6 → 1,6
#!/bin/bash
 
../../../robust -ver
../../../robust -null
if [ $? -eq 0 ];then
ROBUST=../../../robust
else
8,4 → 8,5
ROBUST=../../../robust-lite
fi
 
$ROBUST ../src/base/ahb_master.v -od out -I ../src/gen -list list.txt -listpath -header -gui ${@}
#$ROBUST ../src/base/ahb_master.v -od out -I ../src/gen -list list.txt -listpath -header -gui ${@}
$ROBUST robust_ahb_master.pro -gui ${@}
/trunk/src/base/def_axi2ahb_static.txt
27,7 → 27,7
//// ////
//////////////////////////////////////////////////////////////////##>
 
SWAP MODEL_NAME AXI2AHB bridge
SWAP.GLOBAL MODEL_NAME AXI2AHB bridge
 
VERIFY ((DATA_BITS==32) || (DATA_BITS==64))
/trunk/src/base/axi2ahb.v
36,7 → 36,7
CHECK CONST(DATA_BITS)
CHECK CONST(ID_BITS)
CHECK CONST(CMD_DEPTH)
 
module PREFIX_axi2ahb (PORTS);
 
input clk;
/trunk/src/base/def_ahb_master.txt
32,7 → 32,7
INCLUDE def_axi_master_rand.txt
INCLUDE def_axi2ahb.txt
 
SWAP MODEL_NAME AHB master stub
SWAP.GLOBAL MODEL_NAME AHB master stub
 
SWAP.GLOBAL #FFD #1 ## flip-flop delay
 
/trunk/src/base/def_axi2ahb.txt
29,7 → 29,7
 
INCLUDE def_axi2ahb_static.txt
 
SWAP #FFD #1 ## flip-flop delay
SWAP.GLOBAL #FFD #1 ## flip-flop delay
 
SWAP.USER PREFIX axi2ahb ## prefix for all modules and file names
 

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