URL
https://opencores.org/ocsvn/an-fpga-implementation-of-low-latency-noc-based-mpsoc/an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk
Subversion Repositories an-fpga-implementation-of-low-latency-noc-based-mpsoc
Compare Revisions
- This comparison shows the changes necessary to convert path
/an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk/mpsoc/perl_gui/lib/perl
- from Rev 17 to Rev 18
- ↔ Reverse comparison
Rev 17 → Rev 18
/aeMB.pl
File deleted
/ip.pm
19,6 → 19,7
my $self; |
$self = {}; |
my $dir = Cwd::getcwd(); |
$dir =~ s/ /\\ /g; |
my @files = glob "$dir/lib/ip/*.IP"; |
for my $p (@files){ |
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/mpsoc_gen.pl
172,7 → 172,8
my $mpsoc=shift; |
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my $path=$mpsoc->mpsoc_get_setting('soc_path'); |
my @socs; |
$path =~ s/ /\\ /g; |
my @socs; |
my @files = glob "$path/*.SOC"; |
for my $p (@files){ |
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1083,7 → 1084,8
my ($mpsoc,$info)=@_; |
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my $path=$mpsoc->mpsoc_get_setting('soc_path'); |
my @socs; |
$path=~ s/ /\\ /g; |
my @socs; |
my @files = glob "$path/*.SOC"; |
my @soc_list=$mpsoc-> mpsoc_get_soc_list(); |
my @used_socs; |
1148,8 → 1150,9
|
#copy hdl codes in src_verilog |
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my ($hdl_ref,$warnings)= get_all_files_list($soc); |
my ($hdl_ref,$warnings)= get_all_files_list($soc,"hdl_files"); |
foreach my $f(@{$hdl_ref}){ |
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my $n="$project_dir$f"; |
if (-f "$n") { |
copy ("$n","$target_dir/src_verilog/lib"); |
1175,7 → 1178,7
#} |
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copy ("$dir/lib/verilog/$soc_name.v","$target_dir/src_verilog/tiles/"); |
move ("$dir/lib/verilog/$soc_name.v","$target_dir/src_verilog/tiles/"); |
copy_noc_files($project_dir,"$target_dir/src_verilog/lib"); |
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1187,10 → 1190,10
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copy ("$dir/lib/verilog/$soc_name.h","$target_dir/sw/"); |
move ("$dir/lib/verilog/$soc_name.h","$target_dir/sw/"); |
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use File::Copy::Recursive qw(dircopy); |
dircopy("$dir/../src_processor/aeMB/compiler","$target_dir/sw/") or die("$!\n"); |
#use File::Copy::Recursive qw(dircopy); |
#dircopy("$dir/../src_processor/aeMB/compiler","$target_dir/sw/") or die("$!\n"); |
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my $msg="SoC \"$soc_name\" has been created successfully at $target_dir/ "; |
1236,7 → 1239,7
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gen_socs($mpsoc,$info); |
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copy ("$dir/lib/verilog/$name.v","$target_dir/src_verilog/"); |
move ("$dir/lib/verilog/$name.v","$target_dir/src_verilog/"); |
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/soc_gen.pl
901,7 → 901,7
#} |
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copy ("$dir/lib/verilog/$name.v","$target_dir/src_verilog/"); |
move ("$dir/lib/verilog/$name.v","$target_dir/src_verilog/"); |
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910,7 → 910,7
open(FILE, ">lib/verilog/$name.h") || die "Can not open: $!"; |
print FILE $file_h; |
close(FILE) || die "Error closing file: $!"; |
copy ("$dir/lib/verilog/$name.h","$target_dir/sw/"); |
move ("$dir/lib/verilog/$name.h","$target_dir/sw/"); |
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# Write Software files |
($file_ref,$warnings)= get_all_files_list($soc,"sw_files"); |
/interface_gen.pl
374,25 → 374,11
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} |
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sub port_width_repeat{ |
my ($range,$value)=@_; |
$range=remove_all_white_spaces($range); |
my ($h,$l)=split(':',$range); |
return "$value" if(!defined $h ) ; # port width is 1 |
return "$value" if($h eq "0" && "$l" eq "0"); # port width is 1 |
$h=$l if($h eq "0" && "$l" ne "0"); |
if($h =~ /-1$/){ # the address ranged is endup with -1 |
$h =~ s/-1$//; # remove -1 |
return "\{$h\{$value\}\}" if($h =~ /\)$/); |
return "\{($h)\{$value\}\}" if($h =~ /[\*\.\+\-\^\%\&]/); |
return "\{$h\{$value\}\}"; |
} |
return "\{($h+1){$value}}"; |
} |
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sub port_select{ |
my ($infc_gen,$soc_state,$info,$table,$row)=@_; |
my(%types,%ranges,%names,%connect_types,%connect_ranges,%connect_names,%outport_types,%default_outs); |
/verilog_gen.pl
436,7 → 436,8
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sub port_width_repeat{ |
my ($range,$value)=@_; |
$range=remove_all_white_spaces($range); |
return "$value" if (!defined $range); |
$range= remove_all_white_spaces($range); |
my ($h,$l)=split(':',$range); |
return "$value" if(!defined $h ) ; # port width is 1 |
return "$value" if($h eq "0" && "$l" eq "0"); # port width is 1 |
474,7 → 475,7
($default_out eq 'Don\'t care')? port_width_repeat($new_range,"1\'bx"): $default_out; |
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$unused_wire_v= "$unused_wire_v \tassign ${p} = $default;\n"; |
$unused_wire_v= (defined $unused_wire_v)? "$unused_wire_v \tassign ${p} = $default;\n" : "\tassign ${p} = $default;\n"; |
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} |
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/interface.pm
33,6 → 33,7
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my $dir = Cwd::getcwd(); |
$dir =~ s/ /\\ /g; |
my @files = glob "$dir/lib/interface/*.ITC"; |
for my $p (@files){ |
#print "$p\n"; |
/ip_gen.pl
664,6 → 664,7
$add_remove->signal_connect (clicked => sub{ |
if($p eq "#new#"){ #add new parameter |
my $param= $param_name->get_text(); |
$param=remove_all_white_spaces($param); |
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if( length($param) ){ |
my $deafult=$deafult_entry->get_text(); |