URL
https://opencores.org/ocsvn/an-fpga-implementation-of-low-latency-noc-based-mpsoc/an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk
Subversion Repositories an-fpga-implementation-of-low-latency-noc-based-mpsoc
Compare Revisions
- This comparison shows the changes necessary to convert path
/an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk/mpsoc/rtl/src_peripheral/ni
- from Rev 48 to Rev 54
- ↔ Reverse comparison
Rev 48 → Rev 54
/ni_master.sv
577,10 → 577,10
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assign chan_out.ctrl_chanel.endp_port =1'b1; |
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for (i=0;i<V; i=i+1) begin : vc_ |
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985,26 → 985,26
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wire [Fw-1 : 0] fifo_dout; |
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localparam LBw = log2(LB); |
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flit_buffer #( |
.V(V), |
.B(LB), |
.PCK_TYPE(PCK_TYPE), |
.Fw(Fw), |
.DEBUG_EN(DEBUG_EN), |
.SSA_EN("NO") |
) |
the_ififo |
( |
.din(flit_in), // Data in |
.vc_num_wr(flit_in_vc_num),//write vertual chanel |
.vc_num_wr(flit_in_vc_num),//write virtual chanel |
.wr_en(flit_in_wr), // Write enable |
.vc_num_rd(receive_vc_enable),//read vertual chanel |
.vc_num_rd(receive_vc_enable),//read virtual chanel |
.rd_en(fifo_rd), // Read the next word |
.dout(fifo_dout), // Data out |
.vc_not_empty(ififo_vc_not_empty), |
.reset(reset), |
.clk(clk), |
.ssa_rd({V{1'b0}}) |
.ssa_rd({V{1'b0}}), |
.multiple_dest(), |
.sub_rd_ptr_ld() |
); |
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extract_header_flit_info #( |