OpenCores
URL https://opencores.org/ocsvn/ao68000/ao68000/trunk

Subversion Repositories ao68000

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  • This comparison shows the changes necessary to convert path 
    /ao68000
    from Rev 16 to Rev 17
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  •

Rev 16 → Rev 17

/trunk/rtl/ao68000.v
225,21 → 225,22
`define ALU_MOVEP_R2M_4 5'd10
`define ALU_SIGN_EXTEND 5'd11
`define ALU_ARITHMETIC_LOGIC 5'd12
`define ALU_ABCD_SBCD_ADDX_SUBX 5'd13
`define ALU_ASL_LSL_ROL_ROXL_ASR_LSR_ROR_ROXR_prepare 5'd14
`define ALU_ASL_LSL_ROL_ROXL_ASR_LSR_ROR_ROXR 5'd15
`define ALU_MOVE 5'd16
`define ALU_ADDA_SUBA_CMPA_ADDQ_SUBQ 5'd17
`define ALU_CHK 5'd18
`define ALU_MULS_MULU_DIVS_DIVU 5'd19
`define ALU_BCHG_BCLR_BSET_BTST 5'd20
`define ALU_TAS 5'd21
`define ALU_NEGX_CLR_NEG_NOT_NBCD_SWAP_EXT 5'd22
`define ALU_SIMPLE_LONG_ADD 5'd23
`define ALU_SIMPLE_LONG_SUB 5'd24
`define ALU_MOVE_TO_CCR_SR_RTE_RTR_STOP_LOGIC_TO_CCR_SR 5'd25
`define ALU_SIMPLE_MOVE 5'd26
`define ALU_LINK_MOVE 5'd27
`define ALU_ABCD_SBCD_ADDX_SUBX_prepare 5'd13
`define ALU_ABCD_SBCD_ADDX_SUBX 5'd14
`define ALU_ASL_LSL_ROL_ROXL_ASR_LSR_ROR_ROXR_prepare 5'd15
`define ALU_ASL_LSL_ROL_ROXL_ASR_LSR_ROR_ROXR 5'd16
`define ALU_MOVE 5'd17
`define ALU_ADDA_SUBA_CMPA_ADDQ_SUBQ 5'd18
`define ALU_CHK 5'd19
`define ALU_MULS_MULU_DIVS_DIVU 5'd20
`define ALU_BCHG_BCLR_BSET_BTST 5'd21
`define ALU_TAS 5'd22
`define ALU_NEGX_CLR_NEG_NOT_NBCD_SWAP_EXT 5'd23
`define ALU_SIMPLE_LONG_ADD 5'd24
`define ALU_SIMPLE_LONG_SUB 5'd25
`define ALU_MOVE_TO_CCR_SR_RTE_RTR_STOP_LOGIC_TO_CCR_SR 5'd26
`define ALU_SIMPLE_MOVE 5'd27
`define ALU_LINK_MOVE 5'd28
 
`define BRANCH_IDLE 4'd0
`define BRANCH_movem_loop 4'd1 // BRANCH(movem_loop == 4'b1000)
315,79 → 316,79
`define MICRO_DATA_branch micro_data[83:80]
`define MICRO_DATA_procedure micro_data[87:84]
 
`define MICROPC_MOVE 9'd231
`define MICROPC_MOVE_USP_to_An 9'd400
`define MICROPC_TAS 9'd332
`define MICROPC_BSR 9'd430
`define MICROPC_MOVE 9'd232
`define MICROPC_MOVE_USP_to_An 9'd401
`define MICROPC_TAS 9'd333
`define MICROPC_BSR 9'd431
`define MICROPC_ADDRESS_BUS_TRAP 9'd3
`define MICROPC_MOVEP_register_to_memory 9'd106
`define MICROPC_NEGX_CLR_NEG_NOT_NBCD 9'd337
`define MICROPC_RTS 9'd471
`define MICROPC_NEGX_CLR_NEG_NOT_NBCD 9'd338
`define MICROPC_RTS 9'd472
`define MICROPC_MAIN_LOOP 9'd53
`define MICROPC_ADDA_SUBA 9'd268
`define MICROPC_MOVE_TO_CCR_MOVE_TO_SR 9'd391
`define MICROPC_MOVE_FROM_SR 9'd388
`define MICROPC_ADDA_SUBA 9'd269
`define MICROPC_MOVE_TO_CCR_MOVE_TO_SR 9'd392
`define MICROPC_MOVE_FROM_SR 9'd389
`define MICROPC_LOAD_EA_d8_PC_Xn 9'd79
`define MICROPC_TRAP_ENTRY 9'd35
`define MICROPC_PERFORM_EA_READ_memory 9'd89
`define MICROPC_RESET 9'd485
`define MICROPC_RESET 9'd486
`define MICROPC_PERFORM_EA_WRITE_Dn 9'd91
`define MICROPC_ASL_LSL_ROL_ROXL_ASR_LSR_ROR_ROXR_all_memory 9'd225
`define MICROPC_MOVEA 9'd239
`define MICROPC_TST 9'd344
`define MICROPC_BTST_register 9'd326
`define MICROPC_ASL_LSL_ROL_ROXL_ASR_LSR_ROR_ROXR_all_memory 9'd226
`define MICROPC_MOVEA 9'd240
`define MICROPC_TST 9'd345
`define MICROPC_BTST_register 9'd327
`define MICROPC_LOAD_EA_d8_An_Xn 9'd68
`define MICROPC_MULS_MULU_DIVS_DIVU 9'd290
`define MICROPC_MOVEQ 9'd307
`define MICROPC_CMPA 9'd275
`define MICROPC_EOR 9'd245
`define MICROPC_MULS_MULU_DIVS_DIVU 9'd291
`define MICROPC_MOVEQ 9'd308
`define MICROPC_CMPA 9'd276
`define MICROPC_EOR 9'd246
`define MICROPC_LOAD_EA_xxx_W 9'd72
`define MICROPC_DBcc 9'd374
`define MICROPC_DBcc 9'd375
`define MICROPC_CMPI 9'd184
`define MICROPC_LOAD_EA_xxx_L 9'd74
`define MICROPC_CMPM 9'd205
`define MICROPC_MOVE_USP_to_USP 9'd395
`define MICROPC_ADDQ_SUBQ_not_An 9'd348
`define MICROPC_ULNK 9'd419
`define MICROPC_EXG 9'd197
`define MICROPC_ADD_to_mem_SUB_to_mem_AND_to_mem_OR_to_mem 9'd250
`define MICROPC_Bcc_BRA 9'd362
`define MICROPC_CMPM 9'd206
`define MICROPC_MOVE_USP_to_USP 9'd396
`define MICROPC_ADDQ_SUBQ_not_An 9'd349
`define MICROPC_ULNK 9'd420
`define MICROPC_EXG 9'd198
`define MICROPC_ADD_to_mem_SUB_to_mem_AND_to_mem_OR_to_mem 9'd251
`define MICROPC_Bcc_BRA 9'd363
`define MICROPC_PERFORM_EA_READ_An 9'd86
`define MICROPC_LOAD_EA_d16_PC 9'd76
`define MICROPC_NOP 9'd479
`define MICROPC_NOP 9'd480
`define MICROPC_MOVEM_register_to_memory_predecrement 9'd131
`define MICROPC_RTE_RTR 9'd459
`define MICROPC_TRAP 9'd480
`define MICROPC_ADDQ_SUBQ_An 9'd351
`define MICROPC_RTE_RTR 9'd460
`define MICROPC_TRAP 9'd481
`define MICROPC_ADDQ_SUBQ_An 9'd352
`define MICROPC_MOVEM_register_to_memory_control 9'd147
`define MICROPC_BTST_immediate 9'd315
`define MICROPC_BTST_immediate 9'd316
`define MICROPC_MOVEP_memory_to_register 9'd98
`define MICROPC_PERFORM_EA_WRITE_An 9'd92
`define MICROPC_CHK 9'd281
`define MICROPC_Scc 9'd355
`define MICROPC_JMP 9'd442
`define MICROPC_CHK 9'd282
`define MICROPC_Scc 9'd356
`define MICROPC_JMP 9'd443
`define MICROPC_PEA 9'd168
`define MICROPC_SAVE_EA_minus_An 9'd97
`define MICROPC_ANDI_EORI_ORI_ADDI_SUBI 9'd174
`define MICROPC_BCHG_BCLR_BSET_immediate 9'd310
`define MICROPC_BCHG_BCLR_BSET_immediate 9'd311
`define MICROPC_LOAD_EA_An 9'd62
`define MICROPC_PERFORM_EA_READ_imm 9'd87
`define MICROPC_ADD_to_Dn_SUB_to_Dn_AND_to_Dn_OR_to_Dn 9'd255
`define MICROPC_ADD_to_Dn_SUB_to_Dn_AND_to_Dn_OR_to_Dn 9'd256
`define MICROPC_LEA 9'd162
`define MICROPC_TRAPV 9'd482
`define MICROPC_LINK 9'd403
`define MICROPC_TRAPV 9'd483
`define MICROPC_LINK 9'd404
`define MICROPC_ABCD_SBCD_ADDX_SUBX 9'd189
`define MICROPC_BCHG_BCLR_BSET_register 9'd321
`define MICROPC_BCHG_BCLR_BSET_register 9'd322
`define MICROPC_PERFORM_EA_READ_Dn 9'd85
`define MICROPC_LOAD_EA_illegal_command 9'd83
`define MICROPC_ORI_to_CCR_ORI_to_SR_ANDI_to_CCR_ANDI_to_SR_EORI_to_CCR_EORI_to_SR 9'd178
`define MICROPC_CMP 9'd262
`define MICROPC_SWAP_EXT 9'd340
`define MICROPC_STOP 9'd488
`define MICROPC_CMP 9'd263
`define MICROPC_SWAP_EXT 9'd341
`define MICROPC_STOP 9'd489
`define MICROPC_PERFORM_EA_WRITE_memory 9'd93
`define MICROPC_JSR 9'd450
`define MICROPC_JSR 9'd451
`define MICROPC_LOAD_EA_minus_An 9'd63
`define MICROPC_ASL_LSL_ROL_ROXL_ASR_LSR_ROR_ROXR_all_immediate_register 9'd212
`define MICROPC_ASL_LSL_ROL_ROXL_ASR_LSR_ROR_ROXR_all_immediate_register 9'd213
`define MICROPC_SAVE_EA_An_plus 9'd95
`define MICROPC_LOAD_EA_d16_An 9'd65
`define MICROPC_LOAD_EA_An_plus 9'd62
2772,11 → 2773,11
 
always @(posedge clock or negedge reset_n) begin
if(reset_n == 1'b0) begin
sr <= { 1'b0, 1'b0, 1'b1, 2'b0, 3'b111, 8'b0 };
result <= 32'd0;
alu_signal <= 1'b0;
sr <= { 1'b0, 1'b0, 1'b1, 2'b0, 3'b111, 8'b0 };
result <= 32'd0;
alu_signal <= 1'b0;
interrupt_mask_copy <= 3'b0;
was_interrupt <= 1'b0;
was_interrupt <= 1'b0;
end
else begin
case(alu_control)
2892,10 → 2893,10
// X not affected
end
end
 
`ALU_ABCD_SBCD_ADDX_SUBX: begin // 259 LE
`ALU_ABCD_SBCD_ADDX_SUBX_prepare: begin
// ABCD
if( ir[14:12] == 3'b100 ) begin
if( ir[14:12] == 3'b100) begin
result[13:8] = {1'b0, operand1[3:0]} + {1'b0, operand2[3:0]} + {4'b0, sr[4]};
result[19:14] = {1'b0, operand1[7:4]} + {1'b0, operand2[7:4]};
2902,6 → 2903,21
result[31:23] = operand1[7:0] + operand2[7:0] + {7'b0, sr[4]};
result[13:8] = (result[13:8] > 6'd9) ? (result[13:8] + 6'd6) : result[13:8];
end
// SBCD
else if( ir[14:12] == 3'b000 ) begin
result[13:8] = 6'd32 + {2'b0, operand1[3:0]} - {2'b0, operand2[3:0]} - {5'b0, sr[4]};
result[19:14] = 6'd32 + {2'b0, operand1[7:4]} - {2'b0, operand2[7:4]};
result[31:23] = operand1[7:0] - operand2[7:0] - {7'b0, sr[4]};
result[13:8] = (result[13:8] < 6'd32) ? (result[13:8] - 6'd6) : result[13:8];
end
end
`ALU_ABCD_SBCD_ADDX_SUBX: begin
// ABCD
if( ir[14:12] == 3'b100) begin
result[19:14] = (result[13:8] > 6'h1F) ? (result[19:14] + 6'd2) :
(result[13:8] > 6'h0F) ? (result[19:14] + 6'd1) :
result[19:14];
2920,12 → 2936,6
end
// SBCD
else if( ir[14:12] == 3'b000 ) begin
result[13:8] = 6'd32 + {2'b0, operand1[3:0]} - {2'b0, operand2[3:0]} - {5'b0, sr[4]};
result[19:14] = 6'd32 + {2'b0, operand1[7:4]} - {2'b0, operand2[7:4]};
result[31:23] = operand1[7:0] - operand2[7:0] - {7'b0, sr[4]};
result[13:8] = (result[13:8] < 6'd32) ? (result[13:8] - 6'd6) : result[13:8];
result[19:14] = (result[13:8] < 6'd16) ? (result[19:14] - 6'd2) :
(result[13:8] < 6'd32) ? (result[19:14] - 6'd1) :
result[19:14];
2943,17 → 2953,9
sr[1] <= (result[30] == 1'b1 && result[7] == 1'b0) ? 1'b1 : 1'b0;
end
// ADDX
else if( ir[14:12] == 3'b101 ) result[31:0] = operand1[31:0] + operand2[31:0] + sr[4];
// SUBX
else if( ir[14:12] == 3'b001 ) result[31:0] = operand1[31:0] - operand2[31:0] - sr[4];
 
// Z
sr[2] <= sr[2] & `Z;
// N
sr[3] <= `Rm;
 
// ADDX
if(ir[14:12] == 3'b101 ) begin
else if( ir[14:12] == 3'b101 ) begin
result[31:0] = operand1[31:0] + operand2[31:0] + sr[4];
// C,X,V
sr[0] <= (`Sm & `Dm) | (~`Rm & `Dm) | (`Sm & ~`Rm);
sr[4] <= (`Sm & `Dm) | (~`Rm & `Dm) | (`Sm & ~`Rm); //=ccr[0];
2960,12 → 2962,19
sr[1] <= (`Sm & `Dm & ~`Rm) | (~`Sm & ~`Dm & `Rm);
end
// SUBX
else if(ir[14:12] == 3'b001 ) begin
else if( ir[14:12] == 3'b001 ) begin
result[31:0] = operand1[31:0] - operand2[31:0] - sr[4];
// C,X,V
sr[0] <= (`Sm & ~`Dm) | (`Rm & ~`Dm) | (`Sm & `Rm);
sr[4] <= (`Sm & ~`Dm) | (`Rm & ~`Dm) | (`Sm & `Rm); //=ccr[0];
sr[1] <= (~`Sm & `Dm & ~`Rm) | (`Sm & ~`Dm & `Rm);
end
// Z
sr[2] <= sr[2] & `Z;
// N
sr[3] <= `Rm;
end
 
`ALU_ASL_LSL_ROL_ROXL_ASR_LSR_ROR_ROXR_prepare: begin
/trunk/rtl/ao68000_microcode.mif
11,23 → 11,23
4: 0110111100000000000000010000000000000000000000000000000000000000000000000000000000000000;
5: 0000000000000000000000000000000000000100000000000000000000000000000000000000000000000000;
6: 0000000000000000000000000000000000000000000000000000000000000000000000000011100000000000;
7: 0000000011010000000000000000000000000000000000000000000000000000000000000101000000000000;
7: 0000000011011000000000000000000000000000000000000000000000000000000000000101000000000000;
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22: 0011111100000000000000000000000000000000000000000000000000000000000000000000000000000000;
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23: 0100111111011000000000000000000000000000000000000000000000000000000000000000000000000000;
24: 0000000000000000000000000000000000000000000000000000000000000000100000000000000010100100;
25: 0001111100000000000000000000000000000000000000000000000000000000000000000000000000000000;
26: 0011111100000000000000000000000000000000000000000000000000000000000000000000000000000000;
34,18 → 34,18
27: 0100111100000000000000000000000000000000000000000000000000000000000000000000000000000000;
28: 0000000000000000000000000000000000000000000000000000000000000000111001000000000010100100;
29: 0010111100000000000000000000000000000000000000000000000000000000000000000000000000000000;
30: 0000000011010000000000000000000000000000000000000000000000000000000000000000000000000000;
30: 0000000011011000000000000000000000000000000000000000000000000000000000000000000000000000;
31: 0111111100000000000000000000000000000000000000000000000000000000000000000000000000000000;
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33: 0000000000000000000000000000000000000000000000000000000000000000000000000000100000000000;
34: 1001111100000000000000000000000000000000000000000000000000000000000000000000000000000000;
35: 0000000000000000000000000000000000000000000000000000000000000000000000000011100000000000;
36: 0000000011010000000000000000000000000000000000000000000000000000000000000101000000000000;
36: 0000000011011000000000000000000000000000000000000000000000000000000000000101000000000000;
37: 0000000000010000000000000000000000000000000000000000000000000000000000000000000000000000;
38: 0000000000000000000000000000000000000000000000000000000000000000110000000000000010100100;
39: 0001111100000000000000000000000000000000000000000000000000000000000000000000000000000000;
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41: 0100111111010000000000000000000000000000000000000000000000000000000000000000000000000000;
41: 0100111111011000000000000000000000000000000000000000000000000000000000000000000000000000;
42: 0000000000000000000000000000000000000000000000000000000000000000100000000000000010100100;
43: 0001111100000000000000000000000000000000000000000000000000000000000000000000000000000000;
44: 0011111100000000000000000000000000000000000000000000000000000000000000000000000000000000;
52,7 → 52,7
45: 0100111100000000000000000000000000000000000000000000000000000000000000000000000000000000;
46: 0000000000000000000000000000000000000000000000000000000000000000111001000000000010100100;
47: 0010111100000000000000000000000000000000000000000000000000000000000000000000000000000000;
48: 0000000011010000000000000000000000000000000000000000000000000000000000000000000000000000;
48: 0000000011011000000000000000000000000000000000000000000000000000000000000000000000000000;
49: 0111111100000000000000000000000000000000000000000000000000000000000000000000000000000000;
50: 0000000000000000000000000000000000000000000000000000100000000000000000000000000000000000;
51: 0000000000000000000000000000000000000000000000000000000000000000000000000000100000000000;
169,13 → 169,13
162: 0000000000000000000000000000000000000000000000000000000000000000110000000000001000001001;
163: 0001111100000000000000000000000000000000000000000000000000000000000000000000000000000000;
164: 0000000000000000000000000000000000000000000000000000000000000000000000000001000000000000;
165: 0000000011010000000000000000000000000000000000000000000000000000110000000000000011001010;
165: 0000000011011000000000000000000000000000000000000000000000000000110000000000000011001010;
166: 0011111100000000000000000000000000000000000000000000000000000000000000000000000000000000;
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168: 0000000000000000000000000000000000000000000000000000000000000000110000000000001000001001;
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170: 0000000000000000000000000000000000000000000000000000000000000000000000000001000000000000;
171: 0000000011010000000000000000000000000000000000000000000000000000110000000000000010100100;
171: 0000000011011000000000000000000000000000000000000000000000000000110000000000000010100100;
172: 0001111100000000000000000000000000000000000000000000000000000000000000000000000000000000;
173: 1111111100000000000000000000000000000000000000000000000000000000000000000000000000000000;
174: 1000111100000000000000000000000000000000000000000000000000000001110000000000000010101101;
187,7 → 187,7
180: 0000000000000000000000000000000000000000000000000000000000000000000000001101000000000000;
181: 0000000001100000000000000000000000000000000000000000000000000000000000000000000000000000;
182: 0000000000000000000000000000000000000000000000000000000000000000000000000010100000000000;
183: 0101111111001000000000000000000000000000000000000000000000000000000000000000000000000000;
183: 0101111111010000000000000000000000000000000000000000000000000000000000000000000000000000;
184: 1000111100000000000000000000000000000000000000000000000000000001110000000000000010101101;
185: 0000000000000000000000000000000000000000000000000010000000000001110000000010001010001001;
186: 1110111100000000000000000000000000000000000000000000000000000000000000001000000000000000;
200,299 → 200,300
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194: 0001111100000000000000000000000000000000000000000000000000000000000000000000000000000000;
195: 0010111100000000000000000000000000000000000000000000000000000000000000000000000000000000;
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197: 0000000000000000000000000000000000000000000000000000000000000000110000000000001100001001;
198: 0010111100000000000000000000000000000000000000000000000000000000000000000000000000000000;
199: 0000000011010000000000000000000000000000000000000000000000000000110000000000000010111010;
200: 0010111100000000000000000000000000000000000000000000000000000000000000000000000000000000;
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202: 0000000011010000000000000000000000000000000000000000000000000000110000000000001100001001;
203: 0011111100000000000000000000000000000000000000000000000000000000000000000000000000000000;
204: 0101111100000000000000000000000000000000000000000000000000000000000000000000000000000000;
205: 0000000000000000000000000000000000000000000000000000000000000001110000000000000011000001;
206: 1110111100000000000000000000000000000000000000000000000000000000000000000000000000000000;
207: 0100111100000000000000000000000000000000000000000000000000000000000000000000000000000000;
208: 0000000000000000000000000000000000000000000000000000000000000001110000001000000011000010;
209: 1110111100000000000000000000000000000000000000000000000000000000000000000000000000000000;
210: 0100111101100000000000000000000000000000000000000000000000000000000000000000000000000000;
211: 0101111100000000000000000000000000000000000000000000000000000000000000000000000000000000;
212: 0000000000000000000000000000000000000000000000000000000000000001110000000000000011010010;
213: 0010111100000000000000000000000000000000000000000000000000000000000000000000000000000000;
214: 0000000000000000000000000000000000000000000000000000000000000001110000001000000011010001;
215: 0010111100000000000000000000000000000000000000000000000000000000000000000000000000000000;
216: 0000000000000000000000000000000000000000000000000000000000000000000000011000000000000000;
217: 0000000001110000000000000000000000000000000000000000000000000000000000000000000000000000;
218: 1010111100000000000000000000000000000000000000000000000000000000000000000000000000000000;
219: 0011001100000000000000000000000000000000000000000000000000000000000000000000000000000000;
220: 0000000001111000000000000000000000000000000000000000000000000000000000000000000000000000;
221: 0101111100000000000000000000000000000000000000000000000000000000000000111010100000000000;
222: 1100111100000000000000000000000000000000000000000000000000000000000000000000000000000000;
223: 0011111100000000000000000000000000000000000000000000000000000000000000000000000000000000;
224: 0101111100000000000000000000000000000000000000000000000000000000000000000000000000000000;
225: 0000000000000000000000000000000000000000000000000000000000000000100000000000001110001001;
226: 1110111100000000000000000000000000000000000000000000000000000000000000000000000000000000;
227: 0000000000000000000000000000000000000000000000000000000000000000000000010000000000000000;
228: 0000000001110000000000000000000000000000000000000000000000000000000000000000000000000000;
196: 0000000001101000000000000000000000000000000000000000000000000000000000000000000000000000;
197: 1111111101110000000000000000000000000000000000000000000000000000000000000000000000000000;
198: 0000000000000000000000000000000000000000000000000000000000000000110000000000001100001001;
199: 0010111100000000000000000000000000000000000000000000000000000000000000000000000000000000;
200: 0000000011011000000000000000000000000000000000000000000000000000110000000000000010111010;
201: 0010111100000000000000000000000000000000000000000000000000000000000000000000000000000000;
202: 0011111100000000000000000000000000000000000000000000000000000000000000000000000000000000;
203: 0000000011011000000000000000000000000000000000000000000000000000110000000000001100001001;
204: 0011111100000000000000000000000000000000000000000000000000000000000000000000000000000000;
205: 0101111100000000000000000000000000000000000000000000000000000000000000000000000000000000;
206: 0000000000000000000000000000000000000000000000000000000000000001110000000000000011000001;
207: 1110111100000000000000000000000000000000000000000000000000000000000000000000000000000000;
208: 0100111100000000000000000000000000000000000000000000000000000000000000000000000000000000;
209: 0000000000000000000000000000000000000000000000000000000000000001110000001000000011000010;
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211: 0100111101100000000000000000000000000000000000000000000000000000000000000000000000000000;
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214: 0010111100000000000000000000000000000000000000000000000000000000000000000000000000000000;
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216: 0010111100000000000000000000000000000000000000000000000000000000000000000000000000000000;
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END;
/trunk/doc/src/documentation.v
90,7 → 90,7
* - CISC processor with microcode,
* - WISHBONE revision B.3 compatible MASTER interface,
* - Not cycle exact with the MC68000, some instructions take more cycles to complete, some less,
* - Uses about 4750 LE on Altera Cyclone II and about 45600 bits of RAM for microcode,
* - Uses about 4810 LE on Altera Cyclone II and about 45600 bits of RAM for microcode,
* - Tested against the WinUAE M68000 software emulator. Every 16-bit instruction was tested with random register contents and RAM contents
* (\ref page_verification). The result of execution was compared,
* - Contains a simple prefetch which is capable of holding up to 5 16-bit instruction words,
110,7 → 110,7
* - Data port maximum operand size: 32-bits,
* - Data transfer ordering: BIG ENDIAN,
* - Data transfer sequencing: UNDEFINED,
* - Constraints on <tt>CLK_I</tt> signal: described in \ref page_spec_clocks, maximum frequency: about 82 MHz.
* - Constraints on <tt>CLK_I</tt> signal: described in \ref page_spec_clocks, maximum frequency: about 90 MHz.
*
* <h3>Use</h3>
* - The ao68000 is used as the processor for the OpenCores aoOCS project - Wishbone Amiga OCS SoC(http://opencores.org/project,aoocs).
372,7 → 372,7
* <tr style="background: #CCCCCC; font-weight: bold;">
* <td>Max</td><td>Min</td><td>Resolution</td></tr>
*
* <tr><td>CLK_I</td><td>Input Port</td><td>82</td><td>-</td><td>-</td><td>-</td><td>System clock.</td></tr>
* <tr><td>CLK_I</td><td>Input Port</td><td>90</td><td>-</td><td>-</td><td>-</td><td>System clock.</td></tr>
* </table>
*/
 
/trunk/doc/specification.pdf Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream
/trunk/doc/doxygen/html/page_spec_registers.html
30,7 → 30,7
<div class="contents">
<p>The <a class="el" href="classao68000.html" title="ao68000 top level module.">ao68000</a> IP Core is a WISHBONE Master and does not contain any registers available for reading or writing from outside of the core. </p>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/functions_vars_0x62.html
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</li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/functions_vars_0x74.html
68,7 → 68,7
</li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/functions_0x72.html
110,7 → 110,7
</li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/globals_vars_0x64.html
113,7 → 113,7
</li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:04 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/group__DAT__O.html
27,7 → 27,7
</table>
<p>WISHBONE Master Data Output </p>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/globals_0x65.html
135,7 → 135,7
</li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:04 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/functions_vars_0x6e.html
70,7 → 70,7
</li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/globals_defs_0x67.html
63,7 → 63,7
</li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:04 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/functions_0x6c.html
78,7 → 78,7
</li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/classcondition.html
67,7 → 67,7
<p>Condition tests. </p>
<p>The condition module implements the condition tests of the MC68000. Its inputs are the condition codes and the currently selected test. The output is binary: the test is true or false. The output of the condition module is an input to the <a class="el" href="classmicrocode__branch.html" title="Select the next microcode word to execute.">microcode_branch</a> module, that decides which microcode word to execute next. </p>
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02581">2581</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02582">2582</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<hr/><h2>Member Data Documentation</h2>
<a class="anchor" id="a9e86aa998ac1784273cb0b9cf352b460"></a><!-- doxytag: member="condition::cond" ref="a9e86aa998ac1784273cb0b9cf352b460" args="" -->
<div class="memitem">
80,7 → 80,7
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<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02582">2582</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02583">2583</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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95,7 → 95,7
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02583">2583</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02584">2584</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02584">2584</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02585">2585</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02587">2587</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02588">2588</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02587">2587</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02588">2588</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02587">2587</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02588">2588</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02587">2587</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02588">2588</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<li><a class="el" href="ao68000_8v_source.html">ao68000.v</a></li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:04 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
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<tr><td class="indexkey">Module&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classregisters.html">registers</a></td><td class="indexvalue">Microcode controlled registers </td></tr>
</table>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/functions_vars_0x67.html
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</li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/page_spec_references.html
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&#160; </li>
</ol>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/functions_0x65.html
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</li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
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</li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/group__RMW__O.html
27,7 → 27,7
</table>
<p>WISHBONE Cycle Tag, TAG_TYPE: TGC_O, Read-Modify-Write Cycle. </p>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/page_microcode_compilation.html
41,7 → 41,7
<p>The compiled microcode, in Altera MIF format, is located at <code>./rtl/ao68000_microcode.mif</code>.</p>
<p>The tool <code>./sw/ao68000_tool/</code> (<a class="el" href="page_tool.html">ao68000_tool documentation</a>) is used to compile the microcode source and transform it into a MIF file. The makefile containing instructions for performing the compilation is located at <code>./Makefile</code>. </p>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/globals_vars_0x73.html
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</li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:04 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
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</body>
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</li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:04 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/page_microcode_operations.html
562,6 → 562,10
GenerateMicrocode.entry(newline, <span class="stringliteral">&quot;ALU_ARITHMETIC_LOGIC&quot;</span>);
<span class="keywordflow">return</span> <span class="keyword">new</span> Parser(<span class="keyword">false</span>);
}
Parser <a class="code" href="ao68000_8v.html#ab6294988eed0a5e85d94de7c134351ec">ALU_ABCD_SBCD_ADDX_SUBX_prepare</a>() throws Exception {
GenerateMicrocode.entry(newline, <span class="stringliteral">&quot;ALU_ABCD_SBCD_ADDX_SUBX_prepare&quot;</span>);
<span class="keywordflow">return</span> <span class="keyword">new</span> Parser(<span class="keyword">false</span>);
}
Parser <a class="code" href="ao68000_8v.html#a3e54001e73374bd4f7cfda3de55bd944">ALU_ABCD_SBCD_ADDX_SUBX</a>() throws Exception {
GenerateMicrocode.entry(newline, <span class="stringliteral">&quot;ALU_ABCD_SBCD_ADDX_SUBX&quot;</span>);
<span class="keywordflow">return</span> <span class="keyword">new</span> Parser(<span class="keyword">false</span>);
749,7 → 753,7
}
}
</pre></div> </div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/group__WE__O.html
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</table>
<p>WISHBONE Master Write Enable Output </p>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/classcondition-members.html
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<tr class="memlist"><td><a class="el" href="classcondition.html#a15ddb47120c217921adde375050fe345">Z</a></td><td><a class="el" href="classcondition.html">condition</a></td><td><code> [Signal]</code></td></tr>
<tr class="memlist"><td><a class="el" href="classcondition.html#ae570132e269d0326e6677e4c0920e4d6">N</a></td><td><a class="el" href="classcondition.html">condition</a></td><td><code> [Signal]</code></td></tr>
</table></div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:04 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/globals_vars_0x69.html
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</li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:04 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/globals_0x74.html
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</li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:04 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/globals_defs_0x64.html
117,7 → 117,7
</li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:04 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/group__CTI__O.html
27,7 → 27,7
</table>
<p>WISHBONE Address Tag, TAG_TYPE: TGA_O, Cycle Type Identifier, Incrementing Bus Cycle or End-of-Burst Cycle. </p>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/page_spec_ports.html
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</td></tr>
</table>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/globals_vars_0x6d.html
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</li>
<li>MICROPC_ADD_to_Dn_SUB_to_Dn_AND_to_Dn_OR_to_Dn
: <a class="el" href="ao68000_8v.html#a9a2dc7c44d3211c4cd147781c7ae046e">ao68000.v</a>
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</li>
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<li>MICROPC_ADDA_SUBA
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</li>
<li>MICROPC_ADDQ_SUBQ_An
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<li>MICROPC_ADDQ_SUBQ_not_An
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<li>MICROPC_ADDRESS_BUS_TRAP
: <a class="el" href="ao68000_8v.html#abf77fcda5659a23885d5fc4b0d8368ce">ao68000.v</a>
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</li>
<li>MICROPC_ASL_LSL_ROL_ROXL_ASR_LSR_ROR_ROXR_all_immediate_register
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<li>MICROPC_Bcc_BRA
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</li>
<li>MICROPC_BCHG_BCLR_BSET_immediate
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: <a class="el" href="ao68000_8v.html#a5b4f35f37fcc59f614a2ee1722a1b2bf">ao68000.v</a>
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<li>MICROPC_BSR
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: <a class="el" href="ao68000_8v.html#a8b3919eb82bb79216bfccd40c6a758c8">ao68000.v</a>
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<li>MICROPC_BTST_immediate
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</li>
<li>MICROPC_BTST_register
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</li>
<li>MICROPC_CHK
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: <a class="el" href="ao68000_8v.html#a74fe7da0fc0bc24d1057e3fc53792678">ao68000.v</a>
</li>
<li>MICROPC_CMP
: <a class="el" href="ao68000_8v.html#adaf4d54600ebc6c16fb64a2889f128dd">ao68000.v</a>
: <a class="el" href="ao68000_8v.html#a269b9dd820bd55bb127ad7b044f9eaa4">ao68000.v</a>
</li>
<li>MICROPC_CMPA
: <a class="el" href="ao68000_8v.html#ab928eae11a81b6d124a6f3909ce7b9f1">ao68000.v</a>
: <a class="el" href="ao68000_8v.html#a262e3c3a1fce58c41ac0eed1094d7734">ao68000.v</a>
</li>
<li>MICROPC_CMPI
: <a class="el" href="ao68000_8v.html#abb08e3177e65a08caeb9a11f0e05f1b7">ao68000.v</a>
</li>
<li>MICROPC_CMPM
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: <a class="el" href="ao68000_8v.html#a5d8f6917484c6c494fb59b0801d79c37">ao68000.v</a>
</li>
<li>MICROPC_DBcc
: <a class="el" href="ao68000_8v.html#aa888e8868f9a35fb790e242c1ca553de">ao68000.v</a>
: <a class="el" href="ao68000_8v.html#ada265be45a364b897239ada9fbdc3e9f">ao68000.v</a>
</li>
<li>MICROPC_EOR
: <a class="el" href="ao68000_8v.html#a8a3ee084648ac92e056b83f949fa05d6">ao68000.v</a>
: <a class="el" href="ao68000_8v.html#af12b85c27e484a192ef362226d4c096f">ao68000.v</a>
</li>
<li>MICROPC_EXG
: <a class="el" href="ao68000_8v.html#a9a7a60a90fd7b7a8f511fa58a5474209">ao68000.v</a>
: <a class="el" href="ao68000_8v.html#a64ff00949fa84c24b696dbe7e25b01b0">ao68000.v</a>
</li>
<li>MICROPC_JMP
: <a class="el" href="ao68000_8v.html#a08c56739b00c2c2ecae742fb5c665fe6">ao68000.v</a>
: <a class="el" href="ao68000_8v.html#a1aeaf72ab4278a1d5650f90313a56ba4">ao68000.v</a>
</li>
<li>MICROPC_JSR
: <a class="el" href="ao68000_8v.html#a73d1379623370b7ac490fc7d0efd3b31">ao68000.v</a>
: <a class="el" href="ao68000_8v.html#ad082f357abc9fcebe91ab98012bf20ab">ao68000.v</a>
</li>
<li>MICROPC_LEA
: <a class="el" href="ao68000_8v.html#ac8568f114d824e091d8acf4a589544e7">ao68000.v</a>
</li>
<li>MICROPC_LINK
: <a class="el" href="ao68000_8v.html#a4ac35c6768582e13cf2cfbec564a15c4">ao68000.v</a>
: <a class="el" href="ao68000_8v.html#a78a964bd72f8f8666ca6906112c0906e">ao68000.v</a>
</li>
<li>MICROPC_LOAD_EA_An
: <a class="el" href="ao68000_8v.html#ae43352e5e1db083c51d51faf3344e0ed">ao68000.v</a>
271,22 → 271,22
: <a class="el" href="ao68000_8v.html#aef36b93556fcdd45b5cf7e6e25b84688">ao68000.v</a>
</li>
<li>MICROPC_MOVE
: <a class="el" href="ao68000_8v.html#a1968dd1421c5a999838228e955a82d40">ao68000.v</a>
: <a class="el" href="ao68000_8v.html#ac7fe3df66fb357ed17c83ab0e564f693">ao68000.v</a>
</li>
<li>MICROPC_MOVE_FROM_SR
: <a class="el" href="ao68000_8v.html#aebd7c1774f2faac02d954c85ad1c20f8">ao68000.v</a>
: <a class="el" href="ao68000_8v.html#a8770eb5b48f75ce87ba9194562b6a45c">ao68000.v</a>
</li>
<li>MICROPC_MOVE_TO_CCR_MOVE_TO_SR
: <a class="el" href="ao68000_8v.html#af3ccebcba20d1b81f55e4648bbc6434f">ao68000.v</a>
: <a class="el" href="ao68000_8v.html#a4f73e4f0a5ea52e7f09fa8304c51ccc6">ao68000.v</a>
</li>
<li>MICROPC_MOVE_USP_to_An
: <a class="el" href="ao68000_8v.html#a05e53cc87165049f906e67afa2329da4">ao68000.v</a>
: <a class="el" href="ao68000_8v.html#ab4dbf8db303523650c505aebe911d0db">ao68000.v</a>
</li>
<li>MICROPC_MOVE_USP_to_USP
: <a class="el" href="ao68000_8v.html#a10dd3138063247ca8f12244bf4fe7111">ao68000.v</a>
: <a class="el" href="ao68000_8v.html#a58add1f1e75cbb26a4702c9e9fa5d148">ao68000.v</a>
</li>
<li>MICROPC_MOVEA
: <a class="el" href="ao68000_8v.html#ad35aeb7821957c9eb79f4e294d7b66cf">ao68000.v</a>
: <a class="el" href="ao68000_8v.html#ad6a5cb27bff98a58730dec402f6cc4df">ao68000.v</a>
</li>
<li>MICROPC_MOVEM_memory_to_register
: <a class="el" href="ao68000_8v.html#a357bfb655a15b7d0f5ed5c9f8cb0543a">ao68000.v</a>
304,16 → 304,16
: <a class="el" href="ao68000_8v.html#a32257a88f74b022c9cb886f2e94cd426">ao68000.v</a>
</li>
<li>MICROPC_MOVEQ
: <a class="el" href="ao68000_8v.html#ae2dc5340c2232f74f46c35a5afd48b33">ao68000.v</a>
: <a class="el" href="ao68000_8v.html#a6dda1d34c2e5b66ee78fa55062db0387">ao68000.v</a>
</li>
<li>MICROPC_MULS_MULU_DIVS_DIVU
: <a class="el" href="ao68000_8v.html#a58a0825eeeb1bd2340a0b7c92e36c325">ao68000.v</a>
: <a class="el" href="ao68000_8v.html#a4f3fc5e0e14817aa8c5fcf2d6e94cb8c">ao68000.v</a>
</li>
<li>MICROPC_NEGX_CLR_NEG_NOT_NBCD
: <a class="el" href="ao68000_8v.html#aa7a60b9cfa407e7a0216770809f65b7c">ao68000.v</a>
: <a class="el" href="ao68000_8v.html#a0c2207d05c9c427601dfbff4f8ec1056">ao68000.v</a>
</li>
<li>MICROPC_NOP
: <a class="el" href="ao68000_8v.html#a54e7164c6c76b71ecb76a41df5b05f79">ao68000.v</a>
: <a class="el" href="ao68000_8v.html#affae2e45ac62f4532ecadc8a956b5898">ao68000.v</a>
</li>
<li>MICROPC_ORI_to_CCR_ORI_to_SR_ANDI_to_CCR_ANDI_to_SR_EORI_to_CCR_EORI_to_SR
: <a class="el" href="ao68000_8v.html#a6029c9775c2a59720aa441c066c874a9">ao68000.v</a>
343,13 → 343,13
: <a class="el" href="ao68000_8v.html#aa71f860296e95d302e5773af83ce85f6">ao68000.v</a>
</li>
<li>MICROPC_RESET
: <a class="el" href="ao68000_8v.html#a42a277bcfd7ef54779fed4a28847581c">ao68000.v</a>
: <a class="el" href="ao68000_8v.html#af6f48113546424c28a06371c74e90b77">ao68000.v</a>
</li>
<li>MICROPC_RTE_RTR
: <a class="el" href="ao68000_8v.html#a8e01300271dc2002fc972bde66808baa">ao68000.v</a>
: <a class="el" href="ao68000_8v.html#a311c62af7d1b002fede956d82b0885ef">ao68000.v</a>
</li>
<li>MICROPC_RTS
: <a class="el" href="ao68000_8v.html#a67ea2dfdd15cd8e2863c78cc0a05095d">ao68000.v</a>
: <a class="el" href="ao68000_8v.html#ad47b43ccb423bafa3b41657bd8ecd243">ao68000.v</a>
</li>
<li>MICROPC_SAVE_EA_An_plus
: <a class="el" href="ao68000_8v.html#a1fc7f893ce96f66f9cd2ab9b54f5b319">ao68000.v</a>
358,31 → 358,31
: <a class="el" href="ao68000_8v.html#a70aec9dda79b3867e770a4d250732030">ao68000.v</a>
</li>
<li>MICROPC_Scc
: <a class="el" href="ao68000_8v.html#aecb6a98c1c371a8139043c62665381e1">ao68000.v</a>
: <a class="el" href="ao68000_8v.html#a0ad364bd16b2cee0f573cf3e48eee882">ao68000.v</a>
</li>
<li>MICROPC_STOP
: <a class="el" href="ao68000_8v.html#af2f78dd082b87ed1f681dcfd552aa1e5">ao68000.v</a>
: <a class="el" href="ao68000_8v.html#a68b5c92866588f128e8354134e0ae333">ao68000.v</a>
</li>
<li>MICROPC_SWAP_EXT
: <a class="el" href="ao68000_8v.html#a1d7f386ed0662150d0f6f30b9127da0f">ao68000.v</a>
: <a class="el" href="ao68000_8v.html#a7f4d9cc4a2edb8c62ae8eeea069353d4">ao68000.v</a>
</li>
<li>MICROPC_TAS
: <a class="el" href="ao68000_8v.html#ac178cc762c349f3c500fb01ccf59abe9">ao68000.v</a>
: <a class="el" href="ao68000_8v.html#a3c9098364cbecd36a9fa7a749abc8b89">ao68000.v</a>
</li>
<li>MICROPC_TRAP
: <a class="el" href="ao68000_8v.html#adf4b73792af505dd78bc1b3dac6d2b85">ao68000.v</a>
: <a class="el" href="ao68000_8v.html#a4209e30a2663bb31d78068718659884d">ao68000.v</a>
</li>
<li>MICROPC_TRAP_ENTRY
: <a class="el" href="ao68000_8v.html#a124c8b977fd09ccc4cc2f58fe0952a09">ao68000.v</a>
</li>
<li>MICROPC_TRAPV
: <a class="el" href="ao68000_8v.html#afd036d9ad787d0f27973473c948ac4de">ao68000.v</a>
: <a class="el" href="ao68000_8v.html#ad53e728ddf2ae9cbb7c3108aee81b05d">ao68000.v</a>
</li>
<li>MICROPC_TST
: <a class="el" href="ao68000_8v.html#a9363a6d109adcf7d456074edf17dddca">ao68000.v</a>
: <a class="el" href="ao68000_8v.html#ab46b1e2da931ae1233bc16abe16b8887">ao68000.v</a>
</li>
<li>MICROPC_ULNK
: <a class="el" href="ao68000_8v.html#a56cb4246d3da79cb059495cd6ffea506">ao68000.v</a>
: <a class="el" href="ao68000_8v.html#aa5e8068e7d23c23aabbca8935458e3c2">ao68000.v</a>
</li>
<li>MOVEM_LOOP_IDLE
: <a class="el" href="ao68000_8v.html#a385a47ea219d80dce0e2186c9f01fca6">ao68000.v</a>
419,7 → 419,7
</li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:04 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/group__STB__O.html
27,7 → 27,7
</table>
<p>WISHBONE Master Strobe Output </p>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/globals_defs_0x7a.html
57,7 → 57,7
</li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:04 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/functions_vars_0x64.html
161,7 → 161,7
</li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
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<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/functions_vars_0x76.html
73,7 → 73,7
</li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
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<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/functions_0x62.html
84,7 → 84,7
</li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
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</body>
/trunk/doc/doxygen/html/page_spec_architecture.html
93,7 → 93,7
<p>The <a class="el" href="classmicrocode__branch.html" title="Select the next microcode word to execute.">microcode_branch</a> module is responsible for selecting the next microcode word to execute. This decision is based on the value of the current microcode word, the value of the interrupt privilege level, the state of the current bus cycle and other internal signals.</p>
<p>The <a class="el" href="classmicrocode__branch.html" title="Select the next microcode word to execute.">microcode_branch</a> module implements a simple stack for the microcode addresses. This makes it possible to call subroutines inside the microcode. </p>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/group__DAT__I.html
27,7 → 27,7
</table>
<p>WISHBONE Master Data Input </p>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/ao68000_8v_source.html
253,3188 → 253,3197
<a name="l00225"></a><a class="code" href="ao68000_8v.html#ab602f685f46b237439ecf15880fcf47e">00225</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a0bc85184fda7b9fcbf00afa29be91d42">ALU_MOVEP_R2M_4</a> <span class="vhdllogic">5&#39;d10</span>
<a name="l00226"></a><a class="code" href="ao68000_8v.html#afc500b39154287dadc5832fc02eae035">00226</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a6a119b7268e4e0a78e0307ba0c693ccb">ALU_SIGN_EXTEND</a> <span class="vhdllogic">5&#39;d11</span>
<a name="l00227"></a><a class="code" href="ao68000_8v.html#af7eb69558c00ab2aff17bc03da09fe45">00227</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#ae497ab0b3e0550245c333bdb426d4236">ALU_ARITHMETIC_LOGIC</a> <span class="vhdllogic">5&#39;d12</span>
<a name="l00228"></a><a class="code" href="ao68000_8v.html#a601f3c5b34accd66ec4e72cf420a5e0b">00228</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a3e54001e73374bd4f7cfda3de55bd944">ALU_ABCD_SBCD_ADDX_SUBX</a> <span class="vhdllogic">5&#39;d13</span>
<a name="l00229"></a><a class="code" href="ao68000_8v.html#a391413e929d9cd0171a175a4641c5683">00229</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#ac444f659b2726fd335e839dfadabbfe3">ALU_ASL_LSL_ROL_ROXL_ASR_LSR_ROR_ROXR_prepare</a> <span class="vhdllogic">5&#39;d14</span>
<a name="l00230"></a><a class="code" href="ao68000_8v.html#a5e01e942b55a31404115a39740827c62">00230</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#ac946f278d039868214c441c11fcf2587">ALU_ASL_LSL_ROL_ROXL_ASR_LSR_ROR_ROXR</a> <span class="vhdllogic">5&#39;d15</span>
<a name="l00231"></a><a class="code" href="ao68000_8v.html#a593c63ceb3669ccb39c366b9573bf314">00231</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a268aa82704bd8f1c1548dfc69a12a951">ALU_MOVE</a> <span class="vhdllogic">5&#39;d16</span>
<a name="l00232"></a><a class="code" href="ao68000_8v.html#a1b4695a72b8d0e3f710df6f86030d56c">00232</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a30a87601d2ca38286bb0d486d59f6a07">ALU_ADDA_SUBA_CMPA_ADDQ_SUBQ</a> <span class="vhdllogic">5&#39;d17</span>
<a name="l00233"></a><a class="code" href="ao68000_8v.html#a2b23555c0e46c828ed661af45443f50f">00233</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#af0a4db089a5eb288abf9453ca2d79c26">ALU_CHK</a> <span class="vhdllogic">5&#39;d18</span>
<a name="l00234"></a><a class="code" href="ao68000_8v.html#ab6f46721fa6d6a108c01a61e2d661ee3">00234</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#aed07d190bb88f0cce7768028698020f9">ALU_MULS_MULU_DIVS_DIVU</a> <span class="vhdllogic">5&#39;d19</span>
<a name="l00235"></a><a class="code" href="ao68000_8v.html#ab5f2abdb56e7a6936c4ab271580bba52">00235</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a14b85ce3e5b4ede3b2c4e89f420c8c3c">ALU_BCHG_BCLR_BSET_BTST</a> <span class="vhdllogic">5&#39;d20</span>
<a name="l00236"></a><a class="code" href="ao68000_8v.html#a436fe5adcadbae571eedb35dd98487ac">00236</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#ac7de3ab6c8eec4381bde5e4f61b45761">ALU_TAS</a> <span class="vhdllogic">5&#39;d21</span>
<a name="l00237"></a><a class="code" href="ao68000_8v.html#aa191713af71dd78ddfe6a9dee3d2d1bc">00237</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a07c7e53af3f4995a167966ba18c2728f">ALU_NEGX_CLR_NEG_NOT_NBCD_SWAP_EXT</a> <span class="vhdllogic">5&#39;d22</span>
<a name="l00238"></a><a class="code" href="ao68000_8v.html#ad6a90b18962092a662ad077d57984652">00238</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a32c0e163ff437b07e40593ab59e42fe3">ALU_SIMPLE_LONG_ADD</a> <span class="vhdllogic">5&#39;d23</span>
<a name="l00239"></a><a class="code" href="ao68000_8v.html#a06f84841e35fc97186b630f26f150869">00239</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#aea6fee15f3d775b1a8d262490203c713">ALU_SIMPLE_LONG_SUB</a> <span class="vhdllogic">5&#39;d24</span>
<a name="l00240"></a><a class="code" href="ao68000_8v.html#a3c579fa060ac05434f085b03edf68501">00240</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a5083d98f4b785fe7af85ba1114f678ff">ALU_MOVE_TO_CCR_SR_RTE_RTR_STOP_LOGIC_TO_CCR_SR</a> <span class="vhdllogic">5&#39;d25</span>
<a name="l00241"></a><a class="code" href="ao68000_8v.html#a29a77523d5e44bf1df8a8203c033cc05">00241</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#ab6d6f774c41848f9c33c7b393620be2d">ALU_SIMPLE_MOVE</a> <span class="vhdllogic">5&#39;d26</span>
<a name="l00242"></a><a class="code" href="ao68000_8v.html#ae3067aec1dc26a3d09f0c7a730422110">00242</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#ac439a8b79bd4b213f0f33172bd5e5a73">ALU_LINK_MOVE</a> <span class="vhdllogic">5&#39;d27</span>
<a name="l00243"></a>00243
<a name="l00244"></a><a class="code" href="ao68000_8v.html#af733b52724e9524ce18eae512df35480">00244</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a6cf12df8a04c3df66b43fb7301e424e9">BRANCH_IDLE</a> <span class="vhdllogic">4&#39;d0</span>
<a name="l00245"></a><a class="code" href="ao68000_8v.html#a82d805b282202c87398b9712a85b58f1">00245</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#abdfc603db0ea3694052298e85fb6efad">BRANCH_movem_loop</a> <span class="vhdllogic">4&#39;d1</span> <span class="keyword">// BRANCH(movem_loop == 4&#39;b1000)</span>
<a name="l00246"></a><a class="code" href="ao68000_8v.html#aa62d45e622148f3f284300cd1c8ec385">00246</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#acc65cf5ec49ce78ecf98c956cd2de769">BRANCH_movem_reg</a> <span class="vhdllogic">4&#39;d2</span> <span class="keyword">// BRANCH(movem_reg[0] == 0)</span>
<a name="l00247"></a><a class="code" href="ao68000_8v.html#afc9bc6cac2e242769d2598a29fedf825">00247</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#aa0b5846a5e98be60da75608078377571">BRANCH_operand2</a> <span class="vhdllogic">4&#39;d3</span> <span class="keyword">// BRANCH(operand2[5:0] == 6&#39;b0)</span>
<a name="l00248"></a><a class="code" href="ao68000_8v.html#a7ad9ea4a5ffa00527c26fa64ad75bf4c">00248</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a3db021156e8171951f6b91c78bbb7e1f">BRANCH_alu_signal</a> <span class="vhdllogic">4&#39;d4</span> <span class="keyword">// BRANCH(alu_signal == 1&#39;b0)</span>
<a name="l00249"></a><a class="code" href="ao68000_8v.html#a176308e082b64f5fd73d9f046b6a8594">00249</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a62fe8e5939da15f9f391886fe174183a">BRANCH_alu_mult_div_ready</a> <span class="vhdllogic">4&#39;d5</span> <span class="keyword">// BRANCH(alu_mult_div_ready == 1&#39;b1)</span>
<a name="l00250"></a><a class="code" href="ao68000_8v.html#a30c4a8c9db7c14ea5317270becb6240c">00250</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#af3158a11a9fc793d4aeead4195871507">BRANCH_condition_0</a> <span class="vhdllogic">4&#39;d6</span> <span class="keyword">// BRANCH(condition == 1&#39;b0)</span>
<a name="l00251"></a><a class="code" href="ao68000_8v.html#a4539242544f8cd667a6ce0deac0d788d">00251</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a48d5a0127f3bc738b8503c0713b9fba9">BRANCH_condition_1</a> <span class="vhdllogic">4&#39;d7</span> <span class="keyword">// BRANCH(condition == 1&#39;b1)</span>
<a name="l00252"></a><a class="code" href="ao68000_8v.html#abdf93f72eff40b1a560a95062afe148f">00252</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a0cbdc7b4e718d5cc690b435995bb7708">BRANCH_result</a> <span class="vhdllogic">4&#39;d8</span> <span class="keyword">// BRANCH(result[15:0] == 16&#39;hFFFF)</span>
<a name="l00253"></a><a class="code" href="ao68000_8v.html#a1d95cdc4aa317fc88b00283fb14fe0dd">00253</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a3861f0d4bd11e996bda23577348e86f7">BRANCH_V</a> <span class="vhdllogic">4&#39;d9</span> <span class="keyword">// BRANCH(V == 1&#39;b0)</span>
<a name="l00254"></a><a class="code" href="ao68000_8v.html#abc054cf1d1155b7c0bb40bfa31fe2b66">00254</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a5fb736520363d5359408ed4af63c6125">BRANCH_movep_16</a> <span class="vhdllogic">4&#39;d10</span> <span class="keyword">// BRANCH(ir[6] == 0)</span>
<a name="l00255"></a><a class="code" href="ao68000_8v.html#a2136a9cf3941acd7a5d9c62e282fc6fb">00255</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a79ce1f7b2aa4e141d52316a04977ee60">BRANCH_stop_flag_wait_ir_decode</a> <span class="vhdllogic">4&#39;d11</span> <span class="keyword">// BRANCH(stop_flag == 1&#39;b1) if no branch: wait for prefetch ir valid and decode instruction</span>
<a name="l00256"></a><a class="code" href="ao68000_8v.html#af29c19330ca8b945ab8d9280b0a79c82">00256</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a719e200160515b706ebab9fe1e18c8c7">BRANCH_ir</a> <span class="vhdllogic">4&#39;d12</span> <span class="keyword">// BRANCH(ir[7:0] != 8&#39;b0)</span>
<a name="l00257"></a><a class="code" href="ao68000_8v.html#a77c4ea1006f7e281f908731fa586e28a">00257</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#af396200d0e5941fe60e8d960f2e3aa91">BRANCH_trace_flag_and_interrupt</a> <span class="vhdllogic">4&#39;d13</span> <span class="keyword">// BRANCH(trace_flag == 1&#39;b0 &amp;&amp; interrupt_mask != 3&#39;b000) if no branch: jump to main loop</span>
<a name="l00258"></a><a class="code" href="ao68000_8v.html#ac54a3fc8c9f015e1175bc1793fb7ebfd">00258</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a63f967b1bbe9ad356e3ccbbb2924e03f">BRANCH_group_0_flag</a> <span class="vhdllogic">4&#39;d14</span> <span class="keyword">// BRANCH(group_0_flag == 0)</span>
<a name="l00259"></a><a class="code" href="ao68000_8v.html#ab753c6979146d57589c24a73cb13b501">00259</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a1f24f0ad71fd4d2edd6ead5ef6c3056a">BRANCH_procedure</a> <span class="vhdllogic">4&#39;d15</span> <span class="keyword">// call procedure, return from procedure</span>
<a name="l00260"></a>00260
<a name="l00261"></a><a class="code" href="ao68000_8v.html#ade10675cfd99420bd3a287db52dfc17a">00261</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a98081d1329be92c30eb943724c0cef86">PROCEDURE_IDLE</a> <span class="vhdllogic">4&#39;d0</span>
<a name="l00262"></a><a class="code" href="ao68000_8v.html#a9a6fa21e702ac35eeefb6d4ef6472fdd">00262</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a5c7af3686fb890de6242f973de1ee549">PROCEDURE_call_load_ea</a> <span class="vhdllogic">4&#39;d1</span> <span class="keyword">// load ea</span>
<a name="l00263"></a><a class="code" href="ao68000_8v.html#afc4dc88ce07d49ad1754962b413978ce">00263</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a698b04745cbbec22896235d5cfffac43">PROCEDURE_call_perform_ea_read</a> <span class="vhdllogic">4&#39;d2</span> <span class="keyword">// perform_ea_read</span>
<a name="l00264"></a><a class="code" href="ao68000_8v.html#a87c36a08818823df8de112dbe5caaebf">00264</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#aa98c954da2ac9f709907c8c593b1439e">PROCEDURE_call_perform_ea_write</a> <span class="vhdllogic">4&#39;d3</span> <span class="keyword">// perform_ea_write</span>
<a name="l00265"></a><a class="code" href="ao68000_8v.html#abc8942a868848a7669b61773b6251093">00265</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a30022c5eb1821e27dd5c70d4affbc835">PROCEDURE_call_save_ea</a> <span class="vhdllogic">4&#39;d4</span> <span class="keyword">// save ea</span>
<a name="l00266"></a><a class="code" href="ao68000_8v.html#a8926d78d8690a5f5b6dfa6d41f553f39">00266</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#af842761d13933777546d76bd997e7494">PROCEDURE_return</a> <span class="vhdllogic">4&#39;d5</span> <span class="keyword">// return from procedure</span>
<a name="l00267"></a><a class="code" href="ao68000_8v.html#aa41b49eec539fbca25bc9368c26f077a">00267</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a26a2f20a92ff8ab6f13d6633f3c9475c">PROCEDURE_wait_finished</a> <span class="vhdllogic">4&#39;d6</span> <span class="keyword">// wait for finished signal from bus controler</span>
<a name="l00268"></a><a class="code" href="ao68000_8v.html#acefb835b19db5c68d5b41002f77c8fa0">00268</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#aa072f73b12cd178a44f47980e1bb98cb">PROCEDURE_wait_prefetch_valid</a> <span class="vhdllogic">4&#39;d7</span> <span class="keyword">// wait for prefetch ir valid, 64 bits</span>
<a name="l00269"></a><a class="code" href="ao68000_8v.html#a247183de3681e23a64f17850ae339a46">00269</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a0ef2adec86a42dd30d78e9d259d828fd">PROCEDURE_wait_prefetch_valid_32</a> <span class="vhdllogic">4&#39;d8</span> <span class="keyword">// wait for prefetch ir valid, 32 bits</span>
<a name="l00270"></a><a class="code" href="ao68000_8v.html#a98c5a07ca4b8f55b285464572d984964">00270</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a7950509479648899370516cfa0221c43">PROCEDURE_jump_to_main_loop</a> <span class="vhdllogic">4&#39;d9</span> <span class="keyword">// jump to main loop</span>
<a name="l00271"></a><a class="code" href="ao68000_8v.html#a261ee70d7c2dd9f84476f009b062eeb0">00271</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a318a0823db3c0aa8dfeae26f05495e5b">PROCEDURE_push_micropc</a> <span class="vhdllogic">4&#39;d10</span> <span class="keyword">// save current micro_pc</span>
<a name="l00272"></a><a class="code" href="ao68000_8v.html#ad43b342d0876d583ad40ecf910724954">00272</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a2c67cc2747b67d04684855e14c2b9fbb">PROCEDURE_call_trap</a> <span class="vhdllogic">4&#39;d11</span> <span class="keyword">// call trap service procedure</span>
<a name="l00273"></a><a class="code" href="ao68000_8v.html#a01e61f6c91ea808bf15c0bc327fcd3ca">00273</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#acfe58e669e77374120e6e534fc621316">PROCEDURE_pop_micropc</a> <span class="vhdllogic">4&#39;d12</span> <span class="keyword">// pop most recent micro_pc and forget</span>
<a name="l00274"></a><a class="code" href="ao68000_8v.html#ab90a26325a5af04ad9433faa3edd5e2e">00274</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#ac74b95b43e6c95ed82036002767bc22c">PROCEDURE_interrupt_mask</a> <span class="vhdllogic">4&#39;d13</span> <span class="keyword">// if interrupt active continue, else jump to main loop</span>
<a name="l00275"></a><a class="code" href="ao68000_8v.html#aefb64784846ddb9132483912192632d8">00275</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a403d3720f31ad5a5895778bee758fb55">PROCEDURE_call_read</a> <span class="vhdllogic">4&#39;d14</span> <span class="keyword">// load_ea + perform_ea_read</span>
<a name="l00276"></a><a class="code" href="ao68000_8v.html#ad9a98b2cb48c9cb4442ac3ebecd260bc">00276</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a50af2007588b7a528b934ae7672b1214">PROCEDURE_call_write</a> <span class="vhdllogic">4&#39;d15</span> <span class="keyword">// perform_ea_write + save_ea + return</span>
<a name="l00277"></a>00277 <span class="keyword">// OPERATIONS END</span>
<a name="l00278"></a>00278
<a name="l00279"></a>00279 <span class="keyword">/***********************************************************************************************************************</span>
<a name="l00280"></a>00280 <span class="keyword"> Automatically generated by ao68000_tool microcode word bit assignments and addresses</span>
<a name="l00281"></a>00281 <span class="keyword"> ***********************************************************************************************************************/</span>
<a name="l00282"></a>00282 <span class="keyword">// MICROCODE - DO NOT EDIT BELOW</span>
<a name="l00283"></a><a class="code" href="ao68000_8v.html#a6ef81425ac3daa6970f3df92db1a6325">00283</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a3a14e27ef3dcc344f66e5eb0aa93d38d">MICRO_DATA_ea_reg</a> micro_data[<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>]
<a name="l00284"></a><a class="code" href="ao68000_8v.html#aabf523bb3e9ede36111acd537aca70f9">00284</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#aa691c194246c2ac4def5609ba8963326">MICRO_DATA_ea_mod</a> micro_data[<span class="vhdllogic">6</span>:<span class="vhdllogic">3</span>]
<a name="l00285"></a><a class="code" href="ao68000_8v.html#a1ec6741ebf273336ec4584d66ae37ffe">00285</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#ae45014e01523ad88c7b7bd74cdb1b8db">MICRO_DATA_ea_type</a> micro_data[<span class="vhdllogic">10</span>:<span class="vhdllogic">7</span>]
<a name="l00286"></a><a class="code" href="ao68000_8v.html#afebf33d60f4f8be00b3d6fa7afdd326d">00286</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a80f755d97ef46590665dc161a3de3f60">MICRO_DATA_op1</a> micro_data[<span class="vhdllogic">14</span>:<span class="vhdllogic">11</span>]
<a name="l00287"></a><a class="code" href="ao68000_8v.html#aa695bec37252c32e10742b0d9f1e38b6">00287</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#ab1641cfecafe6ff147522b68bd7f9c0d">MICRO_DATA_op2</a> micro_data[<span class="vhdllogic">17</span>:<span class="vhdllogic">15</span>]
<a name="l00288"></a><a class="code" href="ao68000_8v.html#a33a5e1963bf65b251c0f3ff5f7572732">00288</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a600647e8ee417a6f81b00e53f101af5f">MICRO_DATA_address</a> micro_data[<span class="vhdllogic">21</span>:<span class="vhdllogic">18</span>]
<a name="l00289"></a><a class="code" href="ao68000_8v.html#aa7ee2698a06d94f380745c7bbe936426">00289</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a73de1704db2fb003c3a2da4b3f1667de">MICRO_DATA_size</a> micro_data[<span class="vhdllogic">25</span>:<span class="vhdllogic">22</span>]
<a name="l00290"></a><a class="code" href="ao68000_8v.html#ad0b1624b8cc4a2d03fce11254f960372">00290</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a73831c7c30f75ec6e263ce47f1a3fb64">MICRO_DATA_movem_modreg</a> micro_data[<span class="vhdllogic">28</span>:<span class="vhdllogic">26</span>]
<a name="l00291"></a><a class="code" href="ao68000_8v.html#a4176bd40d99ee111db2bea0109349a1a">00291</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a93b7332d93eddbed779bba21295794f3">MICRO_DATA_movem_loop</a> micro_data[<span class="vhdllogic">30</span>:<span class="vhdllogic">29</span>]
<a name="l00292"></a><a class="code" href="ao68000_8v.html#a6c3ad387c24516778b554de5f544e9bf">00292</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a5246b6d3ea1d05aa2d34597666a8da31">MICRO_DATA_movem_reg</a> micro_data[<span class="vhdllogic">32</span>:<span class="vhdllogic">31</span>]
<a name="l00293"></a><a class="code" href="ao68000_8v.html#aa198c1bed97e0ad6f7f4f6f24c77766d">00293</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a15830df6bfc267949eaeb9c862ec021a">MICRO_DATA_ir</a> micro_data[<span class="vhdllogic">34</span>:<span class="vhdllogic">33</span>]
<a name="l00294"></a><a class="code" href="ao68000_8v.html#aa1775c009cc16c3a6bcc068f1de3bd9f">00294</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a35a9274fdd4fa537efdb15f0b0b787e6">MICRO_DATA_pc</a> micro_data[<span class="vhdllogic">37</span>:<span class="vhdllogic">35</span>]
<a name="l00295"></a><a class="code" href="ao68000_8v.html#a5f10c6462da6c4004edd6ba127cc3925">00295</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#ac4878c2a7cf765d443c1c9da238b5ac9">MICRO_DATA_trap</a> micro_data[<span class="vhdllogic">41</span>:<span class="vhdllogic">38</span>]
<a name="l00296"></a><a class="code" href="ao68000_8v.html#a1344c6a09cd514e33cf879638e0c0f3f">00296</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a4deaea8bc3d376dac501f3a314f1490c">MICRO_DATA_offset</a> micro_data[<span class="vhdllogic">43</span>:<span class="vhdllogic">42</span>]
<a name="l00297"></a><a class="code" href="ao68000_8v.html#a16f46e3da89023238a3206da9a864245">00297</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#ad722ce87f573d9c6e1010e5a87005383">MICRO_DATA_index</a> micro_data[<span class="vhdllogic">45</span>:<span class="vhdllogic">44</span>]
<a name="l00298"></a><a class="code" href="ao68000_8v.html#af463d6dfe088ed4971bee9cbb4220142">00298</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a5e820e2a23919cb4005a8cc9651c26c0">MICRO_DATA_stop_flag</a> micro_data[<span class="vhdllogic">47</span>:<span class="vhdllogic">46</span>]
<a name="l00299"></a><a class="code" href="ao68000_8v.html#ab6bf25c868a11c4ebe2b87367a5d123b">00299</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#aa913e0fe5ccffe6e2d7e91d43f39f139">MICRO_DATA_trace_flag</a> micro_data[<span class="vhdllogic">49</span>:<span class="vhdllogic">48</span>]
<a name="l00300"></a><a class="code" href="ao68000_8v.html#ae4ccc6dc98a4bd404249c5f291ba4d6a">00300</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a595e837c71d69c5a4d7c4a3c9d64ffb0">MICRO_DATA_group_0_flag</a> micro_data[<span class="vhdllogic">51</span>:<span class="vhdllogic">50</span>]
<a name="l00301"></a><a class="code" href="ao68000_8v.html#ac227ea998ce2e81e10a1be6ec9ebc4c1">00301</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a188c9ee8d0adc5ec2fb732fdece9ea31">MICRO_DATA_instruction_flag</a> micro_data[<span class="vhdllogic">53</span>:<span class="vhdllogic">52</span>]
<a name="l00302"></a><a class="code" href="ao68000_8v.html#a87951ae08bef1208fd636efc0d65cdf3">00302</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#ae152374d2c661e9bfcb222888087b18f">MICRO_DATA_read_modify_write_flag</a> micro_data[<span class="vhdllogic">55</span>:<span class="vhdllogic">54</span>]
<a name="l00303"></a><a class="code" href="ao68000_8v.html#a87d9ca517e0db145b9fa96c1d4f1b48c">00303</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a05f6c84753b5b54fe61fe36a740b739d">MICRO_DATA_do_reset_flag</a> micro_data[<span class="vhdllogic">57</span>:<span class="vhdllogic">56</span>]
<a name="l00304"></a><a class="code" href="ao68000_8v.html#a4512f2422910357f4ae9f0f39ff60e60">00304</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a989be17e3392ddf7c87fcf41a9c1576b">MICRO_DATA_do_interrupt_flag</a> micro_data[<span class="vhdllogic">59</span>:<span class="vhdllogic">58</span>]
<a name="l00305"></a><a class="code" href="ao68000_8v.html#a40acececb0e30e947f36e1ca1bc70e14">00305</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a3935f3fc6e20767fdeee079bdb08648f">MICRO_DATA_do_read_flag</a> micro_data[<span class="vhdllogic">61</span>:<span class="vhdllogic">60</span>]
<a name="l00306"></a><a class="code" href="ao68000_8v.html#ad6b47390e7d45cfdf3ed7898509205b0">00306</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a42e2926c262bd037f32951c89a51067e">MICRO_DATA_do_write_flag</a> micro_data[<span class="vhdllogic">63</span>:<span class="vhdllogic">62</span>]
<a name="l00307"></a><a class="code" href="ao68000_8v.html#a16327822b3b9a8f8b0de245867c0aca0">00307</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#adf7ac746fc276a0c3083d2606df75af4">MICRO_DATA_do_blocked_flag</a> micro_data[<span class="vhdllogic">65</span>:<span class="vhdllogic">64</span>]
<a name="l00308"></a><a class="code" href="ao68000_8v.html#ae04a1798dc92a3bacae2f52455ee8d91">00308</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a0843baa7810722c7e1afd79aa615a9f0">MICRO_DATA_data_write</a> micro_data[<span class="vhdllogic">67</span>:<span class="vhdllogic">66</span>]
<a name="l00309"></a><a class="code" href="ao68000_8v.html#adf492d3aba5a96fb92981329623efa9c">00309</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a08e217a2a40544a7d5c4e916a3b4d6cf">MICRO_DATA_an_address</a> micro_data[<span class="vhdllogic">69</span>:<span class="vhdllogic">68</span>]
<a name="l00310"></a><a class="code" href="ao68000_8v.html#a8f7a4c24e52ade0663ac1d4b47afe44c">00310</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#af767fe70444603fdcde8beb39ef85c8c">MICRO_DATA_an_write_enable</a> micro_data[<span class="vhdllogic">70</span>:<span class="vhdllogic">70</span>]
<a name="l00311"></a><a class="code" href="ao68000_8v.html#aa0630462dc3f0aa3c8ef1440d0f6b5ce">00311</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#aa6a6132c427e511630e6889582d48828">MICRO_DATA_an_input</a> micro_data[<span class="vhdllogic">72</span>:<span class="vhdllogic">71</span>]
<a name="l00312"></a><a class="code" href="ao68000_8v.html#a3fc5b433434a63c13fd4540e85e88622">00312</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a1055ed2c94344c9b59a9061b451fd4b8">MICRO_DATA_dn_address</a> micro_data[<span class="vhdllogic">73</span>:<span class="vhdllogic">73</span>]
<a name="l00313"></a><a class="code" href="ao68000_8v.html#a1e73bf0857c4744890d7f94536512299">00313</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#abb7709933320bf644d6a57c3040538a3">MICRO_DATA_dn_write_enable</a> micro_data[<span class="vhdllogic">74</span>:<span class="vhdllogic">74</span>]
<a name="l00314"></a><a class="code" href="ao68000_8v.html#acd1f66614af2cf0c231cf93248b8582e">00314</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a6dde91e1905423f9fb4184ae3554b5cd">MICRO_DATA_alu</a> micro_data[<span class="vhdllogic">79</span>:<span class="vhdllogic">75</span>]
<a name="l00315"></a><a class="code" href="ao68000_8v.html#a56c56c6560eb00fb6a9ba6211e95cb65">00315</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a156b8e8011ac86392d0e47b50cc1bd12">MICRO_DATA_branch</a> micro_data[<span class="vhdllogic">83</span>:<span class="vhdllogic">80</span>]
<a name="l00316"></a><a class="code" href="ao68000_8v.html#a773f710aeba391c02509192b69de3fbd">00316</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a8356eb451657c128626552b5a360de3a">MICRO_DATA_procedure</a> micro_data[<span class="vhdllogic">87</span>:<span class="vhdllogic">84</span>]
<a name="l00317"></a>00317
<a name="l00318"></a><a class="code" href="ao68000_8v.html#a1968dd1421c5a999838228e955a82d40">00318</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#afadd69027964ef6d7c9f923ed2714bbe">MICROPC_MOVE</a> <span class="vhdllogic">9&#39;d231</span>
<a name="l00319"></a><a class="code" href="ao68000_8v.html#a05e53cc87165049f906e67afa2329da4">00319</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a506e512a7df02654649a4275b676b5f7">MICROPC_MOVE_USP_to_An</a> <span class="vhdllogic">9&#39;d400</span>
<a name="l00320"></a><a class="code" href="ao68000_8v.html#ac178cc762c349f3c500fb01ccf59abe9">00320</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a9d9308b3732ecf15f57a22600ac300b8">MICROPC_TAS</a> <span class="vhdllogic">9&#39;d332</span>
<a name="l00321"></a><a class="code" href="ao68000_8v.html#a0d2cfeb23b6f839077af216e173e1237">00321</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#afefae415ee468c051f367b74183a122b">MICROPC_BSR</a> <span class="vhdllogic">9&#39;d430</span>
<a name="l00322"></a><a class="code" href="ao68000_8v.html#abf77fcda5659a23885d5fc4b0d8368ce">00322</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#ada4b6f4df06a5dcac3ec15d4c8f4d31e">MICROPC_ADDRESS_BUS_TRAP</a> <span class="vhdllogic">9&#39;d3</span>
<a name="l00323"></a><a class="code" href="ao68000_8v.html#a32257a88f74b022c9cb886f2e94cd426">00323</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a2516dd6bb3a4f804a752557b483e077b">MICROPC_MOVEP_register_to_memory</a> <span class="vhdllogic">9&#39;d106</span>
<a name="l00324"></a><a class="code" href="ao68000_8v.html#aa7a60b9cfa407e7a0216770809f65b7c">00324</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a6f040be4f69b57ba9603d5eae6085425">MICROPC_NEGX_CLR_NEG_NOT_NBCD</a> <span class="vhdllogic">9&#39;d337</span>
<a name="l00325"></a><a class="code" href="ao68000_8v.html#a67ea2dfdd15cd8e2863c78cc0a05095d">00325</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a70b05c3577437ee3a51c6b63859242c5">MICROPC_RTS</a> <span class="vhdllogic">9&#39;d471</span>
<a name="l00326"></a><a class="code" href="ao68000_8v.html#aef36b93556fcdd45b5cf7e6e25b84688">00326</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a1e7ad8f4b421f72f5bdea07bef35f864">MICROPC_MAIN_LOOP</a> <span class="vhdllogic">9&#39;d53</span>
<a name="l00327"></a><a class="code" href="ao68000_8v.html#ae1aa62002fb7e0be2dc9d98d0361bc65">00327</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a02c5cdffb720a762c8790dbc86ab1a18">MICROPC_ADDA_SUBA</a> <span class="vhdllogic">9&#39;d268</span>
<a name="l00328"></a><a class="code" href="ao68000_8v.html#af3ccebcba20d1b81f55e4648bbc6434f">00328</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a258ae200cc2cbeccddff03ba18b66a27">MICROPC_MOVE_TO_CCR_MOVE_TO_SR</a> <span class="vhdllogic">9&#39;d391</span>
<a name="l00329"></a><a class="code" href="ao68000_8v.html#aebd7c1774f2faac02d954c85ad1c20f8">00329</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a9527c313aa58c219b35f23dcfcd52a3a">MICROPC_MOVE_FROM_SR</a> <span class="vhdllogic">9&#39;d388</span>
<a name="l00330"></a><a class="code" href="ao68000_8v.html#a345af680bab5b74ddd0f1dd1777c65bc">00330</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a785fdbd62d5c0da122ada9db07753b74">MICROPC_LOAD_EA_d8_PC_Xn</a> <span class="vhdllogic">9&#39;d79</span>
<a name="l00331"></a><a class="code" href="ao68000_8v.html#a124c8b977fd09ccc4cc2f58fe0952a09">00331</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a80e45e303a1ebe180eeb15b47454e13f">MICROPC_TRAP_ENTRY</a> <span class="vhdllogic">9&#39;d35</span>
<a name="l00332"></a><a class="code" href="ao68000_8v.html#ae0b37fb9a4e02142fbdb70219bbef6a0">00332</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a2c70544d287306914c57f360847a1abd">MICROPC_PERFORM_EA_READ_memory</a> <span class="vhdllogic">9&#39;d89</span>
<a name="l00333"></a><a class="code" href="ao68000_8v.html#a42a277bcfd7ef54779fed4a28847581c">00333</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a7ac5bfe9a8556912db6217142a3bb772">MICROPC_RESET</a> <span class="vhdllogic">9&#39;d485</span>
<a name="l00334"></a><a class="code" href="ao68000_8v.html#a61290d0f3b951962b5a80b0b843ad86f">00334</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#acb05778c30ee2acc522c18f823a678ff">MICROPC_PERFORM_EA_WRITE_Dn</a> <span class="vhdllogic">9&#39;d91</span>
<a name="l00335"></a><a class="code" href="ao68000_8v.html#af11ba1e2cd2e0bb279bf935b3defc503">00335</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a28f22a27673dd123f2ae53ac00c27c47">MICROPC_ASL_LSL_ROL_ROXL_ASR_LSR_ROR_ROXR_all_memory</a> <span class="vhdllogic">9&#39;d225</span>
<a name="l00336"></a><a class="code" href="ao68000_8v.html#ad35aeb7821957c9eb79f4e294d7b66cf">00336</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a38b3d0769f31c2931ccc92e00af94884">MICROPC_MOVEA</a> <span class="vhdllogic">9&#39;d239</span>
<a name="l00337"></a><a class="code" href="ao68000_8v.html#a9363a6d109adcf7d456074edf17dddca">00337</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a0c416458c758702471d503b0dbeab5d8">MICROPC_TST</a> <span class="vhdllogic">9&#39;d344</span>
<a name="l00338"></a><a class="code" href="ao68000_8v.html#aef60ac808758c220d9e048b86a36e406">00338</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#aa2684e7883f516fe90229d1a02585c7c">MICROPC_BTST_register</a> <span class="vhdllogic">9&#39;d326</span>
<a name="l00339"></a><a class="code" href="ao68000_8v.html#afd3dcba15bfb7747ea152700b7395898">00339</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#aa80bb2f21742a46f59c3b8401c9209a3">MICROPC_LOAD_EA_d8_An_Xn</a> <span class="vhdllogic">9&#39;d68</span>
<a name="l00340"></a><a class="code" href="ao68000_8v.html#a58a0825eeeb1bd2340a0b7c92e36c325">00340</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#abff7613e058d71dedd233ff63a37a724">MICROPC_MULS_MULU_DIVS_DIVU</a> <span class="vhdllogic">9&#39;d290</span>
<a name="l00341"></a><a class="code" href="ao68000_8v.html#ae2dc5340c2232f74f46c35a5afd48b33">00341</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a06f670a9b840bc7dda392686b0b53b41">MICROPC_MOVEQ</a> <span class="vhdllogic">9&#39;d307</span>
<a name="l00342"></a><a class="code" href="ao68000_8v.html#ab928eae11a81b6d124a6f3909ce7b9f1">00342</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a853a2713ed61bd3e53e70297f62b654d">MICROPC_CMPA</a> <span class="vhdllogic">9&#39;d275</span>
<a name="l00343"></a><a class="code" href="ao68000_8v.html#a8a3ee084648ac92e056b83f949fa05d6">00343</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#adaa788877b96a4c0cf1c9500aefc505a">MICROPC_EOR</a> <span class="vhdllogic">9&#39;d245</span>
<a name="l00344"></a><a class="code" href="ao68000_8v.html#adf4cfc5358aa9dd825abfc8f7681e09d">00344</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#ade20a2ce9d926ed45a0c6e2d4c2bffad">MICROPC_LOAD_EA_xxx_W</a> <span class="vhdllogic">9&#39;d72</span>
<a name="l00345"></a><a class="code" href="ao68000_8v.html#aa888e8868f9a35fb790e242c1ca553de">00345</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a3d6a33ee86f4d37516a8afb60957b7ee">MICROPC_DBcc</a> <span class="vhdllogic">9&#39;d374</span>
<a name="l00346"></a><a class="code" href="ao68000_8v.html#abb08e3177e65a08caeb9a11f0e05f1b7">00346</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a5027ce5e621b327a8116e4ca0af34e90">MICROPC_CMPI</a> <span class="vhdllogic">9&#39;d184</span>
<a name="l00347"></a><a class="code" href="ao68000_8v.html#af37bba837c3168729bd2c32d11607584">00347</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#ac3601da82892ec91bbc958628eb6ed03">MICROPC_LOAD_EA_xxx_L</a> <span class="vhdllogic">9&#39;d74</span>
<a name="l00348"></a><a class="code" href="ao68000_8v.html#a1b25d4948e6b56628513b57270c88553">00348</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a118f99a150352cf71a51d13156218674">MICROPC_CMPM</a> <span class="vhdllogic">9&#39;d205</span>
<a name="l00349"></a><a class="code" href="ao68000_8v.html#a10dd3138063247ca8f12244bf4fe7111">00349</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a999737a0b112cb8f4691dfc97278bc7e">MICROPC_MOVE_USP_to_USP</a> <span class="vhdllogic">9&#39;d395</span>
<a name="l00350"></a><a class="code" href="ao68000_8v.html#a95038a8726dc69a3f11930e16a4f4f6a">00350</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#af6f7102b5f4972ae11cad584ed87de14">MICROPC_ADDQ_SUBQ_not_An</a> <span class="vhdllogic">9&#39;d348</span>
<a name="l00351"></a><a class="code" href="ao68000_8v.html#a56cb4246d3da79cb059495cd6ffea506">00351</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a52c9810463f7dc671e021a7217259c04">MICROPC_ULNK</a> <span class="vhdllogic">9&#39;d419</span>
<a name="l00352"></a><a class="code" href="ao68000_8v.html#a9a7a60a90fd7b7a8f511fa58a5474209">00352</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a5a514be119075b3c3ab64dfa849f3d9c">MICROPC_EXG</a> <span class="vhdllogic">9&#39;d197</span>
<a name="l00353"></a><a class="code" href="ao68000_8v.html#a07444504629b99d3da8ebbeee3a594cc">00353</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#aa3942210285e132e0151143eca9103b4">MICROPC_ADD_to_mem_SUB_to_mem_AND_to_mem_OR_to_mem</a> <span class="vhdllogic">9&#39;d250</span>
<a name="l00354"></a><a class="code" href="ao68000_8v.html#aa2f8f7655984ca496c0c15c281956ee1">00354</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#ae56342916e5e608a0fdd3a01a11688b0">MICROPC_Bcc_BRA</a> <span class="vhdllogic">9&#39;d362</span>
<a name="l00355"></a><a class="code" href="ao68000_8v.html#a73d600c76e7d7cc2e664417176239da3">00355</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a8d6dcbc97994c642a8da0be0fecc257a">MICROPC_PERFORM_EA_READ_An</a> <span class="vhdllogic">9&#39;d86</span>
<a name="l00356"></a><a class="code" href="ao68000_8v.html#ab803dd137dec243c16bb4bf026c05bf0">00356</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a7cb86509757fa3419fbc8980724bd315">MICROPC_LOAD_EA_d16_PC</a> <span class="vhdllogic">9&#39;d76</span>
<a name="l00357"></a><a class="code" href="ao68000_8v.html#a54e7164c6c76b71ecb76a41df5b05f79">00357</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a836e1069d2a67eabcd01a92fcc2672f0">MICROPC_NOP</a> <span class="vhdllogic">9&#39;d479</span>
<a name="l00358"></a><a class="code" href="ao68000_8v.html#a245572b10dd3bb9beeefb9cb8908daf1">00358</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#affd3d4c8fd7cf2cbd78ecd99397f768b">MICROPC_MOVEM_register_to_memory_predecrement</a> <span class="vhdllogic">9&#39;d131</span>
<a name="l00359"></a><a class="code" href="ao68000_8v.html#a8e01300271dc2002fc972bde66808baa">00359</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a76b52a43dac42903243a54b46c4bd839">MICROPC_RTE_RTR</a> <span class="vhdllogic">9&#39;d459</span>
<a name="l00360"></a><a class="code" href="ao68000_8v.html#adf4b73792af505dd78bc1b3dac6d2b85">00360</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#aa106c5a18e8252dc2ced5ec2f77650d9">MICROPC_TRAP</a> <span class="vhdllogic">9&#39;d480</span>
<a name="l00361"></a><a class="code" href="ao68000_8v.html#a0e2906a8e705c899033a9467393c2ff2">00361</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#ae9cec5ce342a7d51efda687c24f35ab1">MICROPC_ADDQ_SUBQ_An</a> <span class="vhdllogic">9&#39;d351</span>
<a name="l00362"></a><a class="code" href="ao68000_8v.html#a78ec3f3a42f7b33f121d0a293b64ab2a">00362</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a775df2459596100b0e801ad20c24322b">MICROPC_MOVEM_register_to_memory_control</a> <span class="vhdllogic">9&#39;d147</span>
<a name="l00363"></a><a class="code" href="ao68000_8v.html#a1031f61a9539b8a68133920d39ba9762">00363</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a5ec24a82d3f383ac90da0ad8cc7bb0e3">MICROPC_BTST_immediate</a> <span class="vhdllogic">9&#39;d315</span>
<a name="l00364"></a><a class="code" href="ao68000_8v.html#a139e02a56567bb2b2d56c2d69902cbd0">00364</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a6827fab6e4b333e82a1de52cf6020b7a">MICROPC_MOVEP_memory_to_register</a> <span class="vhdllogic">9&#39;d98</span>
<a name="l00365"></a><a class="code" href="ao68000_8v.html#ab452d1e828902e03197249bbd0db027a">00365</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a20c5aa2df0d23f8bbdaccfca2bfed9f8">MICROPC_PERFORM_EA_WRITE_An</a> <span class="vhdllogic">9&#39;d92</span>
<a name="l00366"></a><a class="code" href="ao68000_8v.html#a3c6368d941d09f1a7700910a2b5fca4a">00366</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a09d3064b3da754163f244a861ce4c758">MICROPC_CHK</a> <span class="vhdllogic">9&#39;d281</span>
<a name="l00367"></a><a class="code" href="ao68000_8v.html#aecb6a98c1c371a8139043c62665381e1">00367</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#ac09a1b9ae5783634cc9228354105fc94">MICROPC_Scc</a> <span class="vhdllogic">9&#39;d355</span>
<a name="l00368"></a><a class="code" href="ao68000_8v.html#a08c56739b00c2c2ecae742fb5c665fe6">00368</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a088577482bc02135d9aa7a58c1d0ed05">MICROPC_JMP</a> <span class="vhdllogic">9&#39;d442</span>
<a name="l00369"></a><a class="code" href="ao68000_8v.html#aa4bbe36abf9c594596048d77663e9e22">00369</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a2ce22f23bd95ba0ee7690a059448a357">MICROPC_PEA</a> <span class="vhdllogic">9&#39;d168</span>
<a name="l00370"></a><a class="code" href="ao68000_8v.html#a70aec9dda79b3867e770a4d250732030">00370</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#ae4c00f630c944a41db777f7b51ee052d">MICROPC_SAVE_EA_minus_An</a> <span class="vhdllogic">9&#39;d97</span>
<a name="l00371"></a><a class="code" href="ao68000_8v.html#a0ea81f72abfe95073d6662c81c769433">00371</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a1508cd79053f2766a7bd8b7932ffdf0c">MICROPC_ANDI_EORI_ORI_ADDI_SUBI</a> <span class="vhdllogic">9&#39;d174</span>
<a name="l00372"></a><a class="code" href="ao68000_8v.html#adba77b4e840a8ed2af693f17640a4e69">00372</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a89a5e8fafa2da702e7c00cb6fe7c2066">MICROPC_BCHG_BCLR_BSET_immediate</a> <span class="vhdllogic">9&#39;d310</span>
<a name="l00373"></a><a class="code" href="ao68000_8v.html#ae43352e5e1db083c51d51faf3344e0ed">00373</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a52c9fefea5280f08cf24bac6373252ac">MICROPC_LOAD_EA_An</a> <span class="vhdllogic">9&#39;d62</span>
<a name="l00374"></a><a class="code" href="ao68000_8v.html#a9482347a8cd5a694b7fbf3e7ab8ba863">00374</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#ac2394d0cf1bffca610b4c8fb77881207">MICROPC_PERFORM_EA_READ_imm</a> <span class="vhdllogic">9&#39;d87</span>
<a name="l00375"></a><a class="code" href="ao68000_8v.html#a9a2dc7c44d3211c4cd147781c7ae046e">00375</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#acdb63549759af21684d2fd6e3dad8eb7">MICROPC_ADD_to_Dn_SUB_to_Dn_AND_to_Dn_OR_to_Dn</a> <span class="vhdllogic">9&#39;d255</span>
<a name="l00376"></a><a class="code" href="ao68000_8v.html#ac8568f114d824e091d8acf4a589544e7">00376</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#aced982dae609932df5af323a07349a2b">MICROPC_LEA</a> <span class="vhdllogic">9&#39;d162</span>
<a name="l00377"></a><a class="code" href="ao68000_8v.html#afd036d9ad787d0f27973473c948ac4de">00377</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a5038c753fc668ac678fe18251202305e">MICROPC_TRAPV</a> <span class="vhdllogic">9&#39;d482</span>
<a name="l00378"></a><a class="code" href="ao68000_8v.html#a4ac35c6768582e13cf2cfbec564a15c4">00378</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#af1b92ab55a321f316faf654b5d284caf">MICROPC_LINK</a> <span class="vhdllogic">9&#39;d403</span>
<a name="l00379"></a><a class="code" href="ao68000_8v.html#a181564080da192ca96a54014049a8a6e">00379</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a52a25a790c5779d1d9c5d4b807f6e9e6">MICROPC_ABCD_SBCD_ADDX_SUBX</a> <span class="vhdllogic">9&#39;d189</span>
<a name="l00380"></a><a class="code" href="ao68000_8v.html#a96e203e1004b880c901a4e8b2f2f2429">00380</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a5aff7e16fcd8e2f83c6a684fb62506b3">MICROPC_BCHG_BCLR_BSET_register</a> <span class="vhdllogic">9&#39;d321</span>
<a name="l00381"></a><a class="code" href="ao68000_8v.html#a37d9332e76b096caceffcf06a711bda1">00381</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#ae21eb6fc6455af78326135e407ee17eb">MICROPC_PERFORM_EA_READ_Dn</a> <span class="vhdllogic">9&#39;d85</span>
<a name="l00382"></a><a class="code" href="ao68000_8v.html#a19027f3b9a58050a6c54fb6220d8c969">00382</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a92f21025346f2b9baad5ee3ea27c8833">MICROPC_LOAD_EA_illegal_command</a> <span class="vhdllogic">9&#39;d83</span>
<a name="l00383"></a><a class="code" href="ao68000_8v.html#a6029c9775c2a59720aa441c066c874a9">00383</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#af7581a9c9f99af85388e542ad881d71f">MICROPC_ORI_to_CCR_ORI_to_SR_ANDI_to_CCR_ANDI_to_SR_EORI_to_CCR_EORI_to_SR</a> <span class="vhdllogic">9&#39;d178</span>
<a name="l00384"></a><a class="code" href="ao68000_8v.html#adaf4d54600ebc6c16fb64a2889f128dd">00384</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a2d30784cb012710f55727108a9b62cf1">MICROPC_CMP</a> <span class="vhdllogic">9&#39;d262</span>
<a name="l00385"></a><a class="code" href="ao68000_8v.html#a1d7f386ed0662150d0f6f30b9127da0f">00385</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a65ca31e571d56e8b7e92ecadd58c94e1">MICROPC_SWAP_EXT</a> <span class="vhdllogic">9&#39;d340</span>
<a name="l00386"></a><a class="code" href="ao68000_8v.html#af2f78dd082b87ed1f681dcfd552aa1e5">00386</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#aa23e89f5c79e7df7ff8ecf19a41ae572">MICROPC_STOP</a> <span class="vhdllogic">9&#39;d488</span>
<a name="l00387"></a><a class="code" href="ao68000_8v.html#aa71f860296e95d302e5773af83ce85f6">00387</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#ab8383cdb4a1df6d5f3296bb4244c7bab">MICROPC_PERFORM_EA_WRITE_memory</a> <span class="vhdllogic">9&#39;d93</span>
<a name="l00388"></a><a class="code" href="ao68000_8v.html#a73d1379623370b7ac490fc7d0efd3b31">00388</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a4a79b8f0394c470bd67ba6442fa12395">MICROPC_JSR</a> <span class="vhdllogic">9&#39;d450</span>
<a name="l00389"></a><a class="code" href="ao68000_8v.html#a51c49e5c7ae416b63ce044212b9ab4b7">00389</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a9b094e5044be3be8167a5b80bd274433">MICROPC_LOAD_EA_minus_An</a> <span class="vhdllogic">9&#39;d63</span>
<a name="l00390"></a><a class="code" href="ao68000_8v.html#a4e6626ea369de1da9de2bf93f33278dd">00390</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a8a505b33f1c42b903dcb264862dda090">MICROPC_ASL_LSL_ROL_ROXL_ASR_LSR_ROR_ROXR_all_immediate_register</a> <span class="vhdllogic">9&#39;d212</span>
<a name="l00391"></a><a class="code" href="ao68000_8v.html#a1fc7f893ce96f66f9cd2ab9b54f5b319">00391</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a02dc58bcc0412d6c93647a1304f20443">MICROPC_SAVE_EA_An_plus</a> <span class="vhdllogic">9&#39;d95</span>
<a name="l00392"></a><a class="code" href="ao68000_8v.html#aa6cccbccacb5da82328bfdeeb3c5c6fa">00392</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a6e06b607b9a1a157e3753943d2b015e1">MICROPC_LOAD_EA_d16_An</a> <span class="vhdllogic">9&#39;d65</span>
<a name="l00393"></a><a class="code" href="ao68000_8v.html#a43d41ce59902030032a09041c949465e">00393</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#aafdd46a7740d48b02e781d3136f7ce1d">MICROPC_LOAD_EA_An_plus</a> <span class="vhdllogic">9&#39;d62</span>
<a name="l00394"></a><a class="code" href="ao68000_8v.html#a357bfb655a15b7d0f5ed5c9f8cb0543a">00394</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#ac2e6ac139e91da76695b3f953c994a0d">MICROPC_MOVEM_memory_to_register</a> <span class="vhdllogic">9&#39;d116</span>
<a name="l00395"></a>00395 <span class="keyword">// MICROCODE - DO NOT EDIT ABOVE</span>
<a name="l00396"></a>00396
<a name="l00397"></a>00397 <span class="keyword">/***********************************************************************************************************************</span>
<a name="l00398"></a>00398 <span class="keyword"> ao68000 top level module</span>
<a name="l00399"></a>00399 <span class="keyword"> ***********************************************************************************************************************/</span>
<a name="l00400"></a>00400
<a name="l00228"></a><a class="code" href="ao68000_8v.html#a9aae6b31acefe02c80ece4af695bb40f">00228</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#ab6294988eed0a5e85d94de7c134351ec">ALU_ABCD_SBCD_ADDX_SUBX_prepare</a> <span class="vhdllogic">5&#39;d13</span>
<a name="l00229"></a><a class="code" href="ao68000_8v.html#ac2232882ac07e5f6ed49d8523a342e3d">00229</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a3e54001e73374bd4f7cfda3de55bd944">ALU_ABCD_SBCD_ADDX_SUBX</a> <span class="vhdllogic">5&#39;d14</span>
<a name="l00230"></a><a class="code" href="ao68000_8v.html#aa6e2c61cc22be977878f3f6443fad4e4">00230</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#ac444f659b2726fd335e839dfadabbfe3">ALU_ASL_LSL_ROL_ROXL_ASR_LSR_ROR_ROXR_prepare</a> <span class="vhdllogic">5&#39;d15</span>
<a name="l00231"></a><a class="code" href="ao68000_8v.html#ad999ca341f5ef5f492a551d865c78344">00231</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#ac946f278d039868214c441c11fcf2587">ALU_ASL_LSL_ROL_ROXL_ASR_LSR_ROR_ROXR</a> <span class="vhdllogic">5&#39;d16</span>
<a name="l00232"></a><a class="code" href="ao68000_8v.html#a13c29dec93353b36d9d8b93f9fe17858">00232</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a268aa82704bd8f1c1548dfc69a12a951">ALU_MOVE</a> <span class="vhdllogic">5&#39;d17</span>
<a name="l00233"></a><a class="code" href="ao68000_8v.html#ab29cd7ca32420baad72d75d0677ec031">00233</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a30a87601d2ca38286bb0d486d59f6a07">ALU_ADDA_SUBA_CMPA_ADDQ_SUBQ</a> <span class="vhdllogic">5&#39;d18</span>
<a name="l00234"></a><a class="code" href="ao68000_8v.html#a0fefeebf906b8833a16856dcd5608084">00234</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#af0a4db089a5eb288abf9453ca2d79c26">ALU_CHK</a> <span class="vhdllogic">5&#39;d19</span>
<a name="l00235"></a><a class="code" href="ao68000_8v.html#ac0303730d6c74d83b8aea99da7c75c9b">00235</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#aed07d190bb88f0cce7768028698020f9">ALU_MULS_MULU_DIVS_DIVU</a> <span class="vhdllogic">5&#39;d20</span>
<a name="l00236"></a><a class="code" href="ao68000_8v.html#a6a5b0b64b4095955d345bc82b0f571dc">00236</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a14b85ce3e5b4ede3b2c4e89f420c8c3c">ALU_BCHG_BCLR_BSET_BTST</a> <span class="vhdllogic">5&#39;d21</span>
<a name="l00237"></a><a class="code" href="ao68000_8v.html#af93e88849a416e2d551526b760198022">00237</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#ac7de3ab6c8eec4381bde5e4f61b45761">ALU_TAS</a> <span class="vhdllogic">5&#39;d22</span>
<a name="l00238"></a><a class="code" href="ao68000_8v.html#a2c62639a3a5741fe487feb1f210defa7">00238</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a07c7e53af3f4995a167966ba18c2728f">ALU_NEGX_CLR_NEG_NOT_NBCD_SWAP_EXT</a> <span class="vhdllogic">5&#39;d23</span>
<a name="l00239"></a><a class="code" href="ao68000_8v.html#a93bd99e57b180798d7c859c1fdca1184">00239</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a32c0e163ff437b07e40593ab59e42fe3">ALU_SIMPLE_LONG_ADD</a> <span class="vhdllogic">5&#39;d24</span>
<a name="l00240"></a><a class="code" href="ao68000_8v.html#a732ebeb4c58fb9cc285e1061b517b373">00240</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#aea6fee15f3d775b1a8d262490203c713">ALU_SIMPLE_LONG_SUB</a> <span class="vhdllogic">5&#39;d25</span>
<a name="l00241"></a><a class="code" href="ao68000_8v.html#a1d757814a523468330a8f3bb14b8bf8f">00241</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a5083d98f4b785fe7af85ba1114f678ff">ALU_MOVE_TO_CCR_SR_RTE_RTR_STOP_LOGIC_TO_CCR_SR</a> <span class="vhdllogic">5&#39;d26</span>
<a name="l00242"></a><a class="code" href="ao68000_8v.html#ab290c8d7d590ed6bbb564ef941d0ec88">00242</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#ab6d6f774c41848f9c33c7b393620be2d">ALU_SIMPLE_MOVE</a> <span class="vhdllogic">5&#39;d27</span>
<a name="l00243"></a><a class="code" href="ao68000_8v.html#abb3d1ac266c7685ef8d1d2c503b5f2ea">00243</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#ac439a8b79bd4b213f0f33172bd5e5a73">ALU_LINK_MOVE</a> <span class="vhdllogic">5&#39;d28</span>
<a name="l00244"></a>00244
<a name="l00245"></a><a class="code" href="ao68000_8v.html#af733b52724e9524ce18eae512df35480">00245</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a6cf12df8a04c3df66b43fb7301e424e9">BRANCH_IDLE</a> <span class="vhdllogic">4&#39;d0</span>
<a name="l00246"></a><a class="code" href="ao68000_8v.html#a82d805b282202c87398b9712a85b58f1">00246</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#abdfc603db0ea3694052298e85fb6efad">BRANCH_movem_loop</a> <span class="vhdllogic">4&#39;d1</span> <span class="keyword">// BRANCH(movem_loop == 4&#39;b1000)</span>
<a name="l00247"></a><a class="code" href="ao68000_8v.html#aa62d45e622148f3f284300cd1c8ec385">00247</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#acc65cf5ec49ce78ecf98c956cd2de769">BRANCH_movem_reg</a> <span class="vhdllogic">4&#39;d2</span> <span class="keyword">// BRANCH(movem_reg[0] == 0)</span>
<a name="l00248"></a><a class="code" href="ao68000_8v.html#afc9bc6cac2e242769d2598a29fedf825">00248</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#aa0b5846a5e98be60da75608078377571">BRANCH_operand2</a> <span class="vhdllogic">4&#39;d3</span> <span class="keyword">// BRANCH(operand2[5:0] == 6&#39;b0)</span>
<a name="l00249"></a><a class="code" href="ao68000_8v.html#a7ad9ea4a5ffa00527c26fa64ad75bf4c">00249</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a3db021156e8171951f6b91c78bbb7e1f">BRANCH_alu_signal</a> <span class="vhdllogic">4&#39;d4</span> <span class="keyword">// BRANCH(alu_signal == 1&#39;b0)</span>
<a name="l00250"></a><a class="code" href="ao68000_8v.html#a176308e082b64f5fd73d9f046b6a8594">00250</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a62fe8e5939da15f9f391886fe174183a">BRANCH_alu_mult_div_ready</a> <span class="vhdllogic">4&#39;d5</span> <span class="keyword">// BRANCH(alu_mult_div_ready == 1&#39;b1)</span>
<a name="l00251"></a><a class="code" href="ao68000_8v.html#a30c4a8c9db7c14ea5317270becb6240c">00251</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#af3158a11a9fc793d4aeead4195871507">BRANCH_condition_0</a> <span class="vhdllogic">4&#39;d6</span> <span class="keyword">// BRANCH(condition == 1&#39;b0)</span>
<a name="l00252"></a><a class="code" href="ao68000_8v.html#a4539242544f8cd667a6ce0deac0d788d">00252</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a48d5a0127f3bc738b8503c0713b9fba9">BRANCH_condition_1</a> <span class="vhdllogic">4&#39;d7</span> <span class="keyword">// BRANCH(condition == 1&#39;b1)</span>
<a name="l00253"></a><a class="code" href="ao68000_8v.html#abdf93f72eff40b1a560a95062afe148f">00253</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a0cbdc7b4e718d5cc690b435995bb7708">BRANCH_result</a> <span class="vhdllogic">4&#39;d8</span> <span class="keyword">// BRANCH(result[15:0] == 16&#39;hFFFF)</span>
<a name="l00254"></a><a class="code" href="ao68000_8v.html#a1d95cdc4aa317fc88b00283fb14fe0dd">00254</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a3861f0d4bd11e996bda23577348e86f7">BRANCH_V</a> <span class="vhdllogic">4&#39;d9</span> <span class="keyword">// BRANCH(V == 1&#39;b0)</span>
<a name="l00255"></a><a class="code" href="ao68000_8v.html#abc054cf1d1155b7c0bb40bfa31fe2b66">00255</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a5fb736520363d5359408ed4af63c6125">BRANCH_movep_16</a> <span class="vhdllogic">4&#39;d10</span> <span class="keyword">// BRANCH(ir[6] == 0)</span>
<a name="l00256"></a><a class="code" href="ao68000_8v.html#a2136a9cf3941acd7a5d9c62e282fc6fb">00256</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a79ce1f7b2aa4e141d52316a04977ee60">BRANCH_stop_flag_wait_ir_decode</a> <span class="vhdllogic">4&#39;d11</span> <span class="keyword">// BRANCH(stop_flag == 1&#39;b1) if no branch: wait for prefetch ir valid and decode instruction</span>
<a name="l00257"></a><a class="code" href="ao68000_8v.html#af29c19330ca8b945ab8d9280b0a79c82">00257</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a719e200160515b706ebab9fe1e18c8c7">BRANCH_ir</a> <span class="vhdllogic">4&#39;d12</span> <span class="keyword">// BRANCH(ir[7:0] != 8&#39;b0)</span>
<a name="l00258"></a><a class="code" href="ao68000_8v.html#a77c4ea1006f7e281f908731fa586e28a">00258</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#af396200d0e5941fe60e8d960f2e3aa91">BRANCH_trace_flag_and_interrupt</a> <span class="vhdllogic">4&#39;d13</span> <span class="keyword">// BRANCH(trace_flag == 1&#39;b0 &amp;&amp; interrupt_mask != 3&#39;b000) if no branch: jump to main loop</span>
<a name="l00259"></a><a class="code" href="ao68000_8v.html#ac54a3fc8c9f015e1175bc1793fb7ebfd">00259</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a63f967b1bbe9ad356e3ccbbb2924e03f">BRANCH_group_0_flag</a> <span class="vhdllogic">4&#39;d14</span> <span class="keyword">// BRANCH(group_0_flag == 0)</span>
<a name="l00260"></a><a class="code" href="ao68000_8v.html#ab753c6979146d57589c24a73cb13b501">00260</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a1f24f0ad71fd4d2edd6ead5ef6c3056a">BRANCH_procedure</a> <span class="vhdllogic">4&#39;d15</span> <span class="keyword">// call procedure, return from procedure</span>
<a name="l00261"></a>00261
<a name="l00262"></a><a class="code" href="ao68000_8v.html#ade10675cfd99420bd3a287db52dfc17a">00262</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a98081d1329be92c30eb943724c0cef86">PROCEDURE_IDLE</a> <span class="vhdllogic">4&#39;d0</span>
<a name="l00263"></a><a class="code" href="ao68000_8v.html#a9a6fa21e702ac35eeefb6d4ef6472fdd">00263</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a5c7af3686fb890de6242f973de1ee549">PROCEDURE_call_load_ea</a> <span class="vhdllogic">4&#39;d1</span> <span class="keyword">// load ea</span>
<a name="l00264"></a><a class="code" href="ao68000_8v.html#afc4dc88ce07d49ad1754962b413978ce">00264</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a698b04745cbbec22896235d5cfffac43">PROCEDURE_call_perform_ea_read</a> <span class="vhdllogic">4&#39;d2</span> <span class="keyword">// perform_ea_read</span>
<a name="l00265"></a><a class="code" href="ao68000_8v.html#a87c36a08818823df8de112dbe5caaebf">00265</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#aa98c954da2ac9f709907c8c593b1439e">PROCEDURE_call_perform_ea_write</a> <span class="vhdllogic">4&#39;d3</span> <span class="keyword">// perform_ea_write</span>
<a name="l00266"></a><a class="code" href="ao68000_8v.html#abc8942a868848a7669b61773b6251093">00266</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a30022c5eb1821e27dd5c70d4affbc835">PROCEDURE_call_save_ea</a> <span class="vhdllogic">4&#39;d4</span> <span class="keyword">// save ea</span>
<a name="l00267"></a><a class="code" href="ao68000_8v.html#a8926d78d8690a5f5b6dfa6d41f553f39">00267</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#af842761d13933777546d76bd997e7494">PROCEDURE_return</a> <span class="vhdllogic">4&#39;d5</span> <span class="keyword">// return from procedure</span>
<a name="l00268"></a><a class="code" href="ao68000_8v.html#aa41b49eec539fbca25bc9368c26f077a">00268</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a26a2f20a92ff8ab6f13d6633f3c9475c">PROCEDURE_wait_finished</a> <span class="vhdllogic">4&#39;d6</span> <span class="keyword">// wait for finished signal from bus controler</span>
<a name="l00269"></a><a class="code" href="ao68000_8v.html#acefb835b19db5c68d5b41002f77c8fa0">00269</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#aa072f73b12cd178a44f47980e1bb98cb">PROCEDURE_wait_prefetch_valid</a> <span class="vhdllogic">4&#39;d7</span> <span class="keyword">// wait for prefetch ir valid, 64 bits</span>
<a name="l00270"></a><a class="code" href="ao68000_8v.html#a247183de3681e23a64f17850ae339a46">00270</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a0ef2adec86a42dd30d78e9d259d828fd">PROCEDURE_wait_prefetch_valid_32</a> <span class="vhdllogic">4&#39;d8</span> <span class="keyword">// wait for prefetch ir valid, 32 bits</span>
<a name="l00271"></a><a class="code" href="ao68000_8v.html#a98c5a07ca4b8f55b285464572d984964">00271</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a7950509479648899370516cfa0221c43">PROCEDURE_jump_to_main_loop</a> <span class="vhdllogic">4&#39;d9</span> <span class="keyword">// jump to main loop</span>
<a name="l00272"></a><a class="code" href="ao68000_8v.html#a261ee70d7c2dd9f84476f009b062eeb0">00272</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a318a0823db3c0aa8dfeae26f05495e5b">PROCEDURE_push_micropc</a> <span class="vhdllogic">4&#39;d10</span> <span class="keyword">// save current micro_pc</span>
<a name="l00273"></a><a class="code" href="ao68000_8v.html#ad43b342d0876d583ad40ecf910724954">00273</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a2c67cc2747b67d04684855e14c2b9fbb">PROCEDURE_call_trap</a> <span class="vhdllogic">4&#39;d11</span> <span class="keyword">// call trap service procedure</span>
<a name="l00274"></a><a class="code" href="ao68000_8v.html#a01e61f6c91ea808bf15c0bc327fcd3ca">00274</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#acfe58e669e77374120e6e534fc621316">PROCEDURE_pop_micropc</a> <span class="vhdllogic">4&#39;d12</span> <span class="keyword">// pop most recent micro_pc and forget</span>
<a name="l00275"></a><a class="code" href="ao68000_8v.html#ab90a26325a5af04ad9433faa3edd5e2e">00275</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#ac74b95b43e6c95ed82036002767bc22c">PROCEDURE_interrupt_mask</a> <span class="vhdllogic">4&#39;d13</span> <span class="keyword">// if interrupt active continue, else jump to main loop</span>
<a name="l00276"></a><a class="code" href="ao68000_8v.html#aefb64784846ddb9132483912192632d8">00276</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a403d3720f31ad5a5895778bee758fb55">PROCEDURE_call_read</a> <span class="vhdllogic">4&#39;d14</span> <span class="keyword">// load_ea + perform_ea_read</span>
<a name="l00277"></a><a class="code" href="ao68000_8v.html#ad9a98b2cb48c9cb4442ac3ebecd260bc">00277</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a50af2007588b7a528b934ae7672b1214">PROCEDURE_call_write</a> <span class="vhdllogic">4&#39;d15</span> <span class="keyword">// perform_ea_write + save_ea + return</span>
<a name="l00278"></a>00278 <span class="keyword">// OPERATIONS END</span>
<a name="l00279"></a>00279
<a name="l00280"></a>00280 <span class="keyword">/***********************************************************************************************************************</span>
<a name="l00281"></a>00281 <span class="keyword"> Automatically generated by ao68000_tool microcode word bit assignments and addresses</span>
<a name="l00282"></a>00282 <span class="keyword"> ***********************************************************************************************************************/</span>
<a name="l00283"></a>00283 <span class="keyword">// MICROCODE - DO NOT EDIT BELOW</span>
<a name="l00284"></a><a class="code" href="ao68000_8v.html#a6ef81425ac3daa6970f3df92db1a6325">00284</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a3a14e27ef3dcc344f66e5eb0aa93d38d">MICRO_DATA_ea_reg</a> micro_data[<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>]
<a name="l00285"></a><a class="code" href="ao68000_8v.html#aabf523bb3e9ede36111acd537aca70f9">00285</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#aa691c194246c2ac4def5609ba8963326">MICRO_DATA_ea_mod</a> micro_data[<span class="vhdllogic">6</span>:<span class="vhdllogic">3</span>]
<a name="l00286"></a><a class="code" href="ao68000_8v.html#a1ec6741ebf273336ec4584d66ae37ffe">00286</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#ae45014e01523ad88c7b7bd74cdb1b8db">MICRO_DATA_ea_type</a> micro_data[<span class="vhdllogic">10</span>:<span class="vhdllogic">7</span>]
<a name="l00287"></a><a class="code" href="ao68000_8v.html#afebf33d60f4f8be00b3d6fa7afdd326d">00287</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a80f755d97ef46590665dc161a3de3f60">MICRO_DATA_op1</a> micro_data[<span class="vhdllogic">14</span>:<span class="vhdllogic">11</span>]
<a name="l00288"></a><a class="code" href="ao68000_8v.html#aa695bec37252c32e10742b0d9f1e38b6">00288</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#ab1641cfecafe6ff147522b68bd7f9c0d">MICRO_DATA_op2</a> micro_data[<span class="vhdllogic">17</span>:<span class="vhdllogic">15</span>]
<a name="l00289"></a><a class="code" href="ao68000_8v.html#a33a5e1963bf65b251c0f3ff5f7572732">00289</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a600647e8ee417a6f81b00e53f101af5f">MICRO_DATA_address</a> micro_data[<span class="vhdllogic">21</span>:<span class="vhdllogic">18</span>]
<a name="l00290"></a><a class="code" href="ao68000_8v.html#aa7ee2698a06d94f380745c7bbe936426">00290</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a73de1704db2fb003c3a2da4b3f1667de">MICRO_DATA_size</a> micro_data[<span class="vhdllogic">25</span>:<span class="vhdllogic">22</span>]
<a name="l00291"></a><a class="code" href="ao68000_8v.html#ad0b1624b8cc4a2d03fce11254f960372">00291</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a73831c7c30f75ec6e263ce47f1a3fb64">MICRO_DATA_movem_modreg</a> micro_data[<span class="vhdllogic">28</span>:<span class="vhdllogic">26</span>]
<a name="l00292"></a><a class="code" href="ao68000_8v.html#a4176bd40d99ee111db2bea0109349a1a">00292</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a93b7332d93eddbed779bba21295794f3">MICRO_DATA_movem_loop</a> micro_data[<span class="vhdllogic">30</span>:<span class="vhdllogic">29</span>]
<a name="l00293"></a><a class="code" href="ao68000_8v.html#a6c3ad387c24516778b554de5f544e9bf">00293</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a5246b6d3ea1d05aa2d34597666a8da31">MICRO_DATA_movem_reg</a> micro_data[<span class="vhdllogic">32</span>:<span class="vhdllogic">31</span>]
<a name="l00294"></a><a class="code" href="ao68000_8v.html#aa198c1bed97e0ad6f7f4f6f24c77766d">00294</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a15830df6bfc267949eaeb9c862ec021a">MICRO_DATA_ir</a> micro_data[<span class="vhdllogic">34</span>:<span class="vhdllogic">33</span>]
<a name="l00295"></a><a class="code" href="ao68000_8v.html#aa1775c009cc16c3a6bcc068f1de3bd9f">00295</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a35a9274fdd4fa537efdb15f0b0b787e6">MICRO_DATA_pc</a> micro_data[<span class="vhdllogic">37</span>:<span class="vhdllogic">35</span>]
<a name="l00296"></a><a class="code" href="ao68000_8v.html#a5f10c6462da6c4004edd6ba127cc3925">00296</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#ac4878c2a7cf765d443c1c9da238b5ac9">MICRO_DATA_trap</a> micro_data[<span class="vhdllogic">41</span>:<span class="vhdllogic">38</span>]
<a name="l00297"></a><a class="code" href="ao68000_8v.html#a1344c6a09cd514e33cf879638e0c0f3f">00297</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a4deaea8bc3d376dac501f3a314f1490c">MICRO_DATA_offset</a> micro_data[<span class="vhdllogic">43</span>:<span class="vhdllogic">42</span>]
<a name="l00298"></a><a class="code" href="ao68000_8v.html#a16f46e3da89023238a3206da9a864245">00298</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#ad722ce87f573d9c6e1010e5a87005383">MICRO_DATA_index</a> micro_data[<span class="vhdllogic">45</span>:<span class="vhdllogic">44</span>]
<a name="l00299"></a><a class="code" href="ao68000_8v.html#af463d6dfe088ed4971bee9cbb4220142">00299</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a5e820e2a23919cb4005a8cc9651c26c0">MICRO_DATA_stop_flag</a> micro_data[<span class="vhdllogic">47</span>:<span class="vhdllogic">46</span>]
<a name="l00300"></a><a class="code" href="ao68000_8v.html#ab6bf25c868a11c4ebe2b87367a5d123b">00300</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#aa913e0fe5ccffe6e2d7e91d43f39f139">MICRO_DATA_trace_flag</a> micro_data[<span class="vhdllogic">49</span>:<span class="vhdllogic">48</span>]
<a name="l00301"></a><a class="code" href="ao68000_8v.html#ae4ccc6dc98a4bd404249c5f291ba4d6a">00301</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a595e837c71d69c5a4d7c4a3c9d64ffb0">MICRO_DATA_group_0_flag</a> micro_data[<span class="vhdllogic">51</span>:<span class="vhdllogic">50</span>]
<a name="l00302"></a><a class="code" href="ao68000_8v.html#ac227ea998ce2e81e10a1be6ec9ebc4c1">00302</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a188c9ee8d0adc5ec2fb732fdece9ea31">MICRO_DATA_instruction_flag</a> micro_data[<span class="vhdllogic">53</span>:<span class="vhdllogic">52</span>]
<a name="l00303"></a><a class="code" href="ao68000_8v.html#a87951ae08bef1208fd636efc0d65cdf3">00303</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#ae152374d2c661e9bfcb222888087b18f">MICRO_DATA_read_modify_write_flag</a> micro_data[<span class="vhdllogic">55</span>:<span class="vhdllogic">54</span>]
<a name="l00304"></a><a class="code" href="ao68000_8v.html#a87d9ca517e0db145b9fa96c1d4f1b48c">00304</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a05f6c84753b5b54fe61fe36a740b739d">MICRO_DATA_do_reset_flag</a> micro_data[<span class="vhdllogic">57</span>:<span class="vhdllogic">56</span>]
<a name="l00305"></a><a class="code" href="ao68000_8v.html#a4512f2422910357f4ae9f0f39ff60e60">00305</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a989be17e3392ddf7c87fcf41a9c1576b">MICRO_DATA_do_interrupt_flag</a> micro_data[<span class="vhdllogic">59</span>:<span class="vhdllogic">58</span>]
<a name="l00306"></a><a class="code" href="ao68000_8v.html#a40acececb0e30e947f36e1ca1bc70e14">00306</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a3935f3fc6e20767fdeee079bdb08648f">MICRO_DATA_do_read_flag</a> micro_data[<span class="vhdllogic">61</span>:<span class="vhdllogic">60</span>]
<a name="l00307"></a><a class="code" href="ao68000_8v.html#ad6b47390e7d45cfdf3ed7898509205b0">00307</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a42e2926c262bd037f32951c89a51067e">MICRO_DATA_do_write_flag</a> micro_data[<span class="vhdllogic">63</span>:<span class="vhdllogic">62</span>]
<a name="l00308"></a><a class="code" href="ao68000_8v.html#a16327822b3b9a8f8b0de245867c0aca0">00308</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#adf7ac746fc276a0c3083d2606df75af4">MICRO_DATA_do_blocked_flag</a> micro_data[<span class="vhdllogic">65</span>:<span class="vhdllogic">64</span>]
<a name="l00309"></a><a class="code" href="ao68000_8v.html#ae04a1798dc92a3bacae2f52455ee8d91">00309</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a0843baa7810722c7e1afd79aa615a9f0">MICRO_DATA_data_write</a> micro_data[<span class="vhdllogic">67</span>:<span class="vhdllogic">66</span>]
<a name="l00310"></a><a class="code" href="ao68000_8v.html#adf492d3aba5a96fb92981329623efa9c">00310</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a08e217a2a40544a7d5c4e916a3b4d6cf">MICRO_DATA_an_address</a> micro_data[<span class="vhdllogic">69</span>:<span class="vhdllogic">68</span>]
<a name="l00311"></a><a class="code" href="ao68000_8v.html#a8f7a4c24e52ade0663ac1d4b47afe44c">00311</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#af767fe70444603fdcde8beb39ef85c8c">MICRO_DATA_an_write_enable</a> micro_data[<span class="vhdllogic">70</span>:<span class="vhdllogic">70</span>]
<a name="l00312"></a><a class="code" href="ao68000_8v.html#aa0630462dc3f0aa3c8ef1440d0f6b5ce">00312</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#aa6a6132c427e511630e6889582d48828">MICRO_DATA_an_input</a> micro_data[<span class="vhdllogic">72</span>:<span class="vhdllogic">71</span>]
<a name="l00313"></a><a class="code" href="ao68000_8v.html#a3fc5b433434a63c13fd4540e85e88622">00313</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a1055ed2c94344c9b59a9061b451fd4b8">MICRO_DATA_dn_address</a> micro_data[<span class="vhdllogic">73</span>:<span class="vhdllogic">73</span>]
<a name="l00314"></a><a class="code" href="ao68000_8v.html#a1e73bf0857c4744890d7f94536512299">00314</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#abb7709933320bf644d6a57c3040538a3">MICRO_DATA_dn_write_enable</a> micro_data[<span class="vhdllogic">74</span>:<span class="vhdllogic">74</span>]
<a name="l00315"></a><a class="code" href="ao68000_8v.html#acd1f66614af2cf0c231cf93248b8582e">00315</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a6dde91e1905423f9fb4184ae3554b5cd">MICRO_DATA_alu</a> micro_data[<span class="vhdllogic">79</span>:<span class="vhdllogic">75</span>]
<a name="l00316"></a><a class="code" href="ao68000_8v.html#a56c56c6560eb00fb6a9ba6211e95cb65">00316</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a156b8e8011ac86392d0e47b50cc1bd12">MICRO_DATA_branch</a> micro_data[<span class="vhdllogic">83</span>:<span class="vhdllogic">80</span>]
<a name="l00317"></a><a class="code" href="ao68000_8v.html#a773f710aeba391c02509192b69de3fbd">00317</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a8356eb451657c128626552b5a360de3a">MICRO_DATA_procedure</a> micro_data[<span class="vhdllogic">87</span>:<span class="vhdllogic">84</span>]
<a name="l00318"></a>00318
<a name="l00319"></a><a class="code" href="ao68000_8v.html#ac7fe3df66fb357ed17c83ab0e564f693">00319</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#afadd69027964ef6d7c9f923ed2714bbe">MICROPC_MOVE</a> <span class="vhdllogic">9&#39;d232</span>
<a name="l00320"></a><a class="code" href="ao68000_8v.html#ab4dbf8db303523650c505aebe911d0db">00320</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a506e512a7df02654649a4275b676b5f7">MICROPC_MOVE_USP_to_An</a> <span class="vhdllogic">9&#39;d401</span>
<a name="l00321"></a><a class="code" href="ao68000_8v.html#a3c9098364cbecd36a9fa7a749abc8b89">00321</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a9d9308b3732ecf15f57a22600ac300b8">MICROPC_TAS</a> <span class="vhdllogic">9&#39;d333</span>
<a name="l00322"></a><a class="code" href="ao68000_8v.html#a8b3919eb82bb79216bfccd40c6a758c8">00322</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#afefae415ee468c051f367b74183a122b">MICROPC_BSR</a> <span class="vhdllogic">9&#39;d431</span>
<a name="l00323"></a><a class="code" href="ao68000_8v.html#abf77fcda5659a23885d5fc4b0d8368ce">00323</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#ada4b6f4df06a5dcac3ec15d4c8f4d31e">MICROPC_ADDRESS_BUS_TRAP</a> <span class="vhdllogic">9&#39;d3</span>
<a name="l00324"></a><a class="code" href="ao68000_8v.html#a32257a88f74b022c9cb886f2e94cd426">00324</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a2516dd6bb3a4f804a752557b483e077b">MICROPC_MOVEP_register_to_memory</a> <span class="vhdllogic">9&#39;d106</span>
<a name="l00325"></a><a class="code" href="ao68000_8v.html#a0c2207d05c9c427601dfbff4f8ec1056">00325</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a6f040be4f69b57ba9603d5eae6085425">MICROPC_NEGX_CLR_NEG_NOT_NBCD</a> <span class="vhdllogic">9&#39;d338</span>
<a name="l00326"></a><a class="code" href="ao68000_8v.html#ad47b43ccb423bafa3b41657bd8ecd243">00326</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a70b05c3577437ee3a51c6b63859242c5">MICROPC_RTS</a> <span class="vhdllogic">9&#39;d472</span>
<a name="l00327"></a><a class="code" href="ao68000_8v.html#aef36b93556fcdd45b5cf7e6e25b84688">00327</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a1e7ad8f4b421f72f5bdea07bef35f864">MICROPC_MAIN_LOOP</a> <span class="vhdllogic">9&#39;d53</span>
<a name="l00328"></a><a class="code" href="ao68000_8v.html#a9af4faccf200aa9c2c1d05f225992b47">00328</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a02c5cdffb720a762c8790dbc86ab1a18">MICROPC_ADDA_SUBA</a> <span class="vhdllogic">9&#39;d269</span>
<a name="l00329"></a><a class="code" href="ao68000_8v.html#a4f73e4f0a5ea52e7f09fa8304c51ccc6">00329</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a258ae200cc2cbeccddff03ba18b66a27">MICROPC_MOVE_TO_CCR_MOVE_TO_SR</a> <span class="vhdllogic">9&#39;d392</span>
<a name="l00330"></a><a class="code" href="ao68000_8v.html#a8770eb5b48f75ce87ba9194562b6a45c">00330</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a9527c313aa58c219b35f23dcfcd52a3a">MICROPC_MOVE_FROM_SR</a> <span class="vhdllogic">9&#39;d389</span>
<a name="l00331"></a><a class="code" href="ao68000_8v.html#a345af680bab5b74ddd0f1dd1777c65bc">00331</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a785fdbd62d5c0da122ada9db07753b74">MICROPC_LOAD_EA_d8_PC_Xn</a> <span class="vhdllogic">9&#39;d79</span>
<a name="l00332"></a><a class="code" href="ao68000_8v.html#a124c8b977fd09ccc4cc2f58fe0952a09">00332</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a80e45e303a1ebe180eeb15b47454e13f">MICROPC_TRAP_ENTRY</a> <span class="vhdllogic">9&#39;d35</span>
<a name="l00333"></a><a class="code" href="ao68000_8v.html#ae0b37fb9a4e02142fbdb70219bbef6a0">00333</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a2c70544d287306914c57f360847a1abd">MICROPC_PERFORM_EA_READ_memory</a> <span class="vhdllogic">9&#39;d89</span>
<a name="l00334"></a><a class="code" href="ao68000_8v.html#af6f48113546424c28a06371c74e90b77">00334</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a7ac5bfe9a8556912db6217142a3bb772">MICROPC_RESET</a> <span class="vhdllogic">9&#39;d486</span>
<a name="l00335"></a><a class="code" href="ao68000_8v.html#a61290d0f3b951962b5a80b0b843ad86f">00335</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#acb05778c30ee2acc522c18f823a678ff">MICROPC_PERFORM_EA_WRITE_Dn</a> <span class="vhdllogic">9&#39;d91</span>
<a name="l00336"></a><a class="code" href="ao68000_8v.html#acd3e87e5069baefe8bb1678740b6e0dc">00336</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a28f22a27673dd123f2ae53ac00c27c47">MICROPC_ASL_LSL_ROL_ROXL_ASR_LSR_ROR_ROXR_all_memory</a> <span class="vhdllogic">9&#39;d226</span>
<a name="l00337"></a><a class="code" href="ao68000_8v.html#ad6a5cb27bff98a58730dec402f6cc4df">00337</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a38b3d0769f31c2931ccc92e00af94884">MICROPC_MOVEA</a> <span class="vhdllogic">9&#39;d240</span>
<a name="l00338"></a><a class="code" href="ao68000_8v.html#ab46b1e2da931ae1233bc16abe16b8887">00338</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a0c416458c758702471d503b0dbeab5d8">MICROPC_TST</a> <span class="vhdllogic">9&#39;d345</span>
<a name="l00339"></a><a class="code" href="ao68000_8v.html#a6d1bdffcbb3b7d0714daad1aa999e685">00339</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#aa2684e7883f516fe90229d1a02585c7c">MICROPC_BTST_register</a> <span class="vhdllogic">9&#39;d327</span>
<a name="l00340"></a><a class="code" href="ao68000_8v.html#afd3dcba15bfb7747ea152700b7395898">00340</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#aa80bb2f21742a46f59c3b8401c9209a3">MICROPC_LOAD_EA_d8_An_Xn</a> <span class="vhdllogic">9&#39;d68</span>
<a name="l00341"></a><a class="code" href="ao68000_8v.html#a4f3fc5e0e14817aa8c5fcf2d6e94cb8c">00341</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#abff7613e058d71dedd233ff63a37a724">MICROPC_MULS_MULU_DIVS_DIVU</a> <span class="vhdllogic">9&#39;d291</span>
<a name="l00342"></a><a class="code" href="ao68000_8v.html#a6dda1d34c2e5b66ee78fa55062db0387">00342</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a06f670a9b840bc7dda392686b0b53b41">MICROPC_MOVEQ</a> <span class="vhdllogic">9&#39;d308</span>
<a name="l00343"></a><a class="code" href="ao68000_8v.html#a262e3c3a1fce58c41ac0eed1094d7734">00343</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a853a2713ed61bd3e53e70297f62b654d">MICROPC_CMPA</a> <span class="vhdllogic">9&#39;d276</span>
<a name="l00344"></a><a class="code" href="ao68000_8v.html#af12b85c27e484a192ef362226d4c096f">00344</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#adaa788877b96a4c0cf1c9500aefc505a">MICROPC_EOR</a> <span class="vhdllogic">9&#39;d246</span>
<a name="l00345"></a><a class="code" href="ao68000_8v.html#adf4cfc5358aa9dd825abfc8f7681e09d">00345</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#ade20a2ce9d926ed45a0c6e2d4c2bffad">MICROPC_LOAD_EA_xxx_W</a> <span class="vhdllogic">9&#39;d72</span>
<a name="l00346"></a><a class="code" href="ao68000_8v.html#ada265be45a364b897239ada9fbdc3e9f">00346</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a3d6a33ee86f4d37516a8afb60957b7ee">MICROPC_DBcc</a> <span class="vhdllogic">9&#39;d375</span>
<a name="l00347"></a><a class="code" href="ao68000_8v.html#abb08e3177e65a08caeb9a11f0e05f1b7">00347</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a5027ce5e621b327a8116e4ca0af34e90">MICROPC_CMPI</a> <span class="vhdllogic">9&#39;d184</span>
<a name="l00348"></a><a class="code" href="ao68000_8v.html#af37bba837c3168729bd2c32d11607584">00348</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#ac3601da82892ec91bbc958628eb6ed03">MICROPC_LOAD_EA_xxx_L</a> <span class="vhdllogic">9&#39;d74</span>
<a name="l00349"></a><a class="code" href="ao68000_8v.html#a5d8f6917484c6c494fb59b0801d79c37">00349</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a118f99a150352cf71a51d13156218674">MICROPC_CMPM</a> <span class="vhdllogic">9&#39;d206</span>
<a name="l00350"></a><a class="code" href="ao68000_8v.html#a58add1f1e75cbb26a4702c9e9fa5d148">00350</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a999737a0b112cb8f4691dfc97278bc7e">MICROPC_MOVE_USP_to_USP</a> <span class="vhdllogic">9&#39;d396</span>
<a name="l00351"></a><a class="code" href="ao68000_8v.html#aa8423f29fb78e63d70c05ba42b63752c">00351</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#af6f7102b5f4972ae11cad584ed87de14">MICROPC_ADDQ_SUBQ_not_An</a> <span class="vhdllogic">9&#39;d349</span>
<a name="l00352"></a><a class="code" href="ao68000_8v.html#aa5e8068e7d23c23aabbca8935458e3c2">00352</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a52c9810463f7dc671e021a7217259c04">MICROPC_ULNK</a> <span class="vhdllogic">9&#39;d420</span>
<a name="l00353"></a><a class="code" href="ao68000_8v.html#a64ff00949fa84c24b696dbe7e25b01b0">00353</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a5a514be119075b3c3ab64dfa849f3d9c">MICROPC_EXG</a> <span class="vhdllogic">9&#39;d198</span>
<a name="l00354"></a><a class="code" href="ao68000_8v.html#adb4576e2353bcba5c9efc76f4e759e1d">00354</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#aa3942210285e132e0151143eca9103b4">MICROPC_ADD_to_mem_SUB_to_mem_AND_to_mem_OR_to_mem</a> <span class="vhdllogic">9&#39;d251</span>
<a name="l00355"></a><a class="code" href="ao68000_8v.html#acbaeb74b252d36f73c7d8e558e9009d5">00355</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#ae56342916e5e608a0fdd3a01a11688b0">MICROPC_Bcc_BRA</a> <span class="vhdllogic">9&#39;d363</span>
<a name="l00356"></a><a class="code" href="ao68000_8v.html#a73d600c76e7d7cc2e664417176239da3">00356</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a8d6dcbc97994c642a8da0be0fecc257a">MICROPC_PERFORM_EA_READ_An</a> <span class="vhdllogic">9&#39;d86</span>
<a name="l00357"></a><a class="code" href="ao68000_8v.html#ab803dd137dec243c16bb4bf026c05bf0">00357</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a7cb86509757fa3419fbc8980724bd315">MICROPC_LOAD_EA_d16_PC</a> <span class="vhdllogic">9&#39;d76</span>
<a name="l00358"></a><a class="code" href="ao68000_8v.html#affae2e45ac62f4532ecadc8a956b5898">00358</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a836e1069d2a67eabcd01a92fcc2672f0">MICROPC_NOP</a> <span class="vhdllogic">9&#39;d480</span>
<a name="l00359"></a><a class="code" href="ao68000_8v.html#a245572b10dd3bb9beeefb9cb8908daf1">00359</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#affd3d4c8fd7cf2cbd78ecd99397f768b">MICROPC_MOVEM_register_to_memory_predecrement</a> <span class="vhdllogic">9&#39;d131</span>
<a name="l00360"></a><a class="code" href="ao68000_8v.html#a311c62af7d1b002fede956d82b0885ef">00360</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a76b52a43dac42903243a54b46c4bd839">MICROPC_RTE_RTR</a> <span class="vhdllogic">9&#39;d460</span>
<a name="l00361"></a><a class="code" href="ao68000_8v.html#a4209e30a2663bb31d78068718659884d">00361</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#aa106c5a18e8252dc2ced5ec2f77650d9">MICROPC_TRAP</a> <span class="vhdllogic">9&#39;d481</span>
<a name="l00362"></a><a class="code" href="ao68000_8v.html#aac8e14537f34b089e98fc8b3c2902c7c">00362</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#ae9cec5ce342a7d51efda687c24f35ab1">MICROPC_ADDQ_SUBQ_An</a> <span class="vhdllogic">9&#39;d352</span>
<a name="l00363"></a><a class="code" href="ao68000_8v.html#a78ec3f3a42f7b33f121d0a293b64ab2a">00363</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a775df2459596100b0e801ad20c24322b">MICROPC_MOVEM_register_to_memory_control</a> <span class="vhdllogic">9&#39;d147</span>
<a name="l00364"></a><a class="code" href="ao68000_8v.html#a9b56f391a36e3ed47a2109e88df1dbcb">00364</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a5ec24a82d3f383ac90da0ad8cc7bb0e3">MICROPC_BTST_immediate</a> <span class="vhdllogic">9&#39;d316</span>
<a name="l00365"></a><a class="code" href="ao68000_8v.html#a139e02a56567bb2b2d56c2d69902cbd0">00365</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a6827fab6e4b333e82a1de52cf6020b7a">MICROPC_MOVEP_memory_to_register</a> <span class="vhdllogic">9&#39;d98</span>
<a name="l00366"></a><a class="code" href="ao68000_8v.html#ab452d1e828902e03197249bbd0db027a">00366</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a20c5aa2df0d23f8bbdaccfca2bfed9f8">MICROPC_PERFORM_EA_WRITE_An</a> <span class="vhdllogic">9&#39;d92</span>
<a name="l00367"></a><a class="code" href="ao68000_8v.html#a74fe7da0fc0bc24d1057e3fc53792678">00367</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a09d3064b3da754163f244a861ce4c758">MICROPC_CHK</a> <span class="vhdllogic">9&#39;d282</span>
<a name="l00368"></a><a class="code" href="ao68000_8v.html#a0ad364bd16b2cee0f573cf3e48eee882">00368</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#ac09a1b9ae5783634cc9228354105fc94">MICROPC_Scc</a> <span class="vhdllogic">9&#39;d356</span>
<a name="l00369"></a><a class="code" href="ao68000_8v.html#a1aeaf72ab4278a1d5650f90313a56ba4">00369</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a088577482bc02135d9aa7a58c1d0ed05">MICROPC_JMP</a> <span class="vhdllogic">9&#39;d443</span>
<a name="l00370"></a><a class="code" href="ao68000_8v.html#aa4bbe36abf9c594596048d77663e9e22">00370</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a2ce22f23bd95ba0ee7690a059448a357">MICROPC_PEA</a> <span class="vhdllogic">9&#39;d168</span>
<a name="l00371"></a><a class="code" href="ao68000_8v.html#a70aec9dda79b3867e770a4d250732030">00371</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#ae4c00f630c944a41db777f7b51ee052d">MICROPC_SAVE_EA_minus_An</a> <span class="vhdllogic">9&#39;d97</span>
<a name="l00372"></a><a class="code" href="ao68000_8v.html#a0ea81f72abfe95073d6662c81c769433">00372</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a1508cd79053f2766a7bd8b7932ffdf0c">MICROPC_ANDI_EORI_ORI_ADDI_SUBI</a> <span class="vhdllogic">9&#39;d174</span>
<a name="l00373"></a><a class="code" href="ao68000_8v.html#a8cc8c17f8d8d9b1a118dfb933f028708">00373</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a89a5e8fafa2da702e7c00cb6fe7c2066">MICROPC_BCHG_BCLR_BSET_immediate</a> <span class="vhdllogic">9&#39;d311</span>
<a name="l00374"></a><a class="code" href="ao68000_8v.html#ae43352e5e1db083c51d51faf3344e0ed">00374</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a52c9fefea5280f08cf24bac6373252ac">MICROPC_LOAD_EA_An</a> <span class="vhdllogic">9&#39;d62</span>
<a name="l00375"></a><a class="code" href="ao68000_8v.html#a9482347a8cd5a694b7fbf3e7ab8ba863">00375</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#ac2394d0cf1bffca610b4c8fb77881207">MICROPC_PERFORM_EA_READ_imm</a> <span class="vhdllogic">9&#39;d87</span>
<a name="l00376"></a><a class="code" href="ao68000_8v.html#abc67aa9e69521c5fa49bee3d17922601">00376</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#acdb63549759af21684d2fd6e3dad8eb7">MICROPC_ADD_to_Dn_SUB_to_Dn_AND_to_Dn_OR_to_Dn</a> <span class="vhdllogic">9&#39;d256</span>
<a name="l00377"></a><a class="code" href="ao68000_8v.html#ac8568f114d824e091d8acf4a589544e7">00377</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#aced982dae609932df5af323a07349a2b">MICROPC_LEA</a> <span class="vhdllogic">9&#39;d162</span>
<a name="l00378"></a><a class="code" href="ao68000_8v.html#ad53e728ddf2ae9cbb7c3108aee81b05d">00378</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a5038c753fc668ac678fe18251202305e">MICROPC_TRAPV</a> <span class="vhdllogic">9&#39;d483</span>
<a name="l00379"></a><a class="code" href="ao68000_8v.html#a78a964bd72f8f8666ca6906112c0906e">00379</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#af1b92ab55a321f316faf654b5d284caf">MICROPC_LINK</a> <span class="vhdllogic">9&#39;d404</span>
<a name="l00380"></a><a class="code" href="ao68000_8v.html#a181564080da192ca96a54014049a8a6e">00380</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a52a25a790c5779d1d9c5d4b807f6e9e6">MICROPC_ABCD_SBCD_ADDX_SUBX</a> <span class="vhdllogic">9&#39;d189</span>
<a name="l00381"></a><a class="code" href="ao68000_8v.html#a5b4f35f37fcc59f614a2ee1722a1b2bf">00381</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a5aff7e16fcd8e2f83c6a684fb62506b3">MICROPC_BCHG_BCLR_BSET_register</a> <span class="vhdllogic">9&#39;d322</span>
<a name="l00382"></a><a class="code" href="ao68000_8v.html#a37d9332e76b096caceffcf06a711bda1">00382</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#ae21eb6fc6455af78326135e407ee17eb">MICROPC_PERFORM_EA_READ_Dn</a> <span class="vhdllogic">9&#39;d85</span>
<a name="l00383"></a><a class="code" href="ao68000_8v.html#a19027f3b9a58050a6c54fb6220d8c969">00383</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a92f21025346f2b9baad5ee3ea27c8833">MICROPC_LOAD_EA_illegal_command</a> <span class="vhdllogic">9&#39;d83</span>
<a name="l00384"></a><a class="code" href="ao68000_8v.html#a6029c9775c2a59720aa441c066c874a9">00384</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#af7581a9c9f99af85388e542ad881d71f">MICROPC_ORI_to_CCR_ORI_to_SR_ANDI_to_CCR_ANDI_to_SR_EORI_to_CCR_EORI_to_SR</a> <span class="vhdllogic">9&#39;d178</span>
<a name="l00385"></a><a class="code" href="ao68000_8v.html#a269b9dd820bd55bb127ad7b044f9eaa4">00385</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a2d30784cb012710f55727108a9b62cf1">MICROPC_CMP</a> <span class="vhdllogic">9&#39;d263</span>
<a name="l00386"></a><a class="code" href="ao68000_8v.html#a7f4d9cc4a2edb8c62ae8eeea069353d4">00386</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a65ca31e571d56e8b7e92ecadd58c94e1">MICROPC_SWAP_EXT</a> <span class="vhdllogic">9&#39;d341</span>
<a name="l00387"></a><a class="code" href="ao68000_8v.html#a68b5c92866588f128e8354134e0ae333">00387</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#aa23e89f5c79e7df7ff8ecf19a41ae572">MICROPC_STOP</a> <span class="vhdllogic">9&#39;d489</span>
<a name="l00388"></a><a class="code" href="ao68000_8v.html#aa71f860296e95d302e5773af83ce85f6">00388</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#ab8383cdb4a1df6d5f3296bb4244c7bab">MICROPC_PERFORM_EA_WRITE_memory</a> <span class="vhdllogic">9&#39;d93</span>
<a name="l00389"></a><a class="code" href="ao68000_8v.html#ad082f357abc9fcebe91ab98012bf20ab">00389</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a4a79b8f0394c470bd67ba6442fa12395">MICROPC_JSR</a> <span class="vhdllogic">9&#39;d451</span>
<a name="l00390"></a><a class="code" href="ao68000_8v.html#a51c49e5c7ae416b63ce044212b9ab4b7">00390</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a9b094e5044be3be8167a5b80bd274433">MICROPC_LOAD_EA_minus_An</a> <span class="vhdllogic">9&#39;d63</span>
<a name="l00391"></a><a class="code" href="ao68000_8v.html#a9fde5fd1573e75c4ee92cb4ced9dc2a9">00391</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a8a505b33f1c42b903dcb264862dda090">MICROPC_ASL_LSL_ROL_ROXL_ASR_LSR_ROR_ROXR_all_immediate_register</a> <span class="vhdllogic">9&#39;d213</span>
<a name="l00392"></a><a class="code" href="ao68000_8v.html#a1fc7f893ce96f66f9cd2ab9b54f5b319">00392</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a02dc58bcc0412d6c93647a1304f20443">MICROPC_SAVE_EA_An_plus</a> <span class="vhdllogic">9&#39;d95</span>
<a name="l00393"></a><a class="code" href="ao68000_8v.html#aa6cccbccacb5da82328bfdeeb3c5c6fa">00393</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#a6e06b607b9a1a157e3753943d2b015e1">MICROPC_LOAD_EA_d16_An</a> <span class="vhdllogic">9&#39;d65</span>
<a name="l00394"></a><a class="code" href="ao68000_8v.html#a43d41ce59902030032a09041c949465e">00394</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#aafdd46a7740d48b02e781d3136f7ce1d">MICROPC_LOAD_EA_An_plus</a> <span class="vhdllogic">9&#39;d62</span>
<a name="l00395"></a><a class="code" href="ao68000_8v.html#a357bfb655a15b7d0f5ed5c9f8cb0543a">00395</a> <span class="preprocessor">`define</span> <a class="code" href="ao68000_8v.html#ac2e6ac139e91da76695b3f953c994a0d">MICROPC_MOVEM_memory_to_register</a> <span class="vhdllogic">9&#39;d116</span>
<a name="l00396"></a>00396 <span class="keyword">// MICROCODE - DO NOT EDIT ABOVE</span>
<a name="l00397"></a>00397
<a name="l00398"></a>00398 <span class="keyword">/***********************************************************************************************************************</span>
<a name="l00399"></a>00399 <span class="keyword"> ao68000 top level module</span>
<a name="l00400"></a>00400 <span class="keyword"> ***********************************************************************************************************************/</span>
<a name="l00401"></a>00401
<a name="l00405"></a><a class="code" href="classao68000.html">00405</a> <span class="vhdlkeyword">module</span> <a class="code" href="classao68000.html">ao68000</a> (
<a name="l00406"></a>00406 <span class="keyword">//****************** WISHBONE</span>
<a name="l00407"></a><a class="code" href="classao68000.html#a6bee7e749a667293d6fbea8fc1380d12">00407</a> <span class="vhdlkeyword">input</span> <a class="code" href="classao68000.html#a6bee7e749a667293d6fbea8fc1380d12">CLK_I</a>,
<a name="l00408"></a><a class="code" href="classao68000.html#a5c903f753511ea2ec94145415549a148">00408</a> <span class="vhdlkeyword">input</span> <a class="code" href="classao68000.html#a5c903f753511ea2ec94145415549a148">reset_n</a>,
<a name="l00409"></a>00409
<a name="l00410"></a><a class="code" href="classao68000.html#a61843aa9b51ba23ec6c8c35892366559">00410</a> <span class="vhdlkeyword">output</span> <a class="code" href="classao68000.html#a61843aa9b51ba23ec6c8c35892366559">CYC_O</a>,
<a name="l00411"></a><a class="code" href="classao68000.html#a277895ba6004986cf490068945998fd0">00411</a> <span class="vhdlkeyword">output</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>] <a class="code" href="classao68000.html#a277895ba6004986cf490068945998fd0">ADR_O</a>,
<a name="l00412"></a><a class="code" href="classao68000.html#a801fbb1ae4c2812332242ce5d746cf36">00412</a> <span class="vhdlkeyword">output</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a801fbb1ae4c2812332242ce5d746cf36">DAT_O</a>,
<a name="l00413"></a><a class="code" href="classao68000.html#abffdd6f5cefb3be32b6db5bfc6b56442">00413</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#abffdd6f5cefb3be32b6db5bfc6b56442">DAT_I</a>,
<a name="l00414"></a><a class="code" href="classao68000.html#ae636550dd8481fd101623d0c665e894c">00414</a> <span class="vhdlkeyword">output</span> [<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#ae636550dd8481fd101623d0c665e894c">SEL_O</a>,
<a name="l00415"></a><a class="code" href="classao68000.html#a0e045730861ed97d585a192fcbbfd8a5">00415</a> <span class="vhdlkeyword">output</span> <a class="code" href="classao68000.html#a0e045730861ed97d585a192fcbbfd8a5">STB_O</a>,
<a name="l00416"></a><a class="code" href="classao68000.html#a6cd0052d2c68597331280fe500366be4">00416</a> <span class="vhdlkeyword">output</span> <a class="code" href="classao68000.html#a6cd0052d2c68597331280fe500366be4">WE_O</a>,
<a name="l00417"></a>00417
<a name="l00418"></a><a class="code" href="classao68000.html#a818ab80622c2364eb33814a5ef1f33ba">00418</a> <span class="vhdlkeyword">input</span> <a class="code" href="classao68000.html#a818ab80622c2364eb33814a5ef1f33ba">ACK_I</a>,
<a name="l00419"></a><a class="code" href="classao68000.html#a2a1a525f5a12c4e4a67bdf9fdf6df2be">00419</a> <span class="vhdlkeyword">input</span> <a class="code" href="classao68000.html#a2a1a525f5a12c4e4a67bdf9fdf6df2be">ERR_I</a>,
<a name="l00420"></a><a class="code" href="classao68000.html#af26604192b486b62964b9fada0bc6aff">00420</a> <span class="vhdlkeyword">input</span> <a class="code" href="classao68000.html#af26604192b486b62964b9fada0bc6aff">RTY_I</a>,
<a name="l00421"></a>00421
<a name="l00422"></a>00422 <span class="keyword">// TAG_TYPE: TGC_O</span>
<a name="l00423"></a><a class="code" href="classao68000.html#a067f51b370f090178fbe8248b48f50b0">00423</a> <span class="vhdlkeyword">output</span> <a class="code" href="classao68000.html#a067f51b370f090178fbe8248b48f50b0">SGL_O</a>,
<a name="l00424"></a><a class="code" href="classao68000.html#af57b8a8680a72f392a1f2af3ee2b61a9">00424</a> <span class="vhdlkeyword">output</span> <a class="code" href="classao68000.html#af57b8a8680a72f392a1f2af3ee2b61a9">BLK_O</a>,
<a name="l00425"></a><a class="code" href="classao68000.html#a951678555b50fc9229fe9b553c7b09d0">00425</a> <span class="vhdlkeyword">output</span> <a class="code" href="classao68000.html#a951678555b50fc9229fe9b553c7b09d0">RMW_O</a>,
<a name="l00426"></a>00426
<a name="l00427"></a>00427 <span class="keyword">// TAG_TYPE: TGA_O</span>
<a name="l00428"></a><a class="code" href="classao68000.html#a02037d382851d62248a83cbc35dd1529">00428</a> <span class="vhdlkeyword">output</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a02037d382851d62248a83cbc35dd1529">CTI_O</a>,
<a name="l00429"></a><a class="code" href="classao68000.html#a08f46078858b7e8b6f2dfe2f6ec20c84">00429</a> <span class="vhdlkeyword">output</span> [<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a08f46078858b7e8b6f2dfe2f6ec20c84">BTE_O</a>,
<a name="l00430"></a>00430
<a name="l00431"></a>00431 <span class="keyword">// TAG_TYPE: TGC_O</span>
<a name="l00432"></a><a class="code" href="classao68000.html#a4b66c96fdd706df792811882b6f9fa9b">00432</a> <span class="vhdlkeyword">output</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a4b66c96fdd706df792811882b6f9fa9b">fc_o</a>,
<a name="l00433"></a>00433
<a name="l00434"></a>00434 <span class="keyword">//****************** OTHER</span>
<a name="l00435"></a>00435 <span class="keyword">/* interrupt acknowlege:</span>
<a name="l00436"></a>00436 <span class="keyword"> ACK_I: interrupt vector on DAT_I[7:0]</span>
<a name="l00437"></a>00437 <span class="keyword"> ERR_I: spurious interrupt</span>
<a name="l00438"></a>00438 <span class="keyword"> RTY_I: autovector</span>
<a name="l00439"></a>00439 <span class="keyword"> */</span>
<a name="l00440"></a><a class="code" href="classao68000.html#a1ff11e699c0192bb533209bd3cf9d5ba">00440</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a1ff11e699c0192bb533209bd3cf9d5ba">ipl_i</a>,
<a name="l00441"></a><a class="code" href="classao68000.html#a8246303a982cd24ff7dcc7b36c3038e2">00441</a> <span class="vhdlkeyword">output</span> <a class="code" href="classao68000.html#a8246303a982cd24ff7dcc7b36c3038e2">reset_o</a>,
<a name="l00442"></a><a class="code" href="classao68000.html#a0a90a371e379531c8e466799ff5c3d49">00442</a> <span class="vhdlkeyword">output</span> <a class="code" href="classao68000.html#a0a90a371e379531c8e466799ff5c3d49">blocked_o</a>
<a name="l00443"></a>00443 );
<a name="l00444"></a>00444
<a name="l00445"></a><a class="code" href="classao68000.html#abef0ede1a300bfe80eeecc8d51a0afe0">00445</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#abef0ede1a300bfe80eeecc8d51a0afe0">sr</a>;
<a name="l00446"></a><a class="code" href="classao68000.html#a7e653ecba236b212b87d66d9e46f3914">00446</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a7e653ecba236b212b87d66d9e46f3914">size</a>;
<a name="l00447"></a><a class="code" href="classao68000.html#aaf40157e76d59864abf62ffe1c4f605d">00447</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#aaf40157e76d59864abf62ffe1c4f605d">address</a>;
<a name="l00448"></a><a class="code" href="classao68000.html#a3da831ef8ac6ec75b132d8d299115092">00448</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classao68000.html#a3da831ef8ac6ec75b132d8d299115092">address_type</a>;
<a name="l00449"></a><a class="code" href="classao68000.html#a4d00737f890e3080a8915e23668c2fe0">00449</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classao68000.html#a4d00737f890e3080a8915e23668c2fe0">read_modify_write_flag</a>;
<a name="l00450"></a><a class="code" href="classao68000.html#a341be6a91dd12d14293eaa53c7c254d2">00450</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a341be6a91dd12d14293eaa53c7c254d2">data_read</a>;
<a name="l00451"></a><a class="code" href="classao68000.html#ac7098386bafc8ad2194743a7ebbc3928">00451</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#ac7098386bafc8ad2194743a7ebbc3928">data_write</a>;
<a name="l00452"></a><a class="code" href="classao68000.html#a5e28cd1d3701cc3d88dd0df22e697108">00452</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a5e28cd1d3701cc3d88dd0df22e697108">pc</a>;
<a name="l00453"></a><a class="code" href="classao68000.html#a7f60c5a54b85d16a5daa159e3f93f3a2">00453</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classao68000.html#a7f60c5a54b85d16a5daa159e3f93f3a2">prefetch_ir_valid</a>;
<a name="l00454"></a><a class="code" href="classao68000.html#a3403e55545d6a49c4a4fa6f16cfe7126">00454</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">79</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a3403e55545d6a49c4a4fa6f16cfe7126">prefetch_ir</a>;
<a name="l00455"></a><a class="code" href="classao68000.html#a63cc96be1f84432ea4b755f14c9801bd">00455</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classao68000.html#a63cc96be1f84432ea4b755f14c9801bd">do_reset</a>;
<a name="l00456"></a><a class="code" href="classao68000.html#aaa926f4340d9533fa404ed2121e01add">00456</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classao68000.html#aaa926f4340d9533fa404ed2121e01add">do_read</a>;
<a name="l00457"></a><a class="code" href="classao68000.html#a2fd644eba6903b45558dba81d759d60a">00457</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classao68000.html#a2fd644eba6903b45558dba81d759d60a">do_write</a>;
<a name="l00458"></a><a class="code" href="classao68000.html#a017afb5ca18639747617179cd4b5b9af">00458</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classao68000.html#a017afb5ca18639747617179cd4b5b9af">do_interrupt</a>;
<a name="l00459"></a><a class="code" href="classao68000.html#a8d22354dba9690de7ed1f40174e7fac5">00459</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classao68000.html#a8d22354dba9690de7ed1f40174e7fac5">do_blocked</a>;
<a name="l00460"></a><a class="code" href="classao68000.html#aa9b27c579ff3359c8722f33ddc218606">00460</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classao68000.html#aa9b27c579ff3359c8722f33ddc218606">jmp_address_trap</a>;
<a name="l00461"></a><a class="code" href="classao68000.html#a68c0830ee44827649eeece60ccb007a4">00461</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classao68000.html#a68c0830ee44827649eeece60ccb007a4">jmp_bus_trap</a>;
<a name="l00462"></a><a class="code" href="classao68000.html#adc838dee1d3e5fb81b69d9cd825e2078">00462</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classao68000.html#adc838dee1d3e5fb81b69d9cd825e2078">finished</a>;
<a name="l00463"></a><a class="code" href="classao68000.html#ab31d9d61b3fb7b8cf2d2588943144c51">00463</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#ab31d9d61b3fb7b8cf2d2588943144c51">interrupt_trap</a>;
<a name="l00464"></a><a class="code" href="classao68000.html#a48c24a88040f4bfdc6df4f6d44c74f02">00464</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a48c24a88040f4bfdc6df4f6d44c74f02">interrupt_mask</a>;
<a name="l00465"></a><a class="code" href="classao68000.html#aa64aa2047c9823a2b6354f945b7a1e91">00465</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classao68000.html#aa64aa2047c9823a2b6354f945b7a1e91">rw_state</a>;
<a name="l00466"></a><a class="code" href="classao68000.html#ad29c33a9347a9dc0ad7e6a38a9674cea">00466</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#ad29c33a9347a9dc0ad7e6a38a9674cea">fc_state</a>;
<a name="l00467"></a><a class="code" href="classao68000.html#a2d3d54c5eadf71c6a422a5e9c3c1c0f0">00467</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a2d3d54c5eadf71c6a422a5e9c3c1c0f0">decoder_trap</a>;
<a name="l00468"></a><a class="code" href="classao68000.html#a0c5ac49d1bd4f956a99173ba8d76824e">00468</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a0c5ac49d1bd4f956a99173ba8d76824e">usp</a>;
<a name="l00469"></a><a class="code" href="classao68000.html#a9fbb4d38edd465bd6e91c844baa3cc32">00469</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a9fbb4d38edd465bd6e91c844baa3cc32">Dn_output</a>;
<a name="l00470"></a><a class="code" href="classao68000.html#a38819ff180e465048ac34fe24c17db2e">00470</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a38819ff180e465048ac34fe24c17db2e">An_output</a>;
<a name="l00471"></a><a class="code" href="classao68000.html#ae78165f07b720df4d51db101effc08c5">00471</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#ae78165f07b720df4d51db101effc08c5">result</a>;
<a name="l00472"></a><a class="code" href="classao68000.html#ac4bdc1d7a8df2e5b24f92e8c47b87d31">00472</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#ac4bdc1d7a8df2e5b24f92e8c47b87d31">An_address</a>;
<a name="l00473"></a><a class="code" href="classao68000.html#a314e14c9d14faca666d7282e70aec69e">00473</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a314e14c9d14faca666d7282e70aec69e">An_input</a>;
<a name="l00474"></a><a class="code" href="classao68000.html#a8ce376b6468188948a66dd3090b82303">00474</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a8ce376b6468188948a66dd3090b82303">Dn_address</a>;
<a name="l00475"></a><a class="code" href="classao68000.html#a88e0be4d7a8d7765fd81d2c7ecec034c">00475</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a88e0be4d7a8d7765fd81d2c7ecec034c">ir</a>;
<a name="l00476"></a><a class="code" href="classao68000.html#a986f73747582af0c6343b171a856a806">00476</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">8</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a986f73747582af0c6343b171a856a806">decoder_micropc</a>;
<a name="l00477"></a><a class="code" href="classao68000.html#ad3946c0f11e87469fdc3601692a49317">00477</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classao68000.html#ad3946c0f11e87469fdc3601692a49317">alu_signal</a>;
<a name="l00478"></a><a class="code" href="classao68000.html#abc430119a2bec27890ed3564ab72ffc3">00478</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classao68000.html#abc430119a2bec27890ed3564ab72ffc3">alu_mult_div_ready</a>;
<a name="l00479"></a><a class="code" href="classao68000.html#ae69df823449aa74618aaf7f853d3f11e">00479</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">8</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#ae69df823449aa74618aaf7f853d3f11e">load_ea</a>;
<a name="l00480"></a><a class="code" href="classao68000.html#a58cd92d0477a981c2008bd90817becc9">00480</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">8</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a58cd92d0477a981c2008bd90817becc9">perform_ea_read</a>;
<a name="l00481"></a><a class="code" href="classao68000.html#ab422cb8cd23d482adfd2aa9caa9761c5">00481</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">8</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#ab422cb8cd23d482adfd2aa9caa9761c5">perform_ea_write</a>;
<a name="l00482"></a><a class="code" href="classao68000.html#a09f55857356fd236f8350946112ea688">00482</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">8</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a09f55857356fd236f8350946112ea688">save_ea</a>;
<a name="l00483"></a><a class="code" href="classao68000.html#a3cb489d55f80adb5d4cafd9f9f4679be">00483</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classao68000.html#a3cb489d55f80adb5d4cafd9f9f4679be">trace_flag</a>;
<a name="l00484"></a><a class="code" href="classao68000.html#abf4182c32ee4bc817caa8b5d6772ab7a">00484</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classao68000.html#abf4182c32ee4bc817caa8b5d6772ab7a">group_0_flag</a>;
<a name="l00485"></a><a class="code" href="classao68000.html#aa7e62464a0cd6d4d476939a4ddcb7cb0">00485</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classao68000.html#aa7e62464a0cd6d4d476939a4ddcb7cb0">stop_flag</a>;
<a name="l00486"></a><a class="code" href="classao68000.html#ace8aff52b8f30690429b9936f07c97a0">00486</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">8</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#ace8aff52b8f30690429b9936f07c97a0">micro_pc</a>;
<a name="l00487"></a><a class="code" href="classao68000.html#a2ce08034a6163ba919bc8671ab418925">00487</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a2ce08034a6163ba919bc8671ab418925">operand1</a>;
<a name="l00488"></a><a class="code" href="classao68000.html#abba9faff9213088a72a8ec33a43e7b88">00488</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#abba9faff9213088a72a8ec33a43e7b88">operand2</a>;
<a name="l00489"></a><a class="code" href="classao68000.html#a01988743194f85b63333d073c7fe68f7">00489</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">4</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a01988743194f85b63333d073c7fe68f7">movem_loop</a>;
<a name="l00490"></a><a class="code" href="classao68000.html#a280d638b17d688517b637ad90d6df376">00490</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a280d638b17d688517b637ad90d6df376">movem_reg</a>;
<a name="l00491"></a><a class="code" href="classao68000.html#a83b2f86d57930b08a8db6e9b8410837f">00491</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classao68000.html#a30446f4f602b6185a7ed25e5aa8e470e">condition</a>;
<a name="l00492"></a><a class="code" href="classao68000.html#ae4e21fd281172d5e74e527236b1519f2">00492</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">87</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#ae4e21fd281172d5e74e527236b1519f2">micro_data</a>;
<a name="l00493"></a><a class="code" href="classao68000.html#ae552c0d79d4e728a385243f7339c4090">00493</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#ae552c0d79d4e728a385243f7339c4090">fault_address_state</a>;
<a name="l00494"></a><a class="code" href="classao68000.html#a71903694d8425f743a2f6e753a7e2e89">00494</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a71903694d8425f743a2f6e753a7e2e89">pc_change</a>;
<a name="l00495"></a><a class="code" href="classao68000.html#aeb25637923460dddbd88804a217e5ce5">00495</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classao68000.html#aeb25637923460dddbd88804a217e5ce5">prefetch_ir_valid_32</a>;
<a name="l00496"></a><a class="code" href="classao68000.html#a7e1ce5d495efd402ecaac1127691254b">00496</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a7e1ce5d495efd402ecaac1127691254b">ea_type</a>;
<a name="l00497"></a><a class="code" href="classao68000.html#abe4582e421ebfc379fc3e26b925783fa">00497</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#abe4582e421ebfc379fc3e26b925783fa">ea_mod</a>;
<a name="l00498"></a><a class="code" href="classao68000.html#a127110f55f7a36e476471f8860abc860">00498</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a127110f55f7a36e476471f8860abc860">ea_reg</a>;
<a name="l00499"></a><a class="code" href="classao68000.html#a3e5b96a27d6416089864cf873b6099d2">00499</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">17</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a3e5b96a27d6416089864cf873b6099d2">decoder_alu</a>;
<a name="l00500"></a><a class="code" href="classao68000.html#af8572caa0f68ae84d7415194299db547">00500</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">17</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#af8572caa0f68ae84d7415194299db547">decoder_alu_reg</a>;
<a name="l00501"></a>00501
<a name="l00502"></a><a class="code" href="classao68000.html#a2c34e1b84d9fe30c49c5c814be3dc392">00502</a> <a class="code" href="classao68000.html#a2c34e1b84d9fe30c49c5c814be3dc392">bus_control</a> <span class="vhdlchar">bus_control_m</span>(
<a name="l00503"></a>00503 .<a class="code" href="classbus__control.html#a4054e75175a8d9a78f2e34150e1c0465">ao68000</a> (<a class="code" href="classbus__control.html#a4054e75175a8d9a78f2e34150e1c0465">ao68000</a>),
<a name="l00504"></a>00504 .<a class="code" href="classbus__control.html#a7c0d04a169a341f11af2b012abd481b3">ao68000</a> (<a class="code" href="classbus__control.html#a7c0d04a169a341f11af2b012abd481b3">ao68000</a>),
<a name="l00505"></a>00505 .<a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">ao68000</a> (<a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">ao68000</a>),
<a name="l00506"></a>00506 .<a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ao68000</a> (<a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ao68000</a>),
<a name="l00507"></a>00507 .<a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">ao68000</a> (<a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">ao68000</a>),
<a name="l00508"></a>00508 .<a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">ao68000</a> (<a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">ao68000</a>),
<a name="l00509"></a>00509 .<a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">ao68000</a> (<a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">ao68000</a>),
<a name="l00510"></a>00510 .<a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">ao68000</a> (<a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">ao68000</a>),
<a name="l00511"></a>00511 .<a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">ao68000</a> (<a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">ao68000</a>),
<a name="l00512"></a>00512 .<a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ao68000</a> (<a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ao68000</a>),
<a name="l00513"></a>00513 .<a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ao68000</a> (<a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ao68000</a>),
<a name="l00514"></a>00514 .<a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">ao68000</a> (<a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">ao68000</a>),
<a name="l00515"></a>00515 .<a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">ao68000</a> (<a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">ao68000</a>),
<a name="l00516"></a>00516 .<a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">ao68000</a> (<a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">ao68000</a>),
<a name="l00517"></a>00517 .<a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">ao68000</a> (<a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">ao68000</a>),
<a name="l00518"></a>00518 .<a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">ao68000</a> (<a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">ao68000</a>),
<a name="l00519"></a>00519 .<a class="code" href="classbus__control.html#a1dd14b92bd4443311024f3a3fa6e0c8d">ao68000</a> (<a class="code" href="classbus__control.html#a1dd14b92bd4443311024f3a3fa6e0c8d">ao68000</a>),
<a name="l00520"></a>00520 .<a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">ao68000</a> (<a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">ao68000</a>),
<a name="l00521"></a>00521 .<a class="code" href="classbus__control.html#a93ed536c4b75b18958ffa28838ae5957">ao68000</a> (<a class="code" href="classbus__control.html#a93ed536c4b75b18958ffa28838ae5957">ao68000</a>),
<a name="l00522"></a>00522 .<a class="code" href="classbus__control.html#a139d4b4c2d79d749375db4dd71f3a9fd">ao68000</a> (<a class="code" href="classbus__control.html#a139d4b4c2d79d749375db4dd71f3a9fd">ao68000</a>),
<a name="l00523"></a>00523 .<a class="code" href="classao68000.html#a0a90a371e379531c8e466799ff5c3d49">blocked_o</a> (<a class="code" href="classao68000.html#a0a90a371e379531c8e466799ff5c3d49">blocked_o</a>),
<a name="l00524"></a>00524
<a name="l00525"></a>00525 .<span class="vhdlchar">supervisor_i</span> (<a class="code" href="classao68000.html#abef0ede1a300bfe80eeecc8d51a0afe0">sr</a>[<span class="vhdllogic">13</span>]),
<a name="l00526"></a>00526 .<span class="vhdlchar">ipm_i</span> (<a class="code" href="classao68000.html#abef0ede1a300bfe80eeecc8d51a0afe0">sr</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">8</span>]),
<a name="l00527"></a>00527 .<span class="vhdlchar">size_i</span> (<a class="code" href="classao68000.html#a7e653ecba236b212b87d66d9e46f3914">size</a>),
<a name="l00528"></a>00528 .<span class="vhdlchar">address_i</span> (<a class="code" href="classao68000.html#aaf40157e76d59864abf62ffe1c4f605d">address</a>),
<a name="l00529"></a>00529 .<span class="vhdlchar">address_type_i</span> (<a class="code" href="classao68000.html#a3da831ef8ac6ec75b132d8d299115092">address_type</a>),
<a name="l00530"></a>00530 .<span class="vhdlchar">read_modify_write_i</span> (<a class="code" href="classao68000.html#a4d00737f890e3080a8915e23668c2fe0">read_modify_write_flag</a>),
<a name="l00531"></a>00531 .<span class="vhdlchar">data_write_i</span> (<a class="code" href="classao68000.html#ac7098386bafc8ad2194743a7ebbc3928">data_write</a>),
<a name="l00532"></a>00532 .<span class="vhdlchar">data_read_o</span> (<a class="code" href="classao68000.html#a341be6a91dd12d14293eaa53c7c254d2">data_read</a>),
<a name="l00533"></a>00533 .<span class="vhdlchar">pc_i</span> (<a class="code" href="classao68000.html#a5e28cd1d3701cc3d88dd0df22e697108">pc</a>),
<a name="l00534"></a>00534 .<span class="vhdlchar">pc_change_i</span> (<a class="code" href="classao68000.html#a71903694d8425f743a2f6e753a7e2e89">pc_change</a>),
<a name="l00535"></a>00535 .<span class="vhdlchar">prefetch_ir_o</span> (<a class="code" href="classao68000.html#a3403e55545d6a49c4a4fa6f16cfe7126">prefetch_ir</a>),
<a name="l00536"></a>00536 .<span class="vhdlchar">prefetch_ir_valid_32_o</span> (<a class="code" href="classao68000.html#aeb25637923460dddbd88804a217e5ce5">prefetch_ir_valid_32</a>),
<a name="l00537"></a>00537 .<span class="vhdlchar">prefetch_ir_valid_o</span> (<a class="code" href="classao68000.html#a7f60c5a54b85d16a5daa159e3f93f3a2">prefetch_ir_valid</a>),
<a name="l00538"></a>00538 .<span class="vhdlchar">prefetch_ir_valid_80_o</span> (),
<a name="l00539"></a>00539 .<span class="vhdlchar">do_reset_i</span> (<a class="code" href="classao68000.html#a63cc96be1f84432ea4b755f14c9801bd">do_reset</a>),
<a name="l00540"></a>00540 .<span class="vhdlchar">do_blocked_i</span> (<a class="code" href="classao68000.html#a8d22354dba9690de7ed1f40174e7fac5">do_blocked</a>),
<a name="l00541"></a>00541 .<span class="vhdlchar">do_read_i</span> (<a class="code" href="classao68000.html#aaa926f4340d9533fa404ed2121e01add">do_read</a>),
<a name="l00542"></a>00542 .<span class="vhdlchar">do_write_i</span> (<a class="code" href="classao68000.html#a2fd644eba6903b45558dba81d759d60a">do_write</a>),
<a name="l00543"></a>00543 .<span class="vhdlchar">do_interrupt_i</span> (<a class="code" href="classao68000.html#a017afb5ca18639747617179cd4b5b9af">do_interrupt</a>),
<a name="l00544"></a>00544 .<span class="vhdlchar">jmp_address_trap_o</span> (<a class="code" href="classao68000.html#aa9b27c579ff3359c8722f33ddc218606">jmp_address_trap</a>),
<a name="l00545"></a>00545 .<span class="vhdlchar">jmp_bus_trap_o</span> (<a class="code" href="classao68000.html#a68c0830ee44827649eeece60ccb007a4">jmp_bus_trap</a>),
<a name="l00546"></a>00546 .<span class="vhdlchar">finished_o</span> (<a class="code" href="classao68000.html#adc838dee1d3e5fb81b69d9cd825e2078">finished</a>),
<a name="l00547"></a>00547 .<span class="vhdlchar">interrupt_trap_o</span> (<a class="code" href="classao68000.html#ab31d9d61b3fb7b8cf2d2588943144c51">interrupt_trap</a>),
<a name="l00548"></a>00548 .<span class="vhdlchar">interrupt_mask_o</span> (<a class="code" href="classao68000.html#a48c24a88040f4bfdc6df4f6d44c74f02">interrupt_mask</a>),
<a name="l00549"></a>00549 .<span class="vhdlchar">rw_state_o</span> (<a class="code" href="classao68000.html#aa64aa2047c9823a2b6354f945b7a1e91">rw_state</a>),
<a name="l00550"></a>00550 .<span class="vhdlchar">fc_state_o</span> (<a class="code" href="classao68000.html#ad29c33a9347a9dc0ad7e6a38a9674cea">fc_state</a>),
<a name="l00551"></a>00551 .<span class="vhdlchar">fault_address_state_o</span> (<a class="code" href="classao68000.html#ae552c0d79d4e728a385243f7339c4090">fault_address_state</a>)
<a name="l00552"></a>00552 );
<a name="l00553"></a>00553
<a name="l00554"></a><a class="code" href="classao68000.html#ad82deea9ab15d2e02890df123ad51fd9">00554</a> <a class="code" href="classao68000.html#ad82deea9ab15d2e02890df123ad51fd9">registers</a> <span class="vhdlchar">registers_m</span>(
<a name="l00555"></a>00555 .<a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">ao68000</a> (<a class="code" href="classao68000.html#a6bee7e749a667293d6fbea8fc1380d12">CLK_I</a>),
<a name="l00556"></a>00556 .<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">ao68000</a> (<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">ao68000</a>),
<a name="l00557"></a>00557 .<a class="code" href="classregisters.html#a0cdf5b5316a0edcd85909fc9da5ca864">ao68000</a> (<a class="code" href="classregisters.html#a0cdf5b5316a0edcd85909fc9da5ca864">ao68000</a>),
<a name="l00558"></a>00558 .<a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">ao68000</a> (<a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">ao68000</a>),
<a name="l00559"></a>00559 .<a class="code" href="classregisters.html#a8031b93d1dc568b98697eb0c81b13bfd">ao68000</a> (<a class="code" href="classregisters.html#a8031b93d1dc568b98697eb0c81b13bfd">ao68000</a>),
<a name="l00560"></a>00560 .<a class="code" href="classregisters.html#ad27ecd2d9ef571fa88b998f3674fe9a6">ao68000</a> (<a class="code" href="classregisters.html#ad27ecd2d9ef571fa88b998f3674fe9a6">ao68000</a>),
<a name="l00561"></a>00561 .<a class="code" href="classregisters.html#a116473c99b3cbf75fd0f48a25ea9227e">ao68000</a> (<a class="code" href="classregisters.html#a116473c99b3cbf75fd0f48a25ea9227e">ao68000</a>),
<a name="l00562"></a>00562 .<a class="code" href="classregisters.html#ae12d419de758617259ab74281fd09f03">ao68000</a> (<a class="code" href="classregisters.html#ae12d419de758617259ab74281fd09f03">ao68000</a>),
<a name="l00563"></a>00563 .<a class="code" href="classregisters.html#a1864a58a4089bd5d72ba19730137c5ce">ao68000</a> (<a class="code" href="classregisters.html#a1864a58a4089bd5d72ba19730137c5ce">ao68000</a>),
<a name="l00564"></a>00564 .<a class="code" href="classregisters.html#acfc96bc559a0660239cb6b8a8836b862">ao68000</a> (<a class="code" href="classregisters.html#acfc96bc559a0660239cb6b8a8836b862">ao68000</a>),
<a name="l00565"></a>00565 .<a class="code" href="classregisters.html#a10ef9845f594ecc956dc1b1c8cdef44e">ao68000</a> (<a class="code" href="classregisters.html#a10ef9845f594ecc956dc1b1c8cdef44e">ao68000</a>),
<a name="l00566"></a>00566 .<a class="code" href="classregisters.html#aa92eeffb2c5af01c413399dfb1f58b17">ao68000</a> (<a class="code" href="classregisters.html#aa92eeffb2c5af01c413399dfb1f58b17">ao68000</a>),
<a name="l00567"></a>00567 .<a class="code" href="classregisters.html#a278b33a84015867a530ac4279331d570">ao68000</a> (<a class="code" href="classregisters.html#a278b33a84015867a530ac4279331d570">ao68000</a>),
<a name="l00568"></a>00568 .<a class="code" href="classregisters.html#a6810e76be48010f9b34a91c27ddd636b">ao68000</a> (<a class="code" href="classregisters.html#a6810e76be48010f9b34a91c27ddd636b">ao68000</a>),
<a name="l00569"></a>00569 .<a class="code" href="classregisters.html#a659bea909e94f7512c4311bcff473a5d">ao68000</a> (<a class="code" href="classregisters.html#a659bea909e94f7512c4311bcff473a5d">ao68000</a>),
<a name="l00570"></a>00570 .<a class="code" href="classregisters.html#a7fdc26691a005524667257529b1c1212">ao68000</a> (<a class="code" href="classregisters.html#a7fdc26691a005524667257529b1c1212">ao68000</a>),
<a name="l00571"></a>00571
<a name="l00572"></a>00572 .<a class="code" href="classregisters.html#a73f335a76d3869b20956c67a67ff8f6e">ao68000</a> (<a class="code" href="classregisters.html#a73f335a76d3869b20956c67a67ff8f6e">ao68000</a>),
<a name="l00573"></a>00573
<a name="l00574"></a>00574 .<a class="code" href="classregisters.html#aa1a45d113f21dba8f82a93ddfe1d6409">ao68000</a> (<a class="code" href="classregisters.html#aa1a45d113f21dba8f82a93ddfe1d6409">ao68000</a>),
<a name="l00575"></a>00575 .<a class="code" href="classregisters.html#ae09341fa22dc0b4675dc02dc4a5fb918">ao68000</a> (<a class="code" href="ao68000_8v.html#a3a14e27ef3dcc344f66e5eb0aa93d38d">`MICRO_DATA_ea_reg</a><span class="vhdlchar"></span>),
<a name="l00576"></a>00576 .<a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ao68000</a> (<a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ao68000</a>),
<a name="l00577"></a>00577 .<a class="code" href="classregisters.html#af6205981eadd3ee1e9fa193f04b6a893">ao68000</a> (<a class="code" href="ao68000_8v.html#aa691c194246c2ac4def5609ba8963326">`MICRO_DATA_ea_mod</a><span class="vhdlchar"></span>),
<a name="l00578"></a>00578 .<a class="code" href="classregisters.html#a34f0e8ea4d6f79a3c8cf7e3ba129ea58">ao68000</a> (<a class="code" href="classregisters.html#a34f0e8ea4d6f79a3c8cf7e3ba129ea58">ao68000</a>),
<a name="l00579"></a>00579 .<a class="code" href="classregisters.html#aa22fa504627eea9bff308c3358ef9240">ao68000</a> (<a class="code" href="ao68000_8v.html#ae45014e01523ad88c7b7bd74cdb1b8db">`MICRO_DATA_ea_type</a><span class="vhdlchar"></span>),
<a name="l00580"></a>00580 .<a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">ao68000</a> (<a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">ao68000</a>),
<a name="l00581"></a>00581 .<span class="vhdlchar">operand1_control</span> (<a class="code" href="ao68000_8v.html#a80f755d97ef46590665dc161a3de3f60">`MICRO_DATA_op1</a><span class="vhdlchar"></span>),
<a name="l00582"></a>00582 .<a class="code" href="classao68000.html#abba9faff9213088a72a8ec33a43e7b88">operand2</a> (<a class="code" href="classao68000.html#abba9faff9213088a72a8ec33a43e7b88">operand2</a>),
<a name="l00583"></a>00583 .<span class="vhdlchar">operand2_control</span> (<a class="code" href="ao68000_8v.html#ab1641cfecafe6ff147522b68bd7f9c0d">`MICRO_DATA_op2</a><span class="vhdlchar"></span>),
<a name="l00584"></a>00584 .<a class="code" href="classao68000.html#aaf40157e76d59864abf62ffe1c4f605d">address</a> (<a class="code" href="classao68000.html#aaf40157e76d59864abf62ffe1c4f605d">address</a>),
<a name="l00585"></a>00585 .<a class="code" href="classao68000.html#a3da831ef8ac6ec75b132d8d299115092">address_type</a> (<a class="code" href="classao68000.html#a3da831ef8ac6ec75b132d8d299115092">address_type</a>),
<a name="l00586"></a>00586 .<span class="vhdlchar">address_control</span> (<a class="code" href="ao68000_8v.html#a600647e8ee417a6f81b00e53f101af5f">`MICRO_DATA_address</a><span class="vhdlchar"></span>),
<a name="l00587"></a>00587 .<a class="code" href="classao68000.html#a7e653ecba236b212b87d66d9e46f3914">size</a> (<a class="code" href="classao68000.html#a7e653ecba236b212b87d66d9e46f3914">size</a>),
<a name="l00588"></a>00588 .<span class="vhdlchar">size_control</span> (<a class="code" href="ao68000_8v.html#a73de1704db2fb003c3a2da4b3f1667de">`MICRO_DATA_size</a><span class="vhdlchar"></span>),
<a name="l00589"></a>00589 .<span class="vhdlchar">movem_modreg</span> (),
<a name="l00590"></a>00590 .<span class="vhdlchar">movem_modreg_control</span> (<a class="code" href="ao68000_8v.html#a73831c7c30f75ec6e263ce47f1a3fb64">`MICRO_DATA_movem_modreg</a><span class="vhdlchar"></span>),
<a name="l00591"></a>00591 .<a class="code" href="classao68000.html#a01988743194f85b63333d073c7fe68f7">movem_loop</a> (<a class="code" href="classao68000.html#a01988743194f85b63333d073c7fe68f7">movem_loop</a>),
<a name="l00592"></a>00592 .<span class="vhdlchar">movem_loop_control</span> (<a class="code" href="ao68000_8v.html#a93b7332d93eddbed779bba21295794f3">`MICRO_DATA_movem_loop</a><span class="vhdlchar"></span>),
<a name="l00593"></a>00593 .<a class="code" href="classao68000.html#a280d638b17d688517b637ad90d6df376">movem_reg</a> (<a class="code" href="classao68000.html#a280d638b17d688517b637ad90d6df376">movem_reg</a>),
<a name="l00594"></a>00594 .<span class="vhdlchar">movem_reg_control</span> (<a class="code" href="ao68000_8v.html#a5246b6d3ea1d05aa2d34597666a8da31">`MICRO_DATA_movem_reg</a><span class="vhdlchar"></span>),
<a name="l00595"></a>00595 .<a class="code" href="classao68000.html#a88e0be4d7a8d7765fd81d2c7ecec034c">ir</a> (<a class="code" href="classao68000.html#a88e0be4d7a8d7765fd81d2c7ecec034c">ir</a>),
<a name="l00596"></a>00596 .<span class="vhdlchar">ir_control</span> (<a class="code" href="ao68000_8v.html#a15830df6bfc267949eaeb9c862ec021a">`MICRO_DATA_ir</a><span class="vhdlchar"></span>),
<a name="l00597"></a>00597 .<a class="code" href="classao68000.html#a5e28cd1d3701cc3d88dd0df22e697108">pc</a> (<a class="code" href="classao68000.html#a5e28cd1d3701cc3d88dd0df22e697108">pc</a>),
<a name="l00598"></a>00598 .<span class="vhdlchar">pc_control</span> (<a class="code" href="ao68000_8v.html#a35a9274fdd4fa537efdb15f0b0b787e6">`MICRO_DATA_pc</a><span class="vhdlchar"></span>),
<a name="l00599"></a>00599 .<span class="vhdlchar">trap</span> (),
<a name="l00600"></a>00600 .<span class="vhdlchar">trap_control</span> (<a class="code" href="ao68000_8v.html#ac4878c2a7cf765d443c1c9da238b5ac9">`MICRO_DATA_trap</a><span class="vhdlchar"></span>),
<a name="l00601"></a>00601 .<span class="vhdlchar">offset</span> (),
<a name="l00602"></a>00602 .<span class="vhdlchar">offset_control</span> (<a class="code" href="ao68000_8v.html#a4deaea8bc3d376dac501f3a314f1490c">`MICRO_DATA_offset</a><span class="vhdlchar"></span>),
<a name="l00603"></a>00603 .<span class="vhdlchar">index</span> (),
<a name="l00604"></a>00604 .<span class="vhdlchar">index_control</span> (<a class="code" href="ao68000_8v.html#ad722ce87f573d9c6e1010e5a87005383">`MICRO_DATA_index</a><span class="vhdlchar"></span>),
<a name="l00605"></a>00605 .<a class="code" href="classao68000.html#aa7e62464a0cd6d4d476939a4ddcb7cb0">stop_flag</a> (<a class="code" href="classao68000.html#aa7e62464a0cd6d4d476939a4ddcb7cb0">stop_flag</a>),
<a name="l00606"></a>00606 .<span class="vhdlchar">stop_flag_control</span> (<a class="code" href="ao68000_8v.html#a5e820e2a23919cb4005a8cc9651c26c0">`MICRO_DATA_stop_flag</a><span class="vhdlchar"></span>),
<a name="l00607"></a>00607 .<a class="code" href="classao68000.html#a3cb489d55f80adb5d4cafd9f9f4679be">trace_flag</a> (<a class="code" href="classao68000.html#a3cb489d55f80adb5d4cafd9f9f4679be">trace_flag</a>),
<a name="l00608"></a>00608 .<span class="vhdlchar">trace_flag_control</span> (<a class="code" href="ao68000_8v.html#aa913e0fe5ccffe6e2d7e91d43f39f139">`MICRO_DATA_trace_flag</a><span class="vhdlchar"></span>),
<a name="l00609"></a>00609 .<a class="code" href="classao68000.html#abf4182c32ee4bc817caa8b5d6772ab7a">group_0_flag</a> (<a class="code" href="classao68000.html#abf4182c32ee4bc817caa8b5d6772ab7a">group_0_flag</a>),
<a name="l00610"></a>00610 .<span class="vhdlchar">group_0_flag_control</span> (<a class="code" href="ao68000_8v.html#a595e837c71d69c5a4d7c4a3c9d64ffb0">`MICRO_DATA_group_0_flag</a><span class="vhdlchar"></span>),
<a name="l00611"></a>00611 .<span class="vhdlchar">instruction_flag</span> (),
<a name="l00612"></a>00612 .<span class="vhdlchar">instruction_flag_control</span> (<a class="code" href="ao68000_8v.html#a188c9ee8d0adc5ec2fb732fdece9ea31">`MICRO_DATA_instruction_flag</a><span class="vhdlchar"></span>),
<a name="l00613"></a>00613 .<a class="code" href="classao68000.html#a4d00737f890e3080a8915e23668c2fe0">read_modify_write_flag</a> (<a class="code" href="classao68000.html#a4d00737f890e3080a8915e23668c2fe0">read_modify_write_flag</a>),
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<a name="l00624"></a>00624 .<span class="vhdlchar">do_blocked_flag_control</span> (<a class="code" href="ao68000_8v.html#adf7ac746fc276a0c3083d2606df75af4">`MICRO_DATA_do_blocked_flag</a><span class="vhdlchar"></span>),
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<a name="l00633"></a>00633 .<a class="code" href="classao68000.html#a3e5b96a27d6416089864cf873b6099d2">decoder_alu</a> (<a class="code" href="classao68000.html#a3e5b96a27d6416089864cf873b6099d2">decoder_alu</a>),
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<a name="l00635"></a>00635 );
<a name="l00636"></a>00636
<a name="l00637"></a><a class="code" href="classao68000.html#ab85a25c3b08b1de81856944a16fafd5d">00637</a> <a class="code" href="classao68000.html#ab85a25c3b08b1de81856944a16fafd5d">memory_registers</a> <span class="vhdlchar">memory_registers_m</span>(
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<a name="l00644"></a>00644 .<a class="code" href="classmemory__registers.html#aa2114065af0aee3f968f55ab8d0cdd32">ao68000</a> (<a class="code" href="classmemory__registers.html#aa2114065af0aee3f968f55ab8d0cdd32">ao68000</a>),
<a name="l00645"></a>00645 .<a class="code" href="classmemory__registers.html#a452091de9055b5a8c4b3a24f832bbff4">ao68000</a> (<a class="code" href="classmemory__registers.html#a452091de9055b5a8c4b3a24f832bbff4">ao68000</a>),
<a name="l00646"></a>00646 .<a class="code" href="classmemory__registers.html#a648512e0b41016edfe8de5136ddd1c06">ao68000</a> (<a class="code" href="classao68000.html#ae78165f07b720df4d51db101effc08c5">result</a>),
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<a name="l00650"></a>00650 .<a class="code" href="classmemory__registers.html#a9d473ab60fc9c54280c725306fd4a60e">ao68000</a> (<a class="code" href="classmemory__registers.html#a9d473ab60fc9c54280c725306fd4a60e">ao68000</a>),
<a name="l00651"></a>00651 .<a class="code" href="classmemory__registers.html#a6b80d6fab3ba246fa01c780bd1754229">ao68000</a> (<a class="code" href="classmemory__registers.html#a6b80d6fab3ba246fa01c780bd1754229">ao68000</a>)
<a name="l00652"></a>00652 );
<a name="l00653"></a>00653
<a name="l00654"></a><a class="code" href="classao68000.html#a6f5a57c27d91cf2c4092c71adf13ae81">00654</a> <a class="code" href="classao68000.html#a6f5a57c27d91cf2c4092c71adf13ae81">decoder</a> <span class="vhdlchar">decoder_m</span>(
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<a name="l00656"></a>00656 .<a class="code" href="classdecoder.html#abb84ff97c6b5274c476817bf0c89eae5">ao68000</a> (<a class="code" href="classdecoder.html#abb84ff97c6b5274c476817bf0c89eae5">ao68000</a>),
<a name="l00657"></a>00657 .<a class="code" href="classdecoder.html#a4f8f30358d78d6b6509ecb0a75c8e2e9">ao68000</a> (<a class="code" href="classao68000.html#abef0ede1a300bfe80eeecc8d51a0afe0">sr</a>[<span class="vhdllogic">13</span>]),
<a name="l00658"></a>00658 .<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ao68000</a> (<a class="code" href="classao68000.html#a3403e55545d6a49c4a4fa6f16cfe7126">prefetch_ir</a>[<span class="vhdllogic">79</span>:<span class="vhdllogic">64</span>]),
<a name="l00659"></a>00659 .<a class="code" href="classdecoder.html#a67eb094220c399c1c40c878b5845e34e">ao68000</a> (<a class="code" href="classdecoder.html#a67eb094220c399c1c40c878b5845e34e">ao68000</a>),
<a name="l00660"></a>00660 .<a class="code" href="classdecoder.html#af02fcbe55a29581530a9fa1b01348d50">ao68000</a> (<a class="code" href="classdecoder.html#af02fcbe55a29581530a9fa1b01348d50">ao68000</a>),
<a name="l00661"></a>00661 .<a class="code" href="classdecoder.html#a4a908459c4181bada964b9269629cfaf">ao68000</a> (<a class="code" href="classdecoder.html#a4a908459c4181bada964b9269629cfaf">ao68000</a>),
<a name="l00662"></a>00662
<a name="l00663"></a>00663 .<a class="code" href="classdecoder.html#a10aa58a48c1be7f355587ca0662adb6f">ao68000</a> (<a class="code" href="classdecoder.html#a10aa58a48c1be7f355587ca0662adb6f">ao68000</a>),
<a name="l00664"></a>00664 .<a class="code" href="classdecoder.html#a6c8f1852c27f24f3c5b376224beb327e">ao68000</a> (<a class="code" href="classdecoder.html#a6c8f1852c27f24f3c5b376224beb327e">ao68000</a>),
<a name="l00665"></a>00665 .<a class="code" href="classdecoder.html#a01b7528cc9ef96a11a65bc617e3ce8e8">ao68000</a> (<a class="code" href="classdecoder.html#a01b7528cc9ef96a11a65bc617e3ce8e8">ao68000</a>),
<a name="l00666"></a>00666 .<a class="code" href="classdecoder.html#a28b05d6e340a4705765b60dea6a7582e">ao68000</a> (<a class="code" href="classdecoder.html#a28b05d6e340a4705765b60dea6a7582e">ao68000</a>),
<a name="l00667"></a>00667
<a name="l00668"></a>00668 .<a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ao68000</a> (<a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ao68000</a>),
<a name="l00669"></a>00669 .<a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">ao68000</a> (<a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">ao68000</a>),
<a name="l00670"></a>00670 .<a class="code" href="classdecoder.html#a8658dbe33b5c93ec447d2c4915bf46bb">ao68000</a> (<a class="code" href="classdecoder.html#a8658dbe33b5c93ec447d2c4915bf46bb">ao68000</a>)
<a name="l00671"></a>00671 );
<a name="l00672"></a>00672
<a name="l00673"></a><a class="code" href="classao68000.html#a30446f4f602b6185a7ed25e5aa8e470e">00673</a> <a class="code" href="classao68000.html#a30446f4f602b6185a7ed25e5aa8e470e">condition</a> <span class="vhdlchar">condition_m</span>(
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<a name="l00677"></a>00677 );
<a name="l00678"></a>00678
<a name="l00679"></a><a class="code" href="classao68000.html#a63ee30297781426b4dd11d052490997f">00679</a> <a class="code" href="classao68000.html#a63ee30297781426b4dd11d052490997f">alu</a> <span class="vhdlchar">alu_m</span>(
<a name="l00680"></a>00680 .<a class="code" href="classalu.html#a322325f3e53ea8e7d70fbdc7f5d1b30b">ao68000</a> (<a class="code" href="classao68000.html#a6bee7e749a667293d6fbea8fc1380d12">CLK_I</a>),
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<a name="l00682"></a>00682 .<a class="code" href="classalu.html#a5a9e1012e0cf7d30a4a4dcaf5486693c">ao68000</a> (<a class="code" href="classalu.html#a5a9e1012e0cf7d30a4a4dcaf5486693c">ao68000</a>),
<a name="l00683"></a>00683 .<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ao68000</a> (<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ao68000</a>),
<a name="l00684"></a>00684 .<a class="code" href="classalu.html#a46ed8f8b6e397f2f7a0998fe482d4f37">ao68000</a> (<a class="code" href="classalu.html#a46ed8f8b6e397f2f7a0998fe482d4f37">ao68000</a>),
<a name="l00685"></a>00685 .<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">ao68000</a> (<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">ao68000</a>),
<a name="l00686"></a>00686 .<a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">ao68000</a> (<a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">ao68000</a>),
<a name="l00687"></a>00687 .<a class="code" href="classalu.html#ab8bac09f28bae473ebf96e3c2c7e2806">ao68000</a> (<a class="code" href="classalu.html#ab8bac09f28bae473ebf96e3c2c7e2806">ao68000</a>),
<a name="l00688"></a>00688 .<a class="code" href="classalu.html#abd96864c4534e2905f0ac629d1bcfce1">ao68000</a> (<a class="code" href="ao68000_8v.html#a6dde91e1905423f9fb4184ae3554b5cd">`MICRO_DATA_alu</a><span class="vhdlchar"></span>),
<a name="l00689"></a>00689 .<a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">ao68000</a> (<a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">ao68000</a>),
<a name="l00690"></a>00690 .<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">ao68000</a> (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">ao68000</a>),
<a name="l00691"></a>00691 .<a class="code" href="classalu.html#ad39d03bb22df22560c4f5dc796382313">ao68000</a> (<a class="code" href="classalu.html#ad39d03bb22df22560c4f5dc796382313">ao68000</a>),
<a name="l00692"></a>00692 .<a class="code" href="classalu.html#ac76782f488b9491569955793b9b37762">ao68000</a> (<a class="code" href="classalu.html#ac76782f488b9491569955793b9b37762">ao68000</a>),
<a name="l00693"></a>00693 .<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">ao68000</a> (<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">ao68000</a>)
<a name="l00694"></a>00694 );
<a name="l00695"></a>00695
<a name="l00696"></a><a class="code" href="classao68000.html#a753de474d4bdb41b494fed2539290cc4">00696</a> <a class="code" href="classao68000.html#a753de474d4bdb41b494fed2539290cc4">microcode_branch</a> <span class="vhdlchar">microcode_branch_m</span>(
<a name="l00697"></a>00697 .<a class="code" href="classmicrocode__branch.html#ab7164ca4ddb1d2f4abd4bb892b0b03ef">ao68000</a> (<a class="code" href="classao68000.html#a6bee7e749a667293d6fbea8fc1380d12">CLK_I</a>),
<a name="l00698"></a>00698 .<a class="code" href="classmicrocode__branch.html#a9c12bc55b4584f1893c639f968a02b21">ao68000</a> (<a class="code" href="classmicrocode__branch.html#a9c12bc55b4584f1893c639f968a02b21">ao68000</a>),
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<a name="l00702"></a>00702 .<a class="code" href="classmicrocode__branch.html#a2193e019d4119e599c40688f7f44ceae">ao68000</a> (<a class="code" href="classmicrocode__branch.html#a2193e019d4119e599c40688f7f44ceae">ao68000</a>),
<a name="l00703"></a>00703 .<a class="code" href="classmicrocode__branch.html#aad280414c0b1e6704249569a30a22f42">ao68000</a> (<a class="code" href="classmicrocode__branch.html#aad280414c0b1e6704249569a30a22f42">ao68000</a>),
<a name="l00704"></a>00704 .<a class="code" href="classmicrocode__branch.html#a504464a375f4082638fee6d369f2f14a">ao68000</a> (<a class="code" href="classmicrocode__branch.html#a504464a375f4082638fee6d369f2f14a">ao68000</a>),
<a name="l00705"></a>00705 .<a class="code" href="classmicrocode__branch.html#a05f4a56bc614035d39bb8427975567b7">ao68000</a> (<a class="code" href="classmicrocode__branch.html#a05f4a56bc614035d39bb8427975567b7">ao68000</a>),
<a name="l00706"></a>00706 .<a class="code" href="classmicrocode__branch.html#a6ac9bcafca6ea23403126b17ee49a67c">ao68000</a> (<a class="code" href="classao68000.html#abef0ede1a300bfe80eeecc8d51a0afe0">sr</a>[<span class="vhdllogic">1</span>]),
<a name="l00707"></a>00707 .<a class="code" href="classmicrocode__branch.html#ada31604689dd65bdb97661dc30ddc87f">ao68000</a> (<a class="code" href="classmicrocode__branch.html#ada31604689dd65bdb97661dc30ddc87f">ao68000</a>),
<a name="l00708"></a>00708 .<a class="code" href="classmicrocode__branch.html#a494ab71bba57484c7ed2ddb7e5b23a7c">ao68000</a> (<a class="code" href="classmicrocode__branch.html#a494ab71bba57484c7ed2ddb7e5b23a7c">ao68000</a>),
<a name="l00709"></a>00709 .<a class="code" href="classmicrocode__branch.html#afa8972a34b0f853c36c6d71a9ca18abc">ao68000</a> (<a class="code" href="classmicrocode__branch.html#afa8972a34b0f853c36c6d71a9ca18abc">ao68000</a>),
<a name="l00710"></a>00710 .<a class="code" href="classmicrocode__branch.html#a23009bd0a971de802bc16042b6ce875e">ao68000</a> (<a class="code" href="classmicrocode__branch.html#a23009bd0a971de802bc16042b6ce875e">ao68000</a>),
<a name="l00711"></a>00711 .<a class="code" href="classmicrocode__branch.html#af915b280896e52b1963b8346beed8869">ao68000</a> (<a class="code" href="classmicrocode__branch.html#af915b280896e52b1963b8346beed8869">ao68000</a>),
<a name="l00712"></a>00712 .<a class="code" href="classmicrocode__branch.html#a6168f3422c90ef0aa779339f8d02dfb8">ao68000</a> (<a class="code" href="classmicrocode__branch.html#a6168f3422c90ef0aa779339f8d02dfb8">ao68000</a>),
<a name="l00713"></a>00713 .<a class="code" href="classmicrocode__branch.html#aac8d9985d8c614f252c6d9204fdc527f">ao68000</a> (<a class="code" href="classmicrocode__branch.html#aac8d9985d8c614f252c6d9204fdc527f">ao68000</a>),
<a name="l00714"></a>00714 .<a class="code" href="classmicrocode__branch.html#af83212fb167418b4a292b929e3c79e5e">ao68000</a> (<a class="code" href="classmicrocode__branch.html#af83212fb167418b4a292b929e3c79e5e">ao68000</a>),
<a name="l00715"></a>00715 .<a class="code" href="classmicrocode__branch.html#a3f4556a4970ffb0dcec4c8e9917b8089">ao68000</a> (<a class="code" href="classmicrocode__branch.html#a3f4556a4970ffb0dcec4c8e9917b8089">ao68000</a>),
<a name="l00716"></a>00716 .<a class="code" href="classmicrocode__branch.html#adabd40a119386f638a8f928bf079debf">ao68000</a> (<a class="code" href="classmicrocode__branch.html#adabd40a119386f638a8f928bf079debf">ao68000</a>),
<a name="l00717"></a>00717 .<a class="code" href="classmicrocode__branch.html#ab4e19065d70e381082aaa335ebe8ac36">ao68000</a> (<a class="code" href="classmicrocode__branch.html#ab4e19065d70e381082aaa335ebe8ac36">ao68000</a>),
<a name="l00718"></a>00718 .<a class="code" href="classmicrocode__branch.html#ab8f1385198953a1eba58574d876fa5c2">ao68000</a> (<a class="code" href="classmicrocode__branch.html#ab8f1385198953a1eba58574d876fa5c2">ao68000</a>),
<a name="l00719"></a>00719 .<a class="code" href="classmicrocode__branch.html#a00377f72cb925ea734f33251d85c91c7">ao68000</a> (<a class="code" href="classmicrocode__branch.html#a00377f72cb925ea734f33251d85c91c7">ao68000</a>),
<a name="l00720"></a>00720 .<a class="code" href="classmicrocode__branch.html#ada4f59f60e418f07a72712526be1b5b9">ao68000</a> (<a class="code" href="classmicrocode__branch.html#ada4f59f60e418f07a72712526be1b5b9">ao68000</a>),
<a name="l00721"></a>00721 .<a class="code" href="classmicrocode__branch.html#a4d3b8c3de44caa018f9bf33e7feb80d4">ao68000</a> (<a class="code" href="classmicrocode__branch.html#a4d3b8c3de44caa018f9bf33e7feb80d4">ao68000</a>),
<a name="l00722"></a>00722 .<a class="code" href="classmicrocode__branch.html#ab56717bc022b7c1d30259431ddbce1a5">ao68000</a> (<a class="code" href="classmicrocode__branch.html#ab56717bc022b7c1d30259431ddbce1a5">ao68000</a>),
<a name="l00723"></a>00723 .<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">ao68000</a> (<a class="code" href="ao68000_8v.html#a156b8e8011ac86392d0e47b50cc1bd12">`MICRO_DATA_branch</a><span class="vhdlchar"></span>),
<a name="l00724"></a>00724 .<a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">ao68000</a> (<a class="code" href="ao68000_8v.html#a8356eb451657c128626552b5a360de3a">`MICRO_DATA_procedure</a><span class="vhdlchar"></span>),
<a name="l00725"></a>00725 .<a class="code" href="classmicrocode__branch.html#a238196a5cce50e726172501c44505eb5">ao68000</a> (<a class="code" href="classmicrocode__branch.html#a238196a5cce50e726172501c44505eb5">ao68000</a>)
<a name="l00726"></a>00726 );
<a name="l00727"></a>00727
<a name="l00728"></a>00728 <span class="vhdlkeyword">endmodule</span>
<a name="l00729"></a>00729
<a name="l00730"></a>00730 <span class="keyword">/***********************************************************************************************************************</span>
<a name="l00731"></a>00731 <span class="keyword"> Bus control</span>
<a name="l00732"></a>00732 <span class="keyword"> ***********************************************************************************************************************/</span>
<a name="l00733"></a>00733
<a name="l00402"></a>00402
<a name="l00406"></a><a class="code" href="classao68000.html">00406</a> <span class="vhdlkeyword">module</span> <a class="code" href="classao68000.html">ao68000</a> (
<a name="l00407"></a>00407 <span class="keyword">//****************** WISHBONE</span>
<a name="l00408"></a><a class="code" href="classao68000.html#a6bee7e749a667293d6fbea8fc1380d12">00408</a> <span class="vhdlkeyword">input</span> <a class="code" href="classao68000.html#a6bee7e749a667293d6fbea8fc1380d12">CLK_I</a>,
<a name="l00409"></a><a class="code" href="classao68000.html#a5c903f753511ea2ec94145415549a148">00409</a> <span class="vhdlkeyword">input</span> <a class="code" href="classao68000.html#a5c903f753511ea2ec94145415549a148">reset_n</a>,
<a name="l00410"></a>00410
<a name="l00411"></a><a class="code" href="classao68000.html#a61843aa9b51ba23ec6c8c35892366559">00411</a> <span class="vhdlkeyword">output</span> <a class="code" href="classao68000.html#a61843aa9b51ba23ec6c8c35892366559">CYC_O</a>,
<a name="l00412"></a><a class="code" href="classao68000.html#a277895ba6004986cf490068945998fd0">00412</a> <span class="vhdlkeyword">output</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>] <a class="code" href="classao68000.html#a277895ba6004986cf490068945998fd0">ADR_O</a>,
<a name="l00413"></a><a class="code" href="classao68000.html#a801fbb1ae4c2812332242ce5d746cf36">00413</a> <span class="vhdlkeyword">output</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a801fbb1ae4c2812332242ce5d746cf36">DAT_O</a>,
<a name="l00414"></a><a class="code" href="classao68000.html#abffdd6f5cefb3be32b6db5bfc6b56442">00414</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#abffdd6f5cefb3be32b6db5bfc6b56442">DAT_I</a>,
<a name="l00415"></a><a class="code" href="classao68000.html#ae636550dd8481fd101623d0c665e894c">00415</a> <span class="vhdlkeyword">output</span> [<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#ae636550dd8481fd101623d0c665e894c">SEL_O</a>,
<a name="l00416"></a><a class="code" href="classao68000.html#a0e045730861ed97d585a192fcbbfd8a5">00416</a> <span class="vhdlkeyword">output</span> <a class="code" href="classao68000.html#a0e045730861ed97d585a192fcbbfd8a5">STB_O</a>,
<a name="l00417"></a><a class="code" href="classao68000.html#a6cd0052d2c68597331280fe500366be4">00417</a> <span class="vhdlkeyword">output</span> <a class="code" href="classao68000.html#a6cd0052d2c68597331280fe500366be4">WE_O</a>,
<a name="l00418"></a>00418
<a name="l00419"></a><a class="code" href="classao68000.html#a818ab80622c2364eb33814a5ef1f33ba">00419</a> <span class="vhdlkeyword">input</span> <a class="code" href="classao68000.html#a818ab80622c2364eb33814a5ef1f33ba">ACK_I</a>,
<a name="l00420"></a><a class="code" href="classao68000.html#a2a1a525f5a12c4e4a67bdf9fdf6df2be">00420</a> <span class="vhdlkeyword">input</span> <a class="code" href="classao68000.html#a2a1a525f5a12c4e4a67bdf9fdf6df2be">ERR_I</a>,
<a name="l00421"></a><a class="code" href="classao68000.html#af26604192b486b62964b9fada0bc6aff">00421</a> <span class="vhdlkeyword">input</span> <a class="code" href="classao68000.html#af26604192b486b62964b9fada0bc6aff">RTY_I</a>,
<a name="l00422"></a>00422
<a name="l00423"></a>00423 <span class="keyword">// TAG_TYPE: TGC_O</span>
<a name="l00424"></a><a class="code" href="classao68000.html#a067f51b370f090178fbe8248b48f50b0">00424</a> <span class="vhdlkeyword">output</span> <a class="code" href="classao68000.html#a067f51b370f090178fbe8248b48f50b0">SGL_O</a>,
<a name="l00425"></a><a class="code" href="classao68000.html#af57b8a8680a72f392a1f2af3ee2b61a9">00425</a> <span class="vhdlkeyword">output</span> <a class="code" href="classao68000.html#af57b8a8680a72f392a1f2af3ee2b61a9">BLK_O</a>,
<a name="l00426"></a><a class="code" href="classao68000.html#a951678555b50fc9229fe9b553c7b09d0">00426</a> <span class="vhdlkeyword">output</span> <a class="code" href="classao68000.html#a951678555b50fc9229fe9b553c7b09d0">RMW_O</a>,
<a name="l00427"></a>00427
<a name="l00428"></a>00428 <span class="keyword">// TAG_TYPE: TGA_O</span>
<a name="l00429"></a><a class="code" href="classao68000.html#a02037d382851d62248a83cbc35dd1529">00429</a> <span class="vhdlkeyword">output</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a02037d382851d62248a83cbc35dd1529">CTI_O</a>,
<a name="l00430"></a><a class="code" href="classao68000.html#a08f46078858b7e8b6f2dfe2f6ec20c84">00430</a> <span class="vhdlkeyword">output</span> [<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a08f46078858b7e8b6f2dfe2f6ec20c84">BTE_O</a>,
<a name="l00431"></a>00431
<a name="l00432"></a>00432 <span class="keyword">// TAG_TYPE: TGC_O</span>
<a name="l00433"></a><a class="code" href="classao68000.html#a4b66c96fdd706df792811882b6f9fa9b">00433</a> <span class="vhdlkeyword">output</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a4b66c96fdd706df792811882b6f9fa9b">fc_o</a>,
<a name="l00434"></a>00434
<a name="l00435"></a>00435 <span class="keyword">//****************** OTHER</span>
<a name="l00436"></a>00436 <span class="keyword">/* interrupt acknowlege:</span>
<a name="l00437"></a>00437 <span class="keyword"> ACK_I: interrupt vector on DAT_I[7:0]</span>
<a name="l00438"></a>00438 <span class="keyword"> ERR_I: spurious interrupt</span>
<a name="l00439"></a>00439 <span class="keyword"> RTY_I: autovector</span>
<a name="l00440"></a>00440 <span class="keyword"> */</span>
<a name="l00441"></a><a class="code" href="classao68000.html#a1ff11e699c0192bb533209bd3cf9d5ba">00441</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a1ff11e699c0192bb533209bd3cf9d5ba">ipl_i</a>,
<a name="l00442"></a><a class="code" href="classao68000.html#a8246303a982cd24ff7dcc7b36c3038e2">00442</a> <span class="vhdlkeyword">output</span> <a class="code" href="classao68000.html#a8246303a982cd24ff7dcc7b36c3038e2">reset_o</a>,
<a name="l00443"></a><a class="code" href="classao68000.html#a0a90a371e379531c8e466799ff5c3d49">00443</a> <span class="vhdlkeyword">output</span> <a class="code" href="classao68000.html#a0a90a371e379531c8e466799ff5c3d49">blocked_o</a>
<a name="l00444"></a>00444 );
<a name="l00445"></a>00445
<a name="l00446"></a><a class="code" href="classao68000.html#abef0ede1a300bfe80eeecc8d51a0afe0">00446</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#abef0ede1a300bfe80eeecc8d51a0afe0">sr</a>;
<a name="l00447"></a><a class="code" href="classao68000.html#a7e653ecba236b212b87d66d9e46f3914">00447</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a7e653ecba236b212b87d66d9e46f3914">size</a>;
<a name="l00448"></a><a class="code" href="classao68000.html#aaf40157e76d59864abf62ffe1c4f605d">00448</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#aaf40157e76d59864abf62ffe1c4f605d">address</a>;
<a name="l00449"></a><a class="code" href="classao68000.html#a3da831ef8ac6ec75b132d8d299115092">00449</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classao68000.html#a3da831ef8ac6ec75b132d8d299115092">address_type</a>;
<a name="l00450"></a><a class="code" href="classao68000.html#a4d00737f890e3080a8915e23668c2fe0">00450</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classao68000.html#a4d00737f890e3080a8915e23668c2fe0">read_modify_write_flag</a>;
<a name="l00451"></a><a class="code" href="classao68000.html#a341be6a91dd12d14293eaa53c7c254d2">00451</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a341be6a91dd12d14293eaa53c7c254d2">data_read</a>;
<a name="l00452"></a><a class="code" href="classao68000.html#ac7098386bafc8ad2194743a7ebbc3928">00452</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#ac7098386bafc8ad2194743a7ebbc3928">data_write</a>;
<a name="l00453"></a><a class="code" href="classao68000.html#a5e28cd1d3701cc3d88dd0df22e697108">00453</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a5e28cd1d3701cc3d88dd0df22e697108">pc</a>;
<a name="l00454"></a><a class="code" href="classao68000.html#a7f60c5a54b85d16a5daa159e3f93f3a2">00454</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classao68000.html#a7f60c5a54b85d16a5daa159e3f93f3a2">prefetch_ir_valid</a>;
<a name="l00455"></a><a class="code" href="classao68000.html#a3403e55545d6a49c4a4fa6f16cfe7126">00455</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">79</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a3403e55545d6a49c4a4fa6f16cfe7126">prefetch_ir</a>;
<a name="l00456"></a><a class="code" href="classao68000.html#a63cc96be1f84432ea4b755f14c9801bd">00456</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classao68000.html#a63cc96be1f84432ea4b755f14c9801bd">do_reset</a>;
<a name="l00457"></a><a class="code" href="classao68000.html#aaa926f4340d9533fa404ed2121e01add">00457</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classao68000.html#aaa926f4340d9533fa404ed2121e01add">do_read</a>;
<a name="l00458"></a><a class="code" href="classao68000.html#a2fd644eba6903b45558dba81d759d60a">00458</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classao68000.html#a2fd644eba6903b45558dba81d759d60a">do_write</a>;
<a name="l00459"></a><a class="code" href="classao68000.html#a017afb5ca18639747617179cd4b5b9af">00459</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classao68000.html#a017afb5ca18639747617179cd4b5b9af">do_interrupt</a>;
<a name="l00460"></a><a class="code" href="classao68000.html#a8d22354dba9690de7ed1f40174e7fac5">00460</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classao68000.html#a8d22354dba9690de7ed1f40174e7fac5">do_blocked</a>;
<a name="l00461"></a><a class="code" href="classao68000.html#aa9b27c579ff3359c8722f33ddc218606">00461</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classao68000.html#aa9b27c579ff3359c8722f33ddc218606">jmp_address_trap</a>;
<a name="l00462"></a><a class="code" href="classao68000.html#a68c0830ee44827649eeece60ccb007a4">00462</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classao68000.html#a68c0830ee44827649eeece60ccb007a4">jmp_bus_trap</a>;
<a name="l00463"></a><a class="code" href="classao68000.html#adc838dee1d3e5fb81b69d9cd825e2078">00463</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classao68000.html#adc838dee1d3e5fb81b69d9cd825e2078">finished</a>;
<a name="l00464"></a><a class="code" href="classao68000.html#ab31d9d61b3fb7b8cf2d2588943144c51">00464</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#ab31d9d61b3fb7b8cf2d2588943144c51">interrupt_trap</a>;
<a name="l00465"></a><a class="code" href="classao68000.html#a48c24a88040f4bfdc6df4f6d44c74f02">00465</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a48c24a88040f4bfdc6df4f6d44c74f02">interrupt_mask</a>;
<a name="l00466"></a><a class="code" href="classao68000.html#aa64aa2047c9823a2b6354f945b7a1e91">00466</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classao68000.html#aa64aa2047c9823a2b6354f945b7a1e91">rw_state</a>;
<a name="l00467"></a><a class="code" href="classao68000.html#ad29c33a9347a9dc0ad7e6a38a9674cea">00467</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#ad29c33a9347a9dc0ad7e6a38a9674cea">fc_state</a>;
<a name="l00468"></a><a class="code" href="classao68000.html#a2d3d54c5eadf71c6a422a5e9c3c1c0f0">00468</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a2d3d54c5eadf71c6a422a5e9c3c1c0f0">decoder_trap</a>;
<a name="l00469"></a><a class="code" href="classao68000.html#a0c5ac49d1bd4f956a99173ba8d76824e">00469</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a0c5ac49d1bd4f956a99173ba8d76824e">usp</a>;
<a name="l00470"></a><a class="code" href="classao68000.html#a9fbb4d38edd465bd6e91c844baa3cc32">00470</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a9fbb4d38edd465bd6e91c844baa3cc32">Dn_output</a>;
<a name="l00471"></a><a class="code" href="classao68000.html#a38819ff180e465048ac34fe24c17db2e">00471</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a38819ff180e465048ac34fe24c17db2e">An_output</a>;
<a name="l00472"></a><a class="code" href="classao68000.html#ae78165f07b720df4d51db101effc08c5">00472</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#ae78165f07b720df4d51db101effc08c5">result</a>;
<a name="l00473"></a><a class="code" href="classao68000.html#ac4bdc1d7a8df2e5b24f92e8c47b87d31">00473</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#ac4bdc1d7a8df2e5b24f92e8c47b87d31">An_address</a>;
<a name="l00474"></a><a class="code" href="classao68000.html#a314e14c9d14faca666d7282e70aec69e">00474</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a314e14c9d14faca666d7282e70aec69e">An_input</a>;
<a name="l00475"></a><a class="code" href="classao68000.html#a8ce376b6468188948a66dd3090b82303">00475</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a8ce376b6468188948a66dd3090b82303">Dn_address</a>;
<a name="l00476"></a><a class="code" href="classao68000.html#a88e0be4d7a8d7765fd81d2c7ecec034c">00476</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a88e0be4d7a8d7765fd81d2c7ecec034c">ir</a>;
<a name="l00477"></a><a class="code" href="classao68000.html#a986f73747582af0c6343b171a856a806">00477</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">8</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a986f73747582af0c6343b171a856a806">decoder_micropc</a>;
<a name="l00478"></a><a class="code" href="classao68000.html#ad3946c0f11e87469fdc3601692a49317">00478</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classao68000.html#ad3946c0f11e87469fdc3601692a49317">alu_signal</a>;
<a name="l00479"></a><a class="code" href="classao68000.html#abc430119a2bec27890ed3564ab72ffc3">00479</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classao68000.html#abc430119a2bec27890ed3564ab72ffc3">alu_mult_div_ready</a>;
<a name="l00480"></a><a class="code" href="classao68000.html#ae69df823449aa74618aaf7f853d3f11e">00480</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">8</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#ae69df823449aa74618aaf7f853d3f11e">load_ea</a>;
<a name="l00481"></a><a class="code" href="classao68000.html#a58cd92d0477a981c2008bd90817becc9">00481</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">8</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a58cd92d0477a981c2008bd90817becc9">perform_ea_read</a>;
<a name="l00482"></a><a class="code" href="classao68000.html#ab422cb8cd23d482adfd2aa9caa9761c5">00482</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">8</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#ab422cb8cd23d482adfd2aa9caa9761c5">perform_ea_write</a>;
<a name="l00483"></a><a class="code" href="classao68000.html#a09f55857356fd236f8350946112ea688">00483</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">8</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a09f55857356fd236f8350946112ea688">save_ea</a>;
<a name="l00484"></a><a class="code" href="classao68000.html#a3cb489d55f80adb5d4cafd9f9f4679be">00484</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classao68000.html#a3cb489d55f80adb5d4cafd9f9f4679be">trace_flag</a>;
<a name="l00485"></a><a class="code" href="classao68000.html#abf4182c32ee4bc817caa8b5d6772ab7a">00485</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classao68000.html#abf4182c32ee4bc817caa8b5d6772ab7a">group_0_flag</a>;
<a name="l00486"></a><a class="code" href="classao68000.html#aa7e62464a0cd6d4d476939a4ddcb7cb0">00486</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classao68000.html#aa7e62464a0cd6d4d476939a4ddcb7cb0">stop_flag</a>;
<a name="l00487"></a><a class="code" href="classao68000.html#ace8aff52b8f30690429b9936f07c97a0">00487</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">8</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#ace8aff52b8f30690429b9936f07c97a0">micro_pc</a>;
<a name="l00488"></a><a class="code" href="classao68000.html#a2ce08034a6163ba919bc8671ab418925">00488</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a2ce08034a6163ba919bc8671ab418925">operand1</a>;
<a name="l00489"></a><a class="code" href="classao68000.html#abba9faff9213088a72a8ec33a43e7b88">00489</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#abba9faff9213088a72a8ec33a43e7b88">operand2</a>;
<a name="l00490"></a><a class="code" href="classao68000.html#a01988743194f85b63333d073c7fe68f7">00490</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">4</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a01988743194f85b63333d073c7fe68f7">movem_loop</a>;
<a name="l00491"></a><a class="code" href="classao68000.html#a280d638b17d688517b637ad90d6df376">00491</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a280d638b17d688517b637ad90d6df376">movem_reg</a>;
<a name="l00492"></a><a class="code" href="classao68000.html#a83b2f86d57930b08a8db6e9b8410837f">00492</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classao68000.html#a30446f4f602b6185a7ed25e5aa8e470e">condition</a>;
<a name="l00493"></a><a class="code" href="classao68000.html#ae4e21fd281172d5e74e527236b1519f2">00493</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">87</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#ae4e21fd281172d5e74e527236b1519f2">micro_data</a>;
<a name="l00494"></a><a class="code" href="classao68000.html#ae552c0d79d4e728a385243f7339c4090">00494</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#ae552c0d79d4e728a385243f7339c4090">fault_address_state</a>;
<a name="l00495"></a><a class="code" href="classao68000.html#a71903694d8425f743a2f6e753a7e2e89">00495</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a71903694d8425f743a2f6e753a7e2e89">pc_change</a>;
<a name="l00496"></a><a class="code" href="classao68000.html#aeb25637923460dddbd88804a217e5ce5">00496</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classao68000.html#aeb25637923460dddbd88804a217e5ce5">prefetch_ir_valid_32</a>;
<a name="l00497"></a><a class="code" href="classao68000.html#a7e1ce5d495efd402ecaac1127691254b">00497</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a7e1ce5d495efd402ecaac1127691254b">ea_type</a>;
<a name="l00498"></a><a class="code" href="classao68000.html#abe4582e421ebfc379fc3e26b925783fa">00498</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#abe4582e421ebfc379fc3e26b925783fa">ea_mod</a>;
<a name="l00499"></a><a class="code" href="classao68000.html#a127110f55f7a36e476471f8860abc860">00499</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a127110f55f7a36e476471f8860abc860">ea_reg</a>;
<a name="l00500"></a><a class="code" href="classao68000.html#a3e5b96a27d6416089864cf873b6099d2">00500</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">17</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#a3e5b96a27d6416089864cf873b6099d2">decoder_alu</a>;
<a name="l00501"></a><a class="code" href="classao68000.html#af8572caa0f68ae84d7415194299db547">00501</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">17</span>:<span class="vhdllogic">0</span>] <a class="code" href="classao68000.html#af8572caa0f68ae84d7415194299db547">decoder_alu_reg</a>;
<a name="l00502"></a>00502
<a name="l00503"></a><a class="code" href="classao68000.html#a2c34e1b84d9fe30c49c5c814be3dc392">00503</a> <a class="code" href="classao68000.html#a2c34e1b84d9fe30c49c5c814be3dc392">bus_control</a> <span class="vhdlchar">bus_control_m</span>(
<a name="l00504"></a>00504 .<a class="code" href="classbus__control.html#a4054e75175a8d9a78f2e34150e1c0465">ao68000</a> (<a class="code" href="classbus__control.html#a4054e75175a8d9a78f2e34150e1c0465">ao68000</a>),
<a name="l00505"></a>00505 .<a class="code" href="classbus__control.html#a7c0d04a169a341f11af2b012abd481b3">ao68000</a> (<a class="code" href="classbus__control.html#a7c0d04a169a341f11af2b012abd481b3">ao68000</a>),
<a name="l00506"></a>00506 .<a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">ao68000</a> (<a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">ao68000</a>),
<a name="l00507"></a>00507 .<a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ao68000</a> (<a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ao68000</a>),
<a name="l00508"></a>00508 .<a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">ao68000</a> (<a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">ao68000</a>),
<a name="l00509"></a>00509 .<a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">ao68000</a> (<a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">ao68000</a>),
<a name="l00510"></a>00510 .<a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">ao68000</a> (<a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">ao68000</a>),
<a name="l00511"></a>00511 .<a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">ao68000</a> (<a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">ao68000</a>),
<a name="l00512"></a>00512 .<a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">ao68000</a> (<a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">ao68000</a>),
<a name="l00513"></a>00513 .<a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ao68000</a> (<a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ao68000</a>),
<a name="l00514"></a>00514 .<a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ao68000</a> (<a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ao68000</a>),
<a name="l00515"></a>00515 .<a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">ao68000</a> (<a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">ao68000</a>),
<a name="l00516"></a>00516 .<a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">ao68000</a> (<a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">ao68000</a>),
<a name="l00517"></a>00517 .<a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">ao68000</a> (<a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">ao68000</a>),
<a name="l00518"></a>00518 .<a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">ao68000</a> (<a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">ao68000</a>),
<a name="l00519"></a>00519 .<a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">ao68000</a> (<a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">ao68000</a>),
<a name="l00520"></a>00520 .<a class="code" href="classbus__control.html#a1dd14b92bd4443311024f3a3fa6e0c8d">ao68000</a> (<a class="code" href="classbus__control.html#a1dd14b92bd4443311024f3a3fa6e0c8d">ao68000</a>),
<a name="l00521"></a>00521 .<a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">ao68000</a> (<a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">ao68000</a>),
<a name="l00522"></a>00522 .<a class="code" href="classbus__control.html#a93ed536c4b75b18958ffa28838ae5957">ao68000</a> (<a class="code" href="classbus__control.html#a93ed536c4b75b18958ffa28838ae5957">ao68000</a>),
<a name="l00523"></a>00523 .<a class="code" href="classbus__control.html#a139d4b4c2d79d749375db4dd71f3a9fd">ao68000</a> (<a class="code" href="classbus__control.html#a139d4b4c2d79d749375db4dd71f3a9fd">ao68000</a>),
<a name="l00524"></a>00524 .<a class="code" href="classao68000.html#a0a90a371e379531c8e466799ff5c3d49">blocked_o</a> (<a class="code" href="classao68000.html#a0a90a371e379531c8e466799ff5c3d49">blocked_o</a>),
<a name="l00525"></a>00525
<a name="l00526"></a>00526 .<span class="vhdlchar">supervisor_i</span> (<a class="code" href="classao68000.html#abef0ede1a300bfe80eeecc8d51a0afe0">sr</a>[<span class="vhdllogic">13</span>]),
<a name="l00527"></a>00527 .<span class="vhdlchar">ipm_i</span> (<a class="code" href="classao68000.html#abef0ede1a300bfe80eeecc8d51a0afe0">sr</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">8</span>]),
<a name="l00528"></a>00528 .<span class="vhdlchar">size_i</span> (<a class="code" href="classao68000.html#a7e653ecba236b212b87d66d9e46f3914">size</a>),
<a name="l00529"></a>00529 .<span class="vhdlchar">address_i</span> (<a class="code" href="classao68000.html#aaf40157e76d59864abf62ffe1c4f605d">address</a>),
<a name="l00530"></a>00530 .<span class="vhdlchar">address_type_i</span> (<a class="code" href="classao68000.html#a3da831ef8ac6ec75b132d8d299115092">address_type</a>),
<a name="l00531"></a>00531 .<span class="vhdlchar">read_modify_write_i</span> (<a class="code" href="classao68000.html#a4d00737f890e3080a8915e23668c2fe0">read_modify_write_flag</a>),
<a name="l00532"></a>00532 .<span class="vhdlchar">data_write_i</span> (<a class="code" href="classao68000.html#ac7098386bafc8ad2194743a7ebbc3928">data_write</a>),
<a name="l00533"></a>00533 .<span class="vhdlchar">data_read_o</span> (<a class="code" href="classao68000.html#a341be6a91dd12d14293eaa53c7c254d2">data_read</a>),
<a name="l00534"></a>00534 .<span class="vhdlchar">pc_i</span> (<a class="code" href="classao68000.html#a5e28cd1d3701cc3d88dd0df22e697108">pc</a>),
<a name="l00535"></a>00535 .<span class="vhdlchar">pc_change_i</span> (<a class="code" href="classao68000.html#a71903694d8425f743a2f6e753a7e2e89">pc_change</a>),
<a name="l00536"></a>00536 .<span class="vhdlchar">prefetch_ir_o</span> (<a class="code" href="classao68000.html#a3403e55545d6a49c4a4fa6f16cfe7126">prefetch_ir</a>),
<a name="l00537"></a>00537 .<span class="vhdlchar">prefetch_ir_valid_32_o</span> (<a class="code" href="classao68000.html#aeb25637923460dddbd88804a217e5ce5">prefetch_ir_valid_32</a>),
<a name="l00538"></a>00538 .<span class="vhdlchar">prefetch_ir_valid_o</span> (<a class="code" href="classao68000.html#a7f60c5a54b85d16a5daa159e3f93f3a2">prefetch_ir_valid</a>),
<a name="l00539"></a>00539 .<span class="vhdlchar">prefetch_ir_valid_80_o</span> (),
<a name="l00540"></a>00540 .<span class="vhdlchar">do_reset_i</span> (<a class="code" href="classao68000.html#a63cc96be1f84432ea4b755f14c9801bd">do_reset</a>),
<a name="l00541"></a>00541 .<span class="vhdlchar">do_blocked_i</span> (<a class="code" href="classao68000.html#a8d22354dba9690de7ed1f40174e7fac5">do_blocked</a>),
<a name="l00542"></a>00542 .<span class="vhdlchar">do_read_i</span> (<a class="code" href="classao68000.html#aaa926f4340d9533fa404ed2121e01add">do_read</a>),
<a name="l00543"></a>00543 .<span class="vhdlchar">do_write_i</span> (<a class="code" href="classao68000.html#a2fd644eba6903b45558dba81d759d60a">do_write</a>),
<a name="l00544"></a>00544 .<span class="vhdlchar">do_interrupt_i</span> (<a class="code" href="classao68000.html#a017afb5ca18639747617179cd4b5b9af">do_interrupt</a>),
<a name="l00545"></a>00545 .<span class="vhdlchar">jmp_address_trap_o</span> (<a class="code" href="classao68000.html#aa9b27c579ff3359c8722f33ddc218606">jmp_address_trap</a>),
<a name="l00546"></a>00546 .<span class="vhdlchar">jmp_bus_trap_o</span> (<a class="code" href="classao68000.html#a68c0830ee44827649eeece60ccb007a4">jmp_bus_trap</a>),
<a name="l00547"></a>00547 .<span class="vhdlchar">finished_o</span> (<a class="code" href="classao68000.html#adc838dee1d3e5fb81b69d9cd825e2078">finished</a>),
<a name="l00548"></a>00548 .<span class="vhdlchar">interrupt_trap_o</span> (<a class="code" href="classao68000.html#ab31d9d61b3fb7b8cf2d2588943144c51">interrupt_trap</a>),
<a name="l00549"></a>00549 .<span class="vhdlchar">interrupt_mask_o</span> (<a class="code" href="classao68000.html#a48c24a88040f4bfdc6df4f6d44c74f02">interrupt_mask</a>),
<a name="l00550"></a>00550 .<span class="vhdlchar">rw_state_o</span> (<a class="code" href="classao68000.html#aa64aa2047c9823a2b6354f945b7a1e91">rw_state</a>),
<a name="l00551"></a>00551 .<span class="vhdlchar">fc_state_o</span> (<a class="code" href="classao68000.html#ad29c33a9347a9dc0ad7e6a38a9674cea">fc_state</a>),
<a name="l00552"></a>00552 .<span class="vhdlchar">fault_address_state_o</span> (<a class="code" href="classao68000.html#ae552c0d79d4e728a385243f7339c4090">fault_address_state</a>)
<a name="l00553"></a>00553 );
<a name="l00554"></a>00554
<a name="l00555"></a><a class="code" href="classao68000.html#ad82deea9ab15d2e02890df123ad51fd9">00555</a> <a class="code" href="classao68000.html#ad82deea9ab15d2e02890df123ad51fd9">registers</a> <span class="vhdlchar">registers_m</span>(
<a name="l00556"></a>00556 .<a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">ao68000</a> (<a class="code" href="classao68000.html#a6bee7e749a667293d6fbea8fc1380d12">CLK_I</a>),
<a name="l00557"></a>00557 .<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">ao68000</a> (<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">ao68000</a>),
<a name="l00558"></a>00558 .<a class="code" href="classregisters.html#a0cdf5b5316a0edcd85909fc9da5ca864">ao68000</a> (<a class="code" href="classregisters.html#a0cdf5b5316a0edcd85909fc9da5ca864">ao68000</a>),
<a name="l00559"></a>00559 .<a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">ao68000</a> (<a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">ao68000</a>),
<a name="l00560"></a>00560 .<a class="code" href="classregisters.html#a8031b93d1dc568b98697eb0c81b13bfd">ao68000</a> (<a class="code" href="classregisters.html#a8031b93d1dc568b98697eb0c81b13bfd">ao68000</a>),
<a name="l00561"></a>00561 .<a class="code" href="classregisters.html#ad27ecd2d9ef571fa88b998f3674fe9a6">ao68000</a> (<a class="code" href="classregisters.html#ad27ecd2d9ef571fa88b998f3674fe9a6">ao68000</a>),
<a name="l00562"></a>00562 .<a class="code" href="classregisters.html#a116473c99b3cbf75fd0f48a25ea9227e">ao68000</a> (<a class="code" href="classregisters.html#a116473c99b3cbf75fd0f48a25ea9227e">ao68000</a>),
<a name="l00563"></a>00563 .<a class="code" href="classregisters.html#ae12d419de758617259ab74281fd09f03">ao68000</a> (<a class="code" href="classregisters.html#ae12d419de758617259ab74281fd09f03">ao68000</a>),
<a name="l00564"></a>00564 .<a class="code" href="classregisters.html#a1864a58a4089bd5d72ba19730137c5ce">ao68000</a> (<a class="code" href="classregisters.html#a1864a58a4089bd5d72ba19730137c5ce">ao68000</a>),
<a name="l00565"></a>00565 .<a class="code" href="classregisters.html#acfc96bc559a0660239cb6b8a8836b862">ao68000</a> (<a class="code" href="classregisters.html#acfc96bc559a0660239cb6b8a8836b862">ao68000</a>),
<a name="l00566"></a>00566 .<a class="code" href="classregisters.html#a10ef9845f594ecc956dc1b1c8cdef44e">ao68000</a> (<a class="code" href="classregisters.html#a10ef9845f594ecc956dc1b1c8cdef44e">ao68000</a>),
<a name="l00567"></a>00567 .<a class="code" href="classregisters.html#aa92eeffb2c5af01c413399dfb1f58b17">ao68000</a> (<a class="code" href="classregisters.html#aa92eeffb2c5af01c413399dfb1f58b17">ao68000</a>),
<a name="l00568"></a>00568 .<a class="code" href="classregisters.html#a278b33a84015867a530ac4279331d570">ao68000</a> (<a class="code" href="classregisters.html#a278b33a84015867a530ac4279331d570">ao68000</a>),
<a name="l00569"></a>00569 .<a class="code" href="classregisters.html#a6810e76be48010f9b34a91c27ddd636b">ao68000</a> (<a class="code" href="classregisters.html#a6810e76be48010f9b34a91c27ddd636b">ao68000</a>),
<a name="l00570"></a>00570 .<a class="code" href="classregisters.html#a659bea909e94f7512c4311bcff473a5d">ao68000</a> (<a class="code" href="classregisters.html#a659bea909e94f7512c4311bcff473a5d">ao68000</a>),
<a name="l00571"></a>00571 .<a class="code" href="classregisters.html#a7fdc26691a005524667257529b1c1212">ao68000</a> (<a class="code" href="classregisters.html#a7fdc26691a005524667257529b1c1212">ao68000</a>),
<a name="l00572"></a>00572
<a name="l00573"></a>00573 .<a class="code" href="classregisters.html#a73f335a76d3869b20956c67a67ff8f6e">ao68000</a> (<a class="code" href="classregisters.html#a73f335a76d3869b20956c67a67ff8f6e">ao68000</a>),
<a name="l00574"></a>00574
<a name="l00575"></a>00575 .<a class="code" href="classregisters.html#aa1a45d113f21dba8f82a93ddfe1d6409">ao68000</a> (<a class="code" href="classregisters.html#aa1a45d113f21dba8f82a93ddfe1d6409">ao68000</a>),
<a name="l00576"></a>00576 .<a class="code" href="classregisters.html#ae09341fa22dc0b4675dc02dc4a5fb918">ao68000</a> (<a class="code" href="ao68000_8v.html#a3a14e27ef3dcc344f66e5eb0aa93d38d">`MICRO_DATA_ea_reg</a><span class="vhdlchar"></span>),
<a name="l00577"></a>00577 .<a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ao68000</a> (<a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ao68000</a>),
<a name="l00578"></a>00578 .<a class="code" href="classregisters.html#af6205981eadd3ee1e9fa193f04b6a893">ao68000</a> (<a class="code" href="ao68000_8v.html#aa691c194246c2ac4def5609ba8963326">`MICRO_DATA_ea_mod</a><span class="vhdlchar"></span>),
<a name="l00579"></a>00579 .<a class="code" href="classregisters.html#a34f0e8ea4d6f79a3c8cf7e3ba129ea58">ao68000</a> (<a class="code" href="classregisters.html#a34f0e8ea4d6f79a3c8cf7e3ba129ea58">ao68000</a>),
<a name="l00580"></a>00580 .<a class="code" href="classregisters.html#aa22fa504627eea9bff308c3358ef9240">ao68000</a> (<a class="code" href="ao68000_8v.html#ae45014e01523ad88c7b7bd74cdb1b8db">`MICRO_DATA_ea_type</a><span class="vhdlchar"></span>),
<a name="l00581"></a>00581 .<a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">ao68000</a> (<a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">ao68000</a>),
<a name="l00582"></a>00582 .<span class="vhdlchar">operand1_control</span> (<a class="code" href="ao68000_8v.html#a80f755d97ef46590665dc161a3de3f60">`MICRO_DATA_op1</a><span class="vhdlchar"></span>),
<a name="l00583"></a>00583 .<a class="code" href="classao68000.html#abba9faff9213088a72a8ec33a43e7b88">operand2</a> (<a class="code" href="classao68000.html#abba9faff9213088a72a8ec33a43e7b88">operand2</a>),
<a name="l00584"></a>00584 .<span class="vhdlchar">operand2_control</span> (<a class="code" href="ao68000_8v.html#ab1641cfecafe6ff147522b68bd7f9c0d">`MICRO_DATA_op2</a><span class="vhdlchar"></span>),
<a name="l00585"></a>00585 .<a class="code" href="classao68000.html#aaf40157e76d59864abf62ffe1c4f605d">address</a> (<a class="code" href="classao68000.html#aaf40157e76d59864abf62ffe1c4f605d">address</a>),
<a name="l00586"></a>00586 .<a class="code" href="classao68000.html#a3da831ef8ac6ec75b132d8d299115092">address_type</a> (<a class="code" href="classao68000.html#a3da831ef8ac6ec75b132d8d299115092">address_type</a>),
<a name="l00587"></a>00587 .<span class="vhdlchar">address_control</span> (<a class="code" href="ao68000_8v.html#a600647e8ee417a6f81b00e53f101af5f">`MICRO_DATA_address</a><span class="vhdlchar"></span>),
<a name="l00588"></a>00588 .<a class="code" href="classao68000.html#a7e653ecba236b212b87d66d9e46f3914">size</a> (<a class="code" href="classao68000.html#a7e653ecba236b212b87d66d9e46f3914">size</a>),
<a name="l00589"></a>00589 .<span class="vhdlchar">size_control</span> (<a class="code" href="ao68000_8v.html#a73de1704db2fb003c3a2da4b3f1667de">`MICRO_DATA_size</a><span class="vhdlchar"></span>),
<a name="l00590"></a>00590 .<span class="vhdlchar">movem_modreg</span> (),
<a name="l00591"></a>00591 .<span class="vhdlchar">movem_modreg_control</span> (<a class="code" href="ao68000_8v.html#a73831c7c30f75ec6e263ce47f1a3fb64">`MICRO_DATA_movem_modreg</a><span class="vhdlchar"></span>),
<a name="l00592"></a>00592 .<a class="code" href="classao68000.html#a01988743194f85b63333d073c7fe68f7">movem_loop</a> (<a class="code" href="classao68000.html#a01988743194f85b63333d073c7fe68f7">movem_loop</a>),
<a name="l00593"></a>00593 .<span class="vhdlchar">movem_loop_control</span> (<a class="code" href="ao68000_8v.html#a93b7332d93eddbed779bba21295794f3">`MICRO_DATA_movem_loop</a><span class="vhdlchar"></span>),
<a name="l00594"></a>00594 .<a class="code" href="classao68000.html#a280d638b17d688517b637ad90d6df376">movem_reg</a> (<a class="code" href="classao68000.html#a280d638b17d688517b637ad90d6df376">movem_reg</a>),
<a name="l00595"></a>00595 .<span class="vhdlchar">movem_reg_control</span> (<a class="code" href="ao68000_8v.html#a5246b6d3ea1d05aa2d34597666a8da31">`MICRO_DATA_movem_reg</a><span class="vhdlchar"></span>),
<a name="l00596"></a>00596 .<a class="code" href="classao68000.html#a88e0be4d7a8d7765fd81d2c7ecec034c">ir</a> (<a class="code" href="classao68000.html#a88e0be4d7a8d7765fd81d2c7ecec034c">ir</a>),
<a name="l00597"></a>00597 .<span class="vhdlchar">ir_control</span> (<a class="code" href="ao68000_8v.html#a15830df6bfc267949eaeb9c862ec021a">`MICRO_DATA_ir</a><span class="vhdlchar"></span>),
<a name="l00598"></a>00598 .<a class="code" href="classao68000.html#a5e28cd1d3701cc3d88dd0df22e697108">pc</a> (<a class="code" href="classao68000.html#a5e28cd1d3701cc3d88dd0df22e697108">pc</a>),
<a name="l00599"></a>00599 .<span class="vhdlchar">pc_control</span> (<a class="code" href="ao68000_8v.html#a35a9274fdd4fa537efdb15f0b0b787e6">`MICRO_DATA_pc</a><span class="vhdlchar"></span>),
<a name="l00600"></a>00600 .<span class="vhdlchar">trap</span> (),
<a name="l00601"></a>00601 .<span class="vhdlchar">trap_control</span> (<a class="code" href="ao68000_8v.html#ac4878c2a7cf765d443c1c9da238b5ac9">`MICRO_DATA_trap</a><span class="vhdlchar"></span>),
<a name="l00602"></a>00602 .<span class="vhdlchar">offset</span> (),
<a name="l00603"></a>00603 .<span class="vhdlchar">offset_control</span> (<a class="code" href="ao68000_8v.html#a4deaea8bc3d376dac501f3a314f1490c">`MICRO_DATA_offset</a><span class="vhdlchar"></span>),
<a name="l00604"></a>00604 .<span class="vhdlchar">index</span> (),
<a name="l00605"></a>00605 .<span class="vhdlchar">index_control</span> (<a class="code" href="ao68000_8v.html#ad722ce87f573d9c6e1010e5a87005383">`MICRO_DATA_index</a><span class="vhdlchar"></span>),
<a name="l00606"></a>00606 .<a class="code" href="classao68000.html#aa7e62464a0cd6d4d476939a4ddcb7cb0">stop_flag</a> (<a class="code" href="classao68000.html#aa7e62464a0cd6d4d476939a4ddcb7cb0">stop_flag</a>),
<a name="l00607"></a>00607 .<span class="vhdlchar">stop_flag_control</span> (<a class="code" href="ao68000_8v.html#a5e820e2a23919cb4005a8cc9651c26c0">`MICRO_DATA_stop_flag</a><span class="vhdlchar"></span>),
<a name="l00608"></a>00608 .<a class="code" href="classao68000.html#a3cb489d55f80adb5d4cafd9f9f4679be">trace_flag</a> (<a class="code" href="classao68000.html#a3cb489d55f80adb5d4cafd9f9f4679be">trace_flag</a>),
<a name="l00609"></a>00609 .<span class="vhdlchar">trace_flag_control</span> (<a class="code" href="ao68000_8v.html#aa913e0fe5ccffe6e2d7e91d43f39f139">`MICRO_DATA_trace_flag</a><span class="vhdlchar"></span>),
<a name="l00610"></a>00610 .<a class="code" href="classao68000.html#abf4182c32ee4bc817caa8b5d6772ab7a">group_0_flag</a> (<a class="code" href="classao68000.html#abf4182c32ee4bc817caa8b5d6772ab7a">group_0_flag</a>),
<a name="l00611"></a>00611 .<span class="vhdlchar">group_0_flag_control</span> (<a class="code" href="ao68000_8v.html#a595e837c71d69c5a4d7c4a3c9d64ffb0">`MICRO_DATA_group_0_flag</a><span class="vhdlchar"></span>),
<a name="l00612"></a>00612 .<span class="vhdlchar">instruction_flag</span> (),
<a name="l00613"></a>00613 .<span class="vhdlchar">instruction_flag_control</span> (<a class="code" href="ao68000_8v.html#a188c9ee8d0adc5ec2fb732fdece9ea31">`MICRO_DATA_instruction_flag</a><span class="vhdlchar"></span>),
<a name="l00614"></a>00614 .<a class="code" href="classao68000.html#a4d00737f890e3080a8915e23668c2fe0">read_modify_write_flag</a> (<a class="code" href="classao68000.html#a4d00737f890e3080a8915e23668c2fe0">read_modify_write_flag</a>),
<a name="l00615"></a>00615 .<span class="vhdlchar">read_modify_write_flag_control</span> (<a class="code" href="ao68000_8v.html#ae152374d2c661e9bfcb222888087b18f">`MICRO_DATA_read_modify_write_flag</a><span class="vhdlchar"></span>),
<a name="l00616"></a>00616 .<span class="vhdlchar">do_reset_flag</span> (<a class="code" href="classao68000.html#a63cc96be1f84432ea4b755f14c9801bd">do_reset</a>),
<a name="l00617"></a>00617 .<span class="vhdlchar">do_reset_flag_control</span> (<a class="code" href="ao68000_8v.html#a05f6c84753b5b54fe61fe36a740b739d">`MICRO_DATA_do_reset_flag</a><span class="vhdlchar"></span>),
<a name="l00618"></a>00618 .<span class="vhdlchar">do_interrupt_flag</span> (<a class="code" href="classao68000.html#a017afb5ca18639747617179cd4b5b9af">do_interrupt</a>),
<a name="l00619"></a>00619 .<span class="vhdlchar">do_interrupt_flag_control</span> (<a class="code" href="ao68000_8v.html#a989be17e3392ddf7c87fcf41a9c1576b">`MICRO_DATA_do_interrupt_flag</a><span class="vhdlchar"></span>),
<a name="l00620"></a>00620 .<span class="vhdlchar">do_read_flag</span> (<a class="code" href="classao68000.html#aaa926f4340d9533fa404ed2121e01add">do_read</a>),
<a name="l00621"></a>00621 .<span class="vhdlchar">do_read_flag_control</span> (<a class="code" href="ao68000_8v.html#a3935f3fc6e20767fdeee079bdb08648f">`MICRO_DATA_do_read_flag</a><span class="vhdlchar"></span>),
<a name="l00622"></a>00622 .<span class="vhdlchar">do_write_flag</span> (<a class="code" href="classao68000.html#a2fd644eba6903b45558dba81d759d60a">do_write</a>),
<a name="l00623"></a>00623 .<span class="vhdlchar">do_write_flag_control</span> (<a class="code" href="ao68000_8v.html#a42e2926c262bd037f32951c89a51067e">`MICRO_DATA_do_write_flag</a><span class="vhdlchar"></span>),
<a name="l00624"></a>00624 .<span class="vhdlchar">do_blocked_flag</span> (<a class="code" href="classao68000.html#a8d22354dba9690de7ed1f40174e7fac5">do_blocked</a>),
<a name="l00625"></a>00625 .<span class="vhdlchar">do_blocked_flag_control</span> (<a class="code" href="ao68000_8v.html#adf7ac746fc276a0c3083d2606df75af4">`MICRO_DATA_do_blocked_flag</a><span class="vhdlchar"></span>),
<a name="l00626"></a>00626 .<a class="code" href="classao68000.html#ac7098386bafc8ad2194743a7ebbc3928">data_write</a> (<a class="code" href="classao68000.html#ac7098386bafc8ad2194743a7ebbc3928">data_write</a>),
<a name="l00627"></a>00627 .<span class="vhdlchar">data_write_control</span> (<a class="code" href="ao68000_8v.html#a0843baa7810722c7e1afd79aa615a9f0">`MICRO_DATA_data_write</a><span class="vhdlchar"></span>),
<a name="l00628"></a>00628 .<a class="code" href="classao68000.html#ac4bdc1d7a8df2e5b24f92e8c47b87d31">An_address</a> (<a class="code" href="classao68000.html#ac4bdc1d7a8df2e5b24f92e8c47b87d31">An_address</a>),
<a name="l00629"></a>00629 .<span class="vhdlchar">An_address_control</span> (<a class="code" href="ao68000_8v.html#a08e217a2a40544a7d5c4e916a3b4d6cf">`MICRO_DATA_an_address</a><span class="vhdlchar"></span>),
<a name="l00630"></a>00630 .<a class="code" href="classao68000.html#a314e14c9d14faca666d7282e70aec69e">An_input</a> (<a class="code" href="classao68000.html#a314e14c9d14faca666d7282e70aec69e">An_input</a>),
<a name="l00631"></a>00631 .<span class="vhdlchar">An_input_control</span> (<a class="code" href="ao68000_8v.html#aa6a6132c427e511630e6889582d48828">`MICRO_DATA_an_input</a><span class="vhdlchar"></span>),
<a name="l00632"></a>00632 .<a class="code" href="classao68000.html#a8ce376b6468188948a66dd3090b82303">Dn_address</a> (<a class="code" href="classao68000.html#a8ce376b6468188948a66dd3090b82303">Dn_address</a>),
<a name="l00633"></a>00633 .<span class="vhdlchar">Dn_address_control</span> (<a class="code" href="ao68000_8v.html#a1055ed2c94344c9b59a9061b451fd4b8">`MICRO_DATA_dn_address</a><span class="vhdlchar"></span>),
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<a name="l00720"></a>00720 .<a class="code" href="classmicrocode__branch.html#a00377f72cb925ea734f33251d85c91c7">ao68000</a> (<a class="code" href="classmicrocode__branch.html#a00377f72cb925ea734f33251d85c91c7">ao68000</a>),
<a name="l00721"></a>00721 .<a class="code" href="classmicrocode__branch.html#ada4f59f60e418f07a72712526be1b5b9">ao68000</a> (<a class="code" href="classmicrocode__branch.html#ada4f59f60e418f07a72712526be1b5b9">ao68000</a>),
<a name="l00722"></a>00722 .<a class="code" href="classmicrocode__branch.html#a4d3b8c3de44caa018f9bf33e7feb80d4">ao68000</a> (<a class="code" href="classmicrocode__branch.html#a4d3b8c3de44caa018f9bf33e7feb80d4">ao68000</a>),
<a name="l00723"></a>00723 .<a class="code" href="classmicrocode__branch.html#ab56717bc022b7c1d30259431ddbce1a5">ao68000</a> (<a class="code" href="classmicrocode__branch.html#ab56717bc022b7c1d30259431ddbce1a5">ao68000</a>),
<a name="l00724"></a>00724 .<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">ao68000</a> (<a class="code" href="ao68000_8v.html#a156b8e8011ac86392d0e47b50cc1bd12">`MICRO_DATA_branch</a><span class="vhdlchar"></span>),
<a name="l00725"></a>00725 .<a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">ao68000</a> (<a class="code" href="ao68000_8v.html#a8356eb451657c128626552b5a360de3a">`MICRO_DATA_procedure</a><span class="vhdlchar"></span>),
<a name="l00726"></a>00726 .<a class="code" href="classmicrocode__branch.html#a238196a5cce50e726172501c44505eb5">ao68000</a> (<a class="code" href="classmicrocode__branch.html#a238196a5cce50e726172501c44505eb5">ao68000</a>)
<a name="l00727"></a>00727 );
<a name="l00728"></a>00728
<a name="l00729"></a>00729 <span class="vhdlkeyword">endmodule</span>
<a name="l00730"></a>00730
<a name="l00731"></a>00731 <span class="keyword">/***********************************************************************************************************************</span>
<a name="l00732"></a>00732 <span class="keyword"> Bus control</span>
<a name="l00733"></a>00733 <span class="keyword"> ***********************************************************************************************************************/</span>
<a name="l00734"></a>00734
<a name="l00757"></a><a class="code" href="classbus__control.html">00757</a> <span class="vhdlkeyword">module</span> <a class="code" href="classao68000.html#a2c34e1b84d9fe30c49c5c814be3dc392">bus_control</a>(
<a name="l00758"></a>00758 <span class="keyword">//******************************************* external</span>
<a name="l00759"></a>00759 <span class="keyword">//****************** WISHBONE</span>
<a name="l00760"></a><a class="code" href="classbus__control.html#a4054e75175a8d9a78f2e34150e1c0465">00760</a> <span class="vhdlkeyword">input</span> <a class="code" href="classbus__control.html#a4054e75175a8d9a78f2e34150e1c0465">CLK_I</a>,
<a name="l00761"></a><a class="code" href="classbus__control.html#a7c0d04a169a341f11af2b012abd481b3">00761</a> <span class="vhdlkeyword">input</span> <a class="code" href="classbus__control.html#a7c0d04a169a341f11af2b012abd481b3">reset_n</a>,
<a name="l00762"></a>00762
<a name="l00763"></a><a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">00763</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a>,
<a name="l00764"></a><a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">00764</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>] <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a>,
<a name="l00765"></a><a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">00765</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a>,
<a name="l00766"></a><a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">00766</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>,
<a name="l00767"></a><a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">00767</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a>,
<a name="l00768"></a><a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">00768</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a>,
<a name="l00769"></a><a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">00769</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> <a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a>,
<a name="l00770"></a>00770
<a name="l00771"></a><a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">00771</a> <span class="vhdlkeyword">input</span> <a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ACK_I</a>,
<a name="l00772"></a><a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">00772</a> <span class="vhdlkeyword">input</span> <a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ERR_I</a>,
<a name="l00773"></a><a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">00773</a> <span class="vhdlkeyword">input</span> <a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">RTY_I</a>,
<a name="l00774"></a>00774
<a name="l00775"></a>00775 <span class="keyword">// TAG_TYPE: TGC_O</span>
<a name="l00776"></a><a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">00776</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a>,
<a name="l00777"></a><a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">00777</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a>,
<a name="l00778"></a><a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">00778</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a>,
<a name="l00779"></a>00779
<a name="l00780"></a>00780 <span class="keyword">// TAG_TYPE: TGA_O</span>
<a name="l00781"></a><a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">00781</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a>,
<a name="l00782"></a><a class="code" href="classbus__control.html#a1dd14b92bd4443311024f3a3fa6e0c8d">00782</a> <span class="vhdlkeyword">output</span> [<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] <a class="code" href="classbus__control.html#a1dd14b92bd4443311024f3a3fa6e0c8d">BTE_O</a>,
<a name="l00783"></a>00783
<a name="l00784"></a>00784 <span class="keyword">// TAG_TYPE: TGC_O</span>
<a name="l00785"></a><a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">00785</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a>,
<a name="l00786"></a>00786
<a name="l00787"></a>00787 <span class="keyword">//****************** OTHER</span>
<a name="l00788"></a><a class="code" href="classbus__control.html#a93ed536c4b75b18958ffa28838ae5957">00788</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classbus__control.html#a93ed536c4b75b18958ffa28838ae5957">ipl_i</a>,
<a name="l00789"></a><a class="code" href="classbus__control.html#a139d4b4c2d79d749375db4dd71f3a9fd">00789</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> <a class="code" href="classbus__control.html#a139d4b4c2d79d749375db4dd71f3a9fd">reset_o</a> = <span class="vhdllogic">1&#39;b0</span>,
<a name="l00790"></a>00790 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> blocked_o = <span class="vhdllogic">1&#39;b0</span>,
<a name="l00791"></a>00791
<a name="l00792"></a>00792 <span class="keyword">//******************************************* internal</span>
<a name="l00793"></a>00793 <span class="vhdlkeyword">input</span> supervisor_i,
<a name="l00794"></a>00794 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] ipm_i,
<a name="l00795"></a>00795 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] size_i,
<a name="l00796"></a>00796 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] address_i,
<a name="l00797"></a>00797 <span class="vhdlkeyword">input</span> address_type_i,
<a name="l00798"></a>00798 <span class="vhdlkeyword">input</span> read_modify_write_i,
<a name="l00799"></a>00799 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] data_write_i,
<a name="l00800"></a>00800 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] data_read_o,
<a name="l00801"></a>00801
<a name="l00802"></a>00802 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] pc_i,
<a name="l00803"></a>00803 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] pc_change_i,
<a name="l00804"></a>00804 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">79</span>:<span class="vhdllogic">0</span>] prefetch_ir_o,
<a name="l00805"></a>00805 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> prefetch_ir_valid_32_o = <span class="vhdllogic">1&#39;b0</span>,
<a name="l00806"></a>00806 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> prefetch_ir_valid_o = <span class="vhdllogic">1&#39;b0</span>,
<a name="l00807"></a>00807 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> prefetch_ir_valid_80_o = <span class="vhdllogic">1&#39;b0</span>,
<a name="l00808"></a>00808
<a name="l00809"></a>00809 <span class="vhdlkeyword">input</span> do_reset_i,
<a name="l00810"></a>00810 <span class="vhdlkeyword">input</span> do_blocked_i,
<a name="l00811"></a>00811 <span class="vhdlkeyword">input</span> do_read_i,
<a name="l00812"></a>00812 <span class="vhdlkeyword">input</span> do_write_i,
<a name="l00813"></a>00813 <span class="vhdlkeyword">input</span> do_interrupt_i,
<a name="l00814"></a>00814
<a name="l00815"></a>00815 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> jmp_address_trap_o = <span class="vhdllogic">1&#39;b0</span>,
<a name="l00816"></a>00816 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> jmp_bus_trap_o = <span class="vhdllogic">1&#39;b0</span>,
<a name="l00817"></a>00817 <span class="keyword">// read/write/interrupt</span>
<a name="l00818"></a>00818 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> finished_o,
<a name="l00819"></a>00819
<a name="l00820"></a>00820 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] interrupt_trap_o = <span class="vhdllogic">8&#39;b0</span>,
<a name="l00821"></a>00821 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] interrupt_mask_o = <span class="vhdllogic">3&#39;b0</span>,
<a name="l00822"></a>00822
<a name="l00823"></a>00823 <span class="keyword">/* mask==0 &amp;&amp; trap==0 nothing</span>
<a name="l00824"></a>00824 <span class="keyword"> mask!=0 interrupt with spurious interrupt</span>
<a name="l00825"></a>00825 <span class="keyword"> */</span>
<a name="l00826"></a>00826
<a name="l00827"></a>00827 <span class="keyword">// write = 0/read = 1</span>
<a name="l00828"></a>00828 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> rw_state_o,
<a name="l00829"></a>00829 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] fc_state_o,
<a name="l00830"></a>00830 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] fault_address_state_o
<a name="l00831"></a>00831 );
<a name="l00832"></a>00832
<a name="l00833"></a>00833 <span class="vhdlkeyword">assign</span> <a class="code" href="classbus__control.html#a1dd14b92bd4443311024f3a3fa6e0c8d">BTE_O</a> = <span class="vhdllogic">2&#39;b00</span>;
<a name="l00834"></a>00834
<a name="l00835"></a><a class="code" href="classbus__control.html#a96afbad4fe8073f7c58baf255b66c944">00835</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classbus__control.html#a96afbad4fe8073f7c58baf255b66c944">pc_i_plus_6</a>;
<a name="l00836"></a>00836 <span class="vhdlkeyword">assign</span> <a class="code" href="classbus__control.html#a96afbad4fe8073f7c58baf255b66c944">pc_i_plus_6</a> = <span class="vhdlchar">pc_i</span> + <span class="vhdllogic">32&#39;d6</span>;
<a name="l00837"></a><a class="code" href="classbus__control.html#addb6490ae2acff8c93b321b1e14c7bd4">00837</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classbus__control.html#addb6490ae2acff8c93b321b1e14c7bd4">pc_i_plus_4</a>;
<a name="l00838"></a>00838 <span class="vhdlkeyword">assign</span> <a class="code" href="classbus__control.html#addb6490ae2acff8c93b321b1e14c7bd4">pc_i_plus_4</a> = <span class="vhdlchar">pc_i</span> + <span class="vhdllogic">32&#39;d4</span>;
<a name="l00839"></a>00839
<a name="l00840"></a><a class="code" href="classbus__control.html#a2997069937ed71fba6eefb8837ba3282">00840</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classbus__control.html#a2997069937ed71fba6eefb8837ba3282">address_i_plus_4</a>;
<a name="l00841"></a>00841 <span class="vhdlkeyword">assign</span> <a class="code" href="classbus__control.html#a2997069937ed71fba6eefb8837ba3282">address_i_plus_4</a> = <span class="vhdlchar">address_i</span> + <span class="vhdllogic">32&#39;d4</span>;
<a name="l00842"></a>00842
<a name="l00843"></a><a class="code" href="classbus__control.html#a9d1ac811b477c31c0d6aec541dca418d">00843</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] <a class="code" href="classbus__control.html#a9d1ac811b477c31c0d6aec541dca418d">saved_pc_change</a> = <span class="vhdllogic">2&#39;b00</span>;
<a name="l00844"></a>00844
<a name="l00845"></a><a class="code" href="classbus__control.html#a1c803cc4a4f514cd4027a798d9236e5e">00845</a> <span class="vhdlkeyword">parameter</span> [<span class="vhdllogic">4</span>:<span class="vhdllogic">0</span>]
<a name="l00846"></a>00846 <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a> = <span class="vhdllogic">5&#39;d0</span>,
<a name="l00847"></a>00847 <a class="code" href="classbus__control.html#a8e24d83b04e325557b534b6fbe3c06ca">S_RESET</a> = <span class="vhdllogic">5&#39;d1</span>,
<a name="l00848"></a>00848 <a class="code" href="classbus__control.html#a2545a07988315cbf68e808af80333335">S_BLOCKED</a> = <span class="vhdllogic">5&#39;d2</span>,
<a name="l00849"></a>00849 <a class="code" href="classbus__control.html#a8ff92de377aefca42782778cda7132f3">S_INT_1</a> = <span class="vhdllogic">5&#39;d3</span>,
<a name="l00850"></a>00850 <a class="code" href="classbus__control.html#af752b2515eb632068e26865f1569598c">S_READ_1</a> = <span class="vhdllogic">5&#39;d4</span>,
<a name="l00851"></a>00851 <a class="code" href="classbus__control.html#a269161b7fabba2e00d3a3a5153a9620e">S_READ_2</a> = <span class="vhdllogic">5&#39;d5</span>,
<a name="l00852"></a>00852 <a class="code" href="classbus__control.html#a8af7b5fb8c5d5d3788e5af5dad48393b">S_READ_3</a> = <span class="vhdllogic">5&#39;d6</span>,
<a name="l00853"></a>00853 <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a> = <span class="vhdllogic">5&#39;d7</span>,
<a name="l00854"></a>00854 <a class="code" href="classbus__control.html#aad6d7bc2df8264837b68548b4045a54b">S_WRITE_1</a> = <span class="vhdllogic">5&#39;d8</span>,
<a name="l00855"></a>00855 <a class="code" href="classbus__control.html#a1f273f6cbe8fa88c5ac793cdb16128c5">S_WRITE_2</a> = <span class="vhdllogic">5&#39;d9</span>,
<a name="l00856"></a>00856 <a class="code" href="classbus__control.html#aa913a2abc1c8f2afa2bb8f6ebcbbca01">S_WRITE_3</a> = <span class="vhdllogic">5&#39;d10</span>,
<a name="l00857"></a>00857 <a class="code" href="classbus__control.html#abc89f2549e5275c60648fc9a94876e29">S_PC_0</a> = <span class="vhdllogic">5&#39;d11</span>,
<a name="l00858"></a>00858 <a class="code" href="classbus__control.html#a729095d9bb813c82aee565216b092f38">S_PC_1</a> = <span class="vhdllogic">5&#39;d12</span>,
<a name="l00859"></a>00859 <a class="code" href="classbus__control.html#aaa3088e2e223cdc5551d535c3739cad5">S_PC_2</a> = <span class="vhdllogic">5&#39;d13</span>,
<a name="l00860"></a>00860 <a class="code" href="classbus__control.html#a28895ce8a15bd607103ea20914434342">S_PC_3</a> = <span class="vhdllogic">5&#39;d14</span>,
<a name="l00861"></a>00861 <a class="code" href="classbus__control.html#a5e72ed7bc2e7991094fecd272775f92c">S_PC_4</a> = <span class="vhdllogic">5&#39;d15</span>,
<a name="l00862"></a>00862 <a class="code" href="classbus__control.html#aa19b7d76f1e25fd78b158b98088bd82a">S_PC_5</a> = <span class="vhdllogic">5&#39;d16</span>,
<a name="l00863"></a>00863 <a class="code" href="classbus__control.html#a1c803cc4a4f514cd4027a798d9236e5e">S_PC_6</a> = <span class="vhdllogic">5&#39;d17</span>;
<a name="l00864"></a>00864
<a name="l00865"></a><a class="code" href="classbus__control.html#ac44cb27522dcf872ea1f1d63cb652d9b">00865</a> <span class="vhdlkeyword">parameter</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>]
<a name="l00866"></a>00866 <a class="code" href="classbus__control.html#abd13c1b70988aa3f59e1d9cc23e62eb2">FC_USER_DATA</a> = <span class="vhdllogic">3&#39;d1</span>,
<a name="l00867"></a>00867 <a class="code" href="classbus__control.html#a80b93f8634a7f03a199836a78c52d9bb">FC_USER_PROGRAM</a> = <span class="vhdllogic">3&#39;d2</span>,
<a name="l00868"></a>00868 <a class="code" href="classbus__control.html#a6cb25547c77c5085562bd0ace17d08a4">FC_SUPERVISOR_DATA</a> = <span class="vhdllogic">3&#39;d5</span>, <span class="keyword">// all exception vector entries except reset</span>
<a name="l00869"></a>00869 <a class="code" href="classbus__control.html#a1dc6742718597d6e0ef98e8200bb49bf">FC_SUPERVISOR_PROGRAM</a> = <span class="vhdllogic">3&#39;d6</span>, <span class="keyword">// exception vector for reset</span>
<a name="l00870"></a>00870 <a class="code" href="classbus__control.html#ac44cb27522dcf872ea1f1d63cb652d9b">FC_CPU_SPACE</a> = <span class="vhdllogic">3&#39;d7</span>; <span class="keyword">// interrupt acknowlege bus cycle</span>
<a name="l00871"></a>00871
<a name="l00872"></a><a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">00872</a> <span class="vhdlkeyword">parameter</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>]
<a name="l00873"></a>00873 <a class="code" href="classbus__control.html#ad836a90bd600a96241bed00462efaa7f">CTI_CLASSIC_CYCLE</a> = <span class="vhdllogic">3&#39;d0</span>,
<a name="l00874"></a>00874 <a class="code" href="classbus__control.html#a4780c76f8764756e9ca6bc92a016fe8c">CTI_CONST_CYCLE</a> = <span class="vhdllogic">3&#39;d1</span>,
<a name="l00875"></a>00875 <a class="code" href="classbus__control.html#a9c7e8a6d030ee1f404d7526ebda509ca">CTI_INCR_CYCLE</a> = <span class="vhdllogic">3&#39;d2</span>,
<a name="l00876"></a>00876 <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a> = <span class="vhdllogic">3&#39;d7</span>;
<a name="l00877"></a>00877
<a name="l00878"></a><a class="code" href="classbus__control.html#a16c432fa4a9897426aab6df04ee608e0">00878</a> <span class="vhdlkeyword">parameter</span> [<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>]
<a name="l00879"></a>00879 <a class="code" href="classbus__control.html#a63d428a3abed8bfe070ad6e6f82ca72e">VECTOR_BUS_TRAP</a> = <span class="vhdllogic">8&#39;d2</span>,
<a name="l00880"></a>00880 <a class="code" href="classbus__control.html#a16c432fa4a9897426aab6df04ee608e0">VECTOR_ADDRESS_TRAP</a> = <span class="vhdllogic">8&#39;d3</span>;
<a name="l00881"></a>00881
<a name="l00882"></a><a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">00882</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">4</span>:<span class="vhdllogic">0</span>] <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a>;
<a name="l00883"></a><a class="code" href="classbus__control.html#af4b71c6c152246795fcfed45e67bab33">00883</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] <a class="code" href="classbus__control.html#af4b71c6c152246795fcfed45e67bab33">reset_counter</a>;
<a name="l00884"></a>00884
<a name="l00885"></a><a class="code" href="classbus__control.html#a18d43f989323778008d066233ddaa191">00885</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classbus__control.html#a18d43f989323778008d066233ddaa191">last_interrupt_mask</a>;
<a name="l00886"></a><a class="code" href="classbus__control.html#ad06cdf24c29b1b82596011bac2c9169c">00886</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classbus__control.html#a4054e75175a8d9a78f2e34150e1c0465">CLK_I</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classbus__control.html#a7c0d04a169a341f11af2b012abd481b3">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l00887"></a>00887 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#a7c0d04a169a341f11af2b012abd481b3">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>
<a name="l00888"></a>00888 <span class="vhdlchar">interrupt_mask_o</span> &lt;= <span class="vhdllogic">3&#39;b000</span>;
<a name="l00889"></a>00889 <a class="code" href="classbus__control.html#a18d43f989323778008d066233ddaa191">last_interrupt_mask</a> &lt;= <span class="vhdllogic">3&#39;b000</span>;
<a name="l00890"></a>00890 <span class="vhdlkeyword">end</span>
<a name="l00891"></a>00891 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#a93ed536c4b75b18958ffa28838ae5957">ipl_i</a> &gt; <span class="vhdlchar">ipm_i</span> &amp;&amp; <span class="vhdlchar">do_interrupt_i</span> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>
<a name="l00892"></a>00892 <span class="vhdlchar">interrupt_mask_o</span> &lt;= <a class="code" href="classbus__control.html#a93ed536c4b75b18958ffa28838ae5957">ipl_i</a>;
<a name="l00893"></a>00893 <a class="code" href="classbus__control.html#a18d43f989323778008d066233ddaa191">last_interrupt_mask</a> &lt;= <span class="vhdlchar">interrupt_mask_o</span>;
<a name="l00894"></a>00894 <span class="vhdlkeyword">end</span>
<a name="l00895"></a>00895 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_interrupt_i</span> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l00896"></a>00896 <span class="vhdlchar">interrupt_mask_o</span> &lt;= <a class="code" href="classbus__control.html#a18d43f989323778008d066233ddaa191">last_interrupt_mask</a>;
<a name="l00897"></a>00897 <span class="vhdlkeyword">end</span>
<a name="l00898"></a>00898 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l00899"></a>00899 <span class="vhdlchar">interrupt_mask_o</span> &lt;= <span class="vhdllogic">3&#39;b000</span>;
<a name="l00900"></a>00900 <a class="code" href="classbus__control.html#a18d43f989323778008d066233ddaa191">last_interrupt_mask</a> &lt;= <span class="vhdllogic">3&#39;b000</span>;
<a name="l00901"></a>00901 <span class="vhdlkeyword">end</span>
<a name="l00902"></a>00902 <span class="vhdlkeyword">end</span>
<a name="l00903"></a>00903
<a name="l00904"></a>00904 <span class="keyword">// change pc_i in middle of prefetch operation: undefined</span>
<a name="l00905"></a>00905
<a name="l00906"></a><a class="code" href="classbus__control.html#af34450e53e6fd2fd36db7dff17caf063">00906</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classbus__control.html#a4054e75175a8d9a78f2e34150e1c0465">CLK_I</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classbus__control.html#a7c0d04a169a341f11af2b012abd481b3">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l00907"></a>00907 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#a7c0d04a169a341f11af2b012abd481b3">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>
<a name="l00908"></a>00908 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>;
<a name="l00909"></a>00909 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <span class="vhdllogic">8&#39;d0</span>;
<a name="l00910"></a>00910 <span class="vhdlchar">prefetch_ir_valid_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00911"></a>00911 <span class="vhdlchar">prefetch_ir_valid_32_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00912"></a>00912 <span class="vhdlchar">prefetch_ir_valid_80_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00913"></a>00913
<a name="l00914"></a>00914 <span class="vhdlchar">jmp_address_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00915"></a>00915 <span class="vhdlchar">jmp_bus_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00916"></a>00916
<a name="l00917"></a>00917 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00918"></a>00918 <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> &lt;= <span class="vhdllogic">30&#39;d0</span>;
<a name="l00919"></a>00919 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> &lt;= <span class="vhdllogic">32&#39;d0</span>;
<a name="l00920"></a>00920 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b0</span>;
<a name="l00921"></a>00921 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00922"></a>00922 <a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00923"></a>00923 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00924"></a>00924 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00925"></a>00925 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00926"></a>00926 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <span class="vhdllogic">3&#39;d0</span>;
<a name="l00927"></a>00927 <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a> &lt;= <span class="vhdllogic">3&#39;d0</span>;
<a name="l00928"></a>00928 <a class="code" href="classbus__control.html#a139d4b4c2d79d749375db4dd71f3a9fd">reset_o</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00929"></a>00929 <span class="vhdlchar">blocked_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00930"></a>00930 <span class="vhdlchar">data_read_o</span> &lt;= <span class="vhdllogic">32&#39;d0</span>;
<a name="l00931"></a>00931 <span class="vhdlchar">finished_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00932"></a>00932 <span class="vhdlchar">rw_state_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00933"></a>00933 <span class="vhdlchar">fc_state_o</span> &lt;= <span class="vhdllogic">3&#39;d0</span>;
<a name="l00934"></a>00934 <span class="vhdlchar">fault_address_state_o</span> &lt;= <span class="vhdllogic">32&#39;d0</span>;
<a name="l00935"></a>00935 <a class="code" href="classbus__control.html#a9d1ac811b477c31c0d6aec541dca418d">saved_pc_change</a> &lt;= <span class="vhdllogic">2&#39;b0</span>;
<a name="l00936"></a>00936 <a class="code" href="classbus__control.html#af4b71c6c152246795fcfed45e67bab33">reset_counter</a> &lt;= <span class="vhdllogic">8&#39;d0</span>;
<a name="l00937"></a>00937 <span class="vhdlkeyword">end</span>
<a name="l00938"></a>00938 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l00939"></a>00939 <span class="vhdlkeyword">case</span>(<a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a>)
<a name="l00940"></a>00940 <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>: <span class="vhdlkeyword">begin</span>
<a name="l00941"></a>00941 <span class="vhdlchar">finished_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00942"></a>00942 <span class="vhdlchar">jmp_address_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00943"></a>00943 <span class="vhdlchar">jmp_bus_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00944"></a>00944 <a class="code" href="classbus__control.html#a139d4b4c2d79d749375db4dd71f3a9fd">reset_o</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00945"></a>00945 <span class="vhdlchar">blocked_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00946"></a>00946
<a name="l00947"></a>00947 <span class="keyword">// block</span>
<a name="l00948"></a>00948 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_blocked_i</span> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l00949"></a>00949 <span class="vhdlchar">blocked_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l00950"></a>00950 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a2545a07988315cbf68e808af80333335">S_BLOCKED</a>;
<a name="l00951"></a>00951 <span class="vhdlkeyword">end</span>
<a name="l00952"></a>00952 <span class="keyword">// reset</span>
<a name="l00953"></a>00953 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_reset_i</span> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l00954"></a>00954 <a class="code" href="classbus__control.html#a139d4b4c2d79d749375db4dd71f3a9fd">reset_o</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l00955"></a>00955 <a class="code" href="classbus__control.html#af4b71c6c152246795fcfed45e67bab33">reset_counter</a> &lt;= <span class="vhdllogic">8&#39;d124</span>;
<a name="l00956"></a>00956 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a8e24d83b04e325557b534b6fbe3c06ca">S_RESET</a>;
<a name="l00957"></a>00957 <span class="vhdlkeyword">end</span>
<a name="l00958"></a>00958 <span class="keyword">// read</span>
<a name="l00959"></a>00959 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_read_i</span> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l00960"></a>00960 <a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00961"></a>00961 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">supervisor_i</span> == <span class="vhdllogic">1&#39;b1</span>) <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a> &lt;= (<span class="vhdlchar">address_type_i</span> == <span class="vhdllogic">1&#39;b0</span>) ? <a class="code" href="classbus__control.html#a6cb25547c77c5085562bd0ace17d08a4">FC_SUPERVISOR_DATA</a> : <a class="code" href="classbus__control.html#a1dc6742718597d6e0ef98e8200bb49bf">FC_SUPERVISOR_PROGRAM</a>;
<a name="l00962"></a>00962 <span class="vhdlkeyword">else</span> <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a> &lt;= (<span class="vhdlchar">address_type_i</span> == <span class="vhdllogic">1&#39;b0</span>) ? <a class="code" href="classbus__control.html#abd13c1b70988aa3f59e1d9cc23e62eb2">FC_USER_DATA</a> : <a class="code" href="classbus__control.html#a80b93f8634a7f03a199836a78c52d9bb">FC_USER_PROGRAM</a>;
<a name="l00963"></a>00963
<a name="l00964"></a>00964 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; (<span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b0</span>)) <span class="vhdlkeyword">begin</span> <span class="keyword">// WORD or LONG WORD</span>
<a name="l00965"></a>00965 <span class="vhdlchar">fault_address_state_o</span> &lt;= <span class="vhdlchar">address_i</span>;
<a name="l00966"></a>00966 <span class="vhdlchar">rw_state_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l00967"></a>00967 <span class="vhdlchar">fc_state_o</span> &lt;= (<span class="vhdlchar">supervisor_i</span> == <span class="vhdllogic">1&#39;b1</span>) ? ((<span class="vhdlchar">address_type_i</span> == <span class="vhdllogic">1&#39;b0</span>) ? <a class="code" href="classbus__control.html#a6cb25547c77c5085562bd0ace17d08a4">FC_SUPERVISOR_DATA</a> : <a class="code" href="classbus__control.html#a1dc6742718597d6e0ef98e8200bb49bf">FC_SUPERVISOR_PROGRAM</a>) :
<a name="l00968"></a>00968 ((<span class="vhdlchar">address_type_i</span> == <span class="vhdllogic">1&#39;b0</span>) ? <a class="code" href="classbus__control.html#abd13c1b70988aa3f59e1d9cc23e62eb2">FC_USER_DATA</a> : <a class="code" href="classbus__control.html#a80b93f8634a7f03a199836a78c52d9bb">FC_USER_PROGRAM</a>);
<a name="l00969"></a>00969 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <a class="code" href="classbus__control.html#a16c432fa4a9897426aab6df04ee608e0">VECTOR_ADDRESS_TRAP</a>;
<a name="l00970"></a>00970
<a name="l00971"></a>00971 <span class="vhdlchar">jmp_address_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l00972"></a>00972 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l00973"></a>00973 <span class="vhdlkeyword">end</span>
<a name="l00974"></a>00974 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l00975"></a>00975 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l00976"></a>00976 <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> &lt;= <span class="vhdlchar">address_i</span>[<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>];
<a name="l00977"></a>00977 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= (<span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b00</span>)? <span class="vhdllogic">4&#39;b1000</span> :
<a name="l00978"></a>00978 (<span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b01</span>)? <span class="vhdllogic">4&#39;b0100</span> :
<a name="l00979"></a>00979 (<span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span>)? <span class="vhdllogic">4&#39;b0010</span> :
<a name="l00980"></a>00980 (<span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b11</span>)? <span class="vhdllogic">4&#39;b0001</span> :
<a name="l00981"></a>00981 (<span class="vhdlchar">size_i</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">2&#39;b0</span>)? <span class="vhdllogic">4&#39;b1100</span> :
<a name="l00982"></a>00982 (<span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b0</span> &amp;&amp; <span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">2&#39;b1</span>)? <span class="vhdllogic">4&#39;b0011</span> :
<a name="l00983"></a>00983 <span class="vhdllogic">4&#39;b1111</span>;
<a name="l00984"></a>00984 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l00985"></a>00985
<a name="l00986"></a>00986 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">read_modify_write_i</span> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l00987"></a>00987 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00988"></a>00988 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00989"></a>00989 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l00990"></a>00990 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
<a name="l00991"></a>00991 <span class="vhdlkeyword">end</span>
<a name="l00992"></a>00992 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l00993"></a>00993 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00994"></a>00994 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l00995"></a>00995 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00996"></a>00996 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a9c7e8a6d030ee1f404d7526ebda509ca">CTI_INCR_CYCLE</a>;
<a name="l00997"></a>00997 <span class="vhdlkeyword">end</span>
<a name="l00998"></a>00998 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l00999"></a>00999 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01000"></a>01000 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01001"></a>01001 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01002"></a>01002 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
<a name="l01003"></a>01003 <span class="vhdlkeyword">end</span>
<a name="l01004"></a>01004
<a name="l01005"></a>01005 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#af752b2515eb632068e26865f1569598c">S_READ_1</a>;
<a name="l01006"></a>01006 <span class="vhdlkeyword">end</span>
<a name="l01007"></a>01007 <span class="vhdlkeyword">end</span>
<a name="l01008"></a>01008 <span class="keyword">// write</span>
<a name="l01009"></a>01009 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_write_i</span> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01010"></a>01010 <a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01011"></a>01011 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">supervisor_i</span> == <span class="vhdllogic">1&#39;b1</span>) <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a> &lt;= <a class="code" href="classbus__control.html#a6cb25547c77c5085562bd0ace17d08a4">FC_SUPERVISOR_DATA</a>;
<a name="l01012"></a>01012 <span class="vhdlkeyword">else</span> <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a> &lt;= <a class="code" href="classbus__control.html#abd13c1b70988aa3f59e1d9cc23e62eb2">FC_USER_DATA</a>;
<a name="l01013"></a>01013
<a name="l01014"></a>01014 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span> <span class="keyword">// WORD or LONG WORD</span>
<a name="l01015"></a>01015 <span class="vhdlchar">fault_address_state_o</span> &lt;= <span class="vhdlchar">address_i</span>;
<a name="l01016"></a>01016 <span class="vhdlchar">rw_state_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01017"></a>01017 <span class="vhdlchar">fc_state_o</span> &lt;= (<span class="vhdlchar">supervisor_i</span> == <span class="vhdllogic">1&#39;b1</span>) ? <a class="code" href="classbus__control.html#a6cb25547c77c5085562bd0ace17d08a4">FC_SUPERVISOR_DATA</a> : <a class="code" href="classbus__control.html#abd13c1b70988aa3f59e1d9cc23e62eb2">FC_USER_DATA</a>;
<a name="l01018"></a>01018 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <a class="code" href="classbus__control.html#a16c432fa4a9897426aab6df04ee608e0">VECTOR_ADDRESS_TRAP</a>;
<a name="l01019"></a>01019
<a name="l01020"></a>01020 <span class="vhdlchar">jmp_address_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01021"></a>01021 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01022"></a>01022 <span class="vhdlkeyword">end</span>
<a name="l01023"></a>01023 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01024"></a>01024 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01025"></a>01025 <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> &lt;= <span class="vhdlchar">address_i</span>[<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>];
<a name="l01026"></a>01026 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01027"></a>01027
<a name="l01028"></a>01028 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01029"></a>01029 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> &lt;= { <span class="vhdllogic">16&#39;b0</span>, <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">31</span>:<span class="vhdllogic">16</span>] };
<a name="l01030"></a>01030 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b0011</span>;
<a name="l01031"></a>01031 <span class="vhdlkeyword">end</span>
<a name="l01032"></a>01032 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b00</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01033"></a>01033 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> &lt;= <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l01034"></a>01034 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b1111</span>;
<a name="l01035"></a>01035 <span class="vhdlkeyword">end</span>
<a name="l01036"></a>01036 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01037"></a>01037 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> &lt;= { <span class="vhdllogic">16&#39;b0</span>, <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] };
<a name="l01038"></a>01038 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b0011</span>;
<a name="l01039"></a>01039 <span class="vhdlkeyword">end</span>
<a name="l01040"></a>01040 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b00</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01041"></a>01041 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> &lt;= { <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">16&#39;b0</span> };
<a name="l01042"></a>01042 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b1100</span>;
<a name="l01043"></a>01043 <span class="vhdlkeyword">end</span>
<a name="l01044"></a>01044 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01045"></a>01045 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> &lt;= { <span class="vhdllogic">24&#39;b0</span>, <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] };
<a name="l01046"></a>01046 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b0001</span>;
<a name="l01047"></a>01047 <span class="vhdlkeyword">end</span>
<a name="l01048"></a>01048 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01049"></a>01049 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> &lt;= { <span class="vhdllogic">16&#39;b0</span>, <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">8&#39;b0</span> };
<a name="l01050"></a>01050 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b0010</span>;
<a name="l01051"></a>01051 <span class="vhdlkeyword">end</span>
<a name="l01052"></a>01052 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b01</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01053"></a>01053 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> &lt;= { <span class="vhdllogic">8&#39;b0</span>, <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">16&#39;b0</span> };
<a name="l01054"></a>01054 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b0100</span>;
<a name="l01055"></a>01055 <span class="vhdlkeyword">end</span>
<a name="l01056"></a>01056 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b00</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01057"></a>01057 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> &lt;= { <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">24&#39;b0</span> };
<a name="l01058"></a>01058 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b1000</span>;
<a name="l01059"></a>01059 <span class="vhdlkeyword">end</span>
<a name="l01060"></a>01060
<a name="l01061"></a>01061 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">read_modify_write_i</span> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01062"></a>01062 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01063"></a>01063 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01064"></a>01064 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01065"></a>01065 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
<a name="l01066"></a>01066 <span class="vhdlkeyword">end</span>
<a name="l01067"></a>01067 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01068"></a>01068 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01069"></a>01069 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01070"></a>01070 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01071"></a>01071 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a9c7e8a6d030ee1f404d7526ebda509ca">CTI_INCR_CYCLE</a>;
<a name="l01072"></a>01072 <span class="vhdlkeyword">end</span>
<a name="l01073"></a>01073 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01074"></a>01074 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01075"></a>01075 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01076"></a>01076 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01077"></a>01077 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
<a name="l01078"></a>01078 <span class="vhdlkeyword">end</span>
<a name="l01079"></a>01079
<a name="l01080"></a>01080 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#aad6d7bc2df8264837b68548b4045a54b">S_WRITE_1</a>;
<a name="l01081"></a>01081 <span class="vhdlkeyword">end</span>
<a name="l01082"></a>01082 <span class="vhdlkeyword">end</span>
<a name="l01083"></a>01083 <span class="keyword">// pc</span>
<a name="l01084"></a>01084 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">prefetch_ir_valid_o</span> == <span class="vhdllogic">1&#39;b0</span> || <span class="vhdlchar">pc_change_i</span> != <span class="vhdllogic">2&#39;b00</span>) <span class="vhdlkeyword">begin</span>
<a name="l01085"></a>01085
<a name="l01086"></a>01086 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">prefetch_ir_valid_o</span> == <span class="vhdllogic">1&#39;b0</span> || <span class="vhdlchar">pc_change_i</span> == <span class="vhdllogic">2&#39;b10</span> || <span class="vhdlchar">pc_change_i</span> == <span class="vhdllogic">2&#39;b11</span>) <span class="vhdlkeyword">begin</span>
<a name="l01087"></a>01087 <span class="keyword">// load 4 words: [79:16] in 2,3 cycles</span>
<a name="l01088"></a>01088 <span class="vhdlchar">prefetch_ir_valid_32_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01089"></a>01089 <span class="vhdlchar">prefetch_ir_valid_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01090"></a>01090 <span class="vhdlchar">prefetch_ir_valid_80_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01091"></a>01091
<a name="l01092"></a>01092 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#abc89f2549e5275c60648fc9a94876e29">S_PC_0</a>;
<a name="l01093"></a>01093 <span class="vhdlkeyword">end</span>
<a name="l01094"></a>01094 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">prefetch_ir_valid_80_o</span> == <span class="vhdllogic">1&#39;b0</span> &amp;&amp; <span class="vhdlchar">pc_change_i</span> == <span class="vhdllogic">2&#39;b01</span>) <span class="vhdlkeyword">begin</span>
<a name="l01095"></a>01095 <span class="keyword">// load 2 words: [31:0] in 1 cycle</span>
<a name="l01096"></a>01096 <span class="vhdlchar">prefetch_ir_valid_32_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01097"></a>01097 <span class="vhdlchar">prefetch_ir_valid_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01098"></a>01098 <span class="vhdlchar">prefetch_ir_valid_80_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01099"></a>01099
<a name="l01100"></a>01100 <span class="vhdlchar">prefetch_ir_o</span> &lt;= { <span class="vhdlchar">prefetch_ir_o</span>[<span class="vhdllogic">63</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">16&#39;b0</span> };
<a name="l01101"></a>01101 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#abc89f2549e5275c60648fc9a94876e29">S_PC_0</a>;
<a name="l01102"></a>01102 <span class="vhdlkeyword">end</span>
<a name="l01103"></a>01103 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01104"></a>01104 <span class="keyword">// do not load any words</span>
<a name="l01105"></a>01105 <span class="vhdlchar">prefetch_ir_valid_32_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01106"></a>01106 <span class="vhdlchar">prefetch_ir_valid_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01107"></a>01107 <span class="vhdlchar">prefetch_ir_valid_80_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01108"></a>01108
<a name="l01109"></a>01109 <span class="vhdlchar">prefetch_ir_o</span> &lt;= { <span class="vhdlchar">prefetch_ir_o</span>[<span class="vhdllogic">63</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">16&#39;b0</span> };
<a name="l01110"></a>01110 <span class="vhdlkeyword">end</span>
<a name="l01111"></a>01111
<a name="l00735"></a>00735
<a name="l00758"></a><a class="code" href="classbus__control.html">00758</a> <span class="vhdlkeyword">module</span> <a class="code" href="classao68000.html#a2c34e1b84d9fe30c49c5c814be3dc392">bus_control</a>(
<a name="l00759"></a>00759 <span class="keyword">//******************************************* external</span>
<a name="l00760"></a>00760 <span class="keyword">//****************** WISHBONE</span>
<a name="l00761"></a><a class="code" href="classbus__control.html#a4054e75175a8d9a78f2e34150e1c0465">00761</a> <span class="vhdlkeyword">input</span> <a class="code" href="classbus__control.html#a4054e75175a8d9a78f2e34150e1c0465">CLK_I</a>,
<a name="l00762"></a><a class="code" href="classbus__control.html#a7c0d04a169a341f11af2b012abd481b3">00762</a> <span class="vhdlkeyword">input</span> <a class="code" href="classbus__control.html#a7c0d04a169a341f11af2b012abd481b3">reset_n</a>,
<a name="l00763"></a>00763
<a name="l00764"></a><a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">00764</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a>,
<a name="l00765"></a><a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">00765</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>] <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a>,
<a name="l00766"></a><a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">00766</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a>,
<a name="l00767"></a><a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">00767</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>,
<a name="l00768"></a><a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">00768</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a>,
<a name="l00769"></a><a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">00769</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a>,
<a name="l00770"></a><a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">00770</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> <a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a>,
<a name="l00771"></a>00771
<a name="l00772"></a><a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">00772</a> <span class="vhdlkeyword">input</span> <a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ACK_I</a>,
<a name="l00773"></a><a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">00773</a> <span class="vhdlkeyword">input</span> <a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ERR_I</a>,
<a name="l00774"></a><a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">00774</a> <span class="vhdlkeyword">input</span> <a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">RTY_I</a>,
<a name="l00775"></a>00775
<a name="l00776"></a>00776 <span class="keyword">// TAG_TYPE: TGC_O</span>
<a name="l00777"></a><a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">00777</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a>,
<a name="l00778"></a><a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">00778</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a>,
<a name="l00779"></a><a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">00779</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a>,
<a name="l00780"></a>00780
<a name="l00781"></a>00781 <span class="keyword">// TAG_TYPE: TGA_O</span>
<a name="l00782"></a><a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">00782</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a>,
<a name="l00783"></a><a class="code" href="classbus__control.html#a1dd14b92bd4443311024f3a3fa6e0c8d">00783</a> <span class="vhdlkeyword">output</span> [<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] <a class="code" href="classbus__control.html#a1dd14b92bd4443311024f3a3fa6e0c8d">BTE_O</a>,
<a name="l00784"></a>00784
<a name="l00785"></a>00785 <span class="keyword">// TAG_TYPE: TGC_O</span>
<a name="l00786"></a><a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">00786</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a>,
<a name="l00787"></a>00787
<a name="l00788"></a>00788 <span class="keyword">//****************** OTHER</span>
<a name="l00789"></a><a class="code" href="classbus__control.html#a93ed536c4b75b18958ffa28838ae5957">00789</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classbus__control.html#a93ed536c4b75b18958ffa28838ae5957">ipl_i</a>,
<a name="l00790"></a><a class="code" href="classbus__control.html#a139d4b4c2d79d749375db4dd71f3a9fd">00790</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> <a class="code" href="classbus__control.html#a139d4b4c2d79d749375db4dd71f3a9fd">reset_o</a> = <span class="vhdllogic">1&#39;b0</span>,
<a name="l00791"></a>00791 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> blocked_o = <span class="vhdllogic">1&#39;b0</span>,
<a name="l00792"></a>00792
<a name="l00793"></a>00793 <span class="keyword">//******************************************* internal</span>
<a name="l00794"></a>00794 <span class="vhdlkeyword">input</span> supervisor_i,
<a name="l00795"></a>00795 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] ipm_i,
<a name="l00796"></a>00796 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] size_i,
<a name="l00797"></a>00797 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] address_i,
<a name="l00798"></a>00798 <span class="vhdlkeyword">input</span> address_type_i,
<a name="l00799"></a>00799 <span class="vhdlkeyword">input</span> read_modify_write_i,
<a name="l00800"></a>00800 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] data_write_i,
<a name="l00801"></a>00801 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] data_read_o,
<a name="l00802"></a>00802
<a name="l00803"></a>00803 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] pc_i,
<a name="l00804"></a>00804 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] pc_change_i,
<a name="l00805"></a>00805 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">79</span>:<span class="vhdllogic">0</span>] prefetch_ir_o,
<a name="l00806"></a>00806 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> prefetch_ir_valid_32_o = <span class="vhdllogic">1&#39;b0</span>,
<a name="l00807"></a>00807 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> prefetch_ir_valid_o = <span class="vhdllogic">1&#39;b0</span>,
<a name="l00808"></a>00808 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> prefetch_ir_valid_80_o = <span class="vhdllogic">1&#39;b0</span>,
<a name="l00809"></a>00809
<a name="l00810"></a>00810 <span class="vhdlkeyword">input</span> do_reset_i,
<a name="l00811"></a>00811 <span class="vhdlkeyword">input</span> do_blocked_i,
<a name="l00812"></a>00812 <span class="vhdlkeyword">input</span> do_read_i,
<a name="l00813"></a>00813 <span class="vhdlkeyword">input</span> do_write_i,
<a name="l00814"></a>00814 <span class="vhdlkeyword">input</span> do_interrupt_i,
<a name="l00815"></a>00815
<a name="l00816"></a>00816 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> jmp_address_trap_o = <span class="vhdllogic">1&#39;b0</span>,
<a name="l00817"></a>00817 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> jmp_bus_trap_o = <span class="vhdllogic">1&#39;b0</span>,
<a name="l00818"></a>00818 <span class="keyword">// read/write/interrupt</span>
<a name="l00819"></a>00819 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> finished_o,
<a name="l00820"></a>00820
<a name="l00821"></a>00821 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] interrupt_trap_o = <span class="vhdllogic">8&#39;b0</span>,
<a name="l00822"></a>00822 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] interrupt_mask_o = <span class="vhdllogic">3&#39;b0</span>,
<a name="l00823"></a>00823
<a name="l00824"></a>00824 <span class="keyword">/* mask==0 &amp;&amp; trap==0 nothing</span>
<a name="l00825"></a>00825 <span class="keyword"> mask!=0 interrupt with spurious interrupt</span>
<a name="l00826"></a>00826 <span class="keyword"> */</span>
<a name="l00827"></a>00827
<a name="l00828"></a>00828 <span class="keyword">// write = 0/read = 1</span>
<a name="l00829"></a>00829 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> rw_state_o,
<a name="l00830"></a>00830 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] fc_state_o,
<a name="l00831"></a>00831 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] fault_address_state_o
<a name="l00832"></a>00832 );
<a name="l00833"></a>00833
<a name="l00834"></a>00834 <span class="vhdlkeyword">assign</span> <a class="code" href="classbus__control.html#a1dd14b92bd4443311024f3a3fa6e0c8d">BTE_O</a> = <span class="vhdllogic">2&#39;b00</span>;
<a name="l00835"></a>00835
<a name="l00836"></a><a class="code" href="classbus__control.html#a96afbad4fe8073f7c58baf255b66c944">00836</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classbus__control.html#a96afbad4fe8073f7c58baf255b66c944">pc_i_plus_6</a>;
<a name="l00837"></a>00837 <span class="vhdlkeyword">assign</span> <a class="code" href="classbus__control.html#a96afbad4fe8073f7c58baf255b66c944">pc_i_plus_6</a> = <span class="vhdlchar">pc_i</span> + <span class="vhdllogic">32&#39;d6</span>;
<a name="l00838"></a><a class="code" href="classbus__control.html#addb6490ae2acff8c93b321b1e14c7bd4">00838</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classbus__control.html#addb6490ae2acff8c93b321b1e14c7bd4">pc_i_plus_4</a>;
<a name="l00839"></a>00839 <span class="vhdlkeyword">assign</span> <a class="code" href="classbus__control.html#addb6490ae2acff8c93b321b1e14c7bd4">pc_i_plus_4</a> = <span class="vhdlchar">pc_i</span> + <span class="vhdllogic">32&#39;d4</span>;
<a name="l00840"></a>00840
<a name="l00841"></a><a class="code" href="classbus__control.html#a2997069937ed71fba6eefb8837ba3282">00841</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classbus__control.html#a2997069937ed71fba6eefb8837ba3282">address_i_plus_4</a>;
<a name="l00842"></a>00842 <span class="vhdlkeyword">assign</span> <a class="code" href="classbus__control.html#a2997069937ed71fba6eefb8837ba3282">address_i_plus_4</a> = <span class="vhdlchar">address_i</span> + <span class="vhdllogic">32&#39;d4</span>;
<a name="l00843"></a>00843
<a name="l00844"></a><a class="code" href="classbus__control.html#a9d1ac811b477c31c0d6aec541dca418d">00844</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] <a class="code" href="classbus__control.html#a9d1ac811b477c31c0d6aec541dca418d">saved_pc_change</a> = <span class="vhdllogic">2&#39;b00</span>;
<a name="l00845"></a>00845
<a name="l00846"></a><a class="code" href="classbus__control.html#a1c803cc4a4f514cd4027a798d9236e5e">00846</a> <span class="vhdlkeyword">parameter</span> [<span class="vhdllogic">4</span>:<span class="vhdllogic">0</span>]
<a name="l00847"></a>00847 <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a> = <span class="vhdllogic">5&#39;d0</span>,
<a name="l00848"></a>00848 <a class="code" href="classbus__control.html#a8e24d83b04e325557b534b6fbe3c06ca">S_RESET</a> = <span class="vhdllogic">5&#39;d1</span>,
<a name="l00849"></a>00849 <a class="code" href="classbus__control.html#a2545a07988315cbf68e808af80333335">S_BLOCKED</a> = <span class="vhdllogic">5&#39;d2</span>,
<a name="l00850"></a>00850 <a class="code" href="classbus__control.html#a8ff92de377aefca42782778cda7132f3">S_INT_1</a> = <span class="vhdllogic">5&#39;d3</span>,
<a name="l00851"></a>00851 <a class="code" href="classbus__control.html#af752b2515eb632068e26865f1569598c">S_READ_1</a> = <span class="vhdllogic">5&#39;d4</span>,
<a name="l00852"></a>00852 <a class="code" href="classbus__control.html#a269161b7fabba2e00d3a3a5153a9620e">S_READ_2</a> = <span class="vhdllogic">5&#39;d5</span>,
<a name="l00853"></a>00853 <a class="code" href="classbus__control.html#a8af7b5fb8c5d5d3788e5af5dad48393b">S_READ_3</a> = <span class="vhdllogic">5&#39;d6</span>,
<a name="l00854"></a>00854 <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a> = <span class="vhdllogic">5&#39;d7</span>,
<a name="l00855"></a>00855 <a class="code" href="classbus__control.html#aad6d7bc2df8264837b68548b4045a54b">S_WRITE_1</a> = <span class="vhdllogic">5&#39;d8</span>,
<a name="l00856"></a>00856 <a class="code" href="classbus__control.html#a1f273f6cbe8fa88c5ac793cdb16128c5">S_WRITE_2</a> = <span class="vhdllogic">5&#39;d9</span>,
<a name="l00857"></a>00857 <a class="code" href="classbus__control.html#aa913a2abc1c8f2afa2bb8f6ebcbbca01">S_WRITE_3</a> = <span class="vhdllogic">5&#39;d10</span>,
<a name="l00858"></a>00858 <a class="code" href="classbus__control.html#abc89f2549e5275c60648fc9a94876e29">S_PC_0</a> = <span class="vhdllogic">5&#39;d11</span>,
<a name="l00859"></a>00859 <a class="code" href="classbus__control.html#a729095d9bb813c82aee565216b092f38">S_PC_1</a> = <span class="vhdllogic">5&#39;d12</span>,
<a name="l00860"></a>00860 <a class="code" href="classbus__control.html#aaa3088e2e223cdc5551d535c3739cad5">S_PC_2</a> = <span class="vhdllogic">5&#39;d13</span>,
<a name="l00861"></a>00861 <a class="code" href="classbus__control.html#a28895ce8a15bd607103ea20914434342">S_PC_3</a> = <span class="vhdllogic">5&#39;d14</span>,
<a name="l00862"></a>00862 <a class="code" href="classbus__control.html#a5e72ed7bc2e7991094fecd272775f92c">S_PC_4</a> = <span class="vhdllogic">5&#39;d15</span>,
<a name="l00863"></a>00863 <a class="code" href="classbus__control.html#aa19b7d76f1e25fd78b158b98088bd82a">S_PC_5</a> = <span class="vhdllogic">5&#39;d16</span>,
<a name="l00864"></a>00864 <a class="code" href="classbus__control.html#a1c803cc4a4f514cd4027a798d9236e5e">S_PC_6</a> = <span class="vhdllogic">5&#39;d17</span>;
<a name="l00865"></a>00865
<a name="l00866"></a><a class="code" href="classbus__control.html#ac44cb27522dcf872ea1f1d63cb652d9b">00866</a> <span class="vhdlkeyword">parameter</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>]
<a name="l00867"></a>00867 <a class="code" href="classbus__control.html#abd13c1b70988aa3f59e1d9cc23e62eb2">FC_USER_DATA</a> = <span class="vhdllogic">3&#39;d1</span>,
<a name="l00868"></a>00868 <a class="code" href="classbus__control.html#a80b93f8634a7f03a199836a78c52d9bb">FC_USER_PROGRAM</a> = <span class="vhdllogic">3&#39;d2</span>,
<a name="l00869"></a>00869 <a class="code" href="classbus__control.html#a6cb25547c77c5085562bd0ace17d08a4">FC_SUPERVISOR_DATA</a> = <span class="vhdllogic">3&#39;d5</span>, <span class="keyword">// all exception vector entries except reset</span>
<a name="l00870"></a>00870 <a class="code" href="classbus__control.html#a1dc6742718597d6e0ef98e8200bb49bf">FC_SUPERVISOR_PROGRAM</a> = <span class="vhdllogic">3&#39;d6</span>, <span class="keyword">// exception vector for reset</span>
<a name="l00871"></a>00871 <a class="code" href="classbus__control.html#ac44cb27522dcf872ea1f1d63cb652d9b">FC_CPU_SPACE</a> = <span class="vhdllogic">3&#39;d7</span>; <span class="keyword">// interrupt acknowlege bus cycle</span>
<a name="l00872"></a>00872
<a name="l00873"></a><a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">00873</a> <span class="vhdlkeyword">parameter</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>]
<a name="l00874"></a>00874 <a class="code" href="classbus__control.html#ad836a90bd600a96241bed00462efaa7f">CTI_CLASSIC_CYCLE</a> = <span class="vhdllogic">3&#39;d0</span>,
<a name="l00875"></a>00875 <a class="code" href="classbus__control.html#a4780c76f8764756e9ca6bc92a016fe8c">CTI_CONST_CYCLE</a> = <span class="vhdllogic">3&#39;d1</span>,
<a name="l00876"></a>00876 <a class="code" href="classbus__control.html#a9c7e8a6d030ee1f404d7526ebda509ca">CTI_INCR_CYCLE</a> = <span class="vhdllogic">3&#39;d2</span>,
<a name="l00877"></a>00877 <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a> = <span class="vhdllogic">3&#39;d7</span>;
<a name="l00878"></a>00878
<a name="l00879"></a><a class="code" href="classbus__control.html#a16c432fa4a9897426aab6df04ee608e0">00879</a> <span class="vhdlkeyword">parameter</span> [<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>]
<a name="l00880"></a>00880 <a class="code" href="classbus__control.html#a63d428a3abed8bfe070ad6e6f82ca72e">VECTOR_BUS_TRAP</a> = <span class="vhdllogic">8&#39;d2</span>,
<a name="l00881"></a>00881 <a class="code" href="classbus__control.html#a16c432fa4a9897426aab6df04ee608e0">VECTOR_ADDRESS_TRAP</a> = <span class="vhdllogic">8&#39;d3</span>;
<a name="l00882"></a>00882
<a name="l00883"></a><a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">00883</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">4</span>:<span class="vhdllogic">0</span>] <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a>;
<a name="l00884"></a><a class="code" href="classbus__control.html#af4b71c6c152246795fcfed45e67bab33">00884</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] <a class="code" href="classbus__control.html#af4b71c6c152246795fcfed45e67bab33">reset_counter</a>;
<a name="l00885"></a>00885
<a name="l00886"></a><a class="code" href="classbus__control.html#a18d43f989323778008d066233ddaa191">00886</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classbus__control.html#a18d43f989323778008d066233ddaa191">last_interrupt_mask</a>;
<a name="l00887"></a><a class="code" href="classbus__control.html#ad06cdf24c29b1b82596011bac2c9169c">00887</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classbus__control.html#a4054e75175a8d9a78f2e34150e1c0465">CLK_I</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classbus__control.html#a7c0d04a169a341f11af2b012abd481b3">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l00888"></a>00888 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#a7c0d04a169a341f11af2b012abd481b3">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>
<a name="l00889"></a>00889 <span class="vhdlchar">interrupt_mask_o</span> &lt;= <span class="vhdllogic">3&#39;b000</span>;
<a name="l00890"></a>00890 <a class="code" href="classbus__control.html#a18d43f989323778008d066233ddaa191">last_interrupt_mask</a> &lt;= <span class="vhdllogic">3&#39;b000</span>;
<a name="l00891"></a>00891 <span class="vhdlkeyword">end</span>
<a name="l00892"></a>00892 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#a93ed536c4b75b18958ffa28838ae5957">ipl_i</a> &gt; <span class="vhdlchar">ipm_i</span> &amp;&amp; <span class="vhdlchar">do_interrupt_i</span> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>
<a name="l00893"></a>00893 <span class="vhdlchar">interrupt_mask_o</span> &lt;= <a class="code" href="classbus__control.html#a93ed536c4b75b18958ffa28838ae5957">ipl_i</a>;
<a name="l00894"></a>00894 <a class="code" href="classbus__control.html#a18d43f989323778008d066233ddaa191">last_interrupt_mask</a> &lt;= <span class="vhdlchar">interrupt_mask_o</span>;
<a name="l00895"></a>00895 <span class="vhdlkeyword">end</span>
<a name="l00896"></a>00896 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_interrupt_i</span> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l00897"></a>00897 <span class="vhdlchar">interrupt_mask_o</span> &lt;= <a class="code" href="classbus__control.html#a18d43f989323778008d066233ddaa191">last_interrupt_mask</a>;
<a name="l00898"></a>00898 <span class="vhdlkeyword">end</span>
<a name="l00899"></a>00899 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l00900"></a>00900 <span class="vhdlchar">interrupt_mask_o</span> &lt;= <span class="vhdllogic">3&#39;b000</span>;
<a name="l00901"></a>00901 <a class="code" href="classbus__control.html#a18d43f989323778008d066233ddaa191">last_interrupt_mask</a> &lt;= <span class="vhdllogic">3&#39;b000</span>;
<a name="l00902"></a>00902 <span class="vhdlkeyword">end</span>
<a name="l00903"></a>00903 <span class="vhdlkeyword">end</span>
<a name="l00904"></a>00904
<a name="l00905"></a>00905 <span class="keyword">// change pc_i in middle of prefetch operation: undefined</span>
<a name="l00906"></a>00906
<a name="l00907"></a><a class="code" href="classbus__control.html#af34450e53e6fd2fd36db7dff17caf063">00907</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classbus__control.html#a4054e75175a8d9a78f2e34150e1c0465">CLK_I</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classbus__control.html#a7c0d04a169a341f11af2b012abd481b3">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l00908"></a>00908 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#a7c0d04a169a341f11af2b012abd481b3">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>
<a name="l00909"></a>00909 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>;
<a name="l00910"></a>00910 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <span class="vhdllogic">8&#39;d0</span>;
<a name="l00911"></a>00911 <span class="vhdlchar">prefetch_ir_valid_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00912"></a>00912 <span class="vhdlchar">prefetch_ir_valid_32_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00913"></a>00913 <span class="vhdlchar">prefetch_ir_valid_80_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00914"></a>00914
<a name="l00915"></a>00915 <span class="vhdlchar">jmp_address_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00916"></a>00916 <span class="vhdlchar">jmp_bus_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00917"></a>00917
<a name="l00918"></a>00918 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00919"></a>00919 <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> &lt;= <span class="vhdllogic">30&#39;d0</span>;
<a name="l00920"></a>00920 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> &lt;= <span class="vhdllogic">32&#39;d0</span>;
<a name="l00921"></a>00921 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b0</span>;
<a name="l00922"></a>00922 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00923"></a>00923 <a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00924"></a>00924 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00925"></a>00925 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00926"></a>00926 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00927"></a>00927 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <span class="vhdllogic">3&#39;d0</span>;
<a name="l00928"></a>00928 <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a> &lt;= <span class="vhdllogic">3&#39;d0</span>;
<a name="l00929"></a>00929 <a class="code" href="classbus__control.html#a139d4b4c2d79d749375db4dd71f3a9fd">reset_o</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00930"></a>00930 <span class="vhdlchar">blocked_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00931"></a>00931 <span class="vhdlchar">data_read_o</span> &lt;= <span class="vhdllogic">32&#39;d0</span>;
<a name="l00932"></a>00932 <span class="vhdlchar">finished_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00933"></a>00933 <span class="vhdlchar">rw_state_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00934"></a>00934 <span class="vhdlchar">fc_state_o</span> &lt;= <span class="vhdllogic">3&#39;d0</span>;
<a name="l00935"></a>00935 <span class="vhdlchar">fault_address_state_o</span> &lt;= <span class="vhdllogic">32&#39;d0</span>;
<a name="l00936"></a>00936 <a class="code" href="classbus__control.html#a9d1ac811b477c31c0d6aec541dca418d">saved_pc_change</a> &lt;= <span class="vhdllogic">2&#39;b0</span>;
<a name="l00937"></a>00937 <a class="code" href="classbus__control.html#af4b71c6c152246795fcfed45e67bab33">reset_counter</a> &lt;= <span class="vhdllogic">8&#39;d0</span>;
<a name="l00938"></a>00938 <span class="vhdlkeyword">end</span>
<a name="l00939"></a>00939 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l00940"></a>00940 <span class="vhdlkeyword">case</span>(<a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a>)
<a name="l00941"></a>00941 <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>: <span class="vhdlkeyword">begin</span>
<a name="l00942"></a>00942 <span class="vhdlchar">finished_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00943"></a>00943 <span class="vhdlchar">jmp_address_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00944"></a>00944 <span class="vhdlchar">jmp_bus_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00945"></a>00945 <a class="code" href="classbus__control.html#a139d4b4c2d79d749375db4dd71f3a9fd">reset_o</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00946"></a>00946 <span class="vhdlchar">blocked_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00947"></a>00947
<a name="l00948"></a>00948 <span class="keyword">// block</span>
<a name="l00949"></a>00949 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_blocked_i</span> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l00950"></a>00950 <span class="vhdlchar">blocked_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l00951"></a>00951 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a2545a07988315cbf68e808af80333335">S_BLOCKED</a>;
<a name="l00952"></a>00952 <span class="vhdlkeyword">end</span>
<a name="l00953"></a>00953 <span class="keyword">// reset</span>
<a name="l00954"></a>00954 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_reset_i</span> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l00955"></a>00955 <a class="code" href="classbus__control.html#a139d4b4c2d79d749375db4dd71f3a9fd">reset_o</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l00956"></a>00956 <a class="code" href="classbus__control.html#af4b71c6c152246795fcfed45e67bab33">reset_counter</a> &lt;= <span class="vhdllogic">8&#39;d124</span>;
<a name="l00957"></a>00957 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a8e24d83b04e325557b534b6fbe3c06ca">S_RESET</a>;
<a name="l00958"></a>00958 <span class="vhdlkeyword">end</span>
<a name="l00959"></a>00959 <span class="keyword">// read</span>
<a name="l00960"></a>00960 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_read_i</span> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l00961"></a>00961 <a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00962"></a>00962 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">supervisor_i</span> == <span class="vhdllogic">1&#39;b1</span>) <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a> &lt;= (<span class="vhdlchar">address_type_i</span> == <span class="vhdllogic">1&#39;b0</span>) ? <a class="code" href="classbus__control.html#a6cb25547c77c5085562bd0ace17d08a4">FC_SUPERVISOR_DATA</a> : <a class="code" href="classbus__control.html#a1dc6742718597d6e0ef98e8200bb49bf">FC_SUPERVISOR_PROGRAM</a>;
<a name="l00963"></a>00963 <span class="vhdlkeyword">else</span> <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a> &lt;= (<span class="vhdlchar">address_type_i</span> == <span class="vhdllogic">1&#39;b0</span>) ? <a class="code" href="classbus__control.html#abd13c1b70988aa3f59e1d9cc23e62eb2">FC_USER_DATA</a> : <a class="code" href="classbus__control.html#a80b93f8634a7f03a199836a78c52d9bb">FC_USER_PROGRAM</a>;
<a name="l00964"></a>00964
<a name="l00965"></a>00965 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; (<span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b0</span>)) <span class="vhdlkeyword">begin</span> <span class="keyword">// WORD or LONG WORD</span>
<a name="l00966"></a>00966 <span class="vhdlchar">fault_address_state_o</span> &lt;= <span class="vhdlchar">address_i</span>;
<a name="l00967"></a>00967 <span class="vhdlchar">rw_state_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l00968"></a>00968 <span class="vhdlchar">fc_state_o</span> &lt;= (<span class="vhdlchar">supervisor_i</span> == <span class="vhdllogic">1&#39;b1</span>) ? ((<span class="vhdlchar">address_type_i</span> == <span class="vhdllogic">1&#39;b0</span>) ? <a class="code" href="classbus__control.html#a6cb25547c77c5085562bd0ace17d08a4">FC_SUPERVISOR_DATA</a> : <a class="code" href="classbus__control.html#a1dc6742718597d6e0ef98e8200bb49bf">FC_SUPERVISOR_PROGRAM</a>) :
<a name="l00969"></a>00969 ((<span class="vhdlchar">address_type_i</span> == <span class="vhdllogic">1&#39;b0</span>) ? <a class="code" href="classbus__control.html#abd13c1b70988aa3f59e1d9cc23e62eb2">FC_USER_DATA</a> : <a class="code" href="classbus__control.html#a80b93f8634a7f03a199836a78c52d9bb">FC_USER_PROGRAM</a>);
<a name="l00970"></a>00970 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <a class="code" href="classbus__control.html#a16c432fa4a9897426aab6df04ee608e0">VECTOR_ADDRESS_TRAP</a>;
<a name="l00971"></a>00971
<a name="l00972"></a>00972 <span class="vhdlchar">jmp_address_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l00973"></a>00973 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l00974"></a>00974 <span class="vhdlkeyword">end</span>
<a name="l00975"></a>00975 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l00976"></a>00976 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l00977"></a>00977 <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> &lt;= <span class="vhdlchar">address_i</span>[<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>];
<a name="l00978"></a>00978 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= (<span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b00</span>)? <span class="vhdllogic">4&#39;b1000</span> :
<a name="l00979"></a>00979 (<span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b01</span>)? <span class="vhdllogic">4&#39;b0100</span> :
<a name="l00980"></a>00980 (<span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span>)? <span class="vhdllogic">4&#39;b0010</span> :
<a name="l00981"></a>00981 (<span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b11</span>)? <span class="vhdllogic">4&#39;b0001</span> :
<a name="l00982"></a>00982 (<span class="vhdlchar">size_i</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">2&#39;b0</span>)? <span class="vhdllogic">4&#39;b1100</span> :
<a name="l00983"></a>00983 (<span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b0</span> &amp;&amp; <span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">2&#39;b1</span>)? <span class="vhdllogic">4&#39;b0011</span> :
<a name="l00984"></a>00984 <span class="vhdllogic">4&#39;b1111</span>;
<a name="l00985"></a>00985 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l00986"></a>00986
<a name="l00987"></a>00987 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">read_modify_write_i</span> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l00988"></a>00988 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00989"></a>00989 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00990"></a>00990 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l00991"></a>00991 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
<a name="l00992"></a>00992 <span class="vhdlkeyword">end</span>
<a name="l00993"></a>00993 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l00994"></a>00994 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00995"></a>00995 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l00996"></a>00996 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00997"></a>00997 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a9c7e8a6d030ee1f404d7526ebda509ca">CTI_INCR_CYCLE</a>;
<a name="l00998"></a>00998 <span class="vhdlkeyword">end</span>
<a name="l00999"></a>00999 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01000"></a>01000 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01001"></a>01001 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01002"></a>01002 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01003"></a>01003 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
<a name="l01004"></a>01004 <span class="vhdlkeyword">end</span>
<a name="l01005"></a>01005
<a name="l01006"></a>01006 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#af752b2515eb632068e26865f1569598c">S_READ_1</a>;
<a name="l01007"></a>01007 <span class="vhdlkeyword">end</span>
<a name="l01008"></a>01008 <span class="vhdlkeyword">end</span>
<a name="l01009"></a>01009 <span class="keyword">// write</span>
<a name="l01010"></a>01010 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_write_i</span> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01011"></a>01011 <a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01012"></a>01012 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">supervisor_i</span> == <span class="vhdllogic">1&#39;b1</span>) <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a> &lt;= <a class="code" href="classbus__control.html#a6cb25547c77c5085562bd0ace17d08a4">FC_SUPERVISOR_DATA</a>;
<a name="l01013"></a>01013 <span class="vhdlkeyword">else</span> <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a> &lt;= <a class="code" href="classbus__control.html#abd13c1b70988aa3f59e1d9cc23e62eb2">FC_USER_DATA</a>;
<a name="l01014"></a>01014
<a name="l01015"></a>01015 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span> <span class="keyword">// WORD or LONG WORD</span>
<a name="l01016"></a>01016 <span class="vhdlchar">fault_address_state_o</span> &lt;= <span class="vhdlchar">address_i</span>;
<a name="l01017"></a>01017 <span class="vhdlchar">rw_state_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01018"></a>01018 <span class="vhdlchar">fc_state_o</span> &lt;= (<span class="vhdlchar">supervisor_i</span> == <span class="vhdllogic">1&#39;b1</span>) ? <a class="code" href="classbus__control.html#a6cb25547c77c5085562bd0ace17d08a4">FC_SUPERVISOR_DATA</a> : <a class="code" href="classbus__control.html#abd13c1b70988aa3f59e1d9cc23e62eb2">FC_USER_DATA</a>;
<a name="l01019"></a>01019 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <a class="code" href="classbus__control.html#a16c432fa4a9897426aab6df04ee608e0">VECTOR_ADDRESS_TRAP</a>;
<a name="l01020"></a>01020
<a name="l01021"></a>01021 <span class="vhdlchar">jmp_address_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01022"></a>01022 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01023"></a>01023 <span class="vhdlkeyword">end</span>
<a name="l01024"></a>01024 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01025"></a>01025 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01026"></a>01026 <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> &lt;= <span class="vhdlchar">address_i</span>[<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>];
<a name="l01027"></a>01027 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01028"></a>01028
<a name="l01029"></a>01029 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01030"></a>01030 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> &lt;= { <span class="vhdllogic">16&#39;b0</span>, <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">31</span>:<span class="vhdllogic">16</span>] };
<a name="l01031"></a>01031 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b0011</span>;
<a name="l01032"></a>01032 <span class="vhdlkeyword">end</span>
<a name="l01033"></a>01033 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b00</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01034"></a>01034 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> &lt;= <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l01035"></a>01035 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b1111</span>;
<a name="l01036"></a>01036 <span class="vhdlkeyword">end</span>
<a name="l01037"></a>01037 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01038"></a>01038 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> &lt;= { <span class="vhdllogic">16&#39;b0</span>, <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] };
<a name="l01039"></a>01039 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b0011</span>;
<a name="l01040"></a>01040 <span class="vhdlkeyword">end</span>
<a name="l01041"></a>01041 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b00</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01042"></a>01042 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> &lt;= { <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">16&#39;b0</span> };
<a name="l01043"></a>01043 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b1100</span>;
<a name="l01044"></a>01044 <span class="vhdlkeyword">end</span>
<a name="l01045"></a>01045 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01046"></a>01046 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> &lt;= { <span class="vhdllogic">24&#39;b0</span>, <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] };
<a name="l01047"></a>01047 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b0001</span>;
<a name="l01048"></a>01048 <span class="vhdlkeyword">end</span>
<a name="l01049"></a>01049 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01050"></a>01050 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> &lt;= { <span class="vhdllogic">16&#39;b0</span>, <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">8&#39;b0</span> };
<a name="l01051"></a>01051 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b0010</span>;
<a name="l01052"></a>01052 <span class="vhdlkeyword">end</span>
<a name="l01053"></a>01053 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b01</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01054"></a>01054 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> &lt;= { <span class="vhdllogic">8&#39;b0</span>, <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">16&#39;b0</span> };
<a name="l01055"></a>01055 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b0100</span>;
<a name="l01056"></a>01056 <span class="vhdlkeyword">end</span>
<a name="l01057"></a>01057 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b00</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01058"></a>01058 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> &lt;= { <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">24&#39;b0</span> };
<a name="l01059"></a>01059 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b1000</span>;
<a name="l01060"></a>01060 <span class="vhdlkeyword">end</span>
<a name="l01061"></a>01061
<a name="l01062"></a>01062 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">read_modify_write_i</span> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01063"></a>01063 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01064"></a>01064 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01065"></a>01065 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01066"></a>01066 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
<a name="l01067"></a>01067 <span class="vhdlkeyword">end</span>
<a name="l01068"></a>01068 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01069"></a>01069 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01070"></a>01070 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01071"></a>01071 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01072"></a>01072 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a9c7e8a6d030ee1f404d7526ebda509ca">CTI_INCR_CYCLE</a>;
<a name="l01073"></a>01073 <span class="vhdlkeyword">end</span>
<a name="l01074"></a>01074 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01075"></a>01075 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01076"></a>01076 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01077"></a>01077 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01078"></a>01078 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
<a name="l01079"></a>01079 <span class="vhdlkeyword">end</span>
<a name="l01080"></a>01080
<a name="l01081"></a>01081 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#aad6d7bc2df8264837b68548b4045a54b">S_WRITE_1</a>;
<a name="l01082"></a>01082 <span class="vhdlkeyword">end</span>
<a name="l01083"></a>01083 <span class="vhdlkeyword">end</span>
<a name="l01084"></a>01084 <span class="keyword">// pc</span>
<a name="l01085"></a>01085 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">prefetch_ir_valid_o</span> == <span class="vhdllogic">1&#39;b0</span> || <span class="vhdlchar">pc_change_i</span> != <span class="vhdllogic">2&#39;b00</span>) <span class="vhdlkeyword">begin</span>
<a name="l01086"></a>01086
<a name="l01087"></a>01087 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">prefetch_ir_valid_o</span> == <span class="vhdllogic">1&#39;b0</span> || <span class="vhdlchar">pc_change_i</span> == <span class="vhdllogic">2&#39;b10</span> || <span class="vhdlchar">pc_change_i</span> == <span class="vhdllogic">2&#39;b11</span>) <span class="vhdlkeyword">begin</span>
<a name="l01088"></a>01088 <span class="keyword">// load 4 words: [79:16] in 2,3 cycles</span>
<a name="l01089"></a>01089 <span class="vhdlchar">prefetch_ir_valid_32_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01090"></a>01090 <span class="vhdlchar">prefetch_ir_valid_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01091"></a>01091 <span class="vhdlchar">prefetch_ir_valid_80_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01092"></a>01092
<a name="l01093"></a>01093 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#abc89f2549e5275c60648fc9a94876e29">S_PC_0</a>;
<a name="l01094"></a>01094 <span class="vhdlkeyword">end</span>
<a name="l01095"></a>01095 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">prefetch_ir_valid_80_o</span> == <span class="vhdllogic">1&#39;b0</span> &amp;&amp; <span class="vhdlchar">pc_change_i</span> == <span class="vhdllogic">2&#39;b01</span>) <span class="vhdlkeyword">begin</span>
<a name="l01096"></a>01096 <span class="keyword">// load 2 words: [31:0] in 1 cycle</span>
<a name="l01097"></a>01097 <span class="vhdlchar">prefetch_ir_valid_32_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01098"></a>01098 <span class="vhdlchar">prefetch_ir_valid_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01099"></a>01099 <span class="vhdlchar">prefetch_ir_valid_80_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01100"></a>01100
<a name="l01101"></a>01101 <span class="vhdlchar">prefetch_ir_o</span> &lt;= { <span class="vhdlchar">prefetch_ir_o</span>[<span class="vhdllogic">63</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">16&#39;b0</span> };
<a name="l01102"></a>01102 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#abc89f2549e5275c60648fc9a94876e29">S_PC_0</a>;
<a name="l01103"></a>01103 <span class="vhdlkeyword">end</span>
<a name="l01104"></a>01104 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01105"></a>01105 <span class="keyword">// do not load any words</span>
<a name="l01106"></a>01106 <span class="vhdlchar">prefetch_ir_valid_32_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01107"></a>01107 <span class="vhdlchar">prefetch_ir_valid_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01108"></a>01108 <span class="vhdlchar">prefetch_ir_valid_80_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01109"></a>01109
<a name="l01110"></a>01110 <span class="vhdlchar">prefetch_ir_o</span> &lt;= { <span class="vhdlchar">prefetch_ir_o</span>[<span class="vhdllogic">63</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">16&#39;b0</span> };
<a name="l01111"></a>01111 <span class="vhdlkeyword">end</span>
<a name="l01112"></a>01112
<a name="l01113"></a>01113 <span class="vhdlkeyword">end</span>
<a name="l01114"></a>01114 <span class="keyword">// interrupt</span>
<a name="l01115"></a>01115 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_interrupt_i</span> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01116"></a>01116 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01117"></a>01117 <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> &lt;= { <span class="vhdllogic">27&#39;b111_1111_1111_1111_1111_1111_1111</span>, <a class="code" href="classbus__control.html#a18d43f989323778008d066233ddaa191">last_interrupt_mask</a> };
<a name="l01118"></a>01118 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b1111</span>;
<a name="l01119"></a>01119 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01120"></a>01120 <a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01121"></a>01121
<a name="l01122"></a>01122 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01123"></a>01123 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01124"></a>01124 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01125"></a>01125 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
<a name="l01126"></a>01126
<a name="l01127"></a>01127 <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a> &lt;= <a class="code" href="classbus__control.html#ac44cb27522dcf872ea1f1d63cb652d9b">FC_CPU_SPACE</a>;
<a name="l01128"></a>01128
<a name="l01129"></a>01129 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a8ff92de377aefca42782778cda7132f3">S_INT_1</a>;
<a name="l01130"></a>01130 <span class="vhdlkeyword">end</span>
<a name="l01131"></a>01131 <span class="vhdlkeyword">end</span>
<a name="l01132"></a>01132
<a name="l01133"></a>01133 <a class="code" href="classbus__control.html#a8e24d83b04e325557b534b6fbe3c06ca">S_RESET</a>: <span class="vhdlkeyword">begin</span>
<a name="l01134"></a>01134 <a class="code" href="classbus__control.html#af4b71c6c152246795fcfed45e67bab33">reset_counter</a> &lt;= <a class="code" href="classbus__control.html#af4b71c6c152246795fcfed45e67bab33">reset_counter</a> - <span class="vhdllogic">8&#39;d1</span>;
<a name="l01135"></a>01135
<a name="l01136"></a>01136 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#af4b71c6c152246795fcfed45e67bab33">reset_counter</a> == <span class="vhdllogic">8&#39;d0</span>) <span class="vhdlkeyword">begin</span>
<a name="l01137"></a>01137 <span class="vhdlchar">finished_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01138"></a>01138 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01139"></a>01139 <span class="vhdlkeyword">end</span>
<a name="l01140"></a>01140 <span class="vhdlkeyword">end</span>
<a name="l01141"></a>01141
<a name="l01142"></a>01142 <a class="code" href="classbus__control.html#a2545a07988315cbf68e808af80333335">S_BLOCKED</a>: <span class="vhdlkeyword">begin</span>
<a name="l01143"></a>01143 <span class="vhdlkeyword">end</span>
<a name="l01144"></a>01144
<a name="l01145"></a>01145 <a class="code" href="classbus__control.html#a8ff92de377aefca42782778cda7132f3">S_INT_1</a>: <span class="vhdlkeyword">begin</span>
<a name="l01146"></a>01146 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ACK_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01147"></a>01147 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01148"></a>01148 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01149"></a>01149
<a name="l01150"></a>01150 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];
<a name="l01151"></a>01151
<a name="l01152"></a>01152 <span class="vhdlchar">finished_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01153"></a>01153 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01154"></a>01154 <span class="vhdlkeyword">end</span>
<a name="l01155"></a>01155 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">RTY_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01156"></a>01156 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01157"></a>01157 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01158"></a>01158
<a name="l01159"></a>01159 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <span class="vhdllogic">8&#39;d24</span> + { <span class="vhdllogic">5&#39;b0</span>, <span class="vhdlchar">interrupt_mask_o</span> };
<a name="l01160"></a>01160
<a name="l01161"></a>01161 <span class="vhdlchar">finished_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01162"></a>01162 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01163"></a>01163 <span class="vhdlkeyword">end</span>
<a name="l01164"></a>01164 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ERR_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01165"></a>01165 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01166"></a>01166 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01167"></a>01167
<a name="l01168"></a>01168 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <span class="vhdllogic">8&#39;d24</span>; <span class="keyword">// spurious interrupt</span>
<a name="l01169"></a>01169
<a name="l01170"></a>01170 <span class="vhdlchar">finished_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01171"></a>01171 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01172"></a>01172 <span class="vhdlkeyword">end</span>
<a name="l01173"></a>01173 <span class="vhdlkeyword">end</span>
<a name="l01174"></a>01174
<a name="l01175"></a>01175 <a class="code" href="classbus__control.html#abc89f2549e5275c60648fc9a94876e29">S_PC_0</a>: <span class="vhdlkeyword">begin</span>
<a name="l01176"></a>01176 <a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01177"></a>01177 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">supervisor_i</span> == <span class="vhdllogic">1&#39;b1</span>) <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a> &lt;= <a class="code" href="classbus__control.html#a1dc6742718597d6e0ef98e8200bb49bf">FC_SUPERVISOR_PROGRAM</a>;
<a name="l01178"></a>01178 <span class="vhdlkeyword">else</span> <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a> &lt;= <a class="code" href="classbus__control.html#a80b93f8634a7f03a199836a78c52d9bb">FC_USER_PROGRAM</a>;
<a name="l01179"></a>01179
<a name="l01180"></a>01180 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01181"></a>01181 <span class="vhdlchar">prefetch_ir_valid_32_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01182"></a>01182 <span class="vhdlchar">prefetch_ir_valid_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01183"></a>01183 <span class="vhdlchar">prefetch_ir_valid_80_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01184"></a>01184
<a name="l01185"></a>01185 <span class="vhdlchar">fault_address_state_o</span> &lt;= <span class="vhdlchar">pc_i</span>;
<a name="l01186"></a>01186 <span class="vhdlchar">rw_state_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01187"></a>01187 <span class="vhdlchar">fc_state_o</span> &lt;= (<span class="vhdlchar">supervisor_i</span> == <span class="vhdllogic">1&#39;b1</span>) ? <a class="code" href="classbus__control.html#a1dc6742718597d6e0ef98e8200bb49bf">FC_SUPERVISOR_PROGRAM</a> : <a class="code" href="classbus__control.html#a80b93f8634a7f03a199836a78c52d9bb">FC_USER_PROGRAM</a>;
<a name="l01188"></a>01188 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <a class="code" href="classbus__control.html#a16c432fa4a9897426aab6df04ee608e0">VECTOR_ADDRESS_TRAP</a>;
<a name="l01189"></a>01189
<a name="l01190"></a>01190 <span class="vhdlchar">jmp_address_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01191"></a>01191 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01192"></a>01192 <span class="vhdlkeyword">end</span>
<a name="l01193"></a>01193 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01194"></a>01194 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01195"></a>01195
<a name="l01196"></a>01196 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">prefetch_ir_valid_32_o</span> == <span class="vhdllogic">1&#39;b0</span>) <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> &lt;= <span class="vhdlchar">pc_i</span>[<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>];
<a name="l01197"></a>01197 <span class="vhdlkeyword">else</span> <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> &lt;= <a class="code" href="classbus__control.html#a96afbad4fe8073f7c58baf255b66c944">pc_i_plus_6</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>];
<a name="l01198"></a>01198
<a name="l01199"></a>01199 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= (<span class="vhdlchar">pc_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span>)? <span class="vhdllogic">4&#39;b0011</span> :
<a name="l01200"></a>01200 <span class="vhdllogic">4&#39;b1111</span>;
<a name="l01201"></a>01201 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01202"></a>01202
<a name="l01203"></a>01203 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">prefetch_ir_valid_32_o</span> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>
<a name="l01204"></a>01204 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01205"></a>01205 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01206"></a>01206 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01207"></a>01207 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a9c7e8a6d030ee1f404d7526ebda509ca">CTI_INCR_CYCLE</a>;
<a name="l01208"></a>01208 <span class="vhdlkeyword">end</span>
<a name="l01209"></a>01209 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01210"></a>01210 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01211"></a>01211 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01212"></a>01212 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01213"></a>01213 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
<a name="l01214"></a>01214 <span class="vhdlkeyword">end</span>
<a name="l01215"></a>01215
<a name="l01216"></a>01216 <a class="code" href="classbus__control.html#a9d1ac811b477c31c0d6aec541dca418d">saved_pc_change</a> &lt;= <span class="vhdlchar">pc_change_i</span>;
<a name="l01217"></a>01217 <span class="vhdlchar">prefetch_ir_valid_32_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01218"></a>01218
<a name="l01219"></a>01219 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a729095d9bb813c82aee565216b092f38">S_PC_1</a>;
<a name="l01220"></a>01220 <span class="vhdlkeyword">end</span>
<a name="l01221"></a>01221 <span class="vhdlkeyword">end</span>
<a name="l01222"></a>01222
<a name="l01223"></a>01223 <a class="code" href="classbus__control.html#a729095d9bb813c82aee565216b092f38">S_PC_1</a>: <span class="vhdlkeyword">begin</span>
<a name="l01224"></a>01224 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_change_i</span> != <span class="vhdllogic">2&#39;b00</span>) <a class="code" href="classbus__control.html#a9d1ac811b477c31c0d6aec541dca418d">saved_pc_change</a> &lt;= <span class="vhdlchar">pc_change_i</span>;
<a name="l01225"></a>01225
<a name="l01226"></a>01226 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ACK_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01227"></a>01227 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> == <a class="code" href="classbus__control.html#a9c7e8a6d030ee1f404d7526ebda509ca">CTI_INCR_CYCLE</a>) <span class="vhdlkeyword">begin</span>
<a name="l01228"></a>01228 <span class="keyword">//CYC_O &lt;= 1&#39;b1;</span>
<a name="l01229"></a>01229 <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> &lt;= <a class="code" href="classbus__control.html#addb6490ae2acff8c93b321b1e14c7bd4">pc_i_plus_4</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>];
<a name="l01230"></a>01230 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b1111</span>;
<a name="l01231"></a>01231 <span class="keyword">//STB_O &lt;= 1&#39;b1;</span>
<a name="l01232"></a>01232 <span class="keyword">//WE_O &lt;= 1&#39;b0;</span>
<a name="l01233"></a>01233
<a name="l01234"></a>01234 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span>) <span class="vhdlkeyword">begin</span>
<a name="l01235"></a>01235 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01236"></a>01236 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01237"></a>01237 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01238"></a>01238 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a9c7e8a6d030ee1f404d7526ebda509ca">CTI_INCR_CYCLE</a>;
<a name="l01239"></a>01239 <span class="vhdlkeyword">end</span>
<a name="l01240"></a>01240 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01241"></a>01241 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01242"></a>01242 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01243"></a>01243 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01244"></a>01244 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
<a name="l01245"></a>01245 <span class="vhdlkeyword">end</span>
<a name="l01246"></a>01246
<a name="l01247"></a>01247 <span class="keyword">//if(supervisor_i == 1&#39;b1) fc_o &lt;= FC_SUPERVISOR_PROGRAM;</span>
<a name="l01248"></a>01248 <span class="keyword">//else fc_o &lt;= FC_USER_PROGRAM;</span>
<a name="l01249"></a>01249
<a name="l01250"></a>01250 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span>) <span class="vhdlchar">prefetch_ir_o</span> &lt;= { <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">64&#39;b0</span> };
<a name="l01251"></a>01251 <span class="vhdlkeyword">else</span> <span class="vhdlchar">prefetch_ir_o</span> &lt;= { <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">48&#39;b0</span> };
<a name="l01252"></a>01252
<a name="l01253"></a>01253 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a28895ce8a15bd607103ea20914434342">S_PC_3</a>;
<a name="l01254"></a>01254 <span class="vhdlkeyword">end</span>
<a name="l01255"></a>01255 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01256"></a>01256 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01257"></a>01257 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01258"></a>01258
<a name="l01259"></a>01259 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#a9d1ac811b477c31c0d6aec541dca418d">saved_pc_change</a> == <span class="vhdllogic">2&#39;b10</span> || <a class="code" href="classbus__control.html#a9d1ac811b477c31c0d6aec541dca418d">saved_pc_change</a> == <span class="vhdllogic">2&#39;b11</span> || <span class="vhdlchar">pc_change_i</span> == <span class="vhdllogic">2&#39;b10</span> || <span class="vhdlchar">pc_change_i</span> == <span class="vhdllogic">2&#39;b11</span>) <span class="vhdlkeyword">begin</span>
<a name="l01260"></a>01260 <span class="keyword">// load 4 words: [79:16] in 2,3 cycles</span>
<a name="l01261"></a>01261 <span class="vhdlchar">prefetch_ir_valid_32_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01262"></a>01262 <span class="vhdlchar">prefetch_ir_valid_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01263"></a>01263 <span class="vhdlchar">prefetch_ir_valid_80_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01264"></a>01264
<a name="l01265"></a>01265 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#abc89f2549e5275c60648fc9a94876e29">S_PC_0</a>;
<a name="l01266"></a>01266 <span class="vhdlkeyword">end</span>
<a name="l01267"></a>01267 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#a9d1ac811b477c31c0d6aec541dca418d">saved_pc_change</a> == <span class="vhdllogic">2&#39;b01</span> || <span class="vhdlchar">pc_change_i</span> == <span class="vhdllogic">2&#39;b01</span>) <span class="vhdlkeyword">begin</span>
<a name="l01268"></a>01268 <span class="keyword">// do not load any words</span>
<a name="l01269"></a>01269 <span class="vhdlchar">prefetch_ir_valid_32_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01270"></a>01270 <span class="vhdlchar">prefetch_ir_valid_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01271"></a>01271 <span class="vhdlchar">prefetch_ir_valid_80_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01272"></a>01272
<a name="l01273"></a>01273 <span class="vhdlchar">prefetch_ir_o</span> &lt;= { <span class="vhdlchar">prefetch_ir_o</span>[<span class="vhdllogic">63</span>:<span class="vhdllogic">32</span>], <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">16&#39;b0</span> };
<a name="l01274"></a>01274 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>;
<a name="l01275"></a>01275 <span class="vhdlkeyword">end</span>
<a name="l01276"></a>01276 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01277"></a>01277 <span class="vhdlchar">prefetch_ir_valid_32_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01278"></a>01278 <span class="vhdlchar">prefetch_ir_valid_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01279"></a>01279 <span class="vhdlchar">prefetch_ir_valid_80_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01280"></a>01280
<a name="l01281"></a>01281 <span class="vhdlchar">prefetch_ir_o</span> &lt;= { <span class="vhdlchar">prefetch_ir_o</span>[<span class="vhdllogic">79</span>:<span class="vhdllogic">32</span>], <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] };
<a name="l01282"></a>01282 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>;
<a name="l01283"></a>01283 <span class="vhdlkeyword">end</span>
<a name="l01284"></a>01284 <span class="vhdlkeyword">end</span>
<a name="l01285"></a>01285 <span class="vhdlkeyword">end</span>
<a name="l01286"></a>01286 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">RTY_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01287"></a>01287 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01288"></a>01288 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01289"></a>01289
<a name="l01290"></a>01290 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#aaa3088e2e223cdc5551d535c3739cad5">S_PC_2</a>;
<a name="l01291"></a>01291 <span class="vhdlkeyword">end</span>
<a name="l01292"></a>01292 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ERR_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01293"></a>01293 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01294"></a>01294 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01295"></a>01295
<a name="l01296"></a>01296 <span class="vhdlchar">fault_address_state_o</span> &lt;= { <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a>, <span class="vhdllogic">2&#39;b00</span> };
<a name="l01297"></a>01297 <span class="vhdlchar">rw_state_o</span> &lt;= ~<a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a>;
<a name="l01298"></a>01298 <span class="vhdlchar">fc_state_o</span> &lt;= <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a>;
<a name="l01299"></a>01299 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <a class="code" href="classbus__control.html#a63d428a3abed8bfe070ad6e6f82ca72e">VECTOR_BUS_TRAP</a>;
<a name="l01300"></a>01300
<a name="l01301"></a>01301 <span class="vhdlchar">jmp_bus_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01302"></a>01302 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01303"></a>01303 <span class="vhdlkeyword">end</span>
<a name="l01304"></a>01304 <span class="vhdlkeyword">end</span>
<a name="l01305"></a>01305 <a class="code" href="classbus__control.html#aaa3088e2e223cdc5551d535c3739cad5">S_PC_2</a>: <span class="vhdlkeyword">begin</span>
<a name="l01306"></a>01306 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01307"></a>01307 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01308"></a>01308
<a name="l01309"></a>01309 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a729095d9bb813c82aee565216b092f38">S_PC_1</a>;
<a name="l01310"></a>01310 <span class="vhdlkeyword">end</span>
<a name="l01311"></a>01311 <a class="code" href="classbus__control.html#a28895ce8a15bd607103ea20914434342">S_PC_3</a>: <span class="vhdlkeyword">begin</span>
<a name="l01312"></a>01312 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ACK_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01313"></a>01313 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span>) <span class="vhdlkeyword">begin</span>
<a name="l01314"></a>01314 <span class="keyword">//CYC_O &lt;= 1&#39;b1;</span>
<a name="l01315"></a>01315 <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> &lt;= <a class="code" href="classbus__control.html#a96afbad4fe8073f7c58baf255b66c944">pc_i_plus_6</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>];
<a name="l01316"></a>01316 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b1111</span>;
<a name="l01317"></a>01317 <span class="keyword">//STB_O &lt;= 1&#39;b1;</span>
<a name="l01318"></a>01318 <span class="keyword">//WE_O &lt;= 1&#39;b0;</span>
<a name="l01319"></a>01319
<a name="l01320"></a>01320 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01321"></a>01321 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01322"></a>01322 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01323"></a>01323 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
<a name="l01324"></a>01324
<a name="l01325"></a>01325 <span class="keyword">//if(supervisor_i == 1&#39;b1) fc_o &lt;= FC_SUPERVISOR_PROGRAM;</span>
<a name="l01326"></a>01326 <span class="keyword">//else fc_o &lt;= FC_USER_PROGRAM;</span>
<a name="l01327"></a>01327
<a name="l01328"></a>01328 <span class="vhdlchar">prefetch_ir_o</span> &lt;= { <span class="vhdlchar">prefetch_ir_o</span>[<span class="vhdllogic">79</span>:<span class="vhdllogic">64</span>], <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">32&#39;b0</span> };
<a name="l01329"></a>01329
<a name="l01330"></a>01330 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#aa19b7d76f1e25fd78b158b98088bd82a">S_PC_5</a>;
<a name="l01331"></a>01331 <span class="vhdlkeyword">end</span>
<a name="l01332"></a>01332 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01333"></a>01333 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01334"></a>01334 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01335"></a>01335
<a name="l01336"></a>01336 <span class="vhdlchar">prefetch_ir_o</span> &lt;= { <span class="vhdlchar">prefetch_ir_o</span>[<span class="vhdllogic">79</span>:<span class="vhdllogic">48</span>], <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">16&#39;b0</span> };
<a name="l01337"></a>01337
<a name="l01338"></a>01338 <span class="vhdlchar">prefetch_ir_valid_32_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01339"></a>01339 <span class="vhdlchar">prefetch_ir_valid_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01340"></a>01340 <span class="vhdlchar">prefetch_ir_valid_80_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01341"></a>01341 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>;
<a name="l01342"></a>01342 <span class="vhdlkeyword">end</span>
<a name="l01343"></a>01343 <span class="vhdlkeyword">end</span>
<a name="l01344"></a>01344 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">RTY_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01345"></a>01345 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01346"></a>01346 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01347"></a>01347
<a name="l01348"></a>01348 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a5e72ed7bc2e7991094fecd272775f92c">S_PC_4</a>;
<a name="l01349"></a>01349 <span class="vhdlkeyword">end</span>
<a name="l01350"></a>01350 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ERR_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01351"></a>01351 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01352"></a>01352 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01353"></a>01353
<a name="l01354"></a>01354 <span class="vhdlchar">fault_address_state_o</span> &lt;= { <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a>, <span class="vhdllogic">2&#39;b00</span> };
<a name="l01355"></a>01355 <span class="vhdlchar">rw_state_o</span> &lt;= ~<a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a>;
<a name="l01356"></a>01356 <span class="vhdlchar">fc_state_o</span> &lt;= <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a>;
<a name="l01357"></a>01357 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <a class="code" href="classbus__control.html#a63d428a3abed8bfe070ad6e6f82ca72e">VECTOR_BUS_TRAP</a>;
<a name="l01358"></a>01358
<a name="l01359"></a>01359 <span class="vhdlchar">jmp_bus_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01360"></a>01360 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01361"></a>01361 <span class="vhdlkeyword">end</span>
<a name="l01362"></a>01362 <span class="vhdlkeyword">end</span>
<a name="l01363"></a>01363 <a class="code" href="classbus__control.html#a5e72ed7bc2e7991094fecd272775f92c">S_PC_4</a>: <span class="vhdlkeyword">begin</span>
<a name="l01364"></a>01364 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01365"></a>01365 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01366"></a>01366
<a name="l01367"></a>01367 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a28895ce8a15bd607103ea20914434342">S_PC_3</a>;
<a name="l01368"></a>01368 <span class="vhdlkeyword">end</span>
<a name="l01369"></a>01369 <a class="code" href="classbus__control.html#aa19b7d76f1e25fd78b158b98088bd82a">S_PC_5</a>: <span class="vhdlkeyword">begin</span>
<a name="l01370"></a>01370 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ACK_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01371"></a>01371 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01372"></a>01372 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01373"></a>01373
<a name="l01374"></a>01374 <span class="vhdlchar">prefetch_ir_o</span> &lt;= { <span class="vhdlchar">prefetch_ir_o</span>[<span class="vhdllogic">79</span>:<span class="vhdllogic">32</span>], <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] };
<a name="l01375"></a>01375
<a name="l01376"></a>01376 <span class="vhdlchar">prefetch_ir_valid_32_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01377"></a>01377 <span class="vhdlchar">prefetch_ir_valid_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01378"></a>01378 <span class="vhdlchar">prefetch_ir_valid_80_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01379"></a>01379 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>;
<a name="l01380"></a>01380 <span class="vhdlkeyword">end</span>
<a name="l01381"></a>01381 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">RTY_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01382"></a>01382 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01383"></a>01383 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01384"></a>01384
<a name="l01385"></a>01385 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a1c803cc4a4f514cd4027a798d9236e5e">S_PC_6</a>;
<a name="l01386"></a>01386 <span class="vhdlkeyword">end</span>
<a name="l01387"></a>01387 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ERR_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01388"></a>01388 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01389"></a>01389 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01390"></a>01390
<a name="l01391"></a>01391 <span class="vhdlchar">fault_address_state_o</span> &lt;= { <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a>, <span class="vhdllogic">2&#39;b00</span> };
<a name="l01392"></a>01392 <span class="vhdlchar">rw_state_o</span> &lt;= ~<a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a>;
<a name="l01393"></a>01393 <span class="vhdlchar">fc_state_o</span> &lt;= <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a>;
<a name="l01394"></a>01394 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <a class="code" href="classbus__control.html#a63d428a3abed8bfe070ad6e6f82ca72e">VECTOR_BUS_TRAP</a>;
<a name="l01395"></a>01395
<a name="l01396"></a>01396 <span class="vhdlchar">jmp_bus_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01397"></a>01397 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01398"></a>01398 <span class="vhdlkeyword">end</span>
<a name="l01399"></a>01399 <span class="vhdlkeyword">end</span>
<a name="l01400"></a>01400 <a class="code" href="classbus__control.html#a1c803cc4a4f514cd4027a798d9236e5e">S_PC_6</a>: <span class="vhdlkeyword">begin</span>
<a name="l01401"></a>01401 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01402"></a>01402 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01403"></a>01403
<a name="l01404"></a>01404 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#aa19b7d76f1e25fd78b158b98088bd82a">S_PC_5</a>;
<a name="l01405"></a>01405 <span class="vhdlkeyword">end</span>
<a name="l01406"></a>01406
<a name="l01407"></a>01407 <span class="keyword">//*******************</span>
<a name="l01408"></a>01408 <a class="code" href="classbus__control.html#af752b2515eb632068e26865f1569598c">S_READ_1</a>: <span class="vhdlkeyword">begin</span>
<a name="l01409"></a>01409 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ACK_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01410"></a>01410 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01411"></a>01411 <span class="keyword">//CYC_O &lt;= 1&#39;b1;</span>
<a name="l01412"></a>01412 <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> &lt;= <a class="code" href="classbus__control.html#a2997069937ed71fba6eefb8837ba3282">address_i_plus_4</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>];
<a name="l01413"></a>01413 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b1100</span>;
<a name="l01414"></a>01414 <span class="keyword">//STB_O &lt;= 1&#39;b1;</span>
<a name="l01415"></a>01415 <span class="keyword">//WE_O &lt;= 1&#39;b0;</span>
<a name="l01416"></a>01416
<a name="l01417"></a>01417 <span class="keyword">//SGL_O &lt;= 1&#39;b0;</span>
<a name="l01418"></a>01418 <span class="keyword">//BLK_O &lt;= 1&#39;b1;</span>
<a name="l01419"></a>01419 <span class="keyword">//RMW_O &lt;= 1&#39;b0;</span>
<a name="l01420"></a>01420 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
<a name="l01421"></a>01421
<a name="l01422"></a>01422 <span class="keyword">//if(supervisor_i == 1&#39;b1) fc_o &lt;= (address_type_i == 1&#39;b0) ? FC_SUPERVISOR_DATA : FC_SUPERVISOR_PROGRAM;</span>
<a name="l01423"></a>01423 <span class="keyword">//else fc_o &lt;= (address_type_i == 1&#39;b0) ? FC_USER_DATA : FC_USER_PROGRAM;</span>
<a name="l01424"></a>01424
<a name="l01425"></a>01425 <span class="vhdlchar">data_read_o</span> &lt;= { <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">16&#39;b0</span> };
<a name="l01426"></a>01426
<a name="l01427"></a>01427 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a269161b7fabba2e00d3a3a5153a9620e">S_READ_2</a>;
<a name="l01428"></a>01428 <span class="vhdlkeyword">end</span>
<a name="l01429"></a>01429 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01430"></a>01430 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">read_modify_write_i</span> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01431"></a>01431 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01432"></a>01432 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01433"></a>01433 <span class="vhdlkeyword">end</span>
<a name="l01434"></a>01434 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01435"></a>01435 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01436"></a>01436 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01437"></a>01437 <span class="vhdlkeyword">end</span>
<a name="l01438"></a>01438
<a name="l01439"></a>01439 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b00</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlchar">data_read_o</span> &lt;= <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l01440"></a>01440 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlchar">data_read_o</span> &lt;= { {<span class="vhdllogic">16</span>{<a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">15</span>]}}, <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] };
<a name="l01441"></a>01441 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b00</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlchar">data_read_o</span> &lt;= { {<span class="vhdllogic">16</span>{<a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>]}}, <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">16</span>] };
<a name="l01442"></a>01442 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlchar">data_read_o</span> &lt;= { {<span class="vhdllogic">24</span>{<a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">7</span>]}}, <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] };
<a name="l01443"></a>01443 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlchar">data_read_o</span> &lt;= { {<span class="vhdllogic">24</span>{<a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">15</span>]}}, <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>] };
<a name="l01444"></a>01444 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b01</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlchar">data_read_o</span> &lt;= { {<span class="vhdllogic">24</span>{<a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">23</span>]}}, <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">23</span>:<span class="vhdllogic">16</span>] };
<a name="l01445"></a>01445 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b00</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlchar">data_read_o</span> &lt;= { {<span class="vhdllogic">24</span>{<a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>]}}, <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">24</span>] };
<a name="l01446"></a>01446
<a name="l01447"></a>01447 <span class="vhdlchar">finished_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01448"></a>01448 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01449"></a>01449 <span class="vhdlkeyword">end</span>
<a name="l01450"></a>01450 <span class="vhdlkeyword">end</span>
<a name="l01451"></a>01451 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">RTY_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01452"></a>01452 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01453"></a>01453 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01454"></a>01454
<a name="l01455"></a>01455 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>;
<a name="l01456"></a>01456 <span class="vhdlkeyword">end</span>
<a name="l01457"></a>01457 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ERR_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01458"></a>01458 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01459"></a>01459 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01460"></a>01460
<a name="l01461"></a>01461 <span class="vhdlchar">fault_address_state_o</span> &lt;= { <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a>, <span class="vhdllogic">2&#39;b00</span> };
<a name="l01462"></a>01462 <span class="vhdlchar">rw_state_o</span> &lt;= ~<a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a>;
<a name="l01463"></a>01463 <span class="vhdlchar">fc_state_o</span> &lt;= <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a>;
<a name="l01464"></a>01464 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <a class="code" href="classbus__control.html#a63d428a3abed8bfe070ad6e6f82ca72e">VECTOR_BUS_TRAP</a>;
<a name="l01465"></a>01465
<a name="l01466"></a>01466 <span class="vhdlchar">jmp_bus_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01467"></a>01467 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01468"></a>01468 <span class="vhdlkeyword">end</span>
<a name="l01469"></a>01469 <span class="vhdlkeyword">end</span>
<a name="l01470"></a>01470 <a class="code" href="classbus__control.html#a269161b7fabba2e00d3a3a5153a9620e">S_READ_2</a>: <span class="vhdlkeyword">begin</span>
<a name="l01471"></a>01471 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ACK_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01472"></a>01472 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01473"></a>01473 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01474"></a>01474
<a name="l01475"></a>01475 <span class="vhdlchar">data_read_o</span> &lt;= { <span class="vhdlchar">data_read_o</span>[<span class="vhdllogic">31</span>:<span class="vhdllogic">16</span>], <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">16</span>] };
<a name="l01476"></a>01476
<a name="l01477"></a>01477 <span class="vhdlchar">finished_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01478"></a>01478 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01479"></a>01479
<a name="l01480"></a>01480 <span class="vhdlkeyword">end</span>
<a name="l01481"></a>01481 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">RTY_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01482"></a>01482 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01483"></a>01483 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01484"></a>01484
<a name="l01485"></a>01485 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a8af7b5fb8c5d5d3788e5af5dad48393b">S_READ_3</a>;
<a name="l01486"></a>01486 <span class="vhdlkeyword">end</span>
<a name="l01487"></a>01487 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ERR_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01488"></a>01488 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01489"></a>01489 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01490"></a>01490
<a name="l01491"></a>01491 <span class="vhdlchar">fault_address_state_o</span> &lt;= { <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a>, <span class="vhdllogic">2&#39;b00</span> };
<a name="l01492"></a>01492 <span class="vhdlchar">rw_state_o</span> &lt;= ~<a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a>;
<a name="l01493"></a>01493 <span class="vhdlchar">fc_state_o</span> &lt;= <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a>;
<a name="l01494"></a>01494 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <a class="code" href="classbus__control.html#a63d428a3abed8bfe070ad6e6f82ca72e">VECTOR_BUS_TRAP</a>;
<a name="l01495"></a>01495
<a name="l01496"></a>01496 <span class="vhdlchar">jmp_bus_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01497"></a>01497 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01498"></a>01498 <span class="vhdlkeyword">end</span>
<a name="l01499"></a>01499
<a name="l01500"></a>01500 <span class="vhdlkeyword">end</span>
<a name="l01501"></a>01501 <a class="code" href="classbus__control.html#a8af7b5fb8c5d5d3788e5af5dad48393b">S_READ_3</a>: <span class="vhdlkeyword">begin</span>
<a name="l01502"></a>01502 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01503"></a>01503 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01504"></a>01504
<a name="l01505"></a>01505 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a269161b7fabba2e00d3a3a5153a9620e">S_READ_2</a>;
<a name="l01506"></a>01506 <span class="vhdlkeyword">end</span>
<a name="l01507"></a>01507
<a name="l01113"></a>01113
<a name="l01114"></a>01114 <span class="vhdlkeyword">end</span>
<a name="l01115"></a>01115 <span class="keyword">// interrupt</span>
<a name="l01116"></a>01116 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_interrupt_i</span> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01117"></a>01117 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01118"></a>01118 <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> &lt;= { <span class="vhdllogic">27&#39;b111_1111_1111_1111_1111_1111_1111</span>, <a class="code" href="classbus__control.html#a18d43f989323778008d066233ddaa191">last_interrupt_mask</a> };
<a name="l01119"></a>01119 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b1111</span>;
<a name="l01120"></a>01120 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01121"></a>01121 <a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01122"></a>01122
<a name="l01123"></a>01123 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01124"></a>01124 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01125"></a>01125 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01126"></a>01126 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
<a name="l01127"></a>01127
<a name="l01128"></a>01128 <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a> &lt;= <a class="code" href="classbus__control.html#ac44cb27522dcf872ea1f1d63cb652d9b">FC_CPU_SPACE</a>;
<a name="l01129"></a>01129
<a name="l01130"></a>01130 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a8ff92de377aefca42782778cda7132f3">S_INT_1</a>;
<a name="l01131"></a>01131 <span class="vhdlkeyword">end</span>
<a name="l01132"></a>01132 <span class="vhdlkeyword">end</span>
<a name="l01133"></a>01133
<a name="l01134"></a>01134 <a class="code" href="classbus__control.html#a8e24d83b04e325557b534b6fbe3c06ca">S_RESET</a>: <span class="vhdlkeyword">begin</span>
<a name="l01135"></a>01135 <a class="code" href="classbus__control.html#af4b71c6c152246795fcfed45e67bab33">reset_counter</a> &lt;= <a class="code" href="classbus__control.html#af4b71c6c152246795fcfed45e67bab33">reset_counter</a> - <span class="vhdllogic">8&#39;d1</span>;
<a name="l01136"></a>01136
<a name="l01137"></a>01137 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#af4b71c6c152246795fcfed45e67bab33">reset_counter</a> == <span class="vhdllogic">8&#39;d0</span>) <span class="vhdlkeyword">begin</span>
<a name="l01138"></a>01138 <span class="vhdlchar">finished_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01139"></a>01139 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01140"></a>01140 <span class="vhdlkeyword">end</span>
<a name="l01141"></a>01141 <span class="vhdlkeyword">end</span>
<a name="l01142"></a>01142
<a name="l01143"></a>01143 <a class="code" href="classbus__control.html#a2545a07988315cbf68e808af80333335">S_BLOCKED</a>: <span class="vhdlkeyword">begin</span>
<a name="l01144"></a>01144 <span class="vhdlkeyword">end</span>
<a name="l01145"></a>01145
<a name="l01146"></a>01146 <a class="code" href="classbus__control.html#a8ff92de377aefca42782778cda7132f3">S_INT_1</a>: <span class="vhdlkeyword">begin</span>
<a name="l01147"></a>01147 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ACK_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01148"></a>01148 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01149"></a>01149 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01150"></a>01150
<a name="l01151"></a>01151 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];
<a name="l01152"></a>01152
<a name="l01153"></a>01153 <span class="vhdlchar">finished_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01154"></a>01154 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01155"></a>01155 <span class="vhdlkeyword">end</span>
<a name="l01156"></a>01156 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">RTY_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01157"></a>01157 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01158"></a>01158 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01159"></a>01159
<a name="l01160"></a>01160 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <span class="vhdllogic">8&#39;d24</span> + { <span class="vhdllogic">5&#39;b0</span>, <span class="vhdlchar">interrupt_mask_o</span> };
<a name="l01161"></a>01161
<a name="l01162"></a>01162 <span class="vhdlchar">finished_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01163"></a>01163 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01164"></a>01164 <span class="vhdlkeyword">end</span>
<a name="l01165"></a>01165 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ERR_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01166"></a>01166 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01167"></a>01167 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01168"></a>01168
<a name="l01169"></a>01169 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <span class="vhdllogic">8&#39;d24</span>; <span class="keyword">// spurious interrupt</span>
<a name="l01170"></a>01170
<a name="l01171"></a>01171 <span class="vhdlchar">finished_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01172"></a>01172 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01173"></a>01173 <span class="vhdlkeyword">end</span>
<a name="l01174"></a>01174 <span class="vhdlkeyword">end</span>
<a name="l01175"></a>01175
<a name="l01176"></a>01176 <a class="code" href="classbus__control.html#abc89f2549e5275c60648fc9a94876e29">S_PC_0</a>: <span class="vhdlkeyword">begin</span>
<a name="l01177"></a>01177 <a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01178"></a>01178 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">supervisor_i</span> == <span class="vhdllogic">1&#39;b1</span>) <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a> &lt;= <a class="code" href="classbus__control.html#a1dc6742718597d6e0ef98e8200bb49bf">FC_SUPERVISOR_PROGRAM</a>;
<a name="l01179"></a>01179 <span class="vhdlkeyword">else</span> <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a> &lt;= <a class="code" href="classbus__control.html#a80b93f8634a7f03a199836a78c52d9bb">FC_USER_PROGRAM</a>;
<a name="l01180"></a>01180
<a name="l01181"></a>01181 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01182"></a>01182 <span class="vhdlchar">prefetch_ir_valid_32_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01183"></a>01183 <span class="vhdlchar">prefetch_ir_valid_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01184"></a>01184 <span class="vhdlchar">prefetch_ir_valid_80_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01185"></a>01185
<a name="l01186"></a>01186 <span class="vhdlchar">fault_address_state_o</span> &lt;= <span class="vhdlchar">pc_i</span>;
<a name="l01187"></a>01187 <span class="vhdlchar">rw_state_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01188"></a>01188 <span class="vhdlchar">fc_state_o</span> &lt;= (<span class="vhdlchar">supervisor_i</span> == <span class="vhdllogic">1&#39;b1</span>) ? <a class="code" href="classbus__control.html#a1dc6742718597d6e0ef98e8200bb49bf">FC_SUPERVISOR_PROGRAM</a> : <a class="code" href="classbus__control.html#a80b93f8634a7f03a199836a78c52d9bb">FC_USER_PROGRAM</a>;
<a name="l01189"></a>01189 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <a class="code" href="classbus__control.html#a16c432fa4a9897426aab6df04ee608e0">VECTOR_ADDRESS_TRAP</a>;
<a name="l01190"></a>01190
<a name="l01191"></a>01191 <span class="vhdlchar">jmp_address_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01192"></a>01192 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01193"></a>01193 <span class="vhdlkeyword">end</span>
<a name="l01194"></a>01194 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01195"></a>01195 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01196"></a>01196
<a name="l01197"></a>01197 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">prefetch_ir_valid_32_o</span> == <span class="vhdllogic">1&#39;b0</span>) <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> &lt;= <span class="vhdlchar">pc_i</span>[<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>];
<a name="l01198"></a>01198 <span class="vhdlkeyword">else</span> <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> &lt;= <a class="code" href="classbus__control.html#a96afbad4fe8073f7c58baf255b66c944">pc_i_plus_6</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>];
<a name="l01199"></a>01199
<a name="l01200"></a>01200 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= (<span class="vhdlchar">pc_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span>)? <span class="vhdllogic">4&#39;b0011</span> :
<a name="l01201"></a>01201 <span class="vhdllogic">4&#39;b1111</span>;
<a name="l01202"></a>01202 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01203"></a>01203
<a name="l01204"></a>01204 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">prefetch_ir_valid_32_o</span> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>
<a name="l01205"></a>01205 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01206"></a>01206 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01207"></a>01207 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01208"></a>01208 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a9c7e8a6d030ee1f404d7526ebda509ca">CTI_INCR_CYCLE</a>;
<a name="l01209"></a>01209 <span class="vhdlkeyword">end</span>
<a name="l01210"></a>01210 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01211"></a>01211 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01212"></a>01212 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01213"></a>01213 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01214"></a>01214 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
<a name="l01215"></a>01215 <span class="vhdlkeyword">end</span>
<a name="l01216"></a>01216
<a name="l01217"></a>01217 <a class="code" href="classbus__control.html#a9d1ac811b477c31c0d6aec541dca418d">saved_pc_change</a> &lt;= <span class="vhdlchar">pc_change_i</span>;
<a name="l01218"></a>01218 <span class="vhdlchar">prefetch_ir_valid_32_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01219"></a>01219
<a name="l01220"></a>01220 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a729095d9bb813c82aee565216b092f38">S_PC_1</a>;
<a name="l01221"></a>01221 <span class="vhdlkeyword">end</span>
<a name="l01222"></a>01222 <span class="vhdlkeyword">end</span>
<a name="l01223"></a>01223
<a name="l01224"></a>01224 <a class="code" href="classbus__control.html#a729095d9bb813c82aee565216b092f38">S_PC_1</a>: <span class="vhdlkeyword">begin</span>
<a name="l01225"></a>01225 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_change_i</span> != <span class="vhdllogic">2&#39;b00</span>) <a class="code" href="classbus__control.html#a9d1ac811b477c31c0d6aec541dca418d">saved_pc_change</a> &lt;= <span class="vhdlchar">pc_change_i</span>;
<a name="l01226"></a>01226
<a name="l01227"></a>01227 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ACK_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01228"></a>01228 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> == <a class="code" href="classbus__control.html#a9c7e8a6d030ee1f404d7526ebda509ca">CTI_INCR_CYCLE</a>) <span class="vhdlkeyword">begin</span>
<a name="l01229"></a>01229 <span class="keyword">//CYC_O &lt;= 1&#39;b1;</span>
<a name="l01230"></a>01230 <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> &lt;= <a class="code" href="classbus__control.html#addb6490ae2acff8c93b321b1e14c7bd4">pc_i_plus_4</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>];
<a name="l01231"></a>01231 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b1111</span>;
<a name="l01232"></a>01232 <span class="keyword">//STB_O &lt;= 1&#39;b1;</span>
<a name="l01233"></a>01233 <span class="keyword">//WE_O &lt;= 1&#39;b0;</span>
<a name="l01234"></a>01234
<a name="l01235"></a>01235 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span>) <span class="vhdlkeyword">begin</span>
<a name="l01236"></a>01236 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01237"></a>01237 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01238"></a>01238 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01239"></a>01239 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a9c7e8a6d030ee1f404d7526ebda509ca">CTI_INCR_CYCLE</a>;
<a name="l01240"></a>01240 <span class="vhdlkeyword">end</span>
<a name="l01241"></a>01241 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01242"></a>01242 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01243"></a>01243 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01244"></a>01244 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01245"></a>01245 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
<a name="l01246"></a>01246 <span class="vhdlkeyword">end</span>
<a name="l01247"></a>01247
<a name="l01248"></a>01248 <span class="keyword">//if(supervisor_i == 1&#39;b1) fc_o &lt;= FC_SUPERVISOR_PROGRAM;</span>
<a name="l01249"></a>01249 <span class="keyword">//else fc_o &lt;= FC_USER_PROGRAM;</span>
<a name="l01250"></a>01250
<a name="l01251"></a>01251 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span>) <span class="vhdlchar">prefetch_ir_o</span> &lt;= { <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">64&#39;b0</span> };
<a name="l01252"></a>01252 <span class="vhdlkeyword">else</span> <span class="vhdlchar">prefetch_ir_o</span> &lt;= { <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">48&#39;b0</span> };
<a name="l01253"></a>01253
<a name="l01254"></a>01254 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a28895ce8a15bd607103ea20914434342">S_PC_3</a>;
<a name="l01255"></a>01255 <span class="vhdlkeyword">end</span>
<a name="l01256"></a>01256 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01257"></a>01257 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01258"></a>01258 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01259"></a>01259
<a name="l01260"></a>01260 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#a9d1ac811b477c31c0d6aec541dca418d">saved_pc_change</a> == <span class="vhdllogic">2&#39;b10</span> || <a class="code" href="classbus__control.html#a9d1ac811b477c31c0d6aec541dca418d">saved_pc_change</a> == <span class="vhdllogic">2&#39;b11</span> || <span class="vhdlchar">pc_change_i</span> == <span class="vhdllogic">2&#39;b10</span> || <span class="vhdlchar">pc_change_i</span> == <span class="vhdllogic">2&#39;b11</span>) <span class="vhdlkeyword">begin</span>
<a name="l01261"></a>01261 <span class="keyword">// load 4 words: [79:16] in 2,3 cycles</span>
<a name="l01262"></a>01262 <span class="vhdlchar">prefetch_ir_valid_32_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01263"></a>01263 <span class="vhdlchar">prefetch_ir_valid_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01264"></a>01264 <span class="vhdlchar">prefetch_ir_valid_80_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01265"></a>01265
<a name="l01266"></a>01266 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#abc89f2549e5275c60648fc9a94876e29">S_PC_0</a>;
<a name="l01267"></a>01267 <span class="vhdlkeyword">end</span>
<a name="l01268"></a>01268 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#a9d1ac811b477c31c0d6aec541dca418d">saved_pc_change</a> == <span class="vhdllogic">2&#39;b01</span> || <span class="vhdlchar">pc_change_i</span> == <span class="vhdllogic">2&#39;b01</span>) <span class="vhdlkeyword">begin</span>
<a name="l01269"></a>01269 <span class="keyword">// do not load any words</span>
<a name="l01270"></a>01270 <span class="vhdlchar">prefetch_ir_valid_32_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01271"></a>01271 <span class="vhdlchar">prefetch_ir_valid_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01272"></a>01272 <span class="vhdlchar">prefetch_ir_valid_80_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01273"></a>01273
<a name="l01274"></a>01274 <span class="vhdlchar">prefetch_ir_o</span> &lt;= { <span class="vhdlchar">prefetch_ir_o</span>[<span class="vhdllogic">63</span>:<span class="vhdllogic">32</span>], <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">16&#39;b0</span> };
<a name="l01275"></a>01275 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>;
<a name="l01276"></a>01276 <span class="vhdlkeyword">end</span>
<a name="l01277"></a>01277 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01278"></a>01278 <span class="vhdlchar">prefetch_ir_valid_32_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01279"></a>01279 <span class="vhdlchar">prefetch_ir_valid_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01280"></a>01280 <span class="vhdlchar">prefetch_ir_valid_80_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01281"></a>01281
<a name="l01282"></a>01282 <span class="vhdlchar">prefetch_ir_o</span> &lt;= { <span class="vhdlchar">prefetch_ir_o</span>[<span class="vhdllogic">79</span>:<span class="vhdllogic">32</span>], <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] };
<a name="l01283"></a>01283 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>;
<a name="l01284"></a>01284 <span class="vhdlkeyword">end</span>
<a name="l01285"></a>01285 <span class="vhdlkeyword">end</span>
<a name="l01286"></a>01286 <span class="vhdlkeyword">end</span>
<a name="l01287"></a>01287 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">RTY_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01288"></a>01288 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01289"></a>01289 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01290"></a>01290
<a name="l01291"></a>01291 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#aaa3088e2e223cdc5551d535c3739cad5">S_PC_2</a>;
<a name="l01292"></a>01292 <span class="vhdlkeyword">end</span>
<a name="l01293"></a>01293 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ERR_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01294"></a>01294 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01295"></a>01295 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01296"></a>01296
<a name="l01297"></a>01297 <span class="vhdlchar">fault_address_state_o</span> &lt;= { <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a>, <span class="vhdllogic">2&#39;b00</span> };
<a name="l01298"></a>01298 <span class="vhdlchar">rw_state_o</span> &lt;= ~<a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a>;
<a name="l01299"></a>01299 <span class="vhdlchar">fc_state_o</span> &lt;= <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a>;
<a name="l01300"></a>01300 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <a class="code" href="classbus__control.html#a63d428a3abed8bfe070ad6e6f82ca72e">VECTOR_BUS_TRAP</a>;
<a name="l01301"></a>01301
<a name="l01302"></a>01302 <span class="vhdlchar">jmp_bus_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01303"></a>01303 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01304"></a>01304 <span class="vhdlkeyword">end</span>
<a name="l01305"></a>01305 <span class="vhdlkeyword">end</span>
<a name="l01306"></a>01306 <a class="code" href="classbus__control.html#aaa3088e2e223cdc5551d535c3739cad5">S_PC_2</a>: <span class="vhdlkeyword">begin</span>
<a name="l01307"></a>01307 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01308"></a>01308 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01309"></a>01309
<a name="l01310"></a>01310 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a729095d9bb813c82aee565216b092f38">S_PC_1</a>;
<a name="l01311"></a>01311 <span class="vhdlkeyword">end</span>
<a name="l01312"></a>01312 <a class="code" href="classbus__control.html#a28895ce8a15bd607103ea20914434342">S_PC_3</a>: <span class="vhdlkeyword">begin</span>
<a name="l01313"></a>01313 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ACK_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01314"></a>01314 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span>) <span class="vhdlkeyword">begin</span>
<a name="l01315"></a>01315 <span class="keyword">//CYC_O &lt;= 1&#39;b1;</span>
<a name="l01316"></a>01316 <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> &lt;= <a class="code" href="classbus__control.html#a96afbad4fe8073f7c58baf255b66c944">pc_i_plus_6</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>];
<a name="l01317"></a>01317 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b1111</span>;
<a name="l01318"></a>01318 <span class="keyword">//STB_O &lt;= 1&#39;b1;</span>
<a name="l01319"></a>01319 <span class="keyword">//WE_O &lt;= 1&#39;b0;</span>
<a name="l01320"></a>01320
<a name="l01321"></a>01321 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01322"></a>01322 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01323"></a>01323 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01324"></a>01324 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
<a name="l01325"></a>01325
<a name="l01326"></a>01326 <span class="keyword">//if(supervisor_i == 1&#39;b1) fc_o &lt;= FC_SUPERVISOR_PROGRAM;</span>
<a name="l01327"></a>01327 <span class="keyword">//else fc_o &lt;= FC_USER_PROGRAM;</span>
<a name="l01328"></a>01328
<a name="l01329"></a>01329 <span class="vhdlchar">prefetch_ir_o</span> &lt;= { <span class="vhdlchar">prefetch_ir_o</span>[<span class="vhdllogic">79</span>:<span class="vhdllogic">64</span>], <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">32&#39;b0</span> };
<a name="l01330"></a>01330
<a name="l01331"></a>01331 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#aa19b7d76f1e25fd78b158b98088bd82a">S_PC_5</a>;
<a name="l01332"></a>01332 <span class="vhdlkeyword">end</span>
<a name="l01333"></a>01333 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01334"></a>01334 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01335"></a>01335 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01336"></a>01336
<a name="l01337"></a>01337 <span class="vhdlchar">prefetch_ir_o</span> &lt;= { <span class="vhdlchar">prefetch_ir_o</span>[<span class="vhdllogic">79</span>:<span class="vhdllogic">48</span>], <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">16&#39;b0</span> };
<a name="l01338"></a>01338
<a name="l01339"></a>01339 <span class="vhdlchar">prefetch_ir_valid_32_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01340"></a>01340 <span class="vhdlchar">prefetch_ir_valid_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01341"></a>01341 <span class="vhdlchar">prefetch_ir_valid_80_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01342"></a>01342 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>;
<a name="l01343"></a>01343 <span class="vhdlkeyword">end</span>
<a name="l01344"></a>01344 <span class="vhdlkeyword">end</span>
<a name="l01345"></a>01345 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">RTY_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01346"></a>01346 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01347"></a>01347 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01348"></a>01348
<a name="l01349"></a>01349 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a5e72ed7bc2e7991094fecd272775f92c">S_PC_4</a>;
<a name="l01350"></a>01350 <span class="vhdlkeyword">end</span>
<a name="l01351"></a>01351 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ERR_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01352"></a>01352 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01353"></a>01353 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01354"></a>01354
<a name="l01355"></a>01355 <span class="vhdlchar">fault_address_state_o</span> &lt;= { <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a>, <span class="vhdllogic">2&#39;b00</span> };
<a name="l01356"></a>01356 <span class="vhdlchar">rw_state_o</span> &lt;= ~<a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a>;
<a name="l01357"></a>01357 <span class="vhdlchar">fc_state_o</span> &lt;= <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a>;
<a name="l01358"></a>01358 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <a class="code" href="classbus__control.html#a63d428a3abed8bfe070ad6e6f82ca72e">VECTOR_BUS_TRAP</a>;
<a name="l01359"></a>01359
<a name="l01360"></a>01360 <span class="vhdlchar">jmp_bus_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01361"></a>01361 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01362"></a>01362 <span class="vhdlkeyword">end</span>
<a name="l01363"></a>01363 <span class="vhdlkeyword">end</span>
<a name="l01364"></a>01364 <a class="code" href="classbus__control.html#a5e72ed7bc2e7991094fecd272775f92c">S_PC_4</a>: <span class="vhdlkeyword">begin</span>
<a name="l01365"></a>01365 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01366"></a>01366 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01367"></a>01367
<a name="l01368"></a>01368 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a28895ce8a15bd607103ea20914434342">S_PC_3</a>;
<a name="l01369"></a>01369 <span class="vhdlkeyword">end</span>
<a name="l01370"></a>01370 <a class="code" href="classbus__control.html#aa19b7d76f1e25fd78b158b98088bd82a">S_PC_5</a>: <span class="vhdlkeyword">begin</span>
<a name="l01371"></a>01371 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ACK_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01372"></a>01372 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01373"></a>01373 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01374"></a>01374
<a name="l01375"></a>01375 <span class="vhdlchar">prefetch_ir_o</span> &lt;= { <span class="vhdlchar">prefetch_ir_o</span>[<span class="vhdllogic">79</span>:<span class="vhdllogic">32</span>], <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] };
<a name="l01376"></a>01376
<a name="l01377"></a>01377 <span class="vhdlchar">prefetch_ir_valid_32_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01378"></a>01378 <span class="vhdlchar">prefetch_ir_valid_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01379"></a>01379 <span class="vhdlchar">prefetch_ir_valid_80_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01380"></a>01380 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>;
<a name="l01381"></a>01381 <span class="vhdlkeyword">end</span>
<a name="l01382"></a>01382 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">RTY_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01383"></a>01383 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01384"></a>01384 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01385"></a>01385
<a name="l01386"></a>01386 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a1c803cc4a4f514cd4027a798d9236e5e">S_PC_6</a>;
<a name="l01387"></a>01387 <span class="vhdlkeyword">end</span>
<a name="l01388"></a>01388 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ERR_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01389"></a>01389 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01390"></a>01390 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01391"></a>01391
<a name="l01392"></a>01392 <span class="vhdlchar">fault_address_state_o</span> &lt;= { <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a>, <span class="vhdllogic">2&#39;b00</span> };
<a name="l01393"></a>01393 <span class="vhdlchar">rw_state_o</span> &lt;= ~<a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a>;
<a name="l01394"></a>01394 <span class="vhdlchar">fc_state_o</span> &lt;= <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a>;
<a name="l01395"></a>01395 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <a class="code" href="classbus__control.html#a63d428a3abed8bfe070ad6e6f82ca72e">VECTOR_BUS_TRAP</a>;
<a name="l01396"></a>01396
<a name="l01397"></a>01397 <span class="vhdlchar">jmp_bus_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01398"></a>01398 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01399"></a>01399 <span class="vhdlkeyword">end</span>
<a name="l01400"></a>01400 <span class="vhdlkeyword">end</span>
<a name="l01401"></a>01401 <a class="code" href="classbus__control.html#a1c803cc4a4f514cd4027a798d9236e5e">S_PC_6</a>: <span class="vhdlkeyword">begin</span>
<a name="l01402"></a>01402 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01403"></a>01403 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01404"></a>01404
<a name="l01405"></a>01405 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#aa19b7d76f1e25fd78b158b98088bd82a">S_PC_5</a>;
<a name="l01406"></a>01406 <span class="vhdlkeyword">end</span>
<a name="l01407"></a>01407
<a name="l01408"></a>01408 <span class="keyword">//*******************</span>
<a name="l01409"></a>01409 <a class="code" href="classbus__control.html#af752b2515eb632068e26865f1569598c">S_READ_1</a>: <span class="vhdlkeyword">begin</span>
<a name="l01410"></a>01410 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ACK_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01411"></a>01411 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01412"></a>01412 <span class="keyword">//CYC_O &lt;= 1&#39;b1;</span>
<a name="l01413"></a>01413 <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> &lt;= <a class="code" href="classbus__control.html#a2997069937ed71fba6eefb8837ba3282">address_i_plus_4</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>];
<a name="l01414"></a>01414 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b1100</span>;
<a name="l01415"></a>01415 <span class="keyword">//STB_O &lt;= 1&#39;b1;</span>
<a name="l01416"></a>01416 <span class="keyword">//WE_O &lt;= 1&#39;b0;</span>
<a name="l01417"></a>01417
<a name="l01418"></a>01418 <span class="keyword">//SGL_O &lt;= 1&#39;b0;</span>
<a name="l01419"></a>01419 <span class="keyword">//BLK_O &lt;= 1&#39;b1;</span>
<a name="l01420"></a>01420 <span class="keyword">//RMW_O &lt;= 1&#39;b0;</span>
<a name="l01421"></a>01421 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
<a name="l01422"></a>01422
<a name="l01423"></a>01423 <span class="keyword">//if(supervisor_i == 1&#39;b1) fc_o &lt;= (address_type_i == 1&#39;b0) ? FC_SUPERVISOR_DATA : FC_SUPERVISOR_PROGRAM;</span>
<a name="l01424"></a>01424 <span class="keyword">//else fc_o &lt;= (address_type_i == 1&#39;b0) ? FC_USER_DATA : FC_USER_PROGRAM;</span>
<a name="l01425"></a>01425
<a name="l01426"></a>01426 <span class="vhdlchar">data_read_o</span> &lt;= { <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">16&#39;b0</span> };
<a name="l01427"></a>01427
<a name="l01428"></a>01428 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a269161b7fabba2e00d3a3a5153a9620e">S_READ_2</a>;
<a name="l01429"></a>01429 <span class="vhdlkeyword">end</span>
<a name="l01430"></a>01430 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01431"></a>01431 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">read_modify_write_i</span> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01432"></a>01432 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01433"></a>01433 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01434"></a>01434 <span class="vhdlkeyword">end</span>
<a name="l01435"></a>01435 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01436"></a>01436 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01437"></a>01437 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01438"></a>01438 <span class="vhdlkeyword">end</span>
<a name="l01439"></a>01439
<a name="l01440"></a>01440 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b00</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlchar">data_read_o</span> &lt;= <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l01441"></a>01441 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlchar">data_read_o</span> &lt;= { {<span class="vhdllogic">16</span>{<a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">15</span>]}}, <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] };
<a name="l01442"></a>01442 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b00</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlchar">data_read_o</span> &lt;= { {<span class="vhdllogic">16</span>{<a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>]}}, <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">16</span>] };
<a name="l01443"></a>01443 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlchar">data_read_o</span> &lt;= { {<span class="vhdllogic">24</span>{<a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">7</span>]}}, <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] };
<a name="l01444"></a>01444 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlchar">data_read_o</span> &lt;= { {<span class="vhdllogic">24</span>{<a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">15</span>]}}, <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>] };
<a name="l01445"></a>01445 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b01</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlchar">data_read_o</span> &lt;= { {<span class="vhdllogic">24</span>{<a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">23</span>]}}, <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">23</span>:<span class="vhdllogic">16</span>] };
<a name="l01446"></a>01446 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b00</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlchar">data_read_o</span> &lt;= { {<span class="vhdllogic">24</span>{<a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>]}}, <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">24</span>] };
<a name="l01447"></a>01447
<a name="l01448"></a>01448 <span class="vhdlchar">finished_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01449"></a>01449 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01450"></a>01450 <span class="vhdlkeyword">end</span>
<a name="l01451"></a>01451 <span class="vhdlkeyword">end</span>
<a name="l01452"></a>01452 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">RTY_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01453"></a>01453 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01454"></a>01454 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01455"></a>01455
<a name="l01456"></a>01456 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>;
<a name="l01457"></a>01457 <span class="vhdlkeyword">end</span>
<a name="l01458"></a>01458 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ERR_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01459"></a>01459 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01460"></a>01460 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01461"></a>01461
<a name="l01462"></a>01462 <span class="vhdlchar">fault_address_state_o</span> &lt;= { <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a>, <span class="vhdllogic">2&#39;b00</span> };
<a name="l01463"></a>01463 <span class="vhdlchar">rw_state_o</span> &lt;= ~<a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a>;
<a name="l01464"></a>01464 <span class="vhdlchar">fc_state_o</span> &lt;= <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a>;
<a name="l01465"></a>01465 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <a class="code" href="classbus__control.html#a63d428a3abed8bfe070ad6e6f82ca72e">VECTOR_BUS_TRAP</a>;
<a name="l01466"></a>01466
<a name="l01467"></a>01467 <span class="vhdlchar">jmp_bus_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01468"></a>01468 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01469"></a>01469 <span class="vhdlkeyword">end</span>
<a name="l01470"></a>01470 <span class="vhdlkeyword">end</span>
<a name="l01471"></a>01471 <a class="code" href="classbus__control.html#a269161b7fabba2e00d3a3a5153a9620e">S_READ_2</a>: <span class="vhdlkeyword">begin</span>
<a name="l01472"></a>01472 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ACK_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01473"></a>01473 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01474"></a>01474 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01475"></a>01475
<a name="l01476"></a>01476 <span class="vhdlchar">data_read_o</span> &lt;= { <span class="vhdlchar">data_read_o</span>[<span class="vhdllogic">31</span>:<span class="vhdllogic">16</span>], <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">16</span>] };
<a name="l01477"></a>01477
<a name="l01478"></a>01478 <span class="vhdlchar">finished_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01479"></a>01479 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01480"></a>01480
<a name="l01481"></a>01481 <span class="vhdlkeyword">end</span>
<a name="l01482"></a>01482 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">RTY_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01483"></a>01483 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01484"></a>01484 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01485"></a>01485
<a name="l01486"></a>01486 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a8af7b5fb8c5d5d3788e5af5dad48393b">S_READ_3</a>;
<a name="l01487"></a>01487 <span class="vhdlkeyword">end</span>
<a name="l01488"></a>01488 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ERR_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01489"></a>01489 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01490"></a>01490 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01491"></a>01491
<a name="l01492"></a>01492 <span class="vhdlchar">fault_address_state_o</span> &lt;= { <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a>, <span class="vhdllogic">2&#39;b00</span> };
<a name="l01493"></a>01493 <span class="vhdlchar">rw_state_o</span> &lt;= ~<a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a>;
<a name="l01494"></a>01494 <span class="vhdlchar">fc_state_o</span> &lt;= <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a>;
<a name="l01495"></a>01495 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <a class="code" href="classbus__control.html#a63d428a3abed8bfe070ad6e6f82ca72e">VECTOR_BUS_TRAP</a>;
<a name="l01496"></a>01496
<a name="l01497"></a>01497 <span class="vhdlchar">jmp_bus_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01498"></a>01498 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01499"></a>01499 <span class="vhdlkeyword">end</span>
<a name="l01500"></a>01500
<a name="l01501"></a>01501 <span class="vhdlkeyword">end</span>
<a name="l01502"></a>01502 <a class="code" href="classbus__control.html#a8af7b5fb8c5d5d3788e5af5dad48393b">S_READ_3</a>: <span class="vhdlkeyword">begin</span>
<a name="l01503"></a>01503 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01504"></a>01504 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01505"></a>01505
<a name="l01506"></a>01506 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a269161b7fabba2e00d3a3a5153a9620e">S_READ_2</a>;
<a name="l01507"></a>01507 <span class="vhdlkeyword">end</span>
<a name="l01508"></a>01508
<a name="l01509"></a>01509 <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>: <span class="vhdlkeyword">begin</span>
<a name="l01510"></a>01510 <span class="vhdlchar">jmp_address_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01511"></a>01511 <span class="vhdlchar">jmp_bus_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01512"></a>01512
<a name="l01513"></a>01513 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_read_i</span> == <span class="vhdllogic">1&#39;b0</span> &amp;&amp; <span class="vhdlchar">do_write_i</span> == <span class="vhdllogic">1&#39;b0</span> &amp;&amp; <span class="vhdlchar">do_interrupt_i</span> == <span class="vhdllogic">1&#39;b0</span> &amp;&amp; <span class="vhdlchar">do_reset_i</span> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>
<a name="l01514"></a>01514 <span class="vhdlchar">finished_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01515"></a>01515 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>;
<a name="l01516"></a>01516 <span class="vhdlkeyword">end</span>
<a name="l01517"></a>01517 <span class="vhdlkeyword">end</span>
<a name="l01518"></a>01518
<a name="l01519"></a>01519 <span class="keyword">//**********************</span>
<a name="l01520"></a>01520 <a class="code" href="classbus__control.html#aad6d7bc2df8264837b68548b4045a54b">S_WRITE_1</a>: <span class="vhdlkeyword">begin</span>
<a name="l01521"></a>01521 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ACK_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01522"></a>01522 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01523"></a>01523 <span class="keyword">//CYC_O &lt;= 1&#39;b1;</span>
<a name="l01524"></a>01524 <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> &lt;= <a class="code" href="classbus__control.html#a2997069937ed71fba6eefb8837ba3282">address_i_plus_4</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>];
<a name="l01525"></a>01525 <span class="keyword">//STB_O &lt;= 1&#39;b1;</span>
<a name="l01526"></a>01526 <span class="keyword">//WE_O &lt;= 1&#39;b1;</span>
<a name="l01527"></a>01527
<a name="l01528"></a>01528 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> &lt;= { <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">16&#39;b0</span> };
<a name="l01529"></a>01529 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b1100</span>;
<a name="l01530"></a>01530
<a name="l01531"></a>01531 <span class="keyword">//SGL_O &lt;= 1&#39;b0;</span>
<a name="l01532"></a>01532 <span class="keyword">//BLK_O &lt;= 1&#39;b1;</span>
<a name="l01533"></a>01533 <span class="keyword">//RMW_O &lt;= 1&#39;b0;</span>
<a name="l01534"></a>01534 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
<a name="l01535"></a>01535
<a name="l01536"></a>01536 <span class="keyword">//if(supervisor_i == 1&#39;b1) fc_o &lt;= FC_SUPERVISOR_DATA;</span>
<a name="l01537"></a>01537 <span class="keyword">//else fc_o &lt;= FC_USER_DATA;</span>
<a name="l01538"></a>01538
<a name="l01539"></a>01539 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a1f273f6cbe8fa88c5ac793cdb16128c5">S_WRITE_2</a>;
<a name="l01540"></a>01540 <span class="vhdlkeyword">end</span>
<a name="l01541"></a>01541 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01542"></a>01542 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01543"></a>01543 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01544"></a>01544
<a name="l01545"></a>01545 <span class="vhdlchar">finished_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01546"></a>01546 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01547"></a>01547 <span class="vhdlkeyword">end</span>
<a name="l01548"></a>01548 <span class="vhdlkeyword">end</span>
<a name="l01549"></a>01549 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">RTY_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01550"></a>01550 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01551"></a>01551 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01552"></a>01552
<a name="l01553"></a>01553 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>;
<a name="l01554"></a>01554 <span class="vhdlkeyword">end</span>
<a name="l01555"></a>01555 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ERR_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01556"></a>01556 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01557"></a>01557 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01558"></a>01558
<a name="l01559"></a>01559 <span class="vhdlchar">fault_address_state_o</span> &lt;= { <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a>, <span class="vhdllogic">2&#39;b00</span> };
<a name="l01560"></a>01560 <span class="vhdlchar">rw_state_o</span> &lt;= ~<a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a>;
<a name="l01561"></a>01561 <span class="vhdlchar">fc_state_o</span> &lt;= <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a>;
<a name="l01562"></a>01562 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <a class="code" href="classbus__control.html#a63d428a3abed8bfe070ad6e6f82ca72e">VECTOR_BUS_TRAP</a>;
<a name="l01563"></a>01563
<a name="l01564"></a>01564 <span class="vhdlchar">jmp_bus_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01565"></a>01565 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01566"></a>01566 <span class="vhdlkeyword">end</span>
<a name="l01567"></a>01567
<a name="l01568"></a>01568 <span class="vhdlkeyword">end</span>
<a name="l01569"></a>01569 <a class="code" href="classbus__control.html#a1f273f6cbe8fa88c5ac793cdb16128c5">S_WRITE_2</a>: <span class="vhdlkeyword">begin</span>
<a name="l01570"></a>01570 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ACK_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01571"></a>01571 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01572"></a>01572 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01573"></a>01573
<a name="l01574"></a>01574 <span class="vhdlchar">finished_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01575"></a>01575 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01576"></a>01576
<a name="l01577"></a>01577 <span class="vhdlkeyword">end</span>
<a name="l01578"></a>01578 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">RTY_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01579"></a>01579 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01580"></a>01580 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01581"></a>01581
<a name="l01582"></a>01582 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#aa913a2abc1c8f2afa2bb8f6ebcbbca01">S_WRITE_3</a>;
<a name="l01583"></a>01583 <span class="vhdlkeyword">end</span>
<a name="l01584"></a>01584 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ERR_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01585"></a>01585 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01586"></a>01586 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01587"></a>01587
<a name="l01588"></a>01588 <span class="vhdlchar">fault_address_state_o</span> &lt;= { <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a>, <span class="vhdllogic">2&#39;b00</span> };
<a name="l01589"></a>01589 <span class="vhdlchar">rw_state_o</span> &lt;= ~<a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a>;
<a name="l01590"></a>01590 <span class="vhdlchar">fc_state_o</span> &lt;= <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a>;
<a name="l01591"></a>01591 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <a class="code" href="classbus__control.html#a63d428a3abed8bfe070ad6e6f82ca72e">VECTOR_BUS_TRAP</a>;
<a name="l01592"></a>01592
<a name="l01593"></a>01593 <span class="vhdlchar">jmp_bus_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01594"></a>01594 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01595"></a>01595 <span class="vhdlkeyword">end</span>
<a name="l01596"></a>01596
<a name="l01597"></a>01597 <span class="vhdlkeyword">end</span>
<a name="l01598"></a>01598 <a class="code" href="classbus__control.html#aa913a2abc1c8f2afa2bb8f6ebcbbca01">S_WRITE_3</a>: <span class="vhdlkeyword">begin</span>
<a name="l01599"></a>01599 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01600"></a>01600 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01601"></a>01601
<a name="l01602"></a>01602 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a1f273f6cbe8fa88c5ac793cdb16128c5">S_WRITE_2</a>;
<a name="l01603"></a>01603 <span class="vhdlkeyword">end</span>
<a name="l01604"></a>01604
<a name="l01605"></a>01605 <span class="vhdlkeyword">endcase</span>
<a name="l01606"></a>01606 <span class="vhdlkeyword">end</span>
<a name="l01607"></a>01607 <span class="vhdlkeyword">end</span>
<a name="l01608"></a>01608
<a name="l01609"></a>01609 <span class="vhdlkeyword">endmodule</span>
<a name="l01610"></a>01610
<a name="l01611"></a>01611 <span class="keyword">/***********************************************************************************************************************</span>
<a name="l01612"></a>01612 <span class="keyword"> Registers</span>
<a name="l01613"></a>01613 <span class="keyword"> ***********************************************************************************************************************/</span>
<a name="l01614"></a>01614
<a name="l01509"></a>01509
<a name="l01510"></a>01510 <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>: <span class="vhdlkeyword">begin</span>
<a name="l01511"></a>01511 <span class="vhdlchar">jmp_address_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01512"></a>01512 <span class="vhdlchar">jmp_bus_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01513"></a>01513
<a name="l01514"></a>01514 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_read_i</span> == <span class="vhdllogic">1&#39;b0</span> &amp;&amp; <span class="vhdlchar">do_write_i</span> == <span class="vhdllogic">1&#39;b0</span> &amp;&amp; <span class="vhdlchar">do_interrupt_i</span> == <span class="vhdllogic">1&#39;b0</span> &amp;&amp; <span class="vhdlchar">do_reset_i</span> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>
<a name="l01515"></a>01515 <span class="vhdlchar">finished_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01516"></a>01516 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>;
<a name="l01517"></a>01517 <span class="vhdlkeyword">end</span>
<a name="l01518"></a>01518 <span class="vhdlkeyword">end</span>
<a name="l01519"></a>01519
<a name="l01520"></a>01520 <span class="keyword">//**********************</span>
<a name="l01521"></a>01521 <a class="code" href="classbus__control.html#aad6d7bc2df8264837b68548b4045a54b">S_WRITE_1</a>: <span class="vhdlkeyword">begin</span>
<a name="l01522"></a>01522 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ACK_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01523"></a>01523 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01524"></a>01524 <span class="keyword">//CYC_O &lt;= 1&#39;b1;</span>
<a name="l01525"></a>01525 <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> &lt;= <a class="code" href="classbus__control.html#a2997069937ed71fba6eefb8837ba3282">address_i_plus_4</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>];
<a name="l01526"></a>01526 <span class="keyword">//STB_O &lt;= 1&#39;b1;</span>
<a name="l01527"></a>01527 <span class="keyword">//WE_O &lt;= 1&#39;b1;</span>
<a name="l01528"></a>01528
<a name="l01529"></a>01529 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> &lt;= { <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">16&#39;b0</span> };
<a name="l01530"></a>01530 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b1100</span>;
<a name="l01531"></a>01531
<a name="l01532"></a>01532 <span class="keyword">//SGL_O &lt;= 1&#39;b0;</span>
<a name="l01533"></a>01533 <span class="keyword">//BLK_O &lt;= 1&#39;b1;</span>
<a name="l01534"></a>01534 <span class="keyword">//RMW_O &lt;= 1&#39;b0;</span>
<a name="l01535"></a>01535 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
<a name="l01536"></a>01536
<a name="l01537"></a>01537 <span class="keyword">//if(supervisor_i == 1&#39;b1) fc_o &lt;= FC_SUPERVISOR_DATA;</span>
<a name="l01538"></a>01538 <span class="keyword">//else fc_o &lt;= FC_USER_DATA;</span>
<a name="l01539"></a>01539
<a name="l01540"></a>01540 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a1f273f6cbe8fa88c5ac793cdb16128c5">S_WRITE_2</a>;
<a name="l01541"></a>01541 <span class="vhdlkeyword">end</span>
<a name="l01542"></a>01542 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01543"></a>01543 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01544"></a>01544 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01545"></a>01545
<a name="l01546"></a>01546 <span class="vhdlchar">finished_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01547"></a>01547 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01548"></a>01548 <span class="vhdlkeyword">end</span>
<a name="l01549"></a>01549 <span class="vhdlkeyword">end</span>
<a name="l01550"></a>01550 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">RTY_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01551"></a>01551 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01552"></a>01552 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01553"></a>01553
<a name="l01554"></a>01554 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>;
<a name="l01555"></a>01555 <span class="vhdlkeyword">end</span>
<a name="l01556"></a>01556 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ERR_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01557"></a>01557 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01558"></a>01558 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01559"></a>01559
<a name="l01560"></a>01560 <span class="vhdlchar">fault_address_state_o</span> &lt;= { <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a>, <span class="vhdllogic">2&#39;b00</span> };
<a name="l01561"></a>01561 <span class="vhdlchar">rw_state_o</span> &lt;= ~<a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a>;
<a name="l01562"></a>01562 <span class="vhdlchar">fc_state_o</span> &lt;= <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a>;
<a name="l01563"></a>01563 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <a class="code" href="classbus__control.html#a63d428a3abed8bfe070ad6e6f82ca72e">VECTOR_BUS_TRAP</a>;
<a name="l01564"></a>01564
<a name="l01565"></a>01565 <span class="vhdlchar">jmp_bus_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01566"></a>01566 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01567"></a>01567 <span class="vhdlkeyword">end</span>
<a name="l01568"></a>01568
<a name="l01569"></a>01569 <span class="vhdlkeyword">end</span>
<a name="l01570"></a>01570 <a class="code" href="classbus__control.html#a1f273f6cbe8fa88c5ac793cdb16128c5">S_WRITE_2</a>: <span class="vhdlkeyword">begin</span>
<a name="l01571"></a>01571 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ACK_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01572"></a>01572 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01573"></a>01573 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01574"></a>01574
<a name="l01575"></a>01575 <span class="vhdlchar">finished_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01576"></a>01576 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01577"></a>01577
<a name="l01578"></a>01578 <span class="vhdlkeyword">end</span>
<a name="l01579"></a>01579 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">RTY_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01580"></a>01580 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01581"></a>01581 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01582"></a>01582
<a name="l01583"></a>01583 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#aa913a2abc1c8f2afa2bb8f6ebcbbca01">S_WRITE_3</a>;
<a name="l01584"></a>01584 <span class="vhdlkeyword">end</span>
<a name="l01585"></a>01585 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ERR_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01586"></a>01586 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01587"></a>01587 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01588"></a>01588
<a name="l01589"></a>01589 <span class="vhdlchar">fault_address_state_o</span> &lt;= { <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a>, <span class="vhdllogic">2&#39;b00</span> };
<a name="l01590"></a>01590 <span class="vhdlchar">rw_state_o</span> &lt;= ~<a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a>;
<a name="l01591"></a>01591 <span class="vhdlchar">fc_state_o</span> &lt;= <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a>;
<a name="l01592"></a>01592 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <a class="code" href="classbus__control.html#a63d428a3abed8bfe070ad6e6f82ca72e">VECTOR_BUS_TRAP</a>;
<a name="l01593"></a>01593
<a name="l01594"></a>01594 <span class="vhdlchar">jmp_bus_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01595"></a>01595 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01596"></a>01596 <span class="vhdlkeyword">end</span>
<a name="l01597"></a>01597
<a name="l01598"></a>01598 <span class="vhdlkeyword">end</span>
<a name="l01599"></a>01599 <a class="code" href="classbus__control.html#aa913a2abc1c8f2afa2bb8f6ebcbbca01">S_WRITE_3</a>: <span class="vhdlkeyword">begin</span>
<a name="l01600"></a>01600 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01601"></a>01601 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01602"></a>01602
<a name="l01603"></a>01603 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a1f273f6cbe8fa88c5ac793cdb16128c5">S_WRITE_2</a>;
<a name="l01604"></a>01604 <span class="vhdlkeyword">end</span>
<a name="l01605"></a>01605
<a name="l01606"></a>01606 <span class="vhdlkeyword">endcase</span>
<a name="l01607"></a>01607 <span class="vhdlkeyword">end</span>
<a name="l01608"></a>01608 <span class="vhdlkeyword">end</span>
<a name="l01609"></a>01609
<a name="l01610"></a>01610 <span class="vhdlkeyword">endmodule</span>
<a name="l01611"></a>01611
<a name="l01612"></a>01612 <span class="keyword">/***********************************************************************************************************************</span>
<a name="l01613"></a>01613 <span class="keyword"> Registers</span>
<a name="l01614"></a>01614 <span class="keyword"> ***********************************************************************************************************************/</span>
<a name="l01615"></a>01615
<a name="l01626"></a><a class="code" href="classregisters.html">01626</a> <span class="vhdlkeyword">module</span> <a class="code" href="classregisters.html">registers</a>(
<a name="l01627"></a><a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">01627</a> <span class="vhdlkeyword">input</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a>,
<a name="l01628"></a><a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">01628</a> <span class="vhdlkeyword">input</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>,
<a name="l01629"></a>01629
<a name="l01630"></a><a class="code" href="classregisters.html#a0cdf5b5316a0edcd85909fc9da5ca864">01630</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classregisters.html#a0cdf5b5316a0edcd85909fc9da5ca864">data_read</a>,
<a name="l01631"></a><a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">01631</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">79</span>:<span class="vhdllogic">0</span>] <a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>,
<a name="l01632"></a><a class="code" href="classregisters.html#a8031b93d1dc568b98697eb0c81b13bfd">01632</a> <span class="vhdlkeyword">input</span> <a class="code" href="classregisters.html#a8031b93d1dc568b98697eb0c81b13bfd">prefetch_ir_valid</a>,
<a name="l01633"></a><a class="code" href="classregisters.html#ad27ecd2d9ef571fa88b998f3674fe9a6">01633</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classregisters.html#ad27ecd2d9ef571fa88b998f3674fe9a6">result</a>,
<a name="l01634"></a><a class="code" href="classregisters.html#a116473c99b3cbf75fd0f48a25ea9227e">01634</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] <a class="code" href="classregisters.html#a116473c99b3cbf75fd0f48a25ea9227e">sr</a>,
<a name="l01635"></a><a class="code" href="classregisters.html#ae12d419de758617259ab74281fd09f03">01635</a> <span class="vhdlkeyword">input</span> <a class="code" href="classregisters.html#ae12d419de758617259ab74281fd09f03">rw_state</a>,
<a name="l01636"></a><a class="code" href="classregisters.html#a1864a58a4089bd5d72ba19730137c5ce">01636</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classregisters.html#a1864a58a4089bd5d72ba19730137c5ce">fc_state</a>,
<a name="l01637"></a><a class="code" href="classregisters.html#acfc96bc559a0660239cb6b8a8836b862">01637</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classregisters.html#acfc96bc559a0660239cb6b8a8836b862">fault_address_state</a>,
<a name="l01638"></a><a class="code" href="classregisters.html#a10ef9845f594ecc956dc1b1c8cdef44e">01638</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] <a class="code" href="classregisters.html#a10ef9845f594ecc956dc1b1c8cdef44e">interrupt_trap</a>,
<a name="l01639"></a><a class="code" href="classregisters.html#aa92eeffb2c5af01c413399dfb1f58b17">01639</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classregisters.html#aa92eeffb2c5af01c413399dfb1f58b17">interrupt_mask</a>,
<a name="l01640"></a><a class="code" href="classregisters.html#a278b33a84015867a530ac4279331d570">01640</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] <a class="code" href="classregisters.html#a278b33a84015867a530ac4279331d570">decoder_trap</a>,
<a name="l01641"></a>01641
<a name="l01642"></a><a class="code" href="classregisters.html#a6810e76be48010f9b34a91c27ddd636b">01642</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classregisters.html#a6810e76be48010f9b34a91c27ddd636b">usp</a>,
<a name="l01643"></a><a class="code" href="classregisters.html#a659bea909e94f7512c4311bcff473a5d">01643</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classregisters.html#a659bea909e94f7512c4311bcff473a5d">Dn_output</a>,
<a name="l01644"></a><a class="code" href="classregisters.html#a7fdc26691a005524667257529b1c1212">01644</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classregisters.html#a7fdc26691a005524667257529b1c1212">An_output</a>,
<a name="l01645"></a>01645
<a name="l01646"></a><a class="code" href="classregisters.html#a73f335a76d3869b20956c67a67ff8f6e">01646</a> <span class="vhdlkeyword">output</span> [<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] <a class="code" href="classregisters.html#a73f335a76d3869b20956c67a67ff8f6e">pc_change</a>,
<a name="l01647"></a>01647
<a name="l01648"></a><a class="code" href="classregisters.html#aa1a45d113f21dba8f82a93ddfe1d6409">01648</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classregisters.html#aa1a45d113f21dba8f82a93ddfe1d6409">ea_reg</a>,
<a name="l01649"></a><a class="code" href="classregisters.html#ae09341fa22dc0b4675dc02dc4a5fb918">01649</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classregisters.html#ae09341fa22dc0b4675dc02dc4a5fb918">ea_reg_control</a>,
<a name="l01650"></a>01650
<a name="l01651"></a><a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">01651</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ea_mod</a>,
<a name="l01652"></a><a class="code" href="classregisters.html#af6205981eadd3ee1e9fa193f04b6a893">01652</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] <a class="code" href="classregisters.html#af6205981eadd3ee1e9fa193f04b6a893">ea_mod_control</a>,
<a name="l01653"></a>01653
<a name="l01654"></a><a class="code" href="classregisters.html#a34f0e8ea4d6f79a3c8cf7e3ba129ea58">01654</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] <a class="code" href="classregisters.html#a34f0e8ea4d6f79a3c8cf7e3ba129ea58">ea_type</a>,
<a name="l01655"></a><a class="code" href="classregisters.html#aa22fa504627eea9bff308c3358ef9240">01655</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] <a class="code" href="classregisters.html#aa22fa504627eea9bff308c3358ef9240">ea_type_control</a>,
<a name="l01656"></a>01656
<a name="l01657"></a>01657 <span class="keyword">// for DIVU/DIVS simulation, register must be not zero</span>
<a name="l01658"></a><a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">01658</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> = <span class="vhdllogic">32&#39;hFFFFFFFF</span>,
<a name="l01659"></a>01659 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] operand1_control,
<a name="l01660"></a>01660
<a name="l01661"></a>01661 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] operand2 = <span class="vhdllogic">32&#39;hFFFFFFFF</span>,
<a name="l01662"></a>01662 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] operand2_control,
<a name="l01663"></a>01663
<a name="l01664"></a>01664 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] address,
<a name="l01665"></a>01665 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> address_type,
<a name="l01666"></a>01666 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] address_control,
<a name="l01667"></a>01667
<a name="l01668"></a>01668 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] size,
<a name="l01669"></a>01669 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] size_control,
<a name="l01670"></a>01670
<a name="l01671"></a>01671 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] movem_modreg,
<a name="l01672"></a>01672 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] movem_modreg_control,
<a name="l01673"></a>01673
<a name="l01674"></a>01674 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">4</span>:<span class="vhdllogic">0</span>] movem_loop,
<a name="l01675"></a>01675 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] movem_loop_control,
<a name="l01676"></a>01676
<a name="l01677"></a>01677 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] movem_reg,
<a name="l01678"></a>01678 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] movem_reg_control,
<a name="l01679"></a>01679
<a name="l01680"></a>01680 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] ir,
<a name="l01681"></a>01681 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] ir_control,
<a name="l01682"></a>01682
<a name="l01683"></a>01683 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] pc,
<a name="l01684"></a>01684 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] pc_control,
<a name="l01685"></a>01685
<a name="l01686"></a>01686 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] trap,
<a name="l01687"></a>01687 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] trap_control,
<a name="l01688"></a>01688
<a name="l01689"></a>01689 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] offset,
<a name="l01690"></a>01690 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] offset_control,
<a name="l01691"></a>01691
<a name="l01692"></a>01692 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] index,
<a name="l01693"></a>01693 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] index_control,
<a name="l01694"></a>01694
<a name="l01616"></a>01616
<a name="l01627"></a><a class="code" href="classregisters.html">01627</a> <span class="vhdlkeyword">module</span> <a class="code" href="classregisters.html">registers</a>(
<a name="l01628"></a><a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">01628</a> <span class="vhdlkeyword">input</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a>,
<a name="l01629"></a><a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">01629</a> <span class="vhdlkeyword">input</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>,
<a name="l01630"></a>01630
<a name="l01631"></a><a class="code" href="classregisters.html#a0cdf5b5316a0edcd85909fc9da5ca864">01631</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classregisters.html#a0cdf5b5316a0edcd85909fc9da5ca864">data_read</a>,
<a name="l01632"></a><a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">01632</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">79</span>:<span class="vhdllogic">0</span>] <a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>,
<a name="l01633"></a><a class="code" href="classregisters.html#a8031b93d1dc568b98697eb0c81b13bfd">01633</a> <span class="vhdlkeyword">input</span> <a class="code" href="classregisters.html#a8031b93d1dc568b98697eb0c81b13bfd">prefetch_ir_valid</a>,
<a name="l01634"></a><a class="code" href="classregisters.html#ad27ecd2d9ef571fa88b998f3674fe9a6">01634</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classregisters.html#ad27ecd2d9ef571fa88b998f3674fe9a6">result</a>,
<a name="l01635"></a><a class="code" href="classregisters.html#a116473c99b3cbf75fd0f48a25ea9227e">01635</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] <a class="code" href="classregisters.html#a116473c99b3cbf75fd0f48a25ea9227e">sr</a>,
<a name="l01636"></a><a class="code" href="classregisters.html#ae12d419de758617259ab74281fd09f03">01636</a> <span class="vhdlkeyword">input</span> <a class="code" href="classregisters.html#ae12d419de758617259ab74281fd09f03">rw_state</a>,
<a name="l01637"></a><a class="code" href="classregisters.html#a1864a58a4089bd5d72ba19730137c5ce">01637</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classregisters.html#a1864a58a4089bd5d72ba19730137c5ce">fc_state</a>,
<a name="l01638"></a><a class="code" href="classregisters.html#acfc96bc559a0660239cb6b8a8836b862">01638</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classregisters.html#acfc96bc559a0660239cb6b8a8836b862">fault_address_state</a>,
<a name="l01639"></a><a class="code" href="classregisters.html#a10ef9845f594ecc956dc1b1c8cdef44e">01639</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] <a class="code" href="classregisters.html#a10ef9845f594ecc956dc1b1c8cdef44e">interrupt_trap</a>,
<a name="l01640"></a><a class="code" href="classregisters.html#aa92eeffb2c5af01c413399dfb1f58b17">01640</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classregisters.html#aa92eeffb2c5af01c413399dfb1f58b17">interrupt_mask</a>,
<a name="l01641"></a><a class="code" href="classregisters.html#a278b33a84015867a530ac4279331d570">01641</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] <a class="code" href="classregisters.html#a278b33a84015867a530ac4279331d570">decoder_trap</a>,
<a name="l01642"></a>01642
<a name="l01643"></a><a class="code" href="classregisters.html#a6810e76be48010f9b34a91c27ddd636b">01643</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classregisters.html#a6810e76be48010f9b34a91c27ddd636b">usp</a>,
<a name="l01644"></a><a class="code" href="classregisters.html#a659bea909e94f7512c4311bcff473a5d">01644</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classregisters.html#a659bea909e94f7512c4311bcff473a5d">Dn_output</a>,
<a name="l01645"></a><a class="code" href="classregisters.html#a7fdc26691a005524667257529b1c1212">01645</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classregisters.html#a7fdc26691a005524667257529b1c1212">An_output</a>,
<a name="l01646"></a>01646
<a name="l01647"></a><a class="code" href="classregisters.html#a73f335a76d3869b20956c67a67ff8f6e">01647</a> <span class="vhdlkeyword">output</span> [<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] <a class="code" href="classregisters.html#a73f335a76d3869b20956c67a67ff8f6e">pc_change</a>,
<a name="l01648"></a>01648
<a name="l01649"></a><a class="code" href="classregisters.html#aa1a45d113f21dba8f82a93ddfe1d6409">01649</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classregisters.html#aa1a45d113f21dba8f82a93ddfe1d6409">ea_reg</a>,
<a name="l01650"></a><a class="code" href="classregisters.html#ae09341fa22dc0b4675dc02dc4a5fb918">01650</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classregisters.html#ae09341fa22dc0b4675dc02dc4a5fb918">ea_reg_control</a>,
<a name="l01651"></a>01651
<a name="l01652"></a><a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">01652</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ea_mod</a>,
<a name="l01653"></a><a class="code" href="classregisters.html#af6205981eadd3ee1e9fa193f04b6a893">01653</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] <a class="code" href="classregisters.html#af6205981eadd3ee1e9fa193f04b6a893">ea_mod_control</a>,
<a name="l01654"></a>01654
<a name="l01655"></a><a class="code" href="classregisters.html#a34f0e8ea4d6f79a3c8cf7e3ba129ea58">01655</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] <a class="code" href="classregisters.html#a34f0e8ea4d6f79a3c8cf7e3ba129ea58">ea_type</a>,
<a name="l01656"></a><a class="code" href="classregisters.html#aa22fa504627eea9bff308c3358ef9240">01656</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] <a class="code" href="classregisters.html#aa22fa504627eea9bff308c3358ef9240">ea_type_control</a>,
<a name="l01657"></a>01657
<a name="l01658"></a>01658 <span class="keyword">// for DIVU/DIVS simulation, register must be not zero</span>
<a name="l01659"></a><a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">01659</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> = <span class="vhdllogic">32&#39;hFFFFFFFF</span>,
<a name="l01660"></a>01660 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] operand1_control,
<a name="l01661"></a>01661
<a name="l01662"></a>01662 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] operand2 = <span class="vhdllogic">32&#39;hFFFFFFFF</span>,
<a name="l01663"></a>01663 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] operand2_control,
<a name="l01664"></a>01664
<a name="l01665"></a>01665 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] address,
<a name="l01666"></a>01666 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> address_type,
<a name="l01667"></a>01667 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] address_control,
<a name="l01668"></a>01668
<a name="l01669"></a>01669 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] size,
<a name="l01670"></a>01670 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] size_control,
<a name="l01671"></a>01671
<a name="l01672"></a>01672 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] movem_modreg,
<a name="l01673"></a>01673 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] movem_modreg_control,
<a name="l01674"></a>01674
<a name="l01675"></a>01675 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">4</span>:<span class="vhdllogic">0</span>] movem_loop,
<a name="l01676"></a>01676 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] movem_loop_control,
<a name="l01677"></a>01677
<a name="l01678"></a>01678 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] movem_reg,
<a name="l01679"></a>01679 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] movem_reg_control,
<a name="l01680"></a>01680
<a name="l01681"></a>01681 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] ir,
<a name="l01682"></a>01682 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] ir_control,
<a name="l01683"></a>01683
<a name="l01684"></a>01684 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] pc,
<a name="l01685"></a>01685 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] pc_control,
<a name="l01686"></a>01686
<a name="l01687"></a>01687 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] trap,
<a name="l01688"></a>01688 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] trap_control,
<a name="l01689"></a>01689
<a name="l01690"></a>01690 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] offset,
<a name="l01691"></a>01691 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] offset_control,
<a name="l01692"></a>01692
<a name="l01693"></a>01693 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] index,
<a name="l01694"></a>01694 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] index_control,
<a name="l01695"></a>01695
<a name="l01696"></a>01696 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> stop_flag,
<a name="l01697"></a>01697 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] stop_flag_control,
<a name="l01698"></a>01698
<a name="l01699"></a>01699 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> trace_flag,
<a name="l01700"></a>01700 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] trace_flag_control,
<a name="l01701"></a>01701
<a name="l01702"></a>01702 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> group_0_flag,
<a name="l01703"></a>01703 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] group_0_flag_control,
<a name="l01704"></a>01704
<a name="l01705"></a>01705 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> instruction_flag,
<a name="l01706"></a>01706 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] instruction_flag_control,
<a name="l01707"></a>01707
<a name="l01708"></a>01708 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> read_modify_write_flag,
<a name="l01709"></a>01709 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] read_modify_write_flag_control,
<a name="l01710"></a>01710
<a name="l01711"></a>01711 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> do_reset_flag,
<a name="l01712"></a>01712 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] do_reset_flag_control,
<a name="l01713"></a>01713
<a name="l01714"></a>01714 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> do_interrupt_flag,
<a name="l01715"></a>01715 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] do_interrupt_flag_control,
<a name="l01716"></a>01716
<a name="l01717"></a>01717 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> do_read_flag,
<a name="l01718"></a>01718 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] do_read_flag_control,
<a name="l01719"></a>01719
<a name="l01720"></a>01720 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> do_write_flag,
<a name="l01721"></a>01721 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] do_write_flag_control,
<a name="l01722"></a>01722
<a name="l01723"></a>01723 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> do_blocked_flag,
<a name="l01724"></a>01724 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] do_blocked_flag_control,
<a name="l01725"></a>01725
<a name="l01726"></a>01726 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] data_write,
<a name="l01727"></a>01727 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] data_write_control,
<a name="l01728"></a>01728
<a name="l01696"></a>01696
<a name="l01697"></a>01697 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> stop_flag,
<a name="l01698"></a>01698 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] stop_flag_control,
<a name="l01699"></a>01699
<a name="l01700"></a>01700 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> trace_flag,
<a name="l01701"></a>01701 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] trace_flag_control,
<a name="l01702"></a>01702
<a name="l01703"></a>01703 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> group_0_flag,
<a name="l01704"></a>01704 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] group_0_flag_control,
<a name="l01705"></a>01705
<a name="l01706"></a>01706 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> instruction_flag,
<a name="l01707"></a>01707 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] instruction_flag_control,
<a name="l01708"></a>01708
<a name="l01709"></a>01709 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> read_modify_write_flag,
<a name="l01710"></a>01710 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] read_modify_write_flag_control,
<a name="l01711"></a>01711
<a name="l01712"></a>01712 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> do_reset_flag,
<a name="l01713"></a>01713 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] do_reset_flag_control,
<a name="l01714"></a>01714
<a name="l01715"></a>01715 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> do_interrupt_flag,
<a name="l01716"></a>01716 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] do_interrupt_flag_control,
<a name="l01717"></a>01717
<a name="l01718"></a>01718 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> do_read_flag,
<a name="l01719"></a>01719 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] do_read_flag_control,
<a name="l01720"></a>01720
<a name="l01721"></a>01721 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> do_write_flag,
<a name="l01722"></a>01722 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] do_write_flag_control,
<a name="l01723"></a>01723
<a name="l01724"></a>01724 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> do_blocked_flag,
<a name="l01725"></a>01725 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] do_blocked_flag_control,
<a name="l01726"></a>01726
<a name="l01727"></a>01727 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] data_write,
<a name="l01728"></a>01728 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] data_write_control,
<a name="l01729"></a>01729
<a name="l01730"></a>01730 <span class="vhdlkeyword">output</span> [<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] An_address,
<a name="l01731"></a>01731 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] An_address_control,
<a name="l01732"></a>01732
<a name="l01733"></a>01733 <span class="vhdlkeyword">output</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] An_input,
<a name="l01734"></a>01734 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] An_input_control,
<a name="l01735"></a>01735
<a name="l01736"></a>01736 <span class="vhdlkeyword">output</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] Dn_address,
<a name="l01737"></a>01737 <span class="vhdlkeyword">input</span> Dn_address_control,
<a name="l01738"></a>01738
<a name="l01739"></a>01739 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">17</span>:<span class="vhdllogic">0</span>] decoder_alu,
<a name="l01740"></a>01740 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">17</span>:<span class="vhdllogic">0</span>] decoder_alu_reg
<a name="l01741"></a>01741 );
<a name="l01742"></a>01742
<a name="l01743"></a><a class="code" href="classregisters.html#af160a45a0b3cd7794efb7fea1ed60526">01743</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classregisters.html#af160a45a0b3cd7794efb7fea1ed60526">pc_valid</a>;
<a name="l01744"></a>01744
<a name="l01745"></a>01745 <span class="keyword">// pc_change connected</span>
<a name="l01746"></a><a class="code" href="classregisters.html#a1634ef9b02cbeb72da694a9145e2d276">01746</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01747"></a>01747 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>
<a name="l01748"></a>01748 <span class="vhdlchar">pc</span> &lt;= <span class="vhdllogic">32&#39;d0</span>;
<a name="l01749"></a>01749 <a class="code" href="classregisters.html#af160a45a0b3cd7794efb7fea1ed60526">pc_valid</a> &lt;= <span class="vhdllogic">32&#39;d0</span>;
<a name="l01750"></a>01750 <span class="vhdlkeyword">end</span>
<a name="l01751"></a>01751 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01752"></a>01752 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_control</span> == <a class="code" href="ao68000_8v.html#a63d3becb9e2a770cfd9df4a70298c30a">`PC_FROM_RESULT</a><span class="vhdlchar"></span>) <span class="vhdlchar">pc</span> = <a class="code" href="classregisters.html#ad27ecd2d9ef571fa88b998f3674fe9a6">result</a>;
<a name="l01753"></a>01753 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_control</span> == <a class="code" href="ao68000_8v.html#a023942fcdb1eb88002847e9730cf62c2">`PC_INCR_BY_2</a><span class="vhdlchar"></span>) <span class="vhdlchar">pc</span> = <span class="vhdlchar">pc</span> + <span class="vhdllogic">32&#39;d2</span>;
<a name="l01754"></a>01754 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_control</span> == <a class="code" href="ao68000_8v.html#a6b8aff09ca5bd77e19e6d7a5076a58bd">`PC_INCR_BY_4</a><span class="vhdlchar"></span>) <span class="vhdlchar">pc</span> = <span class="vhdlchar">pc</span> + <span class="vhdllogic">32&#39;d4</span>;
<a name="l01755"></a>01755 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_control</span> == <a class="code" href="ao68000_8v.html#aefc526541d0911ae626689caead407ab">`PC_INCR_BY_SIZE</a><span class="vhdlchar"></span>) <span class="vhdlchar">pc</span> = (<span class="vhdlchar">size</span>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1&#39;b0</span>) ? <span class="vhdlchar">pc</span> + <span class="vhdllogic">32&#39;d2</span> : <span class="vhdlchar">pc</span> + <span class="vhdllogic">32&#39;d4</span>;
<a name="l01756"></a>01756 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_control</span> == <a class="code" href="ao68000_8v.html#a48c2827ab160beae0aab354b09b59e1a">`PC_FROM_PREFETCH_IR</a><span class="vhdlchar"></span>) <span class="vhdlchar">pc</span> = <a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">47</span>:<span class="vhdllogic">16</span>];
<a name="l01757"></a>01757 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_control</span> == <a class="code" href="ao68000_8v.html#a6f1c276d75adca2b0290b7936476fde8">`PC_INCR_BY_2_IN_MAIN_LOOP</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classregisters.html#a8031b93d1dc568b98697eb0c81b13bfd">prefetch_ir_valid</a> == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <a class="code" href="classregisters.html#a278b33a84015867a530ac4279331d570">decoder_trap</a> == <span class="vhdllogic">8&#39;d0</span> &amp;&amp; <span class="vhdlchar">stop_flag</span> == <span class="vhdllogic">1&#39;b0</span>)
<a name="l01758"></a>01758 <span class="vhdlchar">pc</span> = <span class="vhdlchar">pc</span> + <span class="vhdllogic">32&#39;d2</span>;
<a name="l01759"></a>01759 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b0</span>) <a class="code" href="classregisters.html#af160a45a0b3cd7794efb7fea1ed60526">pc_valid</a> &lt;= <span class="vhdlchar">pc</span>;
<a name="l01760"></a>01760 <span class="vhdlkeyword">end</span>
<a name="l01761"></a>01761 <span class="vhdlkeyword">end</span>
<a name="l01762"></a>01762
<a name="l01763"></a>01763 <span class="vhdlkeyword">assign</span> <a class="code" href="classregisters.html#a73f335a76d3869b20956c67a67ff8f6e">pc_change</a> =
<a name="l01764"></a>01764 ( <span class="vhdlchar">pc_control</span> == <a class="code" href="ao68000_8v.html#a63d3becb9e2a770cfd9df4a70298c30a">`PC_FROM_RESULT</a><span class="vhdlchar"></span> || <span class="vhdlchar">pc_control</span> == <a class="code" href="ao68000_8v.html#a48c2827ab160beae0aab354b09b59e1a">`PC_FROM_PREFETCH_IR</a><span class="vhdlchar"></span>
<a name="l01765"></a>01765 ) ? <span class="vhdllogic">2&#39;b11</span> :
<a name="l01766"></a>01766 ( <span class="vhdlchar">pc_control</span> == <a class="code" href="ao68000_8v.html#a6b8aff09ca5bd77e19e6d7a5076a58bd">`PC_INCR_BY_4</a><span class="vhdlchar"></span> || (<span class="vhdlchar">pc_control</span> == <a class="code" href="ao68000_8v.html#aefc526541d0911ae626689caead407ab">`PC_INCR_BY_SIZE</a><span class="vhdlchar"></span> &amp;&amp; <span class="vhdlchar">size</span>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1&#39;b1</span>)
<a name="l01767"></a>01767 ) ? <span class="vhdllogic">2&#39;b10</span> :
<a name="l01768"></a>01768 ( <span class="vhdlchar">pc_control</span> == <a class="code" href="ao68000_8v.html#a023942fcdb1eb88002847e9730cf62c2">`PC_INCR_BY_2</a><span class="vhdlchar"></span> || (<span class="vhdlchar">pc_control</span> == <a class="code" href="ao68000_8v.html#aefc526541d0911ae626689caead407ab">`PC_INCR_BY_SIZE</a><span class="vhdlchar"></span> &amp;&amp; <span class="vhdlchar">size</span>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1&#39;b0</span>) ||
<a name="l01769"></a>01769 (<span class="vhdlchar">pc_control</span> == <a class="code" href="ao68000_8v.html#a6f1c276d75adca2b0290b7936476fde8">`PC_INCR_BY_2_IN_MAIN_LOOP</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classregisters.html#a8031b93d1dc568b98697eb0c81b13bfd">prefetch_ir_valid</a> == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <a class="code" href="classregisters.html#a278b33a84015867a530ac4279331d570">decoder_trap</a> == <span class="vhdllogic">8&#39;d0</span> &amp;&amp; <span class="vhdlchar">stop_flag</span> == <span class="vhdllogic">1&#39;b0</span>)
<a name="l01770"></a>01770 ) ? <span class="vhdllogic">2&#39;b01</span> :
<a name="l01771"></a>01771 <span class="vhdllogic">2&#39;b00</span>;
<a name="l01772"></a>01772
<a name="l01773"></a><a class="code" href="classregisters.html#a160e4dadb225ac705317bf8de0c78277">01773</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01774"></a>01774 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>
<a name="l01775"></a>01775 <span class="vhdlchar">size</span> &lt;= <span class="vhdllogic">2&#39;b00</span>;
<a name="l01776"></a>01776 <span class="vhdlkeyword">end</span>
<a name="l01777"></a>01777 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">size_control</span> != <a class="code" href="ao68000_8v.html#a85698146140d774ffe2b54e5be255726">`SIZE_IDLE</a><span class="vhdlchar"></span>) <span class="vhdlkeyword">begin</span>
<a name="l01778"></a>01778 <span class="keyword">// BYTE</span>
<a name="l01779"></a>01779 <span class="vhdlchar">size</span>[<span class="vhdllogic">0</span>] &lt;= (<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a8a04b85bed76a4381d1187aec9694a7e">`SIZE_BYTE</a><span class="vhdlchar"></span>)
<a name="l01780"></a>01780 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#ad8d417f0548efb4299bed1ed75004cbe">`SIZE_3</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b00</span>))
<a name="l01781"></a>01781 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a4d9196508aad9e995d45bfda3f7c6884">`SIZE_4</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">13</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">2&#39;b01</span>))
<a name="l01782"></a>01782 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a3ce4d5e820fe7c438d0bd9c7f067ac3f">`SIZE_6</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b000</span>));
<a name="l01783"></a>01783 <span class="keyword">// WORD</span>
<a name="l01784"></a>01784 <span class="vhdlchar">size</span>[<span class="vhdllogic">1</span>] &lt;= (<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a9da3fa515a6d6e5949573714c5682999">`SIZE_WORD</a><span class="vhdlchar"></span>)
<a name="l01785"></a>01785 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a1b8724879ab643802f27348fa58f7208">`SIZE_1</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b00</span>))
<a name="l01786"></a>01786 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a83d20a891b85a7fabe3d8c74b66ad884">`SIZE_1_PLUS</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b10</span>))
<a name="l01787"></a>01787 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a1eca0e7e9287916bcfa96b96b0c46154">`SIZE_2</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1&#39;b0</span>))
<a name="l01788"></a>01788 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#ad8d417f0548efb4299bed1ed75004cbe">`SIZE_3</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b01</span>))
<a name="l01789"></a>01789 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a4d9196508aad9e995d45bfda3f7c6884">`SIZE_4</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">13</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">2&#39;b11</span>))
<a name="l01790"></a>01790 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a0e07cba66f352b53ebb2dd2a48c58cff">`SIZE_5</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b0</span>));
<a name="l01791"></a>01791 <span class="keyword">// LONG</span>
<a name="l01792"></a>01792 <span class="vhdlchar">size</span>[<span class="vhdllogic">2</span>] &lt;= (<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#ae54bb350f5d3a019211af2a214f46273">`SIZE_LONG</a><span class="vhdlchar"></span>)
<a name="l01793"></a>01793 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a1b8724879ab643802f27348fa58f7208">`SIZE_1</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b00</span>))
<a name="l01794"></a>01794 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a83d20a891b85a7fabe3d8c74b66ad884">`SIZE_1_PLUS</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b10</span>))
<a name="l01795"></a>01795 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a1eca0e7e9287916bcfa96b96b0c46154">`SIZE_2</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1&#39;b1</span>))
<a name="l01796"></a>01796 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#ad8d417f0548efb4299bed1ed75004cbe">`SIZE_3</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>] == <span class="vhdllogic">1&#39;b1</span>))
<a name="l01797"></a>01797 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a4d9196508aad9e995d45bfda3f7c6884">`SIZE_4</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">12</span>] == <span class="vhdllogic">1&#39;b0</span>))
<a name="l01798"></a>01798 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a0e07cba66f352b53ebb2dd2a48c58cff">`SIZE_5</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b1</span>))
<a name="l01799"></a>01799 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a3ce4d5e820fe7c438d0bd9c7f067ac3f">`SIZE_6</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b000</span>));
<a name="l01800"></a>01800 <span class="vhdlkeyword">end</span>
<a name="l01801"></a>01801 <span class="vhdlkeyword">end</span>
<a name="l01802"></a>01802
<a name="l01803"></a><a class="code" href="classregisters.html#a098bb8c5f886c173a49d1e015dd37289">01803</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01804"></a>01804 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <a class="code" href="classregisters.html#aa1a45d113f21dba8f82a93ddfe1d6409">ea_reg</a> &lt;= <span class="vhdllogic">3&#39;b000</span>;
<a name="l01805"></a>01805 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#ae09341fa22dc0b4675dc02dc4a5fb918">ea_reg_control</a> == <a class="code" href="ao68000_8v.html#ab608c5385657295b902b8ffc21c43d03">`EA_REG_IR_2_0</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#aa1a45d113f21dba8f82a93ddfe1d6409">ea_reg</a> &lt;= <span class="vhdlchar">ir</span>[<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>];
<a name="l01806"></a>01806 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#ae09341fa22dc0b4675dc02dc4a5fb918">ea_reg_control</a> == <a class="code" href="ao68000_8v.html#a56f29ecaaf69843219c88d8e0f252048">`EA_REG_IR_11_9</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#aa1a45d113f21dba8f82a93ddfe1d6409">ea_reg</a> &lt;= <span class="vhdlchar">ir</span>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>];
<a name="l01807"></a>01807 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#ae09341fa22dc0b4675dc02dc4a5fb918">ea_reg_control</a> == <a class="code" href="ao68000_8v.html#af2b8ce7c793c79dee8394ad309a1ef71">`EA_REG_MOVEM_REG_2_0</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#aa1a45d113f21dba8f82a93ddfe1d6409">ea_reg</a> &lt;= <span class="vhdlchar">movem_modreg</span>[<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>];
<a name="l01808"></a>01808 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#ae09341fa22dc0b4675dc02dc4a5fb918">ea_reg_control</a> == <a class="code" href="ao68000_8v.html#aa5ef414e1c0f769a38cdd8b3aeef5184">`EA_REG_3b111</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#aa1a45d113f21dba8f82a93ddfe1d6409">ea_reg</a> &lt;= <span class="vhdllogic">3&#39;b111</span>;
<a name="l01809"></a>01809 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#ae09341fa22dc0b4675dc02dc4a5fb918">ea_reg_control</a> == <a class="code" href="ao68000_8v.html#ab4936576a8613273a6487d2b78812c55">`EA_REG_3b100</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#aa1a45d113f21dba8f82a93ddfe1d6409">ea_reg</a> &lt;= <span class="vhdllogic">3&#39;b100</span>;
<a name="l01810"></a>01810 <span class="vhdlkeyword">end</span>
<a name="l01811"></a>01811
<a name="l01812"></a><a class="code" href="classregisters.html#a6fc98500064486297076cc7c8e99e16f">01812</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01813"></a>01813 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ea_mod</a> &lt;= <span class="vhdllogic">3&#39;b000</span>;
<a name="l01814"></a>01814 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#af6205981eadd3ee1e9fa193f04b6a893">ea_mod_control</a> == <a class="code" href="ao68000_8v.html#a0c094175d5b6718611708b08af5e6342">`EA_MOD_IR_5_3</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ea_mod</a> &lt;= <span class="vhdlchar">ir</span>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>];
<a name="l01815"></a>01815 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#af6205981eadd3ee1e9fa193f04b6a893">ea_mod_control</a> == <a class="code" href="ao68000_8v.html#a45b520ba3dd813510ddca0ebe0a652f4">`EA_MOD_MOVEM_MOD_5_3</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ea_mod</a> &lt;= <span class="vhdlchar">movem_modreg</span>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>];
<a name="l01816"></a>01816 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#af6205981eadd3ee1e9fa193f04b6a893">ea_mod_control</a> == <a class="code" href="ao68000_8v.html#a46d304e545e3f136f9bc7fe83ffe61df">`EA_MOD_IR_8_6</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ea_mod</a> &lt;= <span class="vhdlchar">ir</span>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>];
<a name="l01817"></a>01817 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#af6205981eadd3ee1e9fa193f04b6a893">ea_mod_control</a> == <a class="code" href="ao68000_8v.html#a2e15ad20aa0f28ef9042982260a21316">`EA_MOD_PREDEC</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ea_mod</a> &lt;= <span class="vhdllogic">3&#39;b100</span>;
<a name="l01818"></a>01818 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#af6205981eadd3ee1e9fa193f04b6a893">ea_mod_control</a> == <a class="code" href="ao68000_8v.html#ae4ecbd320f11539d132c8e6aa3fdcb5c">`EA_MOD_3b111</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ea_mod</a> &lt;= <span class="vhdllogic">3&#39;b111</span>;
<a name="l01819"></a>01819 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#af6205981eadd3ee1e9fa193f04b6a893">ea_mod_control</a> == <a class="code" href="ao68000_8v.html#aee18d2c3a30bdec23a7de0889deb0d94">`EA_MOD_DN_PREDEC</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ea_mod</a> &lt;= (<span class="vhdlchar">ir</span>[<span class="vhdllogic">3</span>] == <span class="vhdllogic">1&#39;b0</span>) ? <span class="keyword">/* Dn **/</span> <span class="vhdllogic">3&#39;b000</span> : <span class="keyword">/* -(An) **/</span> <span class="vhdllogic">3&#39;b100</span>;
<a name="l01820"></a>01820 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#af6205981eadd3ee1e9fa193f04b6a893">ea_mod_control</a> == <a class="code" href="ao68000_8v.html#ac190b9646213ddb87ec06a5858d479b3">`EA_MOD_DN_AN_EXG</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ea_mod</a> &lt;= (<span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">5&#39;b01000</span> || <span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">5&#39;b10001</span>) ? <span class="keyword">/* Dn **/</span> <span class="vhdllogic">3&#39;b000</span> : <span class="keyword">/* An **/</span> <span class="vhdllogic">3&#39;b001</span>;
<a name="l01821"></a>01821 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#af6205981eadd3ee1e9fa193f04b6a893">ea_mod_control</a> == <a class="code" href="ao68000_8v.html#a51a36024571aca1d7d7c7fa928956589">`EA_MOD_POSTINC</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ea_mod</a> &lt;= <span class="vhdllogic">3&#39;b011</span>;
<a name="l01822"></a>01822 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#af6205981eadd3ee1e9fa193f04b6a893">ea_mod_control</a> == <a class="code" href="ao68000_8v.html#a7a6ccf87a21e66605e4672e95a6578e4">`EA_MOD_AN</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ea_mod</a> &lt;= <span class="vhdllogic">3&#39;b001</span>;
<a name="l01823"></a>01823 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#af6205981eadd3ee1e9fa193f04b6a893">ea_mod_control</a> == <a class="code" href="ao68000_8v.html#a8a000a242ea6cc51ac97ec35753faf7b">`EA_MOD_DN</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ea_mod</a> &lt;= <span class="vhdllogic">3&#39;b000</span>;
<a name="l01824"></a>01824 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#af6205981eadd3ee1e9fa193f04b6a893">ea_mod_control</a> == <a class="code" href="ao68000_8v.html#a88ded717145b6f89a3cd3416577225f0">`EA_MOD_INDIRECTOFFSET</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ea_mod</a> &lt;= <span class="vhdllogic">3&#39;b101</span>;
<a name="l01825"></a>01825 <span class="vhdlkeyword">end</span>
<a name="l01826"></a>01826
<a name="l01827"></a><a class="code" href="classregisters.html#aa536be1ed88148e7c828c0183e8a0757">01827</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01828"></a>01828 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <a class="code" href="classregisters.html#a34f0e8ea4d6f79a3c8cf7e3ba129ea58">ea_type</a> &lt;= <a class="code" href="ao68000_8v.html#a30b69aee8fb5af4ab38fc9f0d92a28d3">`EA_TYPE_IDLE</a><span class="vhdlchar"></span>;
<a name="l01829"></a>01829 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#aa22fa504627eea9bff308c3358ef9240">ea_type_control</a> == <a class="code" href="ao68000_8v.html#a6f693ee79161bffa99f05d9f5b89a2d0">`EA_TYPE_ALL</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a34f0e8ea4d6f79a3c8cf7e3ba129ea58">ea_type</a> &lt;= <a class="code" href="ao68000_8v.html#a6f693ee79161bffa99f05d9f5b89a2d0">`EA_TYPE_ALL</a><span class="vhdlchar"></span>;
<a name="l01830"></a>01830 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#aa22fa504627eea9bff308c3358ef9240">ea_type_control</a> == <a class="code" href="ao68000_8v.html#a925f0004ba49b82dbdf7c4ae969ba6ed">`EA_TYPE_CONTROL_POSTINC</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a34f0e8ea4d6f79a3c8cf7e3ba129ea58">ea_type</a> &lt;= <a class="code" href="ao68000_8v.html#a925f0004ba49b82dbdf7c4ae969ba6ed">`EA_TYPE_CONTROL_POSTINC</a><span class="vhdlchar"></span>;
<a name="l01831"></a>01831 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#aa22fa504627eea9bff308c3358ef9240">ea_type_control</a> == <a class="code" href="ao68000_8v.html#a41499eaa1b7aa62f455a07e5435d754a">`EA_TYPE_CONTROLALTER_PREDEC</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a34f0e8ea4d6f79a3c8cf7e3ba129ea58">ea_type</a> &lt;= <a class="code" href="ao68000_8v.html#a41499eaa1b7aa62f455a07e5435d754a">`EA_TYPE_CONTROLALTER_PREDEC</a><span class="vhdlchar"></span>;
<a name="l01832"></a>01832 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#aa22fa504627eea9bff308c3358ef9240">ea_type_control</a> == <a class="code" href="ao68000_8v.html#ae2c794f81236993a23138cbf3f7eda44">`EA_TYPE_CONTROL</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a34f0e8ea4d6f79a3c8cf7e3ba129ea58">ea_type</a> &lt;= <a class="code" href="ao68000_8v.html#ae2c794f81236993a23138cbf3f7eda44">`EA_TYPE_CONTROL</a><span class="vhdlchar"></span>;
<a name="l01833"></a>01833 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#aa22fa504627eea9bff308c3358ef9240">ea_type_control</a> == <a class="code" href="ao68000_8v.html#a17a8a468ddfc3bdb178081a368f4dd6c">`EA_TYPE_DATAALTER</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a34f0e8ea4d6f79a3c8cf7e3ba129ea58">ea_type</a> &lt;= <a class="code" href="ao68000_8v.html#a17a8a468ddfc3bdb178081a368f4dd6c">`EA_TYPE_DATAALTER</a><span class="vhdlchar"></span>;
<a name="l01834"></a>01834 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#aa22fa504627eea9bff308c3358ef9240">ea_type_control</a> == <a class="code" href="ao68000_8v.html#a8e7bc745d4def25f5a995a6955dbdb4b">`EA_TYPE_DN_AN</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a34f0e8ea4d6f79a3c8cf7e3ba129ea58">ea_type</a> &lt;= <a class="code" href="ao68000_8v.html#a8e7bc745d4def25f5a995a6955dbdb4b">`EA_TYPE_DN_AN</a><span class="vhdlchar"></span>;
<a name="l01835"></a>01835 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#aa22fa504627eea9bff308c3358ef9240">ea_type_control</a> == <a class="code" href="ao68000_8v.html#a653530f090b85ba7bcd93912b8834412">`EA_TYPE_MEMORYALTER</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a34f0e8ea4d6f79a3c8cf7e3ba129ea58">ea_type</a> &lt;= <a class="code" href="ao68000_8v.html#a653530f090b85ba7bcd93912b8834412">`EA_TYPE_MEMORYALTER</a><span class="vhdlchar"></span>;
<a name="l01836"></a>01836 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#aa22fa504627eea9bff308c3358ef9240">ea_type_control</a> == <a class="code" href="ao68000_8v.html#a1b85de8c778c471fdc569b4ef5f3bc60">`EA_TYPE_DATA</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a34f0e8ea4d6f79a3c8cf7e3ba129ea58">ea_type</a> &lt;= <a class="code" href="ao68000_8v.html#a1b85de8c778c471fdc569b4ef5f3bc60">`EA_TYPE_DATA</a><span class="vhdlchar"></span>;
<a name="l01837"></a>01837 <span class="vhdlkeyword">end</span>
<a name="l01838"></a>01838
<a name="l01839"></a><a class="code" href="classregisters.html#a8fa9503b229756474eafc4b087aa6511">01839</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01840"></a>01840 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;= <span class="vhdllogic">32&#39;hFFFFFFFF</span>;
<a name="l01841"></a>01841 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#a29e287eda5813f253f9f1cd527021533">`OP1_FROM_OP2</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;= <span class="vhdlchar">operand2</span>;
<a name="l01842"></a>01842 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#ab601cf0d52e5fe6ae155ab8084b236e1">`OP1_FROM_ADDRESS</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;= <span class="vhdlchar">address</span>;
<a name="l01843"></a>01843 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#aec7f41507eab6c659f5d544c942b441e">`OP1_FROM_DATA</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;=
<a name="l01844"></a>01844 (<span class="vhdlchar">size</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) ? { {<span class="vhdllogic">24</span>{<a class="code" href="classregisters.html#a0cdf5b5316a0edcd85909fc9da5ca864">data_read</a>[<span class="vhdllogic">7</span>]}}, <a class="code" href="classregisters.html#a0cdf5b5316a0edcd85909fc9da5ca864">data_read</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] } :
<a name="l01845"></a>01845 (<span class="vhdlchar">size</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span>) ? { {<span class="vhdllogic">16</span>{<a class="code" href="classregisters.html#a0cdf5b5316a0edcd85909fc9da5ca864">data_read</a>[<span class="vhdllogic">15</span>]}}, <a class="code" href="classregisters.html#a0cdf5b5316a0edcd85909fc9da5ca864">data_read</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] } :
<a name="l01846"></a>01846 <a class="code" href="classregisters.html#a0cdf5b5316a0edcd85909fc9da5ca864">data_read</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l01847"></a>01847 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#abc0874c9141535c9c6a071653810c8fc">`OP1_FROM_IMMEDIATE</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;=
<a name="l01848"></a>01848 (<span class="vhdlchar">size</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) ? { {<span class="vhdllogic">24</span>{<a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">71</span>]}}, <a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">71</span>:<span class="vhdllogic">64</span>] } :
<a name="l01849"></a>01849 (<span class="vhdlchar">size</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span>) ? { {<span class="vhdllogic">16</span>{<a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">79</span>]}}, <a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">79</span>:<span class="vhdllogic">64</span>] } :
<a name="l01850"></a>01850 <a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">79</span>:<span class="vhdllogic">48</span>];
<a name="l01851"></a>01851 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#a2adbf20e4776f4f5449563560fcfea3e">`OP1_FROM_RESULT</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;= <a class="code" href="classregisters.html#ad27ecd2d9ef571fa88b998f3674fe9a6">result</a>;
<a name="l01852"></a>01852 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#ac2bd7be96e464a7a06affeb71024f266">`OP1_MOVEQ</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;= { {<span class="vhdllogic">24</span>{<span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>]}}, <span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] };
<a name="l01853"></a>01853 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#aade66d4090f1aea9ed568a4e17ff1eae">`OP1_FROM_PC</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;= <a class="code" href="classregisters.html#af160a45a0b3cd7794efb7fea1ed60526">pc_valid</a>;
<a name="l01854"></a>01854 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#a4db6f8d952dd7d7cfffeb0de4ad4a08b">`OP1_LOAD_ZEROS</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;= <span class="vhdllogic">32&#39;b0</span>;
<a name="l01855"></a>01855 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#ae8489ec12e458975d614347191ba2004">`OP1_LOAD_ONES</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;= <span class="vhdllogic">32&#39;hFFFFFFFF</span>;
<a name="l01856"></a>01856 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#a9e1d49d77f5b144fff6cc8c0c021e5d2">`OP1_FROM_SR</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;= { <span class="vhdllogic">16&#39;b0</span>, <a class="code" href="classregisters.html#a116473c99b3cbf75fd0f48a25ea9227e">sr</a>[<span class="vhdllogic">15</span>], <span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classregisters.html#a116473c99b3cbf75fd0f48a25ea9227e">sr</a>[<span class="vhdllogic">13</span>], <span class="vhdllogic">2&#39;b0</span>, <a class="code" href="classregisters.html#a116473c99b3cbf75fd0f48a25ea9227e">sr</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">8</span>], <span class="vhdllogic">3&#39;b0</span>, <a class="code" href="classregisters.html#a116473c99b3cbf75fd0f48a25ea9227e">sr</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">0</span>] };
<a name="l01857"></a>01857 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#a1a44c33265ec779ad10e437621cda43b">`OP1_FROM_USP</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;= <a class="code" href="classregisters.html#a6810e76be48010f9b34a91c27ddd636b">usp</a>;
<a name="l01858"></a>01858 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#a4900ac90de9fd53eaeb1acddf51a9008">`OP1_FROM_AN</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;=
<a name="l01859"></a>01859 (<span class="vhdlchar">size</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span>) ? { {<span class="vhdllogic">16</span>{<a class="code" href="classregisters.html#a7fdc26691a005524667257529b1c1212">An_output</a>[<span class="vhdllogic">15</span>]}}, <a class="code" href="classregisters.html#a7fdc26691a005524667257529b1c1212">An_output</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] } :
<a name="l01860"></a>01860 <a class="code" href="classregisters.html#a7fdc26691a005524667257529b1c1212">An_output</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l01861"></a>01861 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#a3aa722db3503e9370be36b3d409f3e17">`OP1_FROM_DN</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;=
<a name="l01862"></a>01862 (<span class="vhdlchar">size</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) ? { {<span class="vhdllogic">24</span>{<a class="code" href="classregisters.html#a659bea909e94f7512c4311bcff473a5d">Dn_output</a>[<span class="vhdllogic">7</span>]}}, <a class="code" href="classregisters.html#a659bea909e94f7512c4311bcff473a5d">Dn_output</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] } :
<a name="l01863"></a>01863 (<span class="vhdlchar">size</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span>) ? { {<span class="vhdllogic">16</span>{<a class="code" href="classregisters.html#a659bea909e94f7512c4311bcff473a5d">Dn_output</a>[<span class="vhdllogic">15</span>]}}, <a class="code" href="classregisters.html#a659bea909e94f7512c4311bcff473a5d">Dn_output</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] } :
<a name="l01864"></a>01864 <a class="code" href="classregisters.html#a659bea909e94f7512c4311bcff473a5d">Dn_output</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l01865"></a>01865 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#a083db35259f035ab10f606d2c7dd82c6">`OP1_FROM_IR</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;= { <span class="vhdllogic">16&#39;b0</span>, <span class="vhdlchar">ir</span>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] };
<a name="l01866"></a>01866 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#a707f0ca7fa1a08446ba113ede9d5d8a4">`OP1_FROM_FAULT_ADDRESS</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;= <a class="code" href="classregisters.html#acfc96bc559a0660239cb6b8a8836b862">fault_address_state</a>;
<a name="l01867"></a>01867 <span class="vhdlkeyword">end</span>
<a name="l01868"></a>01868
<a name="l01869"></a><a class="code" href="classregisters.html#ae6143c84411ad159cbe1662f3909e726">01869</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01870"></a>01870 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">operand2</span> &lt;= <span class="vhdllogic">32&#39;hFFFFFFFF</span>;
<a name="l01871"></a>01871 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand2_control</span> == <a class="code" href="ao68000_8v.html#a092ca695ecfa2de9e4d4a27bbd89d40f">`OP2_FROM_OP1</a><span class="vhdlchar"></span>) <span class="vhdlchar">operand2</span> &lt;= <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a>;
<a name="l01872"></a>01872 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand2_control</span> == <a class="code" href="ao68000_8v.html#a5c2c8ed577b6ab91a5ae3861643575e7">`OP2_LOAD_1</a><span class="vhdlchar"></span>) <span class="vhdlchar">operand2</span> &lt;= <span class="vhdllogic">32&#39;d1</span>;
<a name="l01873"></a>01873 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand2_control</span> == <a class="code" href="ao68000_8v.html#a7c904b70c2347aaee330105f74a69fc1">`OP2_LOAD_COUNT</a><span class="vhdlchar"></span>) <span class="vhdlchar">operand2</span> &lt;=
<a name="l01874"></a>01874 (<span class="vhdlchar">ir</span>[<span class="vhdllogic">5</span>] == <span class="vhdllogic">1&#39;b0</span>) ? ( (<span class="vhdlchar">ir</span>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3&#39;b000</span>) ? <span class="vhdllogic">32&#39;b1000</span> : { <span class="vhdllogic">29&#39;b0</span>, <span class="vhdlchar">ir</span>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] } ) :
<a name="l01875"></a>01875 { <span class="vhdllogic">26&#39;b0</span>, <span class="vhdlchar">operand2</span>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] };
<a name="l01876"></a>01876 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand2_control</span> == <a class="code" href="ao68000_8v.html#aacec01f4da467eb6785c611710c1219d">`OP2_ADDQ_SUBQ</a><span class="vhdlchar"></span>) <span class="vhdlchar">operand2</span> &lt;= (<span class="vhdlchar">ir</span>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3&#39;b000</span>) ? <span class="vhdllogic">32&#39;b1000</span> : { <span class="vhdllogic">29&#39;b0</span>, <span class="vhdlchar">ir</span>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] };
<a name="l01877"></a>01877 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand2_control</span> == <a class="code" href="ao68000_8v.html#ad8cdca7f0cbac16e09b4e1a1e3ab4f11">`OP2_MOVE_OFFSET</a><span class="vhdlchar"></span>) <span class="vhdlchar">operand2</span> &lt;= (<span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">8&#39;b0</span>) ? <span class="vhdlchar">operand2</span>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] : { {<span class="vhdllogic">24</span>{<span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>]}}, <span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] };
<a name="l01878"></a>01878 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand2_control</span> == <a class="code" href="ao68000_8v.html#a041be53a35bc1a415713d34c839c81c5">`OP2_MOVE_ADDRESS_BUS_INFO</a><span class="vhdlchar"></span>) <span class="vhdlchar">operand2</span> &lt;= { <span class="vhdllogic">16&#39;b0</span>, <span class="vhdllogic">11&#39;b0</span>, <a class="code" href="classregisters.html#ae12d419de758617259ab74281fd09f03">rw_state</a>, <span class="vhdlchar">instruction_flag</span>, <a class="code" href="classregisters.html#a1864a58a4089bd5d72ba19730137c5ce">fc_state</a>};
<a name="l01879"></a>01879 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand2_control</span> == <a class="code" href="ao68000_8v.html#a81d303d3fcf43bd2ed3b99072571f816">`OP2_DECR_BY_1</a><span class="vhdlchar"></span>) <span class="vhdlchar">operand2</span> &lt;= <span class="vhdlchar">operand2</span> - <span class="vhdllogic">32&#39;b1</span>;
<a name="l01880"></a>01880 <span class="vhdlkeyword">end</span>
<a name="l01881"></a>01881
<a name="l01882"></a><a class="code" href="classregisters.html#ae04888e60d745f9f64ca5c52d0969adb">01882</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01883"></a>01883 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">address</span> &lt;= <span class="vhdllogic">32&#39;b0</span>;
<a name="l01884"></a>01884 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_control</span> == <a class="code" href="ao68000_8v.html#a864e0b06304816dec2d4658503d97495">`ADDRESS_INCR_BY_SIZE</a><span class="vhdlchar"></span>) <span class="vhdlchar">address</span> &lt;= ((<span class="vhdlchar">size</span>[<span class="vhdllogic">0</span>]) &amp;&amp; <a class="code" href="classregisters.html#aa1a45d113f21dba8f82a93ddfe1d6409">ea_reg</a> == <span class="vhdllogic">3&#39;b111</span>) ? <span class="vhdlchar">address</span> + <span class="vhdllogic">32&#39;d2</span> : <span class="vhdlchar">address</span> + {<span class="vhdllogic">29&#39;d0</span>,<span class="vhdlchar">size</span>};
<a name="l01885"></a>01885 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_control</span> == <a class="code" href="ao68000_8v.html#aa479827c57933eb9ff03788bbe9d6e3a">`ADDRESS_DECR_BY_SIZE</a><span class="vhdlchar"></span>) <span class="vhdlchar">address</span> &lt;= ((<span class="vhdlchar">size</span>[<span class="vhdllogic">0</span>]) &amp;&amp; <a class="code" href="classregisters.html#aa1a45d113f21dba8f82a93ddfe1d6409">ea_reg</a> == <span class="vhdllogic">3&#39;b111</span>) ? <span class="vhdlchar">address</span> - <span class="vhdllogic">32&#39;d2</span> : <span class="vhdlchar">address</span> - {<span class="vhdllogic">29&#39;d0</span>,<span class="vhdlchar">size</span>};
<a name="l01886"></a>01886 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_control</span> == <a class="code" href="ao68000_8v.html#ac4044068e496c3393c6336b72873a958">`ADDRESS_INCR_BY_2</a><span class="vhdlchar"></span>) <span class="vhdlchar">address</span> &lt;= <span class="vhdlchar">address</span> + <span class="vhdllogic">32&#39;d2</span>;
<a name="l01887"></a>01887 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_control</span> == <a class="code" href="ao68000_8v.html#afc15ad5da6b4afd71eb879476c603fe3">`ADDRESS_FROM_AN_OUTPUT</a><span class="vhdlchar"></span>) <span class="vhdlchar">address</span> &lt;= <a class="code" href="classregisters.html#a7fdc26691a005524667257529b1c1212">An_output</a>;
<a name="l01888"></a>01888 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_control</span> == <a class="code" href="ao68000_8v.html#ac1143ff5a059fc5609c9419fcd402ae1">`ADDRESS_FROM_BASE_INDEX_OFFSET</a><span class="vhdlchar"></span>) <span class="vhdlchar">address</span> &lt;= <span class="vhdlchar">address</span> + <span class="vhdlchar">index</span> + <span class="vhdlchar">offset</span>;
<a name="l01889"></a>01889 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_control</span> == <a class="code" href="ao68000_8v.html#aa6ba908e680fe87e46ac1cf014eed463">`ADDRESS_FROM_IMM_16</a><span class="vhdlchar"></span>) <span class="vhdlchar">address</span> &lt;= { {<span class="vhdllogic">16</span>{<a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">79</span>]}}, <a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">79</span>:<span class="vhdllogic">64</span>] };
<a name="l01890"></a>01890 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_control</span> == <a class="code" href="ao68000_8v.html#aa688332c940cad3a10561a5c9f74698a">`ADDRESS_FROM_IMM_32</a><span class="vhdlchar"></span>) <span class="vhdlchar">address</span> &lt;= <a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">79</span>:<span class="vhdllogic">48</span>];
<a name="l01891"></a>01891 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_control</span> == <a class="code" href="ao68000_8v.html#aa7a6ef5c21bbbf8a3c5a0437bdda3c85">`ADDRESS_FROM_PC_INDEX_OFFSET</a><span class="vhdlchar"></span>) <span class="vhdlchar">address</span> &lt;= <a class="code" href="classregisters.html#af160a45a0b3cd7794efb7fea1ed60526">pc_valid</a> + <span class="vhdlchar">index</span> + <span class="vhdlchar">offset</span>;
<a name="l01892"></a>01892 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_control</span> == <a class="code" href="ao68000_8v.html#a2a30a0ecfa48e96cc5be837e7db71cab">`ADDRESS_FROM_TRAP</a><span class="vhdlchar"></span>) <span class="vhdlchar">address</span> &lt;= {<span class="vhdllogic">22&#39;b0</span>, <span class="vhdlchar">trap</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">2&#39;b0</span>};
<a name="l01893"></a>01893 <span class="vhdlkeyword">end</span>
<a name="l01894"></a>01894
<a name="l01895"></a><a class="code" href="classregisters.html#a7943ebd2393533b177f2cc9471614403">01895</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01896"></a>01896 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">address_type</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01897"></a>01897 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_control</span> == <a class="code" href="ao68000_8v.html#aa7a6ef5c21bbbf8a3c5a0437bdda3c85">`ADDRESS_FROM_PC_INDEX_OFFSET</a><span class="vhdlchar"></span>) <span class="vhdlchar">address_type</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01898"></a>01898 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_control</span> != <a class="code" href="ao68000_8v.html#a3f7506465d358bddd4692916e422237d">`ADDRESS_IDLE</a><span class="vhdlchar"></span>) <span class="vhdlchar">address_type</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01899"></a>01899 <span class="vhdlkeyword">end</span>
<a name="l01900"></a>01900
<a name="l01901"></a><a class="code" href="classregisters.html#a57a4884a23011ba445e6a69044c0b0bc">01901</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01902"></a>01902 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">movem_modreg</span> &lt;= <span class="vhdllogic">6&#39;b0</span>;
<a name="l01903"></a>01903 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">movem_modreg_control</span> == <a class="code" href="ao68000_8v.html#a59e6a074af6fbcf3490ecdb2d277e452">`MOVEM_MODREG_LOAD_0</a><span class="vhdlchar"></span>) <span class="vhdlchar">movem_modreg</span> &lt;= <span class="vhdllogic">6&#39;b0</span>;
<a name="l01904"></a>01904 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">movem_modreg_control</span> == <a class="code" href="ao68000_8v.html#a96857bc6f8514765cf6add0567891646">`MOVEM_MODREG_LOAD_6b001111</a><span class="vhdlchar"></span>)<span class="vhdlchar">movem_modreg</span> &lt;= <span class="vhdllogic">6&#39;b001111</span>;
<a name="l01905"></a>01905 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">movem_modreg_control</span> == <a class="code" href="ao68000_8v.html#ab865a06c214356bb8906149ad6beebf2">`MOVEM_MODREG_INCR_BY_1</a><span class="vhdlchar"></span>) <span class="vhdlchar">movem_modreg</span> &lt;= <span class="vhdlchar">movem_modreg</span> + <span class="vhdllogic">6&#39;d1</span>;
<a name="l01906"></a>01906 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">movem_modreg_control</span> == <a class="code" href="ao68000_8v.html#afc15f893a792d1af5e5c90f8ed788662">`MOVEM_MODREG_DECR_BY_1</a><span class="vhdlchar"></span>) <span class="vhdlchar">movem_modreg</span> &lt;= <span class="vhdlchar">movem_modreg</span> - <span class="vhdllogic">6&#39;d1</span>;
<a name="l01907"></a>01907 <span class="vhdlkeyword">end</span>
<a name="l01908"></a>01908
<a name="l01909"></a><a class="code" href="classregisters.html#a84ce568fcbe169cc02a3dc5c5bdbced2">01909</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01910"></a>01910 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">movem_loop</span> &lt;= <span class="vhdllogic">5&#39;b0</span>;
<a name="l01911"></a>01911 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">movem_loop_control</span> == <a class="code" href="ao68000_8v.html#a8465e4a24e72c1cb6e12015c4ff806c5">`MOVEM_LOOP_LOAD_0</a><span class="vhdlchar"></span>) <span class="vhdlchar">movem_loop</span> &lt;= <span class="vhdllogic">5&#39;b0</span>;
<a name="l01912"></a>01912 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">movem_loop_control</span> == <a class="code" href="ao68000_8v.html#add999e8b65307d6d46547d776999f215">`MOVEM_LOOP_INCR_BY_1</a><span class="vhdlchar"></span>) <span class="vhdlchar">movem_loop</span> &lt;= <span class="vhdlchar">movem_loop</span> + <span class="vhdllogic">5&#39;d1</span>;
<a name="l01913"></a>01913 <span class="vhdlkeyword">end</span>
<a name="l01914"></a>01914
<a name="l01915"></a><a class="code" href="classregisters.html#a5ca9e5ee3853a6c58d80397ee08dcdfb">01915</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01916"></a>01916 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">movem_reg</span> &lt;= <span class="vhdllogic">16&#39;b0</span>;
<a name="l01917"></a>01917 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">movem_reg_control</span> == <a class="code" href="ao68000_8v.html#aa7d78c26e9e37f761c7a0b178fe13cf8">`MOVEM_REG_FROM_OP1</a><span class="vhdlchar"></span>) <span class="vhdlchar">movem_reg</span> &lt;= <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>];
<a name="l01918"></a>01918 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">movem_reg_control</span> == <a class="code" href="ao68000_8v.html#ac34150d75e16d155befcfcb8a95e45a3">`MOVEM_REG_SHIFT_RIGHT</a><span class="vhdlchar"></span>) <span class="vhdlchar">movem_reg</span> &lt;= { <span class="vhdllogic">1&#39;b0</span>, <span class="vhdlchar">movem_reg</span>[<span class="vhdllogic">15</span>:<span class="vhdllogic">1</span>] };
<a name="l01919"></a>01919 <span class="vhdlkeyword">end</span>
<a name="l01920"></a>01920
<a name="l01921"></a><a class="code" href="classregisters.html#a670e4db98926f8ddddaa84356173ff1a">01921</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01922"></a>01922 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">ir</span> &lt;= <span class="vhdllogic">16&#39;b0</span>;
<a name="l01923"></a>01923 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">ir_control</span> == <a class="code" href="ao68000_8v.html#a987216cfc97019736d0251dcd5470e68">`IR_LOAD_WHEN_PREFETCH_VALID</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classregisters.html#a8031b93d1dc568b98697eb0c81b13bfd">prefetch_ir_valid</a> == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <span class="vhdlchar">stop_flag</span> == <span class="vhdllogic">1&#39;b0</span>)
<a name="l01924"></a>01924 <span class="vhdlchar">ir</span> &lt;= <a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">79</span>:<span class="vhdllogic">64</span>];
<a name="l01925"></a>01925 <span class="vhdlkeyword">end</span>
<a name="l01926"></a>01926
<a name="l01927"></a><a class="code" href="classregisters.html#a3a2e5a5ea0bbf7d06bee2afef1124393">01927</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01928"></a>01928 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">decoder_alu_reg</span> &lt;= <span class="vhdllogic">18&#39;b0</span>;
<a name="l01929"></a>01929 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">ir_control</span> == <a class="code" href="ao68000_8v.html#a987216cfc97019736d0251dcd5470e68">`IR_LOAD_WHEN_PREFETCH_VALID</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classregisters.html#a8031b93d1dc568b98697eb0c81b13bfd">prefetch_ir_valid</a> == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <span class="vhdlchar">stop_flag</span> == <span class="vhdllogic">1&#39;b0</span>)
<a name="l01930"></a>01930 <span class="vhdlchar">decoder_alu_reg</span> &lt;= <span class="vhdlchar">decoder_alu</span>;
<a name="l01931"></a>01931 <span class="vhdlkeyword">end</span>
<a name="l01932"></a>01932
<a name="l01933"></a><a class="code" href="classregisters.html#a931eb6b9c3c3c002a0eea00a7f10e10f">01933</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01934"></a>01934 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">trap</span> &lt;= <span class="vhdllogic">8&#39;d0</span>;
<a name="l01935"></a>01935 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">trap_control</span> == <a class="code" href="ao68000_8v.html#a4267c71337dc6963db47aba754396f48">`TRAP_ILLEGAL_INSTR</a><span class="vhdlchar"></span>) <span class="vhdlchar">trap</span> &lt;= <span class="vhdllogic">8&#39;d4</span>;
<a name="l01936"></a>01936 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">trap_control</span> == <a class="code" href="ao68000_8v.html#a111476f2c18a4085c9a5cea3692dc990">`TRAP_DIV_BY_ZERO</a><span class="vhdlchar"></span>) <span class="vhdlchar">trap</span> &lt;= <span class="vhdllogic">8&#39;d5</span>;
<a name="l01937"></a>01937 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">trap_control</span> == <a class="code" href="ao68000_8v.html#a7d97a1e77166d92c1d69452c3e836682">`TRAP_CHK</a><span class="vhdlchar"></span>) <span class="vhdlchar">trap</span> &lt;= <span class="vhdllogic">8&#39;d6</span>;
<a name="l01938"></a>01938 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">trap_control</span> == <a class="code" href="ao68000_8v.html#a66a7d33a63851daa49e101494acd6118">`TRAP_TRAPV</a><span class="vhdlchar"></span>) <span class="vhdlchar">trap</span> &lt;= <span class="vhdllogic">8&#39;d7</span>;
<a name="l01939"></a>01939 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">trap_control</span> == <a class="code" href="ao68000_8v.html#a940b41a2a1e4c585e15f1c2bef5d5c6f">`TRAP_PRIVIL_VIOLAT</a><span class="vhdlchar"></span>) <span class="vhdlchar">trap</span> &lt;= <span class="vhdllogic">8&#39;d8</span>;
<a name="l01940"></a>01940 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">trap_control</span> == <a class="code" href="ao68000_8v.html#a84705ced93a01047ec829b7ea942cee0">`TRAP_TRACE</a><span class="vhdlchar"></span>) <span class="vhdlchar">trap</span> &lt;= <span class="vhdllogic">8&#39;d9</span>;
<a name="l01941"></a>01941 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">trap_control</span> == <a class="code" href="ao68000_8v.html#a4d09227bd9de91efc1a40bf676e10c72">`TRAP_TRAP</a><span class="vhdlchar"></span>) <span class="vhdlchar">trap</span> &lt;= { <span class="vhdllogic">4&#39;b0010</span>, <span class="vhdlchar">ir</span>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] };
<a name="l01942"></a>01942 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">trap_control</span> == <a class="code" href="ao68000_8v.html#a8d6c015903e3a60339a6e8cc196bb440">`TRAP_FROM_DECODER</a><span class="vhdlchar"></span>) <span class="vhdlchar">trap</span> &lt;= <a class="code" href="classregisters.html#a278b33a84015867a530ac4279331d570">decoder_trap</a>;
<a name="l01943"></a>01943 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">trap_control</span> == <a class="code" href="ao68000_8v.html#a57812c3cf3905152a60361ae979a4c2d">`TRAP_FROM_INTERRUPT</a><span class="vhdlchar"></span>) <span class="vhdlchar">trap</span> &lt;= <a class="code" href="classregisters.html#a10ef9845f594ecc956dc1b1c8cdef44e">interrupt_trap</a>;
<a name="l01944"></a>01944 <span class="vhdlkeyword">end</span>
<a name="l01945"></a>01945
<a name="l01946"></a><a class="code" href="classregisters.html#a2a04a4a12e64f1ffb3ec95095716fee7">01946</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01947"></a>01947 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">offset</span> &lt;= <span class="vhdllogic">32&#39;d0</span>;
<a name="l01948"></a>01948 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">offset_control</span> == <a class="code" href="ao68000_8v.html#ad904ffb95a59f475e446877344adb415">`OFFSET_IMM_8</a><span class="vhdlchar"></span>) <span class="vhdlchar">offset</span> &lt;= { {<span class="vhdllogic">24</span>{<a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">71</span>]}}, <a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">71</span>:<span class="vhdllogic">64</span>] };
<a name="l01949"></a>01949 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">offset_control</span> == <a class="code" href="ao68000_8v.html#a87c5da2d7633077683260709d88602e0">`OFFSET_IMM_16</a><span class="vhdlchar"></span>) <span class="vhdlchar">offset</span> &lt;= { {<span class="vhdllogic">16</span>{<a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">79</span>]}}, <a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">79</span>:<span class="vhdllogic">64</span>] };
<a name="l01950"></a>01950 <span class="vhdlkeyword">end</span>
<a name="l01951"></a>01951
<a name="l01952"></a><a class="code" href="classregisters.html#af284685eb0240e8fc444c84618b1af67">01952</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01953"></a>01953 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">index</span> &lt;= <span class="vhdllogic">32&#39;d0</span>;
<a name="l01954"></a>01954 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">index_control</span> == <a class="code" href="ao68000_8v.html#a1db54bd70d82cea2a77c6d5c823f04db">`INDEX_0</a><span class="vhdlchar"></span>) <span class="vhdlchar">index</span> &lt;= <span class="vhdllogic">32&#39;d0</span>;
<a name="l01955"></a>01955 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">index_control</span> == <a class="code" href="ao68000_8v.html#af05405b84ee28262882d3c7ac7a5a80c">`INDEX_LOAD_EXTENDED</a><span class="vhdlchar"></span>) <span class="vhdlchar">index</span> &lt;=
<a name="l01956"></a>01956 (<a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">79</span>] == <span class="vhdllogic">1&#39;b0</span>) ?
<a name="l01957"></a>01957 ( (<a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">75</span>] == <span class="vhdllogic">1&#39;b0</span>) ?
<a name="l01958"></a>01958 { {<span class="vhdllogic">16</span>{<a class="code" href="classregisters.html#a659bea909e94f7512c4311bcff473a5d">Dn_output</a>[<span class="vhdllogic">15</span>]}}, <a class="code" href="classregisters.html#a659bea909e94f7512c4311bcff473a5d">Dn_output</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] } : <a class="code" href="classregisters.html#a659bea909e94f7512c4311bcff473a5d">Dn_output</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>]
<a name="l01959"></a>01959 ) :
<a name="l01960"></a>01960 ( (<a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">75</span>] == <span class="vhdllogic">1&#39;b0</span>) ?
<a name="l01961"></a>01961 { {<span class="vhdllogic">16</span>{<a class="code" href="classregisters.html#a7fdc26691a005524667257529b1c1212">An_output</a>[<span class="vhdllogic">15</span>]}}, <a class="code" href="classregisters.html#a7fdc26691a005524667257529b1c1212">An_output</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] } : <a class="code" href="classregisters.html#a7fdc26691a005524667257529b1c1212">An_output</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>]
<a name="l01962"></a>01962 );
<a name="l01963"></a>01963 <span class="vhdlkeyword">end</span>
<a name="l01964"></a>01964
<a name="l01965"></a><a class="code" href="classregisters.html#a12d4c2e0121456bcb2b23e7444c1da06">01965</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01966"></a>01966 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">stop_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01967"></a>01967 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">stop_flag_control</span> == <a class="code" href="ao68000_8v.html#a5131e7ee341cd6f2ea5350a89b19a488">`STOP_FLAG_SET</a><span class="vhdlchar"></span>) <span class="vhdlchar">stop_flag</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01968"></a>01968 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">stop_flag_control</span> == <a class="code" href="ao68000_8v.html#a0e63684fc863d639423c2d9f0f8e6cd9">`STOP_FLAG_CLEAR</a><span class="vhdlchar"></span>) <span class="vhdlchar">stop_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01969"></a>01969 <span class="vhdlkeyword">end</span>
<a name="l01970"></a>01970
<a name="l01971"></a><a class="code" href="classregisters.html#acf180186b03cdc0ad93be0efb7fa2815">01971</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01972"></a>01972 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">trace_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01973"></a>01973 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">trace_flag_control</span> == <a class="code" href="ao68000_8v.html#a3cb5bcdd68537f527007213efe5c2d4f">`TRACE_FLAG_COPY_WHEN_NO_STOP</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classregisters.html#a8031b93d1dc568b98697eb0c81b13bfd">prefetch_ir_valid</a> == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <a class="code" href="classregisters.html#a278b33a84015867a530ac4279331d570">decoder_trap</a> == <span class="vhdllogic">8&#39;d0</span> &amp;&amp; <span class="vhdlchar">stop_flag</span> == <span class="vhdllogic">1&#39;b0</span>)
<a name="l01974"></a>01974 <span class="vhdlchar">trace_flag</span> &lt;= <a class="code" href="classregisters.html#a116473c99b3cbf75fd0f48a25ea9227e">sr</a>[<span class="vhdllogic">15</span>];
<a name="l01975"></a>01975 <span class="vhdlkeyword">end</span>
<a name="l01976"></a>01976
<a name="l01977"></a><a class="code" href="classregisters.html#a328ee93f9ab0ed3ebab4dc5936a7c5a0">01977</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01978"></a>01978 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">group_0_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01979"></a>01979 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">group_0_flag_control</span> == <a class="code" href="ao68000_8v.html#a5333b31d43f3c7de70d3cad313720ef4">`GROUP_0_FLAG_SET</a><span class="vhdlchar"></span>) <span class="vhdlchar">group_0_flag</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01980"></a>01980 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">group_0_flag_control</span> == <a class="code" href="ao68000_8v.html#a28adb393ace594d548dfe7f070fd837b">`GROUP_0_FLAG_CLEAR_WHEN_VALID_PREFETCH</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classregisters.html#a8031b93d1dc568b98697eb0c81b13bfd">prefetch_ir_valid</a> == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <span class="vhdlchar">stop_flag</span> == <span class="vhdllogic">1&#39;b0</span>)
<a name="l01981"></a>01981 <span class="vhdlchar">group_0_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01982"></a>01982 <span class="vhdlkeyword">end</span>
<a name="l01983"></a>01983
<a name="l01984"></a><a class="code" href="classregisters.html#ad172a9061d9bb3653a3996dc4a74e101">01984</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01985"></a>01985 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">instruction_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01986"></a>01986 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">instruction_flag_control</span> == <a class="code" href="ao68000_8v.html#a6882447365cc7940c16017ee13305875">`INSTRUCTION_FLAG_SET</a><span class="vhdlchar"></span>) <span class="vhdlchar">instruction_flag</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01987"></a>01987 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">instruction_flag_control</span> == <a class="code" href="ao68000_8v.html#adaf70d0e1aaa9fe89fc79971d67bc172">`INSTRUCTION_FLAG_CLEAR_IN_MAIN_LOOP</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classregisters.html#a8031b93d1dc568b98697eb0c81b13bfd">prefetch_ir_valid</a> == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <a class="code" href="classregisters.html#a278b33a84015867a530ac4279331d570">decoder_trap</a> == <span class="vhdllogic">8&#39;d0</span> &amp;&amp; <span class="vhdlchar">stop_flag</span> == <span class="vhdllogic">1&#39;b0</span>)
<a name="l01988"></a>01988 <span class="vhdlchar">instruction_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01989"></a>01989 <span class="vhdlkeyword">end</span>
<a name="l01990"></a>01990
<a name="l01991"></a><a class="code" href="classregisters.html#a34326a20d0a44ce95c7da4da53005097">01991</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01992"></a>01992 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">read_modify_write_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01993"></a>01993 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">read_modify_write_flag_control</span> == <a class="code" href="ao68000_8v.html#a2ba2dbb4697aa9a3559b775da0ade761">`READ_MODIFY_WRITE_FLAG_SET</a><span class="vhdlchar"></span>) <span class="vhdlchar">read_modify_write_flag</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01994"></a>01994 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">read_modify_write_flag_control</span> == <a class="code" href="ao68000_8v.html#ace5de6cd5ad33427e8efd5ec8191c297">`READ_MODIFY_WRITE_FLAG_CLEAR</a><span class="vhdlchar"></span>) <span class="vhdlchar">read_modify_write_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01995"></a>01995 <span class="vhdlkeyword">end</span>
<a name="l01996"></a>01996
<a name="l01997"></a><a class="code" href="classregisters.html#ad881b4aebf8b3df42129f9731b6f6098">01997</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01998"></a>01998 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">do_reset_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01999"></a>01999 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_reset_flag_control</span> == <a class="code" href="ao68000_8v.html#a682472d63f131aa31c38abd6f2d577ab">`DO_RESET_FLAG_SET</a><span class="vhdlchar"></span>) <span class="vhdlchar">do_reset_flag</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l02000"></a>02000 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_reset_flag_control</span> == <a class="code" href="ao68000_8v.html#afd7c962bcd95f3629d247e7790f9cf95">`DO_RESET_FLAG_CLEAR</a><span class="vhdlchar"></span>) <span class="vhdlchar">do_reset_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02001"></a>02001 <span class="vhdlkeyword">end</span>
<a name="l02002"></a>02002
<a name="l02003"></a><a class="code" href="classregisters.html#aa69b93f001339d4b8ae1295a5cb215ec">02003</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l02004"></a>02004 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">do_interrupt_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02005"></a>02005 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_interrupt_flag_control</span> == <a class="code" href="ao68000_8v.html#acc420165ae00aa63b4d40c220dc1ed79">`DO_INTERRUPT_FLAG_SET_IF_ACTIVE</a><span class="vhdlchar"></span>) <span class="vhdlchar">do_interrupt_flag</span> &lt;= (<a class="code" href="classregisters.html#aa92eeffb2c5af01c413399dfb1f58b17">interrupt_mask</a> != <span class="vhdllogic">3&#39;b000</span>) ? <span class="vhdllogic">1&#39;b1</span> : <span class="vhdllogic">1&#39;b0</span>;
<a name="l02006"></a>02006 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_interrupt_flag_control</span> == <a class="code" href="ao68000_8v.html#abe668eeea71491f898b31b9c66a4db96">`DO_INTERRUPT_FLAG_CLEAR</a><span class="vhdlchar"></span>) <span class="vhdlchar">do_interrupt_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02007"></a>02007 <span class="vhdlkeyword">end</span>
<a name="l02008"></a>02008
<a name="l02009"></a><a class="code" href="classregisters.html#a63d22bb9298a179653d09d6b21e6c68b">02009</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l02010"></a>02010 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">do_read_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02011"></a>02011 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_read_flag_control</span> == <a class="code" href="ao68000_8v.html#a210a4746c070617bd4272cf091ce4977">`DO_READ_FLAG_SET</a><span class="vhdlchar"></span>) <span class="vhdlchar">do_read_flag</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l02012"></a>02012 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_read_flag_control</span> == <a class="code" href="ao68000_8v.html#a3186ce27b4c9202d124c4bee6b07e2fd">`DO_READ_FLAG_CLEAR</a><span class="vhdlchar"></span>) <span class="vhdlchar">do_read_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02013"></a>02013 <span class="vhdlkeyword">end</span>
<a name="l02014"></a>02014
<a name="l02015"></a><a class="code" href="classregisters.html#a66ffba6d56dd08fe7b968605c3b68465">02015</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l02016"></a>02016 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">do_write_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02017"></a>02017 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_write_flag_control</span> == <a class="code" href="ao68000_8v.html#a97fc325edc48a555daf24f1757c5e7bf">`DO_WRITE_FLAG_SET</a><span class="vhdlchar"></span>) <span class="vhdlchar">do_write_flag</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l02018"></a>02018 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_write_flag_control</span> == <a class="code" href="ao68000_8v.html#ad6f9aea669c0c0233f4155f29afc4d1d">`DO_WRITE_FLAG_CLEAR</a><span class="vhdlchar"></span>) <span class="vhdlchar">do_write_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02019"></a>02019 <span class="vhdlkeyword">end</span>
<a name="l02020"></a>02020
<a name="l02021"></a><a class="code" href="classregisters.html#ab3c53c1dc1763e2d051eaa736e429d58">02021</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l02022"></a>02022 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">do_blocked_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02023"></a>02023 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_blocked_flag_control</span> == <a class="code" href="ao68000_8v.html#ac69029fe984c3090537ed247a8106344">`DO_BLOCKED_FLAG_SET</a><span class="vhdlchar"></span>) <span class="vhdlchar">do_blocked_flag</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l02024"></a>02024 <span class="vhdlkeyword">end</span>
<a name="l02025"></a>02025
<a name="l02026"></a><a class="code" href="classregisters.html#a09281e3224878c570c81844785844fe0">02026</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l02027"></a>02027 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">data_write</span> &lt;= <span class="vhdllogic">32&#39;d0</span>;
<a name="l02028"></a>02028 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">data_write_control</span> == <a class="code" href="ao68000_8v.html#ab576808298f9e1938241b8843e55c54e">`DATA_WRITE_FROM_RESULT</a><span class="vhdlchar"></span>) <span class="vhdlchar">data_write</span> &lt;= <a class="code" href="classregisters.html#ad27ecd2d9ef571fa88b998f3674fe9a6">result</a>;
<a name="l02029"></a>02029 <span class="vhdlkeyword">end</span>
<a name="l02030"></a>02030
<a name="l02031"></a>02031 <span class="vhdlkeyword">assign</span> <span class="vhdlchar">An_address</span> =
<a name="l02032"></a>02032 (<span class="vhdlchar">An_address_control</span> == <a class="code" href="ao68000_8v.html#a50986c5b3afb053fcb3841dce7a93115">`AN_ADDRESS_FROM_EXTENDED</a><span class="vhdlchar"></span>) ? { <a class="code" href="classregisters.html#a116473c99b3cbf75fd0f48a25ea9227e">sr</a>[<span class="vhdllogic">13</span>], <a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">78</span>:<span class="vhdllogic">76</span>] } :
<a name="l02033"></a>02033 (<span class="vhdlchar">An_address_control</span> == <a class="code" href="ao68000_8v.html#ad5d4b9f48266549b9e8e5ac0c3ad239a">`AN_ADDRESS_USP</a><span class="vhdlchar"></span>) ? <span class="vhdllogic">4&#39;b0111</span> :
<a name="l02034"></a>02034 (<span class="vhdlchar">An_address_control</span> == <a class="code" href="ao68000_8v.html#a0dff5098fabf2afeac419c2e3c69b452">`AN_ADDRESS_SSP</a><span class="vhdlchar"></span>) ? <span class="vhdllogic">4&#39;b1111</span> :
<a name="l02035"></a>02035 { <a class="code" href="classregisters.html#a116473c99b3cbf75fd0f48a25ea9227e">sr</a>[<span class="vhdllogic">13</span>], <a class="code" href="classregisters.html#aa1a45d113f21dba8f82a93ddfe1d6409">ea_reg</a> };
<a name="l02036"></a>02036
<a name="l02037"></a>02037 <span class="vhdlkeyword">assign</span> <span class="vhdlchar">An_input</span> =
<a name="l02038"></a>02038 (<span class="vhdlchar">An_input_control</span> == <a class="code" href="ao68000_8v.html#a67d98f6de465730c1bc9792aab02784c">`AN_INPUT_FROM_ADDRESS</a><span class="vhdlchar"></span>) ? <span class="vhdlchar">address</span> :
<a name="l02039"></a>02039 (<span class="vhdlchar">An_input_control</span> == <a class="code" href="ao68000_8v.html#a90bc8bad52abb88cc05948307f41ffcf">`AN_INPUT_FROM_PREFETCH_IR</a><span class="vhdlchar"></span>) ? <a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">79</span>:<span class="vhdllogic">48</span>] :
<a name="l02040"></a>02040 <a class="code" href="classregisters.html#ad27ecd2d9ef571fa88b998f3674fe9a6">result</a>;
<a name="l02041"></a>02041
<a name="l02042"></a>02042 <span class="vhdlkeyword">assign</span> <span class="vhdlchar">Dn_address</span> = (<span class="vhdlchar">Dn_address_control</span> == <a class="code" href="ao68000_8v.html#aad74420658cfe8412a03c3dd6654ceb1">`DN_ADDRESS_FROM_EXTENDED</a><span class="vhdlchar"></span>) ? <a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">78</span>:<span class="vhdllogic">76</span>] : <a class="code" href="classregisters.html#aa1a45d113f21dba8f82a93ddfe1d6409">ea_reg</a>;
<a name="l02043"></a>02043
<a name="l02044"></a>02044 <span class="vhdlkeyword">endmodule</span>
<a name="l02045"></a>02045
<a name="l02046"></a>02046 <span class="keyword">/***********************************************************************************************************************</span>
<a name="l02047"></a>02047 <span class="keyword"> Memory registers</span>
<a name="l02048"></a>02048 <span class="keyword"> ***********************************************************************************************************************/</span>
<a name="l02049"></a>02049
<a name="l01730"></a>01730
<a name="l01731"></a>01731 <span class="vhdlkeyword">output</span> [<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] An_address,
<a name="l01732"></a>01732 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] An_address_control,
<a name="l01733"></a>01733
<a name="l01734"></a>01734 <span class="vhdlkeyword">output</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] An_input,
<a name="l01735"></a>01735 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] An_input_control,
<a name="l01736"></a>01736
<a name="l01737"></a>01737 <span class="vhdlkeyword">output</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] Dn_address,
<a name="l01738"></a>01738 <span class="vhdlkeyword">input</span> Dn_address_control,
<a name="l01739"></a>01739
<a name="l01740"></a>01740 <span class="vhdlkeyword">input</span> [<span class="vhdllogic">17</span>:<span class="vhdllogic">0</span>] decoder_alu,
<a name="l01741"></a>01741 <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">17</span>:<span class="vhdllogic">0</span>] decoder_alu_reg
<a name="l01742"></a>01742 );
<a name="l01743"></a>01743
<a name="l01744"></a><a class="code" href="classregisters.html#af160a45a0b3cd7794efb7fea1ed60526">01744</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classregisters.html#af160a45a0b3cd7794efb7fea1ed60526">pc_valid</a>;
<a name="l01745"></a>01745
<a name="l01746"></a>01746 <span class="keyword">// pc_change connected</span>
<a name="l01747"></a><a class="code" href="classregisters.html#a1634ef9b02cbeb72da694a9145e2d276">01747</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01748"></a>01748 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>
<a name="l01749"></a>01749 <span class="vhdlchar">pc</span> &lt;= <span class="vhdllogic">32&#39;d0</span>;
<a name="l01750"></a>01750 <a class="code" href="classregisters.html#af160a45a0b3cd7794efb7fea1ed60526">pc_valid</a> &lt;= <span class="vhdllogic">32&#39;d0</span>;
<a name="l01751"></a>01751 <span class="vhdlkeyword">end</span>
<a name="l01752"></a>01752 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01753"></a>01753 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_control</span> == <a class="code" href="ao68000_8v.html#a63d3becb9e2a770cfd9df4a70298c30a">`PC_FROM_RESULT</a><span class="vhdlchar"></span>) <span class="vhdlchar">pc</span> = <a class="code" href="classregisters.html#ad27ecd2d9ef571fa88b998f3674fe9a6">result</a>;
<a name="l01754"></a>01754 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_control</span> == <a class="code" href="ao68000_8v.html#a023942fcdb1eb88002847e9730cf62c2">`PC_INCR_BY_2</a><span class="vhdlchar"></span>) <span class="vhdlchar">pc</span> = <span class="vhdlchar">pc</span> + <span class="vhdllogic">32&#39;d2</span>;
<a name="l01755"></a>01755 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_control</span> == <a class="code" href="ao68000_8v.html#a6b8aff09ca5bd77e19e6d7a5076a58bd">`PC_INCR_BY_4</a><span class="vhdlchar"></span>) <span class="vhdlchar">pc</span> = <span class="vhdlchar">pc</span> + <span class="vhdllogic">32&#39;d4</span>;
<a name="l01756"></a>01756 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_control</span> == <a class="code" href="ao68000_8v.html#aefc526541d0911ae626689caead407ab">`PC_INCR_BY_SIZE</a><span class="vhdlchar"></span>) <span class="vhdlchar">pc</span> = (<span class="vhdlchar">size</span>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1&#39;b0</span>) ? <span class="vhdlchar">pc</span> + <span class="vhdllogic">32&#39;d2</span> : <span class="vhdlchar">pc</span> + <span class="vhdllogic">32&#39;d4</span>;
<a name="l01757"></a>01757 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_control</span> == <a class="code" href="ao68000_8v.html#a48c2827ab160beae0aab354b09b59e1a">`PC_FROM_PREFETCH_IR</a><span class="vhdlchar"></span>) <span class="vhdlchar">pc</span> = <a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">47</span>:<span class="vhdllogic">16</span>];
<a name="l01758"></a>01758 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_control</span> == <a class="code" href="ao68000_8v.html#a6f1c276d75adca2b0290b7936476fde8">`PC_INCR_BY_2_IN_MAIN_LOOP</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classregisters.html#a8031b93d1dc568b98697eb0c81b13bfd">prefetch_ir_valid</a> == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <a class="code" href="classregisters.html#a278b33a84015867a530ac4279331d570">decoder_trap</a> == <span class="vhdllogic">8&#39;d0</span> &amp;&amp; <span class="vhdlchar">stop_flag</span> == <span class="vhdllogic">1&#39;b0</span>)
<a name="l01759"></a>01759 <span class="vhdlchar">pc</span> = <span class="vhdlchar">pc</span> + <span class="vhdllogic">32&#39;d2</span>;
<a name="l01760"></a>01760 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b0</span>) <a class="code" href="classregisters.html#af160a45a0b3cd7794efb7fea1ed60526">pc_valid</a> &lt;= <span class="vhdlchar">pc</span>;
<a name="l01761"></a>01761 <span class="vhdlkeyword">end</span>
<a name="l01762"></a>01762 <span class="vhdlkeyword">end</span>
<a name="l01763"></a>01763
<a name="l01764"></a>01764 <span class="vhdlkeyword">assign</span> <a class="code" href="classregisters.html#a73f335a76d3869b20956c67a67ff8f6e">pc_change</a> =
<a name="l01765"></a>01765 ( <span class="vhdlchar">pc_control</span> == <a class="code" href="ao68000_8v.html#a63d3becb9e2a770cfd9df4a70298c30a">`PC_FROM_RESULT</a><span class="vhdlchar"></span> || <span class="vhdlchar">pc_control</span> == <a class="code" href="ao68000_8v.html#a48c2827ab160beae0aab354b09b59e1a">`PC_FROM_PREFETCH_IR</a><span class="vhdlchar"></span>
<a name="l01766"></a>01766 ) ? <span class="vhdllogic">2&#39;b11</span> :
<a name="l01767"></a>01767 ( <span class="vhdlchar">pc_control</span> == <a class="code" href="ao68000_8v.html#a6b8aff09ca5bd77e19e6d7a5076a58bd">`PC_INCR_BY_4</a><span class="vhdlchar"></span> || (<span class="vhdlchar">pc_control</span> == <a class="code" href="ao68000_8v.html#aefc526541d0911ae626689caead407ab">`PC_INCR_BY_SIZE</a><span class="vhdlchar"></span> &amp;&amp; <span class="vhdlchar">size</span>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1&#39;b1</span>)
<a name="l01768"></a>01768 ) ? <span class="vhdllogic">2&#39;b10</span> :
<a name="l01769"></a>01769 ( <span class="vhdlchar">pc_control</span> == <a class="code" href="ao68000_8v.html#a023942fcdb1eb88002847e9730cf62c2">`PC_INCR_BY_2</a><span class="vhdlchar"></span> || (<span class="vhdlchar">pc_control</span> == <a class="code" href="ao68000_8v.html#aefc526541d0911ae626689caead407ab">`PC_INCR_BY_SIZE</a><span class="vhdlchar"></span> &amp;&amp; <span class="vhdlchar">size</span>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1&#39;b0</span>) ||
<a name="l01770"></a>01770 (<span class="vhdlchar">pc_control</span> == <a class="code" href="ao68000_8v.html#a6f1c276d75adca2b0290b7936476fde8">`PC_INCR_BY_2_IN_MAIN_LOOP</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classregisters.html#a8031b93d1dc568b98697eb0c81b13bfd">prefetch_ir_valid</a> == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <a class="code" href="classregisters.html#a278b33a84015867a530ac4279331d570">decoder_trap</a> == <span class="vhdllogic">8&#39;d0</span> &amp;&amp; <span class="vhdlchar">stop_flag</span> == <span class="vhdllogic">1&#39;b0</span>)
<a name="l01771"></a>01771 ) ? <span class="vhdllogic">2&#39;b01</span> :
<a name="l01772"></a>01772 <span class="vhdllogic">2&#39;b00</span>;
<a name="l01773"></a>01773
<a name="l01774"></a><a class="code" href="classregisters.html#a160e4dadb225ac705317bf8de0c78277">01774</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01775"></a>01775 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>
<a name="l01776"></a>01776 <span class="vhdlchar">size</span> &lt;= <span class="vhdllogic">2&#39;b00</span>;
<a name="l01777"></a>01777 <span class="vhdlkeyword">end</span>
<a name="l01778"></a>01778 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">size_control</span> != <a class="code" href="ao68000_8v.html#a85698146140d774ffe2b54e5be255726">`SIZE_IDLE</a><span class="vhdlchar"></span>) <span class="vhdlkeyword">begin</span>
<a name="l01779"></a>01779 <span class="keyword">// BYTE</span>
<a name="l01780"></a>01780 <span class="vhdlchar">size</span>[<span class="vhdllogic">0</span>] &lt;= (<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a8a04b85bed76a4381d1187aec9694a7e">`SIZE_BYTE</a><span class="vhdlchar"></span>)
<a name="l01781"></a>01781 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#ad8d417f0548efb4299bed1ed75004cbe">`SIZE_3</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b00</span>))
<a name="l01782"></a>01782 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a4d9196508aad9e995d45bfda3f7c6884">`SIZE_4</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">13</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">2&#39;b01</span>))
<a name="l01783"></a>01783 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a3ce4d5e820fe7c438d0bd9c7f067ac3f">`SIZE_6</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b000</span>));
<a name="l01784"></a>01784 <span class="keyword">// WORD</span>
<a name="l01785"></a>01785 <span class="vhdlchar">size</span>[<span class="vhdllogic">1</span>] &lt;= (<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a9da3fa515a6d6e5949573714c5682999">`SIZE_WORD</a><span class="vhdlchar"></span>)
<a name="l01786"></a>01786 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a1b8724879ab643802f27348fa58f7208">`SIZE_1</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b00</span>))
<a name="l01787"></a>01787 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a83d20a891b85a7fabe3d8c74b66ad884">`SIZE_1_PLUS</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b10</span>))
<a name="l01788"></a>01788 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a1eca0e7e9287916bcfa96b96b0c46154">`SIZE_2</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1&#39;b0</span>))
<a name="l01789"></a>01789 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#ad8d417f0548efb4299bed1ed75004cbe">`SIZE_3</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b01</span>))
<a name="l01790"></a>01790 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a4d9196508aad9e995d45bfda3f7c6884">`SIZE_4</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">13</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">2&#39;b11</span>))
<a name="l01791"></a>01791 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a0e07cba66f352b53ebb2dd2a48c58cff">`SIZE_5</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b0</span>));
<a name="l01792"></a>01792 <span class="keyword">// LONG</span>
<a name="l01793"></a>01793 <span class="vhdlchar">size</span>[<span class="vhdllogic">2</span>] &lt;= (<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#ae54bb350f5d3a019211af2a214f46273">`SIZE_LONG</a><span class="vhdlchar"></span>)
<a name="l01794"></a>01794 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a1b8724879ab643802f27348fa58f7208">`SIZE_1</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b00</span>))
<a name="l01795"></a>01795 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a83d20a891b85a7fabe3d8c74b66ad884">`SIZE_1_PLUS</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b10</span>))
<a name="l01796"></a>01796 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a1eca0e7e9287916bcfa96b96b0c46154">`SIZE_2</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1&#39;b1</span>))
<a name="l01797"></a>01797 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#ad8d417f0548efb4299bed1ed75004cbe">`SIZE_3</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>] == <span class="vhdllogic">1&#39;b1</span>))
<a name="l01798"></a>01798 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a4d9196508aad9e995d45bfda3f7c6884">`SIZE_4</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">12</span>] == <span class="vhdllogic">1&#39;b0</span>))
<a name="l01799"></a>01799 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a0e07cba66f352b53ebb2dd2a48c58cff">`SIZE_5</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b1</span>))
<a name="l01800"></a>01800 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a3ce4d5e820fe7c438d0bd9c7f067ac3f">`SIZE_6</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b000</span>));
<a name="l01801"></a>01801 <span class="vhdlkeyword">end</span>
<a name="l01802"></a>01802 <span class="vhdlkeyword">end</span>
<a name="l01803"></a>01803
<a name="l01804"></a><a class="code" href="classregisters.html#a098bb8c5f886c173a49d1e015dd37289">01804</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01805"></a>01805 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <a class="code" href="classregisters.html#aa1a45d113f21dba8f82a93ddfe1d6409">ea_reg</a> &lt;= <span class="vhdllogic">3&#39;b000</span>;
<a name="l01806"></a>01806 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#ae09341fa22dc0b4675dc02dc4a5fb918">ea_reg_control</a> == <a class="code" href="ao68000_8v.html#ab608c5385657295b902b8ffc21c43d03">`EA_REG_IR_2_0</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#aa1a45d113f21dba8f82a93ddfe1d6409">ea_reg</a> &lt;= <span class="vhdlchar">ir</span>[<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>];
<a name="l01807"></a>01807 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#ae09341fa22dc0b4675dc02dc4a5fb918">ea_reg_control</a> == <a class="code" href="ao68000_8v.html#a56f29ecaaf69843219c88d8e0f252048">`EA_REG_IR_11_9</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#aa1a45d113f21dba8f82a93ddfe1d6409">ea_reg</a> &lt;= <span class="vhdlchar">ir</span>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>];
<a name="l01808"></a>01808 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#ae09341fa22dc0b4675dc02dc4a5fb918">ea_reg_control</a> == <a class="code" href="ao68000_8v.html#af2b8ce7c793c79dee8394ad309a1ef71">`EA_REG_MOVEM_REG_2_0</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#aa1a45d113f21dba8f82a93ddfe1d6409">ea_reg</a> &lt;= <span class="vhdlchar">movem_modreg</span>[<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>];
<a name="l01809"></a>01809 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#ae09341fa22dc0b4675dc02dc4a5fb918">ea_reg_control</a> == <a class="code" href="ao68000_8v.html#aa5ef414e1c0f769a38cdd8b3aeef5184">`EA_REG_3b111</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#aa1a45d113f21dba8f82a93ddfe1d6409">ea_reg</a> &lt;= <span class="vhdllogic">3&#39;b111</span>;
<a name="l01810"></a>01810 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#ae09341fa22dc0b4675dc02dc4a5fb918">ea_reg_control</a> == <a class="code" href="ao68000_8v.html#ab4936576a8613273a6487d2b78812c55">`EA_REG_3b100</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#aa1a45d113f21dba8f82a93ddfe1d6409">ea_reg</a> &lt;= <span class="vhdllogic">3&#39;b100</span>;
<a name="l01811"></a>01811 <span class="vhdlkeyword">end</span>
<a name="l01812"></a>01812
<a name="l01813"></a><a class="code" href="classregisters.html#a6fc98500064486297076cc7c8e99e16f">01813</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01814"></a>01814 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ea_mod</a> &lt;= <span class="vhdllogic">3&#39;b000</span>;
<a name="l01815"></a>01815 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#af6205981eadd3ee1e9fa193f04b6a893">ea_mod_control</a> == <a class="code" href="ao68000_8v.html#a0c094175d5b6718611708b08af5e6342">`EA_MOD_IR_5_3</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ea_mod</a> &lt;= <span class="vhdlchar">ir</span>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>];
<a name="l01816"></a>01816 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#af6205981eadd3ee1e9fa193f04b6a893">ea_mod_control</a> == <a class="code" href="ao68000_8v.html#a45b520ba3dd813510ddca0ebe0a652f4">`EA_MOD_MOVEM_MOD_5_3</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ea_mod</a> &lt;= <span class="vhdlchar">movem_modreg</span>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>];
<a name="l01817"></a>01817 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#af6205981eadd3ee1e9fa193f04b6a893">ea_mod_control</a> == <a class="code" href="ao68000_8v.html#a46d304e545e3f136f9bc7fe83ffe61df">`EA_MOD_IR_8_6</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ea_mod</a> &lt;= <span class="vhdlchar">ir</span>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>];
<a name="l01818"></a>01818 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#af6205981eadd3ee1e9fa193f04b6a893">ea_mod_control</a> == <a class="code" href="ao68000_8v.html#a2e15ad20aa0f28ef9042982260a21316">`EA_MOD_PREDEC</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ea_mod</a> &lt;= <span class="vhdllogic">3&#39;b100</span>;
<a name="l01819"></a>01819 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#af6205981eadd3ee1e9fa193f04b6a893">ea_mod_control</a> == <a class="code" href="ao68000_8v.html#ae4ecbd320f11539d132c8e6aa3fdcb5c">`EA_MOD_3b111</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ea_mod</a> &lt;= <span class="vhdllogic">3&#39;b111</span>;
<a name="l01820"></a>01820 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#af6205981eadd3ee1e9fa193f04b6a893">ea_mod_control</a> == <a class="code" href="ao68000_8v.html#aee18d2c3a30bdec23a7de0889deb0d94">`EA_MOD_DN_PREDEC</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ea_mod</a> &lt;= (<span class="vhdlchar">ir</span>[<span class="vhdllogic">3</span>] == <span class="vhdllogic">1&#39;b0</span>) ? <span class="keyword">/* Dn **/</span> <span class="vhdllogic">3&#39;b000</span> : <span class="keyword">/* -(An) **/</span> <span class="vhdllogic">3&#39;b100</span>;
<a name="l01821"></a>01821 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#af6205981eadd3ee1e9fa193f04b6a893">ea_mod_control</a> == <a class="code" href="ao68000_8v.html#ac190b9646213ddb87ec06a5858d479b3">`EA_MOD_DN_AN_EXG</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ea_mod</a> &lt;= (<span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">5&#39;b01000</span> || <span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">5&#39;b10001</span>) ? <span class="keyword">/* Dn **/</span> <span class="vhdllogic">3&#39;b000</span> : <span class="keyword">/* An **/</span> <span class="vhdllogic">3&#39;b001</span>;
<a name="l01822"></a>01822 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#af6205981eadd3ee1e9fa193f04b6a893">ea_mod_control</a> == <a class="code" href="ao68000_8v.html#a51a36024571aca1d7d7c7fa928956589">`EA_MOD_POSTINC</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ea_mod</a> &lt;= <span class="vhdllogic">3&#39;b011</span>;
<a name="l01823"></a>01823 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#af6205981eadd3ee1e9fa193f04b6a893">ea_mod_control</a> == <a class="code" href="ao68000_8v.html#a7a6ccf87a21e66605e4672e95a6578e4">`EA_MOD_AN</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ea_mod</a> &lt;= <span class="vhdllogic">3&#39;b001</span>;
<a name="l01824"></a>01824 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#af6205981eadd3ee1e9fa193f04b6a893">ea_mod_control</a> == <a class="code" href="ao68000_8v.html#a8a000a242ea6cc51ac97ec35753faf7b">`EA_MOD_DN</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ea_mod</a> &lt;= <span class="vhdllogic">3&#39;b000</span>;
<a name="l01825"></a>01825 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#af6205981eadd3ee1e9fa193f04b6a893">ea_mod_control</a> == <a class="code" href="ao68000_8v.html#a88ded717145b6f89a3cd3416577225f0">`EA_MOD_INDIRECTOFFSET</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ea_mod</a> &lt;= <span class="vhdllogic">3&#39;b101</span>;
<a name="l01826"></a>01826 <span class="vhdlkeyword">end</span>
<a name="l01827"></a>01827
<a name="l01828"></a><a class="code" href="classregisters.html#aa536be1ed88148e7c828c0183e8a0757">01828</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01829"></a>01829 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <a class="code" href="classregisters.html#a34f0e8ea4d6f79a3c8cf7e3ba129ea58">ea_type</a> &lt;= <a class="code" href="ao68000_8v.html#a30b69aee8fb5af4ab38fc9f0d92a28d3">`EA_TYPE_IDLE</a><span class="vhdlchar"></span>;
<a name="l01830"></a>01830 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#aa22fa504627eea9bff308c3358ef9240">ea_type_control</a> == <a class="code" href="ao68000_8v.html#a6f693ee79161bffa99f05d9f5b89a2d0">`EA_TYPE_ALL</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a34f0e8ea4d6f79a3c8cf7e3ba129ea58">ea_type</a> &lt;= <a class="code" href="ao68000_8v.html#a6f693ee79161bffa99f05d9f5b89a2d0">`EA_TYPE_ALL</a><span class="vhdlchar"></span>;
<a name="l01831"></a>01831 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#aa22fa504627eea9bff308c3358ef9240">ea_type_control</a> == <a class="code" href="ao68000_8v.html#a925f0004ba49b82dbdf7c4ae969ba6ed">`EA_TYPE_CONTROL_POSTINC</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a34f0e8ea4d6f79a3c8cf7e3ba129ea58">ea_type</a> &lt;= <a class="code" href="ao68000_8v.html#a925f0004ba49b82dbdf7c4ae969ba6ed">`EA_TYPE_CONTROL_POSTINC</a><span class="vhdlchar"></span>;
<a name="l01832"></a>01832 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#aa22fa504627eea9bff308c3358ef9240">ea_type_control</a> == <a class="code" href="ao68000_8v.html#a41499eaa1b7aa62f455a07e5435d754a">`EA_TYPE_CONTROLALTER_PREDEC</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a34f0e8ea4d6f79a3c8cf7e3ba129ea58">ea_type</a> &lt;= <a class="code" href="ao68000_8v.html#a41499eaa1b7aa62f455a07e5435d754a">`EA_TYPE_CONTROLALTER_PREDEC</a><span class="vhdlchar"></span>;
<a name="l01833"></a>01833 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#aa22fa504627eea9bff308c3358ef9240">ea_type_control</a> == <a class="code" href="ao68000_8v.html#ae2c794f81236993a23138cbf3f7eda44">`EA_TYPE_CONTROL</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a34f0e8ea4d6f79a3c8cf7e3ba129ea58">ea_type</a> &lt;= <a class="code" href="ao68000_8v.html#ae2c794f81236993a23138cbf3f7eda44">`EA_TYPE_CONTROL</a><span class="vhdlchar"></span>;
<a name="l01834"></a>01834 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#aa22fa504627eea9bff308c3358ef9240">ea_type_control</a> == <a class="code" href="ao68000_8v.html#a17a8a468ddfc3bdb178081a368f4dd6c">`EA_TYPE_DATAALTER</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a34f0e8ea4d6f79a3c8cf7e3ba129ea58">ea_type</a> &lt;= <a class="code" href="ao68000_8v.html#a17a8a468ddfc3bdb178081a368f4dd6c">`EA_TYPE_DATAALTER</a><span class="vhdlchar"></span>;
<a name="l01835"></a>01835 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#aa22fa504627eea9bff308c3358ef9240">ea_type_control</a> == <a class="code" href="ao68000_8v.html#a8e7bc745d4def25f5a995a6955dbdb4b">`EA_TYPE_DN_AN</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a34f0e8ea4d6f79a3c8cf7e3ba129ea58">ea_type</a> &lt;= <a class="code" href="ao68000_8v.html#a8e7bc745d4def25f5a995a6955dbdb4b">`EA_TYPE_DN_AN</a><span class="vhdlchar"></span>;
<a name="l01836"></a>01836 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#aa22fa504627eea9bff308c3358ef9240">ea_type_control</a> == <a class="code" href="ao68000_8v.html#a653530f090b85ba7bcd93912b8834412">`EA_TYPE_MEMORYALTER</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a34f0e8ea4d6f79a3c8cf7e3ba129ea58">ea_type</a> &lt;= <a class="code" href="ao68000_8v.html#a653530f090b85ba7bcd93912b8834412">`EA_TYPE_MEMORYALTER</a><span class="vhdlchar"></span>;
<a name="l01837"></a>01837 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#aa22fa504627eea9bff308c3358ef9240">ea_type_control</a> == <a class="code" href="ao68000_8v.html#a1b85de8c778c471fdc569b4ef5f3bc60">`EA_TYPE_DATA</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a34f0e8ea4d6f79a3c8cf7e3ba129ea58">ea_type</a> &lt;= <a class="code" href="ao68000_8v.html#a1b85de8c778c471fdc569b4ef5f3bc60">`EA_TYPE_DATA</a><span class="vhdlchar"></span>;
<a name="l01838"></a>01838 <span class="vhdlkeyword">end</span>
<a name="l01839"></a>01839
<a name="l01840"></a><a class="code" href="classregisters.html#a8fa9503b229756474eafc4b087aa6511">01840</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01841"></a>01841 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;= <span class="vhdllogic">32&#39;hFFFFFFFF</span>;
<a name="l01842"></a>01842 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#a29e287eda5813f253f9f1cd527021533">`OP1_FROM_OP2</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;= <span class="vhdlchar">operand2</span>;
<a name="l01843"></a>01843 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#ab601cf0d52e5fe6ae155ab8084b236e1">`OP1_FROM_ADDRESS</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;= <span class="vhdlchar">address</span>;
<a name="l01844"></a>01844 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#aec7f41507eab6c659f5d544c942b441e">`OP1_FROM_DATA</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;=
<a name="l01845"></a>01845 (<span class="vhdlchar">size</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) ? { {<span class="vhdllogic">24</span>{<a class="code" href="classregisters.html#a0cdf5b5316a0edcd85909fc9da5ca864">data_read</a>[<span class="vhdllogic">7</span>]}}, <a class="code" href="classregisters.html#a0cdf5b5316a0edcd85909fc9da5ca864">data_read</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] } :
<a name="l01846"></a>01846 (<span class="vhdlchar">size</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span>) ? { {<span class="vhdllogic">16</span>{<a class="code" href="classregisters.html#a0cdf5b5316a0edcd85909fc9da5ca864">data_read</a>[<span class="vhdllogic">15</span>]}}, <a class="code" href="classregisters.html#a0cdf5b5316a0edcd85909fc9da5ca864">data_read</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] } :
<a name="l01847"></a>01847 <a class="code" href="classregisters.html#a0cdf5b5316a0edcd85909fc9da5ca864">data_read</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l01848"></a>01848 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#abc0874c9141535c9c6a071653810c8fc">`OP1_FROM_IMMEDIATE</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;=
<a name="l01849"></a>01849 (<span class="vhdlchar">size</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) ? { {<span class="vhdllogic">24</span>{<a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">71</span>]}}, <a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">71</span>:<span class="vhdllogic">64</span>] } :
<a name="l01850"></a>01850 (<span class="vhdlchar">size</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span>) ? { {<span class="vhdllogic">16</span>{<a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">79</span>]}}, <a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">79</span>:<span class="vhdllogic">64</span>] } :
<a name="l01851"></a>01851 <a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">79</span>:<span class="vhdllogic">48</span>];
<a name="l01852"></a>01852 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#a2adbf20e4776f4f5449563560fcfea3e">`OP1_FROM_RESULT</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;= <a class="code" href="classregisters.html#ad27ecd2d9ef571fa88b998f3674fe9a6">result</a>;
<a name="l01853"></a>01853 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#ac2bd7be96e464a7a06affeb71024f266">`OP1_MOVEQ</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;= { {<span class="vhdllogic">24</span>{<span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>]}}, <span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] };
<a name="l01854"></a>01854 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#aade66d4090f1aea9ed568a4e17ff1eae">`OP1_FROM_PC</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;= <a class="code" href="classregisters.html#af160a45a0b3cd7794efb7fea1ed60526">pc_valid</a>;
<a name="l01855"></a>01855 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#a4db6f8d952dd7d7cfffeb0de4ad4a08b">`OP1_LOAD_ZEROS</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;= <span class="vhdllogic">32&#39;b0</span>;
<a name="l01856"></a>01856 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#ae8489ec12e458975d614347191ba2004">`OP1_LOAD_ONES</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;= <span class="vhdllogic">32&#39;hFFFFFFFF</span>;
<a name="l01857"></a>01857 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#a9e1d49d77f5b144fff6cc8c0c021e5d2">`OP1_FROM_SR</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;= { <span class="vhdllogic">16&#39;b0</span>, <a class="code" href="classregisters.html#a116473c99b3cbf75fd0f48a25ea9227e">sr</a>[<span class="vhdllogic">15</span>], <span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classregisters.html#a116473c99b3cbf75fd0f48a25ea9227e">sr</a>[<span class="vhdllogic">13</span>], <span class="vhdllogic">2&#39;b0</span>, <a class="code" href="classregisters.html#a116473c99b3cbf75fd0f48a25ea9227e">sr</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">8</span>], <span class="vhdllogic">3&#39;b0</span>, <a class="code" href="classregisters.html#a116473c99b3cbf75fd0f48a25ea9227e">sr</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">0</span>] };
<a name="l01858"></a>01858 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#a1a44c33265ec779ad10e437621cda43b">`OP1_FROM_USP</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;= <a class="code" href="classregisters.html#a6810e76be48010f9b34a91c27ddd636b">usp</a>;
<a name="l01859"></a>01859 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#a4900ac90de9fd53eaeb1acddf51a9008">`OP1_FROM_AN</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;=
<a name="l01860"></a>01860 (<span class="vhdlchar">size</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span>) ? { {<span class="vhdllogic">16</span>{<a class="code" href="classregisters.html#a7fdc26691a005524667257529b1c1212">An_output</a>[<span class="vhdllogic">15</span>]}}, <a class="code" href="classregisters.html#a7fdc26691a005524667257529b1c1212">An_output</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] } :
<a name="l01861"></a>01861 <a class="code" href="classregisters.html#a7fdc26691a005524667257529b1c1212">An_output</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l01862"></a>01862 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#a3aa722db3503e9370be36b3d409f3e17">`OP1_FROM_DN</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;=
<a name="l01863"></a>01863 (<span class="vhdlchar">size</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) ? { {<span class="vhdllogic">24</span>{<a class="code" href="classregisters.html#a659bea909e94f7512c4311bcff473a5d">Dn_output</a>[<span class="vhdllogic">7</span>]}}, <a class="code" href="classregisters.html#a659bea909e94f7512c4311bcff473a5d">Dn_output</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] } :
<a name="l01864"></a>01864 (<span class="vhdlchar">size</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span>) ? { {<span class="vhdllogic">16</span>{<a class="code" href="classregisters.html#a659bea909e94f7512c4311bcff473a5d">Dn_output</a>[<span class="vhdllogic">15</span>]}}, <a class="code" href="classregisters.html#a659bea909e94f7512c4311bcff473a5d">Dn_output</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] } :
<a name="l01865"></a>01865 <a class="code" href="classregisters.html#a659bea909e94f7512c4311bcff473a5d">Dn_output</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l01866"></a>01866 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#a083db35259f035ab10f606d2c7dd82c6">`OP1_FROM_IR</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;= { <span class="vhdllogic">16&#39;b0</span>, <span class="vhdlchar">ir</span>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] };
<a name="l01867"></a>01867 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#a707f0ca7fa1a08446ba113ede9d5d8a4">`OP1_FROM_FAULT_ADDRESS</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;= <a class="code" href="classregisters.html#acfc96bc559a0660239cb6b8a8836b862">fault_address_state</a>;
<a name="l01868"></a>01868 <span class="vhdlkeyword">end</span>
<a name="l01869"></a>01869
<a name="l01870"></a><a class="code" href="classregisters.html#ae6143c84411ad159cbe1662f3909e726">01870</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01871"></a>01871 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">operand2</span> &lt;= <span class="vhdllogic">32&#39;hFFFFFFFF</span>;
<a name="l01872"></a>01872 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand2_control</span> == <a class="code" href="ao68000_8v.html#a092ca695ecfa2de9e4d4a27bbd89d40f">`OP2_FROM_OP1</a><span class="vhdlchar"></span>) <span class="vhdlchar">operand2</span> &lt;= <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a>;
<a name="l01873"></a>01873 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand2_control</span> == <a class="code" href="ao68000_8v.html#a5c2c8ed577b6ab91a5ae3861643575e7">`OP2_LOAD_1</a><span class="vhdlchar"></span>) <span class="vhdlchar">operand2</span> &lt;= <span class="vhdllogic">32&#39;d1</span>;
<a name="l01874"></a>01874 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand2_control</span> == <a class="code" href="ao68000_8v.html#a7c904b70c2347aaee330105f74a69fc1">`OP2_LOAD_COUNT</a><span class="vhdlchar"></span>) <span class="vhdlchar">operand2</span> &lt;=
<a name="l01875"></a>01875 (<span class="vhdlchar">ir</span>[<span class="vhdllogic">5</span>] == <span class="vhdllogic">1&#39;b0</span>) ? ( (<span class="vhdlchar">ir</span>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3&#39;b000</span>) ? <span class="vhdllogic">32&#39;b1000</span> : { <span class="vhdllogic">29&#39;b0</span>, <span class="vhdlchar">ir</span>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] } ) :
<a name="l01876"></a>01876 { <span class="vhdllogic">26&#39;b0</span>, <span class="vhdlchar">operand2</span>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] };
<a name="l01877"></a>01877 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand2_control</span> == <a class="code" href="ao68000_8v.html#aacec01f4da467eb6785c611710c1219d">`OP2_ADDQ_SUBQ</a><span class="vhdlchar"></span>) <span class="vhdlchar">operand2</span> &lt;= (<span class="vhdlchar">ir</span>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3&#39;b000</span>) ? <span class="vhdllogic">32&#39;b1000</span> : { <span class="vhdllogic">29&#39;b0</span>, <span class="vhdlchar">ir</span>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] };
<a name="l01878"></a>01878 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand2_control</span> == <a class="code" href="ao68000_8v.html#ad8cdca7f0cbac16e09b4e1a1e3ab4f11">`OP2_MOVE_OFFSET</a><span class="vhdlchar"></span>) <span class="vhdlchar">operand2</span> &lt;= (<span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">8&#39;b0</span>) ? <span class="vhdlchar">operand2</span>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] : { {<span class="vhdllogic">24</span>{<span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>]}}, <span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] };
<a name="l01879"></a>01879 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand2_control</span> == <a class="code" href="ao68000_8v.html#a041be53a35bc1a415713d34c839c81c5">`OP2_MOVE_ADDRESS_BUS_INFO</a><span class="vhdlchar"></span>) <span class="vhdlchar">operand2</span> &lt;= { <span class="vhdllogic">16&#39;b0</span>, <span class="vhdllogic">11&#39;b0</span>, <a class="code" href="classregisters.html#ae12d419de758617259ab74281fd09f03">rw_state</a>, <span class="vhdlchar">instruction_flag</span>, <a class="code" href="classregisters.html#a1864a58a4089bd5d72ba19730137c5ce">fc_state</a>};
<a name="l01880"></a>01880 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand2_control</span> == <a class="code" href="ao68000_8v.html#a81d303d3fcf43bd2ed3b99072571f816">`OP2_DECR_BY_1</a><span class="vhdlchar"></span>) <span class="vhdlchar">operand2</span> &lt;= <span class="vhdlchar">operand2</span> - <span class="vhdllogic">32&#39;b1</span>;
<a name="l01881"></a>01881 <span class="vhdlkeyword">end</span>
<a name="l01882"></a>01882
<a name="l01883"></a><a class="code" href="classregisters.html#ae04888e60d745f9f64ca5c52d0969adb">01883</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01884"></a>01884 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">address</span> &lt;= <span class="vhdllogic">32&#39;b0</span>;
<a name="l01885"></a>01885 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_control</span> == <a class="code" href="ao68000_8v.html#a864e0b06304816dec2d4658503d97495">`ADDRESS_INCR_BY_SIZE</a><span class="vhdlchar"></span>) <span class="vhdlchar">address</span> &lt;= ((<span class="vhdlchar">size</span>[<span class="vhdllogic">0</span>]) &amp;&amp; <a class="code" href="classregisters.html#aa1a45d113f21dba8f82a93ddfe1d6409">ea_reg</a> == <span class="vhdllogic">3&#39;b111</span>) ? <span class="vhdlchar">address</span> + <span class="vhdllogic">32&#39;d2</span> : <span class="vhdlchar">address</span> + {<span class="vhdllogic">29&#39;d0</span>,<span class="vhdlchar">size</span>};
<a name="l01886"></a>01886 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_control</span> == <a class="code" href="ao68000_8v.html#aa479827c57933eb9ff03788bbe9d6e3a">`ADDRESS_DECR_BY_SIZE</a><span class="vhdlchar"></span>) <span class="vhdlchar">address</span> &lt;= ((<span class="vhdlchar">size</span>[<span class="vhdllogic">0</span>]) &amp;&amp; <a class="code" href="classregisters.html#aa1a45d113f21dba8f82a93ddfe1d6409">ea_reg</a> == <span class="vhdllogic">3&#39;b111</span>) ? <span class="vhdlchar">address</span> - <span class="vhdllogic">32&#39;d2</span> : <span class="vhdlchar">address</span> - {<span class="vhdllogic">29&#39;d0</span>,<span class="vhdlchar">size</span>};
<a name="l01887"></a>01887 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_control</span> == <a class="code" href="ao68000_8v.html#ac4044068e496c3393c6336b72873a958">`ADDRESS_INCR_BY_2</a><span class="vhdlchar"></span>) <span class="vhdlchar">address</span> &lt;= <span class="vhdlchar">address</span> + <span class="vhdllogic">32&#39;d2</span>;
<a name="l01888"></a>01888 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_control</span> == <a class="code" href="ao68000_8v.html#afc15ad5da6b4afd71eb879476c603fe3">`ADDRESS_FROM_AN_OUTPUT</a><span class="vhdlchar"></span>) <span class="vhdlchar">address</span> &lt;= <a class="code" href="classregisters.html#a7fdc26691a005524667257529b1c1212">An_output</a>;
<a name="l01889"></a>01889 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_control</span> == <a class="code" href="ao68000_8v.html#ac1143ff5a059fc5609c9419fcd402ae1">`ADDRESS_FROM_BASE_INDEX_OFFSET</a><span class="vhdlchar"></span>) <span class="vhdlchar">address</span> &lt;= <span class="vhdlchar">address</span> + <span class="vhdlchar">index</span> + <span class="vhdlchar">offset</span>;
<a name="l01890"></a>01890 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_control</span> == <a class="code" href="ao68000_8v.html#aa6ba908e680fe87e46ac1cf014eed463">`ADDRESS_FROM_IMM_16</a><span class="vhdlchar"></span>) <span class="vhdlchar">address</span> &lt;= { {<span class="vhdllogic">16</span>{<a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">79</span>]}}, <a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">79</span>:<span class="vhdllogic">64</span>] };
<a name="l01891"></a>01891 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_control</span> == <a class="code" href="ao68000_8v.html#aa688332c940cad3a10561a5c9f74698a">`ADDRESS_FROM_IMM_32</a><span class="vhdlchar"></span>) <span class="vhdlchar">address</span> &lt;= <a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">79</span>:<span class="vhdllogic">48</span>];
<a name="l01892"></a>01892 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_control</span> == <a class="code" href="ao68000_8v.html#aa7a6ef5c21bbbf8a3c5a0437bdda3c85">`ADDRESS_FROM_PC_INDEX_OFFSET</a><span class="vhdlchar"></span>) <span class="vhdlchar">address</span> &lt;= <a class="code" href="classregisters.html#af160a45a0b3cd7794efb7fea1ed60526">pc_valid</a> + <span class="vhdlchar">index</span> + <span class="vhdlchar">offset</span>;
<a name="l01893"></a>01893 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_control</span> == <a class="code" href="ao68000_8v.html#a2a30a0ecfa48e96cc5be837e7db71cab">`ADDRESS_FROM_TRAP</a><span class="vhdlchar"></span>) <span class="vhdlchar">address</span> &lt;= {<span class="vhdllogic">22&#39;b0</span>, <span class="vhdlchar">trap</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">2&#39;b0</span>};
<a name="l01894"></a>01894 <span class="vhdlkeyword">end</span>
<a name="l01895"></a>01895
<a name="l01896"></a><a class="code" href="classregisters.html#a7943ebd2393533b177f2cc9471614403">01896</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01897"></a>01897 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">address_type</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01898"></a>01898 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_control</span> == <a class="code" href="ao68000_8v.html#aa7a6ef5c21bbbf8a3c5a0437bdda3c85">`ADDRESS_FROM_PC_INDEX_OFFSET</a><span class="vhdlchar"></span>) <span class="vhdlchar">address_type</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01899"></a>01899 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_control</span> != <a class="code" href="ao68000_8v.html#a3f7506465d358bddd4692916e422237d">`ADDRESS_IDLE</a><span class="vhdlchar"></span>) <span class="vhdlchar">address_type</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01900"></a>01900 <span class="vhdlkeyword">end</span>
<a name="l01901"></a>01901
<a name="l01902"></a><a class="code" href="classregisters.html#a57a4884a23011ba445e6a69044c0b0bc">01902</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01903"></a>01903 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">movem_modreg</span> &lt;= <span class="vhdllogic">6&#39;b0</span>;
<a name="l01904"></a>01904 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">movem_modreg_control</span> == <a class="code" href="ao68000_8v.html#a59e6a074af6fbcf3490ecdb2d277e452">`MOVEM_MODREG_LOAD_0</a><span class="vhdlchar"></span>) <span class="vhdlchar">movem_modreg</span> &lt;= <span class="vhdllogic">6&#39;b0</span>;
<a name="l01905"></a>01905 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">movem_modreg_control</span> == <a class="code" href="ao68000_8v.html#a96857bc6f8514765cf6add0567891646">`MOVEM_MODREG_LOAD_6b001111</a><span class="vhdlchar"></span>)<span class="vhdlchar">movem_modreg</span> &lt;= <span class="vhdllogic">6&#39;b001111</span>;
<a name="l01906"></a>01906 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">movem_modreg_control</span> == <a class="code" href="ao68000_8v.html#ab865a06c214356bb8906149ad6beebf2">`MOVEM_MODREG_INCR_BY_1</a><span class="vhdlchar"></span>) <span class="vhdlchar">movem_modreg</span> &lt;= <span class="vhdlchar">movem_modreg</span> + <span class="vhdllogic">6&#39;d1</span>;
<a name="l01907"></a>01907 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">movem_modreg_control</span> == <a class="code" href="ao68000_8v.html#afc15f893a792d1af5e5c90f8ed788662">`MOVEM_MODREG_DECR_BY_1</a><span class="vhdlchar"></span>) <span class="vhdlchar">movem_modreg</span> &lt;= <span class="vhdlchar">movem_modreg</span> - <span class="vhdllogic">6&#39;d1</span>;
<a name="l01908"></a>01908 <span class="vhdlkeyword">end</span>
<a name="l01909"></a>01909
<a name="l01910"></a><a class="code" href="classregisters.html#a84ce568fcbe169cc02a3dc5c5bdbced2">01910</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01911"></a>01911 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">movem_loop</span> &lt;= <span class="vhdllogic">5&#39;b0</span>;
<a name="l01912"></a>01912 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">movem_loop_control</span> == <a class="code" href="ao68000_8v.html#a8465e4a24e72c1cb6e12015c4ff806c5">`MOVEM_LOOP_LOAD_0</a><span class="vhdlchar"></span>) <span class="vhdlchar">movem_loop</span> &lt;= <span class="vhdllogic">5&#39;b0</span>;
<a name="l01913"></a>01913 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">movem_loop_control</span> == <a class="code" href="ao68000_8v.html#add999e8b65307d6d46547d776999f215">`MOVEM_LOOP_INCR_BY_1</a><span class="vhdlchar"></span>) <span class="vhdlchar">movem_loop</span> &lt;= <span class="vhdlchar">movem_loop</span> + <span class="vhdllogic">5&#39;d1</span>;
<a name="l01914"></a>01914 <span class="vhdlkeyword">end</span>
<a name="l01915"></a>01915
<a name="l01916"></a><a class="code" href="classregisters.html#a5ca9e5ee3853a6c58d80397ee08dcdfb">01916</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01917"></a>01917 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">movem_reg</span> &lt;= <span class="vhdllogic">16&#39;b0</span>;
<a name="l01918"></a>01918 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">movem_reg_control</span> == <a class="code" href="ao68000_8v.html#aa7d78c26e9e37f761c7a0b178fe13cf8">`MOVEM_REG_FROM_OP1</a><span class="vhdlchar"></span>) <span class="vhdlchar">movem_reg</span> &lt;= <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>];
<a name="l01919"></a>01919 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">movem_reg_control</span> == <a class="code" href="ao68000_8v.html#ac34150d75e16d155befcfcb8a95e45a3">`MOVEM_REG_SHIFT_RIGHT</a><span class="vhdlchar"></span>) <span class="vhdlchar">movem_reg</span> &lt;= { <span class="vhdllogic">1&#39;b0</span>, <span class="vhdlchar">movem_reg</span>[<span class="vhdllogic">15</span>:<span class="vhdllogic">1</span>] };
<a name="l01920"></a>01920 <span class="vhdlkeyword">end</span>
<a name="l01921"></a>01921
<a name="l01922"></a><a class="code" href="classregisters.html#a670e4db98926f8ddddaa84356173ff1a">01922</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01923"></a>01923 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">ir</span> &lt;= <span class="vhdllogic">16&#39;b0</span>;
<a name="l01924"></a>01924 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">ir_control</span> == <a class="code" href="ao68000_8v.html#a987216cfc97019736d0251dcd5470e68">`IR_LOAD_WHEN_PREFETCH_VALID</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classregisters.html#a8031b93d1dc568b98697eb0c81b13bfd">prefetch_ir_valid</a> == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <span class="vhdlchar">stop_flag</span> == <span class="vhdllogic">1&#39;b0</span>)
<a name="l01925"></a>01925 <span class="vhdlchar">ir</span> &lt;= <a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">79</span>:<span class="vhdllogic">64</span>];
<a name="l01926"></a>01926 <span class="vhdlkeyword">end</span>
<a name="l01927"></a>01927
<a name="l01928"></a><a class="code" href="classregisters.html#a3a2e5a5ea0bbf7d06bee2afef1124393">01928</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01929"></a>01929 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">decoder_alu_reg</span> &lt;= <span class="vhdllogic">18&#39;b0</span>;
<a name="l01930"></a>01930 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">ir_control</span> == <a class="code" href="ao68000_8v.html#a987216cfc97019736d0251dcd5470e68">`IR_LOAD_WHEN_PREFETCH_VALID</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classregisters.html#a8031b93d1dc568b98697eb0c81b13bfd">prefetch_ir_valid</a> == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <span class="vhdlchar">stop_flag</span> == <span class="vhdllogic">1&#39;b0</span>)
<a name="l01931"></a>01931 <span class="vhdlchar">decoder_alu_reg</span> &lt;= <span class="vhdlchar">decoder_alu</span>;
<a name="l01932"></a>01932 <span class="vhdlkeyword">end</span>
<a name="l01933"></a>01933
<a name="l01934"></a><a class="code" href="classregisters.html#a931eb6b9c3c3c002a0eea00a7f10e10f">01934</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01935"></a>01935 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">trap</span> &lt;= <span class="vhdllogic">8&#39;d0</span>;
<a name="l01936"></a>01936 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">trap_control</span> == <a class="code" href="ao68000_8v.html#a4267c71337dc6963db47aba754396f48">`TRAP_ILLEGAL_INSTR</a><span class="vhdlchar"></span>) <span class="vhdlchar">trap</span> &lt;= <span class="vhdllogic">8&#39;d4</span>;
<a name="l01937"></a>01937 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">trap_control</span> == <a class="code" href="ao68000_8v.html#a111476f2c18a4085c9a5cea3692dc990">`TRAP_DIV_BY_ZERO</a><span class="vhdlchar"></span>) <span class="vhdlchar">trap</span> &lt;= <span class="vhdllogic">8&#39;d5</span>;
<a name="l01938"></a>01938 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">trap_control</span> == <a class="code" href="ao68000_8v.html#a7d97a1e77166d92c1d69452c3e836682">`TRAP_CHK</a><span class="vhdlchar"></span>) <span class="vhdlchar">trap</span> &lt;= <span class="vhdllogic">8&#39;d6</span>;
<a name="l01939"></a>01939 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">trap_control</span> == <a class="code" href="ao68000_8v.html#a66a7d33a63851daa49e101494acd6118">`TRAP_TRAPV</a><span class="vhdlchar"></span>) <span class="vhdlchar">trap</span> &lt;= <span class="vhdllogic">8&#39;d7</span>;
<a name="l01940"></a>01940 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">trap_control</span> == <a class="code" href="ao68000_8v.html#a940b41a2a1e4c585e15f1c2bef5d5c6f">`TRAP_PRIVIL_VIOLAT</a><span class="vhdlchar"></span>) <span class="vhdlchar">trap</span> &lt;= <span class="vhdllogic">8&#39;d8</span>;
<a name="l01941"></a>01941 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">trap_control</span> == <a class="code" href="ao68000_8v.html#a84705ced93a01047ec829b7ea942cee0">`TRAP_TRACE</a><span class="vhdlchar"></span>) <span class="vhdlchar">trap</span> &lt;= <span class="vhdllogic">8&#39;d9</span>;
<a name="l01942"></a>01942 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">trap_control</span> == <a class="code" href="ao68000_8v.html#a4d09227bd9de91efc1a40bf676e10c72">`TRAP_TRAP</a><span class="vhdlchar"></span>) <span class="vhdlchar">trap</span> &lt;= { <span class="vhdllogic">4&#39;b0010</span>, <span class="vhdlchar">ir</span>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] };
<a name="l01943"></a>01943 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">trap_control</span> == <a class="code" href="ao68000_8v.html#a8d6c015903e3a60339a6e8cc196bb440">`TRAP_FROM_DECODER</a><span class="vhdlchar"></span>) <span class="vhdlchar">trap</span> &lt;= <a class="code" href="classregisters.html#a278b33a84015867a530ac4279331d570">decoder_trap</a>;
<a name="l01944"></a>01944 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">trap_control</span> == <a class="code" href="ao68000_8v.html#a57812c3cf3905152a60361ae979a4c2d">`TRAP_FROM_INTERRUPT</a><span class="vhdlchar"></span>) <span class="vhdlchar">trap</span> &lt;= <a class="code" href="classregisters.html#a10ef9845f594ecc956dc1b1c8cdef44e">interrupt_trap</a>;
<a name="l01945"></a>01945 <span class="vhdlkeyword">end</span>
<a name="l01946"></a>01946
<a name="l01947"></a><a class="code" href="classregisters.html#a2a04a4a12e64f1ffb3ec95095716fee7">01947</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01948"></a>01948 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">offset</span> &lt;= <span class="vhdllogic">32&#39;d0</span>;
<a name="l01949"></a>01949 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">offset_control</span> == <a class="code" href="ao68000_8v.html#ad904ffb95a59f475e446877344adb415">`OFFSET_IMM_8</a><span class="vhdlchar"></span>) <span class="vhdlchar">offset</span> &lt;= { {<span class="vhdllogic">24</span>{<a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">71</span>]}}, <a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">71</span>:<span class="vhdllogic">64</span>] };
<a name="l01950"></a>01950 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">offset_control</span> == <a class="code" href="ao68000_8v.html#a87c5da2d7633077683260709d88602e0">`OFFSET_IMM_16</a><span class="vhdlchar"></span>) <span class="vhdlchar">offset</span> &lt;= { {<span class="vhdllogic">16</span>{<a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">79</span>]}}, <a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">79</span>:<span class="vhdllogic">64</span>] };
<a name="l01951"></a>01951 <span class="vhdlkeyword">end</span>
<a name="l01952"></a>01952
<a name="l01953"></a><a class="code" href="classregisters.html#af284685eb0240e8fc444c84618b1af67">01953</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01954"></a>01954 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">index</span> &lt;= <span class="vhdllogic">32&#39;d0</span>;
<a name="l01955"></a>01955 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">index_control</span> == <a class="code" href="ao68000_8v.html#a1db54bd70d82cea2a77c6d5c823f04db">`INDEX_0</a><span class="vhdlchar"></span>) <span class="vhdlchar">index</span> &lt;= <span class="vhdllogic">32&#39;d0</span>;
<a name="l01956"></a>01956 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">index_control</span> == <a class="code" href="ao68000_8v.html#af05405b84ee28262882d3c7ac7a5a80c">`INDEX_LOAD_EXTENDED</a><span class="vhdlchar"></span>) <span class="vhdlchar">index</span> &lt;=
<a name="l01957"></a>01957 (<a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">79</span>] == <span class="vhdllogic">1&#39;b0</span>) ?
<a name="l01958"></a>01958 ( (<a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">75</span>] == <span class="vhdllogic">1&#39;b0</span>) ?
<a name="l01959"></a>01959 { {<span class="vhdllogic">16</span>{<a class="code" href="classregisters.html#a659bea909e94f7512c4311bcff473a5d">Dn_output</a>[<span class="vhdllogic">15</span>]}}, <a class="code" href="classregisters.html#a659bea909e94f7512c4311bcff473a5d">Dn_output</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] } : <a class="code" href="classregisters.html#a659bea909e94f7512c4311bcff473a5d">Dn_output</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>]
<a name="l01960"></a>01960 ) :
<a name="l01961"></a>01961 ( (<a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">75</span>] == <span class="vhdllogic">1&#39;b0</span>) ?
<a name="l01962"></a>01962 { {<span class="vhdllogic">16</span>{<a class="code" href="classregisters.html#a7fdc26691a005524667257529b1c1212">An_output</a>[<span class="vhdllogic">15</span>]}}, <a class="code" href="classregisters.html#a7fdc26691a005524667257529b1c1212">An_output</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] } : <a class="code" href="classregisters.html#a7fdc26691a005524667257529b1c1212">An_output</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>]
<a name="l01963"></a>01963 );
<a name="l01964"></a>01964 <span class="vhdlkeyword">end</span>
<a name="l01965"></a>01965
<a name="l01966"></a><a class="code" href="classregisters.html#a12d4c2e0121456bcb2b23e7444c1da06">01966</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01967"></a>01967 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">stop_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01968"></a>01968 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">stop_flag_control</span> == <a class="code" href="ao68000_8v.html#a5131e7ee341cd6f2ea5350a89b19a488">`STOP_FLAG_SET</a><span class="vhdlchar"></span>) <span class="vhdlchar">stop_flag</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01969"></a>01969 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">stop_flag_control</span> == <a class="code" href="ao68000_8v.html#a0e63684fc863d639423c2d9f0f8e6cd9">`STOP_FLAG_CLEAR</a><span class="vhdlchar"></span>) <span class="vhdlchar">stop_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01970"></a>01970 <span class="vhdlkeyword">end</span>
<a name="l01971"></a>01971
<a name="l01972"></a><a class="code" href="classregisters.html#acf180186b03cdc0ad93be0efb7fa2815">01972</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01973"></a>01973 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">trace_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01974"></a>01974 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">trace_flag_control</span> == <a class="code" href="ao68000_8v.html#a3cb5bcdd68537f527007213efe5c2d4f">`TRACE_FLAG_COPY_WHEN_NO_STOP</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classregisters.html#a8031b93d1dc568b98697eb0c81b13bfd">prefetch_ir_valid</a> == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <a class="code" href="classregisters.html#a278b33a84015867a530ac4279331d570">decoder_trap</a> == <span class="vhdllogic">8&#39;d0</span> &amp;&amp; <span class="vhdlchar">stop_flag</span> == <span class="vhdllogic">1&#39;b0</span>)
<a name="l01975"></a>01975 <span class="vhdlchar">trace_flag</span> &lt;= <a class="code" href="classregisters.html#a116473c99b3cbf75fd0f48a25ea9227e">sr</a>[<span class="vhdllogic">15</span>];
<a name="l01976"></a>01976 <span class="vhdlkeyword">end</span>
<a name="l01977"></a>01977
<a name="l01978"></a><a class="code" href="classregisters.html#a328ee93f9ab0ed3ebab4dc5936a7c5a0">01978</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01979"></a>01979 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">group_0_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01980"></a>01980 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">group_0_flag_control</span> == <a class="code" href="ao68000_8v.html#a5333b31d43f3c7de70d3cad313720ef4">`GROUP_0_FLAG_SET</a><span class="vhdlchar"></span>) <span class="vhdlchar">group_0_flag</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01981"></a>01981 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">group_0_flag_control</span> == <a class="code" href="ao68000_8v.html#a28adb393ace594d548dfe7f070fd837b">`GROUP_0_FLAG_CLEAR_WHEN_VALID_PREFETCH</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classregisters.html#a8031b93d1dc568b98697eb0c81b13bfd">prefetch_ir_valid</a> == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <span class="vhdlchar">stop_flag</span> == <span class="vhdllogic">1&#39;b0</span>)
<a name="l01982"></a>01982 <span class="vhdlchar">group_0_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01983"></a>01983 <span class="vhdlkeyword">end</span>
<a name="l01984"></a>01984
<a name="l01985"></a><a class="code" href="classregisters.html#ad172a9061d9bb3653a3996dc4a74e101">01985</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01986"></a>01986 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">instruction_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01987"></a>01987 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">instruction_flag_control</span> == <a class="code" href="ao68000_8v.html#a6882447365cc7940c16017ee13305875">`INSTRUCTION_FLAG_SET</a><span class="vhdlchar"></span>) <span class="vhdlchar">instruction_flag</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01988"></a>01988 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">instruction_flag_control</span> == <a class="code" href="ao68000_8v.html#adaf70d0e1aaa9fe89fc79971d67bc172">`INSTRUCTION_FLAG_CLEAR_IN_MAIN_LOOP</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classregisters.html#a8031b93d1dc568b98697eb0c81b13bfd">prefetch_ir_valid</a> == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <a class="code" href="classregisters.html#a278b33a84015867a530ac4279331d570">decoder_trap</a> == <span class="vhdllogic">8&#39;d0</span> &amp;&amp; <span class="vhdlchar">stop_flag</span> == <span class="vhdllogic">1&#39;b0</span>)
<a name="l01989"></a>01989 <span class="vhdlchar">instruction_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01990"></a>01990 <span class="vhdlkeyword">end</span>
<a name="l01991"></a>01991
<a name="l01992"></a><a class="code" href="classregisters.html#a34326a20d0a44ce95c7da4da53005097">01992</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01993"></a>01993 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">read_modify_write_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01994"></a>01994 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">read_modify_write_flag_control</span> == <a class="code" href="ao68000_8v.html#a2ba2dbb4697aa9a3559b775da0ade761">`READ_MODIFY_WRITE_FLAG_SET</a><span class="vhdlchar"></span>) <span class="vhdlchar">read_modify_write_flag</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01995"></a>01995 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">read_modify_write_flag_control</span> == <a class="code" href="ao68000_8v.html#ace5de6cd5ad33427e8efd5ec8191c297">`READ_MODIFY_WRITE_FLAG_CLEAR</a><span class="vhdlchar"></span>) <span class="vhdlchar">read_modify_write_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01996"></a>01996 <span class="vhdlkeyword">end</span>
<a name="l01997"></a>01997
<a name="l01998"></a><a class="code" href="classregisters.html#ad881b4aebf8b3df42129f9731b6f6098">01998</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01999"></a>01999 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">do_reset_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02000"></a>02000 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_reset_flag_control</span> == <a class="code" href="ao68000_8v.html#a682472d63f131aa31c38abd6f2d577ab">`DO_RESET_FLAG_SET</a><span class="vhdlchar"></span>) <span class="vhdlchar">do_reset_flag</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l02001"></a>02001 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_reset_flag_control</span> == <a class="code" href="ao68000_8v.html#afd7c962bcd95f3629d247e7790f9cf95">`DO_RESET_FLAG_CLEAR</a><span class="vhdlchar"></span>) <span class="vhdlchar">do_reset_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02002"></a>02002 <span class="vhdlkeyword">end</span>
<a name="l02003"></a>02003
<a name="l02004"></a><a class="code" href="classregisters.html#aa69b93f001339d4b8ae1295a5cb215ec">02004</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l02005"></a>02005 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">do_interrupt_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02006"></a>02006 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_interrupt_flag_control</span> == <a class="code" href="ao68000_8v.html#acc420165ae00aa63b4d40c220dc1ed79">`DO_INTERRUPT_FLAG_SET_IF_ACTIVE</a><span class="vhdlchar"></span>) <span class="vhdlchar">do_interrupt_flag</span> &lt;= (<a class="code" href="classregisters.html#aa92eeffb2c5af01c413399dfb1f58b17">interrupt_mask</a> != <span class="vhdllogic">3&#39;b000</span>) ? <span class="vhdllogic">1&#39;b1</span> : <span class="vhdllogic">1&#39;b0</span>;
<a name="l02007"></a>02007 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_interrupt_flag_control</span> == <a class="code" href="ao68000_8v.html#abe668eeea71491f898b31b9c66a4db96">`DO_INTERRUPT_FLAG_CLEAR</a><span class="vhdlchar"></span>) <span class="vhdlchar">do_interrupt_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02008"></a>02008 <span class="vhdlkeyword">end</span>
<a name="l02009"></a>02009
<a name="l02010"></a><a class="code" href="classregisters.html#a63d22bb9298a179653d09d6b21e6c68b">02010</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l02011"></a>02011 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">do_read_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02012"></a>02012 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_read_flag_control</span> == <a class="code" href="ao68000_8v.html#a210a4746c070617bd4272cf091ce4977">`DO_READ_FLAG_SET</a><span class="vhdlchar"></span>) <span class="vhdlchar">do_read_flag</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l02013"></a>02013 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_read_flag_control</span> == <a class="code" href="ao68000_8v.html#a3186ce27b4c9202d124c4bee6b07e2fd">`DO_READ_FLAG_CLEAR</a><span class="vhdlchar"></span>) <span class="vhdlchar">do_read_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02014"></a>02014 <span class="vhdlkeyword">end</span>
<a name="l02015"></a>02015
<a name="l02016"></a><a class="code" href="classregisters.html#a66ffba6d56dd08fe7b968605c3b68465">02016</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l02017"></a>02017 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">do_write_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02018"></a>02018 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_write_flag_control</span> == <a class="code" href="ao68000_8v.html#a97fc325edc48a555daf24f1757c5e7bf">`DO_WRITE_FLAG_SET</a><span class="vhdlchar"></span>) <span class="vhdlchar">do_write_flag</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l02019"></a>02019 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_write_flag_control</span> == <a class="code" href="ao68000_8v.html#ad6f9aea669c0c0233f4155f29afc4d1d">`DO_WRITE_FLAG_CLEAR</a><span class="vhdlchar"></span>) <span class="vhdlchar">do_write_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02020"></a>02020 <span class="vhdlkeyword">end</span>
<a name="l02021"></a>02021
<a name="l02022"></a><a class="code" href="classregisters.html#ab3c53c1dc1763e2d051eaa736e429d58">02022</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l02023"></a>02023 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">do_blocked_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02024"></a>02024 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_blocked_flag_control</span> == <a class="code" href="ao68000_8v.html#ac69029fe984c3090537ed247a8106344">`DO_BLOCKED_FLAG_SET</a><span class="vhdlchar"></span>) <span class="vhdlchar">do_blocked_flag</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l02025"></a>02025 <span class="vhdlkeyword">end</span>
<a name="l02026"></a>02026
<a name="l02027"></a><a class="code" href="classregisters.html#a09281e3224878c570c81844785844fe0">02027</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l02028"></a>02028 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">data_write</span> &lt;= <span class="vhdllogic">32&#39;d0</span>;
<a name="l02029"></a>02029 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">data_write_control</span> == <a class="code" href="ao68000_8v.html#ab576808298f9e1938241b8843e55c54e">`DATA_WRITE_FROM_RESULT</a><span class="vhdlchar"></span>) <span class="vhdlchar">data_write</span> &lt;= <a class="code" href="classregisters.html#ad27ecd2d9ef571fa88b998f3674fe9a6">result</a>;
<a name="l02030"></a>02030 <span class="vhdlkeyword">end</span>
<a name="l02031"></a>02031
<a name="l02032"></a>02032 <span class="vhdlkeyword">assign</span> <span class="vhdlchar">An_address</span> =
<a name="l02033"></a>02033 (<span class="vhdlchar">An_address_control</span> == <a class="code" href="ao68000_8v.html#a50986c5b3afb053fcb3841dce7a93115">`AN_ADDRESS_FROM_EXTENDED</a><span class="vhdlchar"></span>) ? { <a class="code" href="classregisters.html#a116473c99b3cbf75fd0f48a25ea9227e">sr</a>[<span class="vhdllogic">13</span>], <a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">78</span>:<span class="vhdllogic">76</span>] } :
<a name="l02034"></a>02034 (<span class="vhdlchar">An_address_control</span> == <a class="code" href="ao68000_8v.html#ad5d4b9f48266549b9e8e5ac0c3ad239a">`AN_ADDRESS_USP</a><span class="vhdlchar"></span>) ? <span class="vhdllogic">4&#39;b0111</span> :
<a name="l02035"></a>02035 (<span class="vhdlchar">An_address_control</span> == <a class="code" href="ao68000_8v.html#a0dff5098fabf2afeac419c2e3c69b452">`AN_ADDRESS_SSP</a><span class="vhdlchar"></span>) ? <span class="vhdllogic">4&#39;b1111</span> :
<a name="l02036"></a>02036 { <a class="code" href="classregisters.html#a116473c99b3cbf75fd0f48a25ea9227e">sr</a>[<span class="vhdllogic">13</span>], <a class="code" href="classregisters.html#aa1a45d113f21dba8f82a93ddfe1d6409">ea_reg</a> };
<a name="l02037"></a>02037
<a name="l02038"></a>02038 <span class="vhdlkeyword">assign</span> <span class="vhdlchar">An_input</span> =
<a name="l02039"></a>02039 (<span class="vhdlchar">An_input_control</span> == <a class="code" href="ao68000_8v.html#a67d98f6de465730c1bc9792aab02784c">`AN_INPUT_FROM_ADDRESS</a><span class="vhdlchar"></span>) ? <span class="vhdlchar">address</span> :
<a name="l02040"></a>02040 (<span class="vhdlchar">An_input_control</span> == <a class="code" href="ao68000_8v.html#a90bc8bad52abb88cc05948307f41ffcf">`AN_INPUT_FROM_PREFETCH_IR</a><span class="vhdlchar"></span>) ? <a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">79</span>:<span class="vhdllogic">48</span>] :
<a name="l02041"></a>02041 <a class="code" href="classregisters.html#ad27ecd2d9ef571fa88b998f3674fe9a6">result</a>;
<a name="l02042"></a>02042
<a name="l02043"></a>02043 <span class="vhdlkeyword">assign</span> <span class="vhdlchar">Dn_address</span> = (<span class="vhdlchar">Dn_address_control</span> == <a class="code" href="ao68000_8v.html#aad74420658cfe8412a03c3dd6654ceb1">`DN_ADDRESS_FROM_EXTENDED</a><span class="vhdlchar"></span>) ? <a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">78</span>:<span class="vhdllogic">76</span>] : <a class="code" href="classregisters.html#aa1a45d113f21dba8f82a93ddfe1d6409">ea_reg</a>;
<a name="l02044"></a>02044
<a name="l02045"></a>02045 <span class="vhdlkeyword">endmodule</span>
<a name="l02046"></a>02046
<a name="l02047"></a>02047 <span class="keyword">/***********************************************************************************************************************</span>
<a name="l02048"></a>02048 <span class="keyword"> Memory registers</span>
<a name="l02049"></a>02049 <span class="keyword"> ***********************************************************************************************************************/</span>
<a name="l02050"></a>02050
<a name="l02059"></a><a class="code" href="classmemory__registers.html">02059</a> <span class="vhdlkeyword">module</span> <a class="code" href="classmemory__registers.html">memory_registers</a>(
<a name="l02060"></a><a class="code" href="classmemory__registers.html#a4d664c63ba14fa2b1664eb44203191fa">02060</a> <span class="vhdlkeyword">input</span> <a class="code" href="classmemory__registers.html#a4d664c63ba14fa2b1664eb44203191fa">clock</a>,
<a name="l02061"></a><a class="code" href="classmemory__registers.html#a431adf2f23f5aaf563824a502920385e">02061</a> <span class="vhdlkeyword">input</span> <a class="code" href="classmemory__registers.html#a431adf2f23f5aaf563824a502920385e">reset_n</a>,
<a name="l02062"></a>02062
<a name="l02063"></a>02063 <span class="keyword">// 0000,0001,0010,0011,0100,0101,0110: A0-A6, 0111: USP, 1111: SSP</span>
<a name="l02064"></a><a class="code" href="classmemory__registers.html#a8d14d4f6f8c5706382c7f69b9e372660">02064</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmemory__registers.html#a8d14d4f6f8c5706382c7f69b9e372660">An_address</a>,
<a name="l02065"></a><a class="code" href="classmemory__registers.html#ada61c344785639f1dff0853342ffc0e2">02065</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmemory__registers.html#ada61c344785639f1dff0853342ffc0e2">An_input</a>,
<a name="l02066"></a><a class="code" href="classmemory__registers.html#a388c5aa2ed803d7f8fe0de1afc4ce0b3">02066</a> <span class="vhdlkeyword">input</span> <a class="code" href="classmemory__registers.html#a388c5aa2ed803d7f8fe0de1afc4ce0b3">An_write_enable</a>,
<a name="l02067"></a><a class="code" href="classmemory__registers.html#ad83e80e6d6181078383f523cd155b88d">02067</a> <span class="vhdlkeyword">output</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmemory__registers.html#ad83e80e6d6181078383f523cd155b88d">An_output</a>,
<a name="l02068"></a>02068
<a name="l02069"></a><a class="code" href="classmemory__registers.html#aa2114065af0aee3f968f55ab8d0cdd32">02069</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmemory__registers.html#aa2114065af0aee3f968f55ab8d0cdd32">usp</a>,
<a name="l02070"></a>02070
<a name="l02071"></a><a class="code" href="classmemory__registers.html#a452091de9055b5a8c4b3a24f832bbff4">02071</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmemory__registers.html#a452091de9055b5a8c4b3a24f832bbff4">Dn_address</a>,
<a name="l02072"></a><a class="code" href="classmemory__registers.html#a648512e0b41016edfe8de5136ddd1c06">02072</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmemory__registers.html#a648512e0b41016edfe8de5136ddd1c06">Dn_input</a>,
<a name="l02073"></a><a class="code" href="classmemory__registers.html#afca18b6c4dc049b6c423a8bec09d6d76">02073</a> <span class="vhdlkeyword">input</span> <a class="code" href="classmemory__registers.html#afca18b6c4dc049b6c423a8bec09d6d76">Dn_write_enable</a>,
<a name="l02074"></a>02074 <span class="keyword">// 001: byte, 010: word, 100: long</span>
<a name="l02075"></a><a class="code" href="classmemory__registers.html#a71a1a19e94fca451263e5f59daf32bbc">02075</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmemory__registers.html#a71a1a19e94fca451263e5f59daf32bbc">Dn_size</a>,
<a name="l02076"></a><a class="code" href="classmemory__registers.html#a992b24ce3987b39fc0bd77a602b8501c">02076</a> <span class="vhdlkeyword">output</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmemory__registers.html#a992b24ce3987b39fc0bd77a602b8501c">Dn_output</a>,
<a name="l02077"></a>02077
<a name="l02078"></a><a class="code" href="classmemory__registers.html#a9d473ab60fc9c54280c725306fd4a60e">02078</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">8</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmemory__registers.html#a9d473ab60fc9c54280c725306fd4a60e">micro_pc</a>,
<a name="l02079"></a><a class="code" href="classmemory__registers.html#a6b80d6fab3ba246fa01c780bd1754229">02079</a> <span class="vhdlkeyword">output</span> [<span class="vhdllogic">87</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmemory__registers.html#a6b80d6fab3ba246fa01c780bd1754229">micro_data</a>
<a name="l02080"></a>02080 );
<a name="l02081"></a>02081
<a name="l02082"></a><a class="code" href="classmemory__registers.html#a6b262496d8e72511014d422843dc16cb">02082</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classmemory__registers.html#a6b262496d8e72511014d422843dc16cb">An_ram_write_enable</a> = (<a class="code" href="classmemory__registers.html#a8d14d4f6f8c5706382c7f69b9e372660">An_address</a> == <span class="vhdllogic">4&#39;b0111</span>) ? <span class="vhdllogic">1&#39;b0</span> : <a class="code" href="classmemory__registers.html#a388c5aa2ed803d7f8fe0de1afc4ce0b3">An_write_enable</a>;
<a name="l02083"></a>02083
<a name="l02084"></a><a class="code" href="classmemory__registers.html#a3d04ddf3e78cabbf0585da3688abb8b1">02084</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmemory__registers.html#a3d04ddf3e78cabbf0585da3688abb8b1">An_ram_output</a>;
<a name="l02085"></a>02085 <span class="vhdlkeyword">assign</span> <a class="code" href="classmemory__registers.html#ad83e80e6d6181078383f523cd155b88d">An_output</a> = (<a class="code" href="classmemory__registers.html#a8d14d4f6f8c5706382c7f69b9e372660">An_address</a> == <span class="vhdllogic">4&#39;b0111</span>) ? <a class="code" href="classmemory__registers.html#aa2114065af0aee3f968f55ab8d0cdd32">usp</a> : <a class="code" href="classmemory__registers.html#a3d04ddf3e78cabbf0585da3688abb8b1">An_ram_output</a>;
<a name="l02086"></a>02086
<a name="l02087"></a><a class="code" href="classmemory__registers.html#af880499b12dc0f4afad0fdf7500bc3bf">02087</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmemory__registers.html#af880499b12dc0f4afad0fdf7500bc3bf">dn_byteena</a> = (<a class="code" href="classmemory__registers.html#a71a1a19e94fca451263e5f59daf32bbc">Dn_size</a>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) ? <span class="vhdllogic">4&#39;b0001</span> :
<a name="l02088"></a>02088 (<a class="code" href="classmemory__registers.html#a71a1a19e94fca451263e5f59daf32bbc">Dn_size</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span>) ? <span class="vhdllogic">4&#39;b0011</span> :
<a name="l02089"></a>02089 (<a class="code" href="classmemory__registers.html#a71a1a19e94fca451263e5f59daf32bbc">Dn_size</a>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1&#39;b1</span>) ? <span class="vhdllogic">4&#39;b1111</span> :
<a name="l02090"></a>02090 <span class="vhdllogic">4&#39;b0000</span>;
<a name="l02091"></a>02091
<a name="l02092"></a><a class="code" href="classmemory__registers.html#a833db0d5eda614d712b846b259c0f4d3">02092</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classmemory__registers.html#a4d664c63ba14fa2b1664eb44203191fa">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classmemory__registers.html#a431adf2f23f5aaf563824a502920385e">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l02093"></a>02093 <span class="vhdlkeyword">if</span>(<a class="code" href="classmemory__registers.html#a431adf2f23f5aaf563824a502920385e">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <a class="code" href="classmemory__registers.html#aa2114065af0aee3f968f55ab8d0cdd32">usp</a> &lt;= <span class="vhdllogic">32&#39;d0</span>;
<a name="l02094"></a>02094 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classmemory__registers.html#a8d14d4f6f8c5706382c7f69b9e372660">An_address</a> == <span class="vhdllogic">4&#39;b0111</span> &amp;&amp; <a class="code" href="classmemory__registers.html#a388c5aa2ed803d7f8fe0de1afc4ce0b3">An_write_enable</a>) <a class="code" href="classmemory__registers.html#aa2114065af0aee3f968f55ab8d0cdd32">usp</a> &lt;= <a class="code" href="classmemory__registers.html#ada61c344785639f1dff0853342ffc0e2">An_input</a>;
<a name="l02095"></a>02095 <span class="vhdlkeyword">end</span>
<a name="l02096"></a>02096
<a name="l02097"></a>02097 <span class="keyword">// Register set An implemented as RAM.</span>
<a name="l02098"></a><a class="code" href="classmemory__registers.html#a892186b1bfe856b1ddaf1d8b3a448f50">02098</a> <a class="code" href="classmemory__registers.html#a892186b1bfe856b1ddaf1d8b3a448f50">altsyncram</a> <span class="vhdlchar">an_ram_inst</span>(
<a name="l02099"></a>02099 .<span class="vhdlchar">clock0</span> (<a class="code" href="classmemory__registers.html#a4d664c63ba14fa2b1664eb44203191fa">clock</a>),
<a name="l02100"></a>02100
<a name="l02101"></a>02101 .<span class="vhdlchar">address_a</span> (<a class="code" href="classmemory__registers.html#a8d14d4f6f8c5706382c7f69b9e372660">An_address</a>[<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>]),
<a name="l02102"></a>02102 .<span class="vhdlchar">byteena_a</span> (<span class="vhdllogic">4&#39;b1111</span>),
<a name="l02103"></a>02103 .<span class="vhdlchar">wren_a</span> (<a class="code" href="classmemory__registers.html#a6b262496d8e72511014d422843dc16cb">An_ram_write_enable</a>),
<a name="l02104"></a>02104 .<span class="vhdlchar">data_a</span> (<a class="code" href="classmemory__registers.html#ada61c344785639f1dff0853342ffc0e2">An_input</a>),
<a name="l02105"></a>02105 .<span class="vhdlchar">q_a</span> (<a class="code" href="classmemory__registers.html#a3d04ddf3e78cabbf0585da3688abb8b1">An_ram_output</a>)
<a name="l02106"></a>02106 );
<a name="l02107"></a>02107 <span class="vhdlkeyword">defparam</span>
<a name="l02108"></a>02108 <span class="vhdlchar">an_ram_inst</span>.<span class="vhdlchar">operation_mode</span> = <span class="keyword">&quot;SINGLE_PORT&quot;</span>,
<a name="l02109"></a>02109 <span class="vhdlchar">an_ram_inst</span>.<span class="vhdlchar">width_a</span> = <span class="vhdllogic">32</span>,
<a name="l02110"></a>02110 <span class="vhdlchar">an_ram_inst</span>.<span class="vhdlchar">widthad_a</span> = <span class="vhdllogic">3</span>,
<a name="l02111"></a>02111 <span class="vhdlchar">an_ram_inst</span>.<span class="vhdlchar">width_byteena_a</span> = <span class="vhdllogic">4</span>;
<a name="l02112"></a>02112
<a name="l02113"></a>02113 <span class="keyword">// Register set Dn implemented as RAM.</span>
<a name="l02114"></a><a class="code" href="classmemory__registers.html#a5b0f1fb5a259a06899ac6ac3b52835e0">02114</a> <a class="code" href="classmemory__registers.html#a892186b1bfe856b1ddaf1d8b3a448f50">altsyncram</a> <span class="vhdlchar">dn_ram_inst</span>(
<a name="l02115"></a>02115 .<span class="vhdlchar">clock0</span> (<a class="code" href="classmemory__registers.html#a4d664c63ba14fa2b1664eb44203191fa">clock</a>),
<a name="l02116"></a>02116
<a name="l02117"></a>02117 .<span class="vhdlchar">address_a</span> (<a class="code" href="classmemory__registers.html#a452091de9055b5a8c4b3a24f832bbff4">Dn_address</a>),
<a name="l02118"></a>02118 .<span class="vhdlchar">byteena_a</span> (<a class="code" href="classmemory__registers.html#af880499b12dc0f4afad0fdf7500bc3bf">dn_byteena</a>),
<a name="l02119"></a>02119 .<span class="vhdlchar">wren_a</span> (<a class="code" href="classmemory__registers.html#afca18b6c4dc049b6c423a8bec09d6d76">Dn_write_enable</a>),
<a name="l02120"></a>02120 .<span class="vhdlchar">data_a</span> (<a class="code" href="classmemory__registers.html#a648512e0b41016edfe8de5136ddd1c06">Dn_input</a>),
<a name="l02121"></a>02121 .<span class="vhdlchar">q_a</span> (<a class="code" href="classmemory__registers.html#a992b24ce3987b39fc0bd77a602b8501c">Dn_output</a>)
<a name="l02122"></a>02122 );
<a name="l02123"></a>02123 <span class="vhdlkeyword">defparam</span>
<a name="l02124"></a>02124 <span class="vhdlchar">dn_ram_inst</span>.<span class="vhdlchar">operation_mode</span> = <span class="keyword">&quot;SINGLE_PORT&quot;</span>,
<a name="l02125"></a>02125 <span class="vhdlchar">dn_ram_inst</span>.<span class="vhdlchar">width_a</span> = <span class="vhdllogic">32</span>,
<a name="l02126"></a>02126 <span class="vhdlchar">dn_ram_inst</span>.<span class="vhdlchar">widthad_a</span> = <span class="vhdllogic">3</span>,
<a name="l02127"></a>02127 <span class="vhdlchar">dn_ram_inst</span>.<span class="vhdlchar">width_byteena_a</span> = <span class="vhdllogic">4</span>;
<a name="l02128"></a>02128
<a name="l02129"></a>02129 <span class="keyword">// Microcode ROM</span>
<a name="l02130"></a><a class="code" href="classmemory__registers.html#afc54073a43b749eb1f1376c4b31cd1e3">02130</a> <a class="code" href="classmemory__registers.html#a892186b1bfe856b1ddaf1d8b3a448f50">altsyncram</a> <span class="vhdlchar">micro_rom_inst</span>(
<a name="l02131"></a>02131 .<span class="vhdlchar">clock0</span> (<a class="code" href="classmemory__registers.html#a4d664c63ba14fa2b1664eb44203191fa">clock</a>),
<a name="l02132"></a>02132
<a name="l02133"></a>02133 .<span class="vhdlchar">address_a</span> (<a class="code" href="classmemory__registers.html#a9d473ab60fc9c54280c725306fd4a60e">micro_pc</a>),
<a name="l02134"></a>02134 .<span class="vhdlchar">q_a</span> (<a class="code" href="classmemory__registers.html#a6b80d6fab3ba246fa01c780bd1754229">micro_data</a>)
<a name="l02135"></a>02135 );
<a name="l02136"></a>02136 <span class="vhdlkeyword">defparam</span>
<a name="l02137"></a>02137 <span class="vhdlchar">micro_rom_inst</span>.<span class="vhdlchar">operation_mode</span> = <span class="keyword">&quot;ROM&quot;</span>,
<a name="l02138"></a>02138 <span class="vhdlchar">micro_rom_inst</span>.<span class="vhdlchar">width_a</span> = <span class="vhdllogic">88</span>,
<a name="l02139"></a>02139 <span class="vhdlchar">micro_rom_inst</span>.<span class="vhdlchar">widthad_a</span> = <span class="vhdllogic">9</span>,
<a name="l02140"></a>02140 <span class="vhdlchar">micro_rom_inst</span>.<span class="vhdlchar">init_file</span> = <span class="keyword">&quot;ao68000_microcode.mif&quot;</span>;
<a name="l02141"></a>02141
<a name="l02142"></a>02142 <span class="vhdlkeyword">endmodule</span>
<a name="l02143"></a>02143
<a name="l02144"></a>02144 <span class="keyword">/***********************************************************************************************************************</span>
<a name="l02145"></a>02145 <span class="keyword"> Instruction decoder</span>
<a name="l02146"></a>02146 <span class="keyword"> ***********************************************************************************************************************/</span>
<a name="l02147"></a>02147
<a name="l02051"></a>02051
<a name="l02060"></a><a class="code" href="classmemory__registers.html">02060</a> <span class="vhdlkeyword">module</span> <a class="code" href="classmemory__registers.html">memory_registers</a>(
<a name="l02061"></a><a class="code" href="classmemory__registers.html#a4d664c63ba14fa2b1664eb44203191fa">02061</a> <span class="vhdlkeyword">input</span> <a class="code" href="classmemory__registers.html#a4d664c63ba14fa2b1664eb44203191fa">clock</a>,
<a name="l02062"></a><a class="code" href="classmemory__registers.html#a431adf2f23f5aaf563824a502920385e">02062</a> <span class="vhdlkeyword">input</span> <a class="code" href="classmemory__registers.html#a431adf2f23f5aaf563824a502920385e">reset_n</a>,
<a name="l02063"></a>02063
<a name="l02064"></a>02064 <span class="keyword">// 0000,0001,0010,0011,0100,0101,0110: A0-A6, 0111: USP, 1111: SSP</span>
<a name="l02065"></a><a class="code" href="classmemory__registers.html#a8d14d4f6f8c5706382c7f69b9e372660">02065</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmemory__registers.html#a8d14d4f6f8c5706382c7f69b9e372660">An_address</a>,
<a name="l02066"></a><a class="code" href="classmemory__registers.html#ada61c344785639f1dff0853342ffc0e2">02066</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmemory__registers.html#ada61c344785639f1dff0853342ffc0e2">An_input</a>,
<a name="l02067"></a><a class="code" href="classmemory__registers.html#a388c5aa2ed803d7f8fe0de1afc4ce0b3">02067</a> <span class="vhdlkeyword">input</span> <a class="code" href="classmemory__registers.html#a388c5aa2ed803d7f8fe0de1afc4ce0b3">An_write_enable</a>,
<a name="l02068"></a><a class="code" href="classmemory__registers.html#ad83e80e6d6181078383f523cd155b88d">02068</a> <span class="vhdlkeyword">output</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmemory__registers.html#ad83e80e6d6181078383f523cd155b88d">An_output</a>,
<a name="l02069"></a>02069
<a name="l02070"></a><a class="code" href="classmemory__registers.html#aa2114065af0aee3f968f55ab8d0cdd32">02070</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmemory__registers.html#aa2114065af0aee3f968f55ab8d0cdd32">usp</a>,
<a name="l02071"></a>02071
<a name="l02072"></a><a class="code" href="classmemory__registers.html#a452091de9055b5a8c4b3a24f832bbff4">02072</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmemory__registers.html#a452091de9055b5a8c4b3a24f832bbff4">Dn_address</a>,
<a name="l02073"></a><a class="code" href="classmemory__registers.html#a648512e0b41016edfe8de5136ddd1c06">02073</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmemory__registers.html#a648512e0b41016edfe8de5136ddd1c06">Dn_input</a>,
<a name="l02074"></a><a class="code" href="classmemory__registers.html#afca18b6c4dc049b6c423a8bec09d6d76">02074</a> <span class="vhdlkeyword">input</span> <a class="code" href="classmemory__registers.html#afca18b6c4dc049b6c423a8bec09d6d76">Dn_write_enable</a>,
<a name="l02075"></a>02075 <span class="keyword">// 001: byte, 010: word, 100: long</span>
<a name="l02076"></a><a class="code" href="classmemory__registers.html#a71a1a19e94fca451263e5f59daf32bbc">02076</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmemory__registers.html#a71a1a19e94fca451263e5f59daf32bbc">Dn_size</a>,
<a name="l02077"></a><a class="code" href="classmemory__registers.html#a992b24ce3987b39fc0bd77a602b8501c">02077</a> <span class="vhdlkeyword">output</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmemory__registers.html#a992b24ce3987b39fc0bd77a602b8501c">Dn_output</a>,
<a name="l02078"></a>02078
<a name="l02079"></a><a class="code" href="classmemory__registers.html#a9d473ab60fc9c54280c725306fd4a60e">02079</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">8</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmemory__registers.html#a9d473ab60fc9c54280c725306fd4a60e">micro_pc</a>,
<a name="l02080"></a><a class="code" href="classmemory__registers.html#a6b80d6fab3ba246fa01c780bd1754229">02080</a> <span class="vhdlkeyword">output</span> [<span class="vhdllogic">87</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmemory__registers.html#a6b80d6fab3ba246fa01c780bd1754229">micro_data</a>
<a name="l02081"></a>02081 );
<a name="l02082"></a>02082
<a name="l02083"></a><a class="code" href="classmemory__registers.html#a6b262496d8e72511014d422843dc16cb">02083</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classmemory__registers.html#a6b262496d8e72511014d422843dc16cb">An_ram_write_enable</a> = (<a class="code" href="classmemory__registers.html#a8d14d4f6f8c5706382c7f69b9e372660">An_address</a> == <span class="vhdllogic">4&#39;b0111</span>) ? <span class="vhdllogic">1&#39;b0</span> : <a class="code" href="classmemory__registers.html#a388c5aa2ed803d7f8fe0de1afc4ce0b3">An_write_enable</a>;
<a name="l02084"></a>02084
<a name="l02085"></a><a class="code" href="classmemory__registers.html#a3d04ddf3e78cabbf0585da3688abb8b1">02085</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmemory__registers.html#a3d04ddf3e78cabbf0585da3688abb8b1">An_ram_output</a>;
<a name="l02086"></a>02086 <span class="vhdlkeyword">assign</span> <a class="code" href="classmemory__registers.html#ad83e80e6d6181078383f523cd155b88d">An_output</a> = (<a class="code" href="classmemory__registers.html#a8d14d4f6f8c5706382c7f69b9e372660">An_address</a> == <span class="vhdllogic">4&#39;b0111</span>) ? <a class="code" href="classmemory__registers.html#aa2114065af0aee3f968f55ab8d0cdd32">usp</a> : <a class="code" href="classmemory__registers.html#a3d04ddf3e78cabbf0585da3688abb8b1">An_ram_output</a>;
<a name="l02087"></a>02087
<a name="l02088"></a><a class="code" href="classmemory__registers.html#af880499b12dc0f4afad0fdf7500bc3bf">02088</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmemory__registers.html#af880499b12dc0f4afad0fdf7500bc3bf">dn_byteena</a> = (<a class="code" href="classmemory__registers.html#a71a1a19e94fca451263e5f59daf32bbc">Dn_size</a>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) ? <span class="vhdllogic">4&#39;b0001</span> :
<a name="l02089"></a>02089 (<a class="code" href="classmemory__registers.html#a71a1a19e94fca451263e5f59daf32bbc">Dn_size</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span>) ? <span class="vhdllogic">4&#39;b0011</span> :
<a name="l02090"></a>02090 (<a class="code" href="classmemory__registers.html#a71a1a19e94fca451263e5f59daf32bbc">Dn_size</a>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1&#39;b1</span>) ? <span class="vhdllogic">4&#39;b1111</span> :
<a name="l02091"></a>02091 <span class="vhdllogic">4&#39;b0000</span>;
<a name="l02092"></a>02092
<a name="l02093"></a><a class="code" href="classmemory__registers.html#a833db0d5eda614d712b846b259c0f4d3">02093</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classmemory__registers.html#a4d664c63ba14fa2b1664eb44203191fa">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classmemory__registers.html#a431adf2f23f5aaf563824a502920385e">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l02094"></a>02094 <span class="vhdlkeyword">if</span>(<a class="code" href="classmemory__registers.html#a431adf2f23f5aaf563824a502920385e">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <a class="code" href="classmemory__registers.html#aa2114065af0aee3f968f55ab8d0cdd32">usp</a> &lt;= <span class="vhdllogic">32&#39;d0</span>;
<a name="l02095"></a>02095 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classmemory__registers.html#a8d14d4f6f8c5706382c7f69b9e372660">An_address</a> == <span class="vhdllogic">4&#39;b0111</span> &amp;&amp; <a class="code" href="classmemory__registers.html#a388c5aa2ed803d7f8fe0de1afc4ce0b3">An_write_enable</a>) <a class="code" href="classmemory__registers.html#aa2114065af0aee3f968f55ab8d0cdd32">usp</a> &lt;= <a class="code" href="classmemory__registers.html#ada61c344785639f1dff0853342ffc0e2">An_input</a>;
<a name="l02096"></a>02096 <span class="vhdlkeyword">end</span>
<a name="l02097"></a>02097
<a name="l02098"></a>02098 <span class="keyword">// Register set An implemented as RAM.</span>
<a name="l02099"></a><a class="code" href="classmemory__registers.html#a892186b1bfe856b1ddaf1d8b3a448f50">02099</a> <a class="code" href="classmemory__registers.html#a892186b1bfe856b1ddaf1d8b3a448f50">altsyncram</a> <span class="vhdlchar">an_ram_inst</span>(
<a name="l02100"></a>02100 .<span class="vhdlchar">clock0</span> (<a class="code" href="classmemory__registers.html#a4d664c63ba14fa2b1664eb44203191fa">clock</a>),
<a name="l02101"></a>02101
<a name="l02102"></a>02102 .<span class="vhdlchar">address_a</span> (<a class="code" href="classmemory__registers.html#a8d14d4f6f8c5706382c7f69b9e372660">An_address</a>[<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>]),
<a name="l02103"></a>02103 .<span class="vhdlchar">byteena_a</span> (<span class="vhdllogic">4&#39;b1111</span>),
<a name="l02104"></a>02104 .<span class="vhdlchar">wren_a</span> (<a class="code" href="classmemory__registers.html#a6b262496d8e72511014d422843dc16cb">An_ram_write_enable</a>),
<a name="l02105"></a>02105 .<span class="vhdlchar">data_a</span> (<a class="code" href="classmemory__registers.html#ada61c344785639f1dff0853342ffc0e2">An_input</a>),
<a name="l02106"></a>02106 .<span class="vhdlchar">q_a</span> (<a class="code" href="classmemory__registers.html#a3d04ddf3e78cabbf0585da3688abb8b1">An_ram_output</a>)
<a name="l02107"></a>02107 );
<a name="l02108"></a>02108 <span class="vhdlkeyword">defparam</span>
<a name="l02109"></a>02109 <span class="vhdlchar">an_ram_inst</span>.<span class="vhdlchar">operation_mode</span> = <span class="keyword">&quot;SINGLE_PORT&quot;</span>,
<a name="l02110"></a>02110 <span class="vhdlchar">an_ram_inst</span>.<span class="vhdlchar">width_a</span> = <span class="vhdllogic">32</span>,
<a name="l02111"></a>02111 <span class="vhdlchar">an_ram_inst</span>.<span class="vhdlchar">widthad_a</span> = <span class="vhdllogic">3</span>,
<a name="l02112"></a>02112 <span class="vhdlchar">an_ram_inst</span>.<span class="vhdlchar">width_byteena_a</span> = <span class="vhdllogic">4</span>;
<a name="l02113"></a>02113
<a name="l02114"></a>02114 <span class="keyword">// Register set Dn implemented as RAM.</span>
<a name="l02115"></a><a class="code" href="classmemory__registers.html#a5b0f1fb5a259a06899ac6ac3b52835e0">02115</a> <a class="code" href="classmemory__registers.html#a892186b1bfe856b1ddaf1d8b3a448f50">altsyncram</a> <span class="vhdlchar">dn_ram_inst</span>(
<a name="l02116"></a>02116 .<span class="vhdlchar">clock0</span> (<a class="code" href="classmemory__registers.html#a4d664c63ba14fa2b1664eb44203191fa">clock</a>),
<a name="l02117"></a>02117
<a name="l02118"></a>02118 .<span class="vhdlchar">address_a</span> (<a class="code" href="classmemory__registers.html#a452091de9055b5a8c4b3a24f832bbff4">Dn_address</a>),
<a name="l02119"></a>02119 .<span class="vhdlchar">byteena_a</span> (<a class="code" href="classmemory__registers.html#af880499b12dc0f4afad0fdf7500bc3bf">dn_byteena</a>),
<a name="l02120"></a>02120 .<span class="vhdlchar">wren_a</span> (<a class="code" href="classmemory__registers.html#afca18b6c4dc049b6c423a8bec09d6d76">Dn_write_enable</a>),
<a name="l02121"></a>02121 .<span class="vhdlchar">data_a</span> (<a class="code" href="classmemory__registers.html#a648512e0b41016edfe8de5136ddd1c06">Dn_input</a>),
<a name="l02122"></a>02122 .<span class="vhdlchar">q_a</span> (<a class="code" href="classmemory__registers.html#a992b24ce3987b39fc0bd77a602b8501c">Dn_output</a>)
<a name="l02123"></a>02123 );
<a name="l02124"></a>02124 <span class="vhdlkeyword">defparam</span>
<a name="l02125"></a>02125 <span class="vhdlchar">dn_ram_inst</span>.<span class="vhdlchar">operation_mode</span> = <span class="keyword">&quot;SINGLE_PORT&quot;</span>,
<a name="l02126"></a>02126 <span class="vhdlchar">dn_ram_inst</span>.<span class="vhdlchar">width_a</span> = <span class="vhdllogic">32</span>,
<a name="l02127"></a>02127 <span class="vhdlchar">dn_ram_inst</span>.<span class="vhdlchar">widthad_a</span> = <span class="vhdllogic">3</span>,
<a name="l02128"></a>02128 <span class="vhdlchar">dn_ram_inst</span>.<span class="vhdlchar">width_byteena_a</span> = <span class="vhdllogic">4</span>;
<a name="l02129"></a>02129
<a name="l02130"></a>02130 <span class="keyword">// Microcode ROM</span>
<a name="l02131"></a><a class="code" href="classmemory__registers.html#afc54073a43b749eb1f1376c4b31cd1e3">02131</a> <a class="code" href="classmemory__registers.html#a892186b1bfe856b1ddaf1d8b3a448f50">altsyncram</a> <span class="vhdlchar">micro_rom_inst</span>(
<a name="l02132"></a>02132 .<span class="vhdlchar">clock0</span> (<a class="code" href="classmemory__registers.html#a4d664c63ba14fa2b1664eb44203191fa">clock</a>),
<a name="l02133"></a>02133
<a name="l02134"></a>02134 .<span class="vhdlchar">address_a</span> (<a class="code" href="classmemory__registers.html#a9d473ab60fc9c54280c725306fd4a60e">micro_pc</a>),
<a name="l02135"></a>02135 .<span class="vhdlchar">q_a</span> (<a class="code" href="classmemory__registers.html#a6b80d6fab3ba246fa01c780bd1754229">micro_data</a>)
<a name="l02136"></a>02136 );
<a name="l02137"></a>02137 <span class="vhdlkeyword">defparam</span>
<a name="l02138"></a>02138 <span class="vhdlchar">micro_rom_inst</span>.<span class="vhdlchar">operation_mode</span> = <span class="keyword">&quot;ROM&quot;</span>,
<a name="l02139"></a>02139 <span class="vhdlchar">micro_rom_inst</span>.<span class="vhdlchar">width_a</span> = <span class="vhdllogic">88</span>,
<a name="l02140"></a>02140 <span class="vhdlchar">micro_rom_inst</span>.<span class="vhdlchar">widthad_a</span> = <span class="vhdllogic">9</span>,
<a name="l02141"></a>02141 <span class="vhdlchar">micro_rom_inst</span>.<span class="vhdlchar">init_file</span> = <span class="keyword">&quot;ao68000_microcode.mif&quot;</span>;
<a name="l02142"></a>02142
<a name="l02143"></a>02143 <span class="vhdlkeyword">endmodule</span>
<a name="l02144"></a>02144
<a name="l02145"></a>02145 <span class="keyword">/***********************************************************************************************************************</span>
<a name="l02146"></a>02146 <span class="keyword"> Instruction decoder</span>
<a name="l02147"></a>02147 <span class="keyword"> ***********************************************************************************************************************/</span>
<a name="l02148"></a>02148
<a name="l02158"></a><a class="code" href="classdecoder.html">02158</a> <span class="vhdlkeyword">module</span> <a class="code" href="classdecoder.html">decoder</a>(
<a name="l02159"></a><a class="code" href="classdecoder.html#a6d5317405a2a0f3d87baeb7150ce7a82">02159</a> <span class="vhdlkeyword">input</span> <a class="code" href="classdecoder.html#a6d5317405a2a0f3d87baeb7150ce7a82">clock</a>,
<a name="l02160"></a><a class="code" href="classdecoder.html#abb84ff97c6b5274c476817bf0c89eae5">02160</a> <span class="vhdlkeyword">input</span> <a class="code" href="classdecoder.html#abb84ff97c6b5274c476817bf0c89eae5">reset_n</a>,
<a name="l02161"></a>02161
<a name="l02162"></a><a class="code" href="classdecoder.html#a4f8f30358d78d6b6509ecb0a75c8e2e9">02162</a> <span class="vhdlkeyword">input</span> <a class="code" href="classdecoder.html#a4f8f30358d78d6b6509ecb0a75c8e2e9">supervisor</a>,
<a name="l02163"></a><a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">02163</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>,
<a name="l02164"></a>02164
<a name="l02165"></a>02165 <span class="keyword">// zero: no trap</span>
<a name="l02166"></a><a class="code" href="classdecoder.html#a67eb094220c399c1c40c878b5845e34e">02166</a> <span class="vhdlkeyword">output</span> [<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] <a class="code" href="classdecoder.html#a67eb094220c399c1c40c878b5845e34e">decoder_trap</a>,
<a name="l02167"></a><a class="code" href="classdecoder.html#af02fcbe55a29581530a9fa1b01348d50">02167</a> <span class="vhdlkeyword">output</span> [<span class="vhdllogic">8</span>:<span class="vhdllogic">0</span>] <a class="code" href="classdecoder.html#af02fcbe55a29581530a9fa1b01348d50">decoder_micropc</a>,
<a name="l02168"></a><a class="code" href="classdecoder.html#a4a908459c4181bada964b9269629cfaf">02168</a> <span class="vhdlkeyword">output</span> [<span class="vhdllogic">17</span>:<span class="vhdllogic">0</span>] <a class="code" href="classdecoder.html#a4a908459c4181bada964b9269629cfaf">decoder_alu</a>,
<a name="l02169"></a>02169
<a name="l02170"></a><a class="code" href="classdecoder.html#a28b05d6e340a4705765b60dea6a7582e">02170</a> <span class="vhdlkeyword">output</span> [<span class="vhdllogic">8</span>:<span class="vhdllogic">0</span>] <a class="code" href="classdecoder.html#a28b05d6e340a4705765b60dea6a7582e">save_ea</a>,
<a name="l02171"></a><a class="code" href="classdecoder.html#a01b7528cc9ef96a11a65bc617e3ce8e8">02171</a> <span class="vhdlkeyword">output</span> [<span class="vhdllogic">8</span>:<span class="vhdllogic">0</span>] <a class="code" href="classdecoder.html#a01b7528cc9ef96a11a65bc617e3ce8e8">perform_ea_write</a>,
<a name="l02172"></a><a class="code" href="classdecoder.html#a6c8f1852c27f24f3c5b376224beb327e">02172</a> <span class="vhdlkeyword">output</span> [<span class="vhdllogic">8</span>:<span class="vhdllogic">0</span>] <a class="code" href="classdecoder.html#a6c8f1852c27f24f3c5b376224beb327e">perform_ea_read</a>,
<a name="l02173"></a><a class="code" href="classdecoder.html#a10aa58a48c1be7f355587ca0662adb6f">02173</a> <span class="vhdlkeyword">output</span> [<span class="vhdllogic">8</span>:<span class="vhdllogic">0</span>] <a class="code" href="classdecoder.html#a10aa58a48c1be7f355587ca0662adb6f">load_ea</a>,
<a name="l02174"></a>02174
<a name="l02175"></a><a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">02175</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a>,
<a name="l02176"></a><a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">02176</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">ea_mod</a>,
<a name="l02177"></a><a class="code" href="classdecoder.html#a8658dbe33b5c93ec447d2c4915bf46bb">02177</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classdecoder.html#a8658dbe33b5c93ec447d2c4915bf46bb">ea_reg</a>
<a name="l02178"></a>02178 );
<a name="l02179"></a>02179
<a name="l02180"></a><a class="code" href="classdecoder.html#ab1fdf78d41476f922a501b7e4e0fe24a">02180</a> <span class="vhdlkeyword">parameter</span> [<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>]
<a name="l02181"></a>02181 <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a> = <span class="vhdllogic">8&#39;d0</span>,
<a name="l02182"></a>02182 <a class="code" href="classdecoder.html#af430142beb92570232fc803624ce1b38">ILLEGAL_INSTRUCTION_TRAP</a> = <span class="vhdllogic">8&#39;d4</span>,
<a name="l02183"></a>02183 <a class="code" href="classdecoder.html#a571fc80e2c734a46eadc31db53af37ff">PRIVILEGE_VIOLATION_TRAP</a> = <span class="vhdllogic">8&#39;d8</span>,
<a name="l02184"></a>02184 <a class="code" href="classdecoder.html#a6660b38ffc86f8e9739d5eca392f3e69">ILLEGAL_1010_INSTRUCTION_TRAP</a> = <span class="vhdllogic">8&#39;d10</span>,
<a name="l02185"></a>02185 <a class="code" href="classdecoder.html#ab1fdf78d41476f922a501b7e4e0fe24a">ILLEGAL_1111_INSTRUCTION_TRAP</a> = <span class="vhdllogic">8&#39;d11</span>;
<a name="l02186"></a>02186
<a name="l02187"></a><a class="code" href="classdecoder.html#adfdf73062e947946cd9fa70a18e956c8">02187</a> <span class="vhdlkeyword">parameter</span> [<span class="vhdllogic">8</span>:<span class="vhdllogic">0</span>]
<a name="l02188"></a>02188 <a class="code" href="classdecoder.html#adfdf73062e947946cd9fa70a18e956c8">UNUSED_MICROPC</a> = <span class="vhdllogic">9&#39;d0</span>;
<a name="l02189"></a>02189
<a name="l02190"></a>02190 <span class="vhdlkeyword">assign</span> { <a class="code" href="classdecoder.html#a67eb094220c399c1c40c878b5845e34e">decoder_trap</a>, <a class="code" href="classdecoder.html#af02fcbe55a29581530a9fa1b01348d50">decoder_micropc</a> } =
<a name="l02191"></a>02191 (<a class="code" href="classdecoder.html#abb84ff97c6b5274c476817bf0c89eae5">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="classdecoder.html#adfdf73062e947946cd9fa70a18e956c8">UNUSED_MICROPC</a> } :
<a name="l02192"></a>02192
<a name="l02193"></a>02193 <span class="keyword">// Privilege violation and illegal instruction</span>
<a name="l02194"></a>02194
<a name="l02195"></a>02195 <span class="keyword">// ANDI to SR,EORI to SR,ORI to SR,RESET,STOP,RTE,MOVE TO SR,MOVE USP TO USP,MOVE USP TO An privileged instructions</span>
<a name="l02196"></a>02196 ( ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0000_0010_01_111_100</span> ||
<a name="l02197"></a>02197 <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0000_1010_01_111_100</span> ||
<a name="l02198"></a>02198 <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0000_0000_01_111_100</span> ||
<a name="l02199"></a>02199 <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0100_1110_0111_0000</span> ||
<a name="l02200"></a>02200 <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0100_1110_0111_0010</span> ||
<a name="l02201"></a>02201 <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0100_1110_0111_0011</span> ||
<a name="l02202"></a>02202 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">10&#39;b0100_0110_11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b001</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] != <span class="vhdllogic">6&#39;b111_101</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] != <span class="vhdllogic">6&#39;b111_110</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] != <span class="vhdllogic">6&#39;b111_111</span>) ||
<a name="l02203"></a>02203 <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">13&#39;b0100_1110_0110_0</span> ||
<a name="l02204"></a>02204 <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">13&#39;b0100_1110_0110_1</span> ) &amp;&amp; <a class="code" href="classdecoder.html#a4f8f30358d78d6b6509ecb0a75c8e2e9">supervisor</a> == <span class="vhdllogic">1&#39;b0</span> ) ? { <a class="code" href="classdecoder.html#a571fc80e2c734a46eadc31db53af37ff">PRIVILEGE_VIOLATION_TRAP</a>, <a class="code" href="classdecoder.html#adfdf73062e947946cd9fa70a18e956c8">UNUSED_MICROPC</a> } :
<a name="l02205"></a>02205 <span class="keyword">// ILLEGAL, illegal instruction</span>
<a name="l02206"></a>02206 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0100_1010_11_111100</span> ) ? { <a class="code" href="classdecoder.html#af430142beb92570232fc803624ce1b38">ILLEGAL_INSTRUCTION_TRAP</a>, <a class="code" href="classdecoder.html#adfdf73062e947946cd9fa70a18e956c8">UNUSED_MICROPC</a> } :
<a name="l02207"></a>02207 <span class="keyword">// 1010 illegal instruction</span>
<a name="l02208"></a>02208 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1010</span> ) ? { <a class="code" href="classdecoder.html#a6660b38ffc86f8e9739d5eca392f3e69">ILLEGAL_1010_INSTRUCTION_TRAP</a>, <a class="code" href="classdecoder.html#adfdf73062e947946cd9fa70a18e956c8">UNUSED_MICROPC</a> } :
<a name="l02209"></a>02209 <span class="keyword">// 1111 illegal instruction</span>
<a name="l02210"></a>02210 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1111</span> ) ? { <a class="code" href="classdecoder.html#ab1fdf78d41476f922a501b7e4e0fe24a">ILLEGAL_1111_INSTRUCTION_TRAP</a>, <a class="code" href="classdecoder.html#adfdf73062e947946cd9fa70a18e956c8">UNUSED_MICROPC</a> } :
<a name="l02211"></a>02211
<a name="l02212"></a>02212 <span class="keyword">// instruction decoding</span>
<a name="l02213"></a>02213
<a name="l02214"></a>02214 <span class="keyword">// ANDI,EORI,ORI,ADDI,SUBI</span>
<a name="l02215"></a>02215 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0000</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] != <span class="vhdllogic">3&#39;b100</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] != <span class="vhdllogic">3&#39;b110</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] != <span class="vhdllogic">3&#39;b111</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b0</span> &amp;&amp;
<a name="l02216"></a>02216 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b00</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b01</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b10</span>) &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b001</span> &amp;&amp;
<a name="l02217"></a>02217 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span>)) &amp;&amp;
<a name="l02218"></a>02218 <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] != <span class="vhdllogic">16&#39;b0000_000_0_00_111100</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] != <span class="vhdllogic">16&#39;b0000_000_0_01_111100</span> &amp;&amp;
<a name="l02219"></a>02219 <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] != <span class="vhdllogic">16&#39;b0000_001_0_00_111100</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] != <span class="vhdllogic">16&#39;b0000_001_0_01_111100</span> &amp;&amp;
<a name="l02220"></a>02220 <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] != <span class="vhdllogic">16&#39;b0000_101_0_00_111100</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] != <span class="vhdllogic">16&#39;b0000_101_0_01_111100</span> ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a1508cd79053f2766a7bd8b7932ffdf0c">`MICROPC_ANDI_EORI_ORI_ADDI_SUBI</a><span class="vhdlchar"></span> } :
<a name="l02221"></a>02221 <span class="keyword">// ORI to CCR,ORI to SR,ANDI to CCR,ANDI to SR,EORI to CCR,EORI to SR</span>
<a name="l02222"></a>02222 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0000_000_0_00_111100</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0000_000_0_01_111100</span> ||
<a name="l02223"></a>02223 <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0000_001_0_00_111100</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0000_001_0_01_111100</span> ||
<a name="l02224"></a>02224 <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0000_101_0_00_111100</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0000_101_0_01_111100</span> ) ?
<a name="l02225"></a>02225 { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#af7581a9c9f99af85388e542ad881d71f">`MICROPC_ORI_to_CCR_ORI_to_SR_ANDI_to_CCR_ANDI_to_SR_EORI_to_CCR_EORI_to_SR</a><span class="vhdlchar"></span> } :
<a name="l02226"></a>02226 <span class="keyword">// BTST register</span>
<a name="l02227"></a>02227 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0000</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b100</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b001</span> &amp;&amp;
<a name="l02228"></a>02228 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> ||
<a name="l02229"></a>02229 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_010</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_011</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_100</span>))
<a name="l02230"></a>02230 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#aa2684e7883f516fe90229d1a02585c7c">`MICROPC_BTST_register</a><span class="vhdlchar"></span> } :
<a name="l02231"></a>02231 <span class="keyword">// MOVEP memory to register</span>
<a name="l02232"></a>02232 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0000</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b001</span> &amp;&amp; ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b00</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b01</span> ) ) ?
<a name="l02233"></a>02233 { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a6827fab6e4b333e82a1de52cf6020b7a">`MICROPC_MOVEP_memory_to_register</a><span class="vhdlchar"></span> } :
<a name="l02234"></a>02234 <span class="keyword">// MOVEP register to memory</span>
<a name="l02235"></a>02235 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0000</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b001</span> &amp;&amp; ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b10</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b11</span> ) ) ?
<a name="l02236"></a>02236 { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a2516dd6bb3a4f804a752557b483e077b">`MICROPC_MOVEP_register_to_memory</a><span class="vhdlchar"></span> } :
<a name="l02237"></a>02237 <span class="keyword">// BCHG,BCLR,BSET register</span>
<a name="l02238"></a>02238 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0000</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b001</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">3&#39;b100</span> &amp;&amp;
<a name="l02239"></a>02239 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span>))
<a name="l02240"></a>02240 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a5aff7e16fcd8e2f83c6a684fb62506b3">`MICROPC_BCHG_BCLR_BSET_register</a><span class="vhdlchar"></span> } :
<a name="l02241"></a>02241 <span class="keyword">// BTST immediate</span>
<a name="l02242"></a>02242 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0000</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b1000</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b00</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b001</span> &amp;&amp;
<a name="l02243"></a>02243 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> ||
<a name="l02244"></a>02244 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_010</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_011</span>))
<a name="l02245"></a>02245 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a5ec24a82d3f383ac90da0ad8cc7bb0e3">`MICROPC_BTST_immediate</a><span class="vhdlchar"></span> } :
<a name="l02246"></a>02246 <span class="keyword">// BCHG,BCLR,BSET immediate</span>
<a name="l02247"></a>02247 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0000</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b1000</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b00</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b001</span> &amp;&amp;
<a name="l02248"></a>02248 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span>))
<a name="l02249"></a>02249 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a89a5e8fafa2da702e7c00cb6fe7c2066">`MICROPC_BCHG_BCLR_BSET_immediate</a><span class="vhdlchar"></span> } :
<a name="l02250"></a>02250 <span class="keyword">// CMPI</span>
<a name="l02251"></a>02251 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0000</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b0</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3&#39;b110</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b001</span> &amp;&amp;
<a name="l02252"></a>02252 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span>))
<a name="l02253"></a>02253 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a5027ce5e621b327a8116e4ca0af34e90">`MICROPC_CMPI</a><span class="vhdlchar"></span> } :
<a name="l02254"></a>02254 <span class="keyword">// MOVE</span>
<a name="l02255"></a>02255 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">14</span>] == <span class="vhdllogic">2&#39;b00</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">12</span>] != <span class="vhdllogic">2&#39;b00</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">3&#39;b001</span> &amp;&amp;
<a name="l02256"></a>02256 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">3&#39;b111</span> || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">6&#39;b000_111</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">6&#39;b001_111</span>)) &amp;&amp;
<a name="l02257"></a>02257 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">12</span>] != <span class="vhdllogic">2&#39;b01</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b001</span>) &amp;&amp;
<a name="l02258"></a>02258 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> ||
<a name="l02259"></a>02259 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_010</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_011</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_100</span>))
<a name="l02260"></a>02260 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#afadd69027964ef6d7c9f923ed2714bbe">`MICROPC_MOVE</a><span class="vhdlchar"></span> } :
<a name="l02261"></a>02261 <span class="keyword">// MOVEA</span>
<a name="l02262"></a>02262 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">14</span>] == <span class="vhdllogic">2&#39;b00</span> &amp;&amp; (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">2&#39;b11</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">2&#39;b10</span>) &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b001</span> &amp;&amp;
<a name="l02263"></a>02263 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> ||
<a name="l02264"></a>02264 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_010</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_011</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_100</span>))
<a name="l02265"></a>02265 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a38b3d0769f31c2931ccc92e00af94884">`MICROPC_MOVEA</a><span class="vhdlchar"></span> } :
<a name="l02266"></a>02266 <span class="keyword">// NEGX,CLR,NEG,NOT,NBCD</span>
<a name="l02267"></a>02267 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0100</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b001</span> &amp;&amp; (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span>) &amp;&amp;
<a name="l02268"></a>02268 ( (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0000</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b11</span>) || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0010</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b11</span>) ||
<a name="l02269"></a>02269 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0100</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b11</span>) || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0110</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b11</span>) ||
<a name="l02270"></a>02270 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">6&#39;b1000_00</span>)
<a name="l02271"></a>02271 )
<a name="l02272"></a>02272 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a6f040be4f69b57ba9603d5eae6085425">`MICROPC_NEGX_CLR_NEG_NOT_NBCD</a><span class="vhdlchar"></span> } :
<a name="l02273"></a>02273 <span class="keyword">// MOVE FROM SR</span>
<a name="l02274"></a>02274 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">10&#39;b0100_0000_11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b001</span> &amp;&amp; (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span>)
<a name="l02275"></a>02275 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a9527c313aa58c219b35f23dcfcd52a3a">`MICROPC_MOVE_FROM_SR</a><span class="vhdlchar"></span> } :
<a name="l02276"></a>02276 <span class="keyword">// CHK</span>
<a name="l02277"></a>02277 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0100</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b110</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b001</span> &amp;&amp;
<a name="l02278"></a>02278 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> ||
<a name="l02279"></a>02279 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_010</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_011</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_100</span>))
<a name="l02280"></a>02280 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a09d3064b3da754163f244a861ce4c758">`MICROPC_CHK</a><span class="vhdlchar"></span> } :
<a name="l02281"></a>02281 <span class="keyword">// LEA</span>
<a name="l02282"></a>02282 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0100</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b111</span> &amp;&amp; (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b010</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b101</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b110</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b111</span>) &amp;&amp;
<a name="l02283"></a>02283 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> ||
<a name="l02284"></a>02284 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_010</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_011</span>))
<a name="l02285"></a>02285 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#aced982dae609932df5af323a07349a2b">`MICROPC_LEA</a><span class="vhdlchar"></span> } :
<a name="l02286"></a>02286 <span class="keyword">// MOVE TO CCR, MOVE TO SR</span>
<a name="l02287"></a>02287 ( (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">10&#39;b0100_0100_11</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">10&#39;b0100_0110_11</span>) &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b001</span> &amp;&amp;
<a name="l02288"></a>02288 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> ||
<a name="l02289"></a>02289 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_010</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_011</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_100</span>))
<a name="l02290"></a>02290 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a258ae200cc2cbeccddff03ba18b66a27">`MICROPC_MOVE_TO_CCR_MOVE_TO_SR</a><span class="vhdlchar"></span> } :
<a name="l02291"></a>02291 <span class="keyword">// SWAP,EXT</span>
<a name="l02292"></a>02292 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0100</span> &amp;&amp; (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">9&#39;b1000_01_000</span> || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">7</span>] == <span class="vhdllogic">5&#39;b1000_1</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b000</span>) ) ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a65ca31e571d56e8b7e92ecadd58c94e1">`MICROPC_SWAP_EXT</a><span class="vhdlchar"></span> } :
<a name="l02293"></a>02293 <span class="keyword">// PEA</span>
<a name="l02294"></a>02294 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">10&#39;b0100_1000_01</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b000</span> &amp;&amp; (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b010</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b101</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b110</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b111</span>) &amp;&amp;
<a name="l02295"></a>02295 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> ||
<a name="l02296"></a>02296 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_010</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_011</span>))
<a name="l02297"></a>02297 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a2ce22f23bd95ba0ee7690a059448a357">`MICROPC_PEA</a><span class="vhdlchar"></span> } :
<a name="l02298"></a>02298 <span class="keyword">// MOVEM register to memory, predecrement</span>
<a name="l02299"></a>02299 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">7</span>] == <span class="vhdllogic">9&#39;b0100_1000_1</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b100</span> ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#affd3d4c8fd7cf2cbd78ecd99397f768b">`MICROPC_MOVEM_register_to_memory_predecrement</a><span class="vhdlchar"></span> } :
<a name="l02300"></a>02300 <span class="keyword">// MOVEM register to memory, control</span>
<a name="l02301"></a>02301 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">7</span>] == <span class="vhdllogic">9&#39;b0100_1000_1</span> &amp;&amp; (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b010</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b101</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b110</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b111</span>) &amp;&amp;
<a name="l02302"></a>02302 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span>)
<a name="l02303"></a>02303 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a775df2459596100b0e801ad20c24322b">`MICROPC_MOVEM_register_to_memory_control</a><span class="vhdlchar"></span> } :
<a name="l02304"></a>02304 <span class="keyword">// TST</span>
<a name="l02305"></a>02305 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">8&#39;b0100_1010</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b001</span> &amp;&amp;
<a name="l02306"></a>02306 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span>))
<a name="l02307"></a>02307 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a0c416458c758702471d503b0dbeab5d8">`MICROPC_TST</a><span class="vhdlchar"></span> } :
<a name="l02308"></a>02308 <span class="keyword">// TAS</span>
<a name="l02309"></a>02309 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">10&#39;b0100_1010_11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b001</span> &amp;&amp;
<a name="l02310"></a>02310 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span>))
<a name="l02311"></a>02311 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a9d9308b3732ecf15f57a22600ac300b8">`MICROPC_TAS</a><span class="vhdlchar"></span> } :
<a name="l02312"></a>02312 <span class="keyword">// MOVEM memory to register</span>
<a name="l02313"></a>02313 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">7</span>] == <span class="vhdllogic">9&#39;b0100_1100_1</span> &amp;&amp; (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b010</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b011</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b101</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b110</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b111</span>) &amp;&amp;
<a name="l02314"></a>02314 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> ||
<a name="l02315"></a>02315 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_010</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_011</span>))
<a name="l02316"></a>02316 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#ac2e6ac139e91da76695b3f953c994a0d">`MICROPC_MOVEM_memory_to_register</a><span class="vhdlchar"></span> } :
<a name="l02317"></a>02317 <span class="keyword">// TRAP</span>
<a name="l02318"></a>02318 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">4</span>] == <span class="vhdllogic">12&#39;b0100_1110_0100</span> ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#aa106c5a18e8252dc2ced5ec2f77650d9">`MICROPC_TRAP</a><span class="vhdlchar"></span> } :
<a name="l02319"></a>02319 <span class="keyword">// LINK</span>
<a name="l02320"></a>02320 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">13&#39;b0100_1110_0101_0</span> ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#af1b92ab55a321f316faf654b5d284caf">`MICROPC_LINK</a><span class="vhdlchar"></span> } :
<a name="l02321"></a>02321 <span class="keyword">// UNLK</span>
<a name="l02322"></a>02322 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">13&#39;b0100_1110_0101_1</span> ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a52c9810463f7dc671e021a7217259c04">`MICROPC_ULNK</a><span class="vhdlchar"></span> } :
<a name="l02323"></a>02323 <span class="keyword">// MOVE USP to USP</span>
<a name="l02324"></a>02324 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">13&#39;b0100_1110_0110_0</span> ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a999737a0b112cb8f4691dfc97278bc7e">`MICROPC_MOVE_USP_to_USP</a><span class="vhdlchar"></span> } :
<a name="l02325"></a>02325 <span class="keyword">// MOVE USP to An</span>
<a name="l02326"></a>02326 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">13&#39;b0100_1110_0110_1</span> ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a506e512a7df02654649a4275b676b5f7">`MICROPC_MOVE_USP_to_An</a><span class="vhdlchar"></span> } :
<a name="l02327"></a>02327 <span class="keyword">// RESET</span>
<a name="l02328"></a>02328 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0100_1110_0111_0000</span> ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a7ac5bfe9a8556912db6217142a3bb772">`MICROPC_RESET</a><span class="vhdlchar"></span> } :
<a name="l02329"></a>02329 <span class="keyword">// NOP</span>
<a name="l02330"></a>02330 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0100_1110_0111_0001</span> ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a836e1069d2a67eabcd01a92fcc2672f0">`MICROPC_NOP</a><span class="vhdlchar"></span> } :
<a name="l02331"></a>02331 <span class="keyword">// STOP</span>
<a name="l02332"></a>02332 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0100_1110_0111_0010</span> ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#aa23e89f5c79e7df7ff8ecf19a41ae572">`MICROPC_STOP</a><span class="vhdlchar"></span> } :
<a name="l02333"></a>02333 <span class="keyword">// RTE,RTR</span>
<a name="l02334"></a>02334 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0100_1110_0111_0011</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0100_1110_0111_0111</span> ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a76b52a43dac42903243a54b46c4bd839">`MICROPC_RTE_RTR</a><span class="vhdlchar"></span> } :
<a name="l02335"></a>02335 <span class="keyword">// RTS</span>
<a name="l02336"></a>02336 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0100_1110_0111_0101</span> ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a70b05c3577437ee3a51c6b63859242c5">`MICROPC_RTS</a><span class="vhdlchar"></span> } :
<a name="l02337"></a>02337 <span class="keyword">// TRAPV</span>
<a name="l02338"></a>02338 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0100_1110_0111_0110</span> ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a5038c753fc668ac678fe18251202305e">`MICROPC_TRAPV</a><span class="vhdlchar"></span> } :
<a name="l02339"></a>02339 <span class="keyword">// JSR</span>
<a name="l02340"></a>02340 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">10&#39;b0100_1110_10</span> &amp;&amp; (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b010</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b101</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b110</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b111</span>) &amp;&amp;
<a name="l02341"></a>02341 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> ||
<a name="l02342"></a>02342 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_010</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_011</span>))
<a name="l02343"></a>02343 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a4a79b8f0394c470bd67ba6442fa12395">`MICROPC_JSR</a><span class="vhdlchar"></span> } :
<a name="l02344"></a>02344 <span class="keyword">// JMP</span>
<a name="l02345"></a>02345 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">10&#39;b0100_1110_11</span> &amp;&amp; (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b010</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b101</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b110</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b111</span>) &amp;&amp;
<a name="l02346"></a>02346 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> ||
<a name="l02347"></a>02347 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_010</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_011</span>))
<a name="l02348"></a>02348 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a088577482bc02135d9aa7a58c1d0ed05">`MICROPC_JMP</a><span class="vhdlchar"></span> } :
<a name="l02349"></a>02349 <span class="keyword">// ADDQ,SUBQ not An</span>
<a name="l02350"></a>02350 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0101</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b001</span> &amp;&amp;
<a name="l02351"></a>02351 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span>))
<a name="l02352"></a>02352 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#af6f7102b5f4972ae11cad584ed87de14">`MICROPC_ADDQ_SUBQ_not_An</a><span class="vhdlchar"></span> } :
<a name="l02353"></a>02353 <span class="keyword">// ADDQ,SUBQ An</span>
<a name="l02354"></a>02354 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0101</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b00</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b001</span> ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#ae9cec5ce342a7d51efda687c24f35ab1">`MICROPC_ADDQ_SUBQ_An</a><span class="vhdlchar"></span> } :
<a name="l02355"></a>02355 <span class="keyword">// Scc</span>
<a name="l02356"></a>02356 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0101</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b001</span> &amp;&amp;
<a name="l02357"></a>02357 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span>))
<a name="l02358"></a>02358 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#ac09a1b9ae5783634cc9228354105fc94">`MICROPC_Scc</a><span class="vhdlchar"></span> } :
<a name="l02359"></a>02359 <span class="keyword">// DBcc</span>
<a name="l02360"></a>02360 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0101</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b001</span> ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a3d6a33ee86f4d37516a8afb60957b7ee">`MICROPC_DBcc</a><span class="vhdlchar"></span> } :
<a name="l02361"></a>02361 <span class="keyword">// BSR</span>
<a name="l02362"></a>02362 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0110</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0001</span> ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#afefae415ee468c051f367b74183a122b">`MICROPC_BSR</a><span class="vhdlchar"></span> } :
<a name="l02363"></a>02363 <span class="keyword">// Bcc,BRA</span>
<a name="l02364"></a>02364 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0110</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] != <span class="vhdllogic">4&#39;b0001</span> ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#ae56342916e5e608a0fdd3a01a11688b0">`MICROPC_Bcc_BRA</a><span class="vhdlchar"></span> } :
<a name="l02365"></a>02365 <span class="keyword">// MOVEQ</span>
<a name="l02366"></a>02366 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0111</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b0</span> ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a06f670a9b840bc7dda392686b0b53b41">`MICROPC_MOVEQ</a><span class="vhdlchar"></span> } :
<a name="l02367"></a>02367 <span class="keyword">// CMP</span>
<a name="l02368"></a>02368 ( (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1011</span>) &amp;&amp; (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b001</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b010</span>) &amp;&amp;
<a name="l02369"></a>02369 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">3&#39;b000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b001</span>) &amp;&amp;
<a name="l02370"></a>02370 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> ||
<a name="l02371"></a>02371 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_010</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_011</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_100</span>))
<a name="l02372"></a>02372 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a2d30784cb012710f55727108a9b62cf1">`MICROPC_CMP</a><span class="vhdlchar"></span> } :
<a name="l02373"></a>02373 <span class="keyword">// CMPA</span>
<a name="l02374"></a>02374 ( (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1011</span>) &amp;&amp; (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b011</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b111</span>) &amp;&amp;
<a name="l02375"></a>02375 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> ||
<a name="l02376"></a>02376 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_010</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_011</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_100</span>))
<a name="l02377"></a>02377 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a853a2713ed61bd3e53e70297f62b654d">`MICROPC_CMPA</a><span class="vhdlchar"></span> } :
<a name="l02378"></a>02378 <span class="keyword">// CMPM</span>
<a name="l02379"></a>02379 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1011</span> &amp;&amp; (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b100</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b101</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b110</span>) &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b001</span>) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a118f99a150352cf71a51d13156218674">`MICROPC_CMPM</a><span class="vhdlchar"></span> } :
<a name="l02380"></a>02380 <span class="keyword">// EOR</span>
<a name="l02381"></a>02381 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1011</span> &amp;&amp; (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b100</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b101</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b110</span>) &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b001</span> &amp;&amp;
<a name="l02382"></a>02382 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span>))
<a name="l02383"></a>02383 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#adaa788877b96a4c0cf1c9500aefc505a">`MICROPC_EOR</a><span class="vhdlchar"></span> } :
<a name="l02384"></a>02384 <span class="keyword">// ADD to mem,SUB to mem,AND to mem,OR to mem</span>
<a name="l02385"></a>02385 ( (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1101</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1001</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1100</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1000</span>) &amp;&amp;
<a name="l02386"></a>02386 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">4</span>] == <span class="vhdllogic">5&#39;b10001</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">4</span>] == <span class="vhdllogic">5&#39;b10010</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">4</span>] == <span class="vhdllogic">5&#39;b10011</span> ||
<a name="l02387"></a>02387 <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">4</span>] == <span class="vhdllogic">5&#39;b10101</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">4</span>] == <span class="vhdllogic">5&#39;b10110</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">4</span>] == <span class="vhdllogic">5&#39;b10111</span> ||
<a name="l02388"></a>02388 <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">4</span>] == <span class="vhdllogic">5&#39;b11001</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">4</span>] == <span class="vhdllogic">5&#39;b11010</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">4</span>] == <span class="vhdllogic">5&#39;b11011</span>) &amp;&amp;
<a name="l02389"></a>02389 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span>))
<a name="l02390"></a>02390 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#aa3942210285e132e0151143eca9103b4">`MICROPC_ADD_to_mem_SUB_to_mem_AND_to_mem_OR_to_mem</a><span class="vhdlchar"></span> } :
<a name="l02391"></a>02391 <span class="keyword">// ADD to Dn,SUB to Dn,AND to Dn,OR to Dn</span>
<a name="l02392"></a>02392 ( (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1101</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1001</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1100</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1000</span>) &amp;&amp;
<a name="l02393"></a>02393 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b001</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b010</span>) &amp;&amp;
<a name="l02394"></a>02394 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">12</span>] != <span class="vhdllogic">1&#39;b1</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">3&#39;b000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b001</span>) &amp;&amp; (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">12</span>] == <span class="vhdllogic">1&#39;b1</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b001</span>) &amp;&amp;
<a name="l02395"></a>02395 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> ||
<a name="l02396"></a>02396 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_010</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_011</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_100</span>))
<a name="l02397"></a>02397 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#acdb63549759af21684d2fd6e3dad8eb7">`MICROPC_ADD_to_Dn_SUB_to_Dn_AND_to_Dn_OR_to_Dn</a><span class="vhdlchar"></span> } :
<a name="l02398"></a>02398 <span class="keyword">// ADDA,SUBA</span>
<a name="l02399"></a>02399 ( (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1101</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1001</span>) &amp;&amp; (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b011</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b111</span>) &amp;&amp;
<a name="l02400"></a>02400 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> ||
<a name="l02401"></a>02401 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_010</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_011</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_100</span>))
<a name="l02402"></a>02402 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a02c5cdffb720a762c8790dbc86ab1a18">`MICROPC_ADDA_SUBA</a><span class="vhdlchar"></span> } :
<a name="l02403"></a>02403 <span class="keyword">// ABCD,SBCD,ADDX,SUBX</span>
<a name="l02404"></a>02404 ( ((<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1100</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1000</span>) &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">4</span>] == <span class="vhdllogic">5&#39;b10000</span>) ||
<a name="l02405"></a>02405 ((<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1101</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1001</span>) &amp;&amp; (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">4</span>] == <span class="vhdllogic">5&#39;b10000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">4</span>] == <span class="vhdllogic">5&#39;b10100</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">4</span>] == <span class="vhdllogic">5&#39;b11000</span>) ) ) ?
<a name="l02406"></a>02406 { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a52a25a790c5779d1d9c5d4b807f6e9e6">`MICROPC_ABCD_SBCD_ADDX_SUBX</a><span class="vhdlchar"></span> } :
<a name="l02407"></a>02407 <span class="keyword">// EXG</span>
<a name="l02408"></a>02408 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1100</span> &amp;&amp; (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">6&#39;b101000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">6&#39;b101001</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">6&#39;b110001</span>) ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a5a514be119075b3c3ab64dfa849f3d9c">`MICROPC_EXG</a><span class="vhdlchar"></span> } :
<a name="l02409"></a>02409 <span class="keyword">// MULS,MULU,DIVS,DIVU</span>
<a name="l02410"></a>02410 ( (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1100</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1000</span>) &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b001</span> &amp;&amp;
<a name="l02411"></a>02411 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> ||
<a name="l02412"></a>02412 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_010</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_011</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_100</span>))
<a name="l02413"></a>02413 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#abff7613e058d71dedd233ff63a37a724">`MICROPC_MULS_MULU_DIVS_DIVU</a><span class="vhdlchar"></span> } :
<a name="l02414"></a>02414 <span class="keyword">// ASL,LSL,ROL,ROXL,ASR,LSR,ROR,ROXR all memory</span>
<a name="l02415"></a>02415 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1110</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">11</span>] == <span class="vhdllogic">1&#39;b0</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b000</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b001</span> &amp;&amp;
<a name="l02416"></a>02416 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span>))
<a name="l02417"></a>02417 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a28f22a27673dd123f2ae53ac00c27c47">`MICROPC_ASL_LSL_ROL_ROXL_ASR_LSR_ROR_ROXR_all_memory</a><span class="vhdlchar"></span> } :
<a name="l02418"></a>02418 <span class="keyword">// ASL,LSL,ROL,ROXL,ASR,LSR,ROR,ROXR all immediate/register</span>
<a name="l02419"></a>02419 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1110</span> &amp;&amp; (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b00</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b01</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b10</span>) ) ?
<a name="l02420"></a>02420 { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a8a505b33f1c42b903dcb264862dda090">`MICROPC_ASL_LSL_ROL_ROXL_ASR_LSR_ROR_ROXR_all_immediate_register</a><span class="vhdlchar"></span> } :
<a name="l02421"></a>02421
<a name="l02422"></a>02422 <span class="keyword">// else</span>
<a name="l02423"></a>02423
<a name="l02424"></a>02424 { <a class="code" href="classdecoder.html#af430142beb92570232fc803624ce1b38">ILLEGAL_INSTRUCTION_TRAP</a>, <a class="code" href="classdecoder.html#adfdf73062e947946cd9fa70a18e956c8">UNUSED_MICROPC</a> }
<a name="l02425"></a>02425 ;
<a name="l02426"></a>02426
<a name="l02427"></a>02427 <span class="keyword">// load ea</span>
<a name="l02428"></a>02428 <span class="vhdlkeyword">assign</span> <a class="code" href="classdecoder.html#a10aa58a48c1be7f355587ca0662adb6f">load_ea</a> =
<a name="l02429"></a>02429 (
<a name="l02430"></a>02430 (<a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a6f693ee79161bffa99f05d9f5b89a2d0">`EA_TYPE_ALL</a><span class="vhdlchar"></span> &amp;&amp; (<a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">ea_mod</a> == <span class="vhdllogic">3&#39;b000</span> || <a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">ea_mod</a> == <span class="vhdllogic">3&#39;b001</span> || (<a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">ea_mod</a> == <span class="vhdllogic">3&#39;b111</span> &amp;&amp; <a class="code" href="classdecoder.html#a8658dbe33b5c93ec447d2c4915bf46bb">ea_reg</a> == <span class="vhdllogic">3&#39;b100</span>))) ||
<a name="l02431"></a>02431 (<a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a17a8a468ddfc3bdb178081a368f4dd6c">`EA_TYPE_DATAALTER</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">ea_mod</a> == <span class="vhdllogic">3&#39;b000</span>) ||
<a name="l02432"></a>02432 (<a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a8e7bc745d4def25f5a995a6955dbdb4b">`EA_TYPE_DN_AN</a><span class="vhdlchar"></span> &amp;&amp; (<a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">ea_mod</a> == <span class="vhdllogic">3&#39;b000</span> || <a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">ea_mod</a> == <span class="vhdllogic">3&#39;b001</span>)) ||
<a name="l02433"></a>02433 (<a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a1b85de8c778c471fdc569b4ef5f3bc60">`EA_TYPE_DATA</a><span class="vhdlchar"></span> &amp;&amp; (<a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">ea_mod</a> == <span class="vhdllogic">3&#39;b000</span> || (<a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">ea_mod</a> == <span class="vhdllogic">3&#39;b111</span> &amp;&amp; <a class="code" href="classdecoder.html#a8658dbe33b5c93ec447d2c4915bf46bb">ea_reg</a> == <span class="vhdllogic">3&#39;b100</span>)))
<a name="l02434"></a>02434 ) ? <span class="vhdllogic">9&#39;d0</span> <span class="keyword">// no ea needed</span>
<a name="l02435"></a>02435 :
<a name="l02436"></a>02436 (<a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">ea_mod</a> == <span class="vhdllogic">3&#39;b010</span> &amp;&amp; (
<a name="l02437"></a>02437 <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a6f693ee79161bffa99f05d9f5b89a2d0">`EA_TYPE_ALL</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a925f0004ba49b82dbdf7c4ae969ba6ed">`EA_TYPE_CONTROL_POSTINC</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a41499eaa1b7aa62f455a07e5435d754a">`EA_TYPE_CONTROLALTER_PREDEC</a><span class="vhdlchar"></span> ||
<a name="l02438"></a>02438 <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#ae2c794f81236993a23138cbf3f7eda44">`EA_TYPE_CONTROL</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a17a8a468ddfc3bdb178081a368f4dd6c">`EA_TYPE_DATAALTER</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a653530f090b85ba7bcd93912b8834412">`EA_TYPE_MEMORYALTER</a><span class="vhdlchar"></span> ||
<a name="l02439"></a>02439 <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a1b85de8c778c471fdc569b4ef5f3bc60">`EA_TYPE_DATA</a><span class="vhdlchar"></span>
<a name="l02440"></a>02440 )) ? <a class="code" href="ao68000_8v.html#a52c9fefea5280f08cf24bac6373252ac">`MICROPC_LOAD_EA_An</a><span class="vhdlchar"></span> <span class="keyword">// (An)</span>
<a name="l02441"></a>02441 :
<a name="l02442"></a>02442 (<a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">ea_mod</a> == <span class="vhdllogic">3&#39;b011</span> &amp;&amp; (
<a name="l02443"></a>02443 <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a6f693ee79161bffa99f05d9f5b89a2d0">`EA_TYPE_ALL</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a925f0004ba49b82dbdf7c4ae969ba6ed">`EA_TYPE_CONTROL_POSTINC</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a653530f090b85ba7bcd93912b8834412">`EA_TYPE_MEMORYALTER</a><span class="vhdlchar"></span> ||
<a name="l02444"></a>02444 <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a17a8a468ddfc3bdb178081a368f4dd6c">`EA_TYPE_DATAALTER</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a1b85de8c778c471fdc569b4ef5f3bc60">`EA_TYPE_DATA</a><span class="vhdlchar"></span>
<a name="l02445"></a>02445 )) ? <a class="code" href="ao68000_8v.html#aafdd46a7740d48b02e781d3136f7ce1d">`MICROPC_LOAD_EA_An_plus</a><span class="vhdlchar"></span> <span class="keyword">// (An)+</span>
<a name="l02446"></a>02446 :
<a name="l02447"></a>02447 (<a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">ea_mod</a> == <span class="vhdllogic">3&#39;b100</span> &amp;&amp; (
<a name="l02448"></a>02448 <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a6f693ee79161bffa99f05d9f5b89a2d0">`EA_TYPE_ALL</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a41499eaa1b7aa62f455a07e5435d754a">`EA_TYPE_CONTROLALTER_PREDEC</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a17a8a468ddfc3bdb178081a368f4dd6c">`EA_TYPE_DATAALTER</a><span class="vhdlchar"></span> ||
<a name="l02449"></a>02449 <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a653530f090b85ba7bcd93912b8834412">`EA_TYPE_MEMORYALTER</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a1b85de8c778c471fdc569b4ef5f3bc60">`EA_TYPE_DATA</a><span class="vhdlchar"></span>
<a name="l02450"></a>02450 )) ? <a class="code" href="ao68000_8v.html#a9b094e5044be3be8167a5b80bd274433">`MICROPC_LOAD_EA_minus_An</a><span class="vhdlchar"></span> <span class="keyword">// -(An)</span>
<a name="l02451"></a>02451 :
<a name="l02452"></a>02452 (<a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">ea_mod</a> == <span class="vhdllogic">3&#39;b101</span> &amp;&amp; (
<a name="l02453"></a>02453 <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a6f693ee79161bffa99f05d9f5b89a2d0">`EA_TYPE_ALL</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a925f0004ba49b82dbdf7c4ae969ba6ed">`EA_TYPE_CONTROL_POSTINC</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a41499eaa1b7aa62f455a07e5435d754a">`EA_TYPE_CONTROLALTER_PREDEC</a><span class="vhdlchar"></span> ||
<a name="l02454"></a>02454 <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#ae2c794f81236993a23138cbf3f7eda44">`EA_TYPE_CONTROL</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a17a8a468ddfc3bdb178081a368f4dd6c">`EA_TYPE_DATAALTER</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a653530f090b85ba7bcd93912b8834412">`EA_TYPE_MEMORYALTER</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a1b85de8c778c471fdc569b4ef5f3bc60">`EA_TYPE_DATA</a><span class="vhdlchar"></span>
<a name="l02455"></a>02455 )) ? <a class="code" href="ao68000_8v.html#a6e06b607b9a1a157e3753943d2b015e1">`MICROPC_LOAD_EA_d16_An</a><span class="vhdlchar"></span> <span class="keyword">// (d16, An)</span>
<a name="l02456"></a>02456 :
<a name="l02457"></a>02457 (<a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">ea_mod</a> == <span class="vhdllogic">3&#39;b110</span> &amp;&amp; (
<a name="l02458"></a>02458 <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a6f693ee79161bffa99f05d9f5b89a2d0">`EA_TYPE_ALL</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a925f0004ba49b82dbdf7c4ae969ba6ed">`EA_TYPE_CONTROL_POSTINC</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a41499eaa1b7aa62f455a07e5435d754a">`EA_TYPE_CONTROLALTER_PREDEC</a><span class="vhdlchar"></span> ||
<a name="l02459"></a>02459 <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#ae2c794f81236993a23138cbf3f7eda44">`EA_TYPE_CONTROL</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a17a8a468ddfc3bdb178081a368f4dd6c">`EA_TYPE_DATAALTER</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a653530f090b85ba7bcd93912b8834412">`EA_TYPE_MEMORYALTER</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a1b85de8c778c471fdc569b4ef5f3bc60">`EA_TYPE_DATA</a><span class="vhdlchar"></span>
<a name="l02460"></a>02460 )) ? <a class="code" href="ao68000_8v.html#aa80bb2f21742a46f59c3b8401c9209a3">`MICROPC_LOAD_EA_d8_An_Xn</a><span class="vhdlchar"></span> <span class="keyword">// (d8, An, Xn)</span>
<a name="l02461"></a>02461 :
<a name="l02462"></a>02462 (<a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">ea_mod</a> == <span class="vhdllogic">3&#39;b111</span> &amp;&amp; <a class="code" href="classdecoder.html#a8658dbe33b5c93ec447d2c4915bf46bb">ea_reg</a> == <span class="vhdllogic">3&#39;b000</span> &amp;&amp; (
<a name="l02463"></a>02463 <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a6f693ee79161bffa99f05d9f5b89a2d0">`EA_TYPE_ALL</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a925f0004ba49b82dbdf7c4ae969ba6ed">`EA_TYPE_CONTROL_POSTINC</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a41499eaa1b7aa62f455a07e5435d754a">`EA_TYPE_CONTROLALTER_PREDEC</a><span class="vhdlchar"></span> ||
<a name="l02464"></a>02464 <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#ae2c794f81236993a23138cbf3f7eda44">`EA_TYPE_CONTROL</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a17a8a468ddfc3bdb178081a368f4dd6c">`EA_TYPE_DATAALTER</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a653530f090b85ba7bcd93912b8834412">`EA_TYPE_MEMORYALTER</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a1b85de8c778c471fdc569b4ef5f3bc60">`EA_TYPE_DATA</a><span class="vhdlchar"></span>
<a name="l02465"></a>02465 )) ? <a class="code" href="ao68000_8v.html#ade20a2ce9d926ed45a0c6e2d4c2bffad">`MICROPC_LOAD_EA_xxx_W</a><span class="vhdlchar"></span> <span class="keyword">// (xxx).W</span>
<a name="l02466"></a>02466 :
<a name="l02467"></a>02467 (<a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">ea_mod</a> == <span class="vhdllogic">3&#39;b111</span> &amp;&amp; <a class="code" href="classdecoder.html#a8658dbe33b5c93ec447d2c4915bf46bb">ea_reg</a> == <span class="vhdllogic">3&#39;b001</span> &amp;&amp; (
<a name="l02468"></a>02468 <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a6f693ee79161bffa99f05d9f5b89a2d0">`EA_TYPE_ALL</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a925f0004ba49b82dbdf7c4ae969ba6ed">`EA_TYPE_CONTROL_POSTINC</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a41499eaa1b7aa62f455a07e5435d754a">`EA_TYPE_CONTROLALTER_PREDEC</a><span class="vhdlchar"></span> ||
<a name="l02469"></a>02469 <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#ae2c794f81236993a23138cbf3f7eda44">`EA_TYPE_CONTROL</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a17a8a468ddfc3bdb178081a368f4dd6c">`EA_TYPE_DATAALTER</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a653530f090b85ba7bcd93912b8834412">`EA_TYPE_MEMORYALTER</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a1b85de8c778c471fdc569b4ef5f3bc60">`EA_TYPE_DATA</a><span class="vhdlchar"></span>
<a name="l02470"></a>02470 )) ? <a class="code" href="ao68000_8v.html#ac3601da82892ec91bbc958628eb6ed03">`MICROPC_LOAD_EA_xxx_L</a><span class="vhdlchar"></span> <span class="keyword">// (xxx).L</span>
<a name="l02471"></a>02471 :
<a name="l02472"></a>02472 (<a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">ea_mod</a> == <span class="vhdllogic">3&#39;b111</span> &amp;&amp; <a class="code" href="classdecoder.html#a8658dbe33b5c93ec447d2c4915bf46bb">ea_reg</a> == <span class="vhdllogic">3&#39;b010</span> &amp;&amp; (
<a name="l02473"></a>02473 <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a6f693ee79161bffa99f05d9f5b89a2d0">`EA_TYPE_ALL</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a925f0004ba49b82dbdf7c4ae969ba6ed">`EA_TYPE_CONTROL_POSTINC</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#ae2c794f81236993a23138cbf3f7eda44">`EA_TYPE_CONTROL</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a1b85de8c778c471fdc569b4ef5f3bc60">`EA_TYPE_DATA</a><span class="vhdlchar"></span>
<a name="l02474"></a>02474 )) ? <a class="code" href="ao68000_8v.html#a7cb86509757fa3419fbc8980724bd315">`MICROPC_LOAD_EA_d16_PC</a><span class="vhdlchar"></span> <span class="keyword">// (d16, PC)</span>
<a name="l02475"></a>02475 :
<a name="l02476"></a>02476 (<a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">ea_mod</a> == <span class="vhdllogic">3&#39;b111</span> &amp;&amp; <a class="code" href="classdecoder.html#a8658dbe33b5c93ec447d2c4915bf46bb">ea_reg</a> == <span class="vhdllogic">3&#39;b011</span> &amp;&amp; (
<a name="l02477"></a>02477 <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a6f693ee79161bffa99f05d9f5b89a2d0">`EA_TYPE_ALL</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a925f0004ba49b82dbdf7c4ae969ba6ed">`EA_TYPE_CONTROL_POSTINC</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#ae2c794f81236993a23138cbf3f7eda44">`EA_TYPE_CONTROL</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a1b85de8c778c471fdc569b4ef5f3bc60">`EA_TYPE_DATA</a><span class="vhdlchar"></span>
<a name="l02478"></a>02478 )) ? <a class="code" href="ao68000_8v.html#a785fdbd62d5c0da122ada9db07753b74">`MICROPC_LOAD_EA_d8_PC_Xn</a><span class="vhdlchar"></span> <span class="keyword">// (d8, PC, Xn)</span>
<a name="l02479"></a>02479 :
<a name="l02480"></a>02480 <a class="code" href="ao68000_8v.html#a92f21025346f2b9baad5ee3ea27c8833">`MICROPC_LOAD_EA_illegal_command</a><span class="vhdlchar"></span> <span class="keyword">// illegal command</span>
<a name="l02481"></a>02481 ;
<a name="l02482"></a>02482
<a name="l02483"></a>02483 <span class="keyword">// perform ea read</span>
<a name="l02484"></a>02484 <span class="vhdlkeyword">assign</span> <a class="code" href="classdecoder.html#a6c8f1852c27f24f3c5b376224beb327e">perform_ea_read</a> =
<a name="l02485"></a>02485 ( <a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">ea_mod</a> == <span class="vhdllogic">3&#39;b000</span> &amp;&amp; (<a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a6f693ee79161bffa99f05d9f5b89a2d0">`EA_TYPE_ALL</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a17a8a468ddfc3bdb178081a368f4dd6c">`EA_TYPE_DATAALTER</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a8e7bc745d4def25f5a995a6955dbdb4b">`EA_TYPE_DN_AN</a><span class="vhdlchar"></span> ||
<a name="l02486"></a>02486 <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a1b85de8c778c471fdc569b4ef5f3bc60">`EA_TYPE_DATA</a><span class="vhdlchar"></span>) ) ?
<a name="l02487"></a>02487 <a class="code" href="ao68000_8v.html#ae21eb6fc6455af78326135e407ee17eb">`MICROPC_PERFORM_EA_READ_Dn</a><span class="vhdlchar"></span> :
<a name="l02488"></a>02488 ( <a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">ea_mod</a> == <span class="vhdllogic">3&#39;b001</span> &amp;&amp; (<a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a6f693ee79161bffa99f05d9f5b89a2d0">`EA_TYPE_ALL</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a8e7bc745d4def25f5a995a6955dbdb4b">`EA_TYPE_DN_AN</a><span class="vhdlchar"></span>) ) ? <a class="code" href="ao68000_8v.html#a8d6dcbc97994c642a8da0be0fecc257a">`MICROPC_PERFORM_EA_READ_An</a><span class="vhdlchar"></span> :
<a name="l02489"></a>02489 ( <a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">ea_mod</a> == <span class="vhdllogic">3&#39;b111</span> &amp;&amp; <a class="code" href="classdecoder.html#a8658dbe33b5c93ec447d2c4915bf46bb">ea_reg</a> == <span class="vhdllogic">3&#39;b100</span> &amp;&amp; (<a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a6f693ee79161bffa99f05d9f5b89a2d0">`EA_TYPE_ALL</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a1b85de8c778c471fdc569b4ef5f3bc60">`EA_TYPE_DATA</a><span class="vhdlchar"></span>) ) ?
<a name="l02490"></a>02490 <a class="code" href="ao68000_8v.html#ac2394d0cf1bffca610b4c8fb77881207">`MICROPC_PERFORM_EA_READ_imm</a><span class="vhdlchar"></span> :
<a name="l02491"></a>02491 <a class="code" href="ao68000_8v.html#a2c70544d287306914c57f360847a1abd">`MICROPC_PERFORM_EA_READ_memory</a><span class="vhdlchar"></span>
<a name="l02492"></a>02492 ;
<a name="l02493"></a>02493
<a name="l02494"></a>02494 <span class="keyword">// perform ea write</span>
<a name="l02495"></a>02495 <span class="vhdlkeyword">assign</span> <a class="code" href="classdecoder.html#a01b7528cc9ef96a11a65bc617e3ce8e8">perform_ea_write</a> =
<a name="l02496"></a>02496 ( <a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">ea_mod</a> == <span class="vhdllogic">3&#39;b000</span> &amp;&amp; (<a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a6f693ee79161bffa99f05d9f5b89a2d0">`EA_TYPE_ALL</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a17a8a468ddfc3bdb178081a368f4dd6c">`EA_TYPE_DATAALTER</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a8e7bc745d4def25f5a995a6955dbdb4b">`EA_TYPE_DN_AN</a><span class="vhdlchar"></span> ||
<a name="l02497"></a>02497 <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a1b85de8c778c471fdc569b4ef5f3bc60">`EA_TYPE_DATA</a><span class="vhdlchar"></span>) ) ?
<a name="l02498"></a>02498 <a class="code" href="ao68000_8v.html#acb05778c30ee2acc522c18f823a678ff">`MICROPC_PERFORM_EA_WRITE_Dn</a><span class="vhdlchar"></span> :
<a name="l02499"></a>02499 ( <a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">ea_mod</a> == <span class="vhdllogic">3&#39;b001</span> &amp;&amp; (<a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a6f693ee79161bffa99f05d9f5b89a2d0">`EA_TYPE_ALL</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a8e7bc745d4def25f5a995a6955dbdb4b">`EA_TYPE_DN_AN</a><span class="vhdlchar"></span>) ) ? <a class="code" href="ao68000_8v.html#a20c5aa2df0d23f8bbdaccfca2bfed9f8">`MICROPC_PERFORM_EA_WRITE_An</a><span class="vhdlchar"></span> :
<a name="l02500"></a>02500 <a class="code" href="ao68000_8v.html#ab8383cdb4a1df6d5f3296bb4244c7bab">`MICROPC_PERFORM_EA_WRITE_memory</a><span class="vhdlchar"></span>
<a name="l02501"></a>02501 ;
<a name="l02502"></a>02502
<a name="l02503"></a>02503 <span class="keyword">// save ea</span>
<a name="l02504"></a>02504 <span class="vhdlkeyword">assign</span> <a class="code" href="classdecoder.html#a28b05d6e340a4705765b60dea6a7582e">save_ea</a> =
<a name="l02505"></a>02505 (<a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">ea_mod</a> == <span class="vhdllogic">3&#39;b011</span> &amp;&amp; (
<a name="l02506"></a>02506 <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a6f693ee79161bffa99f05d9f5b89a2d0">`EA_TYPE_ALL</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a925f0004ba49b82dbdf7c4ae969ba6ed">`EA_TYPE_CONTROL_POSTINC</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a653530f090b85ba7bcd93912b8834412">`EA_TYPE_MEMORYALTER</a><span class="vhdlchar"></span> ||
<a name="l02507"></a>02507 <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a17a8a468ddfc3bdb178081a368f4dd6c">`EA_TYPE_DATAALTER</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a1b85de8c778c471fdc569b4ef5f3bc60">`EA_TYPE_DATA</a><span class="vhdlchar"></span>
<a name="l02508"></a>02508 )) ? <a class="code" href="ao68000_8v.html#a02dc58bcc0412d6c93647a1304f20443">`MICROPC_SAVE_EA_An_plus</a><span class="vhdlchar"></span> <span class="keyword">// (An)+</span>
<a name="l02509"></a>02509 :
<a name="l02510"></a>02510 (<a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">ea_mod</a> == <span class="vhdllogic">3&#39;b100</span> &amp;&amp; (
<a name="l02511"></a>02511 <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a6f693ee79161bffa99f05d9f5b89a2d0">`EA_TYPE_ALL</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a41499eaa1b7aa62f455a07e5435d754a">`EA_TYPE_CONTROLALTER_PREDEC</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a17a8a468ddfc3bdb178081a368f4dd6c">`EA_TYPE_DATAALTER</a><span class="vhdlchar"></span> ||
<a name="l02512"></a>02512 <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a653530f090b85ba7bcd93912b8834412">`EA_TYPE_MEMORYALTER</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a1b85de8c778c471fdc569b4ef5f3bc60">`EA_TYPE_DATA</a><span class="vhdlchar"></span>
<a name="l02513"></a>02513 )) ? <a class="code" href="ao68000_8v.html#ae4c00f630c944a41db777f7b51ee052d">`MICROPC_SAVE_EA_minus_An</a><span class="vhdlchar"></span> <span class="keyword">// -(An)</span>
<a name="l02514"></a>02514 :
<a name="l02515"></a>02515 <span class="vhdllogic">9&#39;d0</span> <span class="keyword">// no ea needed</span>
<a name="l02516"></a>02516 ;
<a name="l02517"></a>02517
<a name="l02518"></a>02518 <span class="keyword">// ALU decoding optimization</span>
<a name="l02519"></a>02519 <span class="keyword">// Thanks to Frederic Requin</span>
<a name="l02520"></a>02520 <span class="keyword">// not used: 7, 13, 17</span>
<a name="l02521"></a>02521 <span class="vhdlkeyword">assign</span> <a class="code" href="classdecoder.html#a4a908459c4181bada964b9269629cfaf">decoder_alu</a>[<span class="vhdllogic">0</span>] = ((<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0000</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3&#39;b000</span>) <span class="keyword">// OR</span>
<a name="l02522"></a>02522 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1000</span>));
<a name="l02523"></a>02523 <span class="vhdlkeyword">assign</span> <a class="code" href="classdecoder.html#a4a908459c4181bada964b9269629cfaf">decoder_alu</a>[<span class="vhdllogic">1</span>] = ((<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0000</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3&#39;b001</span>) <span class="keyword">// AND</span>
<a name="l02524"></a>02524 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1100</span>));
<a name="l02525"></a>02525 <span class="vhdlkeyword">assign</span> <a class="code" href="classdecoder.html#a4a908459c4181bada964b9269629cfaf">decoder_alu</a>[<span class="vhdllogic">2</span>] = ((<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0000</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3&#39;b101</span>) <span class="keyword">// EOR</span>
<a name="l02526"></a>02526 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1011</span> &amp;&amp; (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">7</span>] == <span class="vhdllogic">2&#39;b10</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b110</span>) &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b001</span>));
<a name="l02527"></a>02527 <span class="vhdlkeyword">assign</span> <a class="code" href="classdecoder.html#a4a908459c4181bada964b9269629cfaf">decoder_alu</a>[<span class="vhdllogic">3</span>] = ((<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0000</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3&#39;b011</span>) <span class="keyword">// ADD</span>
<a name="l02528"></a>02528 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1101</span>)
<a name="l02529"></a>02529 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0101</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b0</span>));
<a name="l02530"></a>02530 <span class="vhdlkeyword">assign</span> <a class="code" href="classdecoder.html#a4a908459c4181bada964b9269629cfaf">decoder_alu</a>[<span class="vhdllogic">4</span>] = ((<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0000</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3&#39;b010</span>) <span class="keyword">// SUB</span>
<a name="l02531"></a>02531 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1001</span>)
<a name="l02532"></a>02532 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0101</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b1</span>));
<a name="l02533"></a>02533 <span class="vhdlkeyword">assign</span> <a class="code" href="classdecoder.html#a4a908459c4181bada964b9269629cfaf">decoder_alu</a>[<span class="vhdllogic">5</span>] = ((<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0000</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3&#39;b110</span>) <span class="keyword">// CMP</span>
<a name="l02534"></a>02534 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1011</span> &amp;&amp; (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">7</span>] == <span class="vhdllogic">2&#39;b10</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b110</span>) &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b001</span>)
<a name="l02535"></a>02535 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1011</span> &amp;&amp; (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">7</span>] == <span class="vhdllogic">2&#39;b00</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b010</span>)));
<a name="l02536"></a>02536 <span class="vhdlkeyword">assign</span> <a class="code" href="classdecoder.html#a4a908459c4181bada964b9269629cfaf">decoder_alu</a>[<span class="vhdllogic">6</span>] = ((<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1101</span>) <span class="keyword">// ADDA,ADDQ</span>
<a name="l02537"></a>02537 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0101</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b0</span>));
<a name="l02538"></a>02538 <span class="vhdlkeyword">assign</span> <a class="code" href="classdecoder.html#a4a908459c4181bada964b9269629cfaf">decoder_alu</a>[<span class="vhdllogic">7</span>] = ((<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1001</span>) <span class="keyword">// SUBA,CMPA,SUBQ</span>
<a name="l02539"></a>02539 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1011</span>)
<a name="l02540"></a>02540 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0101</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b1</span>));
<a name="l02541"></a>02541 <span class="vhdlkeyword">assign</span> <a class="code" href="classdecoder.html#a4a908459c4181bada964b9269629cfaf">decoder_alu</a>[<span class="vhdllogic">8</span>] = (((<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">2&#39;b00</span>) <span class="keyword">// ASL</span>
<a name="l02542"></a>02542 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">2&#39;b00</span>)) &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b1</span>);
<a name="l02543"></a>02543 <span class="vhdlkeyword">assign</span> <a class="code" href="classdecoder.html#a4a908459c4181bada964b9269629cfaf">decoder_alu</a>[<span class="vhdllogic">9</span>] = (((<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">2&#39;b01</span>) <span class="keyword">// LSL</span>
<a name="l02544"></a>02544 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">2&#39;b01</span>)) &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b1</span>);
<a name="l02545"></a>02545 <span class="vhdlkeyword">assign</span> <a class="code" href="classdecoder.html#a4a908459c4181bada964b9269629cfaf">decoder_alu</a>[<span class="vhdllogic">10</span>] = (((<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">2&#39;b11</span>) <span class="keyword">// ROL</span>
<a name="l02546"></a>02546 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">2&#39;b11</span>)) &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b1</span>);
<a name="l02547"></a>02547 <span class="vhdlkeyword">assign</span> <a class="code" href="classdecoder.html#a4a908459c4181bada964b9269629cfaf">decoder_alu</a>[<span class="vhdllogic">11</span>] = (((<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">2&#39;b10</span>) <span class="keyword">// ROXL</span>
<a name="l02548"></a>02548 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">2&#39;b10</span>)) &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b1</span>);
<a name="l02549"></a>02549 <span class="vhdlkeyword">assign</span> <a class="code" href="classdecoder.html#a4a908459c4181bada964b9269629cfaf">decoder_alu</a>[<span class="vhdllogic">12</span>] = (((<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">2&#39;b00</span>) <span class="keyword">// ASR</span>
<a name="l02550"></a>02550 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">2&#39;b00</span>)) &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b0</span>);
<a name="l02551"></a>02551 <span class="vhdlkeyword">assign</span> <a class="code" href="classdecoder.html#a4a908459c4181bada964b9269629cfaf">decoder_alu</a>[<span class="vhdllogic">13</span>] = (((<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">2&#39;b01</span>) <span class="keyword">// LSR</span>
<a name="l02552"></a>02552 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">2&#39;b01</span>)) &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b0</span>);
<a name="l02553"></a>02553 <span class="vhdlkeyword">assign</span> <a class="code" href="classdecoder.html#a4a908459c4181bada964b9269629cfaf">decoder_alu</a>[<span class="vhdllogic">14</span>] = (((<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">2&#39;b11</span>) <span class="keyword">// ROR</span>
<a name="l02554"></a>02554 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">2&#39;b11</span>)) &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b0</span>);
<a name="l02555"></a>02555 <span class="vhdlkeyword">assign</span> <a class="code" href="classdecoder.html#a4a908459c4181bada964b9269629cfaf">decoder_alu</a>[<span class="vhdllogic">15</span>] = (((<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">2&#39;b10</span>) <span class="keyword">// ROXR</span>
<a name="l02556"></a>02556 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">2&#39;b10</span>)) &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b0</span>);
<a name="l02557"></a>02557 <span class="vhdlkeyword">assign</span> <a class="code" href="classdecoder.html#a4a908459c4181bada964b9269629cfaf">decoder_alu</a>[<span class="vhdllogic">16</span>] = ((<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">8&#39;b0100_0110</span>) <span class="keyword">// SR operations</span>
<a name="l02558"></a>02558 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0100_1110_0111_0011</span>)
<a name="l02559"></a>02559 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0100_1110_0111_0010</span>)
<a name="l02560"></a>02560 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0000_000_0_01_111100</span>)
<a name="l02561"></a>02561 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0000_001_0_01_111100</span>)
<a name="l02562"></a>02562 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0000_101_0_01_111100</span>));
<a name="l02563"></a>02563 <span class="vhdlkeyword">assign</span> <a class="code" href="classdecoder.html#a4a908459c4181bada964b9269629cfaf">decoder_alu</a>[<span class="vhdllogic">17</span>] = ((<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">8&#39;b0100_0100</span>) <span class="keyword">// CCR operations</span>
<a name="l02564"></a>02564 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0100_1110_0111_0111</span>)
<a name="l02565"></a>02565 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0000_000_0_00_111100</span>)
<a name="l02566"></a>02566 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0000_001_0_00_111100</span>)
<a name="l02567"></a>02567 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0000_101_0_00_111100</span>));
<a name="l02568"></a>02568
<a name="l02569"></a>02569 <span class="vhdlkeyword">endmodule</span>
<a name="l02570"></a>02570
<a name="l02571"></a>02571 <span class="keyword">/***********************************************************************************************************************</span>
<a name="l02572"></a>02572 <span class="keyword"> Condition</span>
<a name="l02573"></a>02573 <span class="keyword"> ***********************************************************************************************************************/</span>
<a name="l02574"></a>02574
<a name="l02149"></a>02149
<a name="l02159"></a><a class="code" href="classdecoder.html">02159</a> <span class="vhdlkeyword">module</span> <a class="code" href="classdecoder.html">decoder</a>(
<a name="l02160"></a><a class="code" href="classdecoder.html#a6d5317405a2a0f3d87baeb7150ce7a82">02160</a> <span class="vhdlkeyword">input</span> <a class="code" href="classdecoder.html#a6d5317405a2a0f3d87baeb7150ce7a82">clock</a>,
<a name="l02161"></a><a class="code" href="classdecoder.html#abb84ff97c6b5274c476817bf0c89eae5">02161</a> <span class="vhdlkeyword">input</span> <a class="code" href="classdecoder.html#abb84ff97c6b5274c476817bf0c89eae5">reset_n</a>,
<a name="l02162"></a>02162
<a name="l02163"></a><a class="code" href="classdecoder.html#a4f8f30358d78d6b6509ecb0a75c8e2e9">02163</a> <span class="vhdlkeyword">input</span> <a class="code" href="classdecoder.html#a4f8f30358d78d6b6509ecb0a75c8e2e9">supervisor</a>,
<a name="l02164"></a><a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">02164</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>,
<a name="l02165"></a>02165
<a name="l02166"></a>02166 <span class="keyword">// zero: no trap</span>
<a name="l02167"></a><a class="code" href="classdecoder.html#a67eb094220c399c1c40c878b5845e34e">02167</a> <span class="vhdlkeyword">output</span> [<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] <a class="code" href="classdecoder.html#a67eb094220c399c1c40c878b5845e34e">decoder_trap</a>,
<a name="l02168"></a><a class="code" href="classdecoder.html#af02fcbe55a29581530a9fa1b01348d50">02168</a> <span class="vhdlkeyword">output</span> [<span class="vhdllogic">8</span>:<span class="vhdllogic">0</span>] <a class="code" href="classdecoder.html#af02fcbe55a29581530a9fa1b01348d50">decoder_micropc</a>,
<a name="l02169"></a><a class="code" href="classdecoder.html#a4a908459c4181bada964b9269629cfaf">02169</a> <span class="vhdlkeyword">output</span> [<span class="vhdllogic">17</span>:<span class="vhdllogic">0</span>] <a class="code" href="classdecoder.html#a4a908459c4181bada964b9269629cfaf">decoder_alu</a>,
<a name="l02170"></a>02170
<a name="l02171"></a><a class="code" href="classdecoder.html#a28b05d6e340a4705765b60dea6a7582e">02171</a> <span class="vhdlkeyword">output</span> [<span class="vhdllogic">8</span>:<span class="vhdllogic">0</span>] <a class="code" href="classdecoder.html#a28b05d6e340a4705765b60dea6a7582e">save_ea</a>,
<a name="l02172"></a><a class="code" href="classdecoder.html#a01b7528cc9ef96a11a65bc617e3ce8e8">02172</a> <span class="vhdlkeyword">output</span> [<span class="vhdllogic">8</span>:<span class="vhdllogic">0</span>] <a class="code" href="classdecoder.html#a01b7528cc9ef96a11a65bc617e3ce8e8">perform_ea_write</a>,
<a name="l02173"></a><a class="code" href="classdecoder.html#a6c8f1852c27f24f3c5b376224beb327e">02173</a> <span class="vhdlkeyword">output</span> [<span class="vhdllogic">8</span>:<span class="vhdllogic">0</span>] <a class="code" href="classdecoder.html#a6c8f1852c27f24f3c5b376224beb327e">perform_ea_read</a>,
<a name="l02174"></a><a class="code" href="classdecoder.html#a10aa58a48c1be7f355587ca0662adb6f">02174</a> <span class="vhdlkeyword">output</span> [<span class="vhdllogic">8</span>:<span class="vhdllogic">0</span>] <a class="code" href="classdecoder.html#a10aa58a48c1be7f355587ca0662adb6f">load_ea</a>,
<a name="l02175"></a>02175
<a name="l02176"></a><a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">02176</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a>,
<a name="l02177"></a><a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">02177</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">ea_mod</a>,
<a name="l02178"></a><a class="code" href="classdecoder.html#a8658dbe33b5c93ec447d2c4915bf46bb">02178</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classdecoder.html#a8658dbe33b5c93ec447d2c4915bf46bb">ea_reg</a>
<a name="l02179"></a>02179 );
<a name="l02180"></a>02180
<a name="l02181"></a><a class="code" href="classdecoder.html#ab1fdf78d41476f922a501b7e4e0fe24a">02181</a> <span class="vhdlkeyword">parameter</span> [<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>]
<a name="l02182"></a>02182 <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a> = <span class="vhdllogic">8&#39;d0</span>,
<a name="l02183"></a>02183 <a class="code" href="classdecoder.html#af430142beb92570232fc803624ce1b38">ILLEGAL_INSTRUCTION_TRAP</a> = <span class="vhdllogic">8&#39;d4</span>,
<a name="l02184"></a>02184 <a class="code" href="classdecoder.html#a571fc80e2c734a46eadc31db53af37ff">PRIVILEGE_VIOLATION_TRAP</a> = <span class="vhdllogic">8&#39;d8</span>,
<a name="l02185"></a>02185 <a class="code" href="classdecoder.html#a6660b38ffc86f8e9739d5eca392f3e69">ILLEGAL_1010_INSTRUCTION_TRAP</a> = <span class="vhdllogic">8&#39;d10</span>,
<a name="l02186"></a>02186 <a class="code" href="classdecoder.html#ab1fdf78d41476f922a501b7e4e0fe24a">ILLEGAL_1111_INSTRUCTION_TRAP</a> = <span class="vhdllogic">8&#39;d11</span>;
<a name="l02187"></a>02187
<a name="l02188"></a><a class="code" href="classdecoder.html#adfdf73062e947946cd9fa70a18e956c8">02188</a> <span class="vhdlkeyword">parameter</span> [<span class="vhdllogic">8</span>:<span class="vhdllogic">0</span>]
<a name="l02189"></a>02189 <a class="code" href="classdecoder.html#adfdf73062e947946cd9fa70a18e956c8">UNUSED_MICROPC</a> = <span class="vhdllogic">9&#39;d0</span>;
<a name="l02190"></a>02190
<a name="l02191"></a>02191 <span class="vhdlkeyword">assign</span> { <a class="code" href="classdecoder.html#a67eb094220c399c1c40c878b5845e34e">decoder_trap</a>, <a class="code" href="classdecoder.html#af02fcbe55a29581530a9fa1b01348d50">decoder_micropc</a> } =
<a name="l02192"></a>02192 (<a class="code" href="classdecoder.html#abb84ff97c6b5274c476817bf0c89eae5">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="classdecoder.html#adfdf73062e947946cd9fa70a18e956c8">UNUSED_MICROPC</a> } :
<a name="l02193"></a>02193
<a name="l02194"></a>02194 <span class="keyword">// Privilege violation and illegal instruction</span>
<a name="l02195"></a>02195
<a name="l02196"></a>02196 <span class="keyword">// ANDI to SR,EORI to SR,ORI to SR,RESET,STOP,RTE,MOVE TO SR,MOVE USP TO USP,MOVE USP TO An privileged instructions</span>
<a name="l02197"></a>02197 ( ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0000_0010_01_111_100</span> ||
<a name="l02198"></a>02198 <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0000_1010_01_111_100</span> ||
<a name="l02199"></a>02199 <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0000_0000_01_111_100</span> ||
<a name="l02200"></a>02200 <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0100_1110_0111_0000</span> ||
<a name="l02201"></a>02201 <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0100_1110_0111_0010</span> ||
<a name="l02202"></a>02202 <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0100_1110_0111_0011</span> ||
<a name="l02203"></a>02203 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">10&#39;b0100_0110_11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b001</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] != <span class="vhdllogic">6&#39;b111_101</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] != <span class="vhdllogic">6&#39;b111_110</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] != <span class="vhdllogic">6&#39;b111_111</span>) ||
<a name="l02204"></a>02204 <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">13&#39;b0100_1110_0110_0</span> ||
<a name="l02205"></a>02205 <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">13&#39;b0100_1110_0110_1</span> ) &amp;&amp; <a class="code" href="classdecoder.html#a4f8f30358d78d6b6509ecb0a75c8e2e9">supervisor</a> == <span class="vhdllogic">1&#39;b0</span> ) ? { <a class="code" href="classdecoder.html#a571fc80e2c734a46eadc31db53af37ff">PRIVILEGE_VIOLATION_TRAP</a>, <a class="code" href="classdecoder.html#adfdf73062e947946cd9fa70a18e956c8">UNUSED_MICROPC</a> } :
<a name="l02206"></a>02206 <span class="keyword">// ILLEGAL, illegal instruction</span>
<a name="l02207"></a>02207 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0100_1010_11_111100</span> ) ? { <a class="code" href="classdecoder.html#af430142beb92570232fc803624ce1b38">ILLEGAL_INSTRUCTION_TRAP</a>, <a class="code" href="classdecoder.html#adfdf73062e947946cd9fa70a18e956c8">UNUSED_MICROPC</a> } :
<a name="l02208"></a>02208 <span class="keyword">// 1010 illegal instruction</span>
<a name="l02209"></a>02209 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1010</span> ) ? { <a class="code" href="classdecoder.html#a6660b38ffc86f8e9739d5eca392f3e69">ILLEGAL_1010_INSTRUCTION_TRAP</a>, <a class="code" href="classdecoder.html#adfdf73062e947946cd9fa70a18e956c8">UNUSED_MICROPC</a> } :
<a name="l02210"></a>02210 <span class="keyword">// 1111 illegal instruction</span>
<a name="l02211"></a>02211 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1111</span> ) ? { <a class="code" href="classdecoder.html#ab1fdf78d41476f922a501b7e4e0fe24a">ILLEGAL_1111_INSTRUCTION_TRAP</a>, <a class="code" href="classdecoder.html#adfdf73062e947946cd9fa70a18e956c8">UNUSED_MICROPC</a> } :
<a name="l02212"></a>02212
<a name="l02213"></a>02213 <span class="keyword">// instruction decoding</span>
<a name="l02214"></a>02214
<a name="l02215"></a>02215 <span class="keyword">// ANDI,EORI,ORI,ADDI,SUBI</span>
<a name="l02216"></a>02216 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0000</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] != <span class="vhdllogic">3&#39;b100</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] != <span class="vhdllogic">3&#39;b110</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] != <span class="vhdllogic">3&#39;b111</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b0</span> &amp;&amp;
<a name="l02217"></a>02217 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b00</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b01</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b10</span>) &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b001</span> &amp;&amp;
<a name="l02218"></a>02218 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span>)) &amp;&amp;
<a name="l02219"></a>02219 <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] != <span class="vhdllogic">16&#39;b0000_000_0_00_111100</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] != <span class="vhdllogic">16&#39;b0000_000_0_01_111100</span> &amp;&amp;
<a name="l02220"></a>02220 <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] != <span class="vhdllogic">16&#39;b0000_001_0_00_111100</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] != <span class="vhdllogic">16&#39;b0000_001_0_01_111100</span> &amp;&amp;
<a name="l02221"></a>02221 <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] != <span class="vhdllogic">16&#39;b0000_101_0_00_111100</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] != <span class="vhdllogic">16&#39;b0000_101_0_01_111100</span> ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a1508cd79053f2766a7bd8b7932ffdf0c">`MICROPC_ANDI_EORI_ORI_ADDI_SUBI</a><span class="vhdlchar"></span> } :
<a name="l02222"></a>02222 <span class="keyword">// ORI to CCR,ORI to SR,ANDI to CCR,ANDI to SR,EORI to CCR,EORI to SR</span>
<a name="l02223"></a>02223 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0000_000_0_00_111100</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0000_000_0_01_111100</span> ||
<a name="l02224"></a>02224 <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0000_001_0_00_111100</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0000_001_0_01_111100</span> ||
<a name="l02225"></a>02225 <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0000_101_0_00_111100</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0000_101_0_01_111100</span> ) ?
<a name="l02226"></a>02226 { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#af7581a9c9f99af85388e542ad881d71f">`MICROPC_ORI_to_CCR_ORI_to_SR_ANDI_to_CCR_ANDI_to_SR_EORI_to_CCR_EORI_to_SR</a><span class="vhdlchar"></span> } :
<a name="l02227"></a>02227 <span class="keyword">// BTST register</span>
<a name="l02228"></a>02228 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0000</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b100</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b001</span> &amp;&amp;
<a name="l02229"></a>02229 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> ||
<a name="l02230"></a>02230 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_010</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_011</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_100</span>))
<a name="l02231"></a>02231 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#aa2684e7883f516fe90229d1a02585c7c">`MICROPC_BTST_register</a><span class="vhdlchar"></span> } :
<a name="l02232"></a>02232 <span class="keyword">// MOVEP memory to register</span>
<a name="l02233"></a>02233 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0000</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b001</span> &amp;&amp; ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b00</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b01</span> ) ) ?
<a name="l02234"></a>02234 { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a6827fab6e4b333e82a1de52cf6020b7a">`MICROPC_MOVEP_memory_to_register</a><span class="vhdlchar"></span> } :
<a name="l02235"></a>02235 <span class="keyword">// MOVEP register to memory</span>
<a name="l02236"></a>02236 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0000</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b001</span> &amp;&amp; ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b10</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b11</span> ) ) ?
<a name="l02237"></a>02237 { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a2516dd6bb3a4f804a752557b483e077b">`MICROPC_MOVEP_register_to_memory</a><span class="vhdlchar"></span> } :
<a name="l02238"></a>02238 <span class="keyword">// BCHG,BCLR,BSET register</span>
<a name="l02239"></a>02239 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0000</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b001</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">3&#39;b100</span> &amp;&amp;
<a name="l02240"></a>02240 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span>))
<a name="l02241"></a>02241 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a5aff7e16fcd8e2f83c6a684fb62506b3">`MICROPC_BCHG_BCLR_BSET_register</a><span class="vhdlchar"></span> } :
<a name="l02242"></a>02242 <span class="keyword">// BTST immediate</span>
<a name="l02243"></a>02243 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0000</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b1000</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b00</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b001</span> &amp;&amp;
<a name="l02244"></a>02244 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> ||
<a name="l02245"></a>02245 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_010</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_011</span>))
<a name="l02246"></a>02246 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a5ec24a82d3f383ac90da0ad8cc7bb0e3">`MICROPC_BTST_immediate</a><span class="vhdlchar"></span> } :
<a name="l02247"></a>02247 <span class="keyword">// BCHG,BCLR,BSET immediate</span>
<a name="l02248"></a>02248 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0000</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b1000</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b00</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b001</span> &amp;&amp;
<a name="l02249"></a>02249 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span>))
<a name="l02250"></a>02250 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a89a5e8fafa2da702e7c00cb6fe7c2066">`MICROPC_BCHG_BCLR_BSET_immediate</a><span class="vhdlchar"></span> } :
<a name="l02251"></a>02251 <span class="keyword">// CMPI</span>
<a name="l02252"></a>02252 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0000</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b0</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3&#39;b110</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b001</span> &amp;&amp;
<a name="l02253"></a>02253 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span>))
<a name="l02254"></a>02254 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a5027ce5e621b327a8116e4ca0af34e90">`MICROPC_CMPI</a><span class="vhdlchar"></span> } :
<a name="l02255"></a>02255 <span class="keyword">// MOVE</span>
<a name="l02256"></a>02256 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">14</span>] == <span class="vhdllogic">2&#39;b00</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">12</span>] != <span class="vhdllogic">2&#39;b00</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">3&#39;b001</span> &amp;&amp;
<a name="l02257"></a>02257 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">3&#39;b111</span> || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">6&#39;b000_111</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">6&#39;b001_111</span>)) &amp;&amp;
<a name="l02258"></a>02258 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">12</span>] != <span class="vhdllogic">2&#39;b01</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b001</span>) &amp;&amp;
<a name="l02259"></a>02259 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> ||
<a name="l02260"></a>02260 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_010</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_011</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_100</span>))
<a name="l02261"></a>02261 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#afadd69027964ef6d7c9f923ed2714bbe">`MICROPC_MOVE</a><span class="vhdlchar"></span> } :
<a name="l02262"></a>02262 <span class="keyword">// MOVEA</span>
<a name="l02263"></a>02263 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">14</span>] == <span class="vhdllogic">2&#39;b00</span> &amp;&amp; (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">2&#39;b11</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">2&#39;b10</span>) &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b001</span> &amp;&amp;
<a name="l02264"></a>02264 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> ||
<a name="l02265"></a>02265 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_010</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_011</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_100</span>))
<a name="l02266"></a>02266 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a38b3d0769f31c2931ccc92e00af94884">`MICROPC_MOVEA</a><span class="vhdlchar"></span> } :
<a name="l02267"></a>02267 <span class="keyword">// NEGX,CLR,NEG,NOT,NBCD</span>
<a name="l02268"></a>02268 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0100</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b001</span> &amp;&amp; (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span>) &amp;&amp;
<a name="l02269"></a>02269 ( (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0000</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b11</span>) || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0010</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b11</span>) ||
<a name="l02270"></a>02270 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0100</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b11</span>) || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0110</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b11</span>) ||
<a name="l02271"></a>02271 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">6&#39;b1000_00</span>)
<a name="l02272"></a>02272 )
<a name="l02273"></a>02273 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a6f040be4f69b57ba9603d5eae6085425">`MICROPC_NEGX_CLR_NEG_NOT_NBCD</a><span class="vhdlchar"></span> } :
<a name="l02274"></a>02274 <span class="keyword">// MOVE FROM SR</span>
<a name="l02275"></a>02275 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">10&#39;b0100_0000_11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b001</span> &amp;&amp; (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span>)
<a name="l02276"></a>02276 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a9527c313aa58c219b35f23dcfcd52a3a">`MICROPC_MOVE_FROM_SR</a><span class="vhdlchar"></span> } :
<a name="l02277"></a>02277 <span class="keyword">// CHK</span>
<a name="l02278"></a>02278 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0100</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b110</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b001</span> &amp;&amp;
<a name="l02279"></a>02279 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> ||
<a name="l02280"></a>02280 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_010</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_011</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_100</span>))
<a name="l02281"></a>02281 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a09d3064b3da754163f244a861ce4c758">`MICROPC_CHK</a><span class="vhdlchar"></span> } :
<a name="l02282"></a>02282 <span class="keyword">// LEA</span>
<a name="l02283"></a>02283 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0100</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b111</span> &amp;&amp; (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b010</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b101</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b110</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b111</span>) &amp;&amp;
<a name="l02284"></a>02284 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> ||
<a name="l02285"></a>02285 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_010</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_011</span>))
<a name="l02286"></a>02286 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#aced982dae609932df5af323a07349a2b">`MICROPC_LEA</a><span class="vhdlchar"></span> } :
<a name="l02287"></a>02287 <span class="keyword">// MOVE TO CCR, MOVE TO SR</span>
<a name="l02288"></a>02288 ( (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">10&#39;b0100_0100_11</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">10&#39;b0100_0110_11</span>) &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b001</span> &amp;&amp;
<a name="l02289"></a>02289 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> ||
<a name="l02290"></a>02290 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_010</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_011</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_100</span>))
<a name="l02291"></a>02291 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a258ae200cc2cbeccddff03ba18b66a27">`MICROPC_MOVE_TO_CCR_MOVE_TO_SR</a><span class="vhdlchar"></span> } :
<a name="l02292"></a>02292 <span class="keyword">// SWAP,EXT</span>
<a name="l02293"></a>02293 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0100</span> &amp;&amp; (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">9&#39;b1000_01_000</span> || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">7</span>] == <span class="vhdllogic">5&#39;b1000_1</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b000</span>) ) ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a65ca31e571d56e8b7e92ecadd58c94e1">`MICROPC_SWAP_EXT</a><span class="vhdlchar"></span> } :
<a name="l02294"></a>02294 <span class="keyword">// PEA</span>
<a name="l02295"></a>02295 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">10&#39;b0100_1000_01</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b000</span> &amp;&amp; (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b010</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b101</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b110</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b111</span>) &amp;&amp;
<a name="l02296"></a>02296 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> ||
<a name="l02297"></a>02297 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_010</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_011</span>))
<a name="l02298"></a>02298 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a2ce22f23bd95ba0ee7690a059448a357">`MICROPC_PEA</a><span class="vhdlchar"></span> } :
<a name="l02299"></a>02299 <span class="keyword">// MOVEM register to memory, predecrement</span>
<a name="l02300"></a>02300 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">7</span>] == <span class="vhdllogic">9&#39;b0100_1000_1</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b100</span> ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#affd3d4c8fd7cf2cbd78ecd99397f768b">`MICROPC_MOVEM_register_to_memory_predecrement</a><span class="vhdlchar"></span> } :
<a name="l02301"></a>02301 <span class="keyword">// MOVEM register to memory, control</span>
<a name="l02302"></a>02302 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">7</span>] == <span class="vhdllogic">9&#39;b0100_1000_1</span> &amp;&amp; (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b010</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b101</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b110</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b111</span>) &amp;&amp;
<a name="l02303"></a>02303 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span>)
<a name="l02304"></a>02304 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a775df2459596100b0e801ad20c24322b">`MICROPC_MOVEM_register_to_memory_control</a><span class="vhdlchar"></span> } :
<a name="l02305"></a>02305 <span class="keyword">// TST</span>
<a name="l02306"></a>02306 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">8&#39;b0100_1010</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b001</span> &amp;&amp;
<a name="l02307"></a>02307 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span>))
<a name="l02308"></a>02308 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a0c416458c758702471d503b0dbeab5d8">`MICROPC_TST</a><span class="vhdlchar"></span> } :
<a name="l02309"></a>02309 <span class="keyword">// TAS</span>
<a name="l02310"></a>02310 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">10&#39;b0100_1010_11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b001</span> &amp;&amp;
<a name="l02311"></a>02311 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span>))
<a name="l02312"></a>02312 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a9d9308b3732ecf15f57a22600ac300b8">`MICROPC_TAS</a><span class="vhdlchar"></span> } :
<a name="l02313"></a>02313 <span class="keyword">// MOVEM memory to register</span>
<a name="l02314"></a>02314 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">7</span>] == <span class="vhdllogic">9&#39;b0100_1100_1</span> &amp;&amp; (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b010</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b011</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b101</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b110</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b111</span>) &amp;&amp;
<a name="l02315"></a>02315 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> ||
<a name="l02316"></a>02316 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_010</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_011</span>))
<a name="l02317"></a>02317 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#ac2e6ac139e91da76695b3f953c994a0d">`MICROPC_MOVEM_memory_to_register</a><span class="vhdlchar"></span> } :
<a name="l02318"></a>02318 <span class="keyword">// TRAP</span>
<a name="l02319"></a>02319 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">4</span>] == <span class="vhdllogic">12&#39;b0100_1110_0100</span> ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#aa106c5a18e8252dc2ced5ec2f77650d9">`MICROPC_TRAP</a><span class="vhdlchar"></span> } :
<a name="l02320"></a>02320 <span class="keyword">// LINK</span>
<a name="l02321"></a>02321 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">13&#39;b0100_1110_0101_0</span> ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#af1b92ab55a321f316faf654b5d284caf">`MICROPC_LINK</a><span class="vhdlchar"></span> } :
<a name="l02322"></a>02322 <span class="keyword">// UNLK</span>
<a name="l02323"></a>02323 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">13&#39;b0100_1110_0101_1</span> ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a52c9810463f7dc671e021a7217259c04">`MICROPC_ULNK</a><span class="vhdlchar"></span> } :
<a name="l02324"></a>02324 <span class="keyword">// MOVE USP to USP</span>
<a name="l02325"></a>02325 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">13&#39;b0100_1110_0110_0</span> ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a999737a0b112cb8f4691dfc97278bc7e">`MICROPC_MOVE_USP_to_USP</a><span class="vhdlchar"></span> } :
<a name="l02326"></a>02326 <span class="keyword">// MOVE USP to An</span>
<a name="l02327"></a>02327 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">13&#39;b0100_1110_0110_1</span> ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a506e512a7df02654649a4275b676b5f7">`MICROPC_MOVE_USP_to_An</a><span class="vhdlchar"></span> } :
<a name="l02328"></a>02328 <span class="keyword">// RESET</span>
<a name="l02329"></a>02329 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0100_1110_0111_0000</span> ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a7ac5bfe9a8556912db6217142a3bb772">`MICROPC_RESET</a><span class="vhdlchar"></span> } :
<a name="l02330"></a>02330 <span class="keyword">// NOP</span>
<a name="l02331"></a>02331 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0100_1110_0111_0001</span> ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a836e1069d2a67eabcd01a92fcc2672f0">`MICROPC_NOP</a><span class="vhdlchar"></span> } :
<a name="l02332"></a>02332 <span class="keyword">// STOP</span>
<a name="l02333"></a>02333 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0100_1110_0111_0010</span> ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#aa23e89f5c79e7df7ff8ecf19a41ae572">`MICROPC_STOP</a><span class="vhdlchar"></span> } :
<a name="l02334"></a>02334 <span class="keyword">// RTE,RTR</span>
<a name="l02335"></a>02335 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0100_1110_0111_0011</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0100_1110_0111_0111</span> ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a76b52a43dac42903243a54b46c4bd839">`MICROPC_RTE_RTR</a><span class="vhdlchar"></span> } :
<a name="l02336"></a>02336 <span class="keyword">// RTS</span>
<a name="l02337"></a>02337 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0100_1110_0111_0101</span> ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a70b05c3577437ee3a51c6b63859242c5">`MICROPC_RTS</a><span class="vhdlchar"></span> } :
<a name="l02338"></a>02338 <span class="keyword">// TRAPV</span>
<a name="l02339"></a>02339 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0100_1110_0111_0110</span> ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a5038c753fc668ac678fe18251202305e">`MICROPC_TRAPV</a><span class="vhdlchar"></span> } :
<a name="l02340"></a>02340 <span class="keyword">// JSR</span>
<a name="l02341"></a>02341 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">10&#39;b0100_1110_10</span> &amp;&amp; (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b010</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b101</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b110</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b111</span>) &amp;&amp;
<a name="l02342"></a>02342 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> ||
<a name="l02343"></a>02343 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_010</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_011</span>))
<a name="l02344"></a>02344 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a4a79b8f0394c470bd67ba6442fa12395">`MICROPC_JSR</a><span class="vhdlchar"></span> } :
<a name="l02345"></a>02345 <span class="keyword">// JMP</span>
<a name="l02346"></a>02346 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">10&#39;b0100_1110_11</span> &amp;&amp; (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b010</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b101</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b110</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b111</span>) &amp;&amp;
<a name="l02347"></a>02347 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> ||
<a name="l02348"></a>02348 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_010</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_011</span>))
<a name="l02349"></a>02349 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a088577482bc02135d9aa7a58c1d0ed05">`MICROPC_JMP</a><span class="vhdlchar"></span> } :
<a name="l02350"></a>02350 <span class="keyword">// ADDQ,SUBQ not An</span>
<a name="l02351"></a>02351 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0101</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b001</span> &amp;&amp;
<a name="l02352"></a>02352 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span>))
<a name="l02353"></a>02353 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#af6f7102b5f4972ae11cad584ed87de14">`MICROPC_ADDQ_SUBQ_not_An</a><span class="vhdlchar"></span> } :
<a name="l02354"></a>02354 <span class="keyword">// ADDQ,SUBQ An</span>
<a name="l02355"></a>02355 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0101</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b00</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b001</span> ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#ae9cec5ce342a7d51efda687c24f35ab1">`MICROPC_ADDQ_SUBQ_An</a><span class="vhdlchar"></span> } :
<a name="l02356"></a>02356 <span class="keyword">// Scc</span>
<a name="l02357"></a>02357 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0101</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b001</span> &amp;&amp;
<a name="l02358"></a>02358 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span>))
<a name="l02359"></a>02359 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#ac09a1b9ae5783634cc9228354105fc94">`MICROPC_Scc</a><span class="vhdlchar"></span> } :
<a name="l02360"></a>02360 <span class="keyword">// DBcc</span>
<a name="l02361"></a>02361 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0101</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b001</span> ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a3d6a33ee86f4d37516a8afb60957b7ee">`MICROPC_DBcc</a><span class="vhdlchar"></span> } :
<a name="l02362"></a>02362 <span class="keyword">// BSR</span>
<a name="l02363"></a>02363 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0110</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0001</span> ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#afefae415ee468c051f367b74183a122b">`MICROPC_BSR</a><span class="vhdlchar"></span> } :
<a name="l02364"></a>02364 <span class="keyword">// Bcc,BRA</span>
<a name="l02365"></a>02365 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0110</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] != <span class="vhdllogic">4&#39;b0001</span> ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#ae56342916e5e608a0fdd3a01a11688b0">`MICROPC_Bcc_BRA</a><span class="vhdlchar"></span> } :
<a name="l02366"></a>02366 <span class="keyword">// MOVEQ</span>
<a name="l02367"></a>02367 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0111</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b0</span> ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a06f670a9b840bc7dda392686b0b53b41">`MICROPC_MOVEQ</a><span class="vhdlchar"></span> } :
<a name="l02368"></a>02368 <span class="keyword">// CMP</span>
<a name="l02369"></a>02369 ( (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1011</span>) &amp;&amp; (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b001</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b010</span>) &amp;&amp;
<a name="l02370"></a>02370 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">3&#39;b000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b001</span>) &amp;&amp;
<a name="l02371"></a>02371 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> ||
<a name="l02372"></a>02372 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_010</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_011</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_100</span>))
<a name="l02373"></a>02373 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a2d30784cb012710f55727108a9b62cf1">`MICROPC_CMP</a><span class="vhdlchar"></span> } :
<a name="l02374"></a>02374 <span class="keyword">// CMPA</span>
<a name="l02375"></a>02375 ( (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1011</span>) &amp;&amp; (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b011</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b111</span>) &amp;&amp;
<a name="l02376"></a>02376 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> ||
<a name="l02377"></a>02377 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_010</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_011</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_100</span>))
<a name="l02378"></a>02378 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a853a2713ed61bd3e53e70297f62b654d">`MICROPC_CMPA</a><span class="vhdlchar"></span> } :
<a name="l02379"></a>02379 <span class="keyword">// CMPM</span>
<a name="l02380"></a>02380 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1011</span> &amp;&amp; (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b100</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b101</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b110</span>) &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b001</span>) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a118f99a150352cf71a51d13156218674">`MICROPC_CMPM</a><span class="vhdlchar"></span> } :
<a name="l02381"></a>02381 <span class="keyword">// EOR</span>
<a name="l02382"></a>02382 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1011</span> &amp;&amp; (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b100</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b101</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b110</span>) &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b001</span> &amp;&amp;
<a name="l02383"></a>02383 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span>))
<a name="l02384"></a>02384 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#adaa788877b96a4c0cf1c9500aefc505a">`MICROPC_EOR</a><span class="vhdlchar"></span> } :
<a name="l02385"></a>02385 <span class="keyword">// ADD to mem,SUB to mem,AND to mem,OR to mem</span>
<a name="l02386"></a>02386 ( (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1101</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1001</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1100</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1000</span>) &amp;&amp;
<a name="l02387"></a>02387 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">4</span>] == <span class="vhdllogic">5&#39;b10001</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">4</span>] == <span class="vhdllogic">5&#39;b10010</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">4</span>] == <span class="vhdllogic">5&#39;b10011</span> ||
<a name="l02388"></a>02388 <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">4</span>] == <span class="vhdllogic">5&#39;b10101</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">4</span>] == <span class="vhdllogic">5&#39;b10110</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">4</span>] == <span class="vhdllogic">5&#39;b10111</span> ||
<a name="l02389"></a>02389 <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">4</span>] == <span class="vhdllogic">5&#39;b11001</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">4</span>] == <span class="vhdllogic">5&#39;b11010</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">4</span>] == <span class="vhdllogic">5&#39;b11011</span>) &amp;&amp;
<a name="l02390"></a>02390 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span>))
<a name="l02391"></a>02391 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#aa3942210285e132e0151143eca9103b4">`MICROPC_ADD_to_mem_SUB_to_mem_AND_to_mem_OR_to_mem</a><span class="vhdlchar"></span> } :
<a name="l02392"></a>02392 <span class="keyword">// ADD to Dn,SUB to Dn,AND to Dn,OR to Dn</span>
<a name="l02393"></a>02393 ( (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1101</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1001</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1100</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1000</span>) &amp;&amp;
<a name="l02394"></a>02394 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b001</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b010</span>) &amp;&amp;
<a name="l02395"></a>02395 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">12</span>] != <span class="vhdllogic">1&#39;b1</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">3&#39;b000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b001</span>) &amp;&amp; (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">12</span>] == <span class="vhdllogic">1&#39;b1</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b001</span>) &amp;&amp;
<a name="l02396"></a>02396 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> ||
<a name="l02397"></a>02397 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_010</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_011</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_100</span>))
<a name="l02398"></a>02398 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#acdb63549759af21684d2fd6e3dad8eb7">`MICROPC_ADD_to_Dn_SUB_to_Dn_AND_to_Dn_OR_to_Dn</a><span class="vhdlchar"></span> } :
<a name="l02399"></a>02399 <span class="keyword">// ADDA,SUBA</span>
<a name="l02400"></a>02400 ( (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1101</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1001</span>) &amp;&amp; (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b011</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b111</span>) &amp;&amp;
<a name="l02401"></a>02401 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> ||
<a name="l02402"></a>02402 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_010</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_011</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_100</span>))
<a name="l02403"></a>02403 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a02c5cdffb720a762c8790dbc86ab1a18">`MICROPC_ADDA_SUBA</a><span class="vhdlchar"></span> } :
<a name="l02404"></a>02404 <span class="keyword">// ABCD,SBCD,ADDX,SUBX</span>
<a name="l02405"></a>02405 ( ((<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1100</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1000</span>) &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">4</span>] == <span class="vhdllogic">5&#39;b10000</span>) ||
<a name="l02406"></a>02406 ((<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1101</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1001</span>) &amp;&amp; (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">4</span>] == <span class="vhdllogic">5&#39;b10000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">4</span>] == <span class="vhdllogic">5&#39;b10100</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">4</span>] == <span class="vhdllogic">5&#39;b11000</span>) ) ) ?
<a name="l02407"></a>02407 { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a52a25a790c5779d1d9c5d4b807f6e9e6">`MICROPC_ABCD_SBCD_ADDX_SUBX</a><span class="vhdlchar"></span> } :
<a name="l02408"></a>02408 <span class="keyword">// EXG</span>
<a name="l02409"></a>02409 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1100</span> &amp;&amp; (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">6&#39;b101000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">6&#39;b101001</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">6&#39;b110001</span>) ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a5a514be119075b3c3ab64dfa849f3d9c">`MICROPC_EXG</a><span class="vhdlchar"></span> } :
<a name="l02410"></a>02410 <span class="keyword">// MULS,MULU,DIVS,DIVU</span>
<a name="l02411"></a>02411 ( (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1100</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1000</span>) &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b001</span> &amp;&amp;
<a name="l02412"></a>02412 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> ||
<a name="l02413"></a>02413 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_010</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_011</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_100</span>))
<a name="l02414"></a>02414 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#abff7613e058d71dedd233ff63a37a724">`MICROPC_MULS_MULU_DIVS_DIVU</a><span class="vhdlchar"></span> } :
<a name="l02415"></a>02415 <span class="keyword">// ASL,LSL,ROL,ROXL,ASR,LSR,ROR,ROXR all memory</span>
<a name="l02416"></a>02416 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1110</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">11</span>] == <span class="vhdllogic">1&#39;b0</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b000</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b001</span> &amp;&amp;
<a name="l02417"></a>02417 (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b111</span> || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_000</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b111_001</span>))
<a name="l02418"></a>02418 ) ? { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a28f22a27673dd123f2ae53ac00c27c47">`MICROPC_ASL_LSL_ROL_ROXL_ASR_LSR_ROR_ROXR_all_memory</a><span class="vhdlchar"></span> } :
<a name="l02419"></a>02419 <span class="keyword">// ASL,LSL,ROL,ROXL,ASR,LSR,ROR,ROXR all immediate/register</span>
<a name="l02420"></a>02420 ( <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1110</span> &amp;&amp; (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b00</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b01</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b10</span>) ) ?
<a name="l02421"></a>02421 { <a class="code" href="classdecoder.html#a33ca21a2d20f7430201077e25f31c24e">NO_TRAP</a>, <a class="code" href="ao68000_8v.html#a8a505b33f1c42b903dcb264862dda090">`MICROPC_ASL_LSL_ROL_ROXL_ASR_LSR_ROR_ROXR_all_immediate_register</a><span class="vhdlchar"></span> } :
<a name="l02422"></a>02422
<a name="l02423"></a>02423 <span class="keyword">// else</span>
<a name="l02424"></a>02424
<a name="l02425"></a>02425 { <a class="code" href="classdecoder.html#af430142beb92570232fc803624ce1b38">ILLEGAL_INSTRUCTION_TRAP</a>, <a class="code" href="classdecoder.html#adfdf73062e947946cd9fa70a18e956c8">UNUSED_MICROPC</a> }
<a name="l02426"></a>02426 ;
<a name="l02427"></a>02427
<a name="l02428"></a>02428 <span class="keyword">// load ea</span>
<a name="l02429"></a>02429 <span class="vhdlkeyword">assign</span> <a class="code" href="classdecoder.html#a10aa58a48c1be7f355587ca0662adb6f">load_ea</a> =
<a name="l02430"></a>02430 (
<a name="l02431"></a>02431 (<a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a6f693ee79161bffa99f05d9f5b89a2d0">`EA_TYPE_ALL</a><span class="vhdlchar"></span> &amp;&amp; (<a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">ea_mod</a> == <span class="vhdllogic">3&#39;b000</span> || <a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">ea_mod</a> == <span class="vhdllogic">3&#39;b001</span> || (<a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">ea_mod</a> == <span class="vhdllogic">3&#39;b111</span> &amp;&amp; <a class="code" href="classdecoder.html#a8658dbe33b5c93ec447d2c4915bf46bb">ea_reg</a> == <span class="vhdllogic">3&#39;b100</span>))) ||
<a name="l02432"></a>02432 (<a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a17a8a468ddfc3bdb178081a368f4dd6c">`EA_TYPE_DATAALTER</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">ea_mod</a> == <span class="vhdllogic">3&#39;b000</span>) ||
<a name="l02433"></a>02433 (<a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a8e7bc745d4def25f5a995a6955dbdb4b">`EA_TYPE_DN_AN</a><span class="vhdlchar"></span> &amp;&amp; (<a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">ea_mod</a> == <span class="vhdllogic">3&#39;b000</span> || <a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">ea_mod</a> == <span class="vhdllogic">3&#39;b001</span>)) ||
<a name="l02434"></a>02434 (<a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a1b85de8c778c471fdc569b4ef5f3bc60">`EA_TYPE_DATA</a><span class="vhdlchar"></span> &amp;&amp; (<a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">ea_mod</a> == <span class="vhdllogic">3&#39;b000</span> || (<a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">ea_mod</a> == <span class="vhdllogic">3&#39;b111</span> &amp;&amp; <a class="code" href="classdecoder.html#a8658dbe33b5c93ec447d2c4915bf46bb">ea_reg</a> == <span class="vhdllogic">3&#39;b100</span>)))
<a name="l02435"></a>02435 ) ? <span class="vhdllogic">9&#39;d0</span> <span class="keyword">// no ea needed</span>
<a name="l02436"></a>02436 :
<a name="l02437"></a>02437 (<a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">ea_mod</a> == <span class="vhdllogic">3&#39;b010</span> &amp;&amp; (
<a name="l02438"></a>02438 <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a6f693ee79161bffa99f05d9f5b89a2d0">`EA_TYPE_ALL</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a925f0004ba49b82dbdf7c4ae969ba6ed">`EA_TYPE_CONTROL_POSTINC</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a41499eaa1b7aa62f455a07e5435d754a">`EA_TYPE_CONTROLALTER_PREDEC</a><span class="vhdlchar"></span> ||
<a name="l02439"></a>02439 <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#ae2c794f81236993a23138cbf3f7eda44">`EA_TYPE_CONTROL</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a17a8a468ddfc3bdb178081a368f4dd6c">`EA_TYPE_DATAALTER</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a653530f090b85ba7bcd93912b8834412">`EA_TYPE_MEMORYALTER</a><span class="vhdlchar"></span> ||
<a name="l02440"></a>02440 <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a1b85de8c778c471fdc569b4ef5f3bc60">`EA_TYPE_DATA</a><span class="vhdlchar"></span>
<a name="l02441"></a>02441 )) ? <a class="code" href="ao68000_8v.html#a52c9fefea5280f08cf24bac6373252ac">`MICROPC_LOAD_EA_An</a><span class="vhdlchar"></span> <span class="keyword">// (An)</span>
<a name="l02442"></a>02442 :
<a name="l02443"></a>02443 (<a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">ea_mod</a> == <span class="vhdllogic">3&#39;b011</span> &amp;&amp; (
<a name="l02444"></a>02444 <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a6f693ee79161bffa99f05d9f5b89a2d0">`EA_TYPE_ALL</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a925f0004ba49b82dbdf7c4ae969ba6ed">`EA_TYPE_CONTROL_POSTINC</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a653530f090b85ba7bcd93912b8834412">`EA_TYPE_MEMORYALTER</a><span class="vhdlchar"></span> ||
<a name="l02445"></a>02445 <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a17a8a468ddfc3bdb178081a368f4dd6c">`EA_TYPE_DATAALTER</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a1b85de8c778c471fdc569b4ef5f3bc60">`EA_TYPE_DATA</a><span class="vhdlchar"></span>
<a name="l02446"></a>02446 )) ? <a class="code" href="ao68000_8v.html#aafdd46a7740d48b02e781d3136f7ce1d">`MICROPC_LOAD_EA_An_plus</a><span class="vhdlchar"></span> <span class="keyword">// (An)+</span>
<a name="l02447"></a>02447 :
<a name="l02448"></a>02448 (<a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">ea_mod</a> == <span class="vhdllogic">3&#39;b100</span> &amp;&amp; (
<a name="l02449"></a>02449 <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a6f693ee79161bffa99f05d9f5b89a2d0">`EA_TYPE_ALL</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a41499eaa1b7aa62f455a07e5435d754a">`EA_TYPE_CONTROLALTER_PREDEC</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a17a8a468ddfc3bdb178081a368f4dd6c">`EA_TYPE_DATAALTER</a><span class="vhdlchar"></span> ||
<a name="l02450"></a>02450 <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a653530f090b85ba7bcd93912b8834412">`EA_TYPE_MEMORYALTER</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a1b85de8c778c471fdc569b4ef5f3bc60">`EA_TYPE_DATA</a><span class="vhdlchar"></span>
<a name="l02451"></a>02451 )) ? <a class="code" href="ao68000_8v.html#a9b094e5044be3be8167a5b80bd274433">`MICROPC_LOAD_EA_minus_An</a><span class="vhdlchar"></span> <span class="keyword">// -(An)</span>
<a name="l02452"></a>02452 :
<a name="l02453"></a>02453 (<a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">ea_mod</a> == <span class="vhdllogic">3&#39;b101</span> &amp;&amp; (
<a name="l02454"></a>02454 <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a6f693ee79161bffa99f05d9f5b89a2d0">`EA_TYPE_ALL</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a925f0004ba49b82dbdf7c4ae969ba6ed">`EA_TYPE_CONTROL_POSTINC</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a41499eaa1b7aa62f455a07e5435d754a">`EA_TYPE_CONTROLALTER_PREDEC</a><span class="vhdlchar"></span> ||
<a name="l02455"></a>02455 <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#ae2c794f81236993a23138cbf3f7eda44">`EA_TYPE_CONTROL</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a17a8a468ddfc3bdb178081a368f4dd6c">`EA_TYPE_DATAALTER</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a653530f090b85ba7bcd93912b8834412">`EA_TYPE_MEMORYALTER</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a1b85de8c778c471fdc569b4ef5f3bc60">`EA_TYPE_DATA</a><span class="vhdlchar"></span>
<a name="l02456"></a>02456 )) ? <a class="code" href="ao68000_8v.html#a6e06b607b9a1a157e3753943d2b015e1">`MICROPC_LOAD_EA_d16_An</a><span class="vhdlchar"></span> <span class="keyword">// (d16, An)</span>
<a name="l02457"></a>02457 :
<a name="l02458"></a>02458 (<a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">ea_mod</a> == <span class="vhdllogic">3&#39;b110</span> &amp;&amp; (
<a name="l02459"></a>02459 <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a6f693ee79161bffa99f05d9f5b89a2d0">`EA_TYPE_ALL</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a925f0004ba49b82dbdf7c4ae969ba6ed">`EA_TYPE_CONTROL_POSTINC</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a41499eaa1b7aa62f455a07e5435d754a">`EA_TYPE_CONTROLALTER_PREDEC</a><span class="vhdlchar"></span> ||
<a name="l02460"></a>02460 <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#ae2c794f81236993a23138cbf3f7eda44">`EA_TYPE_CONTROL</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a17a8a468ddfc3bdb178081a368f4dd6c">`EA_TYPE_DATAALTER</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a653530f090b85ba7bcd93912b8834412">`EA_TYPE_MEMORYALTER</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a1b85de8c778c471fdc569b4ef5f3bc60">`EA_TYPE_DATA</a><span class="vhdlchar"></span>
<a name="l02461"></a>02461 )) ? <a class="code" href="ao68000_8v.html#aa80bb2f21742a46f59c3b8401c9209a3">`MICROPC_LOAD_EA_d8_An_Xn</a><span class="vhdlchar"></span> <span class="keyword">// (d8, An, Xn)</span>
<a name="l02462"></a>02462 :
<a name="l02463"></a>02463 (<a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">ea_mod</a> == <span class="vhdllogic">3&#39;b111</span> &amp;&amp; <a class="code" href="classdecoder.html#a8658dbe33b5c93ec447d2c4915bf46bb">ea_reg</a> == <span class="vhdllogic">3&#39;b000</span> &amp;&amp; (
<a name="l02464"></a>02464 <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a6f693ee79161bffa99f05d9f5b89a2d0">`EA_TYPE_ALL</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a925f0004ba49b82dbdf7c4ae969ba6ed">`EA_TYPE_CONTROL_POSTINC</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a41499eaa1b7aa62f455a07e5435d754a">`EA_TYPE_CONTROLALTER_PREDEC</a><span class="vhdlchar"></span> ||
<a name="l02465"></a>02465 <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#ae2c794f81236993a23138cbf3f7eda44">`EA_TYPE_CONTROL</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a17a8a468ddfc3bdb178081a368f4dd6c">`EA_TYPE_DATAALTER</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a653530f090b85ba7bcd93912b8834412">`EA_TYPE_MEMORYALTER</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a1b85de8c778c471fdc569b4ef5f3bc60">`EA_TYPE_DATA</a><span class="vhdlchar"></span>
<a name="l02466"></a>02466 )) ? <a class="code" href="ao68000_8v.html#ade20a2ce9d926ed45a0c6e2d4c2bffad">`MICROPC_LOAD_EA_xxx_W</a><span class="vhdlchar"></span> <span class="keyword">// (xxx).W</span>
<a name="l02467"></a>02467 :
<a name="l02468"></a>02468 (<a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">ea_mod</a> == <span class="vhdllogic">3&#39;b111</span> &amp;&amp; <a class="code" href="classdecoder.html#a8658dbe33b5c93ec447d2c4915bf46bb">ea_reg</a> == <span class="vhdllogic">3&#39;b001</span> &amp;&amp; (
<a name="l02469"></a>02469 <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a6f693ee79161bffa99f05d9f5b89a2d0">`EA_TYPE_ALL</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a925f0004ba49b82dbdf7c4ae969ba6ed">`EA_TYPE_CONTROL_POSTINC</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a41499eaa1b7aa62f455a07e5435d754a">`EA_TYPE_CONTROLALTER_PREDEC</a><span class="vhdlchar"></span> ||
<a name="l02470"></a>02470 <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#ae2c794f81236993a23138cbf3f7eda44">`EA_TYPE_CONTROL</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a17a8a468ddfc3bdb178081a368f4dd6c">`EA_TYPE_DATAALTER</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a653530f090b85ba7bcd93912b8834412">`EA_TYPE_MEMORYALTER</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a1b85de8c778c471fdc569b4ef5f3bc60">`EA_TYPE_DATA</a><span class="vhdlchar"></span>
<a name="l02471"></a>02471 )) ? <a class="code" href="ao68000_8v.html#ac3601da82892ec91bbc958628eb6ed03">`MICROPC_LOAD_EA_xxx_L</a><span class="vhdlchar"></span> <span class="keyword">// (xxx).L</span>
<a name="l02472"></a>02472 :
<a name="l02473"></a>02473 (<a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">ea_mod</a> == <span class="vhdllogic">3&#39;b111</span> &amp;&amp; <a class="code" href="classdecoder.html#a8658dbe33b5c93ec447d2c4915bf46bb">ea_reg</a> == <span class="vhdllogic">3&#39;b010</span> &amp;&amp; (
<a name="l02474"></a>02474 <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a6f693ee79161bffa99f05d9f5b89a2d0">`EA_TYPE_ALL</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a925f0004ba49b82dbdf7c4ae969ba6ed">`EA_TYPE_CONTROL_POSTINC</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#ae2c794f81236993a23138cbf3f7eda44">`EA_TYPE_CONTROL</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a1b85de8c778c471fdc569b4ef5f3bc60">`EA_TYPE_DATA</a><span class="vhdlchar"></span>
<a name="l02475"></a>02475 )) ? <a class="code" href="ao68000_8v.html#a7cb86509757fa3419fbc8980724bd315">`MICROPC_LOAD_EA_d16_PC</a><span class="vhdlchar"></span> <span class="keyword">// (d16, PC)</span>
<a name="l02476"></a>02476 :
<a name="l02477"></a>02477 (<a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">ea_mod</a> == <span class="vhdllogic">3&#39;b111</span> &amp;&amp; <a class="code" href="classdecoder.html#a8658dbe33b5c93ec447d2c4915bf46bb">ea_reg</a> == <span class="vhdllogic">3&#39;b011</span> &amp;&amp; (
<a name="l02478"></a>02478 <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a6f693ee79161bffa99f05d9f5b89a2d0">`EA_TYPE_ALL</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a925f0004ba49b82dbdf7c4ae969ba6ed">`EA_TYPE_CONTROL_POSTINC</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#ae2c794f81236993a23138cbf3f7eda44">`EA_TYPE_CONTROL</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a1b85de8c778c471fdc569b4ef5f3bc60">`EA_TYPE_DATA</a><span class="vhdlchar"></span>
<a name="l02479"></a>02479 )) ? <a class="code" href="ao68000_8v.html#a785fdbd62d5c0da122ada9db07753b74">`MICROPC_LOAD_EA_d8_PC_Xn</a><span class="vhdlchar"></span> <span class="keyword">// (d8, PC, Xn)</span>
<a name="l02480"></a>02480 :
<a name="l02481"></a>02481 <a class="code" href="ao68000_8v.html#a92f21025346f2b9baad5ee3ea27c8833">`MICROPC_LOAD_EA_illegal_command</a><span class="vhdlchar"></span> <span class="keyword">// illegal command</span>
<a name="l02482"></a>02482 ;
<a name="l02483"></a>02483
<a name="l02484"></a>02484 <span class="keyword">// perform ea read</span>
<a name="l02485"></a>02485 <span class="vhdlkeyword">assign</span> <a class="code" href="classdecoder.html#a6c8f1852c27f24f3c5b376224beb327e">perform_ea_read</a> =
<a name="l02486"></a>02486 ( <a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">ea_mod</a> == <span class="vhdllogic">3&#39;b000</span> &amp;&amp; (<a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a6f693ee79161bffa99f05d9f5b89a2d0">`EA_TYPE_ALL</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a17a8a468ddfc3bdb178081a368f4dd6c">`EA_TYPE_DATAALTER</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a8e7bc745d4def25f5a995a6955dbdb4b">`EA_TYPE_DN_AN</a><span class="vhdlchar"></span> ||
<a name="l02487"></a>02487 <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a1b85de8c778c471fdc569b4ef5f3bc60">`EA_TYPE_DATA</a><span class="vhdlchar"></span>) ) ?
<a name="l02488"></a>02488 <a class="code" href="ao68000_8v.html#ae21eb6fc6455af78326135e407ee17eb">`MICROPC_PERFORM_EA_READ_Dn</a><span class="vhdlchar"></span> :
<a name="l02489"></a>02489 ( <a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">ea_mod</a> == <span class="vhdllogic">3&#39;b001</span> &amp;&amp; (<a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a6f693ee79161bffa99f05d9f5b89a2d0">`EA_TYPE_ALL</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a8e7bc745d4def25f5a995a6955dbdb4b">`EA_TYPE_DN_AN</a><span class="vhdlchar"></span>) ) ? <a class="code" href="ao68000_8v.html#a8d6dcbc97994c642a8da0be0fecc257a">`MICROPC_PERFORM_EA_READ_An</a><span class="vhdlchar"></span> :
<a name="l02490"></a>02490 ( <a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">ea_mod</a> == <span class="vhdllogic">3&#39;b111</span> &amp;&amp; <a class="code" href="classdecoder.html#a8658dbe33b5c93ec447d2c4915bf46bb">ea_reg</a> == <span class="vhdllogic">3&#39;b100</span> &amp;&amp; (<a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a6f693ee79161bffa99f05d9f5b89a2d0">`EA_TYPE_ALL</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a1b85de8c778c471fdc569b4ef5f3bc60">`EA_TYPE_DATA</a><span class="vhdlchar"></span>) ) ?
<a name="l02491"></a>02491 <a class="code" href="ao68000_8v.html#ac2394d0cf1bffca610b4c8fb77881207">`MICROPC_PERFORM_EA_READ_imm</a><span class="vhdlchar"></span> :
<a name="l02492"></a>02492 <a class="code" href="ao68000_8v.html#a2c70544d287306914c57f360847a1abd">`MICROPC_PERFORM_EA_READ_memory</a><span class="vhdlchar"></span>
<a name="l02493"></a>02493 ;
<a name="l02494"></a>02494
<a name="l02495"></a>02495 <span class="keyword">// perform ea write</span>
<a name="l02496"></a>02496 <span class="vhdlkeyword">assign</span> <a class="code" href="classdecoder.html#a01b7528cc9ef96a11a65bc617e3ce8e8">perform_ea_write</a> =
<a name="l02497"></a>02497 ( <a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">ea_mod</a> == <span class="vhdllogic">3&#39;b000</span> &amp;&amp; (<a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a6f693ee79161bffa99f05d9f5b89a2d0">`EA_TYPE_ALL</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a17a8a468ddfc3bdb178081a368f4dd6c">`EA_TYPE_DATAALTER</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a8e7bc745d4def25f5a995a6955dbdb4b">`EA_TYPE_DN_AN</a><span class="vhdlchar"></span> ||
<a name="l02498"></a>02498 <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a1b85de8c778c471fdc569b4ef5f3bc60">`EA_TYPE_DATA</a><span class="vhdlchar"></span>) ) ?
<a name="l02499"></a>02499 <a class="code" href="ao68000_8v.html#acb05778c30ee2acc522c18f823a678ff">`MICROPC_PERFORM_EA_WRITE_Dn</a><span class="vhdlchar"></span> :
<a name="l02500"></a>02500 ( <a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">ea_mod</a> == <span class="vhdllogic">3&#39;b001</span> &amp;&amp; (<a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a6f693ee79161bffa99f05d9f5b89a2d0">`EA_TYPE_ALL</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a8e7bc745d4def25f5a995a6955dbdb4b">`EA_TYPE_DN_AN</a><span class="vhdlchar"></span>) ) ? <a class="code" href="ao68000_8v.html#a20c5aa2df0d23f8bbdaccfca2bfed9f8">`MICROPC_PERFORM_EA_WRITE_An</a><span class="vhdlchar"></span> :
<a name="l02501"></a>02501 <a class="code" href="ao68000_8v.html#ab8383cdb4a1df6d5f3296bb4244c7bab">`MICROPC_PERFORM_EA_WRITE_memory</a><span class="vhdlchar"></span>
<a name="l02502"></a>02502 ;
<a name="l02503"></a>02503
<a name="l02504"></a>02504 <span class="keyword">// save ea</span>
<a name="l02505"></a>02505 <span class="vhdlkeyword">assign</span> <a class="code" href="classdecoder.html#a28b05d6e340a4705765b60dea6a7582e">save_ea</a> =
<a name="l02506"></a>02506 (<a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">ea_mod</a> == <span class="vhdllogic">3&#39;b011</span> &amp;&amp; (
<a name="l02507"></a>02507 <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a6f693ee79161bffa99f05d9f5b89a2d0">`EA_TYPE_ALL</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a925f0004ba49b82dbdf7c4ae969ba6ed">`EA_TYPE_CONTROL_POSTINC</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a653530f090b85ba7bcd93912b8834412">`EA_TYPE_MEMORYALTER</a><span class="vhdlchar"></span> ||
<a name="l02508"></a>02508 <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a17a8a468ddfc3bdb178081a368f4dd6c">`EA_TYPE_DATAALTER</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a1b85de8c778c471fdc569b4ef5f3bc60">`EA_TYPE_DATA</a><span class="vhdlchar"></span>
<a name="l02509"></a>02509 )) ? <a class="code" href="ao68000_8v.html#a02dc58bcc0412d6c93647a1304f20443">`MICROPC_SAVE_EA_An_plus</a><span class="vhdlchar"></span> <span class="keyword">// (An)+</span>
<a name="l02510"></a>02510 :
<a name="l02511"></a>02511 (<a class="code" href="classdecoder.html#acee089d4bff7671b954beee0516ed1eb">ea_mod</a> == <span class="vhdllogic">3&#39;b100</span> &amp;&amp; (
<a name="l02512"></a>02512 <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a6f693ee79161bffa99f05d9f5b89a2d0">`EA_TYPE_ALL</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a41499eaa1b7aa62f455a07e5435d754a">`EA_TYPE_CONTROLALTER_PREDEC</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a17a8a468ddfc3bdb178081a368f4dd6c">`EA_TYPE_DATAALTER</a><span class="vhdlchar"></span> ||
<a name="l02513"></a>02513 <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a653530f090b85ba7bcd93912b8834412">`EA_TYPE_MEMORYALTER</a><span class="vhdlchar"></span> || <a class="code" href="classdecoder.html#a1606e8406845c12b82cb9e34260337bb">ea_type</a> == <a class="code" href="ao68000_8v.html#a1b85de8c778c471fdc569b4ef5f3bc60">`EA_TYPE_DATA</a><span class="vhdlchar"></span>
<a name="l02514"></a>02514 )) ? <a class="code" href="ao68000_8v.html#ae4c00f630c944a41db777f7b51ee052d">`MICROPC_SAVE_EA_minus_An</a><span class="vhdlchar"></span> <span class="keyword">// -(An)</span>
<a name="l02515"></a>02515 :
<a name="l02516"></a>02516 <span class="vhdllogic">9&#39;d0</span> <span class="keyword">// no ea needed</span>
<a name="l02517"></a>02517 ;
<a name="l02518"></a>02518
<a name="l02519"></a>02519 <span class="keyword">// ALU decoding optimization</span>
<a name="l02520"></a>02520 <span class="keyword">// Thanks to Frederic Requin</span>
<a name="l02521"></a>02521 <span class="keyword">// not used: 7, 13, 17</span>
<a name="l02522"></a>02522 <span class="vhdlkeyword">assign</span> <a class="code" href="classdecoder.html#a4a908459c4181bada964b9269629cfaf">decoder_alu</a>[<span class="vhdllogic">0</span>] = ((<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0000</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3&#39;b000</span>) <span class="keyword">// OR</span>
<a name="l02523"></a>02523 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1000</span>));
<a name="l02524"></a>02524 <span class="vhdlkeyword">assign</span> <a class="code" href="classdecoder.html#a4a908459c4181bada964b9269629cfaf">decoder_alu</a>[<span class="vhdllogic">1</span>] = ((<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0000</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3&#39;b001</span>) <span class="keyword">// AND</span>
<a name="l02525"></a>02525 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1100</span>));
<a name="l02526"></a>02526 <span class="vhdlkeyword">assign</span> <a class="code" href="classdecoder.html#a4a908459c4181bada964b9269629cfaf">decoder_alu</a>[<span class="vhdllogic">2</span>] = ((<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0000</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3&#39;b101</span>) <span class="keyword">// EOR</span>
<a name="l02527"></a>02527 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1011</span> &amp;&amp; (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">7</span>] == <span class="vhdllogic">2&#39;b10</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b110</span>) &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b001</span>));
<a name="l02528"></a>02528 <span class="vhdlkeyword">assign</span> <a class="code" href="classdecoder.html#a4a908459c4181bada964b9269629cfaf">decoder_alu</a>[<span class="vhdllogic">3</span>] = ((<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0000</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3&#39;b011</span>) <span class="keyword">// ADD</span>
<a name="l02529"></a>02529 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1101</span>)
<a name="l02530"></a>02530 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0101</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b0</span>));
<a name="l02531"></a>02531 <span class="vhdlkeyword">assign</span> <a class="code" href="classdecoder.html#a4a908459c4181bada964b9269629cfaf">decoder_alu</a>[<span class="vhdllogic">4</span>] = ((<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0000</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3&#39;b010</span>) <span class="keyword">// SUB</span>
<a name="l02532"></a>02532 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1001</span>)
<a name="l02533"></a>02533 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0101</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b1</span>));
<a name="l02534"></a>02534 <span class="vhdlkeyword">assign</span> <a class="code" href="classdecoder.html#a4a908459c4181bada964b9269629cfaf">decoder_alu</a>[<span class="vhdllogic">5</span>] = ((<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0000</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3&#39;b110</span>) <span class="keyword">// CMP</span>
<a name="l02535"></a>02535 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1011</span> &amp;&amp; (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">7</span>] == <span class="vhdllogic">2&#39;b10</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b110</span>) &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b001</span>)
<a name="l02536"></a>02536 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1011</span> &amp;&amp; (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">7</span>] == <span class="vhdllogic">2&#39;b00</span> || <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">3&#39;b010</span>)));
<a name="l02537"></a>02537 <span class="vhdlkeyword">assign</span> <a class="code" href="classdecoder.html#a4a908459c4181bada964b9269629cfaf">decoder_alu</a>[<span class="vhdllogic">6</span>] = ((<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1101</span>) <span class="keyword">// ADDA,ADDQ</span>
<a name="l02538"></a>02538 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0101</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b0</span>));
<a name="l02539"></a>02539 <span class="vhdlkeyword">assign</span> <a class="code" href="classdecoder.html#a4a908459c4181bada964b9269629cfaf">decoder_alu</a>[<span class="vhdllogic">7</span>] = ((<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1001</span>) <span class="keyword">// SUBA,CMPA,SUBQ</span>
<a name="l02540"></a>02540 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1011</span>)
<a name="l02541"></a>02541 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b0101</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b1</span>));
<a name="l02542"></a>02542 <span class="vhdlkeyword">assign</span> <a class="code" href="classdecoder.html#a4a908459c4181bada964b9269629cfaf">decoder_alu</a>[<span class="vhdllogic">8</span>] = (((<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">2&#39;b00</span>) <span class="keyword">// ASL</span>
<a name="l02543"></a>02543 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">2&#39;b00</span>)) &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b1</span>);
<a name="l02544"></a>02544 <span class="vhdlkeyword">assign</span> <a class="code" href="classdecoder.html#a4a908459c4181bada964b9269629cfaf">decoder_alu</a>[<span class="vhdllogic">9</span>] = (((<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">2&#39;b01</span>) <span class="keyword">// LSL</span>
<a name="l02545"></a>02545 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">2&#39;b01</span>)) &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b1</span>);
<a name="l02546"></a>02546 <span class="vhdlkeyword">assign</span> <a class="code" href="classdecoder.html#a4a908459c4181bada964b9269629cfaf">decoder_alu</a>[<span class="vhdllogic">10</span>] = (((<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">2&#39;b11</span>) <span class="keyword">// ROL</span>
<a name="l02547"></a>02547 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">2&#39;b11</span>)) &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b1</span>);
<a name="l02548"></a>02548 <span class="vhdlkeyword">assign</span> <a class="code" href="classdecoder.html#a4a908459c4181bada964b9269629cfaf">decoder_alu</a>[<span class="vhdllogic">11</span>] = (((<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">2&#39;b10</span>) <span class="keyword">// ROXL</span>
<a name="l02549"></a>02549 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">2&#39;b10</span>)) &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b1</span>);
<a name="l02550"></a>02550 <span class="vhdlkeyword">assign</span> <a class="code" href="classdecoder.html#a4a908459c4181bada964b9269629cfaf">decoder_alu</a>[<span class="vhdllogic">12</span>] = (((<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">2&#39;b00</span>) <span class="keyword">// ASR</span>
<a name="l02551"></a>02551 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">2&#39;b00</span>)) &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b0</span>);
<a name="l02552"></a>02552 <span class="vhdlkeyword">assign</span> <a class="code" href="classdecoder.html#a4a908459c4181bada964b9269629cfaf">decoder_alu</a>[<span class="vhdllogic">13</span>] = (((<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">2&#39;b01</span>) <span class="keyword">// LSR</span>
<a name="l02553"></a>02553 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">2&#39;b01</span>)) &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b0</span>);
<a name="l02554"></a>02554 <span class="vhdlkeyword">assign</span> <a class="code" href="classdecoder.html#a4a908459c4181bada964b9269629cfaf">decoder_alu</a>[<span class="vhdllogic">14</span>] = (((<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">2&#39;b11</span>) <span class="keyword">// ROR</span>
<a name="l02555"></a>02555 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">2&#39;b11</span>)) &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b0</span>);
<a name="l02556"></a>02556 <span class="vhdlkeyword">assign</span> <a class="code" href="classdecoder.html#a4a908459c4181bada964b9269629cfaf">decoder_alu</a>[<span class="vhdllogic">15</span>] = (((<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">2&#39;b10</span>) <span class="keyword">// ROXR</span>
<a name="l02557"></a>02557 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">2&#39;b10</span>)) &amp;&amp; <a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b0</span>);
<a name="l02558"></a>02558 <span class="vhdlkeyword">assign</span> <a class="code" href="classdecoder.html#a4a908459c4181bada964b9269629cfaf">decoder_alu</a>[<span class="vhdllogic">16</span>] = ((<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">8&#39;b0100_0110</span>) <span class="keyword">// SR operations</span>
<a name="l02559"></a>02559 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0100_1110_0111_0011</span>)
<a name="l02560"></a>02560 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0100_1110_0111_0010</span>)
<a name="l02561"></a>02561 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0000_000_0_01_111100</span>)
<a name="l02562"></a>02562 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0000_001_0_01_111100</span>)
<a name="l02563"></a>02563 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0000_101_0_01_111100</span>));
<a name="l02564"></a>02564 <span class="vhdlkeyword">assign</span> <a class="code" href="classdecoder.html#a4a908459c4181bada964b9269629cfaf">decoder_alu</a>[<span class="vhdllogic">17</span>] = ((<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">8&#39;b0100_0100</span>) <span class="keyword">// CCR operations</span>
<a name="l02565"></a>02565 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0100_1110_0111_0111</span>)
<a name="l02566"></a>02566 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0000_000_0_00_111100</span>)
<a name="l02567"></a>02567 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0000_001_0_00_111100</span>)
<a name="l02568"></a>02568 || (<a class="code" href="classdecoder.html#af7617a66ecea2639bbe626dae6dbf5b2">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0000_101_0_00_111100</span>));
<a name="l02569"></a>02569
<a name="l02570"></a>02570 <span class="vhdlkeyword">endmodule</span>
<a name="l02571"></a>02571
<a name="l02572"></a>02572 <span class="keyword">/***********************************************************************************************************************</span>
<a name="l02573"></a>02573 <span class="keyword"> Condition</span>
<a name="l02574"></a>02574 <span class="keyword"> ***********************************************************************************************************************/</span>
<a name="l02575"></a>02575
<a name="l02581"></a><a class="code" href="classcondition.html">02581</a> <span class="vhdlkeyword">module</span> <a class="code" href="classcondition.html">condition</a>(
<a name="l02582"></a><a class="code" href="classcondition.html#a9e86aa998ac1784273cb0b9cf352b460">02582</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] <a class="code" href="classcondition.html#a9e86aa998ac1784273cb0b9cf352b460">cond</a>,
<a name="l02583"></a><a class="code" href="classcondition.html#a52494b869243a84786b9862f7d1d8d9e">02583</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] <a class="code" href="classcondition.html#a52494b869243a84786b9862f7d1d8d9e">ccr</a>,
<a name="l02584"></a><a class="code" href="classcondition.html#a8547fef6becb7230f00dcf4c12c30178">02584</a> <span class="vhdlkeyword">output</span> <a class="code" href="classcondition.html#a8547fef6becb7230f00dcf4c12c30178">condition</a>
<a name="l02585"></a>02585 );
<a name="l02586"></a>02586
<a name="l02587"></a><a class="code" href="classcondition.html#ae570132e269d0326e6677e4c0920e4d6">02587</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classcondition.html#a2006a6c2b33299d31589aba25659dd80">C</a>,<a class="code" href="classcondition.html#affcc7f40c9baded7a8565c9ed7d8e80e">V</a>,<a class="code" href="classcondition.html#a15ddb47120c217921adde375050fe345">Z</a>,<a class="code" href="classcondition.html#ae570132e269d0326e6677e4c0920e4d6">N</a>;
<a name="l02588"></a>02588 <span class="vhdlkeyword">assign</span> <a class="code" href="classcondition.html#a2006a6c2b33299d31589aba25659dd80">C</a> = <a class="code" href="classcondition.html#a52494b869243a84786b9862f7d1d8d9e">ccr</a>[<span class="vhdllogic">0</span>];
<a name="l02589"></a>02589 <span class="vhdlkeyword">assign</span> <a class="code" href="classcondition.html#affcc7f40c9baded7a8565c9ed7d8e80e">V</a> = <a class="code" href="classcondition.html#a52494b869243a84786b9862f7d1d8d9e">ccr</a>[<span class="vhdllogic">1</span>];
<a name="l02590"></a>02590 <span class="vhdlkeyword">assign</span> <a class="code" href="classcondition.html#a15ddb47120c217921adde375050fe345">Z</a> = <a class="code" href="classcondition.html#a52494b869243a84786b9862f7d1d8d9e">ccr</a>[<span class="vhdllogic">2</span>];
<a name="l02591"></a>02591 <span class="vhdlkeyword">assign</span> <a class="code" href="classcondition.html#ae570132e269d0326e6677e4c0920e4d6">N</a> = <a class="code" href="classcondition.html#a52494b869243a84786b9862f7d1d8d9e">ccr</a>[<span class="vhdllogic">3</span>];
<a name="l02592"></a>02592
<a name="l02593"></a>02593 <span class="vhdlkeyword">assign</span> <a class="code" href="classcondition.html#a8547fef6becb7230f00dcf4c12c30178">condition</a> = (<a class="code" href="classcondition.html#a9e86aa998ac1784273cb0b9cf352b460">cond</a> == <span class="vhdllogic">4&#39;b0000</span>) ? <span class="vhdllogic">1&#39;b1</span> : <span class="keyword">// true</span>
<a name="l02594"></a>02594 (<a class="code" href="classcondition.html#a9e86aa998ac1784273cb0b9cf352b460">cond</a> == <span class="vhdllogic">4&#39;b0001</span>) ? <span class="vhdllogic">1&#39;b0</span> : <span class="keyword">// false</span>
<a name="l02595"></a>02595 (<a class="code" href="classcondition.html#a9e86aa998ac1784273cb0b9cf352b460">cond</a> == <span class="vhdllogic">4&#39;b0010</span>) ? ~<a class="code" href="classcondition.html#a2006a6c2b33299d31589aba25659dd80">C</a> &amp; ~<a class="code" href="classcondition.html#a15ddb47120c217921adde375050fe345">Z</a> : <span class="keyword">// high</span>
<a name="l02596"></a>02596 (<a class="code" href="classcondition.html#a9e86aa998ac1784273cb0b9cf352b460">cond</a> == <span class="vhdllogic">4&#39;b0011</span>) ? <a class="code" href="classcondition.html#a2006a6c2b33299d31589aba25659dd80">C</a> | <a class="code" href="classcondition.html#a15ddb47120c217921adde375050fe345">Z</a> : <span class="keyword">// low or same</span>
<a name="l02597"></a>02597 (<a class="code" href="classcondition.html#a9e86aa998ac1784273cb0b9cf352b460">cond</a> == <span class="vhdllogic">4&#39;b0100</span>) ? ~<a class="code" href="classcondition.html#a2006a6c2b33299d31589aba25659dd80">C</a> : <span class="keyword">// carry clear</span>
<a name="l02598"></a>02598 (<a class="code" href="classcondition.html#a9e86aa998ac1784273cb0b9cf352b460">cond</a> == <span class="vhdllogic">4&#39;b0101</span>) ? <a class="code" href="classcondition.html#a2006a6c2b33299d31589aba25659dd80">C</a> : <span class="keyword">// carry set</span>
<a name="l02599"></a>02599 (<a class="code" href="classcondition.html#a9e86aa998ac1784273cb0b9cf352b460">cond</a> == <span class="vhdllogic">4&#39;b0110</span>) ? ~<a class="code" href="classcondition.html#a15ddb47120c217921adde375050fe345">Z</a> : <span class="keyword">// not equal</span>
<a name="l02600"></a>02600 (<a class="code" href="classcondition.html#a9e86aa998ac1784273cb0b9cf352b460">cond</a> == <span class="vhdllogic">4&#39;b0111</span>) ? <a class="code" href="classcondition.html#a15ddb47120c217921adde375050fe345">Z</a> : <span class="keyword">// equal</span>
<a name="l02601"></a>02601 (<a class="code" href="classcondition.html#a9e86aa998ac1784273cb0b9cf352b460">cond</a> == <span class="vhdllogic">4&#39;b1000</span>) ? ~<a class="code" href="classcondition.html#affcc7f40c9baded7a8565c9ed7d8e80e">V</a> : <span class="keyword">// overflow clear</span>
<a name="l02602"></a>02602 (<a class="code" href="classcondition.html#a9e86aa998ac1784273cb0b9cf352b460">cond</a> == <span class="vhdllogic">4&#39;b1001</span>) ? <a class="code" href="classcondition.html#affcc7f40c9baded7a8565c9ed7d8e80e">V</a> : <span class="keyword">// overflow set</span>
<a name="l02603"></a>02603 (<a class="code" href="classcondition.html#a9e86aa998ac1784273cb0b9cf352b460">cond</a> == <span class="vhdllogic">4&#39;b1010</span>) ? ~<a class="code" href="classcondition.html#ae570132e269d0326e6677e4c0920e4d6">N</a> : <span class="keyword">// plus</span>
<a name="l02604"></a>02604 (<a class="code" href="classcondition.html#a9e86aa998ac1784273cb0b9cf352b460">cond</a> == <span class="vhdllogic">4&#39;b1011</span>) ? <a class="code" href="classcondition.html#ae570132e269d0326e6677e4c0920e4d6">N</a> : <span class="keyword">// minus</span>
<a name="l02605"></a>02605 (<a class="code" href="classcondition.html#a9e86aa998ac1784273cb0b9cf352b460">cond</a> == <span class="vhdllogic">4&#39;b1100</span>) ? (<a class="code" href="classcondition.html#ae570132e269d0326e6677e4c0920e4d6">N</a> &amp; <a class="code" href="classcondition.html#affcc7f40c9baded7a8565c9ed7d8e80e">V</a>) | (~<a class="code" href="classcondition.html#ae570132e269d0326e6677e4c0920e4d6">N</a> &amp; ~<a class="code" href="classcondition.html#affcc7f40c9baded7a8565c9ed7d8e80e">V</a>) : <span class="keyword">// greater or equal</span>
<a name="l02606"></a>02606 (<a class="code" href="classcondition.html#a9e86aa998ac1784273cb0b9cf352b460">cond</a> == <span class="vhdllogic">4&#39;b1101</span>) ? (<a class="code" href="classcondition.html#ae570132e269d0326e6677e4c0920e4d6">N</a> &amp; ~<a class="code" href="classcondition.html#affcc7f40c9baded7a8565c9ed7d8e80e">V</a>) | (~<a class="code" href="classcondition.html#ae570132e269d0326e6677e4c0920e4d6">N</a> &amp; <a class="code" href="classcondition.html#affcc7f40c9baded7a8565c9ed7d8e80e">V</a>) : <span class="keyword">// less than</span>
<a name="l02607"></a>02607 (<a class="code" href="classcondition.html#a9e86aa998ac1784273cb0b9cf352b460">cond</a> == <span class="vhdllogic">4&#39;b1110</span>) ? (<a class="code" href="classcondition.html#ae570132e269d0326e6677e4c0920e4d6">N</a> &amp; <a class="code" href="classcondition.html#affcc7f40c9baded7a8565c9ed7d8e80e">V</a> &amp; ~<a class="code" href="classcondition.html#a15ddb47120c217921adde375050fe345">Z</a>) | (~<a class="code" href="classcondition.html#ae570132e269d0326e6677e4c0920e4d6">N</a> &amp; ~<a class="code" href="classcondition.html#affcc7f40c9baded7a8565c9ed7d8e80e">V</a> &amp; ~<a class="code" href="classcondition.html#a15ddb47120c217921adde375050fe345">Z</a>) : <span class="keyword">// greater than</span>
<a name="l02608"></a>02608 (<a class="code" href="classcondition.html#a9e86aa998ac1784273cb0b9cf352b460">cond</a> == <span class="vhdllogic">4&#39;b1111</span>) ? (<a class="code" href="classcondition.html#a15ddb47120c217921adde375050fe345">Z</a>) | (<a class="code" href="classcondition.html#ae570132e269d0326e6677e4c0920e4d6">N</a> &amp; ~<a class="code" href="classcondition.html#affcc7f40c9baded7a8565c9ed7d8e80e">V</a>) | (~<a class="code" href="classcondition.html#ae570132e269d0326e6677e4c0920e4d6">N</a> &amp; <a class="code" href="classcondition.html#affcc7f40c9baded7a8565c9ed7d8e80e">V</a>) : <span class="keyword">// less or equal</span>
<a name="l02609"></a>02609 <span class="vhdllogic">1&#39;b0</span>;
<a name="l02610"></a>02610 <span class="vhdlkeyword">endmodule</span>
<a name="l02611"></a>02611
<a name="l02612"></a>02612 <span class="keyword">/***********************************************************************************************************************</span>
<a name="l02613"></a>02613 <span class="keyword"> ALU</span>
<a name="l02614"></a>02614 <span class="keyword"> ***********************************************************************************************************************/</span>
<a name="l02615"></a>02615
<a name="l02576"></a>02576
<a name="l02582"></a><a class="code" href="classcondition.html">02582</a> <span class="vhdlkeyword">module</span> <a class="code" href="classcondition.html">condition</a>(
<a name="l02583"></a><a class="code" href="classcondition.html#a9e86aa998ac1784273cb0b9cf352b460">02583</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] <a class="code" href="classcondition.html#a9e86aa998ac1784273cb0b9cf352b460">cond</a>,
<a name="l02584"></a><a class="code" href="classcondition.html#a52494b869243a84786b9862f7d1d8d9e">02584</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] <a class="code" href="classcondition.html#a52494b869243a84786b9862f7d1d8d9e">ccr</a>,
<a name="l02585"></a><a class="code" href="classcondition.html#a8547fef6becb7230f00dcf4c12c30178">02585</a> <span class="vhdlkeyword">output</span> <a class="code" href="classcondition.html#a8547fef6becb7230f00dcf4c12c30178">condition</a>
<a name="l02586"></a>02586 );
<a name="l02587"></a>02587
<a name="l02588"></a><a class="code" href="classcondition.html#ae570132e269d0326e6677e4c0920e4d6">02588</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classcondition.html#a2006a6c2b33299d31589aba25659dd80">C</a>,<a class="code" href="classcondition.html#affcc7f40c9baded7a8565c9ed7d8e80e">V</a>,<a class="code" href="classcondition.html#a15ddb47120c217921adde375050fe345">Z</a>,<a class="code" href="classcondition.html#ae570132e269d0326e6677e4c0920e4d6">N</a>;
<a name="l02589"></a>02589 <span class="vhdlkeyword">assign</span> <a class="code" href="classcondition.html#a2006a6c2b33299d31589aba25659dd80">C</a> = <a class="code" href="classcondition.html#a52494b869243a84786b9862f7d1d8d9e">ccr</a>[<span class="vhdllogic">0</span>];
<a name="l02590"></a>02590 <span class="vhdlkeyword">assign</span> <a class="code" href="classcondition.html#affcc7f40c9baded7a8565c9ed7d8e80e">V</a> = <a class="code" href="classcondition.html#a52494b869243a84786b9862f7d1d8d9e">ccr</a>[<span class="vhdllogic">1</span>];
<a name="l02591"></a>02591 <span class="vhdlkeyword">assign</span> <a class="code" href="classcondition.html#a15ddb47120c217921adde375050fe345">Z</a> = <a class="code" href="classcondition.html#a52494b869243a84786b9862f7d1d8d9e">ccr</a>[<span class="vhdllogic">2</span>];
<a name="l02592"></a>02592 <span class="vhdlkeyword">assign</span> <a class="code" href="classcondition.html#ae570132e269d0326e6677e4c0920e4d6">N</a> = <a class="code" href="classcondition.html#a52494b869243a84786b9862f7d1d8d9e">ccr</a>[<span class="vhdllogic">3</span>];
<a name="l02593"></a>02593
<a name="l02594"></a>02594 <span class="vhdlkeyword">assign</span> <a class="code" href="classcondition.html#a8547fef6becb7230f00dcf4c12c30178">condition</a> = (<a class="code" href="classcondition.html#a9e86aa998ac1784273cb0b9cf352b460">cond</a> == <span class="vhdllogic">4&#39;b0000</span>) ? <span class="vhdllogic">1&#39;b1</span> : <span class="keyword">// true</span>
<a name="l02595"></a>02595 (<a class="code" href="classcondition.html#a9e86aa998ac1784273cb0b9cf352b460">cond</a> == <span class="vhdllogic">4&#39;b0001</span>) ? <span class="vhdllogic">1&#39;b0</span> : <span class="keyword">// false</span>
<a name="l02596"></a>02596 (<a class="code" href="classcondition.html#a9e86aa998ac1784273cb0b9cf352b460">cond</a> == <span class="vhdllogic">4&#39;b0010</span>) ? ~<a class="code" href="classcondition.html#a2006a6c2b33299d31589aba25659dd80">C</a> &amp; ~<a class="code" href="classcondition.html#a15ddb47120c217921adde375050fe345">Z</a> : <span class="keyword">// high</span>
<a name="l02597"></a>02597 (<a class="code" href="classcondition.html#a9e86aa998ac1784273cb0b9cf352b460">cond</a> == <span class="vhdllogic">4&#39;b0011</span>) ? <a class="code" href="classcondition.html#a2006a6c2b33299d31589aba25659dd80">C</a> | <a class="code" href="classcondition.html#a15ddb47120c217921adde375050fe345">Z</a> : <span class="keyword">// low or same</span>
<a name="l02598"></a>02598 (<a class="code" href="classcondition.html#a9e86aa998ac1784273cb0b9cf352b460">cond</a> == <span class="vhdllogic">4&#39;b0100</span>) ? ~<a class="code" href="classcondition.html#a2006a6c2b33299d31589aba25659dd80">C</a> : <span class="keyword">// carry clear</span>
<a name="l02599"></a>02599 (<a class="code" href="classcondition.html#a9e86aa998ac1784273cb0b9cf352b460">cond</a> == <span class="vhdllogic">4&#39;b0101</span>) ? <a class="code" href="classcondition.html#a2006a6c2b33299d31589aba25659dd80">C</a> : <span class="keyword">// carry set</span>
<a name="l02600"></a>02600 (<a class="code" href="classcondition.html#a9e86aa998ac1784273cb0b9cf352b460">cond</a> == <span class="vhdllogic">4&#39;b0110</span>) ? ~<a class="code" href="classcondition.html#a15ddb47120c217921adde375050fe345">Z</a> : <span class="keyword">// not equal</span>
<a name="l02601"></a>02601 (<a class="code" href="classcondition.html#a9e86aa998ac1784273cb0b9cf352b460">cond</a> == <span class="vhdllogic">4&#39;b0111</span>) ? <a class="code" href="classcondition.html#a15ddb47120c217921adde375050fe345">Z</a> : <span class="keyword">// equal</span>
<a name="l02602"></a>02602 (<a class="code" href="classcondition.html#a9e86aa998ac1784273cb0b9cf352b460">cond</a> == <span class="vhdllogic">4&#39;b1000</span>) ? ~<a class="code" href="classcondition.html#affcc7f40c9baded7a8565c9ed7d8e80e">V</a> : <span class="keyword">// overflow clear</span>
<a name="l02603"></a>02603 (<a class="code" href="classcondition.html#a9e86aa998ac1784273cb0b9cf352b460">cond</a> == <span class="vhdllogic">4&#39;b1001</span>) ? <a class="code" href="classcondition.html#affcc7f40c9baded7a8565c9ed7d8e80e">V</a> : <span class="keyword">// overflow set</span>
<a name="l02604"></a>02604 (<a class="code" href="classcondition.html#a9e86aa998ac1784273cb0b9cf352b460">cond</a> == <span class="vhdllogic">4&#39;b1010</span>) ? ~<a class="code" href="classcondition.html#ae570132e269d0326e6677e4c0920e4d6">N</a> : <span class="keyword">// plus</span>
<a name="l02605"></a>02605 (<a class="code" href="classcondition.html#a9e86aa998ac1784273cb0b9cf352b460">cond</a> == <span class="vhdllogic">4&#39;b1011</span>) ? <a class="code" href="classcondition.html#ae570132e269d0326e6677e4c0920e4d6">N</a> : <span class="keyword">// minus</span>
<a name="l02606"></a>02606 (<a class="code" href="classcondition.html#a9e86aa998ac1784273cb0b9cf352b460">cond</a> == <span class="vhdllogic">4&#39;b1100</span>) ? (<a class="code" href="classcondition.html#ae570132e269d0326e6677e4c0920e4d6">N</a> &amp; <a class="code" href="classcondition.html#affcc7f40c9baded7a8565c9ed7d8e80e">V</a>) | (~<a class="code" href="classcondition.html#ae570132e269d0326e6677e4c0920e4d6">N</a> &amp; ~<a class="code" href="classcondition.html#affcc7f40c9baded7a8565c9ed7d8e80e">V</a>) : <span class="keyword">// greater or equal</span>
<a name="l02607"></a>02607 (<a class="code" href="classcondition.html#a9e86aa998ac1784273cb0b9cf352b460">cond</a> == <span class="vhdllogic">4&#39;b1101</span>) ? (<a class="code" href="classcondition.html#ae570132e269d0326e6677e4c0920e4d6">N</a> &amp; ~<a class="code" href="classcondition.html#affcc7f40c9baded7a8565c9ed7d8e80e">V</a>) | (~<a class="code" href="classcondition.html#ae570132e269d0326e6677e4c0920e4d6">N</a> &amp; <a class="code" href="classcondition.html#affcc7f40c9baded7a8565c9ed7d8e80e">V</a>) : <span class="keyword">// less than</span>
<a name="l02608"></a>02608 (<a class="code" href="classcondition.html#a9e86aa998ac1784273cb0b9cf352b460">cond</a> == <span class="vhdllogic">4&#39;b1110</span>) ? (<a class="code" href="classcondition.html#ae570132e269d0326e6677e4c0920e4d6">N</a> &amp; <a class="code" href="classcondition.html#affcc7f40c9baded7a8565c9ed7d8e80e">V</a> &amp; ~<a class="code" href="classcondition.html#a15ddb47120c217921adde375050fe345">Z</a>) | (~<a class="code" href="classcondition.html#ae570132e269d0326e6677e4c0920e4d6">N</a> &amp; ~<a class="code" href="classcondition.html#affcc7f40c9baded7a8565c9ed7d8e80e">V</a> &amp; ~<a class="code" href="classcondition.html#a15ddb47120c217921adde375050fe345">Z</a>) : <span class="keyword">// greater than</span>
<a name="l02609"></a>02609 (<a class="code" href="classcondition.html#a9e86aa998ac1784273cb0b9cf352b460">cond</a> == <span class="vhdllogic">4&#39;b1111</span>) ? (<a class="code" href="classcondition.html#a15ddb47120c217921adde375050fe345">Z</a>) | (<a class="code" href="classcondition.html#ae570132e269d0326e6677e4c0920e4d6">N</a> &amp; ~<a class="code" href="classcondition.html#affcc7f40c9baded7a8565c9ed7d8e80e">V</a>) | (~<a class="code" href="classcondition.html#ae570132e269d0326e6677e4c0920e4d6">N</a> &amp; <a class="code" href="classcondition.html#affcc7f40c9baded7a8565c9ed7d8e80e">V</a>) : <span class="keyword">// less or equal</span>
<a name="l02610"></a>02610 <span class="vhdllogic">1&#39;b0</span>;
<a name="l02611"></a>02611 <span class="vhdlkeyword">endmodule</span>
<a name="l02612"></a>02612
<a name="l02613"></a>02613 <span class="keyword">/***********************************************************************************************************************</span>
<a name="l02614"></a>02614 <span class="keyword"> ALU</span>
<a name="l02615"></a>02615 <span class="keyword"> ***********************************************************************************************************************/</span>
<a name="l02616"></a>02616
<a name="l02625"></a><a class="code" href="classalu.html">02625</a> <span class="vhdlkeyword">module</span> <a class="code" href="classalu.html">alu</a>(
<a name="l02626"></a><a class="code" href="classalu.html#a322325f3e53ea8e7d70fbdc7f5d1b30b">02626</a> <span class="vhdlkeyword">input</span> <a class="code" href="classalu.html#a322325f3e53ea8e7d70fbdc7f5d1b30b">clock</a>,
<a name="l02627"></a><a class="code" href="classalu.html#a2f01d99d4de620b6ce6c7c0a150a5fab">02627</a> <span class="vhdlkeyword">input</span> <a class="code" href="classalu.html#a2f01d99d4de620b6ce6c7c0a150a5fab">reset_n</a>,
<a name="l02628"></a>02628
<a name="l02629"></a>02629 <span class="keyword">// only zero bit</span>
<a name="l02630"></a><a class="code" href="classalu.html#a5a9e1012e0cf7d30a4a4dcaf5486693c">02630</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classalu.html#a5a9e1012e0cf7d30a4a4dcaf5486693c">address</a>,
<a name="l02631"></a>02631 <span class="keyword">// only ir[11:9] and ir[6]</span>
<a name="l02632"></a><a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">02632</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>,
<a name="l02633"></a>02633 <span class="keyword">// byte 2&#39;b00, word 2&#39;b01, long 2&#39;b10</span>
<a name="l02634"></a><a class="code" href="classalu.html#a46ed8f8b6e397f2f7a0998fe482d4f37">02634</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classalu.html#a46ed8f8b6e397f2f7a0998fe482d4f37">size</a>,
<a name="l02635"></a>02635
<a name="l02636"></a><a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">02636</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>,
<a name="l02637"></a><a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">02637</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>,
<a name="l02638"></a>02638
<a name="l02639"></a><a class="code" href="classalu.html#ab8bac09f28bae473ebf96e3c2c7e2806">02639</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classalu.html#ab8bac09f28bae473ebf96e3c2c7e2806">interrupt_mask</a>,
<a name="l02640"></a><a class="code" href="classalu.html#abd96864c4534e2905f0ac629d1bcfce1">02640</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">4</span>:<span class="vhdllogic">0</span>] <a class="code" href="classalu.html#abd96864c4534e2905f0ac629d1bcfce1">alu_control</a>,
<a name="l02641"></a>02641
<a name="l02642"></a><a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">02642</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>,
<a name="l02643"></a><a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">02643</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>,
<a name="l02644"></a>02644
<a name="l02645"></a><a class="code" href="classalu.html#ad39d03bb22df22560c4f5dc796382313">02645</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> <a class="code" href="classalu.html#ad39d03bb22df22560c4f5dc796382313">alu_signal</a>,
<a name="l02646"></a><a class="code" href="classalu.html#ac76782f488b9491569955793b9b37762">02646</a> <span class="vhdlkeyword">output</span> <a class="code" href="classalu.html#ac76782f488b9491569955793b9b37762">alu_mult_div_ready</a>,
<a name="l02647"></a><a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">02647</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">17</span>:<span class="vhdllogic">0</span>] <a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>
<a name="l02648"></a>02648 );
<a name="l02649"></a>02649
<a name="l02650"></a>02650 <span class="keyword">//****************************************************** Altera-specific multiplication and division modules START</span>
<a name="l02651"></a>02651 <span class="keyword">/* Multiplication and division modules.</span>
<a name="l02652"></a>02652 <span class="keyword"> </span>
<a name="l02653"></a>02653 <span class="keyword"> Currently this module contains:</span>
<a name="l02654"></a>02654 <span class="keyword"> - &lt;em&gt;lpm_mult&lt;/em&gt; instantiation from Altera Megafunction/LPM library,</span>
<a name="l02655"></a>02655 <span class="keyword"> - a sequential state machine for division written by Frederic Requin</span>
<a name="l02656"></a>02656 <span class="keyword"> */</span>
<a name="l02657"></a>02657
<a name="l02658"></a><a class="code" href="classalu.html#a25ae8f83a524b562fb57cd0af6dee164">02658</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classalu.html#a25ae8f83a524b562fb57cd0af6dee164">mult_div_sign</a> = <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">8</span>];
<a name="l02659"></a>02659
<a name="l02660"></a>02660 <span class="keyword">// 18-2 - division calculation, 1 - waiting for result read, 0 - idle</span>
<a name="l02661"></a><a class="code" href="classalu.html#a3a2dd2d9816dba2aebe4a5cf5eeed521">02661</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">4</span>:<span class="vhdllogic">0</span>] <a class="code" href="classalu.html#a3a2dd2d9816dba2aebe4a5cf5eeed521">div_count</a>;
<a name="l02662"></a><a class="code" href="classalu.html#ac5f88cdff8f17d02e28927335c6f141d">02662</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">16</span>:<span class="vhdllogic">0</span>] <a class="code" href="classalu.html#ac5f88cdff8f17d02e28927335c6f141d">quotient</a>;
<a name="l02663"></a><a class="code" href="classalu.html#ab4e5d750cf0d96eb715606c6166945cb">02663</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classalu.html#a108916b9974c024932e1e9874589c4ba">dividend</a>, <a class="code" href="classalu.html#ab4e5d750cf0d96eb715606c6166945cb">divider</a>;
<a name="l02664"></a>02664
<a name="l02665"></a>02665 <span class="keyword">// Compute the difference with borrow</span>
<a name="l02666"></a><a class="code" href="classalu.html#a2fc8379eb8a0ee027596e29d34c0fbc7">02666</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">32</span>:<span class="vhdllogic">0</span>] <a class="code" href="classalu.html#a2fc8379eb8a0ee027596e29d34c0fbc7">div_diff</a> = (<a class="code" href="classalu.html#a108916b9974c024932e1e9874589c4ba">dividend</a> - <a class="code" href="classalu.html#ab4e5d750cf0d96eb715606c6166945cb">divider</a>);
<a name="l02667"></a>02667
<a name="l02668"></a>02668 <span class="keyword">// Overflow flag: when (quotient &gt;= 65536) or (signed division and (quotient &gt;= 32768 or quotient &lt; -32768))</span>
<a name="l02669"></a><a class="code" href="classalu.html#abad1e1ed5e810e1a31e16550349b6bfb">02669</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classalu.html#abad1e1ed5e810e1a31e16550349b6bfb">div_overflow</a> =
<a name="l02670"></a>02670 (<a class="code" href="classalu.html#ac5f88cdff8f17d02e28927335c6f141d">quotient</a>[<span class="vhdllogic">16</span>] == <span class="vhdllogic">1&#39;b1</span> ||
<a name="l02671"></a>02671 (<a class="code" href="classalu.html#a25ae8f83a524b562fb57cd0af6dee164">mult_div_sign</a> == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; (
<a name="l02672"></a>02672 ((<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>] ^ <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">15</span>]) == <span class="vhdllogic">1&#39;b0</span> &amp;&amp; <a class="code" href="classalu.html#ac5f88cdff8f17d02e28927335c6f141d">quotient</a>[<span class="vhdllogic">15</span>] == <span class="vhdllogic">1&#39;b1</span>) ||
<a name="l02673"></a>02673 ((<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>] ^ <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">15</span>]) == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <a class="code" href="classalu.html#ac5f88cdff8f17d02e28927335c6f141d">quotient</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] &gt; <span class="vhdllogic">16&#39;d32768</span>) )));
<a name="l02674"></a>02674
<a name="l02675"></a><a class="code" href="classalu.html#a66f6b0eb96212740619af0f057d33546">02675</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] <a class="code" href="classalu.html#a66f6b0eb96212740619af0f057d33546">div_quotient</a> =
<a name="l02676"></a>02676 <span class="keyword">// positive quotient</span>
<a name="l02677"></a>02677 (((<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>] ^ <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">15</span>]) &amp; <a class="code" href="classalu.html#a25ae8f83a524b562fb57cd0af6dee164">mult_div_sign</a>) == <span class="vhdllogic">1&#39;b0</span>)? <a class="code" href="classalu.html#ac5f88cdff8f17d02e28927335c6f141d">quotient</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] :
<a name="l02678"></a>02678 <span class="keyword">// negative quotient</span>
<a name="l02679"></a>02679 -<a class="code" href="classalu.html#ac5f88cdff8f17d02e28927335c6f141d">quotient</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>];
<a name="l02680"></a>02680
<a name="l02681"></a><a class="code" href="classalu.html#a3b4ed364cf9180375a05991a64005ea7">02681</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] <a class="code" href="classalu.html#a3b4ed364cf9180375a05991a64005ea7">div_remainder</a> =
<a name="l02682"></a>02682 <span class="keyword">// positive remainder</span>
<a name="l02683"></a>02683 ((<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>] &amp; <a class="code" href="classalu.html#a25ae8f83a524b562fb57cd0af6dee164">mult_div_sign</a>) == <span class="vhdllogic">1&#39;b0</span>)? <a class="code" href="classalu.html#a108916b9974c024932e1e9874589c4ba">dividend</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] :
<a name="l02684"></a>02684 <span class="keyword">// negative remainder</span>
<a name="l02685"></a>02685 -<a class="code" href="classalu.html#a108916b9974c024932e1e9874589c4ba">dividend</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>];
<a name="l02686"></a>02686
<a name="l02687"></a><a class="code" href="classalu.html#a04b10dc82e8a06c3856bfd16a7e18d06">02687</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classalu.html#a322325f3e53ea8e7d70fbdc7f5d1b30b">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classalu.html#a2f01d99d4de620b6ce6c7c0a150a5fab">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l02688"></a>02688 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a2f01d99d4de620b6ce6c7c0a150a5fab">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>
<a name="l02689"></a>02689 <a class="code" href="classalu.html#a3a2dd2d9816dba2aebe4a5cf5eeed521">div_count</a> &lt;= <span class="vhdllogic">5&#39;d0</span>;
<a name="l02690"></a>02690 <span class="vhdlkeyword">end</span>
<a name="l02691"></a>02691 <span class="keyword">// Cycle #0 : load the registers</span>
<a name="l02692"></a>02692 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#abd96864c4534e2905f0ac629d1bcfce1">alu_control</a> == <a class="code" href="ao68000_8v.html#aed07d190bb88f0cce7768028698020f9">`ALU_MULS_MULU_DIVS_DIVU</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1000</span> &amp;&amp; <a class="code" href="classalu.html#a3a2dd2d9816dba2aebe4a5cf5eeed521">div_count</a> == <span class="vhdllogic">5&#39;d0</span>) <span class="vhdlkeyword">begin</span>
<a name="l02693"></a>02693 <span class="keyword">// 17 cycles to finish + wait state</span>
<a name="l02694"></a>02694 <a class="code" href="classalu.html#a3a2dd2d9816dba2aebe4a5cf5eeed521">div_count</a> &lt;= <span class="vhdllogic">5&#39;d18</span>;
<a name="l02695"></a>02695 <span class="keyword">// Clear the quotient</span>
<a name="l02696"></a>02696 <a class="code" href="classalu.html#ac5f88cdff8f17d02e28927335c6f141d">quotient</a> &lt;= <span class="vhdllogic">17&#39;d0</span>;
<a name="l02697"></a>02697
<a name="l02698"></a>02698 <span class="keyword">// Unsigned divide or positive numerator</span>
<a name="l02699"></a>02699 <span class="vhdlkeyword">if</span> ((!<a class="code" href="classalu.html#a25ae8f83a524b562fb57cd0af6dee164">mult_div_sign</a>) || (!<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>])) <a class="code" href="classalu.html#a108916b9974c024932e1e9874589c4ba">dividend</a> &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>;
<a name="l02700"></a>02700 <span class="keyword">// Negative numerator</span>
<a name="l02701"></a>02701 <span class="vhdlkeyword">else</span> <a class="code" href="classalu.html#a108916b9974c024932e1e9874589c4ba">dividend</a> &lt;= -<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>;
<a name="l02702"></a>02702
<a name="l02703"></a>02703 <span class="keyword">// Unsigned divide or positive denominator</span>
<a name="l02704"></a>02704 <span class="vhdlkeyword">if</span> ((!<a class="code" href="classalu.html#a25ae8f83a524b562fb57cd0af6dee164">mult_div_sign</a>) || (!<a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">15</span>])) <a class="code" href="classalu.html#ab4e5d750cf0d96eb715606c6166945cb">divider</a> &lt;= {<a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>],<span class="vhdllogic">16&#39;d0</span>};
<a name="l02705"></a>02705 <span class="keyword">// Negative denominator</span>
<a name="l02706"></a>02706 <span class="vhdlkeyword">else</span> <a class="code" href="classalu.html#ab4e5d750cf0d96eb715606c6166945cb">divider</a> &lt;= {-<a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>],<span class="vhdllogic">16&#39;d0</span>};
<a name="l02707"></a>02707 <span class="vhdlkeyword">end</span>
<a name="l02708"></a>02708 <span class="keyword">// Cycles #1-17 : division calculation</span>
<a name="l02709"></a>02709 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a3a2dd2d9816dba2aebe4a5cf5eeed521">div_count</a> &gt; <span class="vhdllogic">5&#39;d1</span>) <span class="vhdlkeyword">begin</span>
<a name="l02710"></a>02710 <span class="keyword">// Check difference&#39;s sign</span>
<a name="l02711"></a>02711 <span class="vhdlkeyword">if</span> (!<a class="code" href="classalu.html#a2fc8379eb8a0ee027596e29d34c0fbc7">div_diff</a>[<span class="vhdllogic">32</span>]) <span class="vhdlkeyword">begin</span>
<a name="l02712"></a>02712 <span class="keyword">// Difference is positive : shift a one</span>
<a name="l02713"></a>02713 <a class="code" href="classalu.html#a108916b9974c024932e1e9874589c4ba">dividend</a> &lt;= <a class="code" href="classalu.html#a2fc8379eb8a0ee027596e29d34c0fbc7">div_diff</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l02714"></a>02714 <a class="code" href="classalu.html#ac5f88cdff8f17d02e28927335c6f141d">quotient</a> &lt;= {<a class="code" href="classalu.html#ac5f88cdff8f17d02e28927335c6f141d">quotient</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">1&#39;b1</span>};
<a name="l02715"></a>02715 <span class="vhdlkeyword">end</span>
<a name="l02716"></a>02716 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l02717"></a>02717 <span class="keyword">// Difference is negative : shift a zero</span>
<a name="l02718"></a>02718 <a class="code" href="classalu.html#ac5f88cdff8f17d02e28927335c6f141d">quotient</a> &lt;= {<a class="code" href="classalu.html#ac5f88cdff8f17d02e28927335c6f141d">quotient</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">1&#39;b0</span>};
<a name="l02719"></a>02719 <span class="vhdlkeyword">end</span>
<a name="l02720"></a>02720 <span class="keyword">// Shift right divider</span>
<a name="l02721"></a>02721 <a class="code" href="classalu.html#ab4e5d750cf0d96eb715606c6166945cb">divider</a> &lt;= {<span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#ab4e5d750cf0d96eb715606c6166945cb">divider</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">1</span>]};
<a name="l02722"></a>02722 <span class="keyword">// Count one bit</span>
<a name="l02723"></a>02723 <a class="code" href="classalu.html#a3a2dd2d9816dba2aebe4a5cf5eeed521">div_count</a> &lt;= <a class="code" href="classalu.html#a3a2dd2d9816dba2aebe4a5cf5eeed521">div_count</a> - <span class="vhdllogic">5&#39;d1</span>;
<a name="l02724"></a>02724 <span class="vhdlkeyword">end</span>
<a name="l02725"></a>02725 <span class="keyword">// result read</span>
<a name="l02726"></a>02726 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#abd96864c4534e2905f0ac629d1bcfce1">alu_control</a> == <a class="code" href="ao68000_8v.html#aed07d190bb88f0cce7768028698020f9">`ALU_MULS_MULU_DIVS_DIVU</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1000</span> &amp;&amp; <a class="code" href="classalu.html#a3a2dd2d9816dba2aebe4a5cf5eeed521">div_count</a> == <span class="vhdllogic">5&#39;d1</span>) <span class="vhdlkeyword">begin</span>
<a name="l02727"></a>02727 <span class="keyword">// goto idle</span>
<a name="l02728"></a>02728 <a class="code" href="classalu.html#a3a2dd2d9816dba2aebe4a5cf5eeed521">div_count</a> &lt;= <a class="code" href="classalu.html#a3a2dd2d9816dba2aebe4a5cf5eeed521">div_count</a> - <span class="vhdllogic">5&#39;d1</span>;
<a name="l02729"></a>02729 <span class="vhdlkeyword">end</span>
<a name="l02730"></a>02730 <span class="vhdlkeyword">end</span>
<a name="l02731"></a>02731
<a name="l02732"></a>02732 <span class="keyword">// MULS/MULU: 16-bit operand1[15:0] signed/unsigned * operand2[15:0] signed/unsigned = 32-bit result signed/unsigned</span>
<a name="l02733"></a>02733 <span class="keyword">// Optimization by Frederic Requin</span>
<a name="l02734"></a><a class="code" href="classalu.html#ac1b8a2e6c2bb6a12b10db4250f56135e">02734</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">33</span>:<span class="vhdllogic">0</span>] <a class="code" href="classalu.html#ac1b8a2e6c2bb6a12b10db4250f56135e">mult_result</a>;
<a name="l02735"></a>02735
<a name="l02736"></a><a class="code" href="classalu.html#a6447478386a93e0306b7cb09937c23c3">02736</a> <a class="code" href="classalu.html#a6447478386a93e0306b7cb09937c23c3">lpm_mult</a> <span class="vhdlchar">muls</span>(
<a name="l02737"></a>02737 .<a class="code" href="classalu.html#a322325f3e53ea8e7d70fbdc7f5d1b30b">clock</a> (<a class="code" href="classalu.html#a322325f3e53ea8e7d70fbdc7f5d1b30b">clock</a>),
<a name="l02738"></a>02738 .<span class="vhdlchar">dataa</span> ({<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">15</span>] &amp; <a class="code" href="classalu.html#a25ae8f83a524b562fb57cd0af6dee164">mult_div_sign</a>, <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>]}),
<a name="l02739"></a>02739 .<span class="vhdlchar">datab</span> ({<a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">15</span>] &amp; <a class="code" href="classalu.html#a25ae8f83a524b562fb57cd0af6dee164">mult_div_sign</a>, <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>]}),
<a name="l02740"></a>02740 .<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> (<a class="code" href="classalu.html#ac1b8a2e6c2bb6a12b10db4250f56135e">mult_result</a>)
<a name="l02741"></a>02741 );
<a name="l02742"></a>02742 <span class="vhdlkeyword">defparam</span>
<a name="l02743"></a>02743 <span class="vhdlchar">muls</span>.<span class="vhdlchar">lpm_widtha</span> = <span class="vhdllogic">17</span>,
<a name="l02744"></a>02744 <span class="vhdlchar">muls</span>.<span class="vhdlchar">lpm_widthb</span> = <span class="vhdllogic">17</span>,
<a name="l02745"></a>02745 <span class="vhdlchar">muls</span>.<span class="vhdlchar">lpm_widthp</span> = <span class="vhdllogic">34</span>,
<a name="l02746"></a>02746 <span class="vhdlchar">muls</span>.<span class="vhdlchar">lpm_representation</span> = <span class="keyword">&quot;SIGNED&quot;</span>,
<a name="l02747"></a>02747 <span class="vhdlchar">muls</span>.<span class="vhdlchar">lpm_pipeline</span> = <span class="vhdllogic">1</span>;
<a name="l02748"></a>02748
<a name="l02749"></a>02749 <span class="keyword">// multiplication ready in one cycle, division ready when div_count in waiting or idle state</span>
<a name="l02750"></a>02750 <span class="vhdlkeyword">assign</span> <a class="code" href="classalu.html#ac76782f488b9491569955793b9b37762">alu_mult_div_ready</a> = (<a class="code" href="classalu.html#a3a2dd2d9816dba2aebe4a5cf5eeed521">div_count</a> == <span class="vhdllogic">5&#39;d1</span> || <a class="code" href="classalu.html#a3a2dd2d9816dba2aebe4a5cf5eeed521">div_count</a> == <span class="vhdllogic">5&#39;d0</span>);
<a name="l02751"></a>02751
<a name="l02752"></a>02752 <span class="keyword">//****************************************************** Altera-specific multiplication and division modules END</span>
<a name="l02753"></a>02753
<a name="l02754"></a>02754 <span class="keyword">// ALU internal defines</span>
<a name="l02755"></a><a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">02755</a> <span class="preprocessor">`define</span> <a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">Sm</a> ((<a class="code" href="classalu.html#a46ed8f8b6e397f2f7a0998fe482d4f37">size</a>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) ? operand2[<span class="vhdllogic">7</span>] : (<a class="code" href="classalu.html#a46ed8f8b6e397f2f7a0998fe482d4f37">size</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span>) ? operand2[<span class="vhdllogic">15</span>] : <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">31</span>])
<a name="l02756"></a>02756
<a name="l02757"></a><a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">02757</a> <span class="preprocessor">`define</span> <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">Dm</a> ((<a class="code" href="classalu.html#a46ed8f8b6e397f2f7a0998fe482d4f37">size</a>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) ? operand1[<span class="vhdllogic">7</span>] : (<a class="code" href="classalu.html#a46ed8f8b6e397f2f7a0998fe482d4f37">size</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span>) ? operand1[<span class="vhdllogic">15</span>] : <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>])
<a name="l02758"></a>02758
<a name="l02759"></a><a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">02759</a> <span class="preprocessor">`define</span> <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">Rm</a> ((<a class="code" href="classalu.html#a46ed8f8b6e397f2f7a0998fe482d4f37">size</a>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) ? result[<span class="vhdllogic">7</span>] : (<a class="code" href="classalu.html#a46ed8f8b6e397f2f7a0998fe482d4f37">size</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span>) ? result[<span class="vhdllogic">15</span>] : <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>])
<a name="l02760"></a>02760
<a name="l02761"></a><a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">02761</a> <span class="preprocessor">`define</span> <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">Z</a> ((<a class="code" href="classalu.html#a46ed8f8b6e397f2f7a0998fe482d4f37">size</a>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) ? (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">8&#39;b0</span>) : (<a class="code" href="classalu.html#a46ed8f8b6e397f2f7a0998fe482d4f37">size</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span>) ? (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0</span>) : (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">32&#39;b0</span>))
<a name="l02762"></a>02762
<a name="l02763"></a>02763 <span class="keyword">// ALU operations</span>
<a name="l02764"></a>02764
<a name="l02765"></a><a class="code" href="classalu.html#a71bbcd2b437cc138ec4e56a2fb248d7e">02765</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classalu.html#a71bbcd2b437cc138ec4e56a2fb248d7e">interrupt_mask_copy</a>;
<a name="l02766"></a><a class="code" href="classalu.html#acd1a91ac2175444844ece34147d7baa4">02766</a> <span class="vhdlkeyword">reg</span> <a class="code" href="classalu.html#acd1a91ac2175444844ece34147d7baa4">was_interrupt</a>;
<a name="l02767"></a>02767
<a name="l02768"></a>02768 <span class="keyword">// Bit being shifted left</span>
<a name="l02769"></a><a class="code" href="classalu.html#ab2b982ee64f25838bec8dba77728dfd8">02769</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classalu.html#ab2b982ee64f25838bec8dba77728dfd8">lbit</a> = (<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">10</span>]) | (<a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] &amp; <a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">11</span>]);
<a name="l02770"></a>02770 <span class="keyword">// Bit being shifted right</span>
<a name="l02771"></a><a class="code" href="classalu.html#a8035654de9f2902808f814526db0e1bc">02771</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classalu.html#a8035654de9f2902808f814526db0e1bc">rbit</a> = (<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">12</span>]) | (<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">0</span>] &amp; <a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">14</span>]) | (<a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] &amp; <a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">15</span>]);
<a name="l02772"></a>02772
<a name="l02773"></a><a class="code" href="classalu.html#a5c48a82153e9796a3913029cde0cc182">02773</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classalu.html#a322325f3e53ea8e7d70fbdc7f5d1b30b">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classalu.html#a2f01d99d4de620b6ce6c7c0a150a5fab">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l02774"></a>02774 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a2f01d99d4de620b6ce6c7c0a150a5fab">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>
<a name="l02775"></a>02775 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a> &lt;= { <span class="vhdllogic">1&#39;b0</span>, <span class="vhdllogic">1&#39;b0</span>, <span class="vhdllogic">1&#39;b1</span>, <span class="vhdllogic">2&#39;b0</span>, <span class="vhdllogic">3&#39;b111</span>, <span class="vhdllogic">8&#39;b0</span> };
<a name="l02776"></a>02776 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> &lt;= <span class="vhdllogic">32&#39;d0</span>;
<a name="l02777"></a>02777 <a class="code" href="classalu.html#ad39d03bb22df22560c4f5dc796382313">alu_signal</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02778"></a>02778 <a class="code" href="classalu.html#a71bbcd2b437cc138ec4e56a2fb248d7e">interrupt_mask_copy</a> &lt;= <span class="vhdllogic">3&#39;b0</span>;
<a name="l02779"></a>02779 <a class="code" href="classalu.html#acd1a91ac2175444844ece34147d7baa4">was_interrupt</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02780"></a>02780 <span class="vhdlkeyword">end</span>
<a name="l02781"></a>02781 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l02782"></a>02782 <span class="vhdlkeyword">case</span>(<a class="code" href="classalu.html#abd96864c4534e2905f0ac629d1bcfce1">alu_control</a>)
<a name="l02783"></a>02783 <a class="code" href="ao68000_8v.html#a687e6310453b4cedb64aa6e66b058c18">`ALU_SR_SET_INTERRUPT</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02784"></a>02784 <a class="code" href="classalu.html#a71bbcd2b437cc138ec4e56a2fb248d7e">interrupt_mask_copy</a> &lt;= <a class="code" href="classalu.html#ab8bac09f28bae473ebf96e3c2c7e2806">interrupt_mask</a>[<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>];
<a name="l02785"></a>02785 <a class="code" href="classalu.html#acd1a91ac2175444844ece34147d7baa4">was_interrupt</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l02786"></a>02786 <span class="vhdlkeyword">end</span>
<a name="l02787"></a>02787
<a name="l02788"></a>02788 <a class="code" href="ao68000_8v.html#ac9fc44b8d3bbcd6c742f1ba074fc668d">`ALU_SR_SET_TRAP</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02789"></a>02789 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#acd1a91ac2175444844ece34147d7baa4">was_interrupt</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l02790"></a>02790 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a> &lt;= { <span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">14</span>], <span class="vhdllogic">1&#39;b1</span>, <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">12</span>:<span class="vhdllogic">11</span>], <a class="code" href="classalu.html#a71bbcd2b437cc138ec4e56a2fb248d7e">interrupt_mask_copy</a>[<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>], <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] };
<a name="l02791"></a>02791 <span class="vhdlkeyword">end</span>
<a name="l02792"></a>02792 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l02793"></a>02793 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a> &lt;= { <span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">14</span>], <span class="vhdllogic">1&#39;b1</span>, <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">12</span>:<span class="vhdllogic">0</span>] };
<a name="l02794"></a>02794 <span class="vhdlkeyword">end</span>
<a name="l02795"></a>02795 <a class="code" href="classalu.html#acd1a91ac2175444844ece34147d7baa4">was_interrupt</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02796"></a>02796 <span class="vhdlkeyword">end</span>
<a name="l02797"></a>02797
<a name="l02798"></a>02798 <a class="code" href="ao68000_8v.html#a59147ff996e0ba496f1f06d7a06decae">`ALU_MOVEP_M2R_1</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02799"></a>02799 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1&#39;b1</span>) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">24</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];
<a name="l02800"></a>02800 <span class="vhdlkeyword">else</span> <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];
<a name="l02801"></a>02801 <span class="keyword">//CCR: no change</span>
<a name="l02802"></a>02802 <span class="vhdlkeyword">end</span>
<a name="l02803"></a>02803 <a class="code" href="ao68000_8v.html#a3b1155f3496b0fc984e5418e09586bf5">`ALU_MOVEP_M2R_2</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02804"></a>02804 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1&#39;b1</span>) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">23</span>:<span class="vhdllogic">16</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];
<a name="l02805"></a>02805 <span class="vhdlkeyword">else</span> <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];
<a name="l02806"></a>02806 <span class="keyword">//CCR: no change</span>
<a name="l02807"></a>02807 <span class="vhdlkeyword">end</span>
<a name="l02808"></a>02808 <a class="code" href="ao68000_8v.html#a5458c8548afc8f7517bdc582c9946b2f">`ALU_MOVEP_M2R_3</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02809"></a>02809 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1&#39;b1</span>) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];
<a name="l02810"></a>02810 <span class="keyword">//CCR: no change</span>
<a name="l02811"></a>02811 <span class="vhdlkeyword">end</span>
<a name="l02812"></a>02812 <a class="code" href="ao68000_8v.html#a8ec0074ca9c5cfec15aa93b92353e09b">`ALU_MOVEP_M2R_4</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02813"></a>02813 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1&#39;b1</span>) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];
<a name="l02814"></a>02814 <span class="keyword">//CCR: no change</span>
<a name="l02815"></a>02815 <span class="vhdlkeyword">end</span>
<a name="l02816"></a>02816
<a name="l02817"></a>02817
<a name="l02818"></a>02818 <a class="code" href="ao68000_8v.html#aab7548aba43c6c12259a2a154ce2982b">`ALU_MOVEP_R2M_1</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02819"></a>02819 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1&#39;b1</span>) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">24</span>];
<a name="l02820"></a>02820 <span class="vhdlkeyword">else</span> <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>];
<a name="l02821"></a>02821 <span class="keyword">// CCR: no change</span>
<a name="l02822"></a>02822 <span class="vhdlkeyword">end</span>
<a name="l02823"></a>02823 <a class="code" href="ao68000_8v.html#a9918f4663f481092da549f3cb008721d">`ALU_MOVEP_R2M_2</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02824"></a>02824 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1&#39;b1</span>) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">23</span>:<span class="vhdllogic">16</span>];
<a name="l02825"></a>02825 <span class="vhdlkeyword">else</span> <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];
<a name="l02826"></a>02826 <span class="keyword">// CCR: no change</span>
<a name="l02827"></a>02827 <span class="vhdlkeyword">end</span>
<a name="l02828"></a>02828 <a class="code" href="ao68000_8v.html#aee5fc91f58c97ffa4d252e127c9e4226">`ALU_MOVEP_R2M_3</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02829"></a>02829 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>];
<a name="l02830"></a>02830 <span class="keyword">// CCR: no change</span>
<a name="l02831"></a>02831 <span class="vhdlkeyword">end</span>
<a name="l02832"></a>02832 <a class="code" href="ao68000_8v.html#a0bc85184fda7b9fcbf00afa29be91d42">`ALU_MOVEP_R2M_4</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02833"></a>02833 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];
<a name="l02834"></a>02834 <span class="keyword">// CCR: no change</span>
<a name="l02835"></a>02835 <span class="vhdlkeyword">end</span>
<a name="l02836"></a>02836
<a name="l02837"></a>02837 <a class="code" href="ao68000_8v.html#a6a119b7268e4e0a78e0307ba0c693ccb">`ALU_SIGN_EXTEND</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02838"></a>02838 <span class="keyword">// move operand1 with sign-extension to result</span>
<a name="l02839"></a>02839 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a46ed8f8b6e397f2f7a0998fe482d4f37">size</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l02840"></a>02840 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> &lt;= { {<span class="vhdllogic">16</span>{<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">15</span>]}}, <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] };
<a name="l02841"></a>02841 <span class="vhdlkeyword">end</span>
<a name="l02842"></a>02842 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l02843"></a>02843 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>;
<a name="l02844"></a>02844 <span class="vhdlkeyword">end</span>
<a name="l02845"></a>02845 <span class="keyword">// CCR: no change</span>
<a name="l02846"></a>02846 <span class="vhdlkeyword">end</span>
<a name="l02847"></a>02847
<a name="l02848"></a>02848 <a class="code" href="ao68000_8v.html#ae497ab0b3e0550245c333bdb426d4236">`ALU_ARITHMETIC_LOGIC</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02849"></a>02849
<a name="l02850"></a>02850 <span class="keyword">// OR,OR to mem,OR to Dn</span>
<a name="l02851"></a>02851 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">0</span>]) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] | <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l02852"></a>02852 <span class="keyword">// AND,AND to mem,AND to Dn</span>
<a name="l02853"></a>02853 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">1</span>]) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] &amp; <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l02854"></a>02854 <span class="keyword">// EORI,EOR</span>
<a name="l02855"></a>02855 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">2</span>]) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] ^ <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l02856"></a>02856 <span class="keyword">// ADD,ADD to mem,ADD to Dn,ADDQ</span>
<a name="l02857"></a>02857 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">3</span>]) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] + <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l02858"></a>02858 <span class="keyword">// SUBI,CMPI,CMPM,SUB to mem,SUB to Dn,CMP,SUBQ</span>
<a name="l02859"></a>02859 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">4</span>] | <a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">5</span>]) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l02860"></a>02860
<a name="l02861"></a>02861 <span class="keyword">// Z</span>
<a name="l02862"></a>02862 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;
<a name="l02863"></a>02863 <span class="keyword">// N</span>
<a name="l02864"></a>02864 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l02865"></a>02865
<a name="l02866"></a>02866 <span class="keyword">// CMPI,CMPM,CMP</span>
<a name="l02867"></a>02867 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">5</span>]) <span class="vhdlkeyword">begin</span>
<a name="l02868"></a>02868 <span class="keyword">// C,V</span>
<a name="l02869"></a>02869 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
<a name="l02870"></a>02870 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= (~<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
<a name="l02871"></a>02871 <span class="keyword">// X not affected</span>
<a name="l02872"></a>02872 <span class="vhdlkeyword">end</span>
<a name="l02873"></a>02873 <span class="keyword">// ADDI,ADD to mem,ADD to Dn,ADDQ</span>
<a name="l02874"></a>02874 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">3</span>]) <span class="vhdlkeyword">begin</span>
<a name="l02875"></a>02875 <span class="keyword">// C,X,V</span>
<a name="l02876"></a>02876 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
<a name="l02877"></a>02877 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>); <span class="keyword">//=ccr[0];</span>
<a name="l02878"></a>02878 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>) | (~<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
<a name="l02879"></a>02879 <span class="vhdlkeyword">end</span>
<a name="l02880"></a>02880 <span class="keyword">// SUBI,SUB to mem,SUB to Dn,SUBQ</span>
<a name="l02881"></a>02881 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">4</span>]) <span class="vhdlkeyword">begin</span>
<a name="l02882"></a>02882 <span class="keyword">// C,X,V</span>
<a name="l02883"></a>02883 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
<a name="l02884"></a>02884 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>); <span class="keyword">//=ccr[0];</span>
<a name="l02885"></a>02885 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= (~<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
<a name="l02886"></a>02886 <span class="vhdlkeyword">end</span>
<a name="l02887"></a>02887 <span class="keyword">// ANDI,EORI,ORI,EOR,OR to mem,AND to mem,OR to Dn,AND to Dn</span>
<a name="l02888"></a>02888 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l02889"></a>02889 <span class="keyword">// C,V</span>
<a name="l02890"></a>02890 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02891"></a>02891 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02892"></a>02892 <span class="keyword">// X not affected</span>
<a name="l02893"></a>02893 <span class="vhdlkeyword">end</span>
<a name="l02894"></a>02894 <span class="vhdlkeyword">end</span>
<a name="l02895"></a>02895
<a name="l02896"></a>02896 <a class="code" href="ao68000_8v.html#a3e54001e73374bd4f7cfda3de55bd944">`ALU_ABCD_SBCD_ADDX_SUBX</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span> <span class="keyword">// 259 LE</span>
<a name="l02897"></a>02897 <span class="keyword">// ABCD</span>
<a name="l02898"></a>02898 <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">14</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">3&#39;b100</span> ) <span class="vhdlkeyword">begin</span>
<a name="l02899"></a>02899 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] = {<span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>]} + {<span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>]} + {<span class="vhdllogic">4&#39;b0</span>, <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>]};
<a name="l02900"></a>02900 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] = {<span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>]} + {<span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>]};
<a name="l02901"></a>02901
<a name="l02902"></a>02902 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">23</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] + <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] + {<span class="vhdllogic">7&#39;b0</span>, <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>]};
<a name="l02903"></a>02903
<a name="l02904"></a>02904 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] = (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] &gt; <span class="vhdllogic">6&#39;d9</span>) ? (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] + <span class="vhdllogic">6&#39;d6</span>) : <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>];
<a name="l02905"></a>02905 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] = (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] &gt; <span class="vhdllogic">6&#39;h1F</span>) ? (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] + <span class="vhdllogic">6&#39;d2</span>) :
<a name="l02906"></a>02906 (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] &gt; <span class="vhdllogic">6&#39;h0F</span>) ? (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] + <span class="vhdllogic">6&#39;d1</span>) :
<a name="l02907"></a>02907 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>];
<a name="l02908"></a>02908 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] = (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] &gt; <span class="vhdllogic">6&#39;d9</span>) ? (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] + <span class="vhdllogic">6&#39;d6</span>) : <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>];
<a name="l02909"></a>02909
<a name="l02910"></a>02910 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>] = <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">17</span>:<span class="vhdllogic">14</span>];
<a name="l02911"></a>02911 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>];
<a name="l02912"></a>02912
<a name="l02913"></a>02913 <span class="keyword">// C</span>
<a name="l02914"></a>02914 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] &gt; <span class="vhdllogic">6&#39;d9</span>) ? <span class="vhdllogic">1&#39;b1</span> : <span class="vhdllogic">1&#39;b0</span>;
<a name="l02915"></a>02915 <span class="keyword">// X = C</span>
<a name="l02916"></a>02916 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] &lt;= (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] &gt; <span class="vhdllogic">6&#39;d9</span>) ? <span class="vhdllogic">1&#39;b1</span> : <span class="vhdllogic">1&#39;b0</span>;
<a name="l02917"></a>02917
<a name="l02918"></a>02918 <span class="keyword">// V</span>
<a name="l02919"></a>02919 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">30</span>] == <span class="vhdllogic">1&#39;b0</span> &amp;&amp; <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>] == <span class="vhdllogic">1&#39;b1</span>) ? <span class="vhdllogic">1&#39;b1</span> : <span class="vhdllogic">1&#39;b0</span>;
<a name="l02920"></a>02920 <span class="vhdlkeyword">end</span>
<a name="l02921"></a>02921 <span class="keyword">// SBCD</span>
<a name="l02922"></a>02922 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">14</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">3&#39;b000</span> ) <span class="vhdlkeyword">begin</span>
<a name="l02923"></a>02923 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] = <span class="vhdllogic">6&#39;d32</span> + {<span class="vhdllogic">2&#39;b0</span>, <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>]} - {<span class="vhdllogic">2&#39;b0</span>, <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>]} - {<span class="vhdllogic">5&#39;b0</span>, <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>]};
<a name="l02924"></a>02924 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] = <span class="vhdllogic">6&#39;d32</span> + {<span class="vhdllogic">2&#39;b0</span>, <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>]} - {<span class="vhdllogic">2&#39;b0</span>, <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>]};
<a name="l02617"></a>02617
<a name="l02626"></a><a class="code" href="classalu.html">02626</a> <span class="vhdlkeyword">module</span> <a class="code" href="classalu.html">alu</a>(
<a name="l02627"></a><a class="code" href="classalu.html#a322325f3e53ea8e7d70fbdc7f5d1b30b">02627</a> <span class="vhdlkeyword">input</span> <a class="code" href="classalu.html#a322325f3e53ea8e7d70fbdc7f5d1b30b">clock</a>,
<a name="l02628"></a><a class="code" href="classalu.html#a2f01d99d4de620b6ce6c7c0a150a5fab">02628</a> <span class="vhdlkeyword">input</span> <a class="code" href="classalu.html#a2f01d99d4de620b6ce6c7c0a150a5fab">reset_n</a>,
<a name="l02629"></a>02629
<a name="l02630"></a>02630 <span class="keyword">// only zero bit</span>
<a name="l02631"></a><a class="code" href="classalu.html#a5a9e1012e0cf7d30a4a4dcaf5486693c">02631</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classalu.html#a5a9e1012e0cf7d30a4a4dcaf5486693c">address</a>,
<a name="l02632"></a>02632 <span class="keyword">// only ir[11:9] and ir[6]</span>
<a name="l02633"></a><a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">02633</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>,
<a name="l02634"></a>02634 <span class="keyword">// byte 2&#39;b00, word 2&#39;b01, long 2&#39;b10</span>
<a name="l02635"></a><a class="code" href="classalu.html#a46ed8f8b6e397f2f7a0998fe482d4f37">02635</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classalu.html#a46ed8f8b6e397f2f7a0998fe482d4f37">size</a>,
<a name="l02636"></a>02636
<a name="l02637"></a><a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">02637</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>,
<a name="l02638"></a><a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">02638</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>,
<a name="l02639"></a>02639
<a name="l02640"></a><a class="code" href="classalu.html#ab8bac09f28bae473ebf96e3c2c7e2806">02640</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classalu.html#ab8bac09f28bae473ebf96e3c2c7e2806">interrupt_mask</a>,
<a name="l02641"></a><a class="code" href="classalu.html#abd96864c4534e2905f0ac629d1bcfce1">02641</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">4</span>:<span class="vhdllogic">0</span>] <a class="code" href="classalu.html#abd96864c4534e2905f0ac629d1bcfce1">alu_control</a>,
<a name="l02642"></a>02642
<a name="l02643"></a><a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">02643</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>,
<a name="l02644"></a><a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">02644</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>,
<a name="l02645"></a>02645
<a name="l02646"></a><a class="code" href="classalu.html#ad39d03bb22df22560c4f5dc796382313">02646</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> <a class="code" href="classalu.html#ad39d03bb22df22560c4f5dc796382313">alu_signal</a>,
<a name="l02647"></a><a class="code" href="classalu.html#ac76782f488b9491569955793b9b37762">02647</a> <span class="vhdlkeyword">output</span> <a class="code" href="classalu.html#ac76782f488b9491569955793b9b37762">alu_mult_div_ready</a>,
<a name="l02648"></a><a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">02648</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">17</span>:<span class="vhdllogic">0</span>] <a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>
<a name="l02649"></a>02649 );
<a name="l02650"></a>02650
<a name="l02651"></a>02651 <span class="keyword">//****************************************************** Altera-specific multiplication and division modules START</span>
<a name="l02652"></a>02652 <span class="keyword">/* Multiplication and division modules.</span>
<a name="l02653"></a>02653 <span class="keyword"> </span>
<a name="l02654"></a>02654 <span class="keyword"> Currently this module contains:</span>
<a name="l02655"></a>02655 <span class="keyword"> - &lt;em&gt;lpm_mult&lt;/em&gt; instantiation from Altera Megafunction/LPM library,</span>
<a name="l02656"></a>02656 <span class="keyword"> - a sequential state machine for division written by Frederic Requin</span>
<a name="l02657"></a>02657 <span class="keyword"> */</span>
<a name="l02658"></a>02658
<a name="l02659"></a><a class="code" href="classalu.html#a25ae8f83a524b562fb57cd0af6dee164">02659</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classalu.html#a25ae8f83a524b562fb57cd0af6dee164">mult_div_sign</a> = <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">8</span>];
<a name="l02660"></a>02660
<a name="l02661"></a>02661 <span class="keyword">// 18-2 - division calculation, 1 - waiting for result read, 0 - idle</span>
<a name="l02662"></a><a class="code" href="classalu.html#a3a2dd2d9816dba2aebe4a5cf5eeed521">02662</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">4</span>:<span class="vhdllogic">0</span>] <a class="code" href="classalu.html#a3a2dd2d9816dba2aebe4a5cf5eeed521">div_count</a>;
<a name="l02663"></a><a class="code" href="classalu.html#ac5f88cdff8f17d02e28927335c6f141d">02663</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">16</span>:<span class="vhdllogic">0</span>] <a class="code" href="classalu.html#ac5f88cdff8f17d02e28927335c6f141d">quotient</a>;
<a name="l02664"></a><a class="code" href="classalu.html#ab4e5d750cf0d96eb715606c6166945cb">02664</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classalu.html#a108916b9974c024932e1e9874589c4ba">dividend</a>, <a class="code" href="classalu.html#ab4e5d750cf0d96eb715606c6166945cb">divider</a>;
<a name="l02665"></a>02665
<a name="l02666"></a>02666 <span class="keyword">// Compute the difference with borrow</span>
<a name="l02667"></a><a class="code" href="classalu.html#a2fc8379eb8a0ee027596e29d34c0fbc7">02667</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">32</span>:<span class="vhdllogic">0</span>] <a class="code" href="classalu.html#a2fc8379eb8a0ee027596e29d34c0fbc7">div_diff</a> = (<a class="code" href="classalu.html#a108916b9974c024932e1e9874589c4ba">dividend</a> - <a class="code" href="classalu.html#ab4e5d750cf0d96eb715606c6166945cb">divider</a>);
<a name="l02668"></a>02668
<a name="l02669"></a>02669 <span class="keyword">// Overflow flag: when (quotient &gt;= 65536) or (signed division and (quotient &gt;= 32768 or quotient &lt; -32768))</span>
<a name="l02670"></a><a class="code" href="classalu.html#abad1e1ed5e810e1a31e16550349b6bfb">02670</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classalu.html#abad1e1ed5e810e1a31e16550349b6bfb">div_overflow</a> =
<a name="l02671"></a>02671 (<a class="code" href="classalu.html#ac5f88cdff8f17d02e28927335c6f141d">quotient</a>[<span class="vhdllogic">16</span>] == <span class="vhdllogic">1&#39;b1</span> ||
<a name="l02672"></a>02672 (<a class="code" href="classalu.html#a25ae8f83a524b562fb57cd0af6dee164">mult_div_sign</a> == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; (
<a name="l02673"></a>02673 ((<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>] ^ <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">15</span>]) == <span class="vhdllogic">1&#39;b0</span> &amp;&amp; <a class="code" href="classalu.html#ac5f88cdff8f17d02e28927335c6f141d">quotient</a>[<span class="vhdllogic">15</span>] == <span class="vhdllogic">1&#39;b1</span>) ||
<a name="l02674"></a>02674 ((<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>] ^ <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">15</span>]) == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <a class="code" href="classalu.html#ac5f88cdff8f17d02e28927335c6f141d">quotient</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] &gt; <span class="vhdllogic">16&#39;d32768</span>) )));
<a name="l02675"></a>02675
<a name="l02676"></a><a class="code" href="classalu.html#a66f6b0eb96212740619af0f057d33546">02676</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] <a class="code" href="classalu.html#a66f6b0eb96212740619af0f057d33546">div_quotient</a> =
<a name="l02677"></a>02677 <span class="keyword">// positive quotient</span>
<a name="l02678"></a>02678 (((<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>] ^ <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">15</span>]) &amp; <a class="code" href="classalu.html#a25ae8f83a524b562fb57cd0af6dee164">mult_div_sign</a>) == <span class="vhdllogic">1&#39;b0</span>)? <a class="code" href="classalu.html#ac5f88cdff8f17d02e28927335c6f141d">quotient</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] :
<a name="l02679"></a>02679 <span class="keyword">// negative quotient</span>
<a name="l02680"></a>02680 -<a class="code" href="classalu.html#ac5f88cdff8f17d02e28927335c6f141d">quotient</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>];
<a name="l02681"></a>02681
<a name="l02682"></a><a class="code" href="classalu.html#a3b4ed364cf9180375a05991a64005ea7">02682</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] <a class="code" href="classalu.html#a3b4ed364cf9180375a05991a64005ea7">div_remainder</a> =
<a name="l02683"></a>02683 <span class="keyword">// positive remainder</span>
<a name="l02684"></a>02684 ((<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>] &amp; <a class="code" href="classalu.html#a25ae8f83a524b562fb57cd0af6dee164">mult_div_sign</a>) == <span class="vhdllogic">1&#39;b0</span>)? <a class="code" href="classalu.html#a108916b9974c024932e1e9874589c4ba">dividend</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] :
<a name="l02685"></a>02685 <span class="keyword">// negative remainder</span>
<a name="l02686"></a>02686 -<a class="code" href="classalu.html#a108916b9974c024932e1e9874589c4ba">dividend</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>];
<a name="l02687"></a>02687
<a name="l02688"></a><a class="code" href="classalu.html#a04b10dc82e8a06c3856bfd16a7e18d06">02688</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classalu.html#a322325f3e53ea8e7d70fbdc7f5d1b30b">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classalu.html#a2f01d99d4de620b6ce6c7c0a150a5fab">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l02689"></a>02689 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a2f01d99d4de620b6ce6c7c0a150a5fab">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>
<a name="l02690"></a>02690 <a class="code" href="classalu.html#a3a2dd2d9816dba2aebe4a5cf5eeed521">div_count</a> &lt;= <span class="vhdllogic">5&#39;d0</span>;
<a name="l02691"></a>02691 <span class="vhdlkeyword">end</span>
<a name="l02692"></a>02692 <span class="keyword">// Cycle #0 : load the registers</span>
<a name="l02693"></a>02693 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#abd96864c4534e2905f0ac629d1bcfce1">alu_control</a> == <a class="code" href="ao68000_8v.html#aed07d190bb88f0cce7768028698020f9">`ALU_MULS_MULU_DIVS_DIVU</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1000</span> &amp;&amp; <a class="code" href="classalu.html#a3a2dd2d9816dba2aebe4a5cf5eeed521">div_count</a> == <span class="vhdllogic">5&#39;d0</span>) <span class="vhdlkeyword">begin</span>
<a name="l02694"></a>02694 <span class="keyword">// 17 cycles to finish + wait state</span>
<a name="l02695"></a>02695 <a class="code" href="classalu.html#a3a2dd2d9816dba2aebe4a5cf5eeed521">div_count</a> &lt;= <span class="vhdllogic">5&#39;d18</span>;
<a name="l02696"></a>02696 <span class="keyword">// Clear the quotient</span>
<a name="l02697"></a>02697 <a class="code" href="classalu.html#ac5f88cdff8f17d02e28927335c6f141d">quotient</a> &lt;= <span class="vhdllogic">17&#39;d0</span>;
<a name="l02698"></a>02698
<a name="l02699"></a>02699 <span class="keyword">// Unsigned divide or positive numerator</span>
<a name="l02700"></a>02700 <span class="vhdlkeyword">if</span> ((!<a class="code" href="classalu.html#a25ae8f83a524b562fb57cd0af6dee164">mult_div_sign</a>) || (!<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>])) <a class="code" href="classalu.html#a108916b9974c024932e1e9874589c4ba">dividend</a> &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>;
<a name="l02701"></a>02701 <span class="keyword">// Negative numerator</span>
<a name="l02702"></a>02702 <span class="vhdlkeyword">else</span> <a class="code" href="classalu.html#a108916b9974c024932e1e9874589c4ba">dividend</a> &lt;= -<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>;
<a name="l02703"></a>02703
<a name="l02704"></a>02704 <span class="keyword">// Unsigned divide or positive denominator</span>
<a name="l02705"></a>02705 <span class="vhdlkeyword">if</span> ((!<a class="code" href="classalu.html#a25ae8f83a524b562fb57cd0af6dee164">mult_div_sign</a>) || (!<a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">15</span>])) <a class="code" href="classalu.html#ab4e5d750cf0d96eb715606c6166945cb">divider</a> &lt;= {<a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>],<span class="vhdllogic">16&#39;d0</span>};
<a name="l02706"></a>02706 <span class="keyword">// Negative denominator</span>
<a name="l02707"></a>02707 <span class="vhdlkeyword">else</span> <a class="code" href="classalu.html#ab4e5d750cf0d96eb715606c6166945cb">divider</a> &lt;= {-<a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>],<span class="vhdllogic">16&#39;d0</span>};
<a name="l02708"></a>02708 <span class="vhdlkeyword">end</span>
<a name="l02709"></a>02709 <span class="keyword">// Cycles #1-17 : division calculation</span>
<a name="l02710"></a>02710 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a3a2dd2d9816dba2aebe4a5cf5eeed521">div_count</a> &gt; <span class="vhdllogic">5&#39;d1</span>) <span class="vhdlkeyword">begin</span>
<a name="l02711"></a>02711 <span class="keyword">// Check difference&#39;s sign</span>
<a name="l02712"></a>02712 <span class="vhdlkeyword">if</span> (!<a class="code" href="classalu.html#a2fc8379eb8a0ee027596e29d34c0fbc7">div_diff</a>[<span class="vhdllogic">32</span>]) <span class="vhdlkeyword">begin</span>
<a name="l02713"></a>02713 <span class="keyword">// Difference is positive : shift a one</span>
<a name="l02714"></a>02714 <a class="code" href="classalu.html#a108916b9974c024932e1e9874589c4ba">dividend</a> &lt;= <a class="code" href="classalu.html#a2fc8379eb8a0ee027596e29d34c0fbc7">div_diff</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l02715"></a>02715 <a class="code" href="classalu.html#ac5f88cdff8f17d02e28927335c6f141d">quotient</a> &lt;= {<a class="code" href="classalu.html#ac5f88cdff8f17d02e28927335c6f141d">quotient</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">1&#39;b1</span>};
<a name="l02716"></a>02716 <span class="vhdlkeyword">end</span>
<a name="l02717"></a>02717 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l02718"></a>02718 <span class="keyword">// Difference is negative : shift a zero</span>
<a name="l02719"></a>02719 <a class="code" href="classalu.html#ac5f88cdff8f17d02e28927335c6f141d">quotient</a> &lt;= {<a class="code" href="classalu.html#ac5f88cdff8f17d02e28927335c6f141d">quotient</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">1&#39;b0</span>};
<a name="l02720"></a>02720 <span class="vhdlkeyword">end</span>
<a name="l02721"></a>02721 <span class="keyword">// Shift right divider</span>
<a name="l02722"></a>02722 <a class="code" href="classalu.html#ab4e5d750cf0d96eb715606c6166945cb">divider</a> &lt;= {<span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#ab4e5d750cf0d96eb715606c6166945cb">divider</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">1</span>]};
<a name="l02723"></a>02723 <span class="keyword">// Count one bit</span>
<a name="l02724"></a>02724 <a class="code" href="classalu.html#a3a2dd2d9816dba2aebe4a5cf5eeed521">div_count</a> &lt;= <a class="code" href="classalu.html#a3a2dd2d9816dba2aebe4a5cf5eeed521">div_count</a> - <span class="vhdllogic">5&#39;d1</span>;
<a name="l02725"></a>02725 <span class="vhdlkeyword">end</span>
<a name="l02726"></a>02726 <span class="keyword">// result read</span>
<a name="l02727"></a>02727 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#abd96864c4534e2905f0ac629d1bcfce1">alu_control</a> == <a class="code" href="ao68000_8v.html#aed07d190bb88f0cce7768028698020f9">`ALU_MULS_MULU_DIVS_DIVU</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1000</span> &amp;&amp; <a class="code" href="classalu.html#a3a2dd2d9816dba2aebe4a5cf5eeed521">div_count</a> == <span class="vhdllogic">5&#39;d1</span>) <span class="vhdlkeyword">begin</span>
<a name="l02728"></a>02728 <span class="keyword">// goto idle</span>
<a name="l02729"></a>02729 <a class="code" href="classalu.html#a3a2dd2d9816dba2aebe4a5cf5eeed521">div_count</a> &lt;= <a class="code" href="classalu.html#a3a2dd2d9816dba2aebe4a5cf5eeed521">div_count</a> - <span class="vhdllogic">5&#39;d1</span>;
<a name="l02730"></a>02730 <span class="vhdlkeyword">end</span>
<a name="l02731"></a>02731 <span class="vhdlkeyword">end</span>
<a name="l02732"></a>02732
<a name="l02733"></a>02733 <span class="keyword">// MULS/MULU: 16-bit operand1[15:0] signed/unsigned * operand2[15:0] signed/unsigned = 32-bit result signed/unsigned</span>
<a name="l02734"></a>02734 <span class="keyword">// Optimization by Frederic Requin</span>
<a name="l02735"></a><a class="code" href="classalu.html#ac1b8a2e6c2bb6a12b10db4250f56135e">02735</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">33</span>:<span class="vhdllogic">0</span>] <a class="code" href="classalu.html#ac1b8a2e6c2bb6a12b10db4250f56135e">mult_result</a>;
<a name="l02736"></a>02736
<a name="l02737"></a><a class="code" href="classalu.html#a6447478386a93e0306b7cb09937c23c3">02737</a> <a class="code" href="classalu.html#a6447478386a93e0306b7cb09937c23c3">lpm_mult</a> <span class="vhdlchar">muls</span>(
<a name="l02738"></a>02738 .<a class="code" href="classalu.html#a322325f3e53ea8e7d70fbdc7f5d1b30b">clock</a> (<a class="code" href="classalu.html#a322325f3e53ea8e7d70fbdc7f5d1b30b">clock</a>),
<a name="l02739"></a>02739 .<span class="vhdlchar">dataa</span> ({<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">15</span>] &amp; <a class="code" href="classalu.html#a25ae8f83a524b562fb57cd0af6dee164">mult_div_sign</a>, <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>]}),
<a name="l02740"></a>02740 .<span class="vhdlchar">datab</span> ({<a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">15</span>] &amp; <a class="code" href="classalu.html#a25ae8f83a524b562fb57cd0af6dee164">mult_div_sign</a>, <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>]}),
<a name="l02741"></a>02741 .<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> (<a class="code" href="classalu.html#ac1b8a2e6c2bb6a12b10db4250f56135e">mult_result</a>)
<a name="l02742"></a>02742 );
<a name="l02743"></a>02743 <span class="vhdlkeyword">defparam</span>
<a name="l02744"></a>02744 <span class="vhdlchar">muls</span>.<span class="vhdlchar">lpm_widtha</span> = <span class="vhdllogic">17</span>,
<a name="l02745"></a>02745 <span class="vhdlchar">muls</span>.<span class="vhdlchar">lpm_widthb</span> = <span class="vhdllogic">17</span>,
<a name="l02746"></a>02746 <span class="vhdlchar">muls</span>.<span class="vhdlchar">lpm_widthp</span> = <span class="vhdllogic">34</span>,
<a name="l02747"></a>02747 <span class="vhdlchar">muls</span>.<span class="vhdlchar">lpm_representation</span> = <span class="keyword">&quot;SIGNED&quot;</span>,
<a name="l02748"></a>02748 <span class="vhdlchar">muls</span>.<span class="vhdlchar">lpm_pipeline</span> = <span class="vhdllogic">1</span>;
<a name="l02749"></a>02749
<a name="l02750"></a>02750 <span class="keyword">// multiplication ready in one cycle, division ready when div_count in waiting or idle state</span>
<a name="l02751"></a>02751 <span class="vhdlkeyword">assign</span> <a class="code" href="classalu.html#ac76782f488b9491569955793b9b37762">alu_mult_div_ready</a> = (<a class="code" href="classalu.html#a3a2dd2d9816dba2aebe4a5cf5eeed521">div_count</a> == <span class="vhdllogic">5&#39;d1</span> || <a class="code" href="classalu.html#a3a2dd2d9816dba2aebe4a5cf5eeed521">div_count</a> == <span class="vhdllogic">5&#39;d0</span>);
<a name="l02752"></a>02752
<a name="l02753"></a>02753 <span class="keyword">//****************************************************** Altera-specific multiplication and division modules END</span>
<a name="l02754"></a>02754
<a name="l02755"></a>02755 <span class="keyword">// ALU internal defines</span>
<a name="l02756"></a><a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">02756</a> <span class="preprocessor">`define</span> <a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">Sm</a> ((<a class="code" href="classalu.html#a46ed8f8b6e397f2f7a0998fe482d4f37">size</a>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) ? operand2[<span class="vhdllogic">7</span>] : (<a class="code" href="classalu.html#a46ed8f8b6e397f2f7a0998fe482d4f37">size</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span>) ? operand2[<span class="vhdllogic">15</span>] : <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">31</span>])
<a name="l02757"></a>02757
<a name="l02758"></a><a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">02758</a> <span class="preprocessor">`define</span> <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">Dm</a> ((<a class="code" href="classalu.html#a46ed8f8b6e397f2f7a0998fe482d4f37">size</a>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) ? operand1[<span class="vhdllogic">7</span>] : (<a class="code" href="classalu.html#a46ed8f8b6e397f2f7a0998fe482d4f37">size</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span>) ? operand1[<span class="vhdllogic">15</span>] : <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>])
<a name="l02759"></a>02759
<a name="l02760"></a><a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">02760</a> <span class="preprocessor">`define</span> <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">Rm</a> ((<a class="code" href="classalu.html#a46ed8f8b6e397f2f7a0998fe482d4f37">size</a>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) ? result[<span class="vhdllogic">7</span>] : (<a class="code" href="classalu.html#a46ed8f8b6e397f2f7a0998fe482d4f37">size</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span>) ? result[<span class="vhdllogic">15</span>] : <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>])
<a name="l02761"></a>02761
<a name="l02762"></a><a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">02762</a> <span class="preprocessor">`define</span> <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">Z</a> ((<a class="code" href="classalu.html#a46ed8f8b6e397f2f7a0998fe482d4f37">size</a>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) ? (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">8&#39;b0</span>) : (<a class="code" href="classalu.html#a46ed8f8b6e397f2f7a0998fe482d4f37">size</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span>) ? (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0</span>) : (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">32&#39;b0</span>))
<a name="l02763"></a>02763
<a name="l02764"></a>02764 <span class="keyword">// ALU operations</span>
<a name="l02765"></a>02765
<a name="l02766"></a><a class="code" href="classalu.html#a71bbcd2b437cc138ec4e56a2fb248d7e">02766</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classalu.html#a71bbcd2b437cc138ec4e56a2fb248d7e">interrupt_mask_copy</a>;
<a name="l02767"></a><a class="code" href="classalu.html#acd1a91ac2175444844ece34147d7baa4">02767</a> <span class="vhdlkeyword">reg</span> <a class="code" href="classalu.html#acd1a91ac2175444844ece34147d7baa4">was_interrupt</a>;
<a name="l02768"></a>02768
<a name="l02769"></a>02769 <span class="keyword">// Bit being shifted left</span>
<a name="l02770"></a><a class="code" href="classalu.html#ab2b982ee64f25838bec8dba77728dfd8">02770</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classalu.html#ab2b982ee64f25838bec8dba77728dfd8">lbit</a> = (<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">10</span>]) | (<a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] &amp; <a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">11</span>]);
<a name="l02771"></a>02771 <span class="keyword">// Bit being shifted right</span>
<a name="l02772"></a><a class="code" href="classalu.html#a8035654de9f2902808f814526db0e1bc">02772</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classalu.html#a8035654de9f2902808f814526db0e1bc">rbit</a> = (<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">12</span>]) | (<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">0</span>] &amp; <a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">14</span>]) | (<a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] &amp; <a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">15</span>]);
<a name="l02773"></a>02773
<a name="l02774"></a><a class="code" href="classalu.html#a5c48a82153e9796a3913029cde0cc182">02774</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classalu.html#a322325f3e53ea8e7d70fbdc7f5d1b30b">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classalu.html#a2f01d99d4de620b6ce6c7c0a150a5fab">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l02775"></a>02775 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a2f01d99d4de620b6ce6c7c0a150a5fab">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>
<a name="l02776"></a>02776 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a> &lt;= { <span class="vhdllogic">1&#39;b0</span>, <span class="vhdllogic">1&#39;b0</span>, <span class="vhdllogic">1&#39;b1</span>, <span class="vhdllogic">2&#39;b0</span>, <span class="vhdllogic">3&#39;b111</span>, <span class="vhdllogic">8&#39;b0</span> };
<a name="l02777"></a>02777 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> &lt;= <span class="vhdllogic">32&#39;d0</span>;
<a name="l02778"></a>02778 <a class="code" href="classalu.html#ad39d03bb22df22560c4f5dc796382313">alu_signal</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02779"></a>02779 <a class="code" href="classalu.html#a71bbcd2b437cc138ec4e56a2fb248d7e">interrupt_mask_copy</a> &lt;= <span class="vhdllogic">3&#39;b0</span>;
<a name="l02780"></a>02780 <a class="code" href="classalu.html#acd1a91ac2175444844ece34147d7baa4">was_interrupt</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02781"></a>02781 <span class="vhdlkeyword">end</span>
<a name="l02782"></a>02782 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l02783"></a>02783 <span class="vhdlkeyword">case</span>(<a class="code" href="classalu.html#abd96864c4534e2905f0ac629d1bcfce1">alu_control</a>)
<a name="l02784"></a>02784 <a class="code" href="ao68000_8v.html#a687e6310453b4cedb64aa6e66b058c18">`ALU_SR_SET_INTERRUPT</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02785"></a>02785 <a class="code" href="classalu.html#a71bbcd2b437cc138ec4e56a2fb248d7e">interrupt_mask_copy</a> &lt;= <a class="code" href="classalu.html#ab8bac09f28bae473ebf96e3c2c7e2806">interrupt_mask</a>[<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>];
<a name="l02786"></a>02786 <a class="code" href="classalu.html#acd1a91ac2175444844ece34147d7baa4">was_interrupt</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l02787"></a>02787 <span class="vhdlkeyword">end</span>
<a name="l02788"></a>02788
<a name="l02789"></a>02789 <a class="code" href="ao68000_8v.html#ac9fc44b8d3bbcd6c742f1ba074fc668d">`ALU_SR_SET_TRAP</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02790"></a>02790 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#acd1a91ac2175444844ece34147d7baa4">was_interrupt</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l02791"></a>02791 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a> &lt;= { <span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">14</span>], <span class="vhdllogic">1&#39;b1</span>, <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">12</span>:<span class="vhdllogic">11</span>], <a class="code" href="classalu.html#a71bbcd2b437cc138ec4e56a2fb248d7e">interrupt_mask_copy</a>[<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>], <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] };
<a name="l02792"></a>02792 <span class="vhdlkeyword">end</span>
<a name="l02793"></a>02793 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l02794"></a>02794 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a> &lt;= { <span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">14</span>], <span class="vhdllogic">1&#39;b1</span>, <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">12</span>:<span class="vhdllogic">0</span>] };
<a name="l02795"></a>02795 <span class="vhdlkeyword">end</span>
<a name="l02796"></a>02796 <a class="code" href="classalu.html#acd1a91ac2175444844ece34147d7baa4">was_interrupt</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02797"></a>02797 <span class="vhdlkeyword">end</span>
<a name="l02798"></a>02798
<a name="l02799"></a>02799 <a class="code" href="ao68000_8v.html#a59147ff996e0ba496f1f06d7a06decae">`ALU_MOVEP_M2R_1</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02800"></a>02800 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1&#39;b1</span>) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">24</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];
<a name="l02801"></a>02801 <span class="vhdlkeyword">else</span> <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];
<a name="l02802"></a>02802 <span class="keyword">//CCR: no change</span>
<a name="l02803"></a>02803 <span class="vhdlkeyword">end</span>
<a name="l02804"></a>02804 <a class="code" href="ao68000_8v.html#a3b1155f3496b0fc984e5418e09586bf5">`ALU_MOVEP_M2R_2</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02805"></a>02805 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1&#39;b1</span>) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">23</span>:<span class="vhdllogic">16</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];
<a name="l02806"></a>02806 <span class="vhdlkeyword">else</span> <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];
<a name="l02807"></a>02807 <span class="keyword">//CCR: no change</span>
<a name="l02808"></a>02808 <span class="vhdlkeyword">end</span>
<a name="l02809"></a>02809 <a class="code" href="ao68000_8v.html#a5458c8548afc8f7517bdc582c9946b2f">`ALU_MOVEP_M2R_3</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02810"></a>02810 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1&#39;b1</span>) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];
<a name="l02811"></a>02811 <span class="keyword">//CCR: no change</span>
<a name="l02812"></a>02812 <span class="vhdlkeyword">end</span>
<a name="l02813"></a>02813 <a class="code" href="ao68000_8v.html#a8ec0074ca9c5cfec15aa93b92353e09b">`ALU_MOVEP_M2R_4</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02814"></a>02814 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1&#39;b1</span>) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];
<a name="l02815"></a>02815 <span class="keyword">//CCR: no change</span>
<a name="l02816"></a>02816 <span class="vhdlkeyword">end</span>
<a name="l02817"></a>02817
<a name="l02818"></a>02818
<a name="l02819"></a>02819 <a class="code" href="ao68000_8v.html#aab7548aba43c6c12259a2a154ce2982b">`ALU_MOVEP_R2M_1</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02820"></a>02820 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1&#39;b1</span>) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">24</span>];
<a name="l02821"></a>02821 <span class="vhdlkeyword">else</span> <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>];
<a name="l02822"></a>02822 <span class="keyword">// CCR: no change</span>
<a name="l02823"></a>02823 <span class="vhdlkeyword">end</span>
<a name="l02824"></a>02824 <a class="code" href="ao68000_8v.html#a9918f4663f481092da549f3cb008721d">`ALU_MOVEP_R2M_2</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02825"></a>02825 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1&#39;b1</span>) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">23</span>:<span class="vhdllogic">16</span>];
<a name="l02826"></a>02826 <span class="vhdlkeyword">else</span> <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];
<a name="l02827"></a>02827 <span class="keyword">// CCR: no change</span>
<a name="l02828"></a>02828 <span class="vhdlkeyword">end</span>
<a name="l02829"></a>02829 <a class="code" href="ao68000_8v.html#aee5fc91f58c97ffa4d252e127c9e4226">`ALU_MOVEP_R2M_3</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02830"></a>02830 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>];
<a name="l02831"></a>02831 <span class="keyword">// CCR: no change</span>
<a name="l02832"></a>02832 <span class="vhdlkeyword">end</span>
<a name="l02833"></a>02833 <a class="code" href="ao68000_8v.html#a0bc85184fda7b9fcbf00afa29be91d42">`ALU_MOVEP_R2M_4</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02834"></a>02834 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];
<a name="l02835"></a>02835 <span class="keyword">// CCR: no change</span>
<a name="l02836"></a>02836 <span class="vhdlkeyword">end</span>
<a name="l02837"></a>02837
<a name="l02838"></a>02838 <a class="code" href="ao68000_8v.html#a6a119b7268e4e0a78e0307ba0c693ccb">`ALU_SIGN_EXTEND</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02839"></a>02839 <span class="keyword">// move operand1 with sign-extension to result</span>
<a name="l02840"></a>02840 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a46ed8f8b6e397f2f7a0998fe482d4f37">size</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l02841"></a>02841 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> &lt;= { {<span class="vhdllogic">16</span>{<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">15</span>]}}, <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] };
<a name="l02842"></a>02842 <span class="vhdlkeyword">end</span>
<a name="l02843"></a>02843 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l02844"></a>02844 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>;
<a name="l02845"></a>02845 <span class="vhdlkeyword">end</span>
<a name="l02846"></a>02846 <span class="keyword">// CCR: no change</span>
<a name="l02847"></a>02847 <span class="vhdlkeyword">end</span>
<a name="l02848"></a>02848
<a name="l02849"></a>02849 <a class="code" href="ao68000_8v.html#ae497ab0b3e0550245c333bdb426d4236">`ALU_ARITHMETIC_LOGIC</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02850"></a>02850
<a name="l02851"></a>02851 <span class="keyword">// OR,OR to mem,OR to Dn</span>
<a name="l02852"></a>02852 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">0</span>]) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] | <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l02853"></a>02853 <span class="keyword">// AND,AND to mem,AND to Dn</span>
<a name="l02854"></a>02854 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">1</span>]) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] &amp; <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l02855"></a>02855 <span class="keyword">// EORI,EOR</span>
<a name="l02856"></a>02856 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">2</span>]) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] ^ <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l02857"></a>02857 <span class="keyword">// ADD,ADD to mem,ADD to Dn,ADDQ</span>
<a name="l02858"></a>02858 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">3</span>]) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] + <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l02859"></a>02859 <span class="keyword">// SUBI,CMPI,CMPM,SUB to mem,SUB to Dn,CMP,SUBQ</span>
<a name="l02860"></a>02860 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">4</span>] | <a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">5</span>]) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l02861"></a>02861
<a name="l02862"></a>02862 <span class="keyword">// Z</span>
<a name="l02863"></a>02863 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;
<a name="l02864"></a>02864 <span class="keyword">// N</span>
<a name="l02865"></a>02865 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l02866"></a>02866
<a name="l02867"></a>02867 <span class="keyword">// CMPI,CMPM,CMP</span>
<a name="l02868"></a>02868 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">5</span>]) <span class="vhdlkeyword">begin</span>
<a name="l02869"></a>02869 <span class="keyword">// C,V</span>
<a name="l02870"></a>02870 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
<a name="l02871"></a>02871 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= (~<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
<a name="l02872"></a>02872 <span class="keyword">// X not affected</span>
<a name="l02873"></a>02873 <span class="vhdlkeyword">end</span>
<a name="l02874"></a>02874 <span class="keyword">// ADDI,ADD to mem,ADD to Dn,ADDQ</span>
<a name="l02875"></a>02875 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">3</span>]) <span class="vhdlkeyword">begin</span>
<a name="l02876"></a>02876 <span class="keyword">// C,X,V</span>
<a name="l02877"></a>02877 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
<a name="l02878"></a>02878 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>); <span class="keyword">//=ccr[0];</span>
<a name="l02879"></a>02879 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>) | (~<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
<a name="l02880"></a>02880 <span class="vhdlkeyword">end</span>
<a name="l02881"></a>02881 <span class="keyword">// SUBI,SUB to mem,SUB to Dn,SUBQ</span>
<a name="l02882"></a>02882 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">4</span>]) <span class="vhdlkeyword">begin</span>
<a name="l02883"></a>02883 <span class="keyword">// C,X,V</span>
<a name="l02884"></a>02884 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
<a name="l02885"></a>02885 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>); <span class="keyword">//=ccr[0];</span>
<a name="l02886"></a>02886 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= (~<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
<a name="l02887"></a>02887 <span class="vhdlkeyword">end</span>
<a name="l02888"></a>02888 <span class="keyword">// ANDI,EORI,ORI,EOR,OR to mem,AND to mem,OR to Dn,AND to Dn</span>
<a name="l02889"></a>02889 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l02890"></a>02890 <span class="keyword">// C,V</span>
<a name="l02891"></a>02891 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02892"></a>02892 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02893"></a>02893 <span class="keyword">// X not affected</span>
<a name="l02894"></a>02894 <span class="vhdlkeyword">end</span>
<a name="l02895"></a>02895 <span class="vhdlkeyword">end</span>
<a name="l02896"></a>02896
<a name="l02897"></a>02897 <a class="code" href="ao68000_8v.html#ab6294988eed0a5e85d94de7c134351ec">`ALU_ABCD_SBCD_ADDX_SUBX_prepare</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02898"></a>02898 <span class="keyword">// ABCD</span>
<a name="l02899"></a>02899 <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">14</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">3&#39;b100</span>) <span class="vhdlkeyword">begin</span>
<a name="l02900"></a>02900 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] = {<span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>]} + {<span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>]} + {<span class="vhdllogic">4&#39;b0</span>, <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>]};
<a name="l02901"></a>02901 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] = {<span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>]} + {<span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>]};
<a name="l02902"></a>02902
<a name="l02903"></a>02903 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">23</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] + <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] + {<span class="vhdllogic">7&#39;b0</span>, <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>]};
<a name="l02904"></a>02904
<a name="l02905"></a>02905 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] = (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] &gt; <span class="vhdllogic">6&#39;d9</span>) ? (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] + <span class="vhdllogic">6&#39;d6</span>) : <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>];
<a name="l02906"></a>02906 <span class="vhdlkeyword">end</span>
<a name="l02907"></a>02907 <span class="keyword">// SBCD</span>
<a name="l02908"></a>02908 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">14</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">3&#39;b000</span> ) <span class="vhdlkeyword">begin</span>
<a name="l02909"></a>02909 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] = <span class="vhdllogic">6&#39;d32</span> + {<span class="vhdllogic">2&#39;b0</span>, <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>]} - {<span class="vhdllogic">2&#39;b0</span>, <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>]} - {<span class="vhdllogic">5&#39;b0</span>, <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>]};
<a name="l02910"></a>02910 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] = <span class="vhdllogic">6&#39;d32</span> + {<span class="vhdllogic">2&#39;b0</span>, <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>]} - {<span class="vhdllogic">2&#39;b0</span>, <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>]};
<a name="l02911"></a>02911
<a name="l02912"></a>02912 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">23</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] - {<span class="vhdllogic">7&#39;b0</span>, <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>]};
<a name="l02913"></a>02913
<a name="l02914"></a>02914 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] = (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] &lt; <span class="vhdllogic">6&#39;d32</span>) ? (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] - <span class="vhdllogic">6&#39;d6</span>) : <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>];
<a name="l02915"></a>02915 <span class="vhdlkeyword">end</span>
<a name="l02916"></a>02916 <span class="vhdlkeyword">end</span>
<a name="l02917"></a>02917
<a name="l02918"></a>02918 <a class="code" href="ao68000_8v.html#a3e54001e73374bd4f7cfda3de55bd944">`ALU_ABCD_SBCD_ADDX_SUBX</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02919"></a>02919 <span class="keyword">// ABCD</span>
<a name="l02920"></a>02920 <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">14</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">3&#39;b100</span>) <span class="vhdlkeyword">begin</span>
<a name="l02921"></a>02921 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] = (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] &gt; <span class="vhdllogic">6&#39;h1F</span>) ? (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] + <span class="vhdllogic">6&#39;d2</span>) :
<a name="l02922"></a>02922 (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] &gt; <span class="vhdllogic">6&#39;h0F</span>) ? (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] + <span class="vhdllogic">6&#39;d1</span>) :
<a name="l02923"></a>02923 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>];
<a name="l02924"></a>02924 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] = (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] &gt; <span class="vhdllogic">6&#39;d9</span>) ? (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] + <span class="vhdllogic">6&#39;d6</span>) : <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>];
<a name="l02925"></a>02925
<a name="l02926"></a>02926 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">23</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] - {<span class="vhdllogic">7&#39;b0</span>, <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>]};
<a name="l02927"></a>02927
<a name="l02928"></a>02928 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] = (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] &lt; <span class="vhdllogic">6&#39;d32</span>) ? (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] - <span class="vhdllogic">6&#39;d6</span>) : <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>];
<a name="l02929"></a>02929 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] = (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] &lt; <span class="vhdllogic">6&#39;d16</span>) ? (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] - <span class="vhdllogic">6&#39;d2</span>) :
<a name="l02930"></a>02930 (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] &lt; <span class="vhdllogic">6&#39;d32</span>) ? (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] - <span class="vhdllogic">6&#39;d1</span>) :
<a name="l02931"></a>02931 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>];
<a name="l02932"></a>02932 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] = (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] &lt; <span class="vhdllogic">6&#39;d32</span> &amp;&amp; <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>] == <span class="vhdllogic">1&#39;b1</span>) ? (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] - <span class="vhdllogic">6&#39;d6</span>) : <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>];
<a name="l02926"></a>02926 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>] = <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">17</span>:<span class="vhdllogic">14</span>];
<a name="l02927"></a>02927 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>];
<a name="l02928"></a>02928
<a name="l02929"></a>02929 <span class="keyword">// C</span>
<a name="l02930"></a>02930 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] &gt; <span class="vhdllogic">6&#39;d9</span>) ? <span class="vhdllogic">1&#39;b1</span> : <span class="vhdllogic">1&#39;b0</span>;
<a name="l02931"></a>02931 <span class="keyword">// X = C</span>
<a name="l02932"></a>02932 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] &lt;= (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] &gt; <span class="vhdllogic">6&#39;d9</span>) ? <span class="vhdllogic">1&#39;b1</span> : <span class="vhdllogic">1&#39;b0</span>;
<a name="l02933"></a>02933
<a name="l02934"></a>02934 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>] = <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">17</span>:<span class="vhdllogic">14</span>];
<a name="l02935"></a>02935 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>];
<a name="l02936"></a>02936
<a name="l02937"></a>02937 <span class="keyword">// C</span>
<a name="l02938"></a>02938 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] &lt; <span class="vhdllogic">6&#39;d32</span>) ? <span class="vhdllogic">1&#39;b1</span> : <span class="vhdllogic">1&#39;b0</span>;
<a name="l02939"></a>02939 <span class="keyword">// X = C</span>
<a name="l02940"></a>02940 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] &lt;= (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] &lt; <span class="vhdllogic">6&#39;d32</span>) ? <span class="vhdllogic">1&#39;b1</span> : <span class="vhdllogic">1&#39;b0</span>;
<a name="l02941"></a>02941
<a name="l02942"></a>02942 <span class="keyword">// V</span>
<a name="l02943"></a>02943 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">30</span>] == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>] == <span class="vhdllogic">1&#39;b0</span>) ? <span class="vhdllogic">1&#39;b1</span> : <span class="vhdllogic">1&#39;b0</span>;
<a name="l02944"></a>02944 <span class="vhdlkeyword">end</span>
<a name="l02945"></a>02945 <span class="keyword">// ADDX</span>
<a name="l02946"></a>02946 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">14</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">3&#39;b101</span> ) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] + <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] + <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>];
<a name="l02947"></a>02947 <span class="keyword">// SUBX</span>
<a name="l02948"></a>02948 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">14</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">3&#39;b001</span> ) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>];
<a name="l02949"></a>02949
<a name="l02950"></a>02950 <span class="keyword">// Z</span>
<a name="l02951"></a>02951 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &amp; <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;
<a name="l02952"></a>02952 <span class="keyword">// N</span>
<a name="l02953"></a>02953 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l02954"></a>02954
<a name="l02934"></a>02934 <span class="keyword">// V</span>
<a name="l02935"></a>02935 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">30</span>] == <span class="vhdllogic">1&#39;b0</span> &amp;&amp; <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>] == <span class="vhdllogic">1&#39;b1</span>) ? <span class="vhdllogic">1&#39;b1</span> : <span class="vhdllogic">1&#39;b0</span>;
<a name="l02936"></a>02936 <span class="vhdlkeyword">end</span>
<a name="l02937"></a>02937 <span class="keyword">// SBCD</span>
<a name="l02938"></a>02938 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">14</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">3&#39;b000</span> ) <span class="vhdlkeyword">begin</span>
<a name="l02939"></a>02939 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] = (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] &lt; <span class="vhdllogic">6&#39;d16</span>) ? (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] - <span class="vhdllogic">6&#39;d2</span>) :
<a name="l02940"></a>02940 (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] &lt; <span class="vhdllogic">6&#39;d32</span>) ? (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] - <span class="vhdllogic">6&#39;d1</span>) :
<a name="l02941"></a>02941 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>];
<a name="l02942"></a>02942 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] = (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] &lt; <span class="vhdllogic">6&#39;d32</span> &amp;&amp; <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>] == <span class="vhdllogic">1&#39;b1</span>) ? (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] - <span class="vhdllogic">6&#39;d6</span>) : <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>];
<a name="l02943"></a>02943
<a name="l02944"></a>02944 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>] = <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">17</span>:<span class="vhdllogic">14</span>];
<a name="l02945"></a>02945 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>];
<a name="l02946"></a>02946
<a name="l02947"></a>02947 <span class="keyword">// C</span>
<a name="l02948"></a>02948 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] &lt; <span class="vhdllogic">6&#39;d32</span>) ? <span class="vhdllogic">1&#39;b1</span> : <span class="vhdllogic">1&#39;b0</span>;
<a name="l02949"></a>02949 <span class="keyword">// X = C</span>
<a name="l02950"></a>02950 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] &lt;= (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] &lt; <span class="vhdllogic">6&#39;d32</span>) ? <span class="vhdllogic">1&#39;b1</span> : <span class="vhdllogic">1&#39;b0</span>;
<a name="l02951"></a>02951
<a name="l02952"></a>02952 <span class="keyword">// V</span>
<a name="l02953"></a>02953 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">30</span>] == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>] == <span class="vhdllogic">1&#39;b0</span>) ? <span class="vhdllogic">1&#39;b1</span> : <span class="vhdllogic">1&#39;b0</span>;
<a name="l02954"></a>02954 <span class="vhdlkeyword">end</span>
<a name="l02955"></a>02955 <span class="keyword">// ADDX</span>
<a name="l02956"></a>02956 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">14</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">3&#39;b101</span> ) <span class="vhdlkeyword">begin</span>
<a name="l02957"></a>02957 <span class="keyword">// C,X,V</span>
<a name="l02958"></a>02958 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
<a name="l02959"></a>02959 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>); <span class="keyword">//=ccr[0];</span>
<a name="l02960"></a>02960 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>) | (~<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
<a name="l02961"></a>02961 <span class="vhdlkeyword">end</span>
<a name="l02962"></a>02962 <span class="keyword">// SUBX</span>
<a name="l02963"></a>02963 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">14</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">3&#39;b001</span> ) <span class="vhdlkeyword">begin</span>
<a name="l02964"></a>02964 <span class="keyword">// C,X,V</span>
<a name="l02965"></a>02965 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
<a name="l02966"></a>02966 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>); <span class="keyword">//=ccr[0];</span>
<a name="l02967"></a>02967 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= (~<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
<a name="l02968"></a>02968 <span class="vhdlkeyword">end</span>
<a name="l02969"></a>02969 <span class="vhdlkeyword">end</span>
<a name="l02970"></a>02970
<a name="l02971"></a>02971 <a class="code" href="ao68000_8v.html#ac444f659b2726fd335e839dfadabbfe3">`ALU_ASL_LSL_ROL_ROXL_ASR_LSR_ROR_ROXR_prepare</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02972"></a>02972 <span class="keyword">// 32-bit load even for 8-bit and 16-bit operations</span>
<a name="l02973"></a>02973 <span class="keyword">// The extra bits will be anyway discarded during register / memory write</span>
<a name="l02974"></a>02974 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l02975"></a>02975
<a name="l02976"></a>02976 <span class="keyword">// V cleared</span>
<a name="l02977"></a>02977 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02978"></a>02978 <span class="keyword">// C for ROXL,ROXR: set to X</span>
<a name="l02979"></a>02979 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">11</span>] | <a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">15</span>]) <span class="vhdlkeyword">begin</span>
<a name="l02980"></a>02980 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>];
<a name="l02981"></a>02981 <span class="vhdlkeyword">end</span>
<a name="l02982"></a>02982 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l02983"></a>02983 <span class="keyword">// C cleared</span>
<a name="l02984"></a>02984 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02985"></a>02985 <span class="vhdlkeyword">end</span>
<a name="l02986"></a>02986
<a name="l02987"></a>02987 <span class="keyword">// N set</span>
<a name="l02988"></a>02988 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l02989"></a>02989 <span class="keyword">// Z set</span>
<a name="l02990"></a>02990 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;
<a name="l02991"></a>02991 <span class="vhdlkeyword">end</span>
<a name="l02992"></a>02992
<a name="l02993"></a>02993 <a class="code" href="ao68000_8v.html#ac946f278d039868214c441c11fcf2587">`ALU_ASL_LSL_ROL_ROXL_ASR_LSR_ROR_ROXR</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02994"></a>02994 <span class="keyword">// ASL / LSL / ROL / ROXL</span>
<a name="l02995"></a>02995 <span class="vhdlkeyword">if</span> (<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">8</span>] | <a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">9</span>] | <a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">10</span>] | <a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">11</span>]) <span class="vhdlkeyword">begin</span>
<a name="l02996"></a>02996 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = {<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">30</span>:<span class="vhdllogic">0</span>], <a class="code" href="classalu.html#ab2b982ee64f25838bec8dba77728dfd8">lbit</a>};
<a name="l02997"></a>02997
<a name="l02998"></a>02998 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>; <span class="keyword">// C for ASL / LSL / ROL / ROXL</span>
<a name="l02999"></a>02999 <span class="vhdlkeyword">if</span> (<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">8</span>])
<a name="l03000"></a>03000 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= (<a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b0</span>)? (<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> != <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) : <span class="vhdllogic">1&#39;b1</span>; <span class="keyword">// V for ASL</span>
<a name="l03001"></a>03001 <span class="vhdlkeyword">else</span>
<a name="l03002"></a>03002 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>; <span class="keyword">// V for LSL / ROL / ROXL</span>
<a name="l03003"></a>03003
<a name="l03004"></a>03004 <span class="vhdlkeyword">if</span> (!<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">10</span>]) <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] &lt;= <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>; <span class="keyword">// X for ASL / LSL / ROXL</span>
<a name="l03005"></a>03005 <span class="vhdlkeyword">end</span>
<a name="l03006"></a>03006 <span class="keyword">// ASR / LSR / ROR / ROXR</span>
<a name="l03007"></a>03007 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l03008"></a>03008 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">6</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">1</span>];
<a name="l03009"></a>03009 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>] = (<a class="code" href="classalu.html#a46ed8f8b6e397f2f7a0998fe482d4f37">size</a>[<span class="vhdllogic">0</span>]) ? <a class="code" href="classalu.html#a8035654de9f2902808f814526db0e1bc">rbit</a> : <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">8</span>];
<a name="l03010"></a>03010 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">14</span>:<span class="vhdllogic">8</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">9</span>];
<a name="l03011"></a>03011 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">15</span>] = (<a class="code" href="classalu.html#a46ed8f8b6e397f2f7a0998fe482d4f37">size</a>[<span class="vhdllogic">1</span>]) ? <a class="code" href="classalu.html#a8035654de9f2902808f814526db0e1bc">rbit</a> : <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">16</span>];
<a name="l03012"></a>03012 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">30</span>:<span class="vhdllogic">16</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">17</span>];
<a name="l03013"></a>03013 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>] = <a class="code" href="classalu.html#a8035654de9f2902808f814526db0e1bc">rbit</a>;
<a name="l03014"></a>03014 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">0</span>]; <span class="keyword">// C for ASR / LSR / ROR / ROXR</span>
<a name="l03015"></a>03015 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>; <span class="keyword">// V for ASR / LSR / ROR / ROXR</span>
<a name="l03016"></a>03016 <span class="vhdlkeyword">if</span> (!<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">14</span>]) <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">0</span>]; <span class="keyword">// X for ASR / LSR / ROXR</span>
<a name="l03017"></a>03017 <span class="vhdlkeyword">end</span>
<a name="l03018"></a>03018
<a name="l03019"></a>03019 <span class="keyword">// N set</span>
<a name="l03020"></a>03020 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l03021"></a>03021 <span class="keyword">// Z set</span>
<a name="l03022"></a>03022 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;
<a name="l03023"></a>03023 <span class="vhdlkeyword">end</span>
<a name="l03024"></a>03024
<a name="l03025"></a>03025 <a class="code" href="ao68000_8v.html#a268aa82704bd8f1c1548dfc69a12a951">`ALU_MOVE</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l03026"></a>03026 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>;
<a name="l02956"></a>02956 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">14</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">3&#39;b101</span> ) <span class="vhdlkeyword">begin</span>
<a name="l02957"></a>02957 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] + <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] + <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>];
<a name="l02958"></a>02958
<a name="l02959"></a>02959 <span class="keyword">// C,X,V</span>
<a name="l02960"></a>02960 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
<a name="l02961"></a>02961 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>); <span class="keyword">//=ccr[0];</span>
<a name="l02962"></a>02962 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>) | (~<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
<a name="l02963"></a>02963 <span class="vhdlkeyword">end</span>
<a name="l02964"></a>02964 <span class="keyword">// SUBX</span>
<a name="l02965"></a>02965 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">14</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">3&#39;b001</span> ) <span class="vhdlkeyword">begin</span>
<a name="l02966"></a>02966 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>];
<a name="l02967"></a>02967
<a name="l02968"></a>02968 <span class="keyword">// C,X,V</span>
<a name="l02969"></a>02969 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
<a name="l02970"></a>02970 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>); <span class="keyword">//=ccr[0];</span>
<a name="l02971"></a>02971 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= (~<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
<a name="l02972"></a>02972 <span class="vhdlkeyword">end</span>
<a name="l02973"></a>02973
<a name="l02974"></a>02974 <span class="keyword">// Z</span>
<a name="l02975"></a>02975 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &amp; <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;
<a name="l02976"></a>02976 <span class="keyword">// N</span>
<a name="l02977"></a>02977 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l02978"></a>02978 <span class="vhdlkeyword">end</span>
<a name="l02979"></a>02979
<a name="l02980"></a>02980 <a class="code" href="ao68000_8v.html#ac444f659b2726fd335e839dfadabbfe3">`ALU_ASL_LSL_ROL_ROXL_ASR_LSR_ROR_ROXR_prepare</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02981"></a>02981 <span class="keyword">// 32-bit load even for 8-bit and 16-bit operations</span>
<a name="l02982"></a>02982 <span class="keyword">// The extra bits will be anyway discarded during register / memory write</span>
<a name="l02983"></a>02983 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l02984"></a>02984
<a name="l02985"></a>02985 <span class="keyword">// V cleared</span>
<a name="l02986"></a>02986 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02987"></a>02987 <span class="keyword">// C for ROXL,ROXR: set to X</span>
<a name="l02988"></a>02988 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">11</span>] | <a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">15</span>]) <span class="vhdlkeyword">begin</span>
<a name="l02989"></a>02989 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>];
<a name="l02990"></a>02990 <span class="vhdlkeyword">end</span>
<a name="l02991"></a>02991 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l02992"></a>02992 <span class="keyword">// C cleared</span>
<a name="l02993"></a>02993 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02994"></a>02994 <span class="vhdlkeyword">end</span>
<a name="l02995"></a>02995
<a name="l02996"></a>02996 <span class="keyword">// N set</span>
<a name="l02997"></a>02997 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l02998"></a>02998 <span class="keyword">// Z set</span>
<a name="l02999"></a>02999 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;
<a name="l03000"></a>03000 <span class="vhdlkeyword">end</span>
<a name="l03001"></a>03001
<a name="l03002"></a>03002 <a class="code" href="ao68000_8v.html#ac946f278d039868214c441c11fcf2587">`ALU_ASL_LSL_ROL_ROXL_ASR_LSR_ROR_ROXR</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l03003"></a>03003 <span class="keyword">// ASL / LSL / ROL / ROXL</span>
<a name="l03004"></a>03004 <span class="vhdlkeyword">if</span> (<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">8</span>] | <a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">9</span>] | <a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">10</span>] | <a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">11</span>]) <span class="vhdlkeyword">begin</span>
<a name="l03005"></a>03005 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = {<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">30</span>:<span class="vhdllogic">0</span>], <a class="code" href="classalu.html#ab2b982ee64f25838bec8dba77728dfd8">lbit</a>};
<a name="l03006"></a>03006
<a name="l03007"></a>03007 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>; <span class="keyword">// C for ASL / LSL / ROL / ROXL</span>
<a name="l03008"></a>03008 <span class="vhdlkeyword">if</span> (<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">8</span>])
<a name="l03009"></a>03009 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= (<a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b0</span>)? (<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> != <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) : <span class="vhdllogic">1&#39;b1</span>; <span class="keyword">// V for ASL</span>
<a name="l03010"></a>03010 <span class="vhdlkeyword">else</span>
<a name="l03011"></a>03011 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>; <span class="keyword">// V for LSL / ROL / ROXL</span>
<a name="l03012"></a>03012
<a name="l03013"></a>03013 <span class="vhdlkeyword">if</span> (!<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">10</span>]) <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] &lt;= <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>; <span class="keyword">// X for ASL / LSL / ROXL</span>
<a name="l03014"></a>03014 <span class="vhdlkeyword">end</span>
<a name="l03015"></a>03015 <span class="keyword">// ASR / LSR / ROR / ROXR</span>
<a name="l03016"></a>03016 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l03017"></a>03017 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">6</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">1</span>];
<a name="l03018"></a>03018 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>] = (<a class="code" href="classalu.html#a46ed8f8b6e397f2f7a0998fe482d4f37">size</a>[<span class="vhdllogic">0</span>]) ? <a class="code" href="classalu.html#a8035654de9f2902808f814526db0e1bc">rbit</a> : <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">8</span>];
<a name="l03019"></a>03019 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">14</span>:<span class="vhdllogic">8</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">9</span>];
<a name="l03020"></a>03020 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">15</span>] = (<a class="code" href="classalu.html#a46ed8f8b6e397f2f7a0998fe482d4f37">size</a>[<span class="vhdllogic">1</span>]) ? <a class="code" href="classalu.html#a8035654de9f2902808f814526db0e1bc">rbit</a> : <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">16</span>];
<a name="l03021"></a>03021 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">30</span>:<span class="vhdllogic">16</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">17</span>];
<a name="l03022"></a>03022 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>] = <a class="code" href="classalu.html#a8035654de9f2902808f814526db0e1bc">rbit</a>;
<a name="l03023"></a>03023 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">0</span>]; <span class="keyword">// C for ASR / LSR / ROR / ROXR</span>
<a name="l03024"></a>03024 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>; <span class="keyword">// V for ASR / LSR / ROR / ROXR</span>
<a name="l03025"></a>03025 <span class="vhdlkeyword">if</span> (!<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">14</span>]) <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">0</span>]; <span class="keyword">// X for ASR / LSR / ROXR</span>
<a name="l03026"></a>03026 <span class="vhdlkeyword">end</span>
<a name="l03027"></a>03027
<a name="l03028"></a>03028 <span class="keyword">// X not affected</span>
<a name="l03029"></a>03029 <span class="keyword">// C cleared</span>
<a name="l03030"></a>03030 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03031"></a>03031 <span class="keyword">// V cleared</span>
<a name="l03032"></a>03032 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03028"></a>03028 <span class="keyword">// N set</span>
<a name="l03029"></a>03029 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l03030"></a>03030 <span class="keyword">// Z set</span>
<a name="l03031"></a>03031 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;
<a name="l03032"></a>03032 <span class="vhdlkeyword">end</span>
<a name="l03033"></a>03033
<a name="l03034"></a>03034 <span class="keyword">// N set</span>
<a name="l03035"></a>03035 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l03036"></a>03036 <span class="keyword">// Z set</span>
<a name="l03037"></a>03037 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;
<a name="l03038"></a>03038 <span class="vhdlkeyword">end</span>
<a name="l03039"></a>03039
<a name="l03040"></a>03040 <a class="code" href="ao68000_8v.html#a30a87601d2ca38286bb0d486d59f6a07">`ALU_ADDA_SUBA_CMPA_ADDQ_SUBQ</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l03041"></a>03041 <span class="keyword">// ADDA: 1101</span>
<a name="l03042"></a>03042 <span class="keyword">// CMPA: 1011</span>
<a name="l03043"></a>03043 <span class="keyword">// SUBA: 1001</span>
<a name="l03044"></a>03044 <span class="keyword">// ADDQ,SUBQ: 0101 xxx0,1</span>
<a name="l03045"></a>03045 <span class="keyword">// operation requires that operand2 was sign extended</span>
<a name="l03046"></a>03046
<a name="l03047"></a>03047 <span class="keyword">// ADDA,ADDQ</span>
<a name="l03048"></a>03048 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">6</span>]) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] + <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l03049"></a>03049 <span class="keyword">// SUBA,CMPA,SUBQ</span>
<a name="l03050"></a>03050 <span class="vhdlkeyword">else</span> <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l03051"></a>03051
<a name="l03052"></a>03052 <span class="keyword">// for CMPA</span>
<a name="l03053"></a>03053 <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1011</span> ) <span class="vhdlkeyword">begin</span>
<a name="l03054"></a>03054 <span class="keyword">// Z</span>
<a name="l03055"></a>03055 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;
<a name="l03056"></a>03056 <span class="keyword">// N</span>
<a name="l03057"></a>03057 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l03058"></a>03058
<a name="l03059"></a>03059 <span class="keyword">// C,V</span>
<a name="l03060"></a>03060 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
<a name="l03061"></a>03061 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= (~<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
<a name="l03062"></a>03062 <span class="keyword">// X not affected</span>
<a name="l03063"></a>03063 <span class="vhdlkeyword">end</span>
<a name="l03064"></a>03064 <span class="keyword">// for ADDA,SUBA,ADDQ,SUBQ: ccr not affected</span>
<a name="l03065"></a>03065 <span class="vhdlkeyword">end</span>
<a name="l03066"></a>03066
<a name="l03067"></a>03067 <a class="code" href="ao68000_8v.html#af0a4db089a5eb288abf9453ca2d79c26">`ALU_CHK</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l03068"></a>03068 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>];
<a name="l03069"></a>03069
<a name="l03070"></a>03070 <span class="keyword">// undocumented behavior: Z flag, see 68knotes.txt</span>
<a name="l03071"></a>03071 <span class="keyword">//sr[2] &lt;= (operand1[15:0] == 16&#39;b0) ? 1&#39;b1 : 1&#39;b0;</span>
<a name="l03072"></a>03072 <span class="keyword">// undocumented behavior: C,V flags, see 68knotes.txt</span>
<a name="l03073"></a>03073 <span class="keyword">//sr[0] &lt;= 1&#39;b0;</span>
<a name="l03074"></a>03074 <span class="keyword">//sr[1] &lt;= 1&#39;b0;</span>
<a name="l03075"></a>03075
<a name="l03076"></a>03076 <span class="keyword">// C,X,V</span>
<a name="l03077"></a>03077 <span class="keyword">// sr[0] &lt;= (`Sm &amp; ~`Dm) | (`Rm &amp; ~`Dm) | (`Sm &amp; `Rm);</span>
<a name="l03078"></a>03078 <span class="keyword">// sr[4] &lt;= (`Sm &amp; ~`Dm) | (`Rm &amp; ~`Dm) | (`Sm &amp; `Rm); //=ccr[0];</span>
<a name="l03079"></a>03079 <span class="keyword">// sr[1] &lt;= (~`Sm &amp; `Dm &amp; ~`Rm) | (`Sm &amp; ~`Dm &amp; `Rm);</span>
<a name="l03080"></a>03080 <span class="keyword">// +: 0-1, 0-0=0, 1-1=0</span>
<a name="l03081"></a>03081 <span class="keyword">// -: 0-0=1, 1-0, 1-1=1</span>
<a name="l03082"></a>03082 <span class="keyword">// operand1 - operand2 &gt; 0</span>
<a name="l03083"></a>03083 <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] != <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] &amp;&amp; ((~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span>) | (~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>)) == <span class="vhdllogic">1&#39;b1</span> ) <span class="vhdlkeyword">begin</span>
<a name="l03084"></a>03084 <span class="keyword">// clear N</span>
<a name="l03085"></a>03085 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03086"></a>03086 <a class="code" href="classalu.html#ad39d03bb22df22560c4f5dc796382313">alu_signal</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l03087"></a>03087 <span class="vhdlkeyword">end</span>
<a name="l03088"></a>03088 <span class="keyword">// operand1 &lt; 0</span>
<a name="l03089"></a>03089 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">15</span>] == <span class="vhdllogic">1&#39;b1</span> ) <span class="vhdlkeyword">begin</span>
<a name="l03090"></a>03090 <span class="keyword">// set N</span>
<a name="l03091"></a>03091 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l03092"></a>03092 <a class="code" href="classalu.html#ad39d03bb22df22560c4f5dc796382313">alu_signal</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l03093"></a>03093 <span class="vhdlkeyword">end</span>
<a name="l03094"></a>03094 <span class="keyword">// no trap</span>
<a name="l03095"></a>03095 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l03096"></a>03096 <span class="keyword">// N undefined: not affected</span>
<a name="l03097"></a>03097 <a class="code" href="classalu.html#ad39d03bb22df22560c4f5dc796382313">alu_signal</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03098"></a>03098 <span class="vhdlkeyword">end</span>
<a name="l03099"></a>03099
<a name="l03100"></a>03100 <span class="keyword">// X not affected</span>
<a name="l03101"></a>03101 <span class="vhdlkeyword">end</span>
<a name="l03102"></a>03102
<a name="l03103"></a>03103 <a class="code" href="ao68000_8v.html#aed07d190bb88f0cce7768028698020f9">`ALU_MULS_MULU_DIVS_DIVU</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l03104"></a>03104
<a name="l03105"></a>03105 <span class="keyword">// division by 0</span>
<a name="l03106"></a>03106 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1000</span> &amp;&amp; <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0</span>) <span class="vhdlkeyword">begin</span>
<a name="l03107"></a>03107 <span class="keyword">// X not affected</span>
<a name="l03108"></a>03108 <span class="keyword">// C cleared</span>
<a name="l03109"></a>03109 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03110"></a>03110 <span class="keyword">// V,Z,N undefined: cleared</span>
<a name="l03111"></a>03111 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03112"></a>03112 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03113"></a>03113 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03114"></a>03114
<a name="l03115"></a>03115 <span class="keyword">// set trap</span>
<a name="l03116"></a>03116 <a class="code" href="classalu.html#ad39d03bb22df22560c4f5dc796382313">alu_signal</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l03117"></a>03117 <span class="vhdlkeyword">end</span>
<a name="l03118"></a>03118 <span class="keyword">// division in idle state</span>
<a name="l03119"></a>03119 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1000</span> &amp;&amp; <a class="code" href="classalu.html#a3a2dd2d9816dba2aebe4a5cf5eeed521">div_count</a> == <span class="vhdllogic">5&#39;d0</span>) <span class="vhdlkeyword">begin</span>
<a name="l03120"></a>03120 <a class="code" href="classalu.html#ad39d03bb22df22560c4f5dc796382313">alu_signal</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03121"></a>03121 <span class="vhdlkeyword">end</span>
<a name="l03122"></a>03122 <span class="keyword">// division overflow: divu, divs</span>
<a name="l03123"></a>03123 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1000</span> &amp;&amp; <a class="code" href="classalu.html#abad1e1ed5e810e1a31e16550349b6bfb">div_overflow</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l03124"></a>03124 <span class="keyword">// X not affected</span>
<a name="l03125"></a>03125 <span class="keyword">// C cleared</span>
<a name="l03126"></a>03126 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03127"></a>03127 <span class="keyword">// V set</span>
<a name="l03128"></a>03128 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l03129"></a>03129 <span class="keyword">// Z,N undefined: cleared and set</span>
<a name="l03130"></a>03130 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03131"></a>03131 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l03132"></a>03132
<a name="l03133"></a>03133 <span class="keyword">// set trap</span>
<a name="l03134"></a>03134 <a class="code" href="classalu.html#ad39d03bb22df22560c4f5dc796382313">alu_signal</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l03135"></a>03135 <span class="vhdlkeyword">end</span>
<a name="l03136"></a>03136 <span class="keyword">// division</span>
<a name="l03137"></a>03137 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1000</span> ) <span class="vhdlkeyword">begin</span>
<a name="l03138"></a>03138 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] &lt;= {<a class="code" href="classalu.html#a3b4ed364cf9180375a05991a64005ea7">div_remainder</a>, <a class="code" href="classalu.html#a66f6b0eb96212740619af0f057d33546">div_quotient</a>};
<a name="l03139"></a>03139
<a name="l03140"></a>03140 <span class="keyword">// X not affected</span>
<a name="l03141"></a>03141 <span class="keyword">// C cleared</span>
<a name="l03142"></a>03142 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03143"></a>03143 <span class="keyword">// V cleared</span>
<a name="l03144"></a>03144 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03145"></a>03145 <span class="keyword">// Z</span>
<a name="l03146"></a>03146 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= (<a class="code" href="classalu.html#a66f6b0eb96212740619af0f057d33546">div_quotient</a> == <span class="vhdllogic">16&#39;b0</span>);
<a name="l03147"></a>03147 <span class="keyword">// N</span>
<a name="l03148"></a>03148 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= (<a class="code" href="classalu.html#a66f6b0eb96212740619af0f057d33546">div_quotient</a>[<span class="vhdllogic">15</span>] == <span class="vhdllogic">1&#39;b1</span>);
<a name="l03149"></a>03149
<a name="l03150"></a>03150 <span class="keyword">// set trap</span>
<a name="l03151"></a>03151 <a class="code" href="classalu.html#ad39d03bb22df22560c4f5dc796382313">alu_signal</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03152"></a>03152 <span class="vhdlkeyword">end</span>
<a name="l03153"></a>03153 <span class="keyword">// multiplication</span>
<a name="l03154"></a>03154 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1100</span> ) <span class="vhdlkeyword">begin</span>
<a name="l03155"></a>03155 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#ac1b8a2e6c2bb6a12b10db4250f56135e">mult_result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l03156"></a>03156
<a name="l03157"></a>03157 <span class="keyword">// X not affected</span>
<a name="l03158"></a>03158 <span class="keyword">// C cleared</span>
<a name="l03159"></a>03159 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03160"></a>03160 <span class="keyword">// V cleared</span>
<a name="l03161"></a>03161 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03162"></a>03162 <span class="keyword">// Z</span>
<a name="l03163"></a>03163 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= (<a class="code" href="classalu.html#ac1b8a2e6c2bb6a12b10db4250f56135e">mult_result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">32&#39;b0</span>);
<a name="l03164"></a>03164 <span class="keyword">// N</span>
<a name="l03165"></a>03165 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= (<a class="code" href="classalu.html#ac1b8a2e6c2bb6a12b10db4250f56135e">mult_result</a>[<span class="vhdllogic">31</span>] == <span class="vhdllogic">1&#39;b1</span>);
<a name="l03166"></a>03166
<a name="l03167"></a>03167 <span class="keyword">// set trap</span>
<a name="l03168"></a>03168 <a class="code" href="classalu.html#ad39d03bb22df22560c4f5dc796382313">alu_signal</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03169"></a>03169 <span class="vhdlkeyword">end</span>
<a name="l03170"></a>03170 <span class="vhdlkeyword">end</span>
<a name="l03171"></a>03171
<a name="l03172"></a>03172
<a name="l03173"></a>03173 <a class="code" href="ao68000_8v.html#a14b85ce3e5b4ede3b2c4e89f420c8c3c">`ALU_BCHG_BCLR_BSET_BTST</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span> <span class="keyword">// 97 LE</span>
<a name="l03174"></a>03174 <span class="keyword">// byte</span>
<a name="l03175"></a>03175 <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b000</span> ) <span class="vhdlkeyword">begin</span>
<a name="l03176"></a>03176 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= ~(<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[ <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] ]);
<a name="l03177"></a>03177 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>;
<a name="l03178"></a>03178 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[ <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] ] = (<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b01</span>) ? ~(<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[ <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] ]) : (<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b10</span>) ? <span class="vhdllogic">1&#39;b0</span> : <span class="vhdllogic">1&#39;b1</span>;
<a name="l03179"></a>03179 <span class="vhdlkeyword">end</span>
<a name="l03180"></a>03180 <span class="keyword">// long</span>
<a name="l03181"></a>03181 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b000</span> ) <span class="vhdlkeyword">begin</span>
<a name="l03182"></a>03182 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= ~(<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[ <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">0</span>] ]);
<a name="l03183"></a>03183 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>;
<a name="l03184"></a>03184 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[ <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">0</span>] ] = (<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b01</span>) ? ~(<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[ <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">0</span>] ]) : (<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b10</span>) ? <span class="vhdllogic">1&#39;b0</span> : <span class="vhdllogic">1&#39;b1</span>;
<a name="l03185"></a>03185 <span class="vhdlkeyword">end</span>
<a name="l03186"></a>03186
<a name="l03187"></a>03187 <span class="keyword">// C,V,N,X not affected</span>
<a name="l03188"></a>03188 <span class="vhdlkeyword">end</span>
<a name="l03189"></a>03189
<a name="l03190"></a>03190 <a class="code" href="ao68000_8v.html#ac7de3ab6c8eec4381bde5e4f61b45761">`ALU_TAS</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l03191"></a>03191 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= { <span class="vhdllogic">1&#39;b1</span>, <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">6</span>:<span class="vhdllogic">0</span>] };
<a name="l03192"></a>03192
<a name="l03193"></a>03193 <span class="keyword">// X not affected</span>
<a name="l03194"></a>03194 <span class="keyword">// C cleared</span>
<a name="l03195"></a>03195 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03196"></a>03196 <span class="keyword">// V cleared</span>
<a name="l03197"></a>03197 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03034"></a>03034 <a class="code" href="ao68000_8v.html#a268aa82704bd8f1c1548dfc69a12a951">`ALU_MOVE</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l03035"></a>03035 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>;
<a name="l03036"></a>03036
<a name="l03037"></a>03037 <span class="keyword">// X not affected</span>
<a name="l03038"></a>03038 <span class="keyword">// C cleared</span>
<a name="l03039"></a>03039 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03040"></a>03040 <span class="keyword">// V cleared</span>
<a name="l03041"></a>03041 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03042"></a>03042
<a name="l03043"></a>03043 <span class="keyword">// N set</span>
<a name="l03044"></a>03044 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l03045"></a>03045 <span class="keyword">// Z set</span>
<a name="l03046"></a>03046 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;
<a name="l03047"></a>03047 <span class="vhdlkeyword">end</span>
<a name="l03048"></a>03048
<a name="l03049"></a>03049 <a class="code" href="ao68000_8v.html#a30a87601d2ca38286bb0d486d59f6a07">`ALU_ADDA_SUBA_CMPA_ADDQ_SUBQ</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l03050"></a>03050 <span class="keyword">// ADDA: 1101</span>
<a name="l03051"></a>03051 <span class="keyword">// CMPA: 1011</span>
<a name="l03052"></a>03052 <span class="keyword">// SUBA: 1001</span>
<a name="l03053"></a>03053 <span class="keyword">// ADDQ,SUBQ: 0101 xxx0,1</span>
<a name="l03054"></a>03054 <span class="keyword">// operation requires that operand2 was sign extended</span>
<a name="l03055"></a>03055
<a name="l03056"></a>03056 <span class="keyword">// ADDA,ADDQ</span>
<a name="l03057"></a>03057 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">6</span>]) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] + <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l03058"></a>03058 <span class="keyword">// SUBA,CMPA,SUBQ</span>
<a name="l03059"></a>03059 <span class="vhdlkeyword">else</span> <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l03060"></a>03060
<a name="l03061"></a>03061 <span class="keyword">// for CMPA</span>
<a name="l03062"></a>03062 <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1011</span> ) <span class="vhdlkeyword">begin</span>
<a name="l03063"></a>03063 <span class="keyword">// Z</span>
<a name="l03064"></a>03064 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;
<a name="l03065"></a>03065 <span class="keyword">// N</span>
<a name="l03066"></a>03066 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l03067"></a>03067
<a name="l03068"></a>03068 <span class="keyword">// C,V</span>
<a name="l03069"></a>03069 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
<a name="l03070"></a>03070 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= (~<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
<a name="l03071"></a>03071 <span class="keyword">// X not affected</span>
<a name="l03072"></a>03072 <span class="vhdlkeyword">end</span>
<a name="l03073"></a>03073 <span class="keyword">// for ADDA,SUBA,ADDQ,SUBQ: ccr not affected</span>
<a name="l03074"></a>03074 <span class="vhdlkeyword">end</span>
<a name="l03075"></a>03075
<a name="l03076"></a>03076 <a class="code" href="ao68000_8v.html#af0a4db089a5eb288abf9453ca2d79c26">`ALU_CHK</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l03077"></a>03077 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>];
<a name="l03078"></a>03078
<a name="l03079"></a>03079 <span class="keyword">// undocumented behavior: Z flag, see 68knotes.txt</span>
<a name="l03080"></a>03080 <span class="keyword">//sr[2] &lt;= (operand1[15:0] == 16&#39;b0) ? 1&#39;b1 : 1&#39;b0;</span>
<a name="l03081"></a>03081 <span class="keyword">// undocumented behavior: C,V flags, see 68knotes.txt</span>
<a name="l03082"></a>03082 <span class="keyword">//sr[0] &lt;= 1&#39;b0;</span>
<a name="l03083"></a>03083 <span class="keyword">//sr[1] &lt;= 1&#39;b0;</span>
<a name="l03084"></a>03084
<a name="l03085"></a>03085 <span class="keyword">// C,X,V</span>
<a name="l03086"></a>03086 <span class="keyword">// sr[0] &lt;= (`Sm &amp; ~`Dm) | (`Rm &amp; ~`Dm) | (`Sm &amp; `Rm);</span>
<a name="l03087"></a>03087 <span class="keyword">// sr[4] &lt;= (`Sm &amp; ~`Dm) | (`Rm &amp; ~`Dm) | (`Sm &amp; `Rm); //=ccr[0];</span>
<a name="l03088"></a>03088 <span class="keyword">// sr[1] &lt;= (~`Sm &amp; `Dm &amp; ~`Rm) | (`Sm &amp; ~`Dm &amp; `Rm);</span>
<a name="l03089"></a>03089 <span class="keyword">// +: 0-1, 0-0=0, 1-1=0</span>
<a name="l03090"></a>03090 <span class="keyword">// -: 0-0=1, 1-0, 1-1=1</span>
<a name="l03091"></a>03091 <span class="keyword">// operand1 - operand2 &gt; 0</span>
<a name="l03092"></a>03092 <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] != <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] &amp;&amp; ((~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span>) | (~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>)) == <span class="vhdllogic">1&#39;b1</span> ) <span class="vhdlkeyword">begin</span>
<a name="l03093"></a>03093 <span class="keyword">// clear N</span>
<a name="l03094"></a>03094 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03095"></a>03095 <a class="code" href="classalu.html#ad39d03bb22df22560c4f5dc796382313">alu_signal</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l03096"></a>03096 <span class="vhdlkeyword">end</span>
<a name="l03097"></a>03097 <span class="keyword">// operand1 &lt; 0</span>
<a name="l03098"></a>03098 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">15</span>] == <span class="vhdllogic">1&#39;b1</span> ) <span class="vhdlkeyword">begin</span>
<a name="l03099"></a>03099 <span class="keyword">// set N</span>
<a name="l03100"></a>03100 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l03101"></a>03101 <a class="code" href="classalu.html#ad39d03bb22df22560c4f5dc796382313">alu_signal</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l03102"></a>03102 <span class="vhdlkeyword">end</span>
<a name="l03103"></a>03103 <span class="keyword">// no trap</span>
<a name="l03104"></a>03104 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l03105"></a>03105 <span class="keyword">// N undefined: not affected</span>
<a name="l03106"></a>03106 <a class="code" href="classalu.html#ad39d03bb22df22560c4f5dc796382313">alu_signal</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03107"></a>03107 <span class="vhdlkeyword">end</span>
<a name="l03108"></a>03108
<a name="l03109"></a>03109 <span class="keyword">// X not affected</span>
<a name="l03110"></a>03110 <span class="vhdlkeyword">end</span>
<a name="l03111"></a>03111
<a name="l03112"></a>03112 <a class="code" href="ao68000_8v.html#aed07d190bb88f0cce7768028698020f9">`ALU_MULS_MULU_DIVS_DIVU</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l03113"></a>03113
<a name="l03114"></a>03114 <span class="keyword">// division by 0</span>
<a name="l03115"></a>03115 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1000</span> &amp;&amp; <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0</span>) <span class="vhdlkeyword">begin</span>
<a name="l03116"></a>03116 <span class="keyword">// X not affected</span>
<a name="l03117"></a>03117 <span class="keyword">// C cleared</span>
<a name="l03118"></a>03118 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03119"></a>03119 <span class="keyword">// V,Z,N undefined: cleared</span>
<a name="l03120"></a>03120 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03121"></a>03121 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03122"></a>03122 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03123"></a>03123
<a name="l03124"></a>03124 <span class="keyword">// set trap</span>
<a name="l03125"></a>03125 <a class="code" href="classalu.html#ad39d03bb22df22560c4f5dc796382313">alu_signal</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l03126"></a>03126 <span class="vhdlkeyword">end</span>
<a name="l03127"></a>03127 <span class="keyword">// division in idle state</span>
<a name="l03128"></a>03128 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1000</span> &amp;&amp; <a class="code" href="classalu.html#a3a2dd2d9816dba2aebe4a5cf5eeed521">div_count</a> == <span class="vhdllogic">5&#39;d0</span>) <span class="vhdlkeyword">begin</span>
<a name="l03129"></a>03129 <a class="code" href="classalu.html#ad39d03bb22df22560c4f5dc796382313">alu_signal</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03130"></a>03130 <span class="vhdlkeyword">end</span>
<a name="l03131"></a>03131 <span class="keyword">// division overflow: divu, divs</span>
<a name="l03132"></a>03132 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1000</span> &amp;&amp; <a class="code" href="classalu.html#abad1e1ed5e810e1a31e16550349b6bfb">div_overflow</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l03133"></a>03133 <span class="keyword">// X not affected</span>
<a name="l03134"></a>03134 <span class="keyword">// C cleared</span>
<a name="l03135"></a>03135 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03136"></a>03136 <span class="keyword">// V set</span>
<a name="l03137"></a>03137 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l03138"></a>03138 <span class="keyword">// Z,N undefined: cleared and set</span>
<a name="l03139"></a>03139 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03140"></a>03140 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l03141"></a>03141
<a name="l03142"></a>03142 <span class="keyword">// set trap</span>
<a name="l03143"></a>03143 <a class="code" href="classalu.html#ad39d03bb22df22560c4f5dc796382313">alu_signal</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l03144"></a>03144 <span class="vhdlkeyword">end</span>
<a name="l03145"></a>03145 <span class="keyword">// division</span>
<a name="l03146"></a>03146 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1000</span> ) <span class="vhdlkeyword">begin</span>
<a name="l03147"></a>03147 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] &lt;= {<a class="code" href="classalu.html#a3b4ed364cf9180375a05991a64005ea7">div_remainder</a>, <a class="code" href="classalu.html#a66f6b0eb96212740619af0f057d33546">div_quotient</a>};
<a name="l03148"></a>03148
<a name="l03149"></a>03149 <span class="keyword">// X not affected</span>
<a name="l03150"></a>03150 <span class="keyword">// C cleared</span>
<a name="l03151"></a>03151 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03152"></a>03152 <span class="keyword">// V cleared</span>
<a name="l03153"></a>03153 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03154"></a>03154 <span class="keyword">// Z</span>
<a name="l03155"></a>03155 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= (<a class="code" href="classalu.html#a66f6b0eb96212740619af0f057d33546">div_quotient</a> == <span class="vhdllogic">16&#39;b0</span>);
<a name="l03156"></a>03156 <span class="keyword">// N</span>
<a name="l03157"></a>03157 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= (<a class="code" href="classalu.html#a66f6b0eb96212740619af0f057d33546">div_quotient</a>[<span class="vhdllogic">15</span>] == <span class="vhdllogic">1&#39;b1</span>);
<a name="l03158"></a>03158
<a name="l03159"></a>03159 <span class="keyword">// set trap</span>
<a name="l03160"></a>03160 <a class="code" href="classalu.html#ad39d03bb22df22560c4f5dc796382313">alu_signal</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03161"></a>03161 <span class="vhdlkeyword">end</span>
<a name="l03162"></a>03162 <span class="keyword">// multiplication</span>
<a name="l03163"></a>03163 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1100</span> ) <span class="vhdlkeyword">begin</span>
<a name="l03164"></a>03164 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#ac1b8a2e6c2bb6a12b10db4250f56135e">mult_result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l03165"></a>03165
<a name="l03166"></a>03166 <span class="keyword">// X not affected</span>
<a name="l03167"></a>03167 <span class="keyword">// C cleared</span>
<a name="l03168"></a>03168 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03169"></a>03169 <span class="keyword">// V cleared</span>
<a name="l03170"></a>03170 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03171"></a>03171 <span class="keyword">// Z</span>
<a name="l03172"></a>03172 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= (<a class="code" href="classalu.html#ac1b8a2e6c2bb6a12b10db4250f56135e">mult_result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">32&#39;b0</span>);
<a name="l03173"></a>03173 <span class="keyword">// N</span>
<a name="l03174"></a>03174 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= (<a class="code" href="classalu.html#ac1b8a2e6c2bb6a12b10db4250f56135e">mult_result</a>[<span class="vhdllogic">31</span>] == <span class="vhdllogic">1&#39;b1</span>);
<a name="l03175"></a>03175
<a name="l03176"></a>03176 <span class="keyword">// set trap</span>
<a name="l03177"></a>03177 <a class="code" href="classalu.html#ad39d03bb22df22560c4f5dc796382313">alu_signal</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03178"></a>03178 <span class="vhdlkeyword">end</span>
<a name="l03179"></a>03179 <span class="vhdlkeyword">end</span>
<a name="l03180"></a>03180
<a name="l03181"></a>03181
<a name="l03182"></a>03182 <a class="code" href="ao68000_8v.html#a14b85ce3e5b4ede3b2c4e89f420c8c3c">`ALU_BCHG_BCLR_BSET_BTST</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span> <span class="keyword">// 97 LE</span>
<a name="l03183"></a>03183 <span class="keyword">// byte</span>
<a name="l03184"></a>03184 <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b000</span> ) <span class="vhdlkeyword">begin</span>
<a name="l03185"></a>03185 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= ~(<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[ <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] ]);
<a name="l03186"></a>03186 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>;
<a name="l03187"></a>03187 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[ <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] ] = (<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b01</span>) ? ~(<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[ <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] ]) : (<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b10</span>) ? <span class="vhdllogic">1&#39;b0</span> : <span class="vhdllogic">1&#39;b1</span>;
<a name="l03188"></a>03188 <span class="vhdlkeyword">end</span>
<a name="l03189"></a>03189 <span class="keyword">// long</span>
<a name="l03190"></a>03190 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b000</span> ) <span class="vhdlkeyword">begin</span>
<a name="l03191"></a>03191 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= ~(<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[ <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">0</span>] ]);
<a name="l03192"></a>03192 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>;
<a name="l03193"></a>03193 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[ <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">0</span>] ] = (<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b01</span>) ? ~(<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[ <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">0</span>] ]) : (<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b10</span>) ? <span class="vhdllogic">1&#39;b0</span> : <span class="vhdllogic">1&#39;b1</span>;
<a name="l03194"></a>03194 <span class="vhdlkeyword">end</span>
<a name="l03195"></a>03195
<a name="l03196"></a>03196 <span class="keyword">// C,V,N,X not affected</span>
<a name="l03197"></a>03197 <span class="vhdlkeyword">end</span>
<a name="l03198"></a>03198
<a name="l03199"></a>03199 <span class="keyword">// N set</span>
<a name="l03200"></a>03200 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= (<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>] == <span class="vhdllogic">1&#39;b1</span>);
<a name="l03201"></a>03201 <span class="keyword">// Z set</span>
<a name="l03202"></a>03202 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= (<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">8&#39;b0</span>);
<a name="l03203"></a>03203 <span class="vhdlkeyword">end</span>
<a name="l03204"></a>03204
<a name="l03205"></a>03205
<a name="l03206"></a>03206 <a class="code" href="ao68000_8v.html#a07c7e53af3f4995a167966ba18c2728f">`ALU_NEGX_CLR_NEG_NOT_NBCD_SWAP_EXT</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l03207"></a>03207 <span class="keyword">// NEGX / CLR / NEG / NOT</span>
<a name="l03208"></a>03208 <span class="keyword">// Optimization thanks to Frederic Requin</span>
<a name="l03209"></a>03209 <span class="vhdlkeyword">if</span> ((<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0000</span>) || (<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0010</span>) || (<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0100</span>) || (<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0110</span>))
<a name="l03210"></a>03210 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> = <span class="vhdllogic">32&#39;b0</span> - (<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] &amp; {<span class="vhdllogic">32</span>{<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">10</span>] | ~<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">9</span>]}}) - ((<a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] &amp; ~<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">10</span>] &amp; ~<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">9</span>]) | (<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">10</span>] &amp; <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">9</span>]));
<a name="l03211"></a>03211 <span class="keyword">// NBCD</span>
<a name="l03212"></a>03212 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">6&#39;b1000_00</span> ) <span class="vhdlkeyword">begin</span>
<a name="l03213"></a>03213 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] = <span class="vhdllogic">5&#39;d25</span> - <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>];
<a name="l03214"></a>03214 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>] = (<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] &gt; <span class="vhdllogic">4&#39;d9</span>) ? (<span class="vhdllogic">5&#39;d24</span> - <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>]) : (<span class="vhdllogic">5&#39;d25</span> - <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>]);
<a name="l03215"></a>03215
<a name="l03216"></a>03216 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] == <span class="vhdllogic">1&#39;b0</span> &amp;&amp; <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">4&#39;d9</span> &amp;&amp; <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>] == <span class="vhdllogic">4&#39;d9</span>) <span class="vhdlkeyword">begin</span>
<a name="l03217"></a>03217 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] = <span class="vhdllogic">4&#39;d0</span>;
<a name="l03218"></a>03218 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>] = <span class="vhdllogic">4&#39;d0</span>;
<a name="l03219"></a>03219 <span class="vhdlkeyword">end</span>
<a name="l03220"></a>03220 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] == <span class="vhdllogic">1&#39;b0</span> &amp;&amp; (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">4&#39;d9</span> || <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">4&#39;d15</span>)) <span class="vhdlkeyword">begin</span>
<a name="l03221"></a>03221 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] = <span class="vhdllogic">4&#39;d0</span>;
<a name="l03222"></a>03222 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>] = <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>] + <span class="vhdllogic">4&#39;d1</span>;
<a name="l03223"></a>03223 <span class="vhdlkeyword">end</span>
<a name="l03224"></a>03224 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>
<a name="l03225"></a>03225 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] + <span class="vhdllogic">4&#39;d1</span>;
<a name="l03226"></a>03226 <span class="vhdlkeyword">end</span>
<a name="l03227"></a>03227
<a name="l03228"></a>03228 <span class="keyword">//V undefined: unchanged</span>
<a name="l03229"></a>03229 <span class="keyword">//Z</span>
<a name="l03230"></a>03230 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &amp; <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;
<a name="l03231"></a>03231 <span class="keyword">//C,X</span>
<a name="l03232"></a>03232 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">8&#39;d0</span> &amp;&amp; <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] == <span class="vhdllogic">1&#39;b0</span>) ? <span class="vhdllogic">1&#39;b0</span> : <span class="vhdllogic">1&#39;b1</span>;
<a name="l03233"></a>03233 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] &lt;= (<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">8&#39;d0</span> &amp;&amp; <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] == <span class="vhdllogic">1&#39;b0</span>) ? <span class="vhdllogic">1&#39;b0</span> : <span class="vhdllogic">1&#39;b1</span>; <span class="keyword">//=C</span>
<a name="l03234"></a>03234 <span class="vhdlkeyword">end</span>
<a name="l03235"></a>03235 <span class="keyword">// SWAP</span>
<a name="l03236"></a>03236 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">6&#39;b1000_01</span> ) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> = { <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>], <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">16</span>] };
<a name="l03237"></a>03237 <span class="keyword">// EXT byte to word</span>
<a name="l03238"></a>03238 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">6&#39;b1000_10</span> ) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> = { <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">16</span>], {<span class="vhdllogic">8</span>{<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>]}}, <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] };
<a name="l03239"></a>03239 <span class="keyword">// EXT word to long</span>
<a name="l03240"></a>03240 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">6&#39;b1000_11</span> ) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> = { {<span class="vhdllogic">16</span>{<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">15</span>]}}, <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] };
<a name="l03241"></a>03241
<a name="l03242"></a>03242 <span class="keyword">// N set if negative else clear</span>
<a name="l03243"></a>03243 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l03244"></a>03244
<a name="l03245"></a>03245 <span class="keyword">// CLR,NOT,SWAP,EXT</span>
<a name="l03246"></a>03246 <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0010</span> || <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0110</span> || <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">6&#39;b1000_01</span> || <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">7</span>] == <span class="vhdllogic">5&#39;b1000_1</span> ) <span class="vhdlkeyword">begin</span>
<a name="l03247"></a>03247 <span class="keyword">// X not affected</span>
<a name="l03248"></a>03248 <span class="keyword">// C,V cleared</span>
<a name="l03249"></a>03249 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03250"></a>03250 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03251"></a>03251 <span class="keyword">// Z set</span>
<a name="l03252"></a>03252 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;
<a name="l03253"></a>03253 <span class="vhdlkeyword">end</span>
<a name="l03254"></a>03254 <span class="keyword">// NEGX</span>
<a name="l03255"></a>03255 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0000</span> ) <span class="vhdlkeyword">begin</span>
<a name="l03256"></a>03256 <span class="keyword">// C set if borrow</span>
<a name="l03257"></a>03257 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> | <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l03258"></a>03258 <span class="keyword">// X=C</span>
<a name="l03259"></a>03259 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] &lt;= <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> | <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l03260"></a>03260 <span class="keyword">// V set if overflow</span>
<a name="l03261"></a>03261 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l03262"></a>03262 <span class="keyword">// Z cleared if nonzero else unchanged</span>
<a name="l03263"></a>03263 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &amp; <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;
<a name="l03264"></a>03264 <span class="vhdlkeyword">end</span>
<a name="l03265"></a>03265 <span class="keyword">// NEG</span>
<a name="l03266"></a>03266 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0100</span> ) <span class="vhdlkeyword">begin</span>
<a name="l03267"></a>03267 <span class="keyword">// C clear if zero else set</span>
<a name="l03268"></a>03268 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> | <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l03269"></a>03269 <span class="keyword">// X=C</span>
<a name="l03270"></a>03270 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] &lt;= <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> | <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l03271"></a>03271 <span class="keyword">// V set if overflow</span>
<a name="l03272"></a>03272 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l03273"></a>03273 <span class="keyword">// Z set if zero else clear</span>
<a name="l03274"></a>03274 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;
<a name="l03275"></a>03275 <span class="vhdlkeyword">end</span>
<a name="l03276"></a>03276 <span class="vhdlkeyword">end</span>
<a name="l03277"></a>03277
<a name="l03278"></a>03278
<a name="l03279"></a>03279 <a class="code" href="ao68000_8v.html#a32c0e163ff437b07e40593ab59e42fe3">`ALU_SIMPLE_LONG_ADD</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l03280"></a>03280 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] + <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l03281"></a>03281
<a name="l03282"></a>03282 <span class="keyword">// CCR not affected</span>
<a name="l03283"></a>03283 <span class="vhdlkeyword">end</span>
<a name="l03284"></a>03284
<a name="l03285"></a>03285 <a class="code" href="ao68000_8v.html#aea6fee15f3d775b1a8d262490203c713">`ALU_SIMPLE_LONG_SUB</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l03286"></a>03286 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l03199"></a>03199 <a class="code" href="ao68000_8v.html#ac7de3ab6c8eec4381bde5e4f61b45761">`ALU_TAS</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l03200"></a>03200 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= { <span class="vhdllogic">1&#39;b1</span>, <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">6</span>:<span class="vhdllogic">0</span>] };
<a name="l03201"></a>03201
<a name="l03202"></a>03202 <span class="keyword">// X not affected</span>
<a name="l03203"></a>03203 <span class="keyword">// C cleared</span>
<a name="l03204"></a>03204 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03205"></a>03205 <span class="keyword">// V cleared</span>
<a name="l03206"></a>03206 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03207"></a>03207
<a name="l03208"></a>03208 <span class="keyword">// N set</span>
<a name="l03209"></a>03209 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= (<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>] == <span class="vhdllogic">1&#39;b1</span>);
<a name="l03210"></a>03210 <span class="keyword">// Z set</span>
<a name="l03211"></a>03211 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= (<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">8&#39;b0</span>);
<a name="l03212"></a>03212 <span class="vhdlkeyword">end</span>
<a name="l03213"></a>03213
<a name="l03214"></a>03214
<a name="l03215"></a>03215 <a class="code" href="ao68000_8v.html#a07c7e53af3f4995a167966ba18c2728f">`ALU_NEGX_CLR_NEG_NOT_NBCD_SWAP_EXT</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l03216"></a>03216 <span class="keyword">// NEGX / CLR / NEG / NOT</span>
<a name="l03217"></a>03217 <span class="keyword">// Optimization thanks to Frederic Requin</span>
<a name="l03218"></a>03218 <span class="vhdlkeyword">if</span> ((<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0000</span>) || (<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0010</span>) || (<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0100</span>) || (<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0110</span>))
<a name="l03219"></a>03219 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> = <span class="vhdllogic">32&#39;b0</span> - (<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] &amp; {<span class="vhdllogic">32</span>{<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">10</span>] | ~<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">9</span>]}}) - ((<a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] &amp; ~<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">10</span>] &amp; ~<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">9</span>]) | (<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">10</span>] &amp; <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">9</span>]));
<a name="l03220"></a>03220 <span class="keyword">// NBCD</span>
<a name="l03221"></a>03221 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">6&#39;b1000_00</span> ) <span class="vhdlkeyword">begin</span>
<a name="l03222"></a>03222 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] = <span class="vhdllogic">5&#39;d25</span> - <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>];
<a name="l03223"></a>03223 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>] = (<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] &gt; <span class="vhdllogic">4&#39;d9</span>) ? (<span class="vhdllogic">5&#39;d24</span> - <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>]) : (<span class="vhdllogic">5&#39;d25</span> - <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>]);
<a name="l03224"></a>03224
<a name="l03225"></a>03225 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] == <span class="vhdllogic">1&#39;b0</span> &amp;&amp; <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">4&#39;d9</span> &amp;&amp; <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>] == <span class="vhdllogic">4&#39;d9</span>) <span class="vhdlkeyword">begin</span>
<a name="l03226"></a>03226 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] = <span class="vhdllogic">4&#39;d0</span>;
<a name="l03227"></a>03227 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>] = <span class="vhdllogic">4&#39;d0</span>;
<a name="l03228"></a>03228 <span class="vhdlkeyword">end</span>
<a name="l03229"></a>03229 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] == <span class="vhdllogic">1&#39;b0</span> &amp;&amp; (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">4&#39;d9</span> || <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">4&#39;d15</span>)) <span class="vhdlkeyword">begin</span>
<a name="l03230"></a>03230 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] = <span class="vhdllogic">4&#39;d0</span>;
<a name="l03231"></a>03231 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>] = <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>] + <span class="vhdllogic">4&#39;d1</span>;
<a name="l03232"></a>03232 <span class="vhdlkeyword">end</span>
<a name="l03233"></a>03233 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>
<a name="l03234"></a>03234 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] + <span class="vhdllogic">4&#39;d1</span>;
<a name="l03235"></a>03235 <span class="vhdlkeyword">end</span>
<a name="l03236"></a>03236
<a name="l03237"></a>03237 <span class="keyword">//V undefined: unchanged</span>
<a name="l03238"></a>03238 <span class="keyword">//Z</span>
<a name="l03239"></a>03239 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &amp; <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;
<a name="l03240"></a>03240 <span class="keyword">//C,X</span>
<a name="l03241"></a>03241 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">8&#39;d0</span> &amp;&amp; <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] == <span class="vhdllogic">1&#39;b0</span>) ? <span class="vhdllogic">1&#39;b0</span> : <span class="vhdllogic">1&#39;b1</span>;
<a name="l03242"></a>03242 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] &lt;= (<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">8&#39;d0</span> &amp;&amp; <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] == <span class="vhdllogic">1&#39;b0</span>) ? <span class="vhdllogic">1&#39;b0</span> : <span class="vhdllogic">1&#39;b1</span>; <span class="keyword">//=C</span>
<a name="l03243"></a>03243 <span class="vhdlkeyword">end</span>
<a name="l03244"></a>03244 <span class="keyword">// SWAP</span>
<a name="l03245"></a>03245 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">6&#39;b1000_01</span> ) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> = { <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>], <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">16</span>] };
<a name="l03246"></a>03246 <span class="keyword">// EXT byte to word</span>
<a name="l03247"></a>03247 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">6&#39;b1000_10</span> ) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> = { <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">16</span>], {<span class="vhdllogic">8</span>{<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>]}}, <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] };
<a name="l03248"></a>03248 <span class="keyword">// EXT word to long</span>
<a name="l03249"></a>03249 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">6&#39;b1000_11</span> ) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> = { {<span class="vhdllogic">16</span>{<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">15</span>]}}, <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] };
<a name="l03250"></a>03250
<a name="l03251"></a>03251 <span class="keyword">// N set if negative else clear</span>
<a name="l03252"></a>03252 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l03253"></a>03253
<a name="l03254"></a>03254 <span class="keyword">// CLR,NOT,SWAP,EXT</span>
<a name="l03255"></a>03255 <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0010</span> || <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0110</span> || <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">6&#39;b1000_01</span> || <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">7</span>] == <span class="vhdllogic">5&#39;b1000_1</span> ) <span class="vhdlkeyword">begin</span>
<a name="l03256"></a>03256 <span class="keyword">// X not affected</span>
<a name="l03257"></a>03257 <span class="keyword">// C,V cleared</span>
<a name="l03258"></a>03258 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03259"></a>03259 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03260"></a>03260 <span class="keyword">// Z set</span>
<a name="l03261"></a>03261 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;
<a name="l03262"></a>03262 <span class="vhdlkeyword">end</span>
<a name="l03263"></a>03263 <span class="keyword">// NEGX</span>
<a name="l03264"></a>03264 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0000</span> ) <span class="vhdlkeyword">begin</span>
<a name="l03265"></a>03265 <span class="keyword">// C set if borrow</span>
<a name="l03266"></a>03266 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> | <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l03267"></a>03267 <span class="keyword">// X=C</span>
<a name="l03268"></a>03268 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] &lt;= <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> | <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l03269"></a>03269 <span class="keyword">// V set if overflow</span>
<a name="l03270"></a>03270 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l03271"></a>03271 <span class="keyword">// Z cleared if nonzero else unchanged</span>
<a name="l03272"></a>03272 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &amp; <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;
<a name="l03273"></a>03273 <span class="vhdlkeyword">end</span>
<a name="l03274"></a>03274 <span class="keyword">// NEG</span>
<a name="l03275"></a>03275 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0100</span> ) <span class="vhdlkeyword">begin</span>
<a name="l03276"></a>03276 <span class="keyword">// C clear if zero else set</span>
<a name="l03277"></a>03277 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> | <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l03278"></a>03278 <span class="keyword">// X=C</span>
<a name="l03279"></a>03279 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] &lt;= <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> | <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l03280"></a>03280 <span class="keyword">// V set if overflow</span>
<a name="l03281"></a>03281 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l03282"></a>03282 <span class="keyword">// Z set if zero else clear</span>
<a name="l03283"></a>03283 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;
<a name="l03284"></a>03284 <span class="vhdlkeyword">end</span>
<a name="l03285"></a>03285 <span class="vhdlkeyword">end</span>
<a name="l03286"></a>03286
<a name="l03287"></a>03287
<a name="l03288"></a>03288 <span class="keyword">// CCR not affected</span>
<a name="l03289"></a>03289 <span class="vhdlkeyword">end</span>
<a name="l03288"></a>03288 <a class="code" href="ao68000_8v.html#a32c0e163ff437b07e40593ab59e42fe3">`ALU_SIMPLE_LONG_ADD</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l03289"></a>03289 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] + <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l03290"></a>03290
<a name="l03291"></a>03291 <a class="code" href="ao68000_8v.html#a5083d98f4b785fe7af85ba1114f678ff">`ALU_MOVE_TO_CCR_SR_RTE_RTR_STOP_LOGIC_TO_CCR_SR</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l03292"></a>03292
<a name="l03293"></a>03293 <span class="keyword">// MOVE TO SR,RTE,STOP,ORI to SR,ANDI to SR,EORI to SR</span>
<a name="l03294"></a>03294 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">16</span>]) <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a> &lt;= { <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">15</span>], <span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">13</span>], <span class="vhdllogic">2&#39;b0</span>, <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">8</span>], <span class="vhdllogic">3&#39;b0</span>, <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">0</span>] };
<a name="l03295"></a>03295 <span class="keyword">// MOVE TO CCR,RTR,ORI to CCR,ANDI to CCR,EORI to CCR</span>
<a name="l03296"></a>03296 <span class="vhdlkeyword">else</span> <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a> &lt;= { <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>], <span class="vhdllogic">3&#39;b0</span>, <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">0</span>] };
<a name="l03297"></a>03297 <span class="vhdlkeyword">end</span>
<a name="l03298"></a>03298
<a name="l03299"></a>03299 <a class="code" href="ao68000_8v.html#ab6d6f774c41848f9c33c7b393620be2d">`ALU_SIMPLE_MOVE</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l03300"></a>03300 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>;
<a name="l03301"></a>03301
<a name="l03302"></a>03302 <span class="keyword">// CCR not affected</span>
<a name="l03303"></a>03303 <span class="vhdlkeyword">end</span>
<a name="l03304"></a>03304
<a name="l03305"></a>03305 <a class="code" href="ao68000_8v.html#ac439a8b79bd4b213f0f33172bd5e5a73">`ALU_LINK_MOVE</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l03306"></a>03306 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">3&#39;b111</span>) <span class="vhdlkeyword">begin</span>
<a name="l03307"></a>03307 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a> - <span class="vhdllogic">32&#39;d4</span>;
<a name="l03308"></a>03308 <span class="vhdlkeyword">end</span>
<a name="l03309"></a>03309 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l03310"></a>03310 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>;
<a name="l03311"></a>03311 <span class="vhdlkeyword">end</span>
<a name="l03312"></a>03312
<a name="l03313"></a>03313 <span class="keyword">// CCR not affected</span>
<a name="l03314"></a>03314 <span class="vhdlkeyword">end</span>
<a name="l03315"></a>03315
<a name="l03316"></a>03316 <span class="vhdlkeyword">endcase</span>
<a name="l03317"></a>03317 <span class="vhdlkeyword">end</span>
<a name="l03318"></a>03318 <span class="vhdlkeyword">end</span>
<a name="l03319"></a>03319
<a name="l03320"></a>03320 <span class="vhdlkeyword">endmodule</span>
<a name="l03321"></a>03321
<a name="l03322"></a>03322 <span class="keyword">/***********************************************************************************************************************</span>
<a name="l03323"></a>03323 <span class="keyword"> Microcode branch</span>
<a name="l03324"></a>03324 <span class="keyword"> ***********************************************************************************************************************/</span>
<a name="l03325"></a>03325
<a name="l03326"></a>03326
<a name="l03335"></a><a class="code" href="classmicrocode__branch.html">03335</a> <span class="vhdlkeyword">module</span> <a class="code" href="classmicrocode__branch.html">microcode_branch</a>(
<a name="l03336"></a><a class="code" href="classmicrocode__branch.html#ab7164ca4ddb1d2f4abd4bb892b0b03ef">03336</a> <span class="vhdlkeyword">input</span> <a class="code" href="classmicrocode__branch.html#ab7164ca4ddb1d2f4abd4bb892b0b03ef">clock</a>,
<a name="l03337"></a><a class="code" href="classmicrocode__branch.html#a9c12bc55b4584f1893c639f968a02b21">03337</a> <span class="vhdlkeyword">input</span> <a class="code" href="classmicrocode__branch.html#a9c12bc55b4584f1893c639f968a02b21">reset_n</a>,
<a name="l03338"></a>03338
<a name="l03339"></a><a class="code" href="classmicrocode__branch.html#a4caa37621344c68c5413af521f00d6c8">03339</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">4</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmicrocode__branch.html#a4caa37621344c68c5413af521f00d6c8">movem_loop</a>,
<a name="l03340"></a><a class="code" href="classmicrocode__branch.html#a07d73d0b81c4c4799b55420355b93a92">03340</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmicrocode__branch.html#a07d73d0b81c4c4799b55420355b93a92">movem_reg</a>,
<a name="l03341"></a><a class="code" href="classmicrocode__branch.html#a35f2856a31337f35b7519b25bad4cc31">03341</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmicrocode__branch.html#a35f2856a31337f35b7519b25bad4cc31">operand2</a>,
<a name="l03342"></a><a class="code" href="classmicrocode__branch.html#a2193e019d4119e599c40688f7f44ceae">03342</a> <span class="vhdlkeyword">input</span> <a class="code" href="classmicrocode__branch.html#a2193e019d4119e599c40688f7f44ceae">alu_signal</a>,
<a name="l03343"></a><a class="code" href="classmicrocode__branch.html#aad280414c0b1e6704249569a30a22f42">03343</a> <span class="vhdlkeyword">input</span> <a class="code" href="classmicrocode__branch.html#aad280414c0b1e6704249569a30a22f42">alu_mult_div_ready</a>,
<a name="l03344"></a><a class="code" href="classmicrocode__branch.html#a504464a375f4082638fee6d369f2f14a">03344</a> <span class="vhdlkeyword">input</span> <a class="code" href="classmicrocode__branch.html#a504464a375f4082638fee6d369f2f14a">condition</a>,
<a name="l03345"></a><a class="code" href="classmicrocode__branch.html#a05f4a56bc614035d39bb8427975567b7">03345</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmicrocode__branch.html#a05f4a56bc614035d39bb8427975567b7">result</a>,
<a name="l03346"></a><a class="code" href="classmicrocode__branch.html#a6ac9bcafca6ea23403126b17ee49a67c">03346</a> <span class="vhdlkeyword">input</span> <a class="code" href="classmicrocode__branch.html#a6ac9bcafca6ea23403126b17ee49a67c">overflow</a>,
<a name="l03347"></a><a class="code" href="classmicrocode__branch.html#ada31604689dd65bdb97661dc30ddc87f">03347</a> <span class="vhdlkeyword">input</span> <a class="code" href="classmicrocode__branch.html#ada31604689dd65bdb97661dc30ddc87f">stop_flag</a>,
<a name="l03348"></a><a class="code" href="classmicrocode__branch.html#a494ab71bba57484c7ed2ddb7e5b23a7c">03348</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmicrocode__branch.html#a494ab71bba57484c7ed2ddb7e5b23a7c">ir</a>,
<a name="l03349"></a><a class="code" href="classmicrocode__branch.html#afa8972a34b0f853c36c6d71a9ca18abc">03349</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmicrocode__branch.html#afa8972a34b0f853c36c6d71a9ca18abc">decoder_trap</a>,
<a name="l03350"></a><a class="code" href="classmicrocode__branch.html#a23009bd0a971de802bc16042b6ce875e">03350</a> <span class="vhdlkeyword">input</span> <a class="code" href="classmicrocode__branch.html#a23009bd0a971de802bc16042b6ce875e">trace_flag</a>,
<a name="l03351"></a><a class="code" href="classmicrocode__branch.html#af915b280896e52b1963b8346beed8869">03351</a> <span class="vhdlkeyword">input</span> <a class="code" href="classmicrocode__branch.html#af915b280896e52b1963b8346beed8869">group_0_flag</a>,
<a name="l03352"></a><a class="code" href="classmicrocode__branch.html#a6168f3422c90ef0aa779339f8d02dfb8">03352</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmicrocode__branch.html#a6168f3422c90ef0aa779339f8d02dfb8">interrupt_mask</a>,
<a name="l03353"></a>03353
<a name="l03354"></a><a class="code" href="classmicrocode__branch.html#aac8d9985d8c614f252c6d9204fdc527f">03354</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">8</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmicrocode__branch.html#aac8d9985d8c614f252c6d9204fdc527f">load_ea</a>,
<a name="l03355"></a><a class="code" href="classmicrocode__branch.html#af83212fb167418b4a292b929e3c79e5e">03355</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">8</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmicrocode__branch.html#af83212fb167418b4a292b929e3c79e5e">perform_ea_read</a>,
<a name="l03356"></a><a class="code" href="classmicrocode__branch.html#a3f4556a4970ffb0dcec4c8e9917b8089">03356</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">8</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmicrocode__branch.html#a3f4556a4970ffb0dcec4c8e9917b8089">perform_ea_write</a>,
<a name="l03357"></a><a class="code" href="classmicrocode__branch.html#adabd40a119386f638a8f928bf079debf">03357</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">8</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmicrocode__branch.html#adabd40a119386f638a8f928bf079debf">save_ea</a>,
<a name="l03358"></a><a class="code" href="classmicrocode__branch.html#ab4e19065d70e381082aaa335ebe8ac36">03358</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">8</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmicrocode__branch.html#ab4e19065d70e381082aaa335ebe8ac36">decoder_micropc</a>,
<a name="l03359"></a>03359
<a name="l03360"></a><a class="code" href="classmicrocode__branch.html#ab8f1385198953a1eba58574d876fa5c2">03360</a> <span class="vhdlkeyword">input</span> <a class="code" href="classmicrocode__branch.html#ab8f1385198953a1eba58574d876fa5c2">prefetch_ir_valid_32</a>,
<a name="l03361"></a><a class="code" href="classmicrocode__branch.html#a00377f72cb925ea734f33251d85c91c7">03361</a> <span class="vhdlkeyword">input</span> <a class="code" href="classmicrocode__branch.html#a00377f72cb925ea734f33251d85c91c7">prefetch_ir_valid</a>,
<a name="l03362"></a><a class="code" href="classmicrocode__branch.html#ada4f59f60e418f07a72712526be1b5b9">03362</a> <span class="vhdlkeyword">input</span> <a class="code" href="classmicrocode__branch.html#ada4f59f60e418f07a72712526be1b5b9">jmp_address_trap</a>,
<a name="l03363"></a><a class="code" href="classmicrocode__branch.html#a4d3b8c3de44caa018f9bf33e7feb80d4">03363</a> <span class="vhdlkeyword">input</span> <a class="code" href="classmicrocode__branch.html#a4d3b8c3de44caa018f9bf33e7feb80d4">jmp_bus_trap</a>,
<a name="l03364"></a><a class="code" href="classmicrocode__branch.html#ab56717bc022b7c1d30259431ddbce1a5">03364</a> <span class="vhdlkeyword">input</span> <a class="code" href="classmicrocode__branch.html#ab56717bc022b7c1d30259431ddbce1a5">finished</a>,
<a name="l03365"></a>03365
<a name="l03366"></a><a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">03366</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a>,
<a name="l03367"></a><a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">03367</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a>,
<a name="l03368"></a><a class="code" href="classmicrocode__branch.html#a238196a5cce50e726172501c44505eb5">03368</a> <span class="vhdlkeyword">output</span> [<span class="vhdllogic">8</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmicrocode__branch.html#a238196a5cce50e726172501c44505eb5">micro_pc</a>
<a name="l03369"></a>03369 );
<a name="l03370"></a>03370
<a name="l03371"></a><a class="code" href="classmicrocode__branch.html#a4bf30fe5849ea92ea553858140d46b0a">03371</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">8</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmicrocode__branch.html#a4bf30fe5849ea92ea553858140d46b0a">micro_pc_0</a> = <span class="vhdllogic">9&#39;d0</span>;
<a name="l03372"></a><a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">03372</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">8</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a>;
<a name="l03373"></a><a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">03373</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">8</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a>;
<a name="l03374"></a><a class="code" href="classmicrocode__branch.html#a94c784f786ca78c568e44da86f5e52b3">03374</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">8</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmicrocode__branch.html#a94c784f786ca78c568e44da86f5e52b3">micro_pc_3</a>;
<a name="l03375"></a>03375
<a name="l03376"></a>03376 <span class="vhdlkeyword">assign</span> <a class="code" href="classmicrocode__branch.html#a238196a5cce50e726172501c44505eb5">micro_pc</a> =
<a name="l03377"></a>03377 (<a class="code" href="classmicrocode__branch.html#a9c12bc55b4584f1893c639f968a02b21">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) ? <span class="vhdllogic">9&#39;d0</span> :
<a name="l03378"></a>03378 (<a class="code" href="classmicrocode__branch.html#ada4f59f60e418f07a72712526be1b5b9">jmp_address_trap</a> == <span class="vhdllogic">1&#39;b1</span> || <a class="code" href="classmicrocode__branch.html#a4d3b8c3de44caa018f9bf33e7feb80d4">jmp_bus_trap</a> == <span class="vhdllogic">1&#39;b1</span>) ? <a class="code" href="ao68000_8v.html#ada4b6f4df06a5dcac3ec15d4c8f4d31e">`MICROPC_ADDRESS_BUS_TRAP</a><span class="vhdlchar"></span> :
<a name="l03379"></a>03379 ( (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#abdfc603db0ea3694052298e85fb6efad">`BRANCH_movem_loop</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a4caa37621344c68c5413af521f00d6c8">movem_loop</a> == <span class="vhdllogic">5&#39;b10000</span>) ||
<a name="l03380"></a>03380 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#acc65cf5ec49ce78ecf98c956cd2de769">`BRANCH_movem_reg</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a07d73d0b81c4c4799b55420355b93a92">movem_reg</a>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">0</span>) ||
<a name="l03381"></a>03381 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#aa0b5846a5e98be60da75608078377571">`BRANCH_operand2</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a35f2856a31337f35b7519b25bad4cc31">operand2</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b0</span>) ||
<a name="l03382"></a>03382 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a3db021156e8171951f6b91c78bbb7e1f">`BRANCH_alu_signal</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a2193e019d4119e599c40688f7f44ceae">alu_signal</a> == <span class="vhdllogic">1&#39;b0</span>) ||
<a name="l03383"></a>03383 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a62fe8e5939da15f9f391886fe174183a">`BRANCH_alu_mult_div_ready</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#aad280414c0b1e6704249569a30a22f42">alu_mult_div_ready</a> == <span class="vhdllogic">1&#39;b1</span>) ||
<a name="l03384"></a>03384 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#af3158a11a9fc793d4aeead4195871507">`BRANCH_condition_0</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a504464a375f4082638fee6d369f2f14a">condition</a> == <span class="vhdllogic">1&#39;b0</span>) ||
<a name="l03385"></a>03385 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a48d5a0127f3bc738b8503c0713b9fba9">`BRANCH_condition_1</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a504464a375f4082638fee6d369f2f14a">condition</a> == <span class="vhdllogic">1&#39;b1</span>) ||
<a name="l03386"></a>03386 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a0cbdc7b4e718d5cc690b435995bb7708">`BRANCH_result</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a05f4a56bc614035d39bb8427975567b7">result</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;hFFFF</span>) ||
<a name="l03387"></a>03387 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a3861f0d4bd11e996bda23577348e86f7">`BRANCH_V</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a6ac9bcafca6ea23403126b17ee49a67c">overflow</a> == <span class="vhdllogic">1&#39;b0</span>) ||
<a name="l03388"></a>03388 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a5fb736520363d5359408ed4af63c6125">`BRANCH_movep_16</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a494ab71bba57484c7ed2ddb7e5b23a7c">ir</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1&#39;b0</span>) ||
<a name="l03389"></a>03389 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a79ce1f7b2aa4e141d52316a04977ee60">`BRANCH_stop_flag_wait_ir_decode</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#ada31604689dd65bdb97661dc30ddc87f">stop_flag</a> == <span class="vhdllogic">1&#39;b1</span>) ||
<a name="l03390"></a>03390 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a719e200160515b706ebab9fe1e18c8c7">`BRANCH_ir</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a494ab71bba57484c7ed2ddb7e5b23a7c">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] != <span class="vhdllogic">8&#39;b0</span>) ||
<a name="l03391"></a>03391 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#af396200d0e5941fe60e8d960f2e3aa91">`BRANCH_trace_flag_and_interrupt</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a23009bd0a971de802bc16042b6ce875e">trace_flag</a> == <span class="vhdllogic">1&#39;b0</span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a6168f3422c90ef0aa779339f8d02dfb8">interrupt_mask</a> != <span class="vhdllogic">3&#39;b000</span>) ||
<a name="l03392"></a>03392 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a63f967b1bbe9ad356e3ccbbb2924e03f">`BRANCH_group_0_flag</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#af915b280896e52b1963b8346beed8869">group_0_flag</a> == <span class="vhdllogic">1&#39;b0</span>)
<a name="l03393"></a>03393 ) ? <a class="code" href="classmicrocode__branch.html#a4bf30fe5849ea92ea553858140d46b0a">micro_pc_0</a> + { <span class="vhdllogic">5&#39;d0</span>, <a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> } :
<a name="l03394"></a>03394 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a79ce1f7b2aa4e141d52316a04977ee60">`BRANCH_stop_flag_wait_ir_decode</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a00377f72cb925ea734f33251d85c91c7">prefetch_ir_valid</a> == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#afa8972a34b0f853c36c6d71a9ca18abc">decoder_trap</a> == <span class="vhdllogic">8&#39;d0</span>) ? <a class="code" href="classmicrocode__branch.html#ab4e19065d70e381082aaa335ebe8ac36">decoder_micropc</a> :
<a name="l03395"></a>03395 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#af396200d0e5941fe60e8d960f2e3aa91">`BRANCH_trace_flag_and_interrupt</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a23009bd0a971de802bc16042b6ce875e">trace_flag</a> == <span class="vhdllogic">1&#39;b0</span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a6168f3422c90ef0aa779339f8d02dfb8">interrupt_mask</a> == <span class="vhdllogic">3&#39;b000</span>) ? <a class="code" href="ao68000_8v.html#a1e7ad8f4b421f72f5bdea07bef35f864">`MICROPC_MAIN_LOOP</a><span class="vhdlchar"></span> :
<a name="l03396"></a>03396 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a1f24f0ad71fd4d2edd6ead5ef6c3056a">`BRANCH_procedure</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#a7950509479648899370516cfa0221c43">`PROCEDURE_jump_to_main_loop</a><span class="vhdlchar"></span>) ? <a class="code" href="ao68000_8v.html#a1e7ad8f4b421f72f5bdea07bef35f864">`MICROPC_MAIN_LOOP</a><span class="vhdlchar"></span> :
<a name="l03397"></a>03397 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a1f24f0ad71fd4d2edd6ead5ef6c3056a">`BRANCH_procedure</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#a5c7af3686fb890de6242f973de1ee549">`PROCEDURE_call_load_ea</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#aac8d9985d8c614f252c6d9204fdc527f">load_ea</a> != <span class="vhdllogic">9&#39;d0</span>) ? <a class="code" href="classmicrocode__branch.html#aac8d9985d8c614f252c6d9204fdc527f">load_ea</a> :
<a name="l03398"></a>03398 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a1f24f0ad71fd4d2edd6ead5ef6c3056a">`BRANCH_procedure</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#a698b04745cbbec22896235d5cfffac43">`PROCEDURE_call_perform_ea_read</a><span class="vhdlchar"></span>) ? <a class="code" href="classmicrocode__branch.html#af83212fb167418b4a292b929e3c79e5e">perform_ea_read</a> :
<a name="l03399"></a>03399 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a1f24f0ad71fd4d2edd6ead5ef6c3056a">`BRANCH_procedure</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#aa98c954da2ac9f709907c8c593b1439e">`PROCEDURE_call_perform_ea_write</a><span class="vhdlchar"></span>) ? <a class="code" href="classmicrocode__branch.html#a3f4556a4970ffb0dcec4c8e9917b8089">perform_ea_write</a> :
<a name="l03400"></a>03400 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a1f24f0ad71fd4d2edd6ead5ef6c3056a">`BRANCH_procedure</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#a30022c5eb1821e27dd5c70d4affbc835">`PROCEDURE_call_save_ea</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#adabd40a119386f638a8f928bf079debf">save_ea</a> != <span class="vhdllogic">9&#39;d0</span>) ? <a class="code" href="classmicrocode__branch.html#adabd40a119386f638a8f928bf079debf">save_ea</a> :
<a name="l03401"></a>03401
<a name="l03402"></a>03402 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a1f24f0ad71fd4d2edd6ead5ef6c3056a">`BRANCH_procedure</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#a403d3720f31ad5a5895778bee758fb55">`PROCEDURE_call_read</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#aac8d9985d8c614f252c6d9204fdc527f">load_ea</a> != <span class="vhdllogic">9&#39;d0</span>) ? <a class="code" href="classmicrocode__branch.html#aac8d9985d8c614f252c6d9204fdc527f">load_ea</a> :
<a name="l03403"></a>03403 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a1f24f0ad71fd4d2edd6ead5ef6c3056a">`BRANCH_procedure</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#a403d3720f31ad5a5895778bee758fb55">`PROCEDURE_call_read</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#aac8d9985d8c614f252c6d9204fdc527f">load_ea</a> == <span class="vhdllogic">9&#39;d0</span>) ? <a class="code" href="classmicrocode__branch.html#af83212fb167418b4a292b929e3c79e5e">perform_ea_read</a> :
<a name="l03404"></a>03404
<a name="l03405"></a>03405 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a1f24f0ad71fd4d2edd6ead5ef6c3056a">`BRANCH_procedure</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#a50af2007588b7a528b934ae7672b1214">`PROCEDURE_call_write</a><span class="vhdlchar"></span>) ? <a class="code" href="classmicrocode__branch.html#a3f4556a4970ffb0dcec4c8e9917b8089">perform_ea_write</a> :
<a name="l03406"></a>03406
<a name="l03407"></a>03407 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a1f24f0ad71fd4d2edd6ead5ef6c3056a">`BRANCH_procedure</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#a2c67cc2747b67d04684855e14c2b9fbb">`PROCEDURE_call_trap</a><span class="vhdlchar"></span>) ? <a class="code" href="ao68000_8v.html#a80e45e303a1ebe180eeb15b47454e13f">`MICROPC_TRAP_ENTRY</a><span class="vhdlchar"></span> :
<a name="l03408"></a>03408 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a1f24f0ad71fd4d2edd6ead5ef6c3056a">`BRANCH_procedure</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#af842761d13933777546d76bd997e7494">`PROCEDURE_return</a><span class="vhdlchar"></span>) ? <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a> :
<a name="l03409"></a>03409 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a1f24f0ad71fd4d2edd6ead5ef6c3056a">`BRANCH_procedure</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#ac74b95b43e6c95ed82036002767bc22c">`PROCEDURE_interrupt_mask</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a6168f3422c90ef0aa779339f8d02dfb8">interrupt_mask</a> == <span class="vhdllogic">3&#39;b000</span>) ? <a class="code" href="ao68000_8v.html#a1e7ad8f4b421f72f5bdea07bef35f864">`MICROPC_MAIN_LOOP</a><span class="vhdlchar"></span> :
<a name="l03410"></a>03410 ( (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a1f24f0ad71fd4d2edd6ead5ef6c3056a">`BRANCH_procedure</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#a26a2f20a92ff8ab6f13d6633f3c9475c">`PROCEDURE_wait_finished</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#ab56717bc022b7c1d30259431ddbce1a5">finished</a> == <span class="vhdllogic">1&#39;b0</span>) ||
<a name="l03411"></a>03411 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a1f24f0ad71fd4d2edd6ead5ef6c3056a">`BRANCH_procedure</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#aa072f73b12cd178a44f47980e1bb98cb">`PROCEDURE_wait_prefetch_valid</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a00377f72cb925ea734f33251d85c91c7">prefetch_ir_valid</a> == <span class="vhdllogic">1&#39;b0</span>) ||
<a name="l03412"></a>03412 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a1f24f0ad71fd4d2edd6ead5ef6c3056a">`BRANCH_procedure</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#a0ef2adec86a42dd30d78e9d259d828fd">`PROCEDURE_wait_prefetch_valid_32</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#ab8f1385198953a1eba58574d876fa5c2">prefetch_ir_valid_32</a> == <span class="vhdllogic">1&#39;b0</span>) ||
<a name="l03413"></a>03413 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a79ce1f7b2aa4e141d52316a04977ee60">`BRANCH_stop_flag_wait_ir_decode</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a00377f72cb925ea734f33251d85c91c7">prefetch_ir_valid</a> == <span class="vhdllogic">1&#39;b0</span>)
<a name="l03414"></a>03414 ) ? <a class="code" href="classmicrocode__branch.html#a4bf30fe5849ea92ea553858140d46b0a">micro_pc_0</a> :
<a name="l03415"></a>03415 <a class="code" href="classmicrocode__branch.html#a4bf30fe5849ea92ea553858140d46b0a">micro_pc_0</a> + <span class="vhdllogic">9&#39;d1</span>
<a name="l03416"></a>03416 ;
<a name="l03417"></a>03417
<a name="l03418"></a><a class="code" href="classmicrocode__branch.html#a4e2c393980b78c66fbb22710e14a1cbb">03418</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classmicrocode__branch.html#ab7164ca4ddb1d2f4abd4bb892b0b03ef">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classmicrocode__branch.html#a9c12bc55b4584f1893c639f968a02b21">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l03419"></a>03419 <span class="vhdlkeyword">if</span>(<a class="code" href="classmicrocode__branch.html#a9c12bc55b4584f1893c639f968a02b21">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <a class="code" href="classmicrocode__branch.html#a4bf30fe5849ea92ea553858140d46b0a">micro_pc_0</a> &lt;= <span class="vhdllogic">9&#39;d0</span>;
<a name="l03420"></a>03420 <span class="vhdlkeyword">else</span> <a class="code" href="classmicrocode__branch.html#a4bf30fe5849ea92ea553858140d46b0a">micro_pc_0</a> &lt;= <a class="code" href="classmicrocode__branch.html#a238196a5cce50e726172501c44505eb5">micro_pc</a>;
<a name="l03421"></a>03421 <span class="vhdlkeyword">end</span>
<a name="l03422"></a>03422
<a name="l03423"></a><a class="code" href="classmicrocode__branch.html#afc14f80b07779a484e706d164560971e">03423</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classmicrocode__branch.html#ab7164ca4ddb1d2f4abd4bb892b0b03ef">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classmicrocode__branch.html#a9c12bc55b4584f1893c639f968a02b21">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l03424"></a>03424 <span class="vhdlkeyword">if</span>(<a class="code" href="classmicrocode__branch.html#a9c12bc55b4584f1893c639f968a02b21">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>
<a name="l03425"></a>03425 <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a> &lt;= <span class="vhdllogic">9&#39;d0</span>;
<a name="l03426"></a>03426 <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a> &lt;= <span class="vhdllogic">9&#39;d0</span>;
<a name="l03427"></a>03427 <a class="code" href="classmicrocode__branch.html#a94c784f786ca78c568e44da86f5e52b3">micro_pc_3</a> &lt;= <span class="vhdllogic">9&#39;d0</span>;
<a name="l03428"></a>03428 <span class="vhdlkeyword">end</span>
<a name="l03429"></a>03429 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a79ce1f7b2aa4e141d52316a04977ee60">`BRANCH_stop_flag_wait_ir_decode</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a00377f72cb925ea734f33251d85c91c7">prefetch_ir_valid</a> == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#afa8972a34b0f853c36c6d71a9ca18abc">decoder_trap</a> == <span class="vhdllogic">8&#39;d0</span>)
<a name="l03430"></a>03430 <span class="vhdlkeyword">begin</span>
<a name="l03431"></a>03431 <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a> &lt;= <a class="code" href="classmicrocode__branch.html#a4bf30fe5849ea92ea553858140d46b0a">micro_pc_0</a> + { <span class="vhdllogic">5&#39;d0</span>, <a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> };
<a name="l03432"></a>03432 <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a> &lt;= <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a>;
<a name="l03433"></a>03433 <a class="code" href="classmicrocode__branch.html#a94c784f786ca78c568e44da86f5e52b3">micro_pc_3</a> &lt;= <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a>;
<a name="l03434"></a>03434 <span class="vhdlkeyword">end</span>
<a name="l03435"></a>03435 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a1f24f0ad71fd4d2edd6ead5ef6c3056a">`BRANCH_procedure</a><span class="vhdlchar"></span>) <span class="vhdlkeyword">begin</span>
<a name="l03436"></a>03436 <span class="vhdlkeyword">if</span>(<a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#a403d3720f31ad5a5895778bee758fb55">`PROCEDURE_call_read</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#aac8d9985d8c614f252c6d9204fdc527f">load_ea</a> != <span class="vhdllogic">9&#39;d0</span>) <span class="vhdlkeyword">begin</span>
<a name="l03437"></a>03437 <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a> &lt;= <a class="code" href="classmicrocode__branch.html#af83212fb167418b4a292b929e3c79e5e">perform_ea_read</a>;
<a name="l03438"></a>03438 <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a> &lt;= <a class="code" href="classmicrocode__branch.html#a4bf30fe5849ea92ea553858140d46b0a">micro_pc_0</a> + <span class="vhdllogic">9&#39;d1</span>;
<a name="l03439"></a>03439 <a class="code" href="classmicrocode__branch.html#a94c784f786ca78c568e44da86f5e52b3">micro_pc_3</a> &lt;= <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a>;
<a name="l03440"></a>03440 <span class="vhdlkeyword">end</span>
<a name="l03441"></a>03441 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#a403d3720f31ad5a5895778bee758fb55">`PROCEDURE_call_read</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#aac8d9985d8c614f252c6d9204fdc527f">load_ea</a> == <span class="vhdllogic">9&#39;d0</span>) <span class="vhdlkeyword">begin</span>
<a name="l03442"></a>03442 <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a> &lt;= <a class="code" href="classmicrocode__branch.html#a4bf30fe5849ea92ea553858140d46b0a">micro_pc_0</a> + <span class="vhdllogic">9&#39;d1</span>;
<a name="l03443"></a>03443 <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a> &lt;= <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a>;
<a name="l03444"></a>03444 <a class="code" href="classmicrocode__branch.html#a94c784f786ca78c568e44da86f5e52b3">micro_pc_3</a> &lt;= <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a>;
<a name="l03445"></a>03445 <span class="vhdlkeyword">end</span>
<a name="l03446"></a>03446 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#a50af2007588b7a528b934ae7672b1214">`PROCEDURE_call_write</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#adabd40a119386f638a8f928bf079debf">save_ea</a> != <span class="vhdllogic">9&#39;d0</span>) <span class="vhdlkeyword">begin</span>
<a name="l03447"></a>03447 <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a> &lt;= <a class="code" href="classmicrocode__branch.html#adabd40a119386f638a8f928bf079debf">save_ea</a>;
<a name="l03448"></a>03448 <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a> &lt;= <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a>;
<a name="l03449"></a>03449 <a class="code" href="classmicrocode__branch.html#a94c784f786ca78c568e44da86f5e52b3">micro_pc_3</a> &lt;= <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a>;
<a name="l03450"></a>03450 <span class="vhdlkeyword">end</span>
<a name="l03451"></a>03451 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>((<a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#a5c7af3686fb890de6242f973de1ee549">`PROCEDURE_call_load_ea</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#aac8d9985d8c614f252c6d9204fdc527f">load_ea</a> != <span class="vhdllogic">9&#39;d0</span>) ||
<a name="l03452"></a>03452 (<a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#a698b04745cbbec22896235d5cfffac43">`PROCEDURE_call_perform_ea_read</a><span class="vhdlchar"></span>) ||
<a name="l03453"></a>03453 (<a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#aa98c954da2ac9f709907c8c593b1439e">`PROCEDURE_call_perform_ea_write</a><span class="vhdlchar"></span>) ||
<a name="l03454"></a>03454 (<a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#a30022c5eb1821e27dd5c70d4affbc835">`PROCEDURE_call_save_ea</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#adabd40a119386f638a8f928bf079debf">save_ea</a> != <span class="vhdllogic">9&#39;d0</span>) ||
<a name="l03455"></a>03455 (<a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#a2c67cc2747b67d04684855e14c2b9fbb">`PROCEDURE_call_trap</a><span class="vhdlchar"></span>) )
<a name="l03456"></a>03456 <span class="vhdlkeyword">begin</span>
<a name="l03457"></a>03457 <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a> &lt;= <a class="code" href="classmicrocode__branch.html#a4bf30fe5849ea92ea553858140d46b0a">micro_pc_0</a> + <span class="vhdllogic">9&#39;d1</span>;
<a name="l03458"></a>03458 <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a> &lt;= <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a>;
<a name="l03459"></a>03459 <a class="code" href="classmicrocode__branch.html#a94c784f786ca78c568e44da86f5e52b3">micro_pc_3</a> &lt;= <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a>;
<a name="l03460"></a>03460 <span class="vhdlkeyword">end</span>
<a name="l03461"></a>03461 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#af842761d13933777546d76bd997e7494">`PROCEDURE_return</a><span class="vhdlchar"></span>) <span class="vhdlkeyword">begin</span>
<a name="l03462"></a>03462 <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a> &lt;= <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a>;
<a name="l03463"></a>03463 <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a> &lt;= <a class="code" href="classmicrocode__branch.html#a94c784f786ca78c568e44da86f5e52b3">micro_pc_3</a>;
<a name="l03464"></a>03464 <a class="code" href="classmicrocode__branch.html#a94c784f786ca78c568e44da86f5e52b3">micro_pc_3</a> &lt;= <span class="vhdllogic">9&#39;d0</span>;
<a name="l03465"></a>03465 <span class="vhdlkeyword">end</span>
<a name="l03466"></a>03466 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#a318a0823db3c0aa8dfeae26f05495e5b">`PROCEDURE_push_micropc</a><span class="vhdlchar"></span>) <span class="vhdlkeyword">begin</span>
<a name="l03467"></a>03467 <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a> &lt;= <a class="code" href="classmicrocode__branch.html#a4bf30fe5849ea92ea553858140d46b0a">micro_pc_0</a>;
<a name="l03468"></a>03468 <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a> &lt;= <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a>;
<a name="l03469"></a>03469 <a class="code" href="classmicrocode__branch.html#a94c784f786ca78c568e44da86f5e52b3">micro_pc_3</a> &lt;= <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a>;
<a name="l03470"></a>03470 <span class="vhdlkeyword">end</span>
<a name="l03471"></a>03471 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#acfe58e669e77374120e6e534fc621316">`PROCEDURE_pop_micropc</a><span class="vhdlchar"></span>) <span class="vhdlkeyword">begin</span>
<a name="l03472"></a>03472 <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a> &lt;= <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a>;
<a name="l03473"></a>03473 <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a> &lt;= <a class="code" href="classmicrocode__branch.html#a94c784f786ca78c568e44da86f5e52b3">micro_pc_3</a>;
<a name="l03474"></a>03474 <a class="code" href="classmicrocode__branch.html#a94c784f786ca78c568e44da86f5e52b3">micro_pc_3</a> &lt;= <span class="vhdllogic">9&#39;d0</span>;
<a name="l03475"></a>03475 <span class="vhdlkeyword">end</span>
<a name="l03476"></a>03476 <span class="vhdlkeyword">end</span>
<a name="l03477"></a>03477 <span class="vhdlkeyword">end</span>
<a name="l03478"></a>03478
<a name="l03479"></a>03479 <span class="vhdlkeyword">endmodule</span>
<a name="l03291"></a>03291 <span class="keyword">// CCR not affected</span>
<a name="l03292"></a>03292 <span class="vhdlkeyword">end</span>
<a name="l03293"></a>03293
<a name="l03294"></a>03294 <a class="code" href="ao68000_8v.html#aea6fee15f3d775b1a8d262490203c713">`ALU_SIMPLE_LONG_SUB</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l03295"></a>03295 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l03296"></a>03296
<a name="l03297"></a>03297 <span class="keyword">// CCR not affected</span>
<a name="l03298"></a>03298 <span class="vhdlkeyword">end</span>
<a name="l03299"></a>03299
<a name="l03300"></a>03300 <a class="code" href="ao68000_8v.html#a5083d98f4b785fe7af85ba1114f678ff">`ALU_MOVE_TO_CCR_SR_RTE_RTR_STOP_LOGIC_TO_CCR_SR</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l03301"></a>03301
<a name="l03302"></a>03302 <span class="keyword">// MOVE TO SR,RTE,STOP,ORI to SR,ANDI to SR,EORI to SR</span>
<a name="l03303"></a>03303 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">16</span>]) <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a> &lt;= { <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">15</span>], <span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">13</span>], <span class="vhdllogic">2&#39;b0</span>, <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">8</span>], <span class="vhdllogic">3&#39;b0</span>, <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">0</span>] };
<a name="l03304"></a>03304 <span class="keyword">// MOVE TO CCR,RTR,ORI to CCR,ANDI to CCR,EORI to CCR</span>
<a name="l03305"></a>03305 <span class="vhdlkeyword">else</span> <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a> &lt;= { <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>], <span class="vhdllogic">3&#39;b0</span>, <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">0</span>] };
<a name="l03306"></a>03306 <span class="vhdlkeyword">end</span>
<a name="l03307"></a>03307
<a name="l03308"></a>03308 <a class="code" href="ao68000_8v.html#ab6d6f774c41848f9c33c7b393620be2d">`ALU_SIMPLE_MOVE</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l03309"></a>03309 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>;
<a name="l03310"></a>03310
<a name="l03311"></a>03311 <span class="keyword">// CCR not affected</span>
<a name="l03312"></a>03312 <span class="vhdlkeyword">end</span>
<a name="l03313"></a>03313
<a name="l03314"></a>03314 <a class="code" href="ao68000_8v.html#ac439a8b79bd4b213f0f33172bd5e5a73">`ALU_LINK_MOVE</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l03315"></a>03315 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">3&#39;b111</span>) <span class="vhdlkeyword">begin</span>
<a name="l03316"></a>03316 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a> - <span class="vhdllogic">32&#39;d4</span>;
<a name="l03317"></a>03317 <span class="vhdlkeyword">end</span>
<a name="l03318"></a>03318 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l03319"></a>03319 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>;
<a name="l03320"></a>03320 <span class="vhdlkeyword">end</span>
<a name="l03321"></a>03321
<a name="l03322"></a>03322 <span class="keyword">// CCR not affected</span>
<a name="l03323"></a>03323 <span class="vhdlkeyword">end</span>
<a name="l03324"></a>03324
<a name="l03325"></a>03325 <span class="vhdlkeyword">endcase</span>
<a name="l03326"></a>03326 <span class="vhdlkeyword">end</span>
<a name="l03327"></a>03327 <span class="vhdlkeyword">end</span>
<a name="l03328"></a>03328
<a name="l03329"></a>03329 <span class="vhdlkeyword">endmodule</span>
<a name="l03330"></a>03330
<a name="l03331"></a>03331 <span class="keyword">/***********************************************************************************************************************</span>
<a name="l03332"></a>03332 <span class="keyword"> Microcode branch</span>
<a name="l03333"></a>03333 <span class="keyword"> ***********************************************************************************************************************/</span>
<a name="l03334"></a>03334
<a name="l03335"></a>03335
<a name="l03344"></a><a class="code" href="classmicrocode__branch.html">03344</a> <span class="vhdlkeyword">module</span> <a class="code" href="classmicrocode__branch.html">microcode_branch</a>(
<a name="l03345"></a><a class="code" href="classmicrocode__branch.html#ab7164ca4ddb1d2f4abd4bb892b0b03ef">03345</a> <span class="vhdlkeyword">input</span> <a class="code" href="classmicrocode__branch.html#ab7164ca4ddb1d2f4abd4bb892b0b03ef">clock</a>,
<a name="l03346"></a><a class="code" href="classmicrocode__branch.html#a9c12bc55b4584f1893c639f968a02b21">03346</a> <span class="vhdlkeyword">input</span> <a class="code" href="classmicrocode__branch.html#a9c12bc55b4584f1893c639f968a02b21">reset_n</a>,
<a name="l03347"></a>03347
<a name="l03348"></a><a class="code" href="classmicrocode__branch.html#a4caa37621344c68c5413af521f00d6c8">03348</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">4</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmicrocode__branch.html#a4caa37621344c68c5413af521f00d6c8">movem_loop</a>,
<a name="l03349"></a><a class="code" href="classmicrocode__branch.html#a07d73d0b81c4c4799b55420355b93a92">03349</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmicrocode__branch.html#a07d73d0b81c4c4799b55420355b93a92">movem_reg</a>,
<a name="l03350"></a><a class="code" href="classmicrocode__branch.html#a35f2856a31337f35b7519b25bad4cc31">03350</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmicrocode__branch.html#a35f2856a31337f35b7519b25bad4cc31">operand2</a>,
<a name="l03351"></a><a class="code" href="classmicrocode__branch.html#a2193e019d4119e599c40688f7f44ceae">03351</a> <span class="vhdlkeyword">input</span> <a class="code" href="classmicrocode__branch.html#a2193e019d4119e599c40688f7f44ceae">alu_signal</a>,
<a name="l03352"></a><a class="code" href="classmicrocode__branch.html#aad280414c0b1e6704249569a30a22f42">03352</a> <span class="vhdlkeyword">input</span> <a class="code" href="classmicrocode__branch.html#aad280414c0b1e6704249569a30a22f42">alu_mult_div_ready</a>,
<a name="l03353"></a><a class="code" href="classmicrocode__branch.html#a504464a375f4082638fee6d369f2f14a">03353</a> <span class="vhdlkeyword">input</span> <a class="code" href="classmicrocode__branch.html#a504464a375f4082638fee6d369f2f14a">condition</a>,
<a name="l03354"></a><a class="code" href="classmicrocode__branch.html#a05f4a56bc614035d39bb8427975567b7">03354</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmicrocode__branch.html#a05f4a56bc614035d39bb8427975567b7">result</a>,
<a name="l03355"></a><a class="code" href="classmicrocode__branch.html#a6ac9bcafca6ea23403126b17ee49a67c">03355</a> <span class="vhdlkeyword">input</span> <a class="code" href="classmicrocode__branch.html#a6ac9bcafca6ea23403126b17ee49a67c">overflow</a>,
<a name="l03356"></a><a class="code" href="classmicrocode__branch.html#ada31604689dd65bdb97661dc30ddc87f">03356</a> <span class="vhdlkeyword">input</span> <a class="code" href="classmicrocode__branch.html#ada31604689dd65bdb97661dc30ddc87f">stop_flag</a>,
<a name="l03357"></a><a class="code" href="classmicrocode__branch.html#a494ab71bba57484c7ed2ddb7e5b23a7c">03357</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmicrocode__branch.html#a494ab71bba57484c7ed2ddb7e5b23a7c">ir</a>,
<a name="l03358"></a><a class="code" href="classmicrocode__branch.html#afa8972a34b0f853c36c6d71a9ca18abc">03358</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmicrocode__branch.html#afa8972a34b0f853c36c6d71a9ca18abc">decoder_trap</a>,
<a name="l03359"></a><a class="code" href="classmicrocode__branch.html#a23009bd0a971de802bc16042b6ce875e">03359</a> <span class="vhdlkeyword">input</span> <a class="code" href="classmicrocode__branch.html#a23009bd0a971de802bc16042b6ce875e">trace_flag</a>,
<a name="l03360"></a><a class="code" href="classmicrocode__branch.html#af915b280896e52b1963b8346beed8869">03360</a> <span class="vhdlkeyword">input</span> <a class="code" href="classmicrocode__branch.html#af915b280896e52b1963b8346beed8869">group_0_flag</a>,
<a name="l03361"></a><a class="code" href="classmicrocode__branch.html#a6168f3422c90ef0aa779339f8d02dfb8">03361</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmicrocode__branch.html#a6168f3422c90ef0aa779339f8d02dfb8">interrupt_mask</a>,
<a name="l03362"></a>03362
<a name="l03363"></a><a class="code" href="classmicrocode__branch.html#aac8d9985d8c614f252c6d9204fdc527f">03363</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">8</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmicrocode__branch.html#aac8d9985d8c614f252c6d9204fdc527f">load_ea</a>,
<a name="l03364"></a><a class="code" href="classmicrocode__branch.html#af83212fb167418b4a292b929e3c79e5e">03364</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">8</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmicrocode__branch.html#af83212fb167418b4a292b929e3c79e5e">perform_ea_read</a>,
<a name="l03365"></a><a class="code" href="classmicrocode__branch.html#a3f4556a4970ffb0dcec4c8e9917b8089">03365</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">8</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmicrocode__branch.html#a3f4556a4970ffb0dcec4c8e9917b8089">perform_ea_write</a>,
<a name="l03366"></a><a class="code" href="classmicrocode__branch.html#adabd40a119386f638a8f928bf079debf">03366</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">8</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmicrocode__branch.html#adabd40a119386f638a8f928bf079debf">save_ea</a>,
<a name="l03367"></a><a class="code" href="classmicrocode__branch.html#ab4e19065d70e381082aaa335ebe8ac36">03367</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">8</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmicrocode__branch.html#ab4e19065d70e381082aaa335ebe8ac36">decoder_micropc</a>,
<a name="l03368"></a>03368
<a name="l03369"></a><a class="code" href="classmicrocode__branch.html#ab8f1385198953a1eba58574d876fa5c2">03369</a> <span class="vhdlkeyword">input</span> <a class="code" href="classmicrocode__branch.html#ab8f1385198953a1eba58574d876fa5c2">prefetch_ir_valid_32</a>,
<a name="l03370"></a><a class="code" href="classmicrocode__branch.html#a00377f72cb925ea734f33251d85c91c7">03370</a> <span class="vhdlkeyword">input</span> <a class="code" href="classmicrocode__branch.html#a00377f72cb925ea734f33251d85c91c7">prefetch_ir_valid</a>,
<a name="l03371"></a><a class="code" href="classmicrocode__branch.html#ada4f59f60e418f07a72712526be1b5b9">03371</a> <span class="vhdlkeyword">input</span> <a class="code" href="classmicrocode__branch.html#ada4f59f60e418f07a72712526be1b5b9">jmp_address_trap</a>,
<a name="l03372"></a><a class="code" href="classmicrocode__branch.html#a4d3b8c3de44caa018f9bf33e7feb80d4">03372</a> <span class="vhdlkeyword">input</span> <a class="code" href="classmicrocode__branch.html#a4d3b8c3de44caa018f9bf33e7feb80d4">jmp_bus_trap</a>,
<a name="l03373"></a><a class="code" href="classmicrocode__branch.html#ab56717bc022b7c1d30259431ddbce1a5">03373</a> <span class="vhdlkeyword">input</span> <a class="code" href="classmicrocode__branch.html#ab56717bc022b7c1d30259431ddbce1a5">finished</a>,
<a name="l03374"></a>03374
<a name="l03375"></a><a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">03375</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a>,
<a name="l03376"></a><a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">03376</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a>,
<a name="l03377"></a><a class="code" href="classmicrocode__branch.html#a238196a5cce50e726172501c44505eb5">03377</a> <span class="vhdlkeyword">output</span> [<span class="vhdllogic">8</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmicrocode__branch.html#a238196a5cce50e726172501c44505eb5">micro_pc</a>
<a name="l03378"></a>03378 );
<a name="l03379"></a>03379
<a name="l03380"></a><a class="code" href="classmicrocode__branch.html#a4bf30fe5849ea92ea553858140d46b0a">03380</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">8</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmicrocode__branch.html#a4bf30fe5849ea92ea553858140d46b0a">micro_pc_0</a> = <span class="vhdllogic">9&#39;d0</span>;
<a name="l03381"></a><a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">03381</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">8</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a>;
<a name="l03382"></a><a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">03382</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">8</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a>;
<a name="l03383"></a><a class="code" href="classmicrocode__branch.html#a94c784f786ca78c568e44da86f5e52b3">03383</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">8</span>:<span class="vhdllogic">0</span>] <a class="code" href="classmicrocode__branch.html#a94c784f786ca78c568e44da86f5e52b3">micro_pc_3</a>;
<a name="l03384"></a>03384
<a name="l03385"></a>03385 <span class="vhdlkeyword">assign</span> <a class="code" href="classmicrocode__branch.html#a238196a5cce50e726172501c44505eb5">micro_pc</a> =
<a name="l03386"></a>03386 (<a class="code" href="classmicrocode__branch.html#a9c12bc55b4584f1893c639f968a02b21">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) ? <span class="vhdllogic">9&#39;d0</span> :
<a name="l03387"></a>03387 (<a class="code" href="classmicrocode__branch.html#ada4f59f60e418f07a72712526be1b5b9">jmp_address_trap</a> == <span class="vhdllogic">1&#39;b1</span> || <a class="code" href="classmicrocode__branch.html#a4d3b8c3de44caa018f9bf33e7feb80d4">jmp_bus_trap</a> == <span class="vhdllogic">1&#39;b1</span>) ? <a class="code" href="ao68000_8v.html#ada4b6f4df06a5dcac3ec15d4c8f4d31e">`MICROPC_ADDRESS_BUS_TRAP</a><span class="vhdlchar"></span> :
<a name="l03388"></a>03388 ( (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#abdfc603db0ea3694052298e85fb6efad">`BRANCH_movem_loop</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a4caa37621344c68c5413af521f00d6c8">movem_loop</a> == <span class="vhdllogic">5&#39;b10000</span>) ||
<a name="l03389"></a>03389 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#acc65cf5ec49ce78ecf98c956cd2de769">`BRANCH_movem_reg</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a07d73d0b81c4c4799b55420355b93a92">movem_reg</a>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">0</span>) ||
<a name="l03390"></a>03390 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#aa0b5846a5e98be60da75608078377571">`BRANCH_operand2</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a35f2856a31337f35b7519b25bad4cc31">operand2</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">6&#39;b0</span>) ||
<a name="l03391"></a>03391 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a3db021156e8171951f6b91c78bbb7e1f">`BRANCH_alu_signal</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a2193e019d4119e599c40688f7f44ceae">alu_signal</a> == <span class="vhdllogic">1&#39;b0</span>) ||
<a name="l03392"></a>03392 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a62fe8e5939da15f9f391886fe174183a">`BRANCH_alu_mult_div_ready</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#aad280414c0b1e6704249569a30a22f42">alu_mult_div_ready</a> == <span class="vhdllogic">1&#39;b1</span>) ||
<a name="l03393"></a>03393 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#af3158a11a9fc793d4aeead4195871507">`BRANCH_condition_0</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a504464a375f4082638fee6d369f2f14a">condition</a> == <span class="vhdllogic">1&#39;b0</span>) ||
<a name="l03394"></a>03394 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a48d5a0127f3bc738b8503c0713b9fba9">`BRANCH_condition_1</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a504464a375f4082638fee6d369f2f14a">condition</a> == <span class="vhdllogic">1&#39;b1</span>) ||
<a name="l03395"></a>03395 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a0cbdc7b4e718d5cc690b435995bb7708">`BRANCH_result</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a05f4a56bc614035d39bb8427975567b7">result</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;hFFFF</span>) ||
<a name="l03396"></a>03396 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a3861f0d4bd11e996bda23577348e86f7">`BRANCH_V</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a6ac9bcafca6ea23403126b17ee49a67c">overflow</a> == <span class="vhdllogic">1&#39;b0</span>) ||
<a name="l03397"></a>03397 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a5fb736520363d5359408ed4af63c6125">`BRANCH_movep_16</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a494ab71bba57484c7ed2ddb7e5b23a7c">ir</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1&#39;b0</span>) ||
<a name="l03398"></a>03398 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a79ce1f7b2aa4e141d52316a04977ee60">`BRANCH_stop_flag_wait_ir_decode</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#ada31604689dd65bdb97661dc30ddc87f">stop_flag</a> == <span class="vhdllogic">1&#39;b1</span>) ||
<a name="l03399"></a>03399 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a719e200160515b706ebab9fe1e18c8c7">`BRANCH_ir</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a494ab71bba57484c7ed2ddb7e5b23a7c">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] != <span class="vhdllogic">8&#39;b0</span>) ||
<a name="l03400"></a>03400 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#af396200d0e5941fe60e8d960f2e3aa91">`BRANCH_trace_flag_and_interrupt</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a23009bd0a971de802bc16042b6ce875e">trace_flag</a> == <span class="vhdllogic">1&#39;b0</span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a6168f3422c90ef0aa779339f8d02dfb8">interrupt_mask</a> != <span class="vhdllogic">3&#39;b000</span>) ||
<a name="l03401"></a>03401 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a63f967b1bbe9ad356e3ccbbb2924e03f">`BRANCH_group_0_flag</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#af915b280896e52b1963b8346beed8869">group_0_flag</a> == <span class="vhdllogic">1&#39;b0</span>)
<a name="l03402"></a>03402 ) ? <a class="code" href="classmicrocode__branch.html#a4bf30fe5849ea92ea553858140d46b0a">micro_pc_0</a> + { <span class="vhdllogic">5&#39;d0</span>, <a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> } :
<a name="l03403"></a>03403 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a79ce1f7b2aa4e141d52316a04977ee60">`BRANCH_stop_flag_wait_ir_decode</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a00377f72cb925ea734f33251d85c91c7">prefetch_ir_valid</a> == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#afa8972a34b0f853c36c6d71a9ca18abc">decoder_trap</a> == <span class="vhdllogic">8&#39;d0</span>) ? <a class="code" href="classmicrocode__branch.html#ab4e19065d70e381082aaa335ebe8ac36">decoder_micropc</a> :
<a name="l03404"></a>03404 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#af396200d0e5941fe60e8d960f2e3aa91">`BRANCH_trace_flag_and_interrupt</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a23009bd0a971de802bc16042b6ce875e">trace_flag</a> == <span class="vhdllogic">1&#39;b0</span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a6168f3422c90ef0aa779339f8d02dfb8">interrupt_mask</a> == <span class="vhdllogic">3&#39;b000</span>) ? <a class="code" href="ao68000_8v.html#a1e7ad8f4b421f72f5bdea07bef35f864">`MICROPC_MAIN_LOOP</a><span class="vhdlchar"></span> :
<a name="l03405"></a>03405 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a1f24f0ad71fd4d2edd6ead5ef6c3056a">`BRANCH_procedure</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#a7950509479648899370516cfa0221c43">`PROCEDURE_jump_to_main_loop</a><span class="vhdlchar"></span>) ? <a class="code" href="ao68000_8v.html#a1e7ad8f4b421f72f5bdea07bef35f864">`MICROPC_MAIN_LOOP</a><span class="vhdlchar"></span> :
<a name="l03406"></a>03406 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a1f24f0ad71fd4d2edd6ead5ef6c3056a">`BRANCH_procedure</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#a5c7af3686fb890de6242f973de1ee549">`PROCEDURE_call_load_ea</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#aac8d9985d8c614f252c6d9204fdc527f">load_ea</a> != <span class="vhdllogic">9&#39;d0</span>) ? <a class="code" href="classmicrocode__branch.html#aac8d9985d8c614f252c6d9204fdc527f">load_ea</a> :
<a name="l03407"></a>03407 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a1f24f0ad71fd4d2edd6ead5ef6c3056a">`BRANCH_procedure</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#a698b04745cbbec22896235d5cfffac43">`PROCEDURE_call_perform_ea_read</a><span class="vhdlchar"></span>) ? <a class="code" href="classmicrocode__branch.html#af83212fb167418b4a292b929e3c79e5e">perform_ea_read</a> :
<a name="l03408"></a>03408 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a1f24f0ad71fd4d2edd6ead5ef6c3056a">`BRANCH_procedure</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#aa98c954da2ac9f709907c8c593b1439e">`PROCEDURE_call_perform_ea_write</a><span class="vhdlchar"></span>) ? <a class="code" href="classmicrocode__branch.html#a3f4556a4970ffb0dcec4c8e9917b8089">perform_ea_write</a> :
<a name="l03409"></a>03409 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a1f24f0ad71fd4d2edd6ead5ef6c3056a">`BRANCH_procedure</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#a30022c5eb1821e27dd5c70d4affbc835">`PROCEDURE_call_save_ea</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#adabd40a119386f638a8f928bf079debf">save_ea</a> != <span class="vhdllogic">9&#39;d0</span>) ? <a class="code" href="classmicrocode__branch.html#adabd40a119386f638a8f928bf079debf">save_ea</a> :
<a name="l03410"></a>03410
<a name="l03411"></a>03411 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a1f24f0ad71fd4d2edd6ead5ef6c3056a">`BRANCH_procedure</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#a403d3720f31ad5a5895778bee758fb55">`PROCEDURE_call_read</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#aac8d9985d8c614f252c6d9204fdc527f">load_ea</a> != <span class="vhdllogic">9&#39;d0</span>) ? <a class="code" href="classmicrocode__branch.html#aac8d9985d8c614f252c6d9204fdc527f">load_ea</a> :
<a name="l03412"></a>03412 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a1f24f0ad71fd4d2edd6ead5ef6c3056a">`BRANCH_procedure</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#a403d3720f31ad5a5895778bee758fb55">`PROCEDURE_call_read</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#aac8d9985d8c614f252c6d9204fdc527f">load_ea</a> == <span class="vhdllogic">9&#39;d0</span>) ? <a class="code" href="classmicrocode__branch.html#af83212fb167418b4a292b929e3c79e5e">perform_ea_read</a> :
<a name="l03413"></a>03413
<a name="l03414"></a>03414 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a1f24f0ad71fd4d2edd6ead5ef6c3056a">`BRANCH_procedure</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#a50af2007588b7a528b934ae7672b1214">`PROCEDURE_call_write</a><span class="vhdlchar"></span>) ? <a class="code" href="classmicrocode__branch.html#a3f4556a4970ffb0dcec4c8e9917b8089">perform_ea_write</a> :
<a name="l03415"></a>03415
<a name="l03416"></a>03416 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a1f24f0ad71fd4d2edd6ead5ef6c3056a">`BRANCH_procedure</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#a2c67cc2747b67d04684855e14c2b9fbb">`PROCEDURE_call_trap</a><span class="vhdlchar"></span>) ? <a class="code" href="ao68000_8v.html#a80e45e303a1ebe180eeb15b47454e13f">`MICROPC_TRAP_ENTRY</a><span class="vhdlchar"></span> :
<a name="l03417"></a>03417 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a1f24f0ad71fd4d2edd6ead5ef6c3056a">`BRANCH_procedure</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#af842761d13933777546d76bd997e7494">`PROCEDURE_return</a><span class="vhdlchar"></span>) ? <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a> :
<a name="l03418"></a>03418 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a1f24f0ad71fd4d2edd6ead5ef6c3056a">`BRANCH_procedure</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#ac74b95b43e6c95ed82036002767bc22c">`PROCEDURE_interrupt_mask</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a6168f3422c90ef0aa779339f8d02dfb8">interrupt_mask</a> == <span class="vhdllogic">3&#39;b000</span>) ? <a class="code" href="ao68000_8v.html#a1e7ad8f4b421f72f5bdea07bef35f864">`MICROPC_MAIN_LOOP</a><span class="vhdlchar"></span> :
<a name="l03419"></a>03419 ( (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a1f24f0ad71fd4d2edd6ead5ef6c3056a">`BRANCH_procedure</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#a26a2f20a92ff8ab6f13d6633f3c9475c">`PROCEDURE_wait_finished</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#ab56717bc022b7c1d30259431ddbce1a5">finished</a> == <span class="vhdllogic">1&#39;b0</span>) ||
<a name="l03420"></a>03420 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a1f24f0ad71fd4d2edd6ead5ef6c3056a">`BRANCH_procedure</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#aa072f73b12cd178a44f47980e1bb98cb">`PROCEDURE_wait_prefetch_valid</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a00377f72cb925ea734f33251d85c91c7">prefetch_ir_valid</a> == <span class="vhdllogic">1&#39;b0</span>) ||
<a name="l03421"></a>03421 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a1f24f0ad71fd4d2edd6ead5ef6c3056a">`BRANCH_procedure</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#a0ef2adec86a42dd30d78e9d259d828fd">`PROCEDURE_wait_prefetch_valid_32</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#ab8f1385198953a1eba58574d876fa5c2">prefetch_ir_valid_32</a> == <span class="vhdllogic">1&#39;b0</span>) ||
<a name="l03422"></a>03422 (<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a79ce1f7b2aa4e141d52316a04977ee60">`BRANCH_stop_flag_wait_ir_decode</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a00377f72cb925ea734f33251d85c91c7">prefetch_ir_valid</a> == <span class="vhdllogic">1&#39;b0</span>)
<a name="l03423"></a>03423 ) ? <a class="code" href="classmicrocode__branch.html#a4bf30fe5849ea92ea553858140d46b0a">micro_pc_0</a> :
<a name="l03424"></a>03424 <a class="code" href="classmicrocode__branch.html#a4bf30fe5849ea92ea553858140d46b0a">micro_pc_0</a> + <span class="vhdllogic">9&#39;d1</span>
<a name="l03425"></a>03425 ;
<a name="l03426"></a>03426
<a name="l03427"></a><a class="code" href="classmicrocode__branch.html#a4e2c393980b78c66fbb22710e14a1cbb">03427</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classmicrocode__branch.html#ab7164ca4ddb1d2f4abd4bb892b0b03ef">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classmicrocode__branch.html#a9c12bc55b4584f1893c639f968a02b21">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l03428"></a>03428 <span class="vhdlkeyword">if</span>(<a class="code" href="classmicrocode__branch.html#a9c12bc55b4584f1893c639f968a02b21">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <a class="code" href="classmicrocode__branch.html#a4bf30fe5849ea92ea553858140d46b0a">micro_pc_0</a> &lt;= <span class="vhdllogic">9&#39;d0</span>;
<a name="l03429"></a>03429 <span class="vhdlkeyword">else</span> <a class="code" href="classmicrocode__branch.html#a4bf30fe5849ea92ea553858140d46b0a">micro_pc_0</a> &lt;= <a class="code" href="classmicrocode__branch.html#a238196a5cce50e726172501c44505eb5">micro_pc</a>;
<a name="l03430"></a>03430 <span class="vhdlkeyword">end</span>
<a name="l03431"></a>03431
<a name="l03432"></a><a class="code" href="classmicrocode__branch.html#afc14f80b07779a484e706d164560971e">03432</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classmicrocode__branch.html#ab7164ca4ddb1d2f4abd4bb892b0b03ef">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classmicrocode__branch.html#a9c12bc55b4584f1893c639f968a02b21">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l03433"></a>03433 <span class="vhdlkeyword">if</span>(<a class="code" href="classmicrocode__branch.html#a9c12bc55b4584f1893c639f968a02b21">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>
<a name="l03434"></a>03434 <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a> &lt;= <span class="vhdllogic">9&#39;d0</span>;
<a name="l03435"></a>03435 <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a> &lt;= <span class="vhdllogic">9&#39;d0</span>;
<a name="l03436"></a>03436 <a class="code" href="classmicrocode__branch.html#a94c784f786ca78c568e44da86f5e52b3">micro_pc_3</a> &lt;= <span class="vhdllogic">9&#39;d0</span>;
<a name="l03437"></a>03437 <span class="vhdlkeyword">end</span>
<a name="l03438"></a>03438 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a79ce1f7b2aa4e141d52316a04977ee60">`BRANCH_stop_flag_wait_ir_decode</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a00377f72cb925ea734f33251d85c91c7">prefetch_ir_valid</a> == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#afa8972a34b0f853c36c6d71a9ca18abc">decoder_trap</a> == <span class="vhdllogic">8&#39;d0</span>)
<a name="l03439"></a>03439 <span class="vhdlkeyword">begin</span>
<a name="l03440"></a>03440 <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a> &lt;= <a class="code" href="classmicrocode__branch.html#a4bf30fe5849ea92ea553858140d46b0a">micro_pc_0</a> + { <span class="vhdllogic">5&#39;d0</span>, <a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> };
<a name="l03441"></a>03441 <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a> &lt;= <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a>;
<a name="l03442"></a>03442 <a class="code" href="classmicrocode__branch.html#a94c784f786ca78c568e44da86f5e52b3">micro_pc_3</a> &lt;= <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a>;
<a name="l03443"></a>03443 <span class="vhdlkeyword">end</span>
<a name="l03444"></a>03444 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a1f24f0ad71fd4d2edd6ead5ef6c3056a">`BRANCH_procedure</a><span class="vhdlchar"></span>) <span class="vhdlkeyword">begin</span>
<a name="l03445"></a>03445 <span class="vhdlkeyword">if</span>(<a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#a403d3720f31ad5a5895778bee758fb55">`PROCEDURE_call_read</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#aac8d9985d8c614f252c6d9204fdc527f">load_ea</a> != <span class="vhdllogic">9&#39;d0</span>) <span class="vhdlkeyword">begin</span>
<a name="l03446"></a>03446 <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a> &lt;= <a class="code" href="classmicrocode__branch.html#af83212fb167418b4a292b929e3c79e5e">perform_ea_read</a>;
<a name="l03447"></a>03447 <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a> &lt;= <a class="code" href="classmicrocode__branch.html#a4bf30fe5849ea92ea553858140d46b0a">micro_pc_0</a> + <span class="vhdllogic">9&#39;d1</span>;
<a name="l03448"></a>03448 <a class="code" href="classmicrocode__branch.html#a94c784f786ca78c568e44da86f5e52b3">micro_pc_3</a> &lt;= <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a>;
<a name="l03449"></a>03449 <span class="vhdlkeyword">end</span>
<a name="l03450"></a>03450 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#a403d3720f31ad5a5895778bee758fb55">`PROCEDURE_call_read</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#aac8d9985d8c614f252c6d9204fdc527f">load_ea</a> == <span class="vhdllogic">9&#39;d0</span>) <span class="vhdlkeyword">begin</span>
<a name="l03451"></a>03451 <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a> &lt;= <a class="code" href="classmicrocode__branch.html#a4bf30fe5849ea92ea553858140d46b0a">micro_pc_0</a> + <span class="vhdllogic">9&#39;d1</span>;
<a name="l03452"></a>03452 <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a> &lt;= <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a>;
<a name="l03453"></a>03453 <a class="code" href="classmicrocode__branch.html#a94c784f786ca78c568e44da86f5e52b3">micro_pc_3</a> &lt;= <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a>;
<a name="l03454"></a>03454 <span class="vhdlkeyword">end</span>
<a name="l03455"></a>03455 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#a50af2007588b7a528b934ae7672b1214">`PROCEDURE_call_write</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#adabd40a119386f638a8f928bf079debf">save_ea</a> != <span class="vhdllogic">9&#39;d0</span>) <span class="vhdlkeyword">begin</span>
<a name="l03456"></a>03456 <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a> &lt;= <a class="code" href="classmicrocode__branch.html#adabd40a119386f638a8f928bf079debf">save_ea</a>;
<a name="l03457"></a>03457 <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a> &lt;= <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a>;
<a name="l03458"></a>03458 <a class="code" href="classmicrocode__branch.html#a94c784f786ca78c568e44da86f5e52b3">micro_pc_3</a> &lt;= <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a>;
<a name="l03459"></a>03459 <span class="vhdlkeyword">end</span>
<a name="l03460"></a>03460 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>((<a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#a5c7af3686fb890de6242f973de1ee549">`PROCEDURE_call_load_ea</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#aac8d9985d8c614f252c6d9204fdc527f">load_ea</a> != <span class="vhdllogic">9&#39;d0</span>) ||
<a name="l03461"></a>03461 (<a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#a698b04745cbbec22896235d5cfffac43">`PROCEDURE_call_perform_ea_read</a><span class="vhdlchar"></span>) ||
<a name="l03462"></a>03462 (<a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#aa98c954da2ac9f709907c8c593b1439e">`PROCEDURE_call_perform_ea_write</a><span class="vhdlchar"></span>) ||
<a name="l03463"></a>03463 (<a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#a30022c5eb1821e27dd5c70d4affbc835">`PROCEDURE_call_save_ea</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#adabd40a119386f638a8f928bf079debf">save_ea</a> != <span class="vhdllogic">9&#39;d0</span>) ||
<a name="l03464"></a>03464 (<a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#a2c67cc2747b67d04684855e14c2b9fbb">`PROCEDURE_call_trap</a><span class="vhdlchar"></span>) )
<a name="l03465"></a>03465 <span class="vhdlkeyword">begin</span>
<a name="l03466"></a>03466 <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a> &lt;= <a class="code" href="classmicrocode__branch.html#a4bf30fe5849ea92ea553858140d46b0a">micro_pc_0</a> + <span class="vhdllogic">9&#39;d1</span>;
<a name="l03467"></a>03467 <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a> &lt;= <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a>;
<a name="l03468"></a>03468 <a class="code" href="classmicrocode__branch.html#a94c784f786ca78c568e44da86f5e52b3">micro_pc_3</a> &lt;= <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a>;
<a name="l03469"></a>03469 <span class="vhdlkeyword">end</span>
<a name="l03470"></a>03470 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#af842761d13933777546d76bd997e7494">`PROCEDURE_return</a><span class="vhdlchar"></span>) <span class="vhdlkeyword">begin</span>
<a name="l03471"></a>03471 <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a> &lt;= <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a>;
<a name="l03472"></a>03472 <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a> &lt;= <a class="code" href="classmicrocode__branch.html#a94c784f786ca78c568e44da86f5e52b3">micro_pc_3</a>;
<a name="l03473"></a>03473 <a class="code" href="classmicrocode__branch.html#a94c784f786ca78c568e44da86f5e52b3">micro_pc_3</a> &lt;= <span class="vhdllogic">9&#39;d0</span>;
<a name="l03474"></a>03474 <span class="vhdlkeyword">end</span>
<a name="l03475"></a>03475 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#a318a0823db3c0aa8dfeae26f05495e5b">`PROCEDURE_push_micropc</a><span class="vhdlchar"></span>) <span class="vhdlkeyword">begin</span>
<a name="l03476"></a>03476 <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a> &lt;= <a class="code" href="classmicrocode__branch.html#a4bf30fe5849ea92ea553858140d46b0a">micro_pc_0</a>;
<a name="l03477"></a>03477 <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a> &lt;= <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a>;
<a name="l03478"></a>03478 <a class="code" href="classmicrocode__branch.html#a94c784f786ca78c568e44da86f5e52b3">micro_pc_3</a> &lt;= <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a>;
<a name="l03479"></a>03479 <span class="vhdlkeyword">end</span>
<a name="l03480"></a>03480 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#acfe58e669e77374120e6e534fc621316">`PROCEDURE_pop_micropc</a><span class="vhdlchar"></span>) <span class="vhdlkeyword">begin</span>
<a name="l03481"></a>03481 <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a> &lt;= <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a>;
<a name="l03482"></a>03482 <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a> &lt;= <a class="code" href="classmicrocode__branch.html#a94c784f786ca78c568e44da86f5e52b3">micro_pc_3</a>;
<a name="l03483"></a>03483 <a class="code" href="classmicrocode__branch.html#a94c784f786ca78c568e44da86f5e52b3">micro_pc_3</a> &lt;= <span class="vhdllogic">9&#39;d0</span>;
<a name="l03484"></a>03484 <span class="vhdlkeyword">end</span>
<a name="l03485"></a>03485 <span class="vhdlkeyword">end</span>
<a name="l03486"></a>03486 <span class="vhdlkeyword">end</span>
<a name="l03487"></a>03487
<a name="l03488"></a>03488 <span class="vhdlkeyword">endmodule</span>
</pre></div></div>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/functions_0x74.html
68,7 → 68,7
</li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/globals_vars_0x70.html
122,7 → 122,7
</li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:04 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/classregisters.html
123,7 → 123,7
<li>ea_mod, ea_type registers store the currently selected addressing mode. </li>
</ul>
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01626">1626</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01627">1627</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<hr/><h2>Member Function Documentation</h2>
<a class="anchor" id="a7943ebd2393533b177f2cc9471614403"></a><!-- doxytag: member="registers::ALWAYS_10" ref="a7943ebd2393533b177f2cc9471614403" args="clock, reset_n" -->
<div class="memitem">
144,13 → 144,13
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01895">1895</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01896">1896</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<div class="fragment"><pre class="fragment">
<a name="l01895"></a>01895 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01896"></a>01896 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">address_type</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01897"></a>01897 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_control</span> == <a class="code" href="ao68000_8v.html#aa7a6ef5c21bbbf8a3c5a0437bdda3c85">`ADDRESS_FROM_PC_INDEX_OFFSET</a><span class="vhdlchar"></span>) <span class="vhdlchar">address_type</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01898"></a>01898 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_control</span> != <a class="code" href="ao68000_8v.html#a3f7506465d358bddd4692916e422237d">`ADDRESS_IDLE</a><span class="vhdlchar"></span>) <span class="vhdlchar">address_type</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01899"></a>01899 <span class="vhdlkeyword">end</span>
<a name="l01896"></a>01896 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01897"></a>01897 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">address_type</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01898"></a>01898 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_control</span> == <a class="code" href="ao68000_8v.html#aa7a6ef5c21bbbf8a3c5a0437bdda3c85">`ADDRESS_FROM_PC_INDEX_OFFSET</a><span class="vhdlchar"></span>) <span class="vhdlchar">address_type</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01899"></a>01899 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_control</span> != <a class="code" href="ao68000_8v.html#a3f7506465d358bddd4692916e422237d">`ADDRESS_IDLE</a><span class="vhdlchar"></span>) <span class="vhdlchar">address_type</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01900"></a>01900 <span class="vhdlkeyword">end</span>
</pre></div>
</div>
</div>
173,15 → 173,15
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01901">1901</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01902">1902</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<div class="fragment"><pre class="fragment">
<a name="l01901"></a>01901 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01902"></a>01902 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">movem_modreg</span> &lt;= <span class="vhdllogic">6&#39;b0</span>;
<a name="l01903"></a>01903 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">movem_modreg_control</span> == <a class="code" href="ao68000_8v.html#a59e6a074af6fbcf3490ecdb2d277e452">`MOVEM_MODREG_LOAD_0</a><span class="vhdlchar"></span>) <span class="vhdlchar">movem_modreg</span> &lt;= <span class="vhdllogic">6&#39;b0</span>;
<a name="l01904"></a>01904 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">movem_modreg_control</span> == <a class="code" href="ao68000_8v.html#a96857bc6f8514765cf6add0567891646">`MOVEM_MODREG_LOAD_6b001111</a><span class="vhdlchar"></span>)<span class="vhdlchar">movem_modreg</span> &lt;= <span class="vhdllogic">6&#39;b001111</span>;
<a name="l01905"></a>01905 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">movem_modreg_control</span> == <a class="code" href="ao68000_8v.html#ab865a06c214356bb8906149ad6beebf2">`MOVEM_MODREG_INCR_BY_1</a><span class="vhdlchar"></span>) <span class="vhdlchar">movem_modreg</span> &lt;= <span class="vhdlchar">movem_modreg</span> + <span class="vhdllogic">6&#39;d1</span>;
<a name="l01906"></a>01906 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">movem_modreg_control</span> == <a class="code" href="ao68000_8v.html#afc15f893a792d1af5e5c90f8ed788662">`MOVEM_MODREG_DECR_BY_1</a><span class="vhdlchar"></span>) <span class="vhdlchar">movem_modreg</span> &lt;= <span class="vhdlchar">movem_modreg</span> - <span class="vhdllogic">6&#39;d1</span>;
<a name="l01907"></a>01907 <span class="vhdlkeyword">end</span>
<a name="l01902"></a>01902 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01903"></a>01903 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">movem_modreg</span> &lt;= <span class="vhdllogic">6&#39;b0</span>;
<a name="l01904"></a>01904 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">movem_modreg_control</span> == <a class="code" href="ao68000_8v.html#a59e6a074af6fbcf3490ecdb2d277e452">`MOVEM_MODREG_LOAD_0</a><span class="vhdlchar"></span>) <span class="vhdlchar">movem_modreg</span> &lt;= <span class="vhdllogic">6&#39;b0</span>;
<a name="l01905"></a>01905 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">movem_modreg_control</span> == <a class="code" href="ao68000_8v.html#a96857bc6f8514765cf6add0567891646">`MOVEM_MODREG_LOAD_6b001111</a><span class="vhdlchar"></span>)<span class="vhdlchar">movem_modreg</span> &lt;= <span class="vhdllogic">6&#39;b001111</span>;
<a name="l01906"></a>01906 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">movem_modreg_control</span> == <a class="code" href="ao68000_8v.html#ab865a06c214356bb8906149ad6beebf2">`MOVEM_MODREG_INCR_BY_1</a><span class="vhdlchar"></span>) <span class="vhdlchar">movem_modreg</span> &lt;= <span class="vhdlchar">movem_modreg</span> + <span class="vhdllogic">6&#39;d1</span>;
<a name="l01907"></a>01907 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">movem_modreg_control</span> == <a class="code" href="ao68000_8v.html#afc15f893a792d1af5e5c90f8ed788662">`MOVEM_MODREG_DECR_BY_1</a><span class="vhdlchar"></span>) <span class="vhdlchar">movem_modreg</span> &lt;= <span class="vhdlchar">movem_modreg</span> - <span class="vhdllogic">6&#39;d1</span>;
<a name="l01908"></a>01908 <span class="vhdlkeyword">end</span>
</pre></div>
</div>
</div>
204,13 → 204,13
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01909">1909</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01910">1910</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<div class="fragment"><pre class="fragment">
<a name="l01909"></a>01909 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01910"></a>01910 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">movem_loop</span> &lt;= <span class="vhdllogic">5&#39;b0</span>;
<a name="l01911"></a>01911 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">movem_loop_control</span> == <a class="code" href="ao68000_8v.html#a8465e4a24e72c1cb6e12015c4ff806c5">`MOVEM_LOOP_LOAD_0</a><span class="vhdlchar"></span>) <span class="vhdlchar">movem_loop</span> &lt;= <span class="vhdllogic">5&#39;b0</span>;
<a name="l01912"></a>01912 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">movem_loop_control</span> == <a class="code" href="ao68000_8v.html#add999e8b65307d6d46547d776999f215">`MOVEM_LOOP_INCR_BY_1</a><span class="vhdlchar"></span>) <span class="vhdlchar">movem_loop</span> &lt;= <span class="vhdlchar">movem_loop</span> + <span class="vhdllogic">5&#39;d1</span>;
<a name="l01913"></a>01913 <span class="vhdlkeyword">end</span>
<a name="l01910"></a>01910 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01911"></a>01911 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">movem_loop</span> &lt;= <span class="vhdllogic">5&#39;b0</span>;
<a name="l01912"></a>01912 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">movem_loop_control</span> == <a class="code" href="ao68000_8v.html#a8465e4a24e72c1cb6e12015c4ff806c5">`MOVEM_LOOP_LOAD_0</a><span class="vhdlchar"></span>) <span class="vhdlchar">movem_loop</span> &lt;= <span class="vhdllogic">5&#39;b0</span>;
<a name="l01913"></a>01913 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">movem_loop_control</span> == <a class="code" href="ao68000_8v.html#add999e8b65307d6d46547d776999f215">`MOVEM_LOOP_INCR_BY_1</a><span class="vhdlchar"></span>) <span class="vhdlchar">movem_loop</span> &lt;= <span class="vhdlchar">movem_loop</span> + <span class="vhdllogic">5&#39;d1</span>;
<a name="l01914"></a>01914 <span class="vhdlkeyword">end</span>
</pre></div>
</div>
</div>
233,13 → 233,13
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01915">1915</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01916">1916</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<div class="fragment"><pre class="fragment">
<a name="l01915"></a>01915 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01916"></a>01916 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">movem_reg</span> &lt;= <span class="vhdllogic">16&#39;b0</span>;
<a name="l01917"></a>01917 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">movem_reg_control</span> == <a class="code" href="ao68000_8v.html#aa7d78c26e9e37f761c7a0b178fe13cf8">`MOVEM_REG_FROM_OP1</a><span class="vhdlchar"></span>) <span class="vhdlchar">movem_reg</span> &lt;= <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>];
<a name="l01918"></a>01918 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">movem_reg_control</span> == <a class="code" href="ao68000_8v.html#ac34150d75e16d155befcfcb8a95e45a3">`MOVEM_REG_SHIFT_RIGHT</a><span class="vhdlchar"></span>) <span class="vhdlchar">movem_reg</span> &lt;= { <span class="vhdllogic">1&#39;b0</span>, <span class="vhdlchar">movem_reg</span>[<span class="vhdllogic">15</span>:<span class="vhdllogic">1</span>] };
<a name="l01919"></a>01919 <span class="vhdlkeyword">end</span>
<a name="l01916"></a>01916 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01917"></a>01917 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">movem_reg</span> &lt;= <span class="vhdllogic">16&#39;b0</span>;
<a name="l01918"></a>01918 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">movem_reg_control</span> == <a class="code" href="ao68000_8v.html#aa7d78c26e9e37f761c7a0b178fe13cf8">`MOVEM_REG_FROM_OP1</a><span class="vhdlchar"></span>) <span class="vhdlchar">movem_reg</span> &lt;= <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>];
<a name="l01919"></a>01919 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">movem_reg_control</span> == <a class="code" href="ao68000_8v.html#ac34150d75e16d155befcfcb8a95e45a3">`MOVEM_REG_SHIFT_RIGHT</a><span class="vhdlchar"></span>) <span class="vhdlchar">movem_reg</span> &lt;= { <span class="vhdllogic">1&#39;b0</span>, <span class="vhdlchar">movem_reg</span>[<span class="vhdllogic">15</span>:<span class="vhdllogic">1</span>] };
<a name="l01920"></a>01920 <span class="vhdlkeyword">end</span>
</pre></div>
</div>
</div>
262,13 → 262,13
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01921">1921</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01922">1922</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<div class="fragment"><pre class="fragment">
<a name="l01921"></a>01921 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01922"></a>01922 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">ir</span> &lt;= <span class="vhdllogic">16&#39;b0</span>;
<a name="l01923"></a>01923 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">ir_control</span> == <a class="code" href="ao68000_8v.html#a987216cfc97019736d0251dcd5470e68">`IR_LOAD_WHEN_PREFETCH_VALID</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classregisters.html#a8031b93d1dc568b98697eb0c81b13bfd">prefetch_ir_valid</a> == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <span class="vhdlchar">stop_flag</span> == <span class="vhdllogic">1&#39;b0</span>)
<a name="l01924"></a>01924 <span class="vhdlchar">ir</span> &lt;= <a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">79</span>:<span class="vhdllogic">64</span>];
<a name="l01925"></a>01925 <span class="vhdlkeyword">end</span>
<a name="l01922"></a>01922 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01923"></a>01923 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">ir</span> &lt;= <span class="vhdllogic">16&#39;b0</span>;
<a name="l01924"></a>01924 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">ir_control</span> == <a class="code" href="ao68000_8v.html#a987216cfc97019736d0251dcd5470e68">`IR_LOAD_WHEN_PREFETCH_VALID</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classregisters.html#a8031b93d1dc568b98697eb0c81b13bfd">prefetch_ir_valid</a> == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <span class="vhdlchar">stop_flag</span> == <span class="vhdllogic">1&#39;b0</span>)
<a name="l01925"></a>01925 <span class="vhdlchar">ir</span> &lt;= <a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">79</span>:<span class="vhdllogic">64</span>];
<a name="l01926"></a>01926 <span class="vhdlkeyword">end</span>
</pre></div>
</div>
</div>
291,13 → 291,13
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01927">1927</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01928">1928</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<div class="fragment"><pre class="fragment">
<a name="l01927"></a>01927 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01928"></a>01928 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">decoder_alu_reg</span> &lt;= <span class="vhdllogic">18&#39;b0</span>;
<a name="l01929"></a>01929 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">ir_control</span> == <a class="code" href="ao68000_8v.html#a987216cfc97019736d0251dcd5470e68">`IR_LOAD_WHEN_PREFETCH_VALID</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classregisters.html#a8031b93d1dc568b98697eb0c81b13bfd">prefetch_ir_valid</a> == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <span class="vhdlchar">stop_flag</span> == <span class="vhdllogic">1&#39;b0</span>)
<a name="l01930"></a>01930 <span class="vhdlchar">decoder_alu_reg</span> &lt;= <span class="vhdlchar">decoder_alu</span>;
<a name="l01931"></a>01931 <span class="vhdlkeyword">end</span>
<a name="l01928"></a>01928 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01929"></a>01929 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">decoder_alu_reg</span> &lt;= <span class="vhdllogic">18&#39;b0</span>;
<a name="l01930"></a>01930 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">ir_control</span> == <a class="code" href="ao68000_8v.html#a987216cfc97019736d0251dcd5470e68">`IR_LOAD_WHEN_PREFETCH_VALID</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classregisters.html#a8031b93d1dc568b98697eb0c81b13bfd">prefetch_ir_valid</a> == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <span class="vhdlchar">stop_flag</span> == <span class="vhdllogic">1&#39;b0</span>)
<a name="l01931"></a>01931 <span class="vhdlchar">decoder_alu_reg</span> &lt;= <span class="vhdlchar">decoder_alu</span>;
<a name="l01932"></a>01932 <span class="vhdlkeyword">end</span>
</pre></div>
</div>
</div>
320,20 → 320,20
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01933">1933</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01934">1934</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<div class="fragment"><pre class="fragment">
<a name="l01933"></a>01933 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01934"></a>01934 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">trap</span> &lt;= <span class="vhdllogic">8&#39;d0</span>;
<a name="l01935"></a>01935 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">trap_control</span> == <a class="code" href="ao68000_8v.html#a4267c71337dc6963db47aba754396f48">`TRAP_ILLEGAL_INSTR</a><span class="vhdlchar"></span>) <span class="vhdlchar">trap</span> &lt;= <span class="vhdllogic">8&#39;d4</span>;
<a name="l01936"></a>01936 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">trap_control</span> == <a class="code" href="ao68000_8v.html#a111476f2c18a4085c9a5cea3692dc990">`TRAP_DIV_BY_ZERO</a><span class="vhdlchar"></span>) <span class="vhdlchar">trap</span> &lt;= <span class="vhdllogic">8&#39;d5</span>;
<a name="l01937"></a>01937 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">trap_control</span> == <a class="code" href="ao68000_8v.html#a7d97a1e77166d92c1d69452c3e836682">`TRAP_CHK</a><span class="vhdlchar"></span>) <span class="vhdlchar">trap</span> &lt;= <span class="vhdllogic">8&#39;d6</span>;
<a name="l01938"></a>01938 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">trap_control</span> == <a class="code" href="ao68000_8v.html#a66a7d33a63851daa49e101494acd6118">`TRAP_TRAPV</a><span class="vhdlchar"></span>) <span class="vhdlchar">trap</span> &lt;= <span class="vhdllogic">8&#39;d7</span>;
<a name="l01939"></a>01939 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">trap_control</span> == <a class="code" href="ao68000_8v.html#a940b41a2a1e4c585e15f1c2bef5d5c6f">`TRAP_PRIVIL_VIOLAT</a><span class="vhdlchar"></span>) <span class="vhdlchar">trap</span> &lt;= <span class="vhdllogic">8&#39;d8</span>;
<a name="l01940"></a>01940 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">trap_control</span> == <a class="code" href="ao68000_8v.html#a84705ced93a01047ec829b7ea942cee0">`TRAP_TRACE</a><span class="vhdlchar"></span>) <span class="vhdlchar">trap</span> &lt;= <span class="vhdllogic">8&#39;d9</span>;
<a name="l01941"></a>01941 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">trap_control</span> == <a class="code" href="ao68000_8v.html#a4d09227bd9de91efc1a40bf676e10c72">`TRAP_TRAP</a><span class="vhdlchar"></span>) <span class="vhdlchar">trap</span> &lt;= { <span class="vhdllogic">4&#39;b0010</span>, <span class="vhdlchar">ir</span>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] };
<a name="l01942"></a>01942 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">trap_control</span> == <a class="code" href="ao68000_8v.html#a8d6c015903e3a60339a6e8cc196bb440">`TRAP_FROM_DECODER</a><span class="vhdlchar"></span>) <span class="vhdlchar">trap</span> &lt;= <a class="code" href="classregisters.html#a278b33a84015867a530ac4279331d570">decoder_trap</a>;
<a name="l01943"></a>01943 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">trap_control</span> == <a class="code" href="ao68000_8v.html#a57812c3cf3905152a60361ae979a4c2d">`TRAP_FROM_INTERRUPT</a><span class="vhdlchar"></span>) <span class="vhdlchar">trap</span> &lt;= <a class="code" href="classregisters.html#a10ef9845f594ecc956dc1b1c8cdef44e">interrupt_trap</a>;
<a name="l01944"></a>01944 <span class="vhdlkeyword">end</span>
<a name="l01934"></a>01934 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01935"></a>01935 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">trap</span> &lt;= <span class="vhdllogic">8&#39;d0</span>;
<a name="l01936"></a>01936 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">trap_control</span> == <a class="code" href="ao68000_8v.html#a4267c71337dc6963db47aba754396f48">`TRAP_ILLEGAL_INSTR</a><span class="vhdlchar"></span>) <span class="vhdlchar">trap</span> &lt;= <span class="vhdllogic">8&#39;d4</span>;
<a name="l01937"></a>01937 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">trap_control</span> == <a class="code" href="ao68000_8v.html#a111476f2c18a4085c9a5cea3692dc990">`TRAP_DIV_BY_ZERO</a><span class="vhdlchar"></span>) <span class="vhdlchar">trap</span> &lt;= <span class="vhdllogic">8&#39;d5</span>;
<a name="l01938"></a>01938 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">trap_control</span> == <a class="code" href="ao68000_8v.html#a7d97a1e77166d92c1d69452c3e836682">`TRAP_CHK</a><span class="vhdlchar"></span>) <span class="vhdlchar">trap</span> &lt;= <span class="vhdllogic">8&#39;d6</span>;
<a name="l01939"></a>01939 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">trap_control</span> == <a class="code" href="ao68000_8v.html#a66a7d33a63851daa49e101494acd6118">`TRAP_TRAPV</a><span class="vhdlchar"></span>) <span class="vhdlchar">trap</span> &lt;= <span class="vhdllogic">8&#39;d7</span>;
<a name="l01940"></a>01940 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">trap_control</span> == <a class="code" href="ao68000_8v.html#a940b41a2a1e4c585e15f1c2bef5d5c6f">`TRAP_PRIVIL_VIOLAT</a><span class="vhdlchar"></span>) <span class="vhdlchar">trap</span> &lt;= <span class="vhdllogic">8&#39;d8</span>;
<a name="l01941"></a>01941 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">trap_control</span> == <a class="code" href="ao68000_8v.html#a84705ced93a01047ec829b7ea942cee0">`TRAP_TRACE</a><span class="vhdlchar"></span>) <span class="vhdlchar">trap</span> &lt;= <span class="vhdllogic">8&#39;d9</span>;
<a name="l01942"></a>01942 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">trap_control</span> == <a class="code" href="ao68000_8v.html#a4d09227bd9de91efc1a40bf676e10c72">`TRAP_TRAP</a><span class="vhdlchar"></span>) <span class="vhdlchar">trap</span> &lt;= { <span class="vhdllogic">4&#39;b0010</span>, <span class="vhdlchar">ir</span>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] };
<a name="l01943"></a>01943 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">trap_control</span> == <a class="code" href="ao68000_8v.html#a8d6c015903e3a60339a6e8cc196bb440">`TRAP_FROM_DECODER</a><span class="vhdlchar"></span>) <span class="vhdlchar">trap</span> &lt;= <a class="code" href="classregisters.html#a278b33a84015867a530ac4279331d570">decoder_trap</a>;
<a name="l01944"></a>01944 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">trap_control</span> == <a class="code" href="ao68000_8v.html#a57812c3cf3905152a60361ae979a4c2d">`TRAP_FROM_INTERRUPT</a><span class="vhdlchar"></span>) <span class="vhdlchar">trap</span> &lt;= <a class="code" href="classregisters.html#a10ef9845f594ecc956dc1b1c8cdef44e">interrupt_trap</a>;
<a name="l01945"></a>01945 <span class="vhdlkeyword">end</span>
</pre></div>
</div>
</div>
356,13 → 356,13
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01946">1946</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01947">1947</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<div class="fragment"><pre class="fragment">
<a name="l01946"></a>01946 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01947"></a>01947 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">offset</span> &lt;= <span class="vhdllogic">32&#39;d0</span>;
<a name="l01948"></a>01948 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">offset_control</span> == <a class="code" href="ao68000_8v.html#ad904ffb95a59f475e446877344adb415">`OFFSET_IMM_8</a><span class="vhdlchar"></span>) <span class="vhdlchar">offset</span> &lt;= { {<span class="vhdllogic">24</span>{<a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">71</span>]}}, <a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">71</span>:<span class="vhdllogic">64</span>] };
<a name="l01949"></a>01949 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">offset_control</span> == <a class="code" href="ao68000_8v.html#a87c5da2d7633077683260709d88602e0">`OFFSET_IMM_16</a><span class="vhdlchar"></span>) <span class="vhdlchar">offset</span> &lt;= { {<span class="vhdllogic">16</span>{<a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">79</span>]}}, <a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">79</span>:<span class="vhdllogic">64</span>] };
<a name="l01950"></a>01950 <span class="vhdlkeyword">end</span>
<a name="l01947"></a>01947 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01948"></a>01948 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">offset</span> &lt;= <span class="vhdllogic">32&#39;d0</span>;
<a name="l01949"></a>01949 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">offset_control</span> == <a class="code" href="ao68000_8v.html#ad904ffb95a59f475e446877344adb415">`OFFSET_IMM_8</a><span class="vhdlchar"></span>) <span class="vhdlchar">offset</span> &lt;= { {<span class="vhdllogic">24</span>{<a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">71</span>]}}, <a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">71</span>:<span class="vhdllogic">64</span>] };
<a name="l01950"></a>01950 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">offset_control</span> == <a class="code" href="ao68000_8v.html#a87c5da2d7633077683260709d88602e0">`OFFSET_IMM_16</a><span class="vhdlchar"></span>) <span class="vhdlchar">offset</span> &lt;= { {<span class="vhdllogic">16</span>{<a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">79</span>]}}, <a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">79</span>:<span class="vhdllogic">64</span>] };
<a name="l01951"></a>01951 <span class="vhdlkeyword">end</span>
</pre></div>
</div>
</div>
385,20 → 385,20
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01952">1952</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01953">1953</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<div class="fragment"><pre class="fragment">
<a name="l01952"></a>01952 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01953"></a>01953 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">index</span> &lt;= <span class="vhdllogic">32&#39;d0</span>;
<a name="l01954"></a>01954 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">index_control</span> == <a class="code" href="ao68000_8v.html#a1db54bd70d82cea2a77c6d5c823f04db">`INDEX_0</a><span class="vhdlchar"></span>) <span class="vhdlchar">index</span> &lt;= <span class="vhdllogic">32&#39;d0</span>;
<a name="l01955"></a>01955 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">index_control</span> == <a class="code" href="ao68000_8v.html#af05405b84ee28262882d3c7ac7a5a80c">`INDEX_LOAD_EXTENDED</a><span class="vhdlchar"></span>) <span class="vhdlchar">index</span> &lt;=
<a name="l01956"></a>01956 (<a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">79</span>] == <span class="vhdllogic">1&#39;b0</span>) ?
<a name="l01957"></a>01957 ( (<a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">75</span>] == <span class="vhdllogic">1&#39;b0</span>) ?
<a name="l01958"></a>01958 { {<span class="vhdllogic">16</span>{<a class="code" href="classregisters.html#a659bea909e94f7512c4311bcff473a5d">Dn_output</a>[<span class="vhdllogic">15</span>]}}, <a class="code" href="classregisters.html#a659bea909e94f7512c4311bcff473a5d">Dn_output</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] } : <a class="code" href="classregisters.html#a659bea909e94f7512c4311bcff473a5d">Dn_output</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>]
<a name="l01959"></a>01959 ) :
<a name="l01960"></a>01960 ( (<a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">75</span>] == <span class="vhdllogic">1&#39;b0</span>) ?
<a name="l01961"></a>01961 { {<span class="vhdllogic">16</span>{<a class="code" href="classregisters.html#a7fdc26691a005524667257529b1c1212">An_output</a>[<span class="vhdllogic">15</span>]}}, <a class="code" href="classregisters.html#a7fdc26691a005524667257529b1c1212">An_output</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] } : <a class="code" href="classregisters.html#a7fdc26691a005524667257529b1c1212">An_output</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>]
<a name="l01962"></a>01962 );
<a name="l01963"></a>01963 <span class="vhdlkeyword">end</span>
<a name="l01953"></a>01953 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01954"></a>01954 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">index</span> &lt;= <span class="vhdllogic">32&#39;d0</span>;
<a name="l01955"></a>01955 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">index_control</span> == <a class="code" href="ao68000_8v.html#a1db54bd70d82cea2a77c6d5c823f04db">`INDEX_0</a><span class="vhdlchar"></span>) <span class="vhdlchar">index</span> &lt;= <span class="vhdllogic">32&#39;d0</span>;
<a name="l01956"></a>01956 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">index_control</span> == <a class="code" href="ao68000_8v.html#af05405b84ee28262882d3c7ac7a5a80c">`INDEX_LOAD_EXTENDED</a><span class="vhdlchar"></span>) <span class="vhdlchar">index</span> &lt;=
<a name="l01957"></a>01957 (<a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">79</span>] == <span class="vhdllogic">1&#39;b0</span>) ?
<a name="l01958"></a>01958 ( (<a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">75</span>] == <span class="vhdllogic">1&#39;b0</span>) ?
<a name="l01959"></a>01959 { {<span class="vhdllogic">16</span>{<a class="code" href="classregisters.html#a659bea909e94f7512c4311bcff473a5d">Dn_output</a>[<span class="vhdllogic">15</span>]}}, <a class="code" href="classregisters.html#a659bea909e94f7512c4311bcff473a5d">Dn_output</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] } : <a class="code" href="classregisters.html#a659bea909e94f7512c4311bcff473a5d">Dn_output</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>]
<a name="l01960"></a>01960 ) :
<a name="l01961"></a>01961 ( (<a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">75</span>] == <span class="vhdllogic">1&#39;b0</span>) ?
<a name="l01962"></a>01962 { {<span class="vhdllogic">16</span>{<a class="code" href="classregisters.html#a7fdc26691a005524667257529b1c1212">An_output</a>[<span class="vhdllogic">15</span>]}}, <a class="code" href="classregisters.html#a7fdc26691a005524667257529b1c1212">An_output</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] } : <a class="code" href="classregisters.html#a7fdc26691a005524667257529b1c1212">An_output</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>]
<a name="l01963"></a>01963 );
<a name="l01964"></a>01964 <span class="vhdlkeyword">end</span>
</pre></div>
</div>
</div>
421,13 → 421,13
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01965">1965</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01966">1966</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<div class="fragment"><pre class="fragment">
<a name="l01965"></a>01965 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01966"></a>01966 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">stop_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01967"></a>01967 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">stop_flag_control</span> == <a class="code" href="ao68000_8v.html#a5131e7ee341cd6f2ea5350a89b19a488">`STOP_FLAG_SET</a><span class="vhdlchar"></span>) <span class="vhdlchar">stop_flag</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01968"></a>01968 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">stop_flag_control</span> == <a class="code" href="ao68000_8v.html#a0e63684fc863d639423c2d9f0f8e6cd9">`STOP_FLAG_CLEAR</a><span class="vhdlchar"></span>) <span class="vhdlchar">stop_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01969"></a>01969 <span class="vhdlkeyword">end</span>
<a name="l01966"></a>01966 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01967"></a>01967 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">stop_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01968"></a>01968 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">stop_flag_control</span> == <a class="code" href="ao68000_8v.html#a5131e7ee341cd6f2ea5350a89b19a488">`STOP_FLAG_SET</a><span class="vhdlchar"></span>) <span class="vhdlchar">stop_flag</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01969"></a>01969 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">stop_flag_control</span> == <a class="code" href="ao68000_8v.html#a0e63684fc863d639423c2d9f0f8e6cd9">`STOP_FLAG_CLEAR</a><span class="vhdlchar"></span>) <span class="vhdlchar">stop_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01970"></a>01970 <span class="vhdlkeyword">end</span>
</pre></div>
</div>
</div>
450,24 → 450,24
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01746">1746</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01747">1747</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<div class="fragment"><pre class="fragment">
<a name="l01746"></a>01746 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01747"></a>01747 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>
<a name="l01748"></a>01748 <span class="vhdlchar">pc</span> &lt;= <span class="vhdllogic">32&#39;d0</span>;
<a name="l01749"></a>01749 <a class="code" href="classregisters.html#af160a45a0b3cd7794efb7fea1ed60526">pc_valid</a> &lt;= <span class="vhdllogic">32&#39;d0</span>;
<a name="l01750"></a>01750 <span class="vhdlkeyword">end</span>
<a name="l01751"></a>01751 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01752"></a>01752 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_control</span> == <a class="code" href="ao68000_8v.html#a63d3becb9e2a770cfd9df4a70298c30a">`PC_FROM_RESULT</a><span class="vhdlchar"></span>) <span class="vhdlchar">pc</span> = <a class="code" href="classregisters.html#ad27ecd2d9ef571fa88b998f3674fe9a6">result</a>;
<a name="l01753"></a>01753 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_control</span> == <a class="code" href="ao68000_8v.html#a023942fcdb1eb88002847e9730cf62c2">`PC_INCR_BY_2</a><span class="vhdlchar"></span>) <span class="vhdlchar">pc</span> = <span class="vhdlchar">pc</span> + <span class="vhdllogic">32&#39;d2</span>;
<a name="l01754"></a>01754 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_control</span> == <a class="code" href="ao68000_8v.html#a6b8aff09ca5bd77e19e6d7a5076a58bd">`PC_INCR_BY_4</a><span class="vhdlchar"></span>) <span class="vhdlchar">pc</span> = <span class="vhdlchar">pc</span> + <span class="vhdllogic">32&#39;d4</span>;
<a name="l01755"></a>01755 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_control</span> == <a class="code" href="ao68000_8v.html#aefc526541d0911ae626689caead407ab">`PC_INCR_BY_SIZE</a><span class="vhdlchar"></span>) <span class="vhdlchar">pc</span> = (<span class="vhdlchar">size</span>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1&#39;b0</span>) ? <span class="vhdlchar">pc</span> + <span class="vhdllogic">32&#39;d2</span> : <span class="vhdlchar">pc</span> + <span class="vhdllogic">32&#39;d4</span>;
<a name="l01756"></a>01756 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_control</span> == <a class="code" href="ao68000_8v.html#a48c2827ab160beae0aab354b09b59e1a">`PC_FROM_PREFETCH_IR</a><span class="vhdlchar"></span>) <span class="vhdlchar">pc</span> = <a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">47</span>:<span class="vhdllogic">16</span>];
<a name="l01757"></a>01757 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_control</span> == <a class="code" href="ao68000_8v.html#a6f1c276d75adca2b0290b7936476fde8">`PC_INCR_BY_2_IN_MAIN_LOOP</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classregisters.html#a8031b93d1dc568b98697eb0c81b13bfd">prefetch_ir_valid</a> == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <a class="code" href="classregisters.html#a278b33a84015867a530ac4279331d570">decoder_trap</a> == <span class="vhdllogic">8&#39;d0</span> &amp;&amp; <span class="vhdlchar">stop_flag</span> == <span class="vhdllogic">1&#39;b0</span>)
<a name="l01758"></a>01758 <span class="vhdlchar">pc</span> = <span class="vhdlchar">pc</span> + <span class="vhdllogic">32&#39;d2</span>;
<a name="l01759"></a>01759 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b0</span>) <a class="code" href="classregisters.html#af160a45a0b3cd7794efb7fea1ed60526">pc_valid</a> &lt;= <span class="vhdlchar">pc</span>;
<a name="l01760"></a>01760 <span class="vhdlkeyword">end</span>
<a name="l01761"></a>01761 <span class="vhdlkeyword">end</span>
<a name="l01747"></a>01747 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01748"></a>01748 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>
<a name="l01749"></a>01749 <span class="vhdlchar">pc</span> &lt;= <span class="vhdllogic">32&#39;d0</span>;
<a name="l01750"></a>01750 <a class="code" href="classregisters.html#af160a45a0b3cd7794efb7fea1ed60526">pc_valid</a> &lt;= <span class="vhdllogic">32&#39;d0</span>;
<a name="l01751"></a>01751 <span class="vhdlkeyword">end</span>
<a name="l01752"></a>01752 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01753"></a>01753 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_control</span> == <a class="code" href="ao68000_8v.html#a63d3becb9e2a770cfd9df4a70298c30a">`PC_FROM_RESULT</a><span class="vhdlchar"></span>) <span class="vhdlchar">pc</span> = <a class="code" href="classregisters.html#ad27ecd2d9ef571fa88b998f3674fe9a6">result</a>;
<a name="l01754"></a>01754 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_control</span> == <a class="code" href="ao68000_8v.html#a023942fcdb1eb88002847e9730cf62c2">`PC_INCR_BY_2</a><span class="vhdlchar"></span>) <span class="vhdlchar">pc</span> = <span class="vhdlchar">pc</span> + <span class="vhdllogic">32&#39;d2</span>;
<a name="l01755"></a>01755 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_control</span> == <a class="code" href="ao68000_8v.html#a6b8aff09ca5bd77e19e6d7a5076a58bd">`PC_INCR_BY_4</a><span class="vhdlchar"></span>) <span class="vhdlchar">pc</span> = <span class="vhdlchar">pc</span> + <span class="vhdllogic">32&#39;d4</span>;
<a name="l01756"></a>01756 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_control</span> == <a class="code" href="ao68000_8v.html#aefc526541d0911ae626689caead407ab">`PC_INCR_BY_SIZE</a><span class="vhdlchar"></span>) <span class="vhdlchar">pc</span> = (<span class="vhdlchar">size</span>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1&#39;b0</span>) ? <span class="vhdlchar">pc</span> + <span class="vhdllogic">32&#39;d2</span> : <span class="vhdlchar">pc</span> + <span class="vhdllogic">32&#39;d4</span>;
<a name="l01757"></a>01757 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_control</span> == <a class="code" href="ao68000_8v.html#a48c2827ab160beae0aab354b09b59e1a">`PC_FROM_PREFETCH_IR</a><span class="vhdlchar"></span>) <span class="vhdlchar">pc</span> = <a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">47</span>:<span class="vhdllogic">16</span>];
<a name="l01758"></a>01758 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_control</span> == <a class="code" href="ao68000_8v.html#a6f1c276d75adca2b0290b7936476fde8">`PC_INCR_BY_2_IN_MAIN_LOOP</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classregisters.html#a8031b93d1dc568b98697eb0c81b13bfd">prefetch_ir_valid</a> == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <a class="code" href="classregisters.html#a278b33a84015867a530ac4279331d570">decoder_trap</a> == <span class="vhdllogic">8&#39;d0</span> &amp;&amp; <span class="vhdlchar">stop_flag</span> == <span class="vhdllogic">1&#39;b0</span>)
<a name="l01759"></a>01759 <span class="vhdlchar">pc</span> = <span class="vhdlchar">pc</span> + <span class="vhdllogic">32&#39;d2</span>;
<a name="l01760"></a>01760 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b0</span>) <a class="code" href="classregisters.html#af160a45a0b3cd7794efb7fea1ed60526">pc_valid</a> &lt;= <span class="vhdlchar">pc</span>;
<a name="l01761"></a>01761 <span class="vhdlkeyword">end</span>
<a name="l01762"></a>01762 <span class="vhdlkeyword">end</span>
</pre></div>
</div>
</div>
490,13 → 490,13
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01971">1971</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01972">1972</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<div class="fragment"><pre class="fragment">
<a name="l01971"></a>01971 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01972"></a>01972 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">trace_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01973"></a>01973 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">trace_flag_control</span> == <a class="code" href="ao68000_8v.html#a3cb5bcdd68537f527007213efe5c2d4f">`TRACE_FLAG_COPY_WHEN_NO_STOP</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classregisters.html#a8031b93d1dc568b98697eb0c81b13bfd">prefetch_ir_valid</a> == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <a class="code" href="classregisters.html#a278b33a84015867a530ac4279331d570">decoder_trap</a> == <span class="vhdllogic">8&#39;d0</span> &amp;&amp; <span class="vhdlchar">stop_flag</span> == <span class="vhdllogic">1&#39;b0</span>)
<a name="l01974"></a>01974 <span class="vhdlchar">trace_flag</span> &lt;= <a class="code" href="classregisters.html#a116473c99b3cbf75fd0f48a25ea9227e">sr</a>[<span class="vhdllogic">15</span>];
<a name="l01975"></a>01975 <span class="vhdlkeyword">end</span>
<a name="l01972"></a>01972 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01973"></a>01973 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">trace_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01974"></a>01974 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">trace_flag_control</span> == <a class="code" href="ao68000_8v.html#a3cb5bcdd68537f527007213efe5c2d4f">`TRACE_FLAG_COPY_WHEN_NO_STOP</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classregisters.html#a8031b93d1dc568b98697eb0c81b13bfd">prefetch_ir_valid</a> == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <a class="code" href="classregisters.html#a278b33a84015867a530ac4279331d570">decoder_trap</a> == <span class="vhdllogic">8&#39;d0</span> &amp;&amp; <span class="vhdlchar">stop_flag</span> == <span class="vhdllogic">1&#39;b0</span>)
<a name="l01975"></a>01975 <span class="vhdlchar">trace_flag</span> &lt;= <a class="code" href="classregisters.html#a116473c99b3cbf75fd0f48a25ea9227e">sr</a>[<span class="vhdllogic">15</span>];
<a name="l01976"></a>01976 <span class="vhdlkeyword">end</span>
</pre></div>
</div>
</div>
519,14 → 519,14
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01977">1977</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01978">1978</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<div class="fragment"><pre class="fragment">
<a name="l01977"></a>01977 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01978"></a>01978 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">group_0_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01979"></a>01979 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">group_0_flag_control</span> == <a class="code" href="ao68000_8v.html#a5333b31d43f3c7de70d3cad313720ef4">`GROUP_0_FLAG_SET</a><span class="vhdlchar"></span>) <span class="vhdlchar">group_0_flag</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01980"></a>01980 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">group_0_flag_control</span> == <a class="code" href="ao68000_8v.html#a28adb393ace594d548dfe7f070fd837b">`GROUP_0_FLAG_CLEAR_WHEN_VALID_PREFETCH</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classregisters.html#a8031b93d1dc568b98697eb0c81b13bfd">prefetch_ir_valid</a> == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <span class="vhdlchar">stop_flag</span> == <span class="vhdllogic">1&#39;b0</span>)
<a name="l01981"></a>01981 <span class="vhdlchar">group_0_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01982"></a>01982 <span class="vhdlkeyword">end</span>
<a name="l01978"></a>01978 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01979"></a>01979 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">group_0_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01980"></a>01980 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">group_0_flag_control</span> == <a class="code" href="ao68000_8v.html#a5333b31d43f3c7de70d3cad313720ef4">`GROUP_0_FLAG_SET</a><span class="vhdlchar"></span>) <span class="vhdlchar">group_0_flag</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01981"></a>01981 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">group_0_flag_control</span> == <a class="code" href="ao68000_8v.html#a28adb393ace594d548dfe7f070fd837b">`GROUP_0_FLAG_CLEAR_WHEN_VALID_PREFETCH</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classregisters.html#a8031b93d1dc568b98697eb0c81b13bfd">prefetch_ir_valid</a> == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <span class="vhdlchar">stop_flag</span> == <span class="vhdllogic">1&#39;b0</span>)
<a name="l01982"></a>01982 <span class="vhdlchar">group_0_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01983"></a>01983 <span class="vhdlkeyword">end</span>
</pre></div>
</div>
</div>
549,14 → 549,14
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01984">1984</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01985">1985</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<div class="fragment"><pre class="fragment">
<a name="l01984"></a>01984 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01985"></a>01985 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">instruction_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01986"></a>01986 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">instruction_flag_control</span> == <a class="code" href="ao68000_8v.html#a6882447365cc7940c16017ee13305875">`INSTRUCTION_FLAG_SET</a><span class="vhdlchar"></span>) <span class="vhdlchar">instruction_flag</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01987"></a>01987 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">instruction_flag_control</span> == <a class="code" href="ao68000_8v.html#adaf70d0e1aaa9fe89fc79971d67bc172">`INSTRUCTION_FLAG_CLEAR_IN_MAIN_LOOP</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classregisters.html#a8031b93d1dc568b98697eb0c81b13bfd">prefetch_ir_valid</a> == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <a class="code" href="classregisters.html#a278b33a84015867a530ac4279331d570">decoder_trap</a> == <span class="vhdllogic">8&#39;d0</span> &amp;&amp; <span class="vhdlchar">stop_flag</span> == <span class="vhdllogic">1&#39;b0</span>)
<a name="l01988"></a>01988 <span class="vhdlchar">instruction_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01989"></a>01989 <span class="vhdlkeyword">end</span>
<a name="l01985"></a>01985 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01986"></a>01986 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">instruction_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01987"></a>01987 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">instruction_flag_control</span> == <a class="code" href="ao68000_8v.html#a6882447365cc7940c16017ee13305875">`INSTRUCTION_FLAG_SET</a><span class="vhdlchar"></span>) <span class="vhdlchar">instruction_flag</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01988"></a>01988 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">instruction_flag_control</span> == <a class="code" href="ao68000_8v.html#adaf70d0e1aaa9fe89fc79971d67bc172">`INSTRUCTION_FLAG_CLEAR_IN_MAIN_LOOP</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classregisters.html#a8031b93d1dc568b98697eb0c81b13bfd">prefetch_ir_valid</a> == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <a class="code" href="classregisters.html#a278b33a84015867a530ac4279331d570">decoder_trap</a> == <span class="vhdllogic">8&#39;d0</span> &amp;&amp; <span class="vhdlchar">stop_flag</span> == <span class="vhdllogic">1&#39;b0</span>)
<a name="l01989"></a>01989 <span class="vhdlchar">instruction_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01990"></a>01990 <span class="vhdlkeyword">end</span>
</pre></div>
</div>
</div>
579,13 → 579,13
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01991">1991</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01992">1992</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<div class="fragment"><pre class="fragment">
<a name="l01991"></a>01991 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01992"></a>01992 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">read_modify_write_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01993"></a>01993 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">read_modify_write_flag_control</span> == <a class="code" href="ao68000_8v.html#a2ba2dbb4697aa9a3559b775da0ade761">`READ_MODIFY_WRITE_FLAG_SET</a><span class="vhdlchar"></span>) <span class="vhdlchar">read_modify_write_flag</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01994"></a>01994 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">read_modify_write_flag_control</span> == <a class="code" href="ao68000_8v.html#ace5de6cd5ad33427e8efd5ec8191c297">`READ_MODIFY_WRITE_FLAG_CLEAR</a><span class="vhdlchar"></span>) <span class="vhdlchar">read_modify_write_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01995"></a>01995 <span class="vhdlkeyword">end</span>
<a name="l01992"></a>01992 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01993"></a>01993 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">read_modify_write_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01994"></a>01994 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">read_modify_write_flag_control</span> == <a class="code" href="ao68000_8v.html#a2ba2dbb4697aa9a3559b775da0ade761">`READ_MODIFY_WRITE_FLAG_SET</a><span class="vhdlchar"></span>) <span class="vhdlchar">read_modify_write_flag</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01995"></a>01995 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">read_modify_write_flag_control</span> == <a class="code" href="ao68000_8v.html#ace5de6cd5ad33427e8efd5ec8191c297">`READ_MODIFY_WRITE_FLAG_CLEAR</a><span class="vhdlchar"></span>) <span class="vhdlchar">read_modify_write_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01996"></a>01996 <span class="vhdlkeyword">end</span>
</pre></div>
</div>
</div>
608,13 → 608,13
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01997">1997</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01998">1998</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<div class="fragment"><pre class="fragment">
<a name="l01997"></a>01997 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01998"></a>01998 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">do_reset_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01999"></a>01999 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_reset_flag_control</span> == <a class="code" href="ao68000_8v.html#a682472d63f131aa31c38abd6f2d577ab">`DO_RESET_FLAG_SET</a><span class="vhdlchar"></span>) <span class="vhdlchar">do_reset_flag</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l02000"></a>02000 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_reset_flag_control</span> == <a class="code" href="ao68000_8v.html#afd7c962bcd95f3629d247e7790f9cf95">`DO_RESET_FLAG_CLEAR</a><span class="vhdlchar"></span>) <span class="vhdlchar">do_reset_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02001"></a>02001 <span class="vhdlkeyword">end</span>
<a name="l01998"></a>01998 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01999"></a>01999 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">do_reset_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02000"></a>02000 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_reset_flag_control</span> == <a class="code" href="ao68000_8v.html#a682472d63f131aa31c38abd6f2d577ab">`DO_RESET_FLAG_SET</a><span class="vhdlchar"></span>) <span class="vhdlchar">do_reset_flag</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l02001"></a>02001 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_reset_flag_control</span> == <a class="code" href="ao68000_8v.html#afd7c962bcd95f3629d247e7790f9cf95">`DO_RESET_FLAG_CLEAR</a><span class="vhdlchar"></span>) <span class="vhdlchar">do_reset_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02002"></a>02002 <span class="vhdlkeyword">end</span>
</pre></div>
</div>
</div>
637,13 → 637,13
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02003">2003</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02004">2004</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<div class="fragment"><pre class="fragment">
<a name="l02003"></a>02003 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l02004"></a>02004 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">do_interrupt_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02005"></a>02005 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_interrupt_flag_control</span> == <a class="code" href="ao68000_8v.html#acc420165ae00aa63b4d40c220dc1ed79">`DO_INTERRUPT_FLAG_SET_IF_ACTIVE</a><span class="vhdlchar"></span>) <span class="vhdlchar">do_interrupt_flag</span> &lt;= (<a class="code" href="classregisters.html#aa92eeffb2c5af01c413399dfb1f58b17">interrupt_mask</a> != <span class="vhdllogic">3&#39;b000</span>) ? <span class="vhdllogic">1&#39;b1</span> : <span class="vhdllogic">1&#39;b0</span>;
<a name="l02006"></a>02006 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_interrupt_flag_control</span> == <a class="code" href="ao68000_8v.html#abe668eeea71491f898b31b9c66a4db96">`DO_INTERRUPT_FLAG_CLEAR</a><span class="vhdlchar"></span>) <span class="vhdlchar">do_interrupt_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02007"></a>02007 <span class="vhdlkeyword">end</span>
<a name="l02004"></a>02004 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l02005"></a>02005 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">do_interrupt_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02006"></a>02006 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_interrupt_flag_control</span> == <a class="code" href="ao68000_8v.html#acc420165ae00aa63b4d40c220dc1ed79">`DO_INTERRUPT_FLAG_SET_IF_ACTIVE</a><span class="vhdlchar"></span>) <span class="vhdlchar">do_interrupt_flag</span> &lt;= (<a class="code" href="classregisters.html#aa92eeffb2c5af01c413399dfb1f58b17">interrupt_mask</a> != <span class="vhdllogic">3&#39;b000</span>) ? <span class="vhdllogic">1&#39;b1</span> : <span class="vhdllogic">1&#39;b0</span>;
<a name="l02007"></a>02007 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_interrupt_flag_control</span> == <a class="code" href="ao68000_8v.html#abe668eeea71491f898b31b9c66a4db96">`DO_INTERRUPT_FLAG_CLEAR</a><span class="vhdlchar"></span>) <span class="vhdlchar">do_interrupt_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02008"></a>02008 <span class="vhdlkeyword">end</span>
</pre></div>
</div>
</div>
666,13 → 666,13
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02009">2009</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02010">2010</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<div class="fragment"><pre class="fragment">
<a name="l02009"></a>02009 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l02010"></a>02010 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">do_read_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02011"></a>02011 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_read_flag_control</span> == <a class="code" href="ao68000_8v.html#a210a4746c070617bd4272cf091ce4977">`DO_READ_FLAG_SET</a><span class="vhdlchar"></span>) <span class="vhdlchar">do_read_flag</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l02012"></a>02012 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_read_flag_control</span> == <a class="code" href="ao68000_8v.html#a3186ce27b4c9202d124c4bee6b07e2fd">`DO_READ_FLAG_CLEAR</a><span class="vhdlchar"></span>) <span class="vhdlchar">do_read_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02013"></a>02013 <span class="vhdlkeyword">end</span>
<a name="l02010"></a>02010 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l02011"></a>02011 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">do_read_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02012"></a>02012 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_read_flag_control</span> == <a class="code" href="ao68000_8v.html#a210a4746c070617bd4272cf091ce4977">`DO_READ_FLAG_SET</a><span class="vhdlchar"></span>) <span class="vhdlchar">do_read_flag</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l02013"></a>02013 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_read_flag_control</span> == <a class="code" href="ao68000_8v.html#a3186ce27b4c9202d124c4bee6b07e2fd">`DO_READ_FLAG_CLEAR</a><span class="vhdlchar"></span>) <span class="vhdlchar">do_read_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02014"></a>02014 <span class="vhdlkeyword">end</span>
</pre></div>
</div>
</div>
695,13 → 695,13
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02015">2015</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02016">2016</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<div class="fragment"><pre class="fragment">
<a name="l02015"></a>02015 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l02016"></a>02016 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">do_write_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02017"></a>02017 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_write_flag_control</span> == <a class="code" href="ao68000_8v.html#a97fc325edc48a555daf24f1757c5e7bf">`DO_WRITE_FLAG_SET</a><span class="vhdlchar"></span>) <span class="vhdlchar">do_write_flag</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l02018"></a>02018 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_write_flag_control</span> == <a class="code" href="ao68000_8v.html#ad6f9aea669c0c0233f4155f29afc4d1d">`DO_WRITE_FLAG_CLEAR</a><span class="vhdlchar"></span>) <span class="vhdlchar">do_write_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02019"></a>02019 <span class="vhdlkeyword">end</span>
<a name="l02016"></a>02016 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l02017"></a>02017 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">do_write_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02018"></a>02018 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_write_flag_control</span> == <a class="code" href="ao68000_8v.html#a97fc325edc48a555daf24f1757c5e7bf">`DO_WRITE_FLAG_SET</a><span class="vhdlchar"></span>) <span class="vhdlchar">do_write_flag</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l02019"></a>02019 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_write_flag_control</span> == <a class="code" href="ao68000_8v.html#ad6f9aea669c0c0233f4155f29afc4d1d">`DO_WRITE_FLAG_CLEAR</a><span class="vhdlchar"></span>) <span class="vhdlchar">do_write_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02020"></a>02020 <span class="vhdlkeyword">end</span>
</pre></div>
</div>
</div>
724,12 → 724,12
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02021">2021</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02022">2022</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<div class="fragment"><pre class="fragment">
<a name="l02021"></a>02021 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l02022"></a>02022 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">do_blocked_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02023"></a>02023 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_blocked_flag_control</span> == <a class="code" href="ao68000_8v.html#ac69029fe984c3090537ed247a8106344">`DO_BLOCKED_FLAG_SET</a><span class="vhdlchar"></span>) <span class="vhdlchar">do_blocked_flag</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l02024"></a>02024 <span class="vhdlkeyword">end</span>
<a name="l02022"></a>02022 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l02023"></a>02023 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">do_blocked_flag</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02024"></a>02024 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_blocked_flag_control</span> == <a class="code" href="ao68000_8v.html#ac69029fe984c3090537ed247a8106344">`DO_BLOCKED_FLAG_SET</a><span class="vhdlchar"></span>) <span class="vhdlchar">do_blocked_flag</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l02025"></a>02025 <span class="vhdlkeyword">end</span>
</pre></div>
</div>
</div>
752,12 → 752,12
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02026">2026</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02027">2027</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<div class="fragment"><pre class="fragment">
<a name="l02026"></a>02026 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l02027"></a>02027 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">data_write</span> &lt;= <span class="vhdllogic">32&#39;d0</span>;
<a name="l02028"></a>02028 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">data_write_control</span> == <a class="code" href="ao68000_8v.html#ab576808298f9e1938241b8843e55c54e">`DATA_WRITE_FROM_RESULT</a><span class="vhdlchar"></span>) <span class="vhdlchar">data_write</span> &lt;= <a class="code" href="classregisters.html#ad27ecd2d9ef571fa88b998f3674fe9a6">result</a>;
<a name="l02029"></a>02029 <span class="vhdlkeyword">end</span>
<a name="l02027"></a>02027 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l02028"></a>02028 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">data_write</span> &lt;= <span class="vhdllogic">32&#39;d0</span>;
<a name="l02029"></a>02029 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">data_write_control</span> == <a class="code" href="ao68000_8v.html#ab576808298f9e1938241b8843e55c54e">`DATA_WRITE_FROM_RESULT</a><span class="vhdlchar"></span>) <span class="vhdlchar">data_write</span> &lt;= <a class="code" href="classregisters.html#ad27ecd2d9ef571fa88b998f3674fe9a6">result</a>;
<a name="l02030"></a>02030 <span class="vhdlkeyword">end</span>
</pre></div>
</div>
</div>
780,37 → 780,37
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01773">1773</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01774">1774</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<div class="fragment"><pre class="fragment">
<a name="l01773"></a>01773 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01774"></a>01774 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>
<a name="l01775"></a>01775 <span class="vhdlchar">size</span> &lt;= <span class="vhdllogic">2&#39;b00</span>;
<a name="l01776"></a>01776 <span class="vhdlkeyword">end</span>
<a name="l01777"></a>01777 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">size_control</span> != <a class="code" href="ao68000_8v.html#a85698146140d774ffe2b54e5be255726">`SIZE_IDLE</a><span class="vhdlchar"></span>) <span class="vhdlkeyword">begin</span>
<a name="l01778"></a>01778 <span class="keyword">// BYTE</span>
<a name="l01779"></a>01779 <span class="vhdlchar">size</span>[<span class="vhdllogic">0</span>] &lt;= (<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a8a04b85bed76a4381d1187aec9694a7e">`SIZE_BYTE</a><span class="vhdlchar"></span>)
<a name="l01780"></a>01780 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#ad8d417f0548efb4299bed1ed75004cbe">`SIZE_3</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b00</span>))
<a name="l01781"></a>01781 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a4d9196508aad9e995d45bfda3f7c6884">`SIZE_4</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">13</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">2&#39;b01</span>))
<a name="l01782"></a>01782 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a3ce4d5e820fe7c438d0bd9c7f067ac3f">`SIZE_6</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b000</span>));
<a name="l01783"></a>01783 <span class="keyword">// WORD</span>
<a name="l01784"></a>01784 <span class="vhdlchar">size</span>[<span class="vhdllogic">1</span>] &lt;= (<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a9da3fa515a6d6e5949573714c5682999">`SIZE_WORD</a><span class="vhdlchar"></span>)
<a name="l01785"></a>01785 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a1b8724879ab643802f27348fa58f7208">`SIZE_1</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b00</span>))
<a name="l01786"></a>01786 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a83d20a891b85a7fabe3d8c74b66ad884">`SIZE_1_PLUS</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b10</span>))
<a name="l01787"></a>01787 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a1eca0e7e9287916bcfa96b96b0c46154">`SIZE_2</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1&#39;b0</span>))
<a name="l01788"></a>01788 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#ad8d417f0548efb4299bed1ed75004cbe">`SIZE_3</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b01</span>))
<a name="l01789"></a>01789 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a4d9196508aad9e995d45bfda3f7c6884">`SIZE_4</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">13</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">2&#39;b11</span>))
<a name="l01790"></a>01790 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a0e07cba66f352b53ebb2dd2a48c58cff">`SIZE_5</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b0</span>));
<a name="l01791"></a>01791 <span class="keyword">// LONG</span>
<a name="l01792"></a>01792 <span class="vhdlchar">size</span>[<span class="vhdllogic">2</span>] &lt;= (<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#ae54bb350f5d3a019211af2a214f46273">`SIZE_LONG</a><span class="vhdlchar"></span>)
<a name="l01793"></a>01793 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a1b8724879ab643802f27348fa58f7208">`SIZE_1</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b00</span>))
<a name="l01794"></a>01794 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a83d20a891b85a7fabe3d8c74b66ad884">`SIZE_1_PLUS</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b10</span>))
<a name="l01795"></a>01795 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a1eca0e7e9287916bcfa96b96b0c46154">`SIZE_2</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1&#39;b1</span>))
<a name="l01796"></a>01796 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#ad8d417f0548efb4299bed1ed75004cbe">`SIZE_3</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>] == <span class="vhdllogic">1&#39;b1</span>))
<a name="l01797"></a>01797 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a4d9196508aad9e995d45bfda3f7c6884">`SIZE_4</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">12</span>] == <span class="vhdllogic">1&#39;b0</span>))
<a name="l01798"></a>01798 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a0e07cba66f352b53ebb2dd2a48c58cff">`SIZE_5</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b1</span>))
<a name="l01799"></a>01799 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a3ce4d5e820fe7c438d0bd9c7f067ac3f">`SIZE_6</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b000</span>));
<a name="l01800"></a>01800 <span class="vhdlkeyword">end</span>
<a name="l01801"></a>01801 <span class="vhdlkeyword">end</span>
<a name="l01774"></a>01774 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01775"></a>01775 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>
<a name="l01776"></a>01776 <span class="vhdlchar">size</span> &lt;= <span class="vhdllogic">2&#39;b00</span>;
<a name="l01777"></a>01777 <span class="vhdlkeyword">end</span>
<a name="l01778"></a>01778 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">size_control</span> != <a class="code" href="ao68000_8v.html#a85698146140d774ffe2b54e5be255726">`SIZE_IDLE</a><span class="vhdlchar"></span>) <span class="vhdlkeyword">begin</span>
<a name="l01779"></a>01779 <span class="keyword">// BYTE</span>
<a name="l01780"></a>01780 <span class="vhdlchar">size</span>[<span class="vhdllogic">0</span>] &lt;= (<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a8a04b85bed76a4381d1187aec9694a7e">`SIZE_BYTE</a><span class="vhdlchar"></span>)
<a name="l01781"></a>01781 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#ad8d417f0548efb4299bed1ed75004cbe">`SIZE_3</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b00</span>))
<a name="l01782"></a>01782 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a4d9196508aad9e995d45bfda3f7c6884">`SIZE_4</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">13</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">2&#39;b01</span>))
<a name="l01783"></a>01783 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a3ce4d5e820fe7c438d0bd9c7f067ac3f">`SIZE_6</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b000</span>));
<a name="l01784"></a>01784 <span class="keyword">// WORD</span>
<a name="l01785"></a>01785 <span class="vhdlchar">size</span>[<span class="vhdllogic">1</span>] &lt;= (<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a9da3fa515a6d6e5949573714c5682999">`SIZE_WORD</a><span class="vhdlchar"></span>)
<a name="l01786"></a>01786 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a1b8724879ab643802f27348fa58f7208">`SIZE_1</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b00</span>))
<a name="l01787"></a>01787 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a83d20a891b85a7fabe3d8c74b66ad884">`SIZE_1_PLUS</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b10</span>))
<a name="l01788"></a>01788 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a1eca0e7e9287916bcfa96b96b0c46154">`SIZE_2</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1&#39;b0</span>))
<a name="l01789"></a>01789 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#ad8d417f0548efb4299bed1ed75004cbe">`SIZE_3</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b01</span>))
<a name="l01790"></a>01790 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a4d9196508aad9e995d45bfda3f7c6884">`SIZE_4</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">13</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">2&#39;b11</span>))
<a name="l01791"></a>01791 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a0e07cba66f352b53ebb2dd2a48c58cff">`SIZE_5</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b0</span>));
<a name="l01792"></a>01792 <span class="keyword">// LONG</span>
<a name="l01793"></a>01793 <span class="vhdlchar">size</span>[<span class="vhdllogic">2</span>] &lt;= (<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#ae54bb350f5d3a019211af2a214f46273">`SIZE_LONG</a><span class="vhdlchar"></span>)
<a name="l01794"></a>01794 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a1b8724879ab643802f27348fa58f7208">`SIZE_1</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b00</span>))
<a name="l01795"></a>01795 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a83d20a891b85a7fabe3d8c74b66ad884">`SIZE_1_PLUS</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] != <span class="vhdllogic">2&#39;b10</span>))
<a name="l01796"></a>01796 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a1eca0e7e9287916bcfa96b96b0c46154">`SIZE_2</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1&#39;b1</span>))
<a name="l01797"></a>01797 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#ad8d417f0548efb4299bed1ed75004cbe">`SIZE_3</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>] == <span class="vhdllogic">1&#39;b1</span>))
<a name="l01798"></a>01798 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a4d9196508aad9e995d45bfda3f7c6884">`SIZE_4</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">12</span>] == <span class="vhdllogic">1&#39;b0</span>))
<a name="l01799"></a>01799 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a0e07cba66f352b53ebb2dd2a48c58cff">`SIZE_5</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">8</span>] == <span class="vhdllogic">1&#39;b1</span>))
<a name="l01800"></a>01800 | ((<span class="vhdlchar">size_control</span> == <a class="code" href="ao68000_8v.html#a3ce4d5e820fe7c438d0bd9c7f067ac3f">`SIZE_6</a><span class="vhdlchar"></span>) &amp;&amp; (<span class="vhdlchar">ir</span>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b000</span>));
<a name="l01801"></a>01801 <span class="vhdlkeyword">end</span>
<a name="l01802"></a>01802 <span class="vhdlkeyword">end</span>
</pre></div>
</div>
</div>
833,16 → 833,16
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01803">1803</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01804">1804</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<div class="fragment"><pre class="fragment">
<a name="l01803"></a>01803 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01804"></a>01804 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <a class="code" href="classregisters.html#aa1a45d113f21dba8f82a93ddfe1d6409">ea_reg</a> &lt;= <span class="vhdllogic">3&#39;b000</span>;
<a name="l01805"></a>01805 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#ae09341fa22dc0b4675dc02dc4a5fb918">ea_reg_control</a> == <a class="code" href="ao68000_8v.html#ab608c5385657295b902b8ffc21c43d03">`EA_REG_IR_2_0</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#aa1a45d113f21dba8f82a93ddfe1d6409">ea_reg</a> &lt;= <span class="vhdlchar">ir</span>[<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>];
<a name="l01806"></a>01806 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#ae09341fa22dc0b4675dc02dc4a5fb918">ea_reg_control</a> == <a class="code" href="ao68000_8v.html#a56f29ecaaf69843219c88d8e0f252048">`EA_REG_IR_11_9</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#aa1a45d113f21dba8f82a93ddfe1d6409">ea_reg</a> &lt;= <span class="vhdlchar">ir</span>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>];
<a name="l01807"></a>01807 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#ae09341fa22dc0b4675dc02dc4a5fb918">ea_reg_control</a> == <a class="code" href="ao68000_8v.html#af2b8ce7c793c79dee8394ad309a1ef71">`EA_REG_MOVEM_REG_2_0</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#aa1a45d113f21dba8f82a93ddfe1d6409">ea_reg</a> &lt;= <span class="vhdlchar">movem_modreg</span>[<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>];
<a name="l01808"></a>01808 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#ae09341fa22dc0b4675dc02dc4a5fb918">ea_reg_control</a> == <a class="code" href="ao68000_8v.html#aa5ef414e1c0f769a38cdd8b3aeef5184">`EA_REG_3b111</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#aa1a45d113f21dba8f82a93ddfe1d6409">ea_reg</a> &lt;= <span class="vhdllogic">3&#39;b111</span>;
<a name="l01809"></a>01809 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#ae09341fa22dc0b4675dc02dc4a5fb918">ea_reg_control</a> == <a class="code" href="ao68000_8v.html#ab4936576a8613273a6487d2b78812c55">`EA_REG_3b100</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#aa1a45d113f21dba8f82a93ddfe1d6409">ea_reg</a> &lt;= <span class="vhdllogic">3&#39;b100</span>;
<a name="l01810"></a>01810 <span class="vhdlkeyword">end</span>
<a name="l01804"></a>01804 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01805"></a>01805 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <a class="code" href="classregisters.html#aa1a45d113f21dba8f82a93ddfe1d6409">ea_reg</a> &lt;= <span class="vhdllogic">3&#39;b000</span>;
<a name="l01806"></a>01806 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#ae09341fa22dc0b4675dc02dc4a5fb918">ea_reg_control</a> == <a class="code" href="ao68000_8v.html#ab608c5385657295b902b8ffc21c43d03">`EA_REG_IR_2_0</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#aa1a45d113f21dba8f82a93ddfe1d6409">ea_reg</a> &lt;= <span class="vhdlchar">ir</span>[<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>];
<a name="l01807"></a>01807 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#ae09341fa22dc0b4675dc02dc4a5fb918">ea_reg_control</a> == <a class="code" href="ao68000_8v.html#a56f29ecaaf69843219c88d8e0f252048">`EA_REG_IR_11_9</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#aa1a45d113f21dba8f82a93ddfe1d6409">ea_reg</a> &lt;= <span class="vhdlchar">ir</span>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>];
<a name="l01808"></a>01808 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#ae09341fa22dc0b4675dc02dc4a5fb918">ea_reg_control</a> == <a class="code" href="ao68000_8v.html#af2b8ce7c793c79dee8394ad309a1ef71">`EA_REG_MOVEM_REG_2_0</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#aa1a45d113f21dba8f82a93ddfe1d6409">ea_reg</a> &lt;= <span class="vhdlchar">movem_modreg</span>[<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>];
<a name="l01809"></a>01809 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#ae09341fa22dc0b4675dc02dc4a5fb918">ea_reg_control</a> == <a class="code" href="ao68000_8v.html#aa5ef414e1c0f769a38cdd8b3aeef5184">`EA_REG_3b111</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#aa1a45d113f21dba8f82a93ddfe1d6409">ea_reg</a> &lt;= <span class="vhdllogic">3&#39;b111</span>;
<a name="l01810"></a>01810 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#ae09341fa22dc0b4675dc02dc4a5fb918">ea_reg_control</a> == <a class="code" href="ao68000_8v.html#ab4936576a8613273a6487d2b78812c55">`EA_REG_3b100</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#aa1a45d113f21dba8f82a93ddfe1d6409">ea_reg</a> &lt;= <span class="vhdllogic">3&#39;b100</span>;
<a name="l01811"></a>01811 <span class="vhdlkeyword">end</span>
</pre></div>
</div>
</div>
865,22 → 865,22
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01812">1812</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01813">1813</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<div class="fragment"><pre class="fragment">
<a name="l01812"></a>01812 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01813"></a>01813 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ea_mod</a> &lt;= <span class="vhdllogic">3&#39;b000</span>;
<a name="l01814"></a>01814 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#af6205981eadd3ee1e9fa193f04b6a893">ea_mod_control</a> == <a class="code" href="ao68000_8v.html#a0c094175d5b6718611708b08af5e6342">`EA_MOD_IR_5_3</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ea_mod</a> &lt;= <span class="vhdlchar">ir</span>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>];
<a name="l01815"></a>01815 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#af6205981eadd3ee1e9fa193f04b6a893">ea_mod_control</a> == <a class="code" href="ao68000_8v.html#a45b520ba3dd813510ddca0ebe0a652f4">`EA_MOD_MOVEM_MOD_5_3</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ea_mod</a> &lt;= <span class="vhdlchar">movem_modreg</span>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>];
<a name="l01816"></a>01816 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#af6205981eadd3ee1e9fa193f04b6a893">ea_mod_control</a> == <a class="code" href="ao68000_8v.html#a46d304e545e3f136f9bc7fe83ffe61df">`EA_MOD_IR_8_6</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ea_mod</a> &lt;= <span class="vhdlchar">ir</span>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>];
<a name="l01817"></a>01817 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#af6205981eadd3ee1e9fa193f04b6a893">ea_mod_control</a> == <a class="code" href="ao68000_8v.html#a2e15ad20aa0f28ef9042982260a21316">`EA_MOD_PREDEC</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ea_mod</a> &lt;= <span class="vhdllogic">3&#39;b100</span>;
<a name="l01818"></a>01818 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#af6205981eadd3ee1e9fa193f04b6a893">ea_mod_control</a> == <a class="code" href="ao68000_8v.html#ae4ecbd320f11539d132c8e6aa3fdcb5c">`EA_MOD_3b111</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ea_mod</a> &lt;= <span class="vhdllogic">3&#39;b111</span>;
<a name="l01819"></a>01819 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#af6205981eadd3ee1e9fa193f04b6a893">ea_mod_control</a> == <a class="code" href="ao68000_8v.html#aee18d2c3a30bdec23a7de0889deb0d94">`EA_MOD_DN_PREDEC</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ea_mod</a> &lt;= (<span class="vhdlchar">ir</span>[<span class="vhdllogic">3</span>] == <span class="vhdllogic">1&#39;b0</span>) ? <span class="keyword">/* Dn **/</span> <span class="vhdllogic">3&#39;b000</span> : <span class="keyword">/* -(An) **/</span> <span class="vhdllogic">3&#39;b100</span>;
<a name="l01820"></a>01820 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#af6205981eadd3ee1e9fa193f04b6a893">ea_mod_control</a> == <a class="code" href="ao68000_8v.html#ac190b9646213ddb87ec06a5858d479b3">`EA_MOD_DN_AN_EXG</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ea_mod</a> &lt;= (<span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">5&#39;b01000</span> || <span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">5&#39;b10001</span>) ? <span class="keyword">/* Dn **/</span> <span class="vhdllogic">3&#39;b000</span> : <span class="keyword">/* An **/</span> <span class="vhdllogic">3&#39;b001</span>;
<a name="l01821"></a>01821 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#af6205981eadd3ee1e9fa193f04b6a893">ea_mod_control</a> == <a class="code" href="ao68000_8v.html#a51a36024571aca1d7d7c7fa928956589">`EA_MOD_POSTINC</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ea_mod</a> &lt;= <span class="vhdllogic">3&#39;b011</span>;
<a name="l01822"></a>01822 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#af6205981eadd3ee1e9fa193f04b6a893">ea_mod_control</a> == <a class="code" href="ao68000_8v.html#a7a6ccf87a21e66605e4672e95a6578e4">`EA_MOD_AN</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ea_mod</a> &lt;= <span class="vhdllogic">3&#39;b001</span>;
<a name="l01823"></a>01823 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#af6205981eadd3ee1e9fa193f04b6a893">ea_mod_control</a> == <a class="code" href="ao68000_8v.html#a8a000a242ea6cc51ac97ec35753faf7b">`EA_MOD_DN</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ea_mod</a> &lt;= <span class="vhdllogic">3&#39;b000</span>;
<a name="l01824"></a>01824 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#af6205981eadd3ee1e9fa193f04b6a893">ea_mod_control</a> == <a class="code" href="ao68000_8v.html#a88ded717145b6f89a3cd3416577225f0">`EA_MOD_INDIRECTOFFSET</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ea_mod</a> &lt;= <span class="vhdllogic">3&#39;b101</span>;
<a name="l01825"></a>01825 <span class="vhdlkeyword">end</span>
<a name="l01813"></a>01813 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01814"></a>01814 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ea_mod</a> &lt;= <span class="vhdllogic">3&#39;b000</span>;
<a name="l01815"></a>01815 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#af6205981eadd3ee1e9fa193f04b6a893">ea_mod_control</a> == <a class="code" href="ao68000_8v.html#a0c094175d5b6718611708b08af5e6342">`EA_MOD_IR_5_3</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ea_mod</a> &lt;= <span class="vhdlchar">ir</span>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>];
<a name="l01816"></a>01816 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#af6205981eadd3ee1e9fa193f04b6a893">ea_mod_control</a> == <a class="code" href="ao68000_8v.html#a45b520ba3dd813510ddca0ebe0a652f4">`EA_MOD_MOVEM_MOD_5_3</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ea_mod</a> &lt;= <span class="vhdlchar">movem_modreg</span>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>];
<a name="l01817"></a>01817 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#af6205981eadd3ee1e9fa193f04b6a893">ea_mod_control</a> == <a class="code" href="ao68000_8v.html#a46d304e545e3f136f9bc7fe83ffe61df">`EA_MOD_IR_8_6</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ea_mod</a> &lt;= <span class="vhdlchar">ir</span>[<span class="vhdllogic">8</span>:<span class="vhdllogic">6</span>];
<a name="l01818"></a>01818 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#af6205981eadd3ee1e9fa193f04b6a893">ea_mod_control</a> == <a class="code" href="ao68000_8v.html#a2e15ad20aa0f28ef9042982260a21316">`EA_MOD_PREDEC</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ea_mod</a> &lt;= <span class="vhdllogic">3&#39;b100</span>;
<a name="l01819"></a>01819 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#af6205981eadd3ee1e9fa193f04b6a893">ea_mod_control</a> == <a class="code" href="ao68000_8v.html#ae4ecbd320f11539d132c8e6aa3fdcb5c">`EA_MOD_3b111</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ea_mod</a> &lt;= <span class="vhdllogic">3&#39;b111</span>;
<a name="l01820"></a>01820 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#af6205981eadd3ee1e9fa193f04b6a893">ea_mod_control</a> == <a class="code" href="ao68000_8v.html#aee18d2c3a30bdec23a7de0889deb0d94">`EA_MOD_DN_PREDEC</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ea_mod</a> &lt;= (<span class="vhdlchar">ir</span>[<span class="vhdllogic">3</span>] == <span class="vhdllogic">1&#39;b0</span>) ? <span class="keyword">/* Dn **/</span> <span class="vhdllogic">3&#39;b000</span> : <span class="keyword">/* -(An) **/</span> <span class="vhdllogic">3&#39;b100</span>;
<a name="l01821"></a>01821 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#af6205981eadd3ee1e9fa193f04b6a893">ea_mod_control</a> == <a class="code" href="ao68000_8v.html#ac190b9646213ddb87ec06a5858d479b3">`EA_MOD_DN_AN_EXG</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ea_mod</a> &lt;= (<span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">5&#39;b01000</span> || <span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">5&#39;b10001</span>) ? <span class="keyword">/* Dn **/</span> <span class="vhdllogic">3&#39;b000</span> : <span class="keyword">/* An **/</span> <span class="vhdllogic">3&#39;b001</span>;
<a name="l01822"></a>01822 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#af6205981eadd3ee1e9fa193f04b6a893">ea_mod_control</a> == <a class="code" href="ao68000_8v.html#a51a36024571aca1d7d7c7fa928956589">`EA_MOD_POSTINC</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ea_mod</a> &lt;= <span class="vhdllogic">3&#39;b011</span>;
<a name="l01823"></a>01823 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#af6205981eadd3ee1e9fa193f04b6a893">ea_mod_control</a> == <a class="code" href="ao68000_8v.html#a7a6ccf87a21e66605e4672e95a6578e4">`EA_MOD_AN</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ea_mod</a> &lt;= <span class="vhdllogic">3&#39;b001</span>;
<a name="l01824"></a>01824 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#af6205981eadd3ee1e9fa193f04b6a893">ea_mod_control</a> == <a class="code" href="ao68000_8v.html#a8a000a242ea6cc51ac97ec35753faf7b">`EA_MOD_DN</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ea_mod</a> &lt;= <span class="vhdllogic">3&#39;b000</span>;
<a name="l01825"></a>01825 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#af6205981eadd3ee1e9fa193f04b6a893">ea_mod_control</a> == <a class="code" href="ao68000_8v.html#a88ded717145b6f89a3cd3416577225f0">`EA_MOD_INDIRECTOFFSET</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a2d43cbef77f8243106b33e68a592dcef">ea_mod</a> &lt;= <span class="vhdllogic">3&#39;b101</span>;
<a name="l01826"></a>01826 <span class="vhdlkeyword">end</span>
</pre></div>
</div>
</div>
903,19 → 903,19
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01827">1827</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01828">1828</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<div class="fragment"><pre class="fragment">
<a name="l01827"></a>01827 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01828"></a>01828 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <a class="code" href="classregisters.html#a34f0e8ea4d6f79a3c8cf7e3ba129ea58">ea_type</a> &lt;= <a class="code" href="ao68000_8v.html#a30b69aee8fb5af4ab38fc9f0d92a28d3">`EA_TYPE_IDLE</a><span class="vhdlchar"></span>;
<a name="l01829"></a>01829 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#aa22fa504627eea9bff308c3358ef9240">ea_type_control</a> == <a class="code" href="ao68000_8v.html#a6f693ee79161bffa99f05d9f5b89a2d0">`EA_TYPE_ALL</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a34f0e8ea4d6f79a3c8cf7e3ba129ea58">ea_type</a> &lt;= <a class="code" href="ao68000_8v.html#a6f693ee79161bffa99f05d9f5b89a2d0">`EA_TYPE_ALL</a><span class="vhdlchar"></span>;
<a name="l01830"></a>01830 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#aa22fa504627eea9bff308c3358ef9240">ea_type_control</a> == <a class="code" href="ao68000_8v.html#a925f0004ba49b82dbdf7c4ae969ba6ed">`EA_TYPE_CONTROL_POSTINC</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a34f0e8ea4d6f79a3c8cf7e3ba129ea58">ea_type</a> &lt;= <a class="code" href="ao68000_8v.html#a925f0004ba49b82dbdf7c4ae969ba6ed">`EA_TYPE_CONTROL_POSTINC</a><span class="vhdlchar"></span>;
<a name="l01831"></a>01831 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#aa22fa504627eea9bff308c3358ef9240">ea_type_control</a> == <a class="code" href="ao68000_8v.html#a41499eaa1b7aa62f455a07e5435d754a">`EA_TYPE_CONTROLALTER_PREDEC</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a34f0e8ea4d6f79a3c8cf7e3ba129ea58">ea_type</a> &lt;= <a class="code" href="ao68000_8v.html#a41499eaa1b7aa62f455a07e5435d754a">`EA_TYPE_CONTROLALTER_PREDEC</a><span class="vhdlchar"></span>;
<a name="l01832"></a>01832 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#aa22fa504627eea9bff308c3358ef9240">ea_type_control</a> == <a class="code" href="ao68000_8v.html#ae2c794f81236993a23138cbf3f7eda44">`EA_TYPE_CONTROL</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a34f0e8ea4d6f79a3c8cf7e3ba129ea58">ea_type</a> &lt;= <a class="code" href="ao68000_8v.html#ae2c794f81236993a23138cbf3f7eda44">`EA_TYPE_CONTROL</a><span class="vhdlchar"></span>;
<a name="l01833"></a>01833 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#aa22fa504627eea9bff308c3358ef9240">ea_type_control</a> == <a class="code" href="ao68000_8v.html#a17a8a468ddfc3bdb178081a368f4dd6c">`EA_TYPE_DATAALTER</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a34f0e8ea4d6f79a3c8cf7e3ba129ea58">ea_type</a> &lt;= <a class="code" href="ao68000_8v.html#a17a8a468ddfc3bdb178081a368f4dd6c">`EA_TYPE_DATAALTER</a><span class="vhdlchar"></span>;
<a name="l01834"></a>01834 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#aa22fa504627eea9bff308c3358ef9240">ea_type_control</a> == <a class="code" href="ao68000_8v.html#a8e7bc745d4def25f5a995a6955dbdb4b">`EA_TYPE_DN_AN</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a34f0e8ea4d6f79a3c8cf7e3ba129ea58">ea_type</a> &lt;= <a class="code" href="ao68000_8v.html#a8e7bc745d4def25f5a995a6955dbdb4b">`EA_TYPE_DN_AN</a><span class="vhdlchar"></span>;
<a name="l01835"></a>01835 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#aa22fa504627eea9bff308c3358ef9240">ea_type_control</a> == <a class="code" href="ao68000_8v.html#a653530f090b85ba7bcd93912b8834412">`EA_TYPE_MEMORYALTER</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a34f0e8ea4d6f79a3c8cf7e3ba129ea58">ea_type</a> &lt;= <a class="code" href="ao68000_8v.html#a653530f090b85ba7bcd93912b8834412">`EA_TYPE_MEMORYALTER</a><span class="vhdlchar"></span>;
<a name="l01836"></a>01836 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#aa22fa504627eea9bff308c3358ef9240">ea_type_control</a> == <a class="code" href="ao68000_8v.html#a1b85de8c778c471fdc569b4ef5f3bc60">`EA_TYPE_DATA</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a34f0e8ea4d6f79a3c8cf7e3ba129ea58">ea_type</a> &lt;= <a class="code" href="ao68000_8v.html#a1b85de8c778c471fdc569b4ef5f3bc60">`EA_TYPE_DATA</a><span class="vhdlchar"></span>;
<a name="l01837"></a>01837 <span class="vhdlkeyword">end</span>
<a name="l01828"></a>01828 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01829"></a>01829 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <a class="code" href="classregisters.html#a34f0e8ea4d6f79a3c8cf7e3ba129ea58">ea_type</a> &lt;= <a class="code" href="ao68000_8v.html#a30b69aee8fb5af4ab38fc9f0d92a28d3">`EA_TYPE_IDLE</a><span class="vhdlchar"></span>;
<a name="l01830"></a>01830 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#aa22fa504627eea9bff308c3358ef9240">ea_type_control</a> == <a class="code" href="ao68000_8v.html#a6f693ee79161bffa99f05d9f5b89a2d0">`EA_TYPE_ALL</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a34f0e8ea4d6f79a3c8cf7e3ba129ea58">ea_type</a> &lt;= <a class="code" href="ao68000_8v.html#a6f693ee79161bffa99f05d9f5b89a2d0">`EA_TYPE_ALL</a><span class="vhdlchar"></span>;
<a name="l01831"></a>01831 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#aa22fa504627eea9bff308c3358ef9240">ea_type_control</a> == <a class="code" href="ao68000_8v.html#a925f0004ba49b82dbdf7c4ae969ba6ed">`EA_TYPE_CONTROL_POSTINC</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a34f0e8ea4d6f79a3c8cf7e3ba129ea58">ea_type</a> &lt;= <a class="code" href="ao68000_8v.html#a925f0004ba49b82dbdf7c4ae969ba6ed">`EA_TYPE_CONTROL_POSTINC</a><span class="vhdlchar"></span>;
<a name="l01832"></a>01832 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#aa22fa504627eea9bff308c3358ef9240">ea_type_control</a> == <a class="code" href="ao68000_8v.html#a41499eaa1b7aa62f455a07e5435d754a">`EA_TYPE_CONTROLALTER_PREDEC</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a34f0e8ea4d6f79a3c8cf7e3ba129ea58">ea_type</a> &lt;= <a class="code" href="ao68000_8v.html#a41499eaa1b7aa62f455a07e5435d754a">`EA_TYPE_CONTROLALTER_PREDEC</a><span class="vhdlchar"></span>;
<a name="l01833"></a>01833 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#aa22fa504627eea9bff308c3358ef9240">ea_type_control</a> == <a class="code" href="ao68000_8v.html#ae2c794f81236993a23138cbf3f7eda44">`EA_TYPE_CONTROL</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a34f0e8ea4d6f79a3c8cf7e3ba129ea58">ea_type</a> &lt;= <a class="code" href="ao68000_8v.html#ae2c794f81236993a23138cbf3f7eda44">`EA_TYPE_CONTROL</a><span class="vhdlchar"></span>;
<a name="l01834"></a>01834 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#aa22fa504627eea9bff308c3358ef9240">ea_type_control</a> == <a class="code" href="ao68000_8v.html#a17a8a468ddfc3bdb178081a368f4dd6c">`EA_TYPE_DATAALTER</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a34f0e8ea4d6f79a3c8cf7e3ba129ea58">ea_type</a> &lt;= <a class="code" href="ao68000_8v.html#a17a8a468ddfc3bdb178081a368f4dd6c">`EA_TYPE_DATAALTER</a><span class="vhdlchar"></span>;
<a name="l01835"></a>01835 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#aa22fa504627eea9bff308c3358ef9240">ea_type_control</a> == <a class="code" href="ao68000_8v.html#a8e7bc745d4def25f5a995a6955dbdb4b">`EA_TYPE_DN_AN</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a34f0e8ea4d6f79a3c8cf7e3ba129ea58">ea_type</a> &lt;= <a class="code" href="ao68000_8v.html#a8e7bc745d4def25f5a995a6955dbdb4b">`EA_TYPE_DN_AN</a><span class="vhdlchar"></span>;
<a name="l01836"></a>01836 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#aa22fa504627eea9bff308c3358ef9240">ea_type_control</a> == <a class="code" href="ao68000_8v.html#a653530f090b85ba7bcd93912b8834412">`EA_TYPE_MEMORYALTER</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a34f0e8ea4d6f79a3c8cf7e3ba129ea58">ea_type</a> &lt;= <a class="code" href="ao68000_8v.html#a653530f090b85ba7bcd93912b8834412">`EA_TYPE_MEMORYALTER</a><span class="vhdlchar"></span>;
<a name="l01837"></a>01837 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#aa22fa504627eea9bff308c3358ef9240">ea_type_control</a> == <a class="code" href="ao68000_8v.html#a1b85de8c778c471fdc569b4ef5f3bc60">`EA_TYPE_DATA</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a34f0e8ea4d6f79a3c8cf7e3ba129ea58">ea_type</a> &lt;= <a class="code" href="ao68000_8v.html#a1b85de8c778c471fdc569b4ef5f3bc60">`EA_TYPE_DATA</a><span class="vhdlchar"></span>;
<a name="l01838"></a>01838 <span class="vhdlkeyword">end</span>
</pre></div>
</div>
</div>
938,37 → 938,37
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01839">1839</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01840">1840</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<div class="fragment"><pre class="fragment">
<a name="l01839"></a>01839 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01840"></a>01840 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;= <span class="vhdllogic">32&#39;hFFFFFFFF</span>;
<a name="l01841"></a>01841 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#a29e287eda5813f253f9f1cd527021533">`OP1_FROM_OP2</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;= <span class="vhdlchar">operand2</span>;
<a name="l01842"></a>01842 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#ab601cf0d52e5fe6ae155ab8084b236e1">`OP1_FROM_ADDRESS</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;= <span class="vhdlchar">address</span>;
<a name="l01843"></a>01843 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#aec7f41507eab6c659f5d544c942b441e">`OP1_FROM_DATA</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;=
<a name="l01844"></a>01844 (<span class="vhdlchar">size</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) ? { {<span class="vhdllogic">24</span>{<a class="code" href="classregisters.html#a0cdf5b5316a0edcd85909fc9da5ca864">data_read</a>[<span class="vhdllogic">7</span>]}}, <a class="code" href="classregisters.html#a0cdf5b5316a0edcd85909fc9da5ca864">data_read</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] } :
<a name="l01845"></a>01845 (<span class="vhdlchar">size</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span>) ? { {<span class="vhdllogic">16</span>{<a class="code" href="classregisters.html#a0cdf5b5316a0edcd85909fc9da5ca864">data_read</a>[<span class="vhdllogic">15</span>]}}, <a class="code" href="classregisters.html#a0cdf5b5316a0edcd85909fc9da5ca864">data_read</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] } :
<a name="l01846"></a>01846 <a class="code" href="classregisters.html#a0cdf5b5316a0edcd85909fc9da5ca864">data_read</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l01847"></a>01847 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#abc0874c9141535c9c6a071653810c8fc">`OP1_FROM_IMMEDIATE</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;=
<a name="l01848"></a>01848 (<span class="vhdlchar">size</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) ? { {<span class="vhdllogic">24</span>{<a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">71</span>]}}, <a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">71</span>:<span class="vhdllogic">64</span>] } :
<a name="l01849"></a>01849 (<span class="vhdlchar">size</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span>) ? { {<span class="vhdllogic">16</span>{<a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">79</span>]}}, <a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">79</span>:<span class="vhdllogic">64</span>] } :
<a name="l01850"></a>01850 <a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">79</span>:<span class="vhdllogic">48</span>];
<a name="l01851"></a>01851 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#a2adbf20e4776f4f5449563560fcfea3e">`OP1_FROM_RESULT</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;= <a class="code" href="classregisters.html#ad27ecd2d9ef571fa88b998f3674fe9a6">result</a>;
<a name="l01852"></a>01852 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#ac2bd7be96e464a7a06affeb71024f266">`OP1_MOVEQ</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;= { {<span class="vhdllogic">24</span>{<span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>]}}, <span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] };
<a name="l01853"></a>01853 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#aade66d4090f1aea9ed568a4e17ff1eae">`OP1_FROM_PC</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;= <a class="code" href="classregisters.html#af160a45a0b3cd7794efb7fea1ed60526">pc_valid</a>;
<a name="l01854"></a>01854 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#a4db6f8d952dd7d7cfffeb0de4ad4a08b">`OP1_LOAD_ZEROS</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;= <span class="vhdllogic">32&#39;b0</span>;
<a name="l01855"></a>01855 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#ae8489ec12e458975d614347191ba2004">`OP1_LOAD_ONES</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;= <span class="vhdllogic">32&#39;hFFFFFFFF</span>;
<a name="l01856"></a>01856 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#a9e1d49d77f5b144fff6cc8c0c021e5d2">`OP1_FROM_SR</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;= { <span class="vhdllogic">16&#39;b0</span>, <a class="code" href="classregisters.html#a116473c99b3cbf75fd0f48a25ea9227e">sr</a>[<span class="vhdllogic">15</span>], <span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classregisters.html#a116473c99b3cbf75fd0f48a25ea9227e">sr</a>[<span class="vhdllogic">13</span>], <span class="vhdllogic">2&#39;b0</span>, <a class="code" href="classregisters.html#a116473c99b3cbf75fd0f48a25ea9227e">sr</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">8</span>], <span class="vhdllogic">3&#39;b0</span>, <a class="code" href="classregisters.html#a116473c99b3cbf75fd0f48a25ea9227e">sr</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">0</span>] };
<a name="l01857"></a>01857 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#a1a44c33265ec779ad10e437621cda43b">`OP1_FROM_USP</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;= <a class="code" href="classregisters.html#a6810e76be48010f9b34a91c27ddd636b">usp</a>;
<a name="l01858"></a>01858 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#a4900ac90de9fd53eaeb1acddf51a9008">`OP1_FROM_AN</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;=
<a name="l01859"></a>01859 (<span class="vhdlchar">size</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span>) ? { {<span class="vhdllogic">16</span>{<a class="code" href="classregisters.html#a7fdc26691a005524667257529b1c1212">An_output</a>[<span class="vhdllogic">15</span>]}}, <a class="code" href="classregisters.html#a7fdc26691a005524667257529b1c1212">An_output</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] } :
<a name="l01860"></a>01860 <a class="code" href="classregisters.html#a7fdc26691a005524667257529b1c1212">An_output</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l01861"></a>01861 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#a3aa722db3503e9370be36b3d409f3e17">`OP1_FROM_DN</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;=
<a name="l01862"></a>01862 (<span class="vhdlchar">size</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) ? { {<span class="vhdllogic">24</span>{<a class="code" href="classregisters.html#a659bea909e94f7512c4311bcff473a5d">Dn_output</a>[<span class="vhdllogic">7</span>]}}, <a class="code" href="classregisters.html#a659bea909e94f7512c4311bcff473a5d">Dn_output</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] } :
<a name="l01863"></a>01863 (<span class="vhdlchar">size</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span>) ? { {<span class="vhdllogic">16</span>{<a class="code" href="classregisters.html#a659bea909e94f7512c4311bcff473a5d">Dn_output</a>[<span class="vhdllogic">15</span>]}}, <a class="code" href="classregisters.html#a659bea909e94f7512c4311bcff473a5d">Dn_output</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] } :
<a name="l01864"></a>01864 <a class="code" href="classregisters.html#a659bea909e94f7512c4311bcff473a5d">Dn_output</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l01865"></a>01865 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#a083db35259f035ab10f606d2c7dd82c6">`OP1_FROM_IR</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;= { <span class="vhdllogic">16&#39;b0</span>, <span class="vhdlchar">ir</span>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] };
<a name="l01866"></a>01866 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#a707f0ca7fa1a08446ba113ede9d5d8a4">`OP1_FROM_FAULT_ADDRESS</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;= <a class="code" href="classregisters.html#acfc96bc559a0660239cb6b8a8836b862">fault_address_state</a>;
<a name="l01867"></a>01867 <span class="vhdlkeyword">end</span>
<a name="l01840"></a>01840 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01841"></a>01841 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;= <span class="vhdllogic">32&#39;hFFFFFFFF</span>;
<a name="l01842"></a>01842 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#a29e287eda5813f253f9f1cd527021533">`OP1_FROM_OP2</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;= <span class="vhdlchar">operand2</span>;
<a name="l01843"></a>01843 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#ab601cf0d52e5fe6ae155ab8084b236e1">`OP1_FROM_ADDRESS</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;= <span class="vhdlchar">address</span>;
<a name="l01844"></a>01844 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#aec7f41507eab6c659f5d544c942b441e">`OP1_FROM_DATA</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;=
<a name="l01845"></a>01845 (<span class="vhdlchar">size</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) ? { {<span class="vhdllogic">24</span>{<a class="code" href="classregisters.html#a0cdf5b5316a0edcd85909fc9da5ca864">data_read</a>[<span class="vhdllogic">7</span>]}}, <a class="code" href="classregisters.html#a0cdf5b5316a0edcd85909fc9da5ca864">data_read</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] } :
<a name="l01846"></a>01846 (<span class="vhdlchar">size</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span>) ? { {<span class="vhdllogic">16</span>{<a class="code" href="classregisters.html#a0cdf5b5316a0edcd85909fc9da5ca864">data_read</a>[<span class="vhdllogic">15</span>]}}, <a class="code" href="classregisters.html#a0cdf5b5316a0edcd85909fc9da5ca864">data_read</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] } :
<a name="l01847"></a>01847 <a class="code" href="classregisters.html#a0cdf5b5316a0edcd85909fc9da5ca864">data_read</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l01848"></a>01848 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#abc0874c9141535c9c6a071653810c8fc">`OP1_FROM_IMMEDIATE</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;=
<a name="l01849"></a>01849 (<span class="vhdlchar">size</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) ? { {<span class="vhdllogic">24</span>{<a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">71</span>]}}, <a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">71</span>:<span class="vhdllogic">64</span>] } :
<a name="l01850"></a>01850 (<span class="vhdlchar">size</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span>) ? { {<span class="vhdllogic">16</span>{<a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">79</span>]}}, <a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">79</span>:<span class="vhdllogic">64</span>] } :
<a name="l01851"></a>01851 <a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">79</span>:<span class="vhdllogic">48</span>];
<a name="l01852"></a>01852 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#a2adbf20e4776f4f5449563560fcfea3e">`OP1_FROM_RESULT</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;= <a class="code" href="classregisters.html#ad27ecd2d9ef571fa88b998f3674fe9a6">result</a>;
<a name="l01853"></a>01853 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#ac2bd7be96e464a7a06affeb71024f266">`OP1_MOVEQ</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;= { {<span class="vhdllogic">24</span>{<span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>]}}, <span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] };
<a name="l01854"></a>01854 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#aade66d4090f1aea9ed568a4e17ff1eae">`OP1_FROM_PC</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;= <a class="code" href="classregisters.html#af160a45a0b3cd7794efb7fea1ed60526">pc_valid</a>;
<a name="l01855"></a>01855 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#a4db6f8d952dd7d7cfffeb0de4ad4a08b">`OP1_LOAD_ZEROS</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;= <span class="vhdllogic">32&#39;b0</span>;
<a name="l01856"></a>01856 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#ae8489ec12e458975d614347191ba2004">`OP1_LOAD_ONES</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;= <span class="vhdllogic">32&#39;hFFFFFFFF</span>;
<a name="l01857"></a>01857 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#a9e1d49d77f5b144fff6cc8c0c021e5d2">`OP1_FROM_SR</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;= { <span class="vhdllogic">16&#39;b0</span>, <a class="code" href="classregisters.html#a116473c99b3cbf75fd0f48a25ea9227e">sr</a>[<span class="vhdllogic">15</span>], <span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classregisters.html#a116473c99b3cbf75fd0f48a25ea9227e">sr</a>[<span class="vhdllogic">13</span>], <span class="vhdllogic">2&#39;b0</span>, <a class="code" href="classregisters.html#a116473c99b3cbf75fd0f48a25ea9227e">sr</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">8</span>], <span class="vhdllogic">3&#39;b0</span>, <a class="code" href="classregisters.html#a116473c99b3cbf75fd0f48a25ea9227e">sr</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">0</span>] };
<a name="l01858"></a>01858 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#a1a44c33265ec779ad10e437621cda43b">`OP1_FROM_USP</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;= <a class="code" href="classregisters.html#a6810e76be48010f9b34a91c27ddd636b">usp</a>;
<a name="l01859"></a>01859 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#a4900ac90de9fd53eaeb1acddf51a9008">`OP1_FROM_AN</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;=
<a name="l01860"></a>01860 (<span class="vhdlchar">size</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span>) ? { {<span class="vhdllogic">16</span>{<a class="code" href="classregisters.html#a7fdc26691a005524667257529b1c1212">An_output</a>[<span class="vhdllogic">15</span>]}}, <a class="code" href="classregisters.html#a7fdc26691a005524667257529b1c1212">An_output</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] } :
<a name="l01861"></a>01861 <a class="code" href="classregisters.html#a7fdc26691a005524667257529b1c1212">An_output</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l01862"></a>01862 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#a3aa722db3503e9370be36b3d409f3e17">`OP1_FROM_DN</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;=
<a name="l01863"></a>01863 (<span class="vhdlchar">size</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) ? { {<span class="vhdllogic">24</span>{<a class="code" href="classregisters.html#a659bea909e94f7512c4311bcff473a5d">Dn_output</a>[<span class="vhdllogic">7</span>]}}, <a class="code" href="classregisters.html#a659bea909e94f7512c4311bcff473a5d">Dn_output</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] } :
<a name="l01864"></a>01864 (<span class="vhdlchar">size</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span>) ? { {<span class="vhdllogic">16</span>{<a class="code" href="classregisters.html#a659bea909e94f7512c4311bcff473a5d">Dn_output</a>[<span class="vhdllogic">15</span>]}}, <a class="code" href="classregisters.html#a659bea909e94f7512c4311bcff473a5d">Dn_output</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] } :
<a name="l01865"></a>01865 <a class="code" href="classregisters.html#a659bea909e94f7512c4311bcff473a5d">Dn_output</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l01866"></a>01866 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#a083db35259f035ab10f606d2c7dd82c6">`OP1_FROM_IR</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;= { <span class="vhdllogic">16&#39;b0</span>, <span class="vhdlchar">ir</span>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] };
<a name="l01867"></a>01867 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand1_control</span> == <a class="code" href="ao68000_8v.html#a707f0ca7fa1a08446ba113ede9d5d8a4">`OP1_FROM_FAULT_ADDRESS</a><span class="vhdlchar"></span>) <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a> &lt;= <a class="code" href="classregisters.html#acfc96bc559a0660239cb6b8a8836b862">fault_address_state</a>;
<a name="l01868"></a>01868 <span class="vhdlkeyword">end</span>
</pre></div>
</div>
</div>
991,20 → 991,20
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01869">1869</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01870">1870</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<div class="fragment"><pre class="fragment">
<a name="l01869"></a>01869 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01870"></a>01870 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">operand2</span> &lt;= <span class="vhdllogic">32&#39;hFFFFFFFF</span>;
<a name="l01871"></a>01871 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand2_control</span> == <a class="code" href="ao68000_8v.html#a092ca695ecfa2de9e4d4a27bbd89d40f">`OP2_FROM_OP1</a><span class="vhdlchar"></span>) <span class="vhdlchar">operand2</span> &lt;= <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a>;
<a name="l01872"></a>01872 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand2_control</span> == <a class="code" href="ao68000_8v.html#a5c2c8ed577b6ab91a5ae3861643575e7">`OP2_LOAD_1</a><span class="vhdlchar"></span>) <span class="vhdlchar">operand2</span> &lt;= <span class="vhdllogic">32&#39;d1</span>;
<a name="l01873"></a>01873 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand2_control</span> == <a class="code" href="ao68000_8v.html#a7c904b70c2347aaee330105f74a69fc1">`OP2_LOAD_COUNT</a><span class="vhdlchar"></span>) <span class="vhdlchar">operand2</span> &lt;=
<a name="l01874"></a>01874 (<span class="vhdlchar">ir</span>[<span class="vhdllogic">5</span>] == <span class="vhdllogic">1&#39;b0</span>) ? ( (<span class="vhdlchar">ir</span>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3&#39;b000</span>) ? <span class="vhdllogic">32&#39;b1000</span> : { <span class="vhdllogic">29&#39;b0</span>, <span class="vhdlchar">ir</span>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] } ) :
<a name="l01875"></a>01875 { <span class="vhdllogic">26&#39;b0</span>, <span class="vhdlchar">operand2</span>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] };
<a name="l01876"></a>01876 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand2_control</span> == <a class="code" href="ao68000_8v.html#aacec01f4da467eb6785c611710c1219d">`OP2_ADDQ_SUBQ</a><span class="vhdlchar"></span>) <span class="vhdlchar">operand2</span> &lt;= (<span class="vhdlchar">ir</span>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3&#39;b000</span>) ? <span class="vhdllogic">32&#39;b1000</span> : { <span class="vhdllogic">29&#39;b0</span>, <span class="vhdlchar">ir</span>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] };
<a name="l01877"></a>01877 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand2_control</span> == <a class="code" href="ao68000_8v.html#ad8cdca7f0cbac16e09b4e1a1e3ab4f11">`OP2_MOVE_OFFSET</a><span class="vhdlchar"></span>) <span class="vhdlchar">operand2</span> &lt;= (<span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">8&#39;b0</span>) ? <span class="vhdlchar">operand2</span>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] : { {<span class="vhdllogic">24</span>{<span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>]}}, <span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] };
<a name="l01878"></a>01878 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand2_control</span> == <a class="code" href="ao68000_8v.html#a041be53a35bc1a415713d34c839c81c5">`OP2_MOVE_ADDRESS_BUS_INFO</a><span class="vhdlchar"></span>) <span class="vhdlchar">operand2</span> &lt;= { <span class="vhdllogic">16&#39;b0</span>, <span class="vhdllogic">11&#39;b0</span>, <a class="code" href="classregisters.html#ae12d419de758617259ab74281fd09f03">rw_state</a>, <span class="vhdlchar">instruction_flag</span>, <a class="code" href="classregisters.html#a1864a58a4089bd5d72ba19730137c5ce">fc_state</a>};
<a name="l01879"></a>01879 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand2_control</span> == <a class="code" href="ao68000_8v.html#a81d303d3fcf43bd2ed3b99072571f816">`OP2_DECR_BY_1</a><span class="vhdlchar"></span>) <span class="vhdlchar">operand2</span> &lt;= <span class="vhdlchar">operand2</span> - <span class="vhdllogic">32&#39;b1</span>;
<a name="l01880"></a>01880 <span class="vhdlkeyword">end</span>
<a name="l01870"></a>01870 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01871"></a>01871 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">operand2</span> &lt;= <span class="vhdllogic">32&#39;hFFFFFFFF</span>;
<a name="l01872"></a>01872 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand2_control</span> == <a class="code" href="ao68000_8v.html#a092ca695ecfa2de9e4d4a27bbd89d40f">`OP2_FROM_OP1</a><span class="vhdlchar"></span>) <span class="vhdlchar">operand2</span> &lt;= <a class="code" href="classregisters.html#a3b18ddbc3e465c4baf391903b10bb446">operand1</a>;
<a name="l01873"></a>01873 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand2_control</span> == <a class="code" href="ao68000_8v.html#a5c2c8ed577b6ab91a5ae3861643575e7">`OP2_LOAD_1</a><span class="vhdlchar"></span>) <span class="vhdlchar">operand2</span> &lt;= <span class="vhdllogic">32&#39;d1</span>;
<a name="l01874"></a>01874 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand2_control</span> == <a class="code" href="ao68000_8v.html#a7c904b70c2347aaee330105f74a69fc1">`OP2_LOAD_COUNT</a><span class="vhdlchar"></span>) <span class="vhdlchar">operand2</span> &lt;=
<a name="l01875"></a>01875 (<span class="vhdlchar">ir</span>[<span class="vhdllogic">5</span>] == <span class="vhdllogic">1&#39;b0</span>) ? ( (<span class="vhdlchar">ir</span>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3&#39;b000</span>) ? <span class="vhdllogic">32&#39;b1000</span> : { <span class="vhdllogic">29&#39;b0</span>, <span class="vhdlchar">ir</span>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] } ) :
<a name="l01876"></a>01876 { <span class="vhdllogic">26&#39;b0</span>, <span class="vhdlchar">operand2</span>[<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] };
<a name="l01877"></a>01877 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand2_control</span> == <a class="code" href="ao68000_8v.html#aacec01f4da467eb6785c611710c1219d">`OP2_ADDQ_SUBQ</a><span class="vhdlchar"></span>) <span class="vhdlchar">operand2</span> &lt;= (<span class="vhdlchar">ir</span>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] == <span class="vhdllogic">3&#39;b000</span>) ? <span class="vhdllogic">32&#39;b1000</span> : { <span class="vhdllogic">29&#39;b0</span>, <span class="vhdlchar">ir</span>[<span class="vhdllogic">11</span>:<span class="vhdllogic">9</span>] };
<a name="l01878"></a>01878 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand2_control</span> == <a class="code" href="ao68000_8v.html#ad8cdca7f0cbac16e09b4e1a1e3ab4f11">`OP2_MOVE_OFFSET</a><span class="vhdlchar"></span>) <span class="vhdlchar">operand2</span> &lt;= (<span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">8&#39;b0</span>) ? <span class="vhdlchar">operand2</span>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] : { {<span class="vhdllogic">24</span>{<span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>]}}, <span class="vhdlchar">ir</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] };
<a name="l01879"></a>01879 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand2_control</span> == <a class="code" href="ao68000_8v.html#a041be53a35bc1a415713d34c839c81c5">`OP2_MOVE_ADDRESS_BUS_INFO</a><span class="vhdlchar"></span>) <span class="vhdlchar">operand2</span> &lt;= { <span class="vhdllogic">16&#39;b0</span>, <span class="vhdllogic">11&#39;b0</span>, <a class="code" href="classregisters.html#ae12d419de758617259ab74281fd09f03">rw_state</a>, <span class="vhdlchar">instruction_flag</span>, <a class="code" href="classregisters.html#a1864a58a4089bd5d72ba19730137c5ce">fc_state</a>};
<a name="l01880"></a>01880 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">operand2_control</span> == <a class="code" href="ao68000_8v.html#a81d303d3fcf43bd2ed3b99072571f816">`OP2_DECR_BY_1</a><span class="vhdlchar"></span>) <span class="vhdlchar">operand2</span> &lt;= <span class="vhdlchar">operand2</span> - <span class="vhdllogic">32&#39;b1</span>;
<a name="l01881"></a>01881 <span class="vhdlkeyword">end</span>
</pre></div>
</div>
</div>
1027,20 → 1027,20
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01882">1882</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01883">1883</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<div class="fragment"><pre class="fragment">
<a name="l01882"></a>01882 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01883"></a>01883 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">address</span> &lt;= <span class="vhdllogic">32&#39;b0</span>;
<a name="l01884"></a>01884 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_control</span> == <a class="code" href="ao68000_8v.html#a864e0b06304816dec2d4658503d97495">`ADDRESS_INCR_BY_SIZE</a><span class="vhdlchar"></span>) <span class="vhdlchar">address</span> &lt;= ((<span class="vhdlchar">size</span>[<span class="vhdllogic">0</span>]) &amp;&amp; <a class="code" href="classregisters.html#aa1a45d113f21dba8f82a93ddfe1d6409">ea_reg</a> == <span class="vhdllogic">3&#39;b111</span>) ? <span class="vhdlchar">address</span> + <span class="vhdllogic">32&#39;d2</span> : <span class="vhdlchar">address</span> + {<span class="vhdllogic">29&#39;d0</span>,<span class="vhdlchar">size</span>};
<a name="l01885"></a>01885 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_control</span> == <a class="code" href="ao68000_8v.html#aa479827c57933eb9ff03788bbe9d6e3a">`ADDRESS_DECR_BY_SIZE</a><span class="vhdlchar"></span>) <span class="vhdlchar">address</span> &lt;= ((<span class="vhdlchar">size</span>[<span class="vhdllogic">0</span>]) &amp;&amp; <a class="code" href="classregisters.html#aa1a45d113f21dba8f82a93ddfe1d6409">ea_reg</a> == <span class="vhdllogic">3&#39;b111</span>) ? <span class="vhdlchar">address</span> - <span class="vhdllogic">32&#39;d2</span> : <span class="vhdlchar">address</span> - {<span class="vhdllogic">29&#39;d0</span>,<span class="vhdlchar">size</span>};
<a name="l01886"></a>01886 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_control</span> == <a class="code" href="ao68000_8v.html#ac4044068e496c3393c6336b72873a958">`ADDRESS_INCR_BY_2</a><span class="vhdlchar"></span>) <span class="vhdlchar">address</span> &lt;= <span class="vhdlchar">address</span> + <span class="vhdllogic">32&#39;d2</span>;
<a name="l01887"></a>01887 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_control</span> == <a class="code" href="ao68000_8v.html#afc15ad5da6b4afd71eb879476c603fe3">`ADDRESS_FROM_AN_OUTPUT</a><span class="vhdlchar"></span>) <span class="vhdlchar">address</span> &lt;= <a class="code" href="classregisters.html#a7fdc26691a005524667257529b1c1212">An_output</a>;
<a name="l01888"></a>01888 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_control</span> == <a class="code" href="ao68000_8v.html#ac1143ff5a059fc5609c9419fcd402ae1">`ADDRESS_FROM_BASE_INDEX_OFFSET</a><span class="vhdlchar"></span>) <span class="vhdlchar">address</span> &lt;= <span class="vhdlchar">address</span> + <span class="vhdlchar">index</span> + <span class="vhdlchar">offset</span>;
<a name="l01889"></a>01889 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_control</span> == <a class="code" href="ao68000_8v.html#aa6ba908e680fe87e46ac1cf014eed463">`ADDRESS_FROM_IMM_16</a><span class="vhdlchar"></span>) <span class="vhdlchar">address</span> &lt;= { {<span class="vhdllogic">16</span>{<a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">79</span>]}}, <a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">79</span>:<span class="vhdllogic">64</span>] };
<a name="l01890"></a>01890 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_control</span> == <a class="code" href="ao68000_8v.html#aa688332c940cad3a10561a5c9f74698a">`ADDRESS_FROM_IMM_32</a><span class="vhdlchar"></span>) <span class="vhdlchar">address</span> &lt;= <a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">79</span>:<span class="vhdllogic">48</span>];
<a name="l01891"></a>01891 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_control</span> == <a class="code" href="ao68000_8v.html#aa7a6ef5c21bbbf8a3c5a0437bdda3c85">`ADDRESS_FROM_PC_INDEX_OFFSET</a><span class="vhdlchar"></span>) <span class="vhdlchar">address</span> &lt;= <a class="code" href="classregisters.html#af160a45a0b3cd7794efb7fea1ed60526">pc_valid</a> + <span class="vhdlchar">index</span> + <span class="vhdlchar">offset</span>;
<a name="l01892"></a>01892 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_control</span> == <a class="code" href="ao68000_8v.html#a2a30a0ecfa48e96cc5be837e7db71cab">`ADDRESS_FROM_TRAP</a><span class="vhdlchar"></span>) <span class="vhdlchar">address</span> &lt;= {<span class="vhdllogic">22&#39;b0</span>, <span class="vhdlchar">trap</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">2&#39;b0</span>};
<a name="l01893"></a>01893 <span class="vhdlkeyword">end</span>
<a name="l01883"></a>01883 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classregisters.html#aa395a813867161909f2bd9ed1dd481b6">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l01884"></a>01884 <span class="vhdlkeyword">if</span>(<a class="code" href="classregisters.html#a015ee03d06fbd101adca95c762a5f99a">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlchar">address</span> &lt;= <span class="vhdllogic">32&#39;b0</span>;
<a name="l01885"></a>01885 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_control</span> == <a class="code" href="ao68000_8v.html#a864e0b06304816dec2d4658503d97495">`ADDRESS_INCR_BY_SIZE</a><span class="vhdlchar"></span>) <span class="vhdlchar">address</span> &lt;= ((<span class="vhdlchar">size</span>[<span class="vhdllogic">0</span>]) &amp;&amp; <a class="code" href="classregisters.html#aa1a45d113f21dba8f82a93ddfe1d6409">ea_reg</a> == <span class="vhdllogic">3&#39;b111</span>) ? <span class="vhdlchar">address</span> + <span class="vhdllogic">32&#39;d2</span> : <span class="vhdlchar">address</span> + {<span class="vhdllogic">29&#39;d0</span>,<span class="vhdlchar">size</span>};
<a name="l01886"></a>01886 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_control</span> == <a class="code" href="ao68000_8v.html#aa479827c57933eb9ff03788bbe9d6e3a">`ADDRESS_DECR_BY_SIZE</a><span class="vhdlchar"></span>) <span class="vhdlchar">address</span> &lt;= ((<span class="vhdlchar">size</span>[<span class="vhdllogic">0</span>]) &amp;&amp; <a class="code" href="classregisters.html#aa1a45d113f21dba8f82a93ddfe1d6409">ea_reg</a> == <span class="vhdllogic">3&#39;b111</span>) ? <span class="vhdlchar">address</span> - <span class="vhdllogic">32&#39;d2</span> : <span class="vhdlchar">address</span> - {<span class="vhdllogic">29&#39;d0</span>,<span class="vhdlchar">size</span>};
<a name="l01887"></a>01887 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_control</span> == <a class="code" href="ao68000_8v.html#ac4044068e496c3393c6336b72873a958">`ADDRESS_INCR_BY_2</a><span class="vhdlchar"></span>) <span class="vhdlchar">address</span> &lt;= <span class="vhdlchar">address</span> + <span class="vhdllogic">32&#39;d2</span>;
<a name="l01888"></a>01888 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_control</span> == <a class="code" href="ao68000_8v.html#afc15ad5da6b4afd71eb879476c603fe3">`ADDRESS_FROM_AN_OUTPUT</a><span class="vhdlchar"></span>) <span class="vhdlchar">address</span> &lt;= <a class="code" href="classregisters.html#a7fdc26691a005524667257529b1c1212">An_output</a>;
<a name="l01889"></a>01889 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_control</span> == <a class="code" href="ao68000_8v.html#ac1143ff5a059fc5609c9419fcd402ae1">`ADDRESS_FROM_BASE_INDEX_OFFSET</a><span class="vhdlchar"></span>) <span class="vhdlchar">address</span> &lt;= <span class="vhdlchar">address</span> + <span class="vhdlchar">index</span> + <span class="vhdlchar">offset</span>;
<a name="l01890"></a>01890 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_control</span> == <a class="code" href="ao68000_8v.html#aa6ba908e680fe87e46ac1cf014eed463">`ADDRESS_FROM_IMM_16</a><span class="vhdlchar"></span>) <span class="vhdlchar">address</span> &lt;= { {<span class="vhdllogic">16</span>{<a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">79</span>]}}, <a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">79</span>:<span class="vhdllogic">64</span>] };
<a name="l01891"></a>01891 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_control</span> == <a class="code" href="ao68000_8v.html#aa688332c940cad3a10561a5c9f74698a">`ADDRESS_FROM_IMM_32</a><span class="vhdlchar"></span>) <span class="vhdlchar">address</span> &lt;= <a class="code" href="classregisters.html#a4d5882d1f9437d14d18d0c08bd6907ba">prefetch_ir</a>[<span class="vhdllogic">79</span>:<span class="vhdllogic">48</span>];
<a name="l01892"></a>01892 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_control</span> == <a class="code" href="ao68000_8v.html#aa7a6ef5c21bbbf8a3c5a0437bdda3c85">`ADDRESS_FROM_PC_INDEX_OFFSET</a><span class="vhdlchar"></span>) <span class="vhdlchar">address</span> &lt;= <a class="code" href="classregisters.html#af160a45a0b3cd7794efb7fea1ed60526">pc_valid</a> + <span class="vhdlchar">index</span> + <span class="vhdlchar">offset</span>;
<a name="l01893"></a>01893 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_control</span> == <a class="code" href="ao68000_8v.html#a2a30a0ecfa48e96cc5be837e7db71cab">`ADDRESS_FROM_TRAP</a><span class="vhdlchar"></span>) <span class="vhdlchar">address</span> &lt;= {<span class="vhdllogic">22&#39;b0</span>, <span class="vhdlchar">trap</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">2&#39;b0</span>};
<a name="l01894"></a>01894 <span class="vhdlkeyword">end</span>
</pre></div>
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01627">1627</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01628">1628</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01628">1628</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01629">1629</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01630">1630</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01631">1631</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01631">1631</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01632">1632</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01632">1632</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01633">1633</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01633">1633</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01634">1634</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01634">1634</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01635">1635</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01635">1635</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01636">1636</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01636">1636</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01637">1637</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01637">1637</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01638">1638</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01638">1638</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01639">1639</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01639">1639</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01640">1640</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01640">1640</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01641">1641</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01642">1642</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01643">1643</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01643">1643</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01644">1644</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01644">1644</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01645">1645</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01646">1646</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01647">1647</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01648">1648</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01649">1649</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01649">1649</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01650">1650</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01651">1651</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01652">1652</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01652">1652</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01653">1653</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01654">1654</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01655">1655</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01655">1655</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01656">1656</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01658">1658</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01659">1659</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01743">1743</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l01744">1744</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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1424,7 → 1424,7
<li><a class="el" href="ao68000_8v_source.html">ao68000.v</a></li>
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<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:04 for ao68000 by&#160;
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<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
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31,7 → 31,7
<li>on interrupt acknowledge: use auto-vector. </li>
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<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/page_microcode.html
757,6 → 757,7
p .BRANCH_procedure().PROCEDURE_call_load_ea();
p .BRANCH_procedure().PROCEDURE_call_perform_ea_read();
 
p .ALU_ABCD_SBCD_ADDX_SUBX_prepare();
p .ALU_ABCD_SBCD_ADDX_SUBX()
.BRANCH_procedure().PROCEDURE_call_write();
 
1551,7 → 1552,7
}
}
</pre></div> </div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/functions_vars_0x7a.html
68,7 → 68,7
</li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/globals_defs_0x73.html
99,7 → 99,7
</li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:04 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/classmicrocode__branch.html
99,7 → 99,7
<p>The <a class="el" href="classmicrocode__branch.html" title="Select the next microcode word to execute.">microcode_branch</a> module is responsible for selecting the next microcode word to execute. This decision is based on the value of the current microcode word, the value of the interrupt privilege level, the state of the current bus cycle and other internal signals.</p>
<p>The <a class="el" href="classmicrocode__branch.html" title="Select the next microcode word to execute.">microcode_branch</a> module implements a simple stack for the microcode addresses. This makes it possible to call subroutines inside the microcode. </p>
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03335">3335</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03344">3344</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<hr/><h2>Member Function Documentation</h2>
<a class="anchor" id="a4e2c393980b78c66fbb22710e14a1cbb"></a><!-- doxytag: member="microcode_branch::ALWAYS_33" ref="a4e2c393980b78c66fbb22710e14a1cbb" args="clock, reset_n" -->
<div class="memitem">
120,12 → 120,12
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03418">3418</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03427">3427</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<div class="fragment"><pre class="fragment">
<a name="l03418"></a>03418 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classmicrocode__branch.html#ab7164ca4ddb1d2f4abd4bb892b0b03ef">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classmicrocode__branch.html#a9c12bc55b4584f1893c639f968a02b21">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l03419"></a>03419 <span class="vhdlkeyword">if</span>(<a class="code" href="classmicrocode__branch.html#a9c12bc55b4584f1893c639f968a02b21">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <a class="code" href="classmicrocode__branch.html#a4bf30fe5849ea92ea553858140d46b0a">micro_pc_0</a> &lt;= <span class="vhdllogic">9&#39;d0</span>;
<a name="l03420"></a>03420 <span class="vhdlkeyword">else</span> <a class="code" href="classmicrocode__branch.html#a4bf30fe5849ea92ea553858140d46b0a">micro_pc_0</a> &lt;= <a class="code" href="classmicrocode__branch.html#a238196a5cce50e726172501c44505eb5">micro_pc</a>;
<a name="l03421"></a>03421 <span class="vhdlkeyword">end</span>
<a name="l03427"></a>03427 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classmicrocode__branch.html#ab7164ca4ddb1d2f4abd4bb892b0b03ef">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classmicrocode__branch.html#a9c12bc55b4584f1893c639f968a02b21">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l03428"></a>03428 <span class="vhdlkeyword">if</span>(<a class="code" href="classmicrocode__branch.html#a9c12bc55b4584f1893c639f968a02b21">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <a class="code" href="classmicrocode__branch.html#a4bf30fe5849ea92ea553858140d46b0a">micro_pc_0</a> &lt;= <span class="vhdllogic">9&#39;d0</span>;
<a name="l03429"></a>03429 <span class="vhdlkeyword">else</span> <a class="code" href="classmicrocode__branch.html#a4bf30fe5849ea92ea553858140d46b0a">micro_pc_0</a> &lt;= <a class="code" href="classmicrocode__branch.html#a238196a5cce50e726172501c44505eb5">micro_pc</a>;
<a name="l03430"></a>03430 <span class="vhdlkeyword">end</span>
</pre></div>
</div>
</div>
148,63 → 148,63
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03423">3423</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03432">3432</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<div class="fragment"><pre class="fragment">
<a name="l03423"></a>03423 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classmicrocode__branch.html#ab7164ca4ddb1d2f4abd4bb892b0b03ef">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classmicrocode__branch.html#a9c12bc55b4584f1893c639f968a02b21">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l03424"></a>03424 <span class="vhdlkeyword">if</span>(<a class="code" href="classmicrocode__branch.html#a9c12bc55b4584f1893c639f968a02b21">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>
<a name="l03425"></a>03425 <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a> &lt;= <span class="vhdllogic">9&#39;d0</span>;
<a name="l03426"></a>03426 <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a> &lt;= <span class="vhdllogic">9&#39;d0</span>;
<a name="l03427"></a>03427 <a class="code" href="classmicrocode__branch.html#a94c784f786ca78c568e44da86f5e52b3">micro_pc_3</a> &lt;= <span class="vhdllogic">9&#39;d0</span>;
<a name="l03428"></a>03428 <span class="vhdlkeyword">end</span>
<a name="l03429"></a>03429 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a79ce1f7b2aa4e141d52316a04977ee60">`BRANCH_stop_flag_wait_ir_decode</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a00377f72cb925ea734f33251d85c91c7">prefetch_ir_valid</a> == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#afa8972a34b0f853c36c6d71a9ca18abc">decoder_trap</a> == <span class="vhdllogic">8&#39;d0</span>)
<a name="l03430"></a>03430 <span class="vhdlkeyword">begin</span>
<a name="l03431"></a>03431 <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a> &lt;= <a class="code" href="classmicrocode__branch.html#a4bf30fe5849ea92ea553858140d46b0a">micro_pc_0</a> + { <span class="vhdllogic">5&#39;d0</span>, <a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> };
<a name="l03432"></a>03432 <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a> &lt;= <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a>;
<a name="l03433"></a>03433 <a class="code" href="classmicrocode__branch.html#a94c784f786ca78c568e44da86f5e52b3">micro_pc_3</a> &lt;= <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a>;
<a name="l03434"></a>03434 <span class="vhdlkeyword">end</span>
<a name="l03435"></a>03435 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a1f24f0ad71fd4d2edd6ead5ef6c3056a">`BRANCH_procedure</a><span class="vhdlchar"></span>) <span class="vhdlkeyword">begin</span>
<a name="l03436"></a>03436 <span class="vhdlkeyword">if</span>(<a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#a403d3720f31ad5a5895778bee758fb55">`PROCEDURE_call_read</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#aac8d9985d8c614f252c6d9204fdc527f">load_ea</a> != <span class="vhdllogic">9&#39;d0</span>) <span class="vhdlkeyword">begin</span>
<a name="l03437"></a>03437 <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a> &lt;= <a class="code" href="classmicrocode__branch.html#af83212fb167418b4a292b929e3c79e5e">perform_ea_read</a>;
<a name="l03438"></a>03438 <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a> &lt;= <a class="code" href="classmicrocode__branch.html#a4bf30fe5849ea92ea553858140d46b0a">micro_pc_0</a> + <span class="vhdllogic">9&#39;d1</span>;
<a name="l03439"></a>03439 <a class="code" href="classmicrocode__branch.html#a94c784f786ca78c568e44da86f5e52b3">micro_pc_3</a> &lt;= <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a>;
<a name="l03440"></a>03440 <span class="vhdlkeyword">end</span>
<a name="l03441"></a>03441 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#a403d3720f31ad5a5895778bee758fb55">`PROCEDURE_call_read</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#aac8d9985d8c614f252c6d9204fdc527f">load_ea</a> == <span class="vhdllogic">9&#39;d0</span>) <span class="vhdlkeyword">begin</span>
<a name="l03442"></a>03442 <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a> &lt;= <a class="code" href="classmicrocode__branch.html#a4bf30fe5849ea92ea553858140d46b0a">micro_pc_0</a> + <span class="vhdllogic">9&#39;d1</span>;
<a name="l03443"></a>03443 <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a> &lt;= <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a>;
<a name="l03444"></a>03444 <a class="code" href="classmicrocode__branch.html#a94c784f786ca78c568e44da86f5e52b3">micro_pc_3</a> &lt;= <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a>;
<a name="l03445"></a>03445 <span class="vhdlkeyword">end</span>
<a name="l03446"></a>03446 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#a50af2007588b7a528b934ae7672b1214">`PROCEDURE_call_write</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#adabd40a119386f638a8f928bf079debf">save_ea</a> != <span class="vhdllogic">9&#39;d0</span>) <span class="vhdlkeyword">begin</span>
<a name="l03447"></a>03447 <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a> &lt;= <a class="code" href="classmicrocode__branch.html#adabd40a119386f638a8f928bf079debf">save_ea</a>;
<a name="l03448"></a>03448 <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a> &lt;= <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a>;
<a name="l03449"></a>03449 <a class="code" href="classmicrocode__branch.html#a94c784f786ca78c568e44da86f5e52b3">micro_pc_3</a> &lt;= <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a>;
<a name="l03450"></a>03450 <span class="vhdlkeyword">end</span>
<a name="l03451"></a>03451 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>((<a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#a5c7af3686fb890de6242f973de1ee549">`PROCEDURE_call_load_ea</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#aac8d9985d8c614f252c6d9204fdc527f">load_ea</a> != <span class="vhdllogic">9&#39;d0</span>) ||
<a name="l03452"></a>03452 (<a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#a698b04745cbbec22896235d5cfffac43">`PROCEDURE_call_perform_ea_read</a><span class="vhdlchar"></span>) ||
<a name="l03453"></a>03453 (<a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#aa98c954da2ac9f709907c8c593b1439e">`PROCEDURE_call_perform_ea_write</a><span class="vhdlchar"></span>) ||
<a name="l03454"></a>03454 (<a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#a30022c5eb1821e27dd5c70d4affbc835">`PROCEDURE_call_save_ea</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#adabd40a119386f638a8f928bf079debf">save_ea</a> != <span class="vhdllogic">9&#39;d0</span>) ||
<a name="l03455"></a>03455 (<a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#a2c67cc2747b67d04684855e14c2b9fbb">`PROCEDURE_call_trap</a><span class="vhdlchar"></span>) )
<a name="l03456"></a>03456 <span class="vhdlkeyword">begin</span>
<a name="l03457"></a>03457 <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a> &lt;= <a class="code" href="classmicrocode__branch.html#a4bf30fe5849ea92ea553858140d46b0a">micro_pc_0</a> + <span class="vhdllogic">9&#39;d1</span>;
<a name="l03458"></a>03458 <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a> &lt;= <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a>;
<a name="l03459"></a>03459 <a class="code" href="classmicrocode__branch.html#a94c784f786ca78c568e44da86f5e52b3">micro_pc_3</a> &lt;= <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a>;
<a name="l03460"></a>03460 <span class="vhdlkeyword">end</span>
<a name="l03461"></a>03461 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#af842761d13933777546d76bd997e7494">`PROCEDURE_return</a><span class="vhdlchar"></span>) <span class="vhdlkeyword">begin</span>
<a name="l03462"></a>03462 <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a> &lt;= <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a>;
<a name="l03463"></a>03463 <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a> &lt;= <a class="code" href="classmicrocode__branch.html#a94c784f786ca78c568e44da86f5e52b3">micro_pc_3</a>;
<a name="l03464"></a>03464 <a class="code" href="classmicrocode__branch.html#a94c784f786ca78c568e44da86f5e52b3">micro_pc_3</a> &lt;= <span class="vhdllogic">9&#39;d0</span>;
<a name="l03465"></a>03465 <span class="vhdlkeyword">end</span>
<a name="l03466"></a>03466 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#a318a0823db3c0aa8dfeae26f05495e5b">`PROCEDURE_push_micropc</a><span class="vhdlchar"></span>) <span class="vhdlkeyword">begin</span>
<a name="l03467"></a>03467 <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a> &lt;= <a class="code" href="classmicrocode__branch.html#a4bf30fe5849ea92ea553858140d46b0a">micro_pc_0</a>;
<a name="l03468"></a>03468 <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a> &lt;= <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a>;
<a name="l03469"></a>03469 <a class="code" href="classmicrocode__branch.html#a94c784f786ca78c568e44da86f5e52b3">micro_pc_3</a> &lt;= <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a>;
<a name="l03470"></a>03470 <span class="vhdlkeyword">end</span>
<a name="l03471"></a>03471 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#acfe58e669e77374120e6e534fc621316">`PROCEDURE_pop_micropc</a><span class="vhdlchar"></span>) <span class="vhdlkeyword">begin</span>
<a name="l03472"></a>03472 <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a> &lt;= <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a>;
<a name="l03473"></a>03473 <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a> &lt;= <a class="code" href="classmicrocode__branch.html#a94c784f786ca78c568e44da86f5e52b3">micro_pc_3</a>;
<a name="l03474"></a>03474 <a class="code" href="classmicrocode__branch.html#a94c784f786ca78c568e44da86f5e52b3">micro_pc_3</a> &lt;= <span class="vhdllogic">9&#39;d0</span>;
<a name="l03475"></a>03475 <span class="vhdlkeyword">end</span>
<a name="l03476"></a>03476 <span class="vhdlkeyword">end</span>
<a name="l03477"></a>03477 <span class="vhdlkeyword">end</span>
<a name="l03432"></a>03432 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classmicrocode__branch.html#ab7164ca4ddb1d2f4abd4bb892b0b03ef">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classmicrocode__branch.html#a9c12bc55b4584f1893c639f968a02b21">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l03433"></a>03433 <span class="vhdlkeyword">if</span>(<a class="code" href="classmicrocode__branch.html#a9c12bc55b4584f1893c639f968a02b21">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>
<a name="l03434"></a>03434 <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a> &lt;= <span class="vhdllogic">9&#39;d0</span>;
<a name="l03435"></a>03435 <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a> &lt;= <span class="vhdllogic">9&#39;d0</span>;
<a name="l03436"></a>03436 <a class="code" href="classmicrocode__branch.html#a94c784f786ca78c568e44da86f5e52b3">micro_pc_3</a> &lt;= <span class="vhdllogic">9&#39;d0</span>;
<a name="l03437"></a>03437 <span class="vhdlkeyword">end</span>
<a name="l03438"></a>03438 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a79ce1f7b2aa4e141d52316a04977ee60">`BRANCH_stop_flag_wait_ir_decode</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#a00377f72cb925ea734f33251d85c91c7">prefetch_ir_valid</a> == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#afa8972a34b0f853c36c6d71a9ca18abc">decoder_trap</a> == <span class="vhdllogic">8&#39;d0</span>)
<a name="l03439"></a>03439 <span class="vhdlkeyword">begin</span>
<a name="l03440"></a>03440 <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a> &lt;= <a class="code" href="classmicrocode__branch.html#a4bf30fe5849ea92ea553858140d46b0a">micro_pc_0</a> + { <span class="vhdllogic">5&#39;d0</span>, <a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> };
<a name="l03441"></a>03441 <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a> &lt;= <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a>;
<a name="l03442"></a>03442 <a class="code" href="classmicrocode__branch.html#a94c784f786ca78c568e44da86f5e52b3">micro_pc_3</a> &lt;= <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a>;
<a name="l03443"></a>03443 <span class="vhdlkeyword">end</span>
<a name="l03444"></a>03444 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classmicrocode__branch.html#a56f9320d903c964597e18a7110c9e821">branch_control</a> == <a class="code" href="ao68000_8v.html#a1f24f0ad71fd4d2edd6ead5ef6c3056a">`BRANCH_procedure</a><span class="vhdlchar"></span>) <span class="vhdlkeyword">begin</span>
<a name="l03445"></a>03445 <span class="vhdlkeyword">if</span>(<a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#a403d3720f31ad5a5895778bee758fb55">`PROCEDURE_call_read</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#aac8d9985d8c614f252c6d9204fdc527f">load_ea</a> != <span class="vhdllogic">9&#39;d0</span>) <span class="vhdlkeyword">begin</span>
<a name="l03446"></a>03446 <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a> &lt;= <a class="code" href="classmicrocode__branch.html#af83212fb167418b4a292b929e3c79e5e">perform_ea_read</a>;
<a name="l03447"></a>03447 <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a> &lt;= <a class="code" href="classmicrocode__branch.html#a4bf30fe5849ea92ea553858140d46b0a">micro_pc_0</a> + <span class="vhdllogic">9&#39;d1</span>;
<a name="l03448"></a>03448 <a class="code" href="classmicrocode__branch.html#a94c784f786ca78c568e44da86f5e52b3">micro_pc_3</a> &lt;= <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a>;
<a name="l03449"></a>03449 <span class="vhdlkeyword">end</span>
<a name="l03450"></a>03450 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#a403d3720f31ad5a5895778bee758fb55">`PROCEDURE_call_read</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#aac8d9985d8c614f252c6d9204fdc527f">load_ea</a> == <span class="vhdllogic">9&#39;d0</span>) <span class="vhdlkeyword">begin</span>
<a name="l03451"></a>03451 <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a> &lt;= <a class="code" href="classmicrocode__branch.html#a4bf30fe5849ea92ea553858140d46b0a">micro_pc_0</a> + <span class="vhdllogic">9&#39;d1</span>;
<a name="l03452"></a>03452 <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a> &lt;= <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a>;
<a name="l03453"></a>03453 <a class="code" href="classmicrocode__branch.html#a94c784f786ca78c568e44da86f5e52b3">micro_pc_3</a> &lt;= <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a>;
<a name="l03454"></a>03454 <span class="vhdlkeyword">end</span>
<a name="l03455"></a>03455 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#a50af2007588b7a528b934ae7672b1214">`PROCEDURE_call_write</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#adabd40a119386f638a8f928bf079debf">save_ea</a> != <span class="vhdllogic">9&#39;d0</span>) <span class="vhdlkeyword">begin</span>
<a name="l03456"></a>03456 <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a> &lt;= <a class="code" href="classmicrocode__branch.html#adabd40a119386f638a8f928bf079debf">save_ea</a>;
<a name="l03457"></a>03457 <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a> &lt;= <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a>;
<a name="l03458"></a>03458 <a class="code" href="classmicrocode__branch.html#a94c784f786ca78c568e44da86f5e52b3">micro_pc_3</a> &lt;= <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a>;
<a name="l03459"></a>03459 <span class="vhdlkeyword">end</span>
<a name="l03460"></a>03460 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>((<a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#a5c7af3686fb890de6242f973de1ee549">`PROCEDURE_call_load_ea</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#aac8d9985d8c614f252c6d9204fdc527f">load_ea</a> != <span class="vhdllogic">9&#39;d0</span>) ||
<a name="l03461"></a>03461 (<a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#a698b04745cbbec22896235d5cfffac43">`PROCEDURE_call_perform_ea_read</a><span class="vhdlchar"></span>) ||
<a name="l03462"></a>03462 (<a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#aa98c954da2ac9f709907c8c593b1439e">`PROCEDURE_call_perform_ea_write</a><span class="vhdlchar"></span>) ||
<a name="l03463"></a>03463 (<a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#a30022c5eb1821e27dd5c70d4affbc835">`PROCEDURE_call_save_ea</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classmicrocode__branch.html#adabd40a119386f638a8f928bf079debf">save_ea</a> != <span class="vhdllogic">9&#39;d0</span>) ||
<a name="l03464"></a>03464 (<a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#a2c67cc2747b67d04684855e14c2b9fbb">`PROCEDURE_call_trap</a><span class="vhdlchar"></span>) )
<a name="l03465"></a>03465 <span class="vhdlkeyword">begin</span>
<a name="l03466"></a>03466 <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a> &lt;= <a class="code" href="classmicrocode__branch.html#a4bf30fe5849ea92ea553858140d46b0a">micro_pc_0</a> + <span class="vhdllogic">9&#39;d1</span>;
<a name="l03467"></a>03467 <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a> &lt;= <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a>;
<a name="l03468"></a>03468 <a class="code" href="classmicrocode__branch.html#a94c784f786ca78c568e44da86f5e52b3">micro_pc_3</a> &lt;= <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a>;
<a name="l03469"></a>03469 <span class="vhdlkeyword">end</span>
<a name="l03470"></a>03470 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#af842761d13933777546d76bd997e7494">`PROCEDURE_return</a><span class="vhdlchar"></span>) <span class="vhdlkeyword">begin</span>
<a name="l03471"></a>03471 <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a> &lt;= <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a>;
<a name="l03472"></a>03472 <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a> &lt;= <a class="code" href="classmicrocode__branch.html#a94c784f786ca78c568e44da86f5e52b3">micro_pc_3</a>;
<a name="l03473"></a>03473 <a class="code" href="classmicrocode__branch.html#a94c784f786ca78c568e44da86f5e52b3">micro_pc_3</a> &lt;= <span class="vhdllogic">9&#39;d0</span>;
<a name="l03474"></a>03474 <span class="vhdlkeyword">end</span>
<a name="l03475"></a>03475 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#a318a0823db3c0aa8dfeae26f05495e5b">`PROCEDURE_push_micropc</a><span class="vhdlchar"></span>) <span class="vhdlkeyword">begin</span>
<a name="l03476"></a>03476 <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a> &lt;= <a class="code" href="classmicrocode__branch.html#a4bf30fe5849ea92ea553858140d46b0a">micro_pc_0</a>;
<a name="l03477"></a>03477 <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a> &lt;= <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a>;
<a name="l03478"></a>03478 <a class="code" href="classmicrocode__branch.html#a94c784f786ca78c568e44da86f5e52b3">micro_pc_3</a> &lt;= <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a>;
<a name="l03479"></a>03479 <span class="vhdlkeyword">end</span>
<a name="l03480"></a>03480 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classmicrocode__branch.html#a1b17ee298d38c0cdb69514dd9db78da8">branch_offset</a> == <a class="code" href="ao68000_8v.html#acfe58e669e77374120e6e534fc621316">`PROCEDURE_pop_micropc</a><span class="vhdlchar"></span>) <span class="vhdlkeyword">begin</span>
<a name="l03481"></a>03481 <a class="code" href="classmicrocode__branch.html#a2442d492837d0c2be069b1888bb8e8e6">micro_pc_1</a> &lt;= <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a>;
<a name="l03482"></a>03482 <a class="code" href="classmicrocode__branch.html#a91d0bdf3e43ef1ae6a8f4bd91b5d1d8c">micro_pc_2</a> &lt;= <a class="code" href="classmicrocode__branch.html#a94c784f786ca78c568e44da86f5e52b3">micro_pc_3</a>;
<a name="l03483"></a>03483 <a class="code" href="classmicrocode__branch.html#a94c784f786ca78c568e44da86f5e52b3">micro_pc_3</a> &lt;= <span class="vhdllogic">9&#39;d0</span>;
<a name="l03484"></a>03484 <span class="vhdlkeyword">end</span>
<a name="l03485"></a>03485 <span class="vhdlkeyword">end</span>
<a name="l03486"></a>03486 <span class="vhdlkeyword">end</span>
</pre></div>
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03336">3336</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03345">3345</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03337">3337</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03346">3346</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03339">3339</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03348">3348</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03340">3340</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03349">3349</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03341">3341</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03350">3350</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03342">3342</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03351">3351</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03343">3343</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03352">3352</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03344">3344</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03353">3353</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03345">3345</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03354">3354</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03346">3346</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03355">3355</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03347">3347</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03356">3356</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03348">3348</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03357">3357</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03349">3349</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03358">3358</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03350">3350</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03359">3359</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03351">3351</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03360">3360</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03352">3352</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03361">3361</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03354">3354</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03363">3363</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03355">3355</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03364">3364</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03356">3356</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03365">3365</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03357">3357</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03366">3366</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03358">3358</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03367">3367</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03360">3360</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03369">3369</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03361">3361</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03370">3370</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03362">3362</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03371">3371</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03363">3363</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03372">3372</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03364">3364</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03373">3373</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03366">3366</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03375">3375</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03367">3367</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03376">3376</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03368">3368</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03377">3377</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03371">3371</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03380">3380</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03372">3372</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03381">3381</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03373">3373</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03382">3382</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03374">3374</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l03383">3383</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
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<tr><td class="memTemplParams" colspan="2"><b><a class="el" href="ao68000_8v.html#a4e6626ea369de1da9de2bf93f33278dd">MICROPC_ASL_LSL_ROL_ROXL_ASR_LSR_ROR_ROXR_all_immediate_register</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdldigit">9'd212</span><span class="vhdlchar"> </span></b></b></td></tr>
<tr><td class="memTemplParams" colspan="2"><b><a class="el" href="ao68000_8v.html#a9fde5fd1573e75c4ee92cb4ced9dc2a9">MICROPC_ASL_LSL_ROL_ROXL_ASR_LSR_ROR_ROXR_all_immediate_register</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdldigit">9'd213</span><span class="vhdlchar"> </span></b></b></td></tr>
<tr><td class="memTemplParams" colspan="2"><b><a class="el" href="ao68000_8v.html#a1fc7f893ce96f66f9cd2ab9b54f5b319">MICROPC_SAVE_EA_An_plus</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdldigit">9'd95</span><span class="vhdlchar"> </span></b></b></td></tr>
<tr><td class="memTemplParams" colspan="2"><b><a class="el" href="ao68000_8v.html#aa6cccbccacb5da82328bfdeeb3c5c6fa">MICROPC_LOAD_EA_d16_An</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdldigit">9'd65</span><span class="vhdlchar"> </span></b></b></td></tr>
<tr><td class="memTemplParams" colspan="2"><b><a class="el" href="ao68000_8v.html#a43d41ce59902030032a09041c949465e">MICROPC_LOAD_EA_An_plus</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdldigit">9'd62</span><span class="vhdlchar"> </span></b></b></td></tr>
536,33 → 537,48
 
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#ac2232882ac07e5f6ed49d8523a342e3d">ALU_ABCD_SBCD_ADDX_SUBX</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00229">229</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00228">228</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#ab29cd7ca32420baad72d75d0677ec031">ALU_ADDA_SUBA_CMPA_ADDQ_SUBQ</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00232">232</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00233">233</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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581,63 → 597,63
 
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#ad999ca341f5ef5f492a551d865c78344">ALU_ASL_LSL_ROL_ROXL_ASR_LSR_ROR_ROXR</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00230">230</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00231">231</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#aa6e2c61cc22be977878f3f6443fad4e4">ALU_ASL_LSL_ROL_ROXL_ASR_LSR_ROR_ROXR_prepare</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00229">229</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00230">230</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a6a5b0b64b4095955d345bc82b0f571dc">ALU_BCHG_BCLR_BSET_BTST</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00235">235</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00236">236</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a2b23555c0e46c828ed661af45443f50f">ALU_CHK</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a0fefeebf906b8833a16856dcd5608084">ALU_CHK</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00233">233</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00234">234</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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656,48 → 672,48
 
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#ae3067aec1dc26a3d09f0c7a730422110">ALU_LINK_MOVE</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#abb3d1ac266c7685ef8d1d2c503b5f2ea">ALU_LINK_MOVE</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00242">242</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00243">243</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a593c63ceb3669ccb39c366b9573bf314">ALU_MOVE</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a13c29dec93353b36d9d8b93f9fe17858">ALU_MOVE</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00231">231</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00232">232</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a3c579fa060ac05434f085b03edf68501">ALU_MOVE_TO_CCR_SR_RTE_RTR_STOP_LOGIC_TO_CCR_SR</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a1d757814a523468330a8f3bb14b8bf8f">ALU_MOVE_TO_CCR_SR_RTE_RTR_STOP_LOGIC_TO_CCR_SR</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00240">240</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00241">241</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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821,33 → 837,33
 
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#ab6f46721fa6d6a108c01a61e2d661ee3">ALU_MULS_MULU_DIVS_DIVU</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#ac0303730d6c74d83b8aea99da7c75c9b">ALU_MULS_MULU_DIVS_DIVU</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00234">234</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00235">235</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a2c62639a3a5741fe487feb1f210defa7">ALU_NEGX_CLR_NEG_NOT_NBCD_SWAP_EXT</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00237">237</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00238">238</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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866,48 → 882,48
 
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#ad6a90b18962092a662ad077d57984652">ALU_SIMPLE_LONG_ADD</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a93bd99e57b180798d7c859c1fdca1184">ALU_SIMPLE_LONG_ADD</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00238">238</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00239">239</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<a class="anchor" id="a06f84841e35fc97186b630f26f150869"></a><!-- doxytag: member="ao68000.v::ALU_SIMPLE_LONG_SUB" ref="a06f84841e35fc97186b630f26f150869" args="5'd24" -->
<a class="anchor" id="a732ebeb4c58fb9cc285e1061b517b373"></a><!-- doxytag: member="ao68000.v::ALU_SIMPLE_LONG_SUB" ref="a732ebeb4c58fb9cc285e1061b517b373" args="5'd25" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a06f84841e35fc97186b630f26f150869">ALU_SIMPLE_LONG_SUB</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a732ebeb4c58fb9cc285e1061b517b373">ALU_SIMPLE_LONG_SUB</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00239">239</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00240">240</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<a class="anchor" id="a29a77523d5e44bf1df8a8203c033cc05"></a><!-- doxytag: member="ao68000.v::ALU_SIMPLE_MOVE" ref="a29a77523d5e44bf1df8a8203c033cc05" args="5'd26" -->
<a class="anchor" id="ab290c8d7d590ed6bbb564ef941d0ec88"></a><!-- doxytag: member="ao68000.v::ALU_SIMPLE_MOVE" ref="ab290c8d7d590ed6bbb564ef941d0ec88" args="5'd27" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a29a77523d5e44bf1df8a8203c033cc05">ALU_SIMPLE_MOVE</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#ab290c8d7d590ed6bbb564ef941d0ec88">ALU_SIMPLE_MOVE</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
</tr>
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</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00241">241</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00242">242</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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941,18 → 957,18
 
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<a class="anchor" id="a436fe5adcadbae571eedb35dd98487ac"></a><!-- doxytag: member="ao68000.v::ALU_TAS" ref="a436fe5adcadbae571eedb35dd98487ac" args="5'd21" -->
<a class="anchor" id="af93e88849a416e2d551526b760198022"></a><!-- doxytag: member="ao68000.v::ALU_TAS" ref="af93e88849a416e2d551526b760198022" args="5'd22" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a436fe5adcadbae571eedb35dd98487ac">ALU_TAS</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#af93e88849a416e2d551526b760198022">ALU_TAS</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00236">236</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00237">237</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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1102,7 → 1118,7
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00249">249</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00250">250</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00248">248</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00249">249</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00250">250</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00251">251</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00251">251</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00252">252</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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1162,7 → 1178,7
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00258">258</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00259">259</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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1177,7 → 1193,7
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00244">244</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00245">245</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00256">256</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00257">257</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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1207,7 → 1223,7
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00245">245</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00246">246</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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1222,7 → 1238,7
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00246">246</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00247">247</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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1237,7 → 1253,7
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00254">254</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00255">255</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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1252,7 → 1268,7
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00247">247</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00248">248</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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1267,7 → 1283,7
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00259">259</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00260">260</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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1282,7 → 1298,7
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00252">252</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00253">253</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00255">255</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00256">256</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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1312,7 → 1328,7
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<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00257">257</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00258">258</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00253">253</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00254">254</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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2212,7 → 2228,7
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00288">288</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00289">289</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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2227,7 → 2243,7
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00314">314</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00315">315</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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2242,7 → 2258,7
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00309">309</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00310">310</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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2257,7 → 2273,7
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00311">311</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00312">312</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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2272,7 → 2288,7
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<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00310">310</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00311">311</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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2287,7 → 2303,7
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<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00315">315</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00316">316</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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2302,7 → 2318,7
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00308">308</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00309">309</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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2317,7 → 2333,7
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<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00312">312</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00313">313</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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2332,7 → 2348,7
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<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00313">313</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00314">314</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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2347,7 → 2363,7
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<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00307">307</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00308">308</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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2362,7 → 2378,7
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<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00304">304</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00305">305</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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2377,7 → 2393,7
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<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00305">305</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00306">306</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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2392,7 → 2408,7
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<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00303">303</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00304">304</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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2407,7 → 2423,7
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<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00306">306</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00307">307</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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2422,7 → 2438,7
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<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00284">284</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00285">285</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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2437,7 → 2453,7
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<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00283">283</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00284">284</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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2452,7 → 2468,7
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<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00285">285</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00286">286</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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2467,7 → 2483,7
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<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00300">300</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00301">301</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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2482,7 → 2498,7
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<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00297">297</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00298">298</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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2497,7 → 2513,7
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<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00301">301</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00302">302</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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2512,7 → 2528,7
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<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00293">293</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00294">294</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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2527,7 → 2543,7
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00291">291</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00292">292</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00290">290</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00291">291</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00292">292</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00293">293</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00296">296</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00297">297</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00286">286</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00287">287</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00287">287</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00288">288</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00294">294</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00295">295</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00316">316</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00317">317</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00302">302</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00303">303</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00289">289</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00290">290</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00298">298</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00299">299</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00299">299</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00300">300</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00295">295</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00296">296</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00379">379</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00380">380</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a9a2dc7c44d3211c4cd147781c7ae046e">MICROPC_ADD_to_Dn_SUB_to_Dn_AND_to_Dn_OR_to_Dn</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#abc67aa9e69521c5fa49bee3d17922601">MICROPC_ADD_to_Dn_SUB_to_Dn_AND_to_Dn_OR_to_Dn</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00375">375</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00376">376</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<a class="anchor" id="a07444504629b99d3da8ebbeee3a594cc"></a><!-- doxytag: member="ao68000.v::MICROPC_ADD_to_mem_SUB_to_mem_AND_to_mem_OR_to_mem" ref="a07444504629b99d3da8ebbeee3a594cc" args="9'd250" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a07444504629b99d3da8ebbeee3a594cc">MICROPC_ADD_to_mem_SUB_to_mem_AND_to_mem_OR_to_mem</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#adb4576e2353bcba5c9efc76f4e759e1d">MICROPC_ADD_to_mem_SUB_to_mem_AND_to_mem_OR_to_mem</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00353">353</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00354">354</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#ae1aa62002fb7e0be2dc9d98d0361bc65">MICROPC_ADDA_SUBA</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a9af4faccf200aa9c2c1d05f225992b47">MICROPC_ADDA_SUBA</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00327">327</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00328">328</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a0e2906a8e705c899033a9467393c2ff2">MICROPC_ADDQ_SUBQ_An</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#aac8e14537f34b089e98fc8b3c2902c7c">MICROPC_ADDQ_SUBQ_An</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00361">361</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00362">362</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a95038a8726dc69a3f11930e16a4f4f6a">MICROPC_ADDQ_SUBQ_not_An</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#aa8423f29fb78e63d70c05ba42b63752c">MICROPC_ADDQ_SUBQ_not_An</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00350">350</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00351">351</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00322">322</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00323">323</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00371">371</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00372">372</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a4e6626ea369de1da9de2bf93f33278dd">MICROPC_ASL_LSL_ROL_ROXL_ASR_LSR_ROR_ROXR_all_immediate_register</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a9fde5fd1573e75c4ee92cb4ced9dc2a9">MICROPC_ASL_LSL_ROL_ROXL_ASR_LSR_ROR_ROXR_all_immediate_register</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00390">390</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00391">391</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#af11ba1e2cd2e0bb279bf935b3defc503">MICROPC_ASL_LSL_ROL_ROXL_ASR_LSR_ROR_ROXR_all_memory</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#acd3e87e5069baefe8bb1678740b6e0dc">MICROPC_ASL_LSL_ROL_ROXL_ASR_LSR_ROR_ROXR_all_memory</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00335">335</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00336">336</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#aa2f8f7655984ca496c0c15c281956ee1">MICROPC_Bcc_BRA</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#acbaeb74b252d36f73c7d8e558e9009d5">MICROPC_Bcc_BRA</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00354">354</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00355">355</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#adba77b4e840a8ed2af693f17640a4e69">MICROPC_BCHG_BCLR_BSET_immediate</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a8cc8c17f8d8d9b1a118dfb933f028708">MICROPC_BCHG_BCLR_BSET_immediate</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00372">372</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00373">373</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<a class="anchor" id="a96e203e1004b880c901a4e8b2f2f2429"></a><!-- doxytag: member="ao68000.v::MICROPC_BCHG_BCLR_BSET_register" ref="a96e203e1004b880c901a4e8b2f2f2429" args="9'd321" -->
<a class="anchor" id="a5b4f35f37fcc59f614a2ee1722a1b2bf"></a><!-- doxytag: member="ao68000.v::MICROPC_BCHG_BCLR_BSET_register" ref="a5b4f35f37fcc59f614a2ee1722a1b2bf" args="9'd322" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a96e203e1004b880c901a4e8b2f2f2429">MICROPC_BCHG_BCLR_BSET_register</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a5b4f35f37fcc59f614a2ee1722a1b2bf">MICROPC_BCHG_BCLR_BSET_register</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00380">380</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00381">381</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<a class="anchor" id="a0d2cfeb23b6f839077af216e173e1237"></a><!-- doxytag: member="ao68000.v::MICROPC_BSR" ref="a0d2cfeb23b6f839077af216e173e1237" args="9'd430" -->
<a class="anchor" id="a8b3919eb82bb79216bfccd40c6a758c8"></a><!-- doxytag: member="ao68000.v::MICROPC_BSR" ref="a8b3919eb82bb79216bfccd40c6a758c8" args="9'd431" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a0d2cfeb23b6f839077af216e173e1237">MICROPC_BSR</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a8b3919eb82bb79216bfccd40c6a758c8">MICROPC_BSR</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00321">321</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00322">322</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<a class="anchor" id="a1031f61a9539b8a68133920d39ba9762"></a><!-- doxytag: member="ao68000.v::MICROPC_BTST_immediate" ref="a1031f61a9539b8a68133920d39ba9762" args="9'd315" -->
<a class="anchor" id="a9b56f391a36e3ed47a2109e88df1dbcb"></a><!-- doxytag: member="ao68000.v::MICROPC_BTST_immediate" ref="a9b56f391a36e3ed47a2109e88df1dbcb" args="9'd316" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a1031f61a9539b8a68133920d39ba9762">MICROPC_BTST_immediate</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a9b56f391a36e3ed47a2109e88df1dbcb">MICROPC_BTST_immediate</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00363">363</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00364">364</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<a class="anchor" id="aef60ac808758c220d9e048b86a36e406"></a><!-- doxytag: member="ao68000.v::MICROPC_BTST_register" ref="aef60ac808758c220d9e048b86a36e406" args="9'd326" -->
<a class="anchor" id="a6d1bdffcbb3b7d0714daad1aa999e685"></a><!-- doxytag: member="ao68000.v::MICROPC_BTST_register" ref="a6d1bdffcbb3b7d0714daad1aa999e685" args="9'd327" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#aef60ac808758c220d9e048b86a36e406">MICROPC_BTST_register</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a6d1bdffcbb3b7d0714daad1aa999e685">MICROPC_BTST_register</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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</table>
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<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00338">338</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00339">339</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<a class="anchor" id="a3c6368d941d09f1a7700910a2b5fca4a"></a><!-- doxytag: member="ao68000.v::MICROPC_CHK" ref="a3c6368d941d09f1a7700910a2b5fca4a" args="9'd281" -->
<a class="anchor" id="a74fe7da0fc0bc24d1057e3fc53792678"></a><!-- doxytag: member="ao68000.v::MICROPC_CHK" ref="a74fe7da0fc0bc24d1057e3fc53792678" args="9'd282" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a3c6368d941d09f1a7700910a2b5fca4a">MICROPC_CHK</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a74fe7da0fc0bc24d1057e3fc53792678">MICROPC_CHK</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00366">366</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00367">367</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<a class="anchor" id="adaf4d54600ebc6c16fb64a2889f128dd"></a><!-- doxytag: member="ao68000.v::MICROPC_CMP" ref="adaf4d54600ebc6c16fb64a2889f128dd" args="9'd262" -->
<a class="anchor" id="a269b9dd820bd55bb127ad7b044f9eaa4"></a><!-- doxytag: member="ao68000.v::MICROPC_CMP" ref="a269b9dd820bd55bb127ad7b044f9eaa4" args="9'd263" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#adaf4d54600ebc6c16fb64a2889f128dd">MICROPC_CMP</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a269b9dd820bd55bb127ad7b044f9eaa4">MICROPC_CMP</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00384">384</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00385">385</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<a class="anchor" id="ab928eae11a81b6d124a6f3909ce7b9f1"></a><!-- doxytag: member="ao68000.v::MICROPC_CMPA" ref="ab928eae11a81b6d124a6f3909ce7b9f1" args="9'd275" -->
<a class="anchor" id="a262e3c3a1fce58c41ac0eed1094d7734"></a><!-- doxytag: member="ao68000.v::MICROPC_CMPA" ref="a262e3c3a1fce58c41ac0eed1094d7734" args="9'd276" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#ab928eae11a81b6d124a6f3909ce7b9f1">MICROPC_CMPA</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a262e3c3a1fce58c41ac0eed1094d7734">MICROPC_CMPA</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00342">342</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00343">343</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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3007,97 → 3023,97
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00346">346</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00347">347</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<a class="anchor" id="a1b25d4948e6b56628513b57270c88553"></a><!-- doxytag: member="ao68000.v::MICROPC_CMPM" ref="a1b25d4948e6b56628513b57270c88553" args="9'd205" -->
<a class="anchor" id="a5d8f6917484c6c494fb59b0801d79c37"></a><!-- doxytag: member="ao68000.v::MICROPC_CMPM" ref="a5d8f6917484c6c494fb59b0801d79c37" args="9'd206" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a1b25d4948e6b56628513b57270c88553">MICROPC_CMPM</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a5d8f6917484c6c494fb59b0801d79c37">MICROPC_CMPM</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00348">348</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00349">349</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<a class="anchor" id="aa888e8868f9a35fb790e242c1ca553de"></a><!-- doxytag: member="ao68000.v::MICROPC_DBcc" ref="aa888e8868f9a35fb790e242c1ca553de" args="9'd374" -->
<a class="anchor" id="ada265be45a364b897239ada9fbdc3e9f"></a><!-- doxytag: member="ao68000.v::MICROPC_DBcc" ref="ada265be45a364b897239ada9fbdc3e9f" args="9'd375" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#aa888e8868f9a35fb790e242c1ca553de">MICROPC_DBcc</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#ada265be45a364b897239ada9fbdc3e9f">MICROPC_DBcc</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00345">345</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00346">346</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<a class="anchor" id="a8a3ee084648ac92e056b83f949fa05d6"></a><!-- doxytag: member="ao68000.v::MICROPC_EOR" ref="a8a3ee084648ac92e056b83f949fa05d6" args="9'd245" -->
<a class="anchor" id="af12b85c27e484a192ef362226d4c096f"></a><!-- doxytag: member="ao68000.v::MICROPC_EOR" ref="af12b85c27e484a192ef362226d4c096f" args="9'd246" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a8a3ee084648ac92e056b83f949fa05d6">MICROPC_EOR</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#af12b85c27e484a192ef362226d4c096f">MICROPC_EOR</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00343">343</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00344">344</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<a class="anchor" id="a9a7a60a90fd7b7a8f511fa58a5474209"></a><!-- doxytag: member="ao68000.v::MICROPC_EXG" ref="a9a7a60a90fd7b7a8f511fa58a5474209" args="9'd197" -->
<a class="anchor" id="a64ff00949fa84c24b696dbe7e25b01b0"></a><!-- doxytag: member="ao68000.v::MICROPC_EXG" ref="a64ff00949fa84c24b696dbe7e25b01b0" args="9'd198" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a9a7a60a90fd7b7a8f511fa58a5474209">MICROPC_EXG</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a64ff00949fa84c24b696dbe7e25b01b0">MICROPC_EXG</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00352">352</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00353">353</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<a class="anchor" id="a08c56739b00c2c2ecae742fb5c665fe6"></a><!-- doxytag: member="ao68000.v::MICROPC_JMP" ref="a08c56739b00c2c2ecae742fb5c665fe6" args="9'd442" -->
<a class="anchor" id="a1aeaf72ab4278a1d5650f90313a56ba4"></a><!-- doxytag: member="ao68000.v::MICROPC_JMP" ref="a1aeaf72ab4278a1d5650f90313a56ba4" args="9'd443" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a08c56739b00c2c2ecae742fb5c665fe6">MICROPC_JMP</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a1aeaf72ab4278a1d5650f90313a56ba4">MICROPC_JMP</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00368">368</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00369">369</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<a class="anchor" id="a73d1379623370b7ac490fc7d0efd3b31"></a><!-- doxytag: member="ao68000.v::MICROPC_JSR" ref="a73d1379623370b7ac490fc7d0efd3b31" args="9'd450" -->
<a class="anchor" id="ad082f357abc9fcebe91ab98012bf20ab"></a><!-- doxytag: member="ao68000.v::MICROPC_JSR" ref="ad082f357abc9fcebe91ab98012bf20ab" args="9'd451" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a73d1379623370b7ac490fc7d0efd3b31">MICROPC_JSR</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#ad082f357abc9fcebe91ab98012bf20ab">MICROPC_JSR</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00388">388</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00389">389</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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3112,22 → 3128,22
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00376">376</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00377">377</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<a class="anchor" id="a4ac35c6768582e13cf2cfbec564a15c4"></a><!-- doxytag: member="ao68000.v::MICROPC_LINK" ref="a4ac35c6768582e13cf2cfbec564a15c4" args="9'd403" -->
<a class="anchor" id="a78a964bd72f8f8666ca6906112c0906e"></a><!-- doxytag: member="ao68000.v::MICROPC_LINK" ref="a78a964bd72f8f8666ca6906112c0906e" args="9'd404" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a4ac35c6768582e13cf2cfbec564a15c4">MICROPC_LINK</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a78a964bd72f8f8666ca6906112c0906e">MICROPC_LINK</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00378">378</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00379">379</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00373">373</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00374">374</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00393">393</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00394">394</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00392">392</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00393">393</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00356">356</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00357">357</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00339">339</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00340">340</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00330">330</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00331">331</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00382">382</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00383">383</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00389">389</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00390">390</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00347">347</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00348">348</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00344">344</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00345">345</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00326">326</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00327">327</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a1968dd1421c5a999838228e955a82d40">MICROPC_MOVE</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#ac7fe3df66fb357ed17c83ab0e564f693">MICROPC_MOVE</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00318">318</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00319">319</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#aebd7c1774f2faac02d954c85ad1c20f8">MICROPC_MOVE_FROM_SR</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a8770eb5b48f75ce87ba9194562b6a45c">MICROPC_MOVE_FROM_SR</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00329">329</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00330">330</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#af3ccebcba20d1b81f55e4648bbc6434f">MICROPC_MOVE_TO_CCR_MOVE_TO_SR</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a4f73e4f0a5ea52e7f09fa8304c51ccc6">MICROPC_MOVE_TO_CCR_MOVE_TO_SR</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00328">328</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00329">329</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a05e53cc87165049f906e67afa2329da4">MICROPC_MOVE_USP_to_An</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#ab4dbf8db303523650c505aebe911d0db">MICROPC_MOVE_USP_to_An</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00319">319</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00320">320</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a10dd3138063247ca8f12244bf4fe7111">MICROPC_MOVE_USP_to_USP</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a58add1f1e75cbb26a4702c9e9fa5d148">MICROPC_MOVE_USP_to_USP</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00349">349</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00350">350</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#ad35aeb7821957c9eb79f4e294d7b66cf">MICROPC_MOVEA</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#ad6a5cb27bff98a58730dec402f6cc4df">MICROPC_MOVEA</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00336">336</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00337">337</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00394">394</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00395">395</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00362">362</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00363">363</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00358">358</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00359">359</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00364">364</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00365">365</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00323">323</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00324">324</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#ae2dc5340c2232f74f46c35a5afd48b33">MICROPC_MOVEQ</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a6dda1d34c2e5b66ee78fa55062db0387">MICROPC_MOVEQ</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00341">341</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00342">342</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a58a0825eeeb1bd2340a0b7c92e36c325">MICROPC_MULS_MULU_DIVS_DIVU</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a4f3fc5e0e14817aa8c5fcf2d6e94cb8c">MICROPC_MULS_MULU_DIVS_DIVU</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00340">340</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00341">341</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#aa7a60b9cfa407e7a0216770809f65b7c">MICROPC_NEGX_CLR_NEG_NOT_NBCD</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a0c2207d05c9c427601dfbff4f8ec1056">MICROPC_NEGX_CLR_NEG_NOT_NBCD</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00324">324</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00325">325</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a54e7164c6c76b71ecb76a41df5b05f79">MICROPC_NOP</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#affae2e45ac62f4532ecadc8a956b5898">MICROPC_NOP</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00357">357</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00358">358</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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3532,7 → 3548,7
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00383">383</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00384">384</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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3547,7 → 3563,7
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00369">369</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00370">370</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00355">355</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00356">356</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00381">381</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00382">382</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00374">374</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00375">375</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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3607,7 → 3623,7
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00332">332</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00333">333</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00365">365</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00366">366</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00334">334</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00335">335</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00387">387</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00388">388</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<a class="anchor" id="a42a277bcfd7ef54779fed4a28847581c"></a><!-- doxytag: member="ao68000.v::MICROPC_RESET" ref="a42a277bcfd7ef54779fed4a28847581c" args="9'd485" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a42a277bcfd7ef54779fed4a28847581c">MICROPC_RESET</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#af6f48113546424c28a06371c74e90b77">MICROPC_RESET</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00333">333</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00334">334</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a8e01300271dc2002fc972bde66808baa">MICROPC_RTE_RTR</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a311c62af7d1b002fede956d82b0885ef">MICROPC_RTE_RTR</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00359">359</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00360">360</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a67ea2dfdd15cd8e2863c78cc0a05095d">MICROPC_RTS</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#ad47b43ccb423bafa3b41657bd8ecd243">MICROPC_RTS</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00325">325</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00326">326</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00391">391</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00392">392</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00370">370</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00371">371</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#aecb6a98c1c371a8139043c62665381e1">MICROPC_Scc</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a0ad364bd16b2cee0f573cf3e48eee882">MICROPC_Scc</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00367">367</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00368">368</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#af2f78dd082b87ed1f681dcfd552aa1e5">MICROPC_STOP</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a68b5c92866588f128e8354134e0ae333">MICROPC_STOP</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00386">386</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00387">387</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<a class="anchor" id="a7f4d9cc4a2edb8c62ae8eeea069353d4"></a><!-- doxytag: member="ao68000.v::MICROPC_SWAP_EXT" ref="a7f4d9cc4a2edb8c62ae8eeea069353d4" args="9'd341" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a1d7f386ed0662150d0f6f30b9127da0f">MICROPC_SWAP_EXT</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a7f4d9cc4a2edb8c62ae8eeea069353d4">MICROPC_SWAP_EXT</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00385">385</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00386">386</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<a class="anchor" id="a3c9098364cbecd36a9fa7a749abc8b89"></a><!-- doxytag: member="ao68000.v::MICROPC_TAS" ref="a3c9098364cbecd36a9fa7a749abc8b89" args="9'd333" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#ac178cc762c349f3c500fb01ccf59abe9">MICROPC_TAS</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a3c9098364cbecd36a9fa7a749abc8b89">MICROPC_TAS</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00320">320</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00321">321</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<a class="anchor" id="a4209e30a2663bb31d78068718659884d"></a><!-- doxytag: member="ao68000.v::MICROPC_TRAP" ref="a4209e30a2663bb31d78068718659884d" args="9'd481" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#adf4b73792af505dd78bc1b3dac6d2b85">MICROPC_TRAP</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a4209e30a2663bb31d78068718659884d">MICROPC_TRAP</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00360">360</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00361">361</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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3817,52 → 3833,52
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00331">331</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00332">332</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<a class="anchor" id="ad53e728ddf2ae9cbb7c3108aee81b05d"></a><!-- doxytag: member="ao68000.v::MICROPC_TRAPV" ref="ad53e728ddf2ae9cbb7c3108aee81b05d" args="9'd483" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#afd036d9ad787d0f27973473c948ac4de">MICROPC_TRAPV</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#ad53e728ddf2ae9cbb7c3108aee81b05d">MICROPC_TRAPV</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00377">377</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00378">378</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<a class="anchor" id="ab46b1e2da931ae1233bc16abe16b8887"></a><!-- doxytag: member="ao68000.v::MICROPC_TST" ref="ab46b1e2da931ae1233bc16abe16b8887" args="9'd345" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a9363a6d109adcf7d456074edf17dddca">MICROPC_TST</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#ab46b1e2da931ae1233bc16abe16b8887">MICROPC_TST</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00337">337</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00338">338</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#a56cb4246d3da79cb059495cd6ffea506">MICROPC_ULNK</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
<td class="memname"><span class="stringliteral"><a class="el" href="ao68000_8v.html#aa5e8068e7d23c23aabbca8935458e3c2">MICROPC_ULNK</a></span> <b><span class="vhdlchar"> </span></b><code> [Define]</code></td>
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00351">351</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00262">262</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00263">263</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00263">263</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00264">264</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00264">264</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00265">265</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00266">266</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00272">272</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00273">273</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00276">276</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00277">277</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00261">261</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00262">262</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00274">274</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00275">275</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00270">270</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00271">271</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00273">273</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00274">274</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00271">271</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00272">272</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00266">266</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00267">267</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00267">267</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00268">268</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00268">268</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00269">269</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00269">269</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00270">270</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/functions_0x6e.html
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</li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/group__reset__o.html
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</table>
<p>External device reset. Output high when processing the RESET instruction. </p>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/group__SEL__O.html
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</table>
<p>WISHBONE Master Byte Select </p>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
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: <a class="el" href="ao68000_8v.html#ab421ad02e89cca481d403101a57cef57">ao68000.v</a>
</li>
<li>ALU_ABCD_SBCD_ADDX_SUBX
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: <a class="el" href="ao68000_8v.html#ac2232882ac07e5f6ed49d8523a342e3d">ao68000.v</a>
</li>
<li>ALU_ABCD_SBCD_ADDX_SUBX_prepare
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</li>
<li>ALU_ADDA_SUBA_CMPA_ADDQ_SUBQ
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: <a class="el" href="ao68000_8v.html#ab29cd7ca32420baad72d75d0677ec031">ao68000.v</a>
</li>
<li>ALU_ARITHMETIC_LOGIC
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<li>ALU_ASL_LSL_ROL_ROXL_ASR_LSR_ROR_ROXR
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: <a class="el" href="ao68000_8v.html#ad999ca341f5ef5f492a551d865c78344">ao68000.v</a>
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<li>ALU_ASL_LSL_ROL_ROXL_ASR_LSR_ROR_ROXR_prepare
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<li>ALU_CHK
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<li>ALU_IDLE
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<li>ALU_LINK_MOVE
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<li>ALU_MOVE
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<li>ALU_MOVE_TO_CCR_SR_RTE_RTR_STOP_LOGIC_TO_CCR_SR
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<li>ALU_MOVEP_M2R_1
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: <a class="el" href="ao68000_8v.html#ab602f685f46b237439ecf15880fcf47e">ao68000.v</a>
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<li>ALU_MULS_MULU_DIVS_DIVU
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<li>ALU_NEGX_CLR_NEG_NOT_NBCD_SWAP_EXT
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<li>ALU_SIGN_EXTEND
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<li>ALU_SIMPLE_LONG_ADD
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: <a class="el" href="ao68000_8v.html#a93bd99e57b180798d7c859c1fdca1184">ao68000.v</a>
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<li>ALU_SIMPLE_LONG_SUB
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: <a class="el" href="ao68000_8v.html#a732ebeb4c58fb9cc285e1061b517b373">ao68000.v</a>
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<li>ALU_SIMPLE_MOVE
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: <a class="el" href="ao68000_8v.html#ab290c8d7d590ed6bbb564ef941d0ec88">ao68000.v</a>
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</li>
<li>ALU_TAS
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<li>AN_ADDRESS_FROM_EXTENDED
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</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:04 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/page_verification.html
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<li>Java runtime (<a href="http://java.sun.com">http://java.sun.com</a>) is required to run the <code>ao68000_tool</code> (<a class="el" href="page_tool.html">ao68000_tool documentation</a>). </li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/group__fc__o.html
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<li>7 - cpu space: interrupt acknowledge. </li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/functions_vars_0x73.html
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</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/classregisters-members.html
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<tr class="memlist"><td><a class="el" href="classregisters.html#ae6143c84411ad159cbe1662f3909e726">ALWAYS_8</a>clock, reset_n</td><td><a class="el" href="classregisters.html">registers</a></td><td><code> [Always Construct]</code></td></tr>
<tr class="memlist"><td><a class="el" href="classregisters.html#ae04888e60d745f9f64ca5c52d0969adb">ALWAYS_9</a>clock, reset_n</td><td><a class="el" href="classregisters.html">registers</a></td><td><code> [Always Construct]</code></td></tr>
</table></div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:04 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
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</li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:04 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
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<p>Definition in file <a class="el" href="documentation_8v_source.html">documentation.v</a>.</p>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
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<td>1.2 </td><td>15.01.2011 </td><td>Aleksander Osman, Frederic Requin</td><td>Core area optimization: biggest gain in ALU multiplication and division reimplementation. </td></tr>
</table>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/page_mc68000.html
1149,7 → 1149,7
// required by: ANDI,EORI,ORI,ANDI to CCR,EORI to CCR,ORI to CCR,ANDI to SR,EORI to SR,ORI to SR,ADDI,SUBI
 
</pre></div> </div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
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/trunk/doc/doxygen/html/functions_vars_0x69.html
96,7 → 96,7
</li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/group__CLK__I.html
27,7 → 27,7
</table>
<p>WISHBONE Clock Input </p>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
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/trunk/doc/doxygen/html/functions_0x67.html
68,7 → 68,7
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</ul>
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<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
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/trunk/doc/doxygen/html/classmicrocode__branch-members.html
67,7 → 67,7
<tr class="memlist"><td><a class="el" href="classmicrocode__branch.html#a4e2c393980b78c66fbb22710e14a1cbb">ALWAYS_33</a>clock, reset_n</td><td><a class="el" href="classmicrocode__branch.html">microcode_branch</a></td><td><code> [Always Construct]</code></td></tr>
<tr class="memlist"><td><a class="el" href="classmicrocode__branch.html#afc14f80b07779a484e706d164560971e">ALWAYS_34</a>clock, reset_n</td><td><a class="el" href="classmicrocode__branch.html">microcode_branch</a></td><td><code> [Always Construct]</code></td></tr>
</table></div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:04 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/files.html
34,7 → 34,7
<tr><td class="indexkey"><a class="el" href="documentation_8v.html">documentation.v</a> <a href="documentation_8v_source.html">[code]</a></td><td class="indexvalue">Ao68000 Doxygen documentation </td></tr>
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<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
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<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
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/trunk/doc/doxygen/html/globals_defs_0x70.html
123,7 → 123,7
</li>
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<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
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<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
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/trunk/doc/doxygen/html/functions_vars.html
123,7 → 123,7
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<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
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<a href="http://www.doxygen.org/index.html">
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/trunk/doc/doxygen/html/functions_vars_0x6d.html
105,7 → 105,7
</li>
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<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
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<a href="http://www.doxygen.org/index.html">
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/trunk/doc/doxygen/html/globals_0x64.html
117,7 → 117,7
</li>
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<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
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</body>
/trunk/doc/doxygen/html/classalu.html
105,7 → 105,7
<p>The alu module is responsible for performing all of the arithmetic and logic operations of the <a class="el" href="classao68000.html" title="ao68000 top level module.">ao68000</a> processor. It operates on two 32-bit registers: operand1 and operand2 from the registers module. The output is saved into a result 32-bit register. This register is located in the alu module.</p>
<p>The alu module also contains the status register (SR) with the condition code register. The microcode decides what operation the alu performs. </p>
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02625">2625</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02626">2626</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<hr/><h2>Member Function Documentation</h2>
<a class="anchor" id="a04b10dc82e8a06c3856bfd16a7e18d06"></a><!-- doxytag: member="alu::ALWAYS_31" ref="a04b10dc82e8a06c3856bfd16a7e18d06" args="clock, reset_n" -->
<div class="memitem">
126,52 → 126,52
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02687">2687</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02688">2688</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<div class="fragment"><pre class="fragment">
<a name="l02687"></a>02687 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classalu.html#a322325f3e53ea8e7d70fbdc7f5d1b30b">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classalu.html#a2f01d99d4de620b6ce6c7c0a150a5fab">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l02688"></a>02688 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a2f01d99d4de620b6ce6c7c0a150a5fab">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>
<a name="l02689"></a>02689 <a class="code" href="classalu.html#a3a2dd2d9816dba2aebe4a5cf5eeed521">div_count</a> &lt;= <span class="vhdllogic">5&#39;d0</span>;
<a name="l02690"></a>02690 <span class="vhdlkeyword">end</span>
<a name="l02691"></a>02691 <span class="keyword">// Cycle #0 : load the registers</span>
<a name="l02692"></a>02692 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#abd96864c4534e2905f0ac629d1bcfce1">alu_control</a> == <a class="code" href="ao68000_8v.html#aed07d190bb88f0cce7768028698020f9">`ALU_MULS_MULU_DIVS_DIVU</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1000</span> &amp;&amp; <a class="code" href="classalu.html#a3a2dd2d9816dba2aebe4a5cf5eeed521">div_count</a> == <span class="vhdllogic">5&#39;d0</span>) <span class="vhdlkeyword">begin</span>
<a name="l02693"></a>02693 <span class="keyword">// 17 cycles to finish + wait state</span>
<a name="l02694"></a>02694 <a class="code" href="classalu.html#a3a2dd2d9816dba2aebe4a5cf5eeed521">div_count</a> &lt;= <span class="vhdllogic">5&#39;d18</span>;
<a name="l02695"></a>02695 <span class="keyword">// Clear the quotient</span>
<a name="l02696"></a>02696 <a class="code" href="classalu.html#ac5f88cdff8f17d02e28927335c6f141d">quotient</a> &lt;= <span class="vhdllogic">17&#39;d0</span>;
<a name="l02697"></a>02697
<a name="l02698"></a>02698 <span class="keyword">// Unsigned divide or positive numerator</span>
<a name="l02699"></a>02699 <span class="vhdlkeyword">if</span> ((!<a class="code" href="classalu.html#a25ae8f83a524b562fb57cd0af6dee164">mult_div_sign</a>) || (!<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>])) <a class="code" href="classalu.html#a108916b9974c024932e1e9874589c4ba">dividend</a> &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>;
<a name="l02700"></a>02700 <span class="keyword">// Negative numerator</span>
<a name="l02701"></a>02701 <span class="vhdlkeyword">else</span> <a class="code" href="classalu.html#a108916b9974c024932e1e9874589c4ba">dividend</a> &lt;= -<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>;
<a name="l02702"></a>02702
<a name="l02703"></a>02703 <span class="keyword">// Unsigned divide or positive denominator</span>
<a name="l02704"></a>02704 <span class="vhdlkeyword">if</span> ((!<a class="code" href="classalu.html#a25ae8f83a524b562fb57cd0af6dee164">mult_div_sign</a>) || (!<a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">15</span>])) <a class="code" href="classalu.html#ab4e5d750cf0d96eb715606c6166945cb">divider</a> &lt;= {<a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>],<span class="vhdllogic">16&#39;d0</span>};
<a name="l02705"></a>02705 <span class="keyword">// Negative denominator</span>
<a name="l02706"></a>02706 <span class="vhdlkeyword">else</span> <a class="code" href="classalu.html#ab4e5d750cf0d96eb715606c6166945cb">divider</a> &lt;= {-<a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>],<span class="vhdllogic">16&#39;d0</span>};
<a name="l02707"></a>02707 <span class="vhdlkeyword">end</span>
<a name="l02708"></a>02708 <span class="keyword">// Cycles #1-17 : division calculation</span>
<a name="l02709"></a>02709 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a3a2dd2d9816dba2aebe4a5cf5eeed521">div_count</a> &gt; <span class="vhdllogic">5&#39;d1</span>) <span class="vhdlkeyword">begin</span>
<a name="l02710"></a>02710 <span class="keyword">// Check difference&#39;s sign</span>
<a name="l02711"></a>02711 <span class="vhdlkeyword">if</span> (!<a class="code" href="classalu.html#a2fc8379eb8a0ee027596e29d34c0fbc7">div_diff</a>[<span class="vhdllogic">32</span>]) <span class="vhdlkeyword">begin</span>
<a name="l02712"></a>02712 <span class="keyword">// Difference is positive : shift a one</span>
<a name="l02713"></a>02713 <a class="code" href="classalu.html#a108916b9974c024932e1e9874589c4ba">dividend</a> &lt;= <a class="code" href="classalu.html#a2fc8379eb8a0ee027596e29d34c0fbc7">div_diff</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l02714"></a>02714 <a class="code" href="classalu.html#ac5f88cdff8f17d02e28927335c6f141d">quotient</a> &lt;= {<a class="code" href="classalu.html#ac5f88cdff8f17d02e28927335c6f141d">quotient</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">1&#39;b1</span>};
<a name="l02715"></a>02715 <span class="vhdlkeyword">end</span>
<a name="l02716"></a>02716 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l02717"></a>02717 <span class="keyword">// Difference is negative : shift a zero</span>
<a name="l02718"></a>02718 <a class="code" href="classalu.html#ac5f88cdff8f17d02e28927335c6f141d">quotient</a> &lt;= {<a class="code" href="classalu.html#ac5f88cdff8f17d02e28927335c6f141d">quotient</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">1&#39;b0</span>};
<a name="l02719"></a>02719 <span class="vhdlkeyword">end</span>
<a name="l02720"></a>02720 <span class="keyword">// Shift right divider</span>
<a name="l02721"></a>02721 <a class="code" href="classalu.html#ab4e5d750cf0d96eb715606c6166945cb">divider</a> &lt;= {<span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#ab4e5d750cf0d96eb715606c6166945cb">divider</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">1</span>]};
<a name="l02722"></a>02722 <span class="keyword">// Count one bit</span>
<a name="l02723"></a>02723 <a class="code" href="classalu.html#a3a2dd2d9816dba2aebe4a5cf5eeed521">div_count</a> &lt;= <a class="code" href="classalu.html#a3a2dd2d9816dba2aebe4a5cf5eeed521">div_count</a> - <span class="vhdllogic">5&#39;d1</span>;
<a name="l02724"></a>02724 <span class="vhdlkeyword">end</span>
<a name="l02725"></a>02725 <span class="keyword">// result read</span>
<a name="l02726"></a>02726 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#abd96864c4534e2905f0ac629d1bcfce1">alu_control</a> == <a class="code" href="ao68000_8v.html#aed07d190bb88f0cce7768028698020f9">`ALU_MULS_MULU_DIVS_DIVU</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1000</span> &amp;&amp; <a class="code" href="classalu.html#a3a2dd2d9816dba2aebe4a5cf5eeed521">div_count</a> == <span class="vhdllogic">5&#39;d1</span>) <span class="vhdlkeyword">begin</span>
<a name="l02727"></a>02727 <span class="keyword">// goto idle</span>
<a name="l02728"></a>02728 <a class="code" href="classalu.html#a3a2dd2d9816dba2aebe4a5cf5eeed521">div_count</a> &lt;= <a class="code" href="classalu.html#a3a2dd2d9816dba2aebe4a5cf5eeed521">div_count</a> - <span class="vhdllogic">5&#39;d1</span>;
<a name="l02729"></a>02729 <span class="vhdlkeyword">end</span>
<a name="l02730"></a>02730 <span class="vhdlkeyword">end</span>
<a name="l02688"></a>02688 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classalu.html#a322325f3e53ea8e7d70fbdc7f5d1b30b">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classalu.html#a2f01d99d4de620b6ce6c7c0a150a5fab">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l02689"></a>02689 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a2f01d99d4de620b6ce6c7c0a150a5fab">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>
<a name="l02690"></a>02690 <a class="code" href="classalu.html#a3a2dd2d9816dba2aebe4a5cf5eeed521">div_count</a> &lt;= <span class="vhdllogic">5&#39;d0</span>;
<a name="l02691"></a>02691 <span class="vhdlkeyword">end</span>
<a name="l02692"></a>02692 <span class="keyword">// Cycle #0 : load the registers</span>
<a name="l02693"></a>02693 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#abd96864c4534e2905f0ac629d1bcfce1">alu_control</a> == <a class="code" href="ao68000_8v.html#aed07d190bb88f0cce7768028698020f9">`ALU_MULS_MULU_DIVS_DIVU</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1000</span> &amp;&amp; <a class="code" href="classalu.html#a3a2dd2d9816dba2aebe4a5cf5eeed521">div_count</a> == <span class="vhdllogic">5&#39;d0</span>) <span class="vhdlkeyword">begin</span>
<a name="l02694"></a>02694 <span class="keyword">// 17 cycles to finish + wait state</span>
<a name="l02695"></a>02695 <a class="code" href="classalu.html#a3a2dd2d9816dba2aebe4a5cf5eeed521">div_count</a> &lt;= <span class="vhdllogic">5&#39;d18</span>;
<a name="l02696"></a>02696 <span class="keyword">// Clear the quotient</span>
<a name="l02697"></a>02697 <a class="code" href="classalu.html#ac5f88cdff8f17d02e28927335c6f141d">quotient</a> &lt;= <span class="vhdllogic">17&#39;d0</span>;
<a name="l02698"></a>02698
<a name="l02699"></a>02699 <span class="keyword">// Unsigned divide or positive numerator</span>
<a name="l02700"></a>02700 <span class="vhdlkeyword">if</span> ((!<a class="code" href="classalu.html#a25ae8f83a524b562fb57cd0af6dee164">mult_div_sign</a>) || (!<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>])) <a class="code" href="classalu.html#a108916b9974c024932e1e9874589c4ba">dividend</a> &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>;
<a name="l02701"></a>02701 <span class="keyword">// Negative numerator</span>
<a name="l02702"></a>02702 <span class="vhdlkeyword">else</span> <a class="code" href="classalu.html#a108916b9974c024932e1e9874589c4ba">dividend</a> &lt;= -<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>;
<a name="l02703"></a>02703
<a name="l02704"></a>02704 <span class="keyword">// Unsigned divide or positive denominator</span>
<a name="l02705"></a>02705 <span class="vhdlkeyword">if</span> ((!<a class="code" href="classalu.html#a25ae8f83a524b562fb57cd0af6dee164">mult_div_sign</a>) || (!<a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">15</span>])) <a class="code" href="classalu.html#ab4e5d750cf0d96eb715606c6166945cb">divider</a> &lt;= {<a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>],<span class="vhdllogic">16&#39;d0</span>};
<a name="l02706"></a>02706 <span class="keyword">// Negative denominator</span>
<a name="l02707"></a>02707 <span class="vhdlkeyword">else</span> <a class="code" href="classalu.html#ab4e5d750cf0d96eb715606c6166945cb">divider</a> &lt;= {-<a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>],<span class="vhdllogic">16&#39;d0</span>};
<a name="l02708"></a>02708 <span class="vhdlkeyword">end</span>
<a name="l02709"></a>02709 <span class="keyword">// Cycles #1-17 : division calculation</span>
<a name="l02710"></a>02710 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a3a2dd2d9816dba2aebe4a5cf5eeed521">div_count</a> &gt; <span class="vhdllogic">5&#39;d1</span>) <span class="vhdlkeyword">begin</span>
<a name="l02711"></a>02711 <span class="keyword">// Check difference&#39;s sign</span>
<a name="l02712"></a>02712 <span class="vhdlkeyword">if</span> (!<a class="code" href="classalu.html#a2fc8379eb8a0ee027596e29d34c0fbc7">div_diff</a>[<span class="vhdllogic">32</span>]) <span class="vhdlkeyword">begin</span>
<a name="l02713"></a>02713 <span class="keyword">// Difference is positive : shift a one</span>
<a name="l02714"></a>02714 <a class="code" href="classalu.html#a108916b9974c024932e1e9874589c4ba">dividend</a> &lt;= <a class="code" href="classalu.html#a2fc8379eb8a0ee027596e29d34c0fbc7">div_diff</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l02715"></a>02715 <a class="code" href="classalu.html#ac5f88cdff8f17d02e28927335c6f141d">quotient</a> &lt;= {<a class="code" href="classalu.html#ac5f88cdff8f17d02e28927335c6f141d">quotient</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">1&#39;b1</span>};
<a name="l02716"></a>02716 <span class="vhdlkeyword">end</span>
<a name="l02717"></a>02717 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l02718"></a>02718 <span class="keyword">// Difference is negative : shift a zero</span>
<a name="l02719"></a>02719 <a class="code" href="classalu.html#ac5f88cdff8f17d02e28927335c6f141d">quotient</a> &lt;= {<a class="code" href="classalu.html#ac5f88cdff8f17d02e28927335c6f141d">quotient</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">1&#39;b0</span>};
<a name="l02720"></a>02720 <span class="vhdlkeyword">end</span>
<a name="l02721"></a>02721 <span class="keyword">// Shift right divider</span>
<a name="l02722"></a>02722 <a class="code" href="classalu.html#ab4e5d750cf0d96eb715606c6166945cb">divider</a> &lt;= {<span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#ab4e5d750cf0d96eb715606c6166945cb">divider</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">1</span>]};
<a name="l02723"></a>02723 <span class="keyword">// Count one bit</span>
<a name="l02724"></a>02724 <a class="code" href="classalu.html#a3a2dd2d9816dba2aebe4a5cf5eeed521">div_count</a> &lt;= <a class="code" href="classalu.html#a3a2dd2d9816dba2aebe4a5cf5eeed521">div_count</a> - <span class="vhdllogic">5&#39;d1</span>;
<a name="l02725"></a>02725 <span class="vhdlkeyword">end</span>
<a name="l02726"></a>02726 <span class="keyword">// result read</span>
<a name="l02727"></a>02727 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#abd96864c4534e2905f0ac629d1bcfce1">alu_control</a> == <a class="code" href="ao68000_8v.html#aed07d190bb88f0cce7768028698020f9">`ALU_MULS_MULU_DIVS_DIVU</a><span class="vhdlchar"></span> &amp;&amp; <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1000</span> &amp;&amp; <a class="code" href="classalu.html#a3a2dd2d9816dba2aebe4a5cf5eeed521">div_count</a> == <span class="vhdllogic">5&#39;d1</span>) <span class="vhdlkeyword">begin</span>
<a name="l02728"></a>02728 <span class="keyword">// goto idle</span>
<a name="l02729"></a>02729 <a class="code" href="classalu.html#a3a2dd2d9816dba2aebe4a5cf5eeed521">div_count</a> &lt;= <a class="code" href="classalu.html#a3a2dd2d9816dba2aebe4a5cf5eeed521">div_count</a> - <span class="vhdllogic">5&#39;d1</span>;
<a name="l02730"></a>02730 <span class="vhdlkeyword">end</span>
<a name="l02731"></a>02731 <span class="vhdlkeyword">end</span>
</pre></div>
</div>
</div>
194,554 → 194,562
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02773">2773</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02774">2774</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<div class="fragment"><pre class="fragment">
<a name="l02773"></a>02773 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classalu.html#a322325f3e53ea8e7d70fbdc7f5d1b30b">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classalu.html#a2f01d99d4de620b6ce6c7c0a150a5fab">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l02774"></a>02774 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a2f01d99d4de620b6ce6c7c0a150a5fab">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>
<a name="l02775"></a>02775 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a> &lt;= { <span class="vhdllogic">1&#39;b0</span>, <span class="vhdllogic">1&#39;b0</span>, <span class="vhdllogic">1&#39;b1</span>, <span class="vhdllogic">2&#39;b0</span>, <span class="vhdllogic">3&#39;b111</span>, <span class="vhdllogic">8&#39;b0</span> };
<a name="l02776"></a>02776 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> &lt;= <span class="vhdllogic">32&#39;d0</span>;
<a name="l02777"></a>02777 <a class="code" href="classalu.html#ad39d03bb22df22560c4f5dc796382313">alu_signal</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02778"></a>02778 <a class="code" href="classalu.html#a71bbcd2b437cc138ec4e56a2fb248d7e">interrupt_mask_copy</a> &lt;= <span class="vhdllogic">3&#39;b0</span>;
<a name="l02779"></a>02779 <a class="code" href="classalu.html#acd1a91ac2175444844ece34147d7baa4">was_interrupt</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02780"></a>02780 <span class="vhdlkeyword">end</span>
<a name="l02781"></a>02781 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l02782"></a>02782 <span class="vhdlkeyword">case</span>(<a class="code" href="classalu.html#abd96864c4534e2905f0ac629d1bcfce1">alu_control</a>)
<a name="l02783"></a>02783 <a class="code" href="ao68000_8v.html#a687e6310453b4cedb64aa6e66b058c18">`ALU_SR_SET_INTERRUPT</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02784"></a>02784 <a class="code" href="classalu.html#a71bbcd2b437cc138ec4e56a2fb248d7e">interrupt_mask_copy</a> &lt;= <a class="code" href="classalu.html#ab8bac09f28bae473ebf96e3c2c7e2806">interrupt_mask</a>[<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>];
<a name="l02785"></a>02785 <a class="code" href="classalu.html#acd1a91ac2175444844ece34147d7baa4">was_interrupt</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l02786"></a>02786 <span class="vhdlkeyword">end</span>
<a name="l02787"></a>02787
<a name="l02788"></a>02788 <a class="code" href="ao68000_8v.html#ac9fc44b8d3bbcd6c742f1ba074fc668d">`ALU_SR_SET_TRAP</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02789"></a>02789 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#acd1a91ac2175444844ece34147d7baa4">was_interrupt</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l02790"></a>02790 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a> &lt;= { <span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">14</span>], <span class="vhdllogic">1&#39;b1</span>, <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">12</span>:<span class="vhdllogic">11</span>], <a class="code" href="classalu.html#a71bbcd2b437cc138ec4e56a2fb248d7e">interrupt_mask_copy</a>[<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>], <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] };
<a name="l02791"></a>02791 <span class="vhdlkeyword">end</span>
<a name="l02792"></a>02792 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l02793"></a>02793 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a> &lt;= { <span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">14</span>], <span class="vhdllogic">1&#39;b1</span>, <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">12</span>:<span class="vhdllogic">0</span>] };
<a name="l02794"></a>02794 <span class="vhdlkeyword">end</span>
<a name="l02795"></a>02795 <a class="code" href="classalu.html#acd1a91ac2175444844ece34147d7baa4">was_interrupt</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02796"></a>02796 <span class="vhdlkeyword">end</span>
<a name="l02797"></a>02797
<a name="l02798"></a>02798 <a class="code" href="ao68000_8v.html#a59147ff996e0ba496f1f06d7a06decae">`ALU_MOVEP_M2R_1</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02799"></a>02799 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1&#39;b1</span>) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">24</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];
<a name="l02800"></a>02800 <span class="vhdlkeyword">else</span> <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];
<a name="l02801"></a>02801 <span class="keyword">//CCR: no change</span>
<a name="l02802"></a>02802 <span class="vhdlkeyword">end</span>
<a name="l02803"></a>02803 <a class="code" href="ao68000_8v.html#a3b1155f3496b0fc984e5418e09586bf5">`ALU_MOVEP_M2R_2</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02804"></a>02804 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1&#39;b1</span>) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">23</span>:<span class="vhdllogic">16</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];
<a name="l02805"></a>02805 <span class="vhdlkeyword">else</span> <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];
<a name="l02806"></a>02806 <span class="keyword">//CCR: no change</span>
<a name="l02807"></a>02807 <span class="vhdlkeyword">end</span>
<a name="l02808"></a>02808 <a class="code" href="ao68000_8v.html#a5458c8548afc8f7517bdc582c9946b2f">`ALU_MOVEP_M2R_3</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02809"></a>02809 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1&#39;b1</span>) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];
<a name="l02810"></a>02810 <span class="keyword">//CCR: no change</span>
<a name="l02811"></a>02811 <span class="vhdlkeyword">end</span>
<a name="l02812"></a>02812 <a class="code" href="ao68000_8v.html#a8ec0074ca9c5cfec15aa93b92353e09b">`ALU_MOVEP_M2R_4</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02813"></a>02813 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1&#39;b1</span>) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];
<a name="l02814"></a>02814 <span class="keyword">//CCR: no change</span>
<a name="l02815"></a>02815 <span class="vhdlkeyword">end</span>
<a name="l02816"></a>02816
<a name="l02817"></a>02817
<a name="l02818"></a>02818 <a class="code" href="ao68000_8v.html#aab7548aba43c6c12259a2a154ce2982b">`ALU_MOVEP_R2M_1</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02819"></a>02819 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1&#39;b1</span>) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">24</span>];
<a name="l02820"></a>02820 <span class="vhdlkeyword">else</span> <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>];
<a name="l02821"></a>02821 <span class="keyword">// CCR: no change</span>
<a name="l02822"></a>02822 <span class="vhdlkeyword">end</span>
<a name="l02823"></a>02823 <a class="code" href="ao68000_8v.html#a9918f4663f481092da549f3cb008721d">`ALU_MOVEP_R2M_2</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02824"></a>02824 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1&#39;b1</span>) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">23</span>:<span class="vhdllogic">16</span>];
<a name="l02825"></a>02825 <span class="vhdlkeyword">else</span> <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];
<a name="l02826"></a>02826 <span class="keyword">// CCR: no change</span>
<a name="l02827"></a>02827 <span class="vhdlkeyword">end</span>
<a name="l02828"></a>02828 <a class="code" href="ao68000_8v.html#aee5fc91f58c97ffa4d252e127c9e4226">`ALU_MOVEP_R2M_3</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02829"></a>02829 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>];
<a name="l02830"></a>02830 <span class="keyword">// CCR: no change</span>
<a name="l02831"></a>02831 <span class="vhdlkeyword">end</span>
<a name="l02832"></a>02832 <a class="code" href="ao68000_8v.html#a0bc85184fda7b9fcbf00afa29be91d42">`ALU_MOVEP_R2M_4</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02833"></a>02833 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];
<a name="l02834"></a>02834 <span class="keyword">// CCR: no change</span>
<a name="l02835"></a>02835 <span class="vhdlkeyword">end</span>
<a name="l02836"></a>02836
<a name="l02837"></a>02837 <a class="code" href="ao68000_8v.html#a6a119b7268e4e0a78e0307ba0c693ccb">`ALU_SIGN_EXTEND</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02838"></a>02838 <span class="keyword">// move operand1 with sign-extension to result</span>
<a name="l02839"></a>02839 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a46ed8f8b6e397f2f7a0998fe482d4f37">size</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l02840"></a>02840 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> &lt;= { {<span class="vhdllogic">16</span>{<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">15</span>]}}, <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] };
<a name="l02841"></a>02841 <span class="vhdlkeyword">end</span>
<a name="l02842"></a>02842 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l02843"></a>02843 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>;
<a name="l02844"></a>02844 <span class="vhdlkeyword">end</span>
<a name="l02845"></a>02845 <span class="keyword">// CCR: no change</span>
<a name="l02846"></a>02846 <span class="vhdlkeyword">end</span>
<a name="l02847"></a>02847
<a name="l02848"></a>02848 <a class="code" href="ao68000_8v.html#ae497ab0b3e0550245c333bdb426d4236">`ALU_ARITHMETIC_LOGIC</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02849"></a>02849
<a name="l02850"></a>02850 <span class="keyword">// OR,OR to mem,OR to Dn</span>
<a name="l02851"></a>02851 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">0</span>]) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] | <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l02852"></a>02852 <span class="keyword">// AND,AND to mem,AND to Dn</span>
<a name="l02853"></a>02853 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">1</span>]) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] &amp; <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l02854"></a>02854 <span class="keyword">// EORI,EOR</span>
<a name="l02855"></a>02855 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">2</span>]) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] ^ <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l02856"></a>02856 <span class="keyword">// ADD,ADD to mem,ADD to Dn,ADDQ</span>
<a name="l02857"></a>02857 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">3</span>]) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] + <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l02858"></a>02858 <span class="keyword">// SUBI,CMPI,CMPM,SUB to mem,SUB to Dn,CMP,SUBQ</span>
<a name="l02859"></a>02859 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">4</span>] | <a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">5</span>]) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l02860"></a>02860
<a name="l02861"></a>02861 <span class="keyword">// Z</span>
<a name="l02862"></a>02862 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;
<a name="l02863"></a>02863 <span class="keyword">// N</span>
<a name="l02864"></a>02864 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l02865"></a>02865
<a name="l02866"></a>02866 <span class="keyword">// CMPI,CMPM,CMP</span>
<a name="l02867"></a>02867 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">5</span>]) <span class="vhdlkeyword">begin</span>
<a name="l02868"></a>02868 <span class="keyword">// C,V</span>
<a name="l02869"></a>02869 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
<a name="l02870"></a>02870 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= (~<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
<a name="l02871"></a>02871 <span class="keyword">// X not affected</span>
<a name="l02872"></a>02872 <span class="vhdlkeyword">end</span>
<a name="l02873"></a>02873 <span class="keyword">// ADDI,ADD to mem,ADD to Dn,ADDQ</span>
<a name="l02874"></a>02874 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">3</span>]) <span class="vhdlkeyword">begin</span>
<a name="l02875"></a>02875 <span class="keyword">// C,X,V</span>
<a name="l02876"></a>02876 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
<a name="l02877"></a>02877 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>); <span class="keyword">//=ccr[0];</span>
<a name="l02878"></a>02878 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>) | (~<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
<a name="l02879"></a>02879 <span class="vhdlkeyword">end</span>
<a name="l02880"></a>02880 <span class="keyword">// SUBI,SUB to mem,SUB to Dn,SUBQ</span>
<a name="l02881"></a>02881 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">4</span>]) <span class="vhdlkeyword">begin</span>
<a name="l02882"></a>02882 <span class="keyword">// C,X,V</span>
<a name="l02883"></a>02883 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
<a name="l02884"></a>02884 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>); <span class="keyword">//=ccr[0];</span>
<a name="l02885"></a>02885 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= (~<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
<a name="l02886"></a>02886 <span class="vhdlkeyword">end</span>
<a name="l02887"></a>02887 <span class="keyword">// ANDI,EORI,ORI,EOR,OR to mem,AND to mem,OR to Dn,AND to Dn</span>
<a name="l02888"></a>02888 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l02889"></a>02889 <span class="keyword">// C,V</span>
<a name="l02890"></a>02890 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02891"></a>02891 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02892"></a>02892 <span class="keyword">// X not affected</span>
<a name="l02893"></a>02893 <span class="vhdlkeyword">end</span>
<a name="l02894"></a>02894 <span class="vhdlkeyword">end</span>
<a name="l02895"></a>02895
<a name="l02896"></a>02896 <a class="code" href="ao68000_8v.html#a3e54001e73374bd4f7cfda3de55bd944">`ALU_ABCD_SBCD_ADDX_SUBX</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span> <span class="keyword">// 259 LE</span>
<a name="l02897"></a>02897 <span class="keyword">// ABCD</span>
<a name="l02898"></a>02898 <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">14</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">3&#39;b100</span> ) <span class="vhdlkeyword">begin</span>
<a name="l02899"></a>02899 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] = {<span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>]} + {<span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>]} + {<span class="vhdllogic">4&#39;b0</span>, <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>]};
<a name="l02900"></a>02900 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] = {<span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>]} + {<span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>]};
<a name="l02901"></a>02901
<a name="l02902"></a>02902 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">23</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] + <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] + {<span class="vhdllogic">7&#39;b0</span>, <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>]};
<a name="l02903"></a>02903
<a name="l02904"></a>02904 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] = (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] &gt; <span class="vhdllogic">6&#39;d9</span>) ? (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] + <span class="vhdllogic">6&#39;d6</span>) : <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>];
<a name="l02905"></a>02905 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] = (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] &gt; <span class="vhdllogic">6&#39;h1F</span>) ? (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] + <span class="vhdllogic">6&#39;d2</span>) :
<a name="l02906"></a>02906 (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] &gt; <span class="vhdllogic">6&#39;h0F</span>) ? (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] + <span class="vhdllogic">6&#39;d1</span>) :
<a name="l02907"></a>02907 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>];
<a name="l02908"></a>02908 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] = (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] &gt; <span class="vhdllogic">6&#39;d9</span>) ? (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] + <span class="vhdllogic">6&#39;d6</span>) : <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>];
<a name="l02909"></a>02909
<a name="l02910"></a>02910 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>] = <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">17</span>:<span class="vhdllogic">14</span>];
<a name="l02911"></a>02911 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>];
<a name="l02912"></a>02912
<a name="l02913"></a>02913 <span class="keyword">// C</span>
<a name="l02914"></a>02914 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] &gt; <span class="vhdllogic">6&#39;d9</span>) ? <span class="vhdllogic">1&#39;b1</span> : <span class="vhdllogic">1&#39;b0</span>;
<a name="l02915"></a>02915 <span class="keyword">// X = C</span>
<a name="l02916"></a>02916 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] &lt;= (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] &gt; <span class="vhdllogic">6&#39;d9</span>) ? <span class="vhdllogic">1&#39;b1</span> : <span class="vhdllogic">1&#39;b0</span>;
<a name="l02917"></a>02917
<a name="l02918"></a>02918 <span class="keyword">// V</span>
<a name="l02919"></a>02919 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">30</span>] == <span class="vhdllogic">1&#39;b0</span> &amp;&amp; <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>] == <span class="vhdllogic">1&#39;b1</span>) ? <span class="vhdllogic">1&#39;b1</span> : <span class="vhdllogic">1&#39;b0</span>;
<a name="l02920"></a>02920 <span class="vhdlkeyword">end</span>
<a name="l02921"></a>02921 <span class="keyword">// SBCD</span>
<a name="l02922"></a>02922 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">14</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">3&#39;b000</span> ) <span class="vhdlkeyword">begin</span>
<a name="l02923"></a>02923 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] = <span class="vhdllogic">6&#39;d32</span> + {<span class="vhdllogic">2&#39;b0</span>, <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>]} - {<span class="vhdllogic">2&#39;b0</span>, <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>]} - {<span class="vhdllogic">5&#39;b0</span>, <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>]};
<a name="l02924"></a>02924 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] = <span class="vhdllogic">6&#39;d32</span> + {<span class="vhdllogic">2&#39;b0</span>, <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>]} - {<span class="vhdllogic">2&#39;b0</span>, <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>]};
<a name="l02774"></a>02774 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classalu.html#a322325f3e53ea8e7d70fbdc7f5d1b30b">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classalu.html#a2f01d99d4de620b6ce6c7c0a150a5fab">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l02775"></a>02775 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a2f01d99d4de620b6ce6c7c0a150a5fab">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>
<a name="l02776"></a>02776 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a> &lt;= { <span class="vhdllogic">1&#39;b0</span>, <span class="vhdllogic">1&#39;b0</span>, <span class="vhdllogic">1&#39;b1</span>, <span class="vhdllogic">2&#39;b0</span>, <span class="vhdllogic">3&#39;b111</span>, <span class="vhdllogic">8&#39;b0</span> };
<a name="l02777"></a>02777 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> &lt;= <span class="vhdllogic">32&#39;d0</span>;
<a name="l02778"></a>02778 <a class="code" href="classalu.html#ad39d03bb22df22560c4f5dc796382313">alu_signal</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02779"></a>02779 <a class="code" href="classalu.html#a71bbcd2b437cc138ec4e56a2fb248d7e">interrupt_mask_copy</a> &lt;= <span class="vhdllogic">3&#39;b0</span>;
<a name="l02780"></a>02780 <a class="code" href="classalu.html#acd1a91ac2175444844ece34147d7baa4">was_interrupt</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02781"></a>02781 <span class="vhdlkeyword">end</span>
<a name="l02782"></a>02782 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l02783"></a>02783 <span class="vhdlkeyword">case</span>(<a class="code" href="classalu.html#abd96864c4534e2905f0ac629d1bcfce1">alu_control</a>)
<a name="l02784"></a>02784 <a class="code" href="ao68000_8v.html#a687e6310453b4cedb64aa6e66b058c18">`ALU_SR_SET_INTERRUPT</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02785"></a>02785 <a class="code" href="classalu.html#a71bbcd2b437cc138ec4e56a2fb248d7e">interrupt_mask_copy</a> &lt;= <a class="code" href="classalu.html#ab8bac09f28bae473ebf96e3c2c7e2806">interrupt_mask</a>[<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>];
<a name="l02786"></a>02786 <a class="code" href="classalu.html#acd1a91ac2175444844ece34147d7baa4">was_interrupt</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l02787"></a>02787 <span class="vhdlkeyword">end</span>
<a name="l02788"></a>02788
<a name="l02789"></a>02789 <a class="code" href="ao68000_8v.html#ac9fc44b8d3bbcd6c742f1ba074fc668d">`ALU_SR_SET_TRAP</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02790"></a>02790 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#acd1a91ac2175444844ece34147d7baa4">was_interrupt</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l02791"></a>02791 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a> &lt;= { <span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">14</span>], <span class="vhdllogic">1&#39;b1</span>, <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">12</span>:<span class="vhdllogic">11</span>], <a class="code" href="classalu.html#a71bbcd2b437cc138ec4e56a2fb248d7e">interrupt_mask_copy</a>[<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>], <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] };
<a name="l02792"></a>02792 <span class="vhdlkeyword">end</span>
<a name="l02793"></a>02793 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l02794"></a>02794 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a> &lt;= { <span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">14</span>], <span class="vhdllogic">1&#39;b1</span>, <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">12</span>:<span class="vhdllogic">0</span>] };
<a name="l02795"></a>02795 <span class="vhdlkeyword">end</span>
<a name="l02796"></a>02796 <a class="code" href="classalu.html#acd1a91ac2175444844ece34147d7baa4">was_interrupt</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02797"></a>02797 <span class="vhdlkeyword">end</span>
<a name="l02798"></a>02798
<a name="l02799"></a>02799 <a class="code" href="ao68000_8v.html#a59147ff996e0ba496f1f06d7a06decae">`ALU_MOVEP_M2R_1</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02800"></a>02800 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1&#39;b1</span>) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">24</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];
<a name="l02801"></a>02801 <span class="vhdlkeyword">else</span> <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];
<a name="l02802"></a>02802 <span class="keyword">//CCR: no change</span>
<a name="l02803"></a>02803 <span class="vhdlkeyword">end</span>
<a name="l02804"></a>02804 <a class="code" href="ao68000_8v.html#a3b1155f3496b0fc984e5418e09586bf5">`ALU_MOVEP_M2R_2</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02805"></a>02805 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1&#39;b1</span>) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">23</span>:<span class="vhdllogic">16</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];
<a name="l02806"></a>02806 <span class="vhdlkeyword">else</span> <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];
<a name="l02807"></a>02807 <span class="keyword">//CCR: no change</span>
<a name="l02808"></a>02808 <span class="vhdlkeyword">end</span>
<a name="l02809"></a>02809 <a class="code" href="ao68000_8v.html#a5458c8548afc8f7517bdc582c9946b2f">`ALU_MOVEP_M2R_3</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02810"></a>02810 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1&#39;b1</span>) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];
<a name="l02811"></a>02811 <span class="keyword">//CCR: no change</span>
<a name="l02812"></a>02812 <span class="vhdlkeyword">end</span>
<a name="l02813"></a>02813 <a class="code" href="ao68000_8v.html#a8ec0074ca9c5cfec15aa93b92353e09b">`ALU_MOVEP_M2R_4</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02814"></a>02814 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1&#39;b1</span>) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];
<a name="l02815"></a>02815 <span class="keyword">//CCR: no change</span>
<a name="l02816"></a>02816 <span class="vhdlkeyword">end</span>
<a name="l02817"></a>02817
<a name="l02818"></a>02818
<a name="l02819"></a>02819 <a class="code" href="ao68000_8v.html#aab7548aba43c6c12259a2a154ce2982b">`ALU_MOVEP_R2M_1</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02820"></a>02820 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1&#39;b1</span>) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">24</span>];
<a name="l02821"></a>02821 <span class="vhdlkeyword">else</span> <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>];
<a name="l02822"></a>02822 <span class="keyword">// CCR: no change</span>
<a name="l02823"></a>02823 <span class="vhdlkeyword">end</span>
<a name="l02824"></a>02824 <a class="code" href="ao68000_8v.html#a9918f4663f481092da549f3cb008721d">`ALU_MOVEP_R2M_2</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02825"></a>02825 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">6</span>] == <span class="vhdllogic">1&#39;b1</span>) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">23</span>:<span class="vhdllogic">16</span>];
<a name="l02826"></a>02826 <span class="vhdlkeyword">else</span> <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];
<a name="l02827"></a>02827 <span class="keyword">// CCR: no change</span>
<a name="l02828"></a>02828 <span class="vhdlkeyword">end</span>
<a name="l02829"></a>02829 <a class="code" href="ao68000_8v.html#aee5fc91f58c97ffa4d252e127c9e4226">`ALU_MOVEP_R2M_3</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02830"></a>02830 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>];
<a name="l02831"></a>02831 <span class="keyword">// CCR: no change</span>
<a name="l02832"></a>02832 <span class="vhdlkeyword">end</span>
<a name="l02833"></a>02833 <a class="code" href="ao68000_8v.html#a0bc85184fda7b9fcbf00afa29be91d42">`ALU_MOVEP_R2M_4</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02834"></a>02834 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];
<a name="l02835"></a>02835 <span class="keyword">// CCR: no change</span>
<a name="l02836"></a>02836 <span class="vhdlkeyword">end</span>
<a name="l02837"></a>02837
<a name="l02838"></a>02838 <a class="code" href="ao68000_8v.html#a6a119b7268e4e0a78e0307ba0c693ccb">`ALU_SIGN_EXTEND</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02839"></a>02839 <span class="keyword">// move operand1 with sign-extension to result</span>
<a name="l02840"></a>02840 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a46ed8f8b6e397f2f7a0998fe482d4f37">size</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l02841"></a>02841 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> &lt;= { {<span class="vhdllogic">16</span>{<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">15</span>]}}, <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] };
<a name="l02842"></a>02842 <span class="vhdlkeyword">end</span>
<a name="l02843"></a>02843 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l02844"></a>02844 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>;
<a name="l02845"></a>02845 <span class="vhdlkeyword">end</span>
<a name="l02846"></a>02846 <span class="keyword">// CCR: no change</span>
<a name="l02847"></a>02847 <span class="vhdlkeyword">end</span>
<a name="l02848"></a>02848
<a name="l02849"></a>02849 <a class="code" href="ao68000_8v.html#ae497ab0b3e0550245c333bdb426d4236">`ALU_ARITHMETIC_LOGIC</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02850"></a>02850
<a name="l02851"></a>02851 <span class="keyword">// OR,OR to mem,OR to Dn</span>
<a name="l02852"></a>02852 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">0</span>]) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] | <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l02853"></a>02853 <span class="keyword">// AND,AND to mem,AND to Dn</span>
<a name="l02854"></a>02854 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">1</span>]) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] &amp; <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l02855"></a>02855 <span class="keyword">// EORI,EOR</span>
<a name="l02856"></a>02856 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">2</span>]) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] ^ <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l02857"></a>02857 <span class="keyword">// ADD,ADD to mem,ADD to Dn,ADDQ</span>
<a name="l02858"></a>02858 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">3</span>]) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] + <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l02859"></a>02859 <span class="keyword">// SUBI,CMPI,CMPM,SUB to mem,SUB to Dn,CMP,SUBQ</span>
<a name="l02860"></a>02860 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">4</span>] | <a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">5</span>]) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l02861"></a>02861
<a name="l02862"></a>02862 <span class="keyword">// Z</span>
<a name="l02863"></a>02863 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;
<a name="l02864"></a>02864 <span class="keyword">// N</span>
<a name="l02865"></a>02865 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l02866"></a>02866
<a name="l02867"></a>02867 <span class="keyword">// CMPI,CMPM,CMP</span>
<a name="l02868"></a>02868 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">5</span>]) <span class="vhdlkeyword">begin</span>
<a name="l02869"></a>02869 <span class="keyword">// C,V</span>
<a name="l02870"></a>02870 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
<a name="l02871"></a>02871 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= (~<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
<a name="l02872"></a>02872 <span class="keyword">// X not affected</span>
<a name="l02873"></a>02873 <span class="vhdlkeyword">end</span>
<a name="l02874"></a>02874 <span class="keyword">// ADDI,ADD to mem,ADD to Dn,ADDQ</span>
<a name="l02875"></a>02875 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">3</span>]) <span class="vhdlkeyword">begin</span>
<a name="l02876"></a>02876 <span class="keyword">// C,X,V</span>
<a name="l02877"></a>02877 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
<a name="l02878"></a>02878 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>); <span class="keyword">//=ccr[0];</span>
<a name="l02879"></a>02879 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>) | (~<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
<a name="l02880"></a>02880 <span class="vhdlkeyword">end</span>
<a name="l02881"></a>02881 <span class="keyword">// SUBI,SUB to mem,SUB to Dn,SUBQ</span>
<a name="l02882"></a>02882 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">4</span>]) <span class="vhdlkeyword">begin</span>
<a name="l02883"></a>02883 <span class="keyword">// C,X,V</span>
<a name="l02884"></a>02884 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
<a name="l02885"></a>02885 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>); <span class="keyword">//=ccr[0];</span>
<a name="l02886"></a>02886 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= (~<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
<a name="l02887"></a>02887 <span class="vhdlkeyword">end</span>
<a name="l02888"></a>02888 <span class="keyword">// ANDI,EORI,ORI,EOR,OR to mem,AND to mem,OR to Dn,AND to Dn</span>
<a name="l02889"></a>02889 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l02890"></a>02890 <span class="keyword">// C,V</span>
<a name="l02891"></a>02891 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02892"></a>02892 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02893"></a>02893 <span class="keyword">// X not affected</span>
<a name="l02894"></a>02894 <span class="vhdlkeyword">end</span>
<a name="l02895"></a>02895 <span class="vhdlkeyword">end</span>
<a name="l02896"></a>02896
<a name="l02897"></a>02897 <a class="code" href="ao68000_8v.html#ab6294988eed0a5e85d94de7c134351ec">`ALU_ABCD_SBCD_ADDX_SUBX_prepare</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02898"></a>02898 <span class="keyword">// ABCD</span>
<a name="l02899"></a>02899 <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">14</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">3&#39;b100</span>) <span class="vhdlkeyword">begin</span>
<a name="l02900"></a>02900 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] = {<span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>]} + {<span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>]} + {<span class="vhdllogic">4&#39;b0</span>, <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>]};
<a name="l02901"></a>02901 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] = {<span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>]} + {<span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>]};
<a name="l02902"></a>02902
<a name="l02903"></a>02903 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">23</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] + <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] + {<span class="vhdllogic">7&#39;b0</span>, <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>]};
<a name="l02904"></a>02904
<a name="l02905"></a>02905 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] = (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] &gt; <span class="vhdllogic">6&#39;d9</span>) ? (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] + <span class="vhdllogic">6&#39;d6</span>) : <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>];
<a name="l02906"></a>02906 <span class="vhdlkeyword">end</span>
<a name="l02907"></a>02907 <span class="keyword">// SBCD</span>
<a name="l02908"></a>02908 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">14</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">3&#39;b000</span> ) <span class="vhdlkeyword">begin</span>
<a name="l02909"></a>02909 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] = <span class="vhdllogic">6&#39;d32</span> + {<span class="vhdllogic">2&#39;b0</span>, <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>]} - {<span class="vhdllogic">2&#39;b0</span>, <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>]} - {<span class="vhdllogic">5&#39;b0</span>, <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>]};
<a name="l02910"></a>02910 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] = <span class="vhdllogic">6&#39;d32</span> + {<span class="vhdllogic">2&#39;b0</span>, <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>]} - {<span class="vhdllogic">2&#39;b0</span>, <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>]};
<a name="l02911"></a>02911
<a name="l02912"></a>02912 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">23</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] - {<span class="vhdllogic">7&#39;b0</span>, <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>]};
<a name="l02913"></a>02913
<a name="l02914"></a>02914 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] = (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] &lt; <span class="vhdllogic">6&#39;d32</span>) ? (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] - <span class="vhdllogic">6&#39;d6</span>) : <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>];
<a name="l02915"></a>02915 <span class="vhdlkeyword">end</span>
<a name="l02916"></a>02916 <span class="vhdlkeyword">end</span>
<a name="l02917"></a>02917
<a name="l02918"></a>02918 <a class="code" href="ao68000_8v.html#a3e54001e73374bd4f7cfda3de55bd944">`ALU_ABCD_SBCD_ADDX_SUBX</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02919"></a>02919 <span class="keyword">// ABCD</span>
<a name="l02920"></a>02920 <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">14</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">3&#39;b100</span>) <span class="vhdlkeyword">begin</span>
<a name="l02921"></a>02921 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] = (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] &gt; <span class="vhdllogic">6&#39;h1F</span>) ? (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] + <span class="vhdllogic">6&#39;d2</span>) :
<a name="l02922"></a>02922 (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] &gt; <span class="vhdllogic">6&#39;h0F</span>) ? (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] + <span class="vhdllogic">6&#39;d1</span>) :
<a name="l02923"></a>02923 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>];
<a name="l02924"></a>02924 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] = (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] &gt; <span class="vhdllogic">6&#39;d9</span>) ? (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] + <span class="vhdllogic">6&#39;d6</span>) : <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>];
<a name="l02925"></a>02925
<a name="l02926"></a>02926 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">23</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] - {<span class="vhdllogic">7&#39;b0</span>, <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>]};
<a name="l02927"></a>02927
<a name="l02928"></a>02928 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] = (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] &lt; <span class="vhdllogic">6&#39;d32</span>) ? (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] - <span class="vhdllogic">6&#39;d6</span>) : <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>];
<a name="l02929"></a>02929 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] = (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] &lt; <span class="vhdllogic">6&#39;d16</span>) ? (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] - <span class="vhdllogic">6&#39;d2</span>) :
<a name="l02930"></a>02930 (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] &lt; <span class="vhdllogic">6&#39;d32</span>) ? (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] - <span class="vhdllogic">6&#39;d1</span>) :
<a name="l02931"></a>02931 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>];
<a name="l02932"></a>02932 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] = (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] &lt; <span class="vhdllogic">6&#39;d32</span> &amp;&amp; <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>] == <span class="vhdllogic">1&#39;b1</span>) ? (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] - <span class="vhdllogic">6&#39;d6</span>) : <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>];
<a name="l02926"></a>02926 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>] = <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">17</span>:<span class="vhdllogic">14</span>];
<a name="l02927"></a>02927 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>];
<a name="l02928"></a>02928
<a name="l02929"></a>02929 <span class="keyword">// C</span>
<a name="l02930"></a>02930 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] &gt; <span class="vhdllogic">6&#39;d9</span>) ? <span class="vhdllogic">1&#39;b1</span> : <span class="vhdllogic">1&#39;b0</span>;
<a name="l02931"></a>02931 <span class="keyword">// X = C</span>
<a name="l02932"></a>02932 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] &lt;= (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] &gt; <span class="vhdllogic">6&#39;d9</span>) ? <span class="vhdllogic">1&#39;b1</span> : <span class="vhdllogic">1&#39;b0</span>;
<a name="l02933"></a>02933
<a name="l02934"></a>02934 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>] = <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">17</span>:<span class="vhdllogic">14</span>];
<a name="l02935"></a>02935 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>];
<a name="l02936"></a>02936
<a name="l02937"></a>02937 <span class="keyword">// C</span>
<a name="l02938"></a>02938 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] &lt; <span class="vhdllogic">6&#39;d32</span>) ? <span class="vhdllogic">1&#39;b1</span> : <span class="vhdllogic">1&#39;b0</span>;
<a name="l02939"></a>02939 <span class="keyword">// X = C</span>
<a name="l02940"></a>02940 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] &lt;= (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] &lt; <span class="vhdllogic">6&#39;d32</span>) ? <span class="vhdllogic">1&#39;b1</span> : <span class="vhdllogic">1&#39;b0</span>;
<a name="l02941"></a>02941
<a name="l02942"></a>02942 <span class="keyword">// V</span>
<a name="l02943"></a>02943 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">30</span>] == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>] == <span class="vhdllogic">1&#39;b0</span>) ? <span class="vhdllogic">1&#39;b1</span> : <span class="vhdllogic">1&#39;b0</span>;
<a name="l02944"></a>02944 <span class="vhdlkeyword">end</span>
<a name="l02945"></a>02945 <span class="keyword">// ADDX</span>
<a name="l02946"></a>02946 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">14</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">3&#39;b101</span> ) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] + <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] + <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>];
<a name="l02947"></a>02947 <span class="keyword">// SUBX</span>
<a name="l02948"></a>02948 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">14</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">3&#39;b001</span> ) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>];
<a name="l02949"></a>02949
<a name="l02950"></a>02950 <span class="keyword">// Z</span>
<a name="l02951"></a>02951 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &amp; <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;
<a name="l02952"></a>02952 <span class="keyword">// N</span>
<a name="l02953"></a>02953 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l02954"></a>02954
<a name="l02934"></a>02934 <span class="keyword">// V</span>
<a name="l02935"></a>02935 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">30</span>] == <span class="vhdllogic">1&#39;b0</span> &amp;&amp; <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>] == <span class="vhdllogic">1&#39;b1</span>) ? <span class="vhdllogic">1&#39;b1</span> : <span class="vhdllogic">1&#39;b0</span>;
<a name="l02936"></a>02936 <span class="vhdlkeyword">end</span>
<a name="l02937"></a>02937 <span class="keyword">// SBCD</span>
<a name="l02938"></a>02938 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">14</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">3&#39;b000</span> ) <span class="vhdlkeyword">begin</span>
<a name="l02939"></a>02939 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] = (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] &lt; <span class="vhdllogic">6&#39;d16</span>) ? (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] - <span class="vhdllogic">6&#39;d2</span>) :
<a name="l02940"></a>02940 (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">8</span>] &lt; <span class="vhdllogic">6&#39;d32</span>) ? (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] - <span class="vhdllogic">6&#39;d1</span>) :
<a name="l02941"></a>02941 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>];
<a name="l02942"></a>02942 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] = (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] &lt; <span class="vhdllogic">6&#39;d32</span> &amp;&amp; <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>] == <span class="vhdllogic">1&#39;b1</span>) ? (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] - <span class="vhdllogic">6&#39;d6</span>) : <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>];
<a name="l02943"></a>02943
<a name="l02944"></a>02944 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>] = <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">17</span>:<span class="vhdllogic">14</span>];
<a name="l02945"></a>02945 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>];
<a name="l02946"></a>02946
<a name="l02947"></a>02947 <span class="keyword">// C</span>
<a name="l02948"></a>02948 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] &lt; <span class="vhdllogic">6&#39;d32</span>) ? <span class="vhdllogic">1&#39;b1</span> : <span class="vhdllogic">1&#39;b0</span>;
<a name="l02949"></a>02949 <span class="keyword">// X = C</span>
<a name="l02950"></a>02950 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] &lt;= (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">19</span>:<span class="vhdllogic">14</span>] &lt; <span class="vhdllogic">6&#39;d32</span>) ? <span class="vhdllogic">1&#39;b1</span> : <span class="vhdllogic">1&#39;b0</span>;
<a name="l02951"></a>02951
<a name="l02952"></a>02952 <span class="keyword">// V</span>
<a name="l02953"></a>02953 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">30</span>] == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>] == <span class="vhdllogic">1&#39;b0</span>) ? <span class="vhdllogic">1&#39;b1</span> : <span class="vhdllogic">1&#39;b0</span>;
<a name="l02954"></a>02954 <span class="vhdlkeyword">end</span>
<a name="l02955"></a>02955 <span class="keyword">// ADDX</span>
<a name="l02956"></a>02956 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">14</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">3&#39;b101</span> ) <span class="vhdlkeyword">begin</span>
<a name="l02957"></a>02957 <span class="keyword">// C,X,V</span>
<a name="l02958"></a>02958 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
<a name="l02959"></a>02959 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>); <span class="keyword">//=ccr[0];</span>
<a name="l02960"></a>02960 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>) | (~<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
<a name="l02961"></a>02961 <span class="vhdlkeyword">end</span>
<a name="l02962"></a>02962 <span class="keyword">// SUBX</span>
<a name="l02963"></a>02963 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">14</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">3&#39;b001</span> ) <span class="vhdlkeyword">begin</span>
<a name="l02964"></a>02964 <span class="keyword">// C,X,V</span>
<a name="l02965"></a>02965 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
<a name="l02966"></a>02966 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>); <span class="keyword">//=ccr[0];</span>
<a name="l02967"></a>02967 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= (~<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
<a name="l02968"></a>02968 <span class="vhdlkeyword">end</span>
<a name="l02969"></a>02969 <span class="vhdlkeyword">end</span>
<a name="l02970"></a>02970
<a name="l02971"></a>02971 <a class="code" href="ao68000_8v.html#ac444f659b2726fd335e839dfadabbfe3">`ALU_ASL_LSL_ROL_ROXL_ASR_LSR_ROR_ROXR_prepare</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02972"></a>02972 <span class="keyword">// 32-bit load even for 8-bit and 16-bit operations</span>
<a name="l02973"></a>02973 <span class="keyword">// The extra bits will be anyway discarded during register / memory write</span>
<a name="l02974"></a>02974 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l02975"></a>02975
<a name="l02976"></a>02976 <span class="keyword">// V cleared</span>
<a name="l02977"></a>02977 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02978"></a>02978 <span class="keyword">// C for ROXL,ROXR: set to X</span>
<a name="l02979"></a>02979 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">11</span>] | <a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">15</span>]) <span class="vhdlkeyword">begin</span>
<a name="l02980"></a>02980 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>];
<a name="l02981"></a>02981 <span class="vhdlkeyword">end</span>
<a name="l02982"></a>02982 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l02983"></a>02983 <span class="keyword">// C cleared</span>
<a name="l02984"></a>02984 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02985"></a>02985 <span class="vhdlkeyword">end</span>
<a name="l02986"></a>02986
<a name="l02987"></a>02987 <span class="keyword">// N set</span>
<a name="l02988"></a>02988 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l02989"></a>02989 <span class="keyword">// Z set</span>
<a name="l02990"></a>02990 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;
<a name="l02991"></a>02991 <span class="vhdlkeyword">end</span>
<a name="l02992"></a>02992
<a name="l02993"></a>02993 <a class="code" href="ao68000_8v.html#ac946f278d039868214c441c11fcf2587">`ALU_ASL_LSL_ROL_ROXL_ASR_LSR_ROR_ROXR</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02994"></a>02994 <span class="keyword">// ASL / LSL / ROL / ROXL</span>
<a name="l02995"></a>02995 <span class="vhdlkeyword">if</span> (<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">8</span>] | <a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">9</span>] | <a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">10</span>] | <a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">11</span>]) <span class="vhdlkeyword">begin</span>
<a name="l02996"></a>02996 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = {<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">30</span>:<span class="vhdllogic">0</span>], <a class="code" href="classalu.html#ab2b982ee64f25838bec8dba77728dfd8">lbit</a>};
<a name="l02997"></a>02997
<a name="l02998"></a>02998 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>; <span class="keyword">// C for ASL / LSL / ROL / ROXL</span>
<a name="l02999"></a>02999 <span class="vhdlkeyword">if</span> (<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">8</span>])
<a name="l03000"></a>03000 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= (<a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b0</span>)? (<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> != <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) : <span class="vhdllogic">1&#39;b1</span>; <span class="keyword">// V for ASL</span>
<a name="l03001"></a>03001 <span class="vhdlkeyword">else</span>
<a name="l03002"></a>03002 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>; <span class="keyword">// V for LSL / ROL / ROXL</span>
<a name="l03003"></a>03003
<a name="l03004"></a>03004 <span class="vhdlkeyword">if</span> (!<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">10</span>]) <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] &lt;= <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>; <span class="keyword">// X for ASL / LSL / ROXL</span>
<a name="l03005"></a>03005 <span class="vhdlkeyword">end</span>
<a name="l03006"></a>03006 <span class="keyword">// ASR / LSR / ROR / ROXR</span>
<a name="l03007"></a>03007 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l03008"></a>03008 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">6</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">1</span>];
<a name="l03009"></a>03009 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>] = (<a class="code" href="classalu.html#a46ed8f8b6e397f2f7a0998fe482d4f37">size</a>[<span class="vhdllogic">0</span>]) ? <a class="code" href="classalu.html#a8035654de9f2902808f814526db0e1bc">rbit</a> : <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">8</span>];
<a name="l03010"></a>03010 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">14</span>:<span class="vhdllogic">8</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">9</span>];
<a name="l03011"></a>03011 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">15</span>] = (<a class="code" href="classalu.html#a46ed8f8b6e397f2f7a0998fe482d4f37">size</a>[<span class="vhdllogic">1</span>]) ? <a class="code" href="classalu.html#a8035654de9f2902808f814526db0e1bc">rbit</a> : <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">16</span>];
<a name="l03012"></a>03012 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">30</span>:<span class="vhdllogic">16</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">17</span>];
<a name="l03013"></a>03013 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>] = <a class="code" href="classalu.html#a8035654de9f2902808f814526db0e1bc">rbit</a>;
<a name="l03014"></a>03014 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">0</span>]; <span class="keyword">// C for ASR / LSR / ROR / ROXR</span>
<a name="l03015"></a>03015 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>; <span class="keyword">// V for ASR / LSR / ROR / ROXR</span>
<a name="l03016"></a>03016 <span class="vhdlkeyword">if</span> (!<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">14</span>]) <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">0</span>]; <span class="keyword">// X for ASR / LSR / ROXR</span>
<a name="l03017"></a>03017 <span class="vhdlkeyword">end</span>
<a name="l03018"></a>03018
<a name="l03019"></a>03019 <span class="keyword">// N set</span>
<a name="l03020"></a>03020 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l03021"></a>03021 <span class="keyword">// Z set</span>
<a name="l03022"></a>03022 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;
<a name="l03023"></a>03023 <span class="vhdlkeyword">end</span>
<a name="l03024"></a>03024
<a name="l03025"></a>03025 <a class="code" href="ao68000_8v.html#a268aa82704bd8f1c1548dfc69a12a951">`ALU_MOVE</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l03026"></a>03026 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>;
<a name="l02956"></a>02956 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">14</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">3&#39;b101</span> ) <span class="vhdlkeyword">begin</span>
<a name="l02957"></a>02957 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] + <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] + <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>];
<a name="l02958"></a>02958
<a name="l02959"></a>02959 <span class="keyword">// C,X,V</span>
<a name="l02960"></a>02960 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
<a name="l02961"></a>02961 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>); <span class="keyword">//=ccr[0];</span>
<a name="l02962"></a>02962 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>) | (~<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
<a name="l02963"></a>02963 <span class="vhdlkeyword">end</span>
<a name="l02964"></a>02964 <span class="keyword">// SUBX</span>
<a name="l02965"></a>02965 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">14</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">3&#39;b001</span> ) <span class="vhdlkeyword">begin</span>
<a name="l02966"></a>02966 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>];
<a name="l02967"></a>02967
<a name="l02968"></a>02968 <span class="keyword">// C,X,V</span>
<a name="l02969"></a>02969 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
<a name="l02970"></a>02970 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>); <span class="keyword">//=ccr[0];</span>
<a name="l02971"></a>02971 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= (~<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
<a name="l02972"></a>02972 <span class="vhdlkeyword">end</span>
<a name="l02973"></a>02973
<a name="l02974"></a>02974 <span class="keyword">// Z</span>
<a name="l02975"></a>02975 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &amp; <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;
<a name="l02976"></a>02976 <span class="keyword">// N</span>
<a name="l02977"></a>02977 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l02978"></a>02978 <span class="vhdlkeyword">end</span>
<a name="l02979"></a>02979
<a name="l02980"></a>02980 <a class="code" href="ao68000_8v.html#ac444f659b2726fd335e839dfadabbfe3">`ALU_ASL_LSL_ROL_ROXL_ASR_LSR_ROR_ROXR_prepare</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l02981"></a>02981 <span class="keyword">// 32-bit load even for 8-bit and 16-bit operations</span>
<a name="l02982"></a>02982 <span class="keyword">// The extra bits will be anyway discarded during register / memory write</span>
<a name="l02983"></a>02983 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l02984"></a>02984
<a name="l02985"></a>02985 <span class="keyword">// V cleared</span>
<a name="l02986"></a>02986 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02987"></a>02987 <span class="keyword">// C for ROXL,ROXR: set to X</span>
<a name="l02988"></a>02988 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">11</span>] | <a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">15</span>]) <span class="vhdlkeyword">begin</span>
<a name="l02989"></a>02989 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>];
<a name="l02990"></a>02990 <span class="vhdlkeyword">end</span>
<a name="l02991"></a>02991 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l02992"></a>02992 <span class="keyword">// C cleared</span>
<a name="l02993"></a>02993 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l02994"></a>02994 <span class="vhdlkeyword">end</span>
<a name="l02995"></a>02995
<a name="l02996"></a>02996 <span class="keyword">// N set</span>
<a name="l02997"></a>02997 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l02998"></a>02998 <span class="keyword">// Z set</span>
<a name="l02999"></a>02999 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;
<a name="l03000"></a>03000 <span class="vhdlkeyword">end</span>
<a name="l03001"></a>03001
<a name="l03002"></a>03002 <a class="code" href="ao68000_8v.html#ac946f278d039868214c441c11fcf2587">`ALU_ASL_LSL_ROL_ROXL_ASR_LSR_ROR_ROXR</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l03003"></a>03003 <span class="keyword">// ASL / LSL / ROL / ROXL</span>
<a name="l03004"></a>03004 <span class="vhdlkeyword">if</span> (<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">8</span>] | <a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">9</span>] | <a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">10</span>] | <a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">11</span>]) <span class="vhdlkeyword">begin</span>
<a name="l03005"></a>03005 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = {<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">30</span>:<span class="vhdllogic">0</span>], <a class="code" href="classalu.html#ab2b982ee64f25838bec8dba77728dfd8">lbit</a>};
<a name="l03006"></a>03006
<a name="l03007"></a>03007 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>; <span class="keyword">// C for ASL / LSL / ROL / ROXL</span>
<a name="l03008"></a>03008 <span class="vhdlkeyword">if</span> (<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">8</span>])
<a name="l03009"></a>03009 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= (<a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b0</span>)? (<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> != <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) : <span class="vhdllogic">1&#39;b1</span>; <span class="keyword">// V for ASL</span>
<a name="l03010"></a>03010 <span class="vhdlkeyword">else</span>
<a name="l03011"></a>03011 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>; <span class="keyword">// V for LSL / ROL / ROXL</span>
<a name="l03012"></a>03012
<a name="l03013"></a>03013 <span class="vhdlkeyword">if</span> (!<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">10</span>]) <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] &lt;= <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>; <span class="keyword">// X for ASL / LSL / ROXL</span>
<a name="l03014"></a>03014 <span class="vhdlkeyword">end</span>
<a name="l03015"></a>03015 <span class="keyword">// ASR / LSR / ROR / ROXR</span>
<a name="l03016"></a>03016 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l03017"></a>03017 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">6</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">1</span>];
<a name="l03018"></a>03018 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>] = (<a class="code" href="classalu.html#a46ed8f8b6e397f2f7a0998fe482d4f37">size</a>[<span class="vhdllogic">0</span>]) ? <a class="code" href="classalu.html#a8035654de9f2902808f814526db0e1bc">rbit</a> : <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">8</span>];
<a name="l03019"></a>03019 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">14</span>:<span class="vhdllogic">8</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">9</span>];
<a name="l03020"></a>03020 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">15</span>] = (<a class="code" href="classalu.html#a46ed8f8b6e397f2f7a0998fe482d4f37">size</a>[<span class="vhdllogic">1</span>]) ? <a class="code" href="classalu.html#a8035654de9f2902808f814526db0e1bc">rbit</a> : <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">16</span>];
<a name="l03021"></a>03021 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">30</span>:<span class="vhdllogic">16</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">17</span>];
<a name="l03022"></a>03022 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>] = <a class="code" href="classalu.html#a8035654de9f2902808f814526db0e1bc">rbit</a>;
<a name="l03023"></a>03023 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">0</span>]; <span class="keyword">// C for ASR / LSR / ROR / ROXR</span>
<a name="l03024"></a>03024 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>; <span class="keyword">// V for ASR / LSR / ROR / ROXR</span>
<a name="l03025"></a>03025 <span class="vhdlkeyword">if</span> (!<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">14</span>]) <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">0</span>]; <span class="keyword">// X for ASR / LSR / ROXR</span>
<a name="l03026"></a>03026 <span class="vhdlkeyword">end</span>
<a name="l03027"></a>03027
<a name="l03028"></a>03028 <span class="keyword">// X not affected</span>
<a name="l03029"></a>03029 <span class="keyword">// C cleared</span>
<a name="l03030"></a>03030 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03031"></a>03031 <span class="keyword">// V cleared</span>
<a name="l03032"></a>03032 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03028"></a>03028 <span class="keyword">// N set</span>
<a name="l03029"></a>03029 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l03030"></a>03030 <span class="keyword">// Z set</span>
<a name="l03031"></a>03031 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;
<a name="l03032"></a>03032 <span class="vhdlkeyword">end</span>
<a name="l03033"></a>03033
<a name="l03034"></a>03034 <span class="keyword">// N set</span>
<a name="l03035"></a>03035 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l03036"></a>03036 <span class="keyword">// Z set</span>
<a name="l03037"></a>03037 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;
<a name="l03038"></a>03038 <span class="vhdlkeyword">end</span>
<a name="l03039"></a>03039
<a name="l03040"></a>03040 <a class="code" href="ao68000_8v.html#a30a87601d2ca38286bb0d486d59f6a07">`ALU_ADDA_SUBA_CMPA_ADDQ_SUBQ</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l03041"></a>03041 <span class="keyword">// ADDA: 1101</span>
<a name="l03042"></a>03042 <span class="keyword">// CMPA: 1011</span>
<a name="l03043"></a>03043 <span class="keyword">// SUBA: 1001</span>
<a name="l03044"></a>03044 <span class="keyword">// ADDQ,SUBQ: 0101 xxx0,1</span>
<a name="l03045"></a>03045 <span class="keyword">// operation requires that operand2 was sign extended</span>
<a name="l03046"></a>03046
<a name="l03047"></a>03047 <span class="keyword">// ADDA,ADDQ</span>
<a name="l03048"></a>03048 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">6</span>]) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] + <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l03049"></a>03049 <span class="keyword">// SUBA,CMPA,SUBQ</span>
<a name="l03050"></a>03050 <span class="vhdlkeyword">else</span> <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l03051"></a>03051
<a name="l03052"></a>03052 <span class="keyword">// for CMPA</span>
<a name="l03053"></a>03053 <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1011</span> ) <span class="vhdlkeyword">begin</span>
<a name="l03054"></a>03054 <span class="keyword">// Z</span>
<a name="l03055"></a>03055 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;
<a name="l03056"></a>03056 <span class="keyword">// N</span>
<a name="l03057"></a>03057 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l03058"></a>03058
<a name="l03059"></a>03059 <span class="keyword">// C,V</span>
<a name="l03060"></a>03060 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
<a name="l03061"></a>03061 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= (~<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
<a name="l03062"></a>03062 <span class="keyword">// X not affected</span>
<a name="l03063"></a>03063 <span class="vhdlkeyword">end</span>
<a name="l03064"></a>03064 <span class="keyword">// for ADDA,SUBA,ADDQ,SUBQ: ccr not affected</span>
<a name="l03065"></a>03065 <span class="vhdlkeyword">end</span>
<a name="l03066"></a>03066
<a name="l03067"></a>03067 <a class="code" href="ao68000_8v.html#af0a4db089a5eb288abf9453ca2d79c26">`ALU_CHK</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l03068"></a>03068 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>];
<a name="l03069"></a>03069
<a name="l03070"></a>03070 <span class="keyword">// undocumented behavior: Z flag, see 68knotes.txt</span>
<a name="l03071"></a>03071 <span class="keyword">//sr[2] &lt;= (operand1[15:0] == 16&#39;b0) ? 1&#39;b1 : 1&#39;b0;</span>
<a name="l03072"></a>03072 <span class="keyword">// undocumented behavior: C,V flags, see 68knotes.txt</span>
<a name="l03073"></a>03073 <span class="keyword">//sr[0] &lt;= 1&#39;b0;</span>
<a name="l03074"></a>03074 <span class="keyword">//sr[1] &lt;= 1&#39;b0;</span>
<a name="l03075"></a>03075
<a name="l03076"></a>03076 <span class="keyword">// C,X,V</span>
<a name="l03077"></a>03077 <span class="keyword">// sr[0] &lt;= (`Sm &amp; ~`Dm) | (`Rm &amp; ~`Dm) | (`Sm &amp; `Rm);</span>
<a name="l03078"></a>03078 <span class="keyword">// sr[4] &lt;= (`Sm &amp; ~`Dm) | (`Rm &amp; ~`Dm) | (`Sm &amp; `Rm); //=ccr[0];</span>
<a name="l03079"></a>03079 <span class="keyword">// sr[1] &lt;= (~`Sm &amp; `Dm &amp; ~`Rm) | (`Sm &amp; ~`Dm &amp; `Rm);</span>
<a name="l03080"></a>03080 <span class="keyword">// +: 0-1, 0-0=0, 1-1=0</span>
<a name="l03081"></a>03081 <span class="keyword">// -: 0-0=1, 1-0, 1-1=1</span>
<a name="l03082"></a>03082 <span class="keyword">// operand1 - operand2 &gt; 0</span>
<a name="l03083"></a>03083 <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] != <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] &amp;&amp; ((~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span>) | (~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>)) == <span class="vhdllogic">1&#39;b1</span> ) <span class="vhdlkeyword">begin</span>
<a name="l03084"></a>03084 <span class="keyword">// clear N</span>
<a name="l03085"></a>03085 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03086"></a>03086 <a class="code" href="classalu.html#ad39d03bb22df22560c4f5dc796382313">alu_signal</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l03087"></a>03087 <span class="vhdlkeyword">end</span>
<a name="l03088"></a>03088 <span class="keyword">// operand1 &lt; 0</span>
<a name="l03089"></a>03089 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">15</span>] == <span class="vhdllogic">1&#39;b1</span> ) <span class="vhdlkeyword">begin</span>
<a name="l03090"></a>03090 <span class="keyword">// set N</span>
<a name="l03091"></a>03091 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l03092"></a>03092 <a class="code" href="classalu.html#ad39d03bb22df22560c4f5dc796382313">alu_signal</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l03093"></a>03093 <span class="vhdlkeyword">end</span>
<a name="l03094"></a>03094 <span class="keyword">// no trap</span>
<a name="l03095"></a>03095 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l03096"></a>03096 <span class="keyword">// N undefined: not affected</span>
<a name="l03097"></a>03097 <a class="code" href="classalu.html#ad39d03bb22df22560c4f5dc796382313">alu_signal</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03098"></a>03098 <span class="vhdlkeyword">end</span>
<a name="l03099"></a>03099
<a name="l03100"></a>03100 <span class="keyword">// X not affected</span>
<a name="l03101"></a>03101 <span class="vhdlkeyword">end</span>
<a name="l03102"></a>03102
<a name="l03103"></a>03103 <a class="code" href="ao68000_8v.html#aed07d190bb88f0cce7768028698020f9">`ALU_MULS_MULU_DIVS_DIVU</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l03104"></a>03104
<a name="l03105"></a>03105 <span class="keyword">// division by 0</span>
<a name="l03106"></a>03106 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1000</span> &amp;&amp; <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0</span>) <span class="vhdlkeyword">begin</span>
<a name="l03107"></a>03107 <span class="keyword">// X not affected</span>
<a name="l03108"></a>03108 <span class="keyword">// C cleared</span>
<a name="l03109"></a>03109 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03110"></a>03110 <span class="keyword">// V,Z,N undefined: cleared</span>
<a name="l03111"></a>03111 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03112"></a>03112 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03113"></a>03113 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03114"></a>03114
<a name="l03115"></a>03115 <span class="keyword">// set trap</span>
<a name="l03116"></a>03116 <a class="code" href="classalu.html#ad39d03bb22df22560c4f5dc796382313">alu_signal</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l03117"></a>03117 <span class="vhdlkeyword">end</span>
<a name="l03118"></a>03118 <span class="keyword">// division in idle state</span>
<a name="l03119"></a>03119 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1000</span> &amp;&amp; <a class="code" href="classalu.html#a3a2dd2d9816dba2aebe4a5cf5eeed521">div_count</a> == <span class="vhdllogic">5&#39;d0</span>) <span class="vhdlkeyword">begin</span>
<a name="l03120"></a>03120 <a class="code" href="classalu.html#ad39d03bb22df22560c4f5dc796382313">alu_signal</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03121"></a>03121 <span class="vhdlkeyword">end</span>
<a name="l03122"></a>03122 <span class="keyword">// division overflow: divu, divs</span>
<a name="l03123"></a>03123 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1000</span> &amp;&amp; <a class="code" href="classalu.html#abad1e1ed5e810e1a31e16550349b6bfb">div_overflow</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l03124"></a>03124 <span class="keyword">// X not affected</span>
<a name="l03125"></a>03125 <span class="keyword">// C cleared</span>
<a name="l03126"></a>03126 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03127"></a>03127 <span class="keyword">// V set</span>
<a name="l03128"></a>03128 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l03129"></a>03129 <span class="keyword">// Z,N undefined: cleared and set</span>
<a name="l03130"></a>03130 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03131"></a>03131 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l03132"></a>03132
<a name="l03133"></a>03133 <span class="keyword">// set trap</span>
<a name="l03134"></a>03134 <a class="code" href="classalu.html#ad39d03bb22df22560c4f5dc796382313">alu_signal</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l03135"></a>03135 <span class="vhdlkeyword">end</span>
<a name="l03136"></a>03136 <span class="keyword">// division</span>
<a name="l03137"></a>03137 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1000</span> ) <span class="vhdlkeyword">begin</span>
<a name="l03138"></a>03138 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] &lt;= {<a class="code" href="classalu.html#a3b4ed364cf9180375a05991a64005ea7">div_remainder</a>, <a class="code" href="classalu.html#a66f6b0eb96212740619af0f057d33546">div_quotient</a>};
<a name="l03139"></a>03139
<a name="l03140"></a>03140 <span class="keyword">// X not affected</span>
<a name="l03141"></a>03141 <span class="keyword">// C cleared</span>
<a name="l03142"></a>03142 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03143"></a>03143 <span class="keyword">// V cleared</span>
<a name="l03144"></a>03144 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03145"></a>03145 <span class="keyword">// Z</span>
<a name="l03146"></a>03146 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= (<a class="code" href="classalu.html#a66f6b0eb96212740619af0f057d33546">div_quotient</a> == <span class="vhdllogic">16&#39;b0</span>);
<a name="l03147"></a>03147 <span class="keyword">// N</span>
<a name="l03148"></a>03148 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= (<a class="code" href="classalu.html#a66f6b0eb96212740619af0f057d33546">div_quotient</a>[<span class="vhdllogic">15</span>] == <span class="vhdllogic">1&#39;b1</span>);
<a name="l03149"></a>03149
<a name="l03150"></a>03150 <span class="keyword">// set trap</span>
<a name="l03151"></a>03151 <a class="code" href="classalu.html#ad39d03bb22df22560c4f5dc796382313">alu_signal</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03152"></a>03152 <span class="vhdlkeyword">end</span>
<a name="l03153"></a>03153 <span class="keyword">// multiplication</span>
<a name="l03154"></a>03154 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1100</span> ) <span class="vhdlkeyword">begin</span>
<a name="l03155"></a>03155 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#ac1b8a2e6c2bb6a12b10db4250f56135e">mult_result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l03156"></a>03156
<a name="l03157"></a>03157 <span class="keyword">// X not affected</span>
<a name="l03158"></a>03158 <span class="keyword">// C cleared</span>
<a name="l03159"></a>03159 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03160"></a>03160 <span class="keyword">// V cleared</span>
<a name="l03161"></a>03161 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03162"></a>03162 <span class="keyword">// Z</span>
<a name="l03163"></a>03163 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= (<a class="code" href="classalu.html#ac1b8a2e6c2bb6a12b10db4250f56135e">mult_result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">32&#39;b0</span>);
<a name="l03164"></a>03164 <span class="keyword">// N</span>
<a name="l03165"></a>03165 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= (<a class="code" href="classalu.html#ac1b8a2e6c2bb6a12b10db4250f56135e">mult_result</a>[<span class="vhdllogic">31</span>] == <span class="vhdllogic">1&#39;b1</span>);
<a name="l03166"></a>03166
<a name="l03167"></a>03167 <span class="keyword">// set trap</span>
<a name="l03168"></a>03168 <a class="code" href="classalu.html#ad39d03bb22df22560c4f5dc796382313">alu_signal</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03169"></a>03169 <span class="vhdlkeyword">end</span>
<a name="l03170"></a>03170 <span class="vhdlkeyword">end</span>
<a name="l03171"></a>03171
<a name="l03172"></a>03172
<a name="l03173"></a>03173 <a class="code" href="ao68000_8v.html#a14b85ce3e5b4ede3b2c4e89f420c8c3c">`ALU_BCHG_BCLR_BSET_BTST</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span> <span class="keyword">// 97 LE</span>
<a name="l03174"></a>03174 <span class="keyword">// byte</span>
<a name="l03175"></a>03175 <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b000</span> ) <span class="vhdlkeyword">begin</span>
<a name="l03176"></a>03176 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= ~(<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[ <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] ]);
<a name="l03177"></a>03177 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>;
<a name="l03178"></a>03178 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[ <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] ] = (<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b01</span>) ? ~(<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[ <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] ]) : (<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b10</span>) ? <span class="vhdllogic">1&#39;b0</span> : <span class="vhdllogic">1&#39;b1</span>;
<a name="l03179"></a>03179 <span class="vhdlkeyword">end</span>
<a name="l03180"></a>03180 <span class="keyword">// long</span>
<a name="l03181"></a>03181 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b000</span> ) <span class="vhdlkeyword">begin</span>
<a name="l03182"></a>03182 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= ~(<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[ <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">0</span>] ]);
<a name="l03183"></a>03183 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>;
<a name="l03184"></a>03184 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[ <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">0</span>] ] = (<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b01</span>) ? ~(<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[ <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">0</span>] ]) : (<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b10</span>) ? <span class="vhdllogic">1&#39;b0</span> : <span class="vhdllogic">1&#39;b1</span>;
<a name="l03185"></a>03185 <span class="vhdlkeyword">end</span>
<a name="l03186"></a>03186
<a name="l03187"></a>03187 <span class="keyword">// C,V,N,X not affected</span>
<a name="l03188"></a>03188 <span class="vhdlkeyword">end</span>
<a name="l03189"></a>03189
<a name="l03190"></a>03190 <a class="code" href="ao68000_8v.html#ac7de3ab6c8eec4381bde5e4f61b45761">`ALU_TAS</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l03191"></a>03191 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= { <span class="vhdllogic">1&#39;b1</span>, <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">6</span>:<span class="vhdllogic">0</span>] };
<a name="l03192"></a>03192
<a name="l03193"></a>03193 <span class="keyword">// X not affected</span>
<a name="l03194"></a>03194 <span class="keyword">// C cleared</span>
<a name="l03195"></a>03195 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03196"></a>03196 <span class="keyword">// V cleared</span>
<a name="l03197"></a>03197 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03034"></a>03034 <a class="code" href="ao68000_8v.html#a268aa82704bd8f1c1548dfc69a12a951">`ALU_MOVE</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l03035"></a>03035 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>;
<a name="l03036"></a>03036
<a name="l03037"></a>03037 <span class="keyword">// X not affected</span>
<a name="l03038"></a>03038 <span class="keyword">// C cleared</span>
<a name="l03039"></a>03039 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03040"></a>03040 <span class="keyword">// V cleared</span>
<a name="l03041"></a>03041 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03042"></a>03042
<a name="l03043"></a>03043 <span class="keyword">// N set</span>
<a name="l03044"></a>03044 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l03045"></a>03045 <span class="keyword">// Z set</span>
<a name="l03046"></a>03046 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;
<a name="l03047"></a>03047 <span class="vhdlkeyword">end</span>
<a name="l03048"></a>03048
<a name="l03049"></a>03049 <a class="code" href="ao68000_8v.html#a30a87601d2ca38286bb0d486d59f6a07">`ALU_ADDA_SUBA_CMPA_ADDQ_SUBQ</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l03050"></a>03050 <span class="keyword">// ADDA: 1101</span>
<a name="l03051"></a>03051 <span class="keyword">// CMPA: 1011</span>
<a name="l03052"></a>03052 <span class="keyword">// SUBA: 1001</span>
<a name="l03053"></a>03053 <span class="keyword">// ADDQ,SUBQ: 0101 xxx0,1</span>
<a name="l03054"></a>03054 <span class="keyword">// operation requires that operand2 was sign extended</span>
<a name="l03055"></a>03055
<a name="l03056"></a>03056 <span class="keyword">// ADDA,ADDQ</span>
<a name="l03057"></a>03057 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">6</span>]) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] + <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l03058"></a>03058 <span class="keyword">// SUBA,CMPA,SUBQ</span>
<a name="l03059"></a>03059 <span class="vhdlkeyword">else</span> <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l03060"></a>03060
<a name="l03061"></a>03061 <span class="keyword">// for CMPA</span>
<a name="l03062"></a>03062 <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1011</span> ) <span class="vhdlkeyword">begin</span>
<a name="l03063"></a>03063 <span class="keyword">// Z</span>
<a name="l03064"></a>03064 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;
<a name="l03065"></a>03065 <span class="keyword">// N</span>
<a name="l03066"></a>03066 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l03067"></a>03067
<a name="l03068"></a>03068 <span class="keyword">// C,V</span>
<a name="l03069"></a>03069 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
<a name="l03070"></a>03070 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= (~<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>);
<a name="l03071"></a>03071 <span class="keyword">// X not affected</span>
<a name="l03072"></a>03072 <span class="vhdlkeyword">end</span>
<a name="l03073"></a>03073 <span class="keyword">// for ADDA,SUBA,ADDQ,SUBQ: ccr not affected</span>
<a name="l03074"></a>03074 <span class="vhdlkeyword">end</span>
<a name="l03075"></a>03075
<a name="l03076"></a>03076 <a class="code" href="ao68000_8v.html#af0a4db089a5eb288abf9453ca2d79c26">`ALU_CHK</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l03077"></a>03077 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>];
<a name="l03078"></a>03078
<a name="l03079"></a>03079 <span class="keyword">// undocumented behavior: Z flag, see 68knotes.txt</span>
<a name="l03080"></a>03080 <span class="keyword">//sr[2] &lt;= (operand1[15:0] == 16&#39;b0) ? 1&#39;b1 : 1&#39;b0;</span>
<a name="l03081"></a>03081 <span class="keyword">// undocumented behavior: C,V flags, see 68knotes.txt</span>
<a name="l03082"></a>03082 <span class="keyword">//sr[0] &lt;= 1&#39;b0;</span>
<a name="l03083"></a>03083 <span class="keyword">//sr[1] &lt;= 1&#39;b0;</span>
<a name="l03084"></a>03084
<a name="l03085"></a>03085 <span class="keyword">// C,X,V</span>
<a name="l03086"></a>03086 <span class="keyword">// sr[0] &lt;= (`Sm &amp; ~`Dm) | (`Rm &amp; ~`Dm) | (`Sm &amp; `Rm);</span>
<a name="l03087"></a>03087 <span class="keyword">// sr[4] &lt;= (`Sm &amp; ~`Dm) | (`Rm &amp; ~`Dm) | (`Sm &amp; `Rm); //=ccr[0];</span>
<a name="l03088"></a>03088 <span class="keyword">// sr[1] &lt;= (~`Sm &amp; `Dm &amp; ~`Rm) | (`Sm &amp; ~`Dm &amp; `Rm);</span>
<a name="l03089"></a>03089 <span class="keyword">// +: 0-1, 0-0=0, 1-1=0</span>
<a name="l03090"></a>03090 <span class="keyword">// -: 0-0=1, 1-0, 1-1=1</span>
<a name="l03091"></a>03091 <span class="keyword">// operand1 - operand2 &gt; 0</span>
<a name="l03092"></a>03092 <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] != <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] &amp;&amp; ((~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span>) | (~<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>) | (<a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">`Sm</a><span class="vhdlchar"></span> &amp; ~<a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>)) == <span class="vhdllogic">1&#39;b1</span> ) <span class="vhdlkeyword">begin</span>
<a name="l03093"></a>03093 <span class="keyword">// clear N</span>
<a name="l03094"></a>03094 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03095"></a>03095 <a class="code" href="classalu.html#ad39d03bb22df22560c4f5dc796382313">alu_signal</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l03096"></a>03096 <span class="vhdlkeyword">end</span>
<a name="l03097"></a>03097 <span class="keyword">// operand1 &lt; 0</span>
<a name="l03098"></a>03098 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">15</span>] == <span class="vhdllogic">1&#39;b1</span> ) <span class="vhdlkeyword">begin</span>
<a name="l03099"></a>03099 <span class="keyword">// set N</span>
<a name="l03100"></a>03100 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l03101"></a>03101 <a class="code" href="classalu.html#ad39d03bb22df22560c4f5dc796382313">alu_signal</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l03102"></a>03102 <span class="vhdlkeyword">end</span>
<a name="l03103"></a>03103 <span class="keyword">// no trap</span>
<a name="l03104"></a>03104 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l03105"></a>03105 <span class="keyword">// N undefined: not affected</span>
<a name="l03106"></a>03106 <a class="code" href="classalu.html#ad39d03bb22df22560c4f5dc796382313">alu_signal</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03107"></a>03107 <span class="vhdlkeyword">end</span>
<a name="l03108"></a>03108
<a name="l03109"></a>03109 <span class="keyword">// X not affected</span>
<a name="l03110"></a>03110 <span class="vhdlkeyword">end</span>
<a name="l03111"></a>03111
<a name="l03112"></a>03112 <a class="code" href="ao68000_8v.html#aed07d190bb88f0cce7768028698020f9">`ALU_MULS_MULU_DIVS_DIVU</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l03113"></a>03113
<a name="l03114"></a>03114 <span class="keyword">// division by 0</span>
<a name="l03115"></a>03115 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1000</span> &amp;&amp; <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16&#39;b0</span>) <span class="vhdlkeyword">begin</span>
<a name="l03116"></a>03116 <span class="keyword">// X not affected</span>
<a name="l03117"></a>03117 <span class="keyword">// C cleared</span>
<a name="l03118"></a>03118 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03119"></a>03119 <span class="keyword">// V,Z,N undefined: cleared</span>
<a name="l03120"></a>03120 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03121"></a>03121 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03122"></a>03122 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03123"></a>03123
<a name="l03124"></a>03124 <span class="keyword">// set trap</span>
<a name="l03125"></a>03125 <a class="code" href="classalu.html#ad39d03bb22df22560c4f5dc796382313">alu_signal</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l03126"></a>03126 <span class="vhdlkeyword">end</span>
<a name="l03127"></a>03127 <span class="keyword">// division in idle state</span>
<a name="l03128"></a>03128 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1000</span> &amp;&amp; <a class="code" href="classalu.html#a3a2dd2d9816dba2aebe4a5cf5eeed521">div_count</a> == <span class="vhdllogic">5&#39;d0</span>) <span class="vhdlkeyword">begin</span>
<a name="l03129"></a>03129 <a class="code" href="classalu.html#ad39d03bb22df22560c4f5dc796382313">alu_signal</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03130"></a>03130 <span class="vhdlkeyword">end</span>
<a name="l03131"></a>03131 <span class="keyword">// division overflow: divu, divs</span>
<a name="l03132"></a>03132 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1000</span> &amp;&amp; <a class="code" href="classalu.html#abad1e1ed5e810e1a31e16550349b6bfb">div_overflow</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l03133"></a>03133 <span class="keyword">// X not affected</span>
<a name="l03134"></a>03134 <span class="keyword">// C cleared</span>
<a name="l03135"></a>03135 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03136"></a>03136 <span class="keyword">// V set</span>
<a name="l03137"></a>03137 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l03138"></a>03138 <span class="keyword">// Z,N undefined: cleared and set</span>
<a name="l03139"></a>03139 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03140"></a>03140 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l03141"></a>03141
<a name="l03142"></a>03142 <span class="keyword">// set trap</span>
<a name="l03143"></a>03143 <a class="code" href="classalu.html#ad39d03bb22df22560c4f5dc796382313">alu_signal</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l03144"></a>03144 <span class="vhdlkeyword">end</span>
<a name="l03145"></a>03145 <span class="keyword">// division</span>
<a name="l03146"></a>03146 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1000</span> ) <span class="vhdlkeyword">begin</span>
<a name="l03147"></a>03147 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] &lt;= {<a class="code" href="classalu.html#a3b4ed364cf9180375a05991a64005ea7">div_remainder</a>, <a class="code" href="classalu.html#a66f6b0eb96212740619af0f057d33546">div_quotient</a>};
<a name="l03148"></a>03148
<a name="l03149"></a>03149 <span class="keyword">// X not affected</span>
<a name="l03150"></a>03150 <span class="keyword">// C cleared</span>
<a name="l03151"></a>03151 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03152"></a>03152 <span class="keyword">// V cleared</span>
<a name="l03153"></a>03153 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03154"></a>03154 <span class="keyword">// Z</span>
<a name="l03155"></a>03155 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= (<a class="code" href="classalu.html#a66f6b0eb96212740619af0f057d33546">div_quotient</a> == <span class="vhdllogic">16&#39;b0</span>);
<a name="l03156"></a>03156 <span class="keyword">// N</span>
<a name="l03157"></a>03157 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= (<a class="code" href="classalu.html#a66f6b0eb96212740619af0f057d33546">div_quotient</a>[<span class="vhdllogic">15</span>] == <span class="vhdllogic">1&#39;b1</span>);
<a name="l03158"></a>03158
<a name="l03159"></a>03159 <span class="keyword">// set trap</span>
<a name="l03160"></a>03160 <a class="code" href="classalu.html#ad39d03bb22df22560c4f5dc796382313">alu_signal</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03161"></a>03161 <span class="vhdlkeyword">end</span>
<a name="l03162"></a>03162 <span class="keyword">// multiplication</span>
<a name="l03163"></a>03163 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">12</span>] == <span class="vhdllogic">4&#39;b1100</span> ) <span class="vhdlkeyword">begin</span>
<a name="l03164"></a>03164 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#ac1b8a2e6c2bb6a12b10db4250f56135e">mult_result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l03165"></a>03165
<a name="l03166"></a>03166 <span class="keyword">// X not affected</span>
<a name="l03167"></a>03167 <span class="keyword">// C cleared</span>
<a name="l03168"></a>03168 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03169"></a>03169 <span class="keyword">// V cleared</span>
<a name="l03170"></a>03170 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03171"></a>03171 <span class="keyword">// Z</span>
<a name="l03172"></a>03172 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= (<a class="code" href="classalu.html#ac1b8a2e6c2bb6a12b10db4250f56135e">mult_result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">32&#39;b0</span>);
<a name="l03173"></a>03173 <span class="keyword">// N</span>
<a name="l03174"></a>03174 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= (<a class="code" href="classalu.html#ac1b8a2e6c2bb6a12b10db4250f56135e">mult_result</a>[<span class="vhdllogic">31</span>] == <span class="vhdllogic">1&#39;b1</span>);
<a name="l03175"></a>03175
<a name="l03176"></a>03176 <span class="keyword">// set trap</span>
<a name="l03177"></a>03177 <a class="code" href="classalu.html#ad39d03bb22df22560c4f5dc796382313">alu_signal</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03178"></a>03178 <span class="vhdlkeyword">end</span>
<a name="l03179"></a>03179 <span class="vhdlkeyword">end</span>
<a name="l03180"></a>03180
<a name="l03181"></a>03181
<a name="l03182"></a>03182 <a class="code" href="ao68000_8v.html#a14b85ce3e5b4ede3b2c4e89f420c8c3c">`ALU_BCHG_BCLR_BSET_BTST</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span> <span class="keyword">// 97 LE</span>
<a name="l03183"></a>03183 <span class="keyword">// byte</span>
<a name="l03184"></a>03184 <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] != <span class="vhdllogic">3&#39;b000</span> ) <span class="vhdlkeyword">begin</span>
<a name="l03185"></a>03185 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= ~(<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[ <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] ]);
<a name="l03186"></a>03186 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>;
<a name="l03187"></a>03187 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[ <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] ] = (<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b01</span>) ? ~(<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[ <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] ]) : (<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b10</span>) ? <span class="vhdllogic">1&#39;b0</span> : <span class="vhdllogic">1&#39;b1</span>;
<a name="l03188"></a>03188 <span class="vhdlkeyword">end</span>
<a name="l03189"></a>03189 <span class="keyword">// long</span>
<a name="l03190"></a>03190 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">5</span>:<span class="vhdllogic">3</span>] == <span class="vhdllogic">3&#39;b000</span> ) <span class="vhdlkeyword">begin</span>
<a name="l03191"></a>03191 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= ~(<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[ <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">0</span>] ]);
<a name="l03192"></a>03192 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> = <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>;
<a name="l03193"></a>03193 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[ <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">0</span>] ] = (<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b01</span>) ? ~(<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[ <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">0</span>] ]) : (<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">2&#39;b10</span>) ? <span class="vhdllogic">1&#39;b0</span> : <span class="vhdllogic">1&#39;b1</span>;
<a name="l03194"></a>03194 <span class="vhdlkeyword">end</span>
<a name="l03195"></a>03195
<a name="l03196"></a>03196 <span class="keyword">// C,V,N,X not affected</span>
<a name="l03197"></a>03197 <span class="vhdlkeyword">end</span>
<a name="l03198"></a>03198
<a name="l03199"></a>03199 <span class="keyword">// N set</span>
<a name="l03200"></a>03200 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= (<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>] == <span class="vhdllogic">1&#39;b1</span>);
<a name="l03201"></a>03201 <span class="keyword">// Z set</span>
<a name="l03202"></a>03202 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= (<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">8&#39;b0</span>);
<a name="l03203"></a>03203 <span class="vhdlkeyword">end</span>
<a name="l03204"></a>03204
<a name="l03205"></a>03205
<a name="l03206"></a>03206 <a class="code" href="ao68000_8v.html#a07c7e53af3f4995a167966ba18c2728f">`ALU_NEGX_CLR_NEG_NOT_NBCD_SWAP_EXT</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l03207"></a>03207 <span class="keyword">// NEGX / CLR / NEG / NOT</span>
<a name="l03208"></a>03208 <span class="keyword">// Optimization thanks to Frederic Requin</span>
<a name="l03209"></a>03209 <span class="vhdlkeyword">if</span> ((<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0000</span>) || (<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0010</span>) || (<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0100</span>) || (<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0110</span>))
<a name="l03210"></a>03210 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> = <span class="vhdllogic">32&#39;b0</span> - (<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] &amp; {<span class="vhdllogic">32</span>{<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">10</span>] | ~<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">9</span>]}}) - ((<a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] &amp; ~<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">10</span>] &amp; ~<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">9</span>]) | (<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">10</span>] &amp; <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">9</span>]));
<a name="l03211"></a>03211 <span class="keyword">// NBCD</span>
<a name="l03212"></a>03212 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">6&#39;b1000_00</span> ) <span class="vhdlkeyword">begin</span>
<a name="l03213"></a>03213 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] = <span class="vhdllogic">5&#39;d25</span> - <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>];
<a name="l03214"></a>03214 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>] = (<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] &gt; <span class="vhdllogic">4&#39;d9</span>) ? (<span class="vhdllogic">5&#39;d24</span> - <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>]) : (<span class="vhdllogic">5&#39;d25</span> - <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>]);
<a name="l03215"></a>03215
<a name="l03216"></a>03216 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] == <span class="vhdllogic">1&#39;b0</span> &amp;&amp; <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">4&#39;d9</span> &amp;&amp; <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>] == <span class="vhdllogic">4&#39;d9</span>) <span class="vhdlkeyword">begin</span>
<a name="l03217"></a>03217 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] = <span class="vhdllogic">4&#39;d0</span>;
<a name="l03218"></a>03218 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>] = <span class="vhdllogic">4&#39;d0</span>;
<a name="l03219"></a>03219 <span class="vhdlkeyword">end</span>
<a name="l03220"></a>03220 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] == <span class="vhdllogic">1&#39;b0</span> &amp;&amp; (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">4&#39;d9</span> || <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">4&#39;d15</span>)) <span class="vhdlkeyword">begin</span>
<a name="l03221"></a>03221 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] = <span class="vhdllogic">4&#39;d0</span>;
<a name="l03222"></a>03222 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>] = <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>] + <span class="vhdllogic">4&#39;d1</span>;
<a name="l03223"></a>03223 <span class="vhdlkeyword">end</span>
<a name="l03224"></a>03224 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>
<a name="l03225"></a>03225 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] + <span class="vhdllogic">4&#39;d1</span>;
<a name="l03226"></a>03226 <span class="vhdlkeyword">end</span>
<a name="l03227"></a>03227
<a name="l03228"></a>03228 <span class="keyword">//V undefined: unchanged</span>
<a name="l03229"></a>03229 <span class="keyword">//Z</span>
<a name="l03230"></a>03230 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &amp; <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;
<a name="l03231"></a>03231 <span class="keyword">//C,X</span>
<a name="l03232"></a>03232 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">8&#39;d0</span> &amp;&amp; <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] == <span class="vhdllogic">1&#39;b0</span>) ? <span class="vhdllogic">1&#39;b0</span> : <span class="vhdllogic">1&#39;b1</span>;
<a name="l03233"></a>03233 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] &lt;= (<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">8&#39;d0</span> &amp;&amp; <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] == <span class="vhdllogic">1&#39;b0</span>) ? <span class="vhdllogic">1&#39;b0</span> : <span class="vhdllogic">1&#39;b1</span>; <span class="keyword">//=C</span>
<a name="l03234"></a>03234 <span class="vhdlkeyword">end</span>
<a name="l03235"></a>03235 <span class="keyword">// SWAP</span>
<a name="l03236"></a>03236 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">6&#39;b1000_01</span> ) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> = { <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>], <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">16</span>] };
<a name="l03237"></a>03237 <span class="keyword">// EXT byte to word</span>
<a name="l03238"></a>03238 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">6&#39;b1000_10</span> ) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> = { <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">16</span>], {<span class="vhdllogic">8</span>{<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>]}}, <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] };
<a name="l03239"></a>03239 <span class="keyword">// EXT word to long</span>
<a name="l03240"></a>03240 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">6&#39;b1000_11</span> ) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> = { {<span class="vhdllogic">16</span>{<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">15</span>]}}, <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] };
<a name="l03241"></a>03241
<a name="l03242"></a>03242 <span class="keyword">// N set if negative else clear</span>
<a name="l03243"></a>03243 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l03244"></a>03244
<a name="l03245"></a>03245 <span class="keyword">// CLR,NOT,SWAP,EXT</span>
<a name="l03246"></a>03246 <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0010</span> || <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0110</span> || <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">6&#39;b1000_01</span> || <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">7</span>] == <span class="vhdllogic">5&#39;b1000_1</span> ) <span class="vhdlkeyword">begin</span>
<a name="l03247"></a>03247 <span class="keyword">// X not affected</span>
<a name="l03248"></a>03248 <span class="keyword">// C,V cleared</span>
<a name="l03249"></a>03249 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03250"></a>03250 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03251"></a>03251 <span class="keyword">// Z set</span>
<a name="l03252"></a>03252 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;
<a name="l03253"></a>03253 <span class="vhdlkeyword">end</span>
<a name="l03254"></a>03254 <span class="keyword">// NEGX</span>
<a name="l03255"></a>03255 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0000</span> ) <span class="vhdlkeyword">begin</span>
<a name="l03256"></a>03256 <span class="keyword">// C set if borrow</span>
<a name="l03257"></a>03257 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> | <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l03258"></a>03258 <span class="keyword">// X=C</span>
<a name="l03259"></a>03259 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] &lt;= <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> | <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l03260"></a>03260 <span class="keyword">// V set if overflow</span>
<a name="l03261"></a>03261 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l03262"></a>03262 <span class="keyword">// Z cleared if nonzero else unchanged</span>
<a name="l03263"></a>03263 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &amp; <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;
<a name="l03264"></a>03264 <span class="vhdlkeyword">end</span>
<a name="l03265"></a>03265 <span class="keyword">// NEG</span>
<a name="l03266"></a>03266 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0100</span> ) <span class="vhdlkeyword">begin</span>
<a name="l03267"></a>03267 <span class="keyword">// C clear if zero else set</span>
<a name="l03268"></a>03268 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> | <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l03269"></a>03269 <span class="keyword">// X=C</span>
<a name="l03270"></a>03270 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] &lt;= <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> | <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l03271"></a>03271 <span class="keyword">// V set if overflow</span>
<a name="l03272"></a>03272 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l03273"></a>03273 <span class="keyword">// Z set if zero else clear</span>
<a name="l03274"></a>03274 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;
<a name="l03275"></a>03275 <span class="vhdlkeyword">end</span>
<a name="l03276"></a>03276 <span class="vhdlkeyword">end</span>
<a name="l03277"></a>03277
<a name="l03278"></a>03278
<a name="l03279"></a>03279 <a class="code" href="ao68000_8v.html#a32c0e163ff437b07e40593ab59e42fe3">`ALU_SIMPLE_LONG_ADD</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l03280"></a>03280 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] + <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l03281"></a>03281
<a name="l03282"></a>03282 <span class="keyword">// CCR not affected</span>
<a name="l03283"></a>03283 <span class="vhdlkeyword">end</span>
<a name="l03284"></a>03284
<a name="l03285"></a>03285 <a class="code" href="ao68000_8v.html#aea6fee15f3d775b1a8d262490203c713">`ALU_SIMPLE_LONG_SUB</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l03286"></a>03286 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l03199"></a>03199 <a class="code" href="ao68000_8v.html#ac7de3ab6c8eec4381bde5e4f61b45761">`ALU_TAS</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l03200"></a>03200 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] &lt;= { <span class="vhdllogic">1&#39;b1</span>, <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">6</span>:<span class="vhdllogic">0</span>] };
<a name="l03201"></a>03201
<a name="l03202"></a>03202 <span class="keyword">// X not affected</span>
<a name="l03203"></a>03203 <span class="keyword">// C cleared</span>
<a name="l03204"></a>03204 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03205"></a>03205 <span class="keyword">// V cleared</span>
<a name="l03206"></a>03206 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03207"></a>03207
<a name="l03208"></a>03208 <span class="keyword">// N set</span>
<a name="l03209"></a>03209 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= (<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>] == <span class="vhdllogic">1&#39;b1</span>);
<a name="l03210"></a>03210 <span class="keyword">// Z set</span>
<a name="l03211"></a>03211 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= (<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">8&#39;b0</span>);
<a name="l03212"></a>03212 <span class="vhdlkeyword">end</span>
<a name="l03213"></a>03213
<a name="l03214"></a>03214
<a name="l03215"></a>03215 <a class="code" href="ao68000_8v.html#a07c7e53af3f4995a167966ba18c2728f">`ALU_NEGX_CLR_NEG_NOT_NBCD_SWAP_EXT</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l03216"></a>03216 <span class="keyword">// NEGX / CLR / NEG / NOT</span>
<a name="l03217"></a>03217 <span class="keyword">// Optimization thanks to Frederic Requin</span>
<a name="l03218"></a>03218 <span class="vhdlkeyword">if</span> ((<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0000</span>) || (<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0010</span>) || (<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0100</span>) || (<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0110</span>))
<a name="l03219"></a>03219 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> = <span class="vhdllogic">32&#39;b0</span> - (<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] &amp; {<span class="vhdllogic">32</span>{<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">10</span>] | ~<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">9</span>]}}) - ((<a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] &amp; ~<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">10</span>] &amp; ~<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">9</span>]) | (<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">10</span>] &amp; <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">9</span>]));
<a name="l03220"></a>03220 <span class="keyword">// NBCD</span>
<a name="l03221"></a>03221 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">6&#39;b1000_00</span> ) <span class="vhdlkeyword">begin</span>
<a name="l03222"></a>03222 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] = <span class="vhdllogic">5&#39;d25</span> - <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>];
<a name="l03223"></a>03223 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>] = (<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] &gt; <span class="vhdllogic">4&#39;d9</span>) ? (<span class="vhdllogic">5&#39;d24</span> - <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>]) : (<span class="vhdllogic">5&#39;d25</span> - <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>]);
<a name="l03224"></a>03224
<a name="l03225"></a>03225 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] == <span class="vhdllogic">1&#39;b0</span> &amp;&amp; <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">4&#39;d9</span> &amp;&amp; <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>] == <span class="vhdllogic">4&#39;d9</span>) <span class="vhdlkeyword">begin</span>
<a name="l03226"></a>03226 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] = <span class="vhdllogic">4&#39;d0</span>;
<a name="l03227"></a>03227 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>] = <span class="vhdllogic">4&#39;d0</span>;
<a name="l03228"></a>03228 <span class="vhdlkeyword">end</span>
<a name="l03229"></a>03229 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] == <span class="vhdllogic">1&#39;b0</span> &amp;&amp; (<a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">4&#39;d9</span> || <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">4&#39;d15</span>)) <span class="vhdlkeyword">begin</span>
<a name="l03230"></a>03230 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] = <span class="vhdllogic">4&#39;d0</span>;
<a name="l03231"></a>03231 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>] = <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">4</span>] + <span class="vhdllogic">4&#39;d1</span>;
<a name="l03232"></a>03232 <span class="vhdlkeyword">end</span>
<a name="l03233"></a>03233 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>
<a name="l03234"></a>03234 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] = <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] + <span class="vhdllogic">4&#39;d1</span>;
<a name="l03235"></a>03235 <span class="vhdlkeyword">end</span>
<a name="l03236"></a>03236
<a name="l03237"></a>03237 <span class="keyword">//V undefined: unchanged</span>
<a name="l03238"></a>03238 <span class="keyword">//Z</span>
<a name="l03239"></a>03239 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &amp; <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;
<a name="l03240"></a>03240 <span class="keyword">//C,X</span>
<a name="l03241"></a>03241 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= (<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">8&#39;d0</span> &amp;&amp; <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] == <span class="vhdllogic">1&#39;b0</span>) ? <span class="vhdllogic">1&#39;b0</span> : <span class="vhdllogic">1&#39;b1</span>;
<a name="l03242"></a>03242 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] &lt;= (<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">8&#39;d0</span> &amp;&amp; <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] == <span class="vhdllogic">1&#39;b0</span>) ? <span class="vhdllogic">1&#39;b0</span> : <span class="vhdllogic">1&#39;b1</span>; <span class="keyword">//=C</span>
<a name="l03243"></a>03243 <span class="vhdlkeyword">end</span>
<a name="l03244"></a>03244 <span class="keyword">// SWAP</span>
<a name="l03245"></a>03245 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">6&#39;b1000_01</span> ) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> = { <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>], <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">16</span>] };
<a name="l03246"></a>03246 <span class="keyword">// EXT byte to word</span>
<a name="l03247"></a>03247 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">6&#39;b1000_10</span> ) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> = { <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">16</span>], {<span class="vhdllogic">8</span>{<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>]}}, <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] };
<a name="l03248"></a>03248 <span class="keyword">// EXT word to long</span>
<a name="l03249"></a>03249 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">6&#39;b1000_11</span> ) <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> = { {<span class="vhdllogic">16</span>{<a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">15</span>]}}, <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] };
<a name="l03250"></a>03250
<a name="l03251"></a>03251 <span class="keyword">// N set if negative else clear</span>
<a name="l03252"></a>03252 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">3</span>] &lt;= <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l03253"></a>03253
<a name="l03254"></a>03254 <span class="keyword">// CLR,NOT,SWAP,EXT</span>
<a name="l03255"></a>03255 <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0010</span> || <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0110</span> || <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">6</span>] == <span class="vhdllogic">6&#39;b1000_01</span> || <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">7</span>] == <span class="vhdllogic">5&#39;b1000_1</span> ) <span class="vhdlkeyword">begin</span>
<a name="l03256"></a>03256 <span class="keyword">// X not affected</span>
<a name="l03257"></a>03257 <span class="keyword">// C,V cleared</span>
<a name="l03258"></a>03258 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03259"></a>03259 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l03260"></a>03260 <span class="keyword">// Z set</span>
<a name="l03261"></a>03261 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;
<a name="l03262"></a>03262 <span class="vhdlkeyword">end</span>
<a name="l03263"></a>03263 <span class="keyword">// NEGX</span>
<a name="l03264"></a>03264 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0000</span> ) <span class="vhdlkeyword">begin</span>
<a name="l03265"></a>03265 <span class="keyword">// C set if borrow</span>
<a name="l03266"></a>03266 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> | <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l03267"></a>03267 <span class="keyword">// X=C</span>
<a name="l03268"></a>03268 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] &lt;= <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> | <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l03269"></a>03269 <span class="keyword">// V set if overflow</span>
<a name="l03270"></a>03270 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l03271"></a>03271 <span class="keyword">// Z cleared if nonzero else unchanged</span>
<a name="l03272"></a>03272 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &amp; <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;
<a name="l03273"></a>03273 <span class="vhdlkeyword">end</span>
<a name="l03274"></a>03274 <span class="keyword">// NEG</span>
<a name="l03275"></a>03275 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( <a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] == <span class="vhdllogic">4&#39;b0100</span> ) <span class="vhdlkeyword">begin</span>
<a name="l03276"></a>03276 <span class="keyword">// C clear if zero else set</span>
<a name="l03277"></a>03277 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">0</span>] &lt;= <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> | <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l03278"></a>03278 <span class="keyword">// X=C</span>
<a name="l03279"></a>03279 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">4</span>] &lt;= <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> | <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l03280"></a>03280 <span class="keyword">// V set if overflow</span>
<a name="l03281"></a>03281 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">1</span>] &lt;= <a class="code" href="classalu.html#a09fdad5ef76ddc7865c6e3a9cfc09123">`Dm</a><span class="vhdlchar"></span> &amp; <a class="code" href="classalu.html#a942f3773659fb9e9e38101743237144a">`Rm</a><span class="vhdlchar"></span>;
<a name="l03282"></a>03282 <span class="keyword">// Z set if zero else clear</span>
<a name="l03283"></a>03283 <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">2</span>] &lt;= <a class="code" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">`Z</a><span class="vhdlchar"></span>;
<a name="l03284"></a>03284 <span class="vhdlkeyword">end</span>
<a name="l03285"></a>03285 <span class="vhdlkeyword">end</span>
<a name="l03286"></a>03286
<a name="l03287"></a>03287
<a name="l03288"></a>03288 <span class="keyword">// CCR not affected</span>
<a name="l03289"></a>03289 <span class="vhdlkeyword">end</span>
<a name="l03288"></a>03288 <a class="code" href="ao68000_8v.html#a32c0e163ff437b07e40593ab59e42fe3">`ALU_SIMPLE_LONG_ADD</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l03289"></a>03289 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] + <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l03290"></a>03290
<a name="l03291"></a>03291 <a class="code" href="ao68000_8v.html#a5083d98f4b785fe7af85ba1114f678ff">`ALU_MOVE_TO_CCR_SR_RTE_RTR_STOP_LOGIC_TO_CCR_SR</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l03292"></a>03292
<a name="l03293"></a>03293 <span class="keyword">// MOVE TO SR,RTE,STOP,ORI to SR,ANDI to SR,EORI to SR</span>
<a name="l03294"></a>03294 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">16</span>]) <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a> &lt;= { <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">15</span>], <span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">13</span>], <span class="vhdllogic">2&#39;b0</span>, <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">8</span>], <span class="vhdllogic">3&#39;b0</span>, <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">0</span>] };
<a name="l03295"></a>03295 <span class="keyword">// MOVE TO CCR,RTR,ORI to CCR,ANDI to CCR,EORI to CCR</span>
<a name="l03296"></a>03296 <span class="vhdlkeyword">else</span> <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a> &lt;= { <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>], <span class="vhdllogic">3&#39;b0</span>, <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">0</span>] };
<a name="l03297"></a>03297 <span class="vhdlkeyword">end</span>
<a name="l03298"></a>03298
<a name="l03299"></a>03299 <a class="code" href="ao68000_8v.html#ab6d6f774c41848f9c33c7b393620be2d">`ALU_SIMPLE_MOVE</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l03300"></a>03300 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>;
<a name="l03301"></a>03301
<a name="l03302"></a>03302 <span class="keyword">// CCR not affected</span>
<a name="l03303"></a>03303 <span class="vhdlkeyword">end</span>
<a name="l03304"></a>03304
<a name="l03305"></a>03305 <a class="code" href="ao68000_8v.html#ac439a8b79bd4b213f0f33172bd5e5a73">`ALU_LINK_MOVE</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l03306"></a>03306 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">3&#39;b111</span>) <span class="vhdlkeyword">begin</span>
<a name="l03307"></a>03307 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a> - <span class="vhdllogic">32&#39;d4</span>;
<a name="l03308"></a>03308 <span class="vhdlkeyword">end</span>
<a name="l03309"></a>03309 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l03310"></a>03310 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>;
<a name="l03311"></a>03311 <span class="vhdlkeyword">end</span>
<a name="l03312"></a>03312
<a name="l03313"></a>03313 <span class="keyword">// CCR not affected</span>
<a name="l03314"></a>03314 <span class="vhdlkeyword">end</span>
<a name="l03315"></a>03315
<a name="l03316"></a>03316 <span class="vhdlkeyword">endcase</span>
<a name="l03317"></a>03317 <span class="vhdlkeyword">end</span>
<a name="l03318"></a>03318 <span class="vhdlkeyword">end</span>
<a name="l03291"></a>03291 <span class="keyword">// CCR not affected</span>
<a name="l03292"></a>03292 <span class="vhdlkeyword">end</span>
<a name="l03293"></a>03293
<a name="l03294"></a>03294 <a class="code" href="ao68000_8v.html#aea6fee15f3d775b1a8d262490203c713">`ALU_SIMPLE_LONG_SUB</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l03295"></a>03295 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] - <a class="code" href="classalu.html#a9f8815596ab2b013c85f9f7add9ca14b">operand2</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l03296"></a>03296
<a name="l03297"></a>03297 <span class="keyword">// CCR not affected</span>
<a name="l03298"></a>03298 <span class="vhdlkeyword">end</span>
<a name="l03299"></a>03299
<a name="l03300"></a>03300 <a class="code" href="ao68000_8v.html#a5083d98f4b785fe7af85ba1114f678ff">`ALU_MOVE_TO_CCR_SR_RTE_RTR_STOP_LOGIC_TO_CCR_SR</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l03301"></a>03301
<a name="l03302"></a>03302 <span class="keyword">// MOVE TO SR,RTE,STOP,ORI to SR,ANDI to SR,EORI to SR</span>
<a name="l03303"></a>03303 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a290176de350bb9535f4186f96eeb4ba3">decoder_alu_reg</a>[<span class="vhdllogic">16</span>]) <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a> &lt;= { <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">15</span>], <span class="vhdllogic">1&#39;b0</span>, <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">13</span>], <span class="vhdllogic">2&#39;b0</span>, <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">10</span>:<span class="vhdllogic">8</span>], <span class="vhdllogic">3&#39;b0</span>, <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">0</span>] };
<a name="l03304"></a>03304 <span class="keyword">// MOVE TO CCR,RTR,ORI to CCR,ANDI to CCR,EORI to CCR</span>
<a name="l03305"></a>03305 <span class="vhdlkeyword">else</span> <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a> &lt;= { <a class="code" href="classalu.html#a1432b02bc905189b2e869fd30ce1e0b6">sr</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>], <span class="vhdllogic">3&#39;b0</span>, <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>[<span class="vhdllogic">4</span>:<span class="vhdllogic">0</span>] };
<a name="l03306"></a>03306 <span class="vhdlkeyword">end</span>
<a name="l03307"></a>03307
<a name="l03308"></a>03308 <a class="code" href="ao68000_8v.html#ab6d6f774c41848f9c33c7b393620be2d">`ALU_SIMPLE_MOVE</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l03309"></a>03309 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>;
<a name="l03310"></a>03310
<a name="l03311"></a>03311 <span class="keyword">// CCR not affected</span>
<a name="l03312"></a>03312 <span class="vhdlkeyword">end</span>
<a name="l03313"></a>03313
<a name="l03314"></a>03314 <a class="code" href="ao68000_8v.html#ac439a8b79bd4b213f0f33172bd5e5a73">`ALU_LINK_MOVE</a><span class="vhdlchar"></span>: <span class="vhdlkeyword">begin</span>
<a name="l03315"></a>03315 <span class="vhdlkeyword">if</span>(<a class="code" href="classalu.html#a39ca5d8f12e053ccfd9ee7f131291e1e">ir</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">3&#39;b111</span>) <span class="vhdlkeyword">begin</span>
<a name="l03316"></a>03316 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a> - <span class="vhdllogic">32&#39;d4</span>;
<a name="l03317"></a>03317 <span class="vhdlkeyword">end</span>
<a name="l03318"></a>03318 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l03319"></a>03319 <a class="code" href="classalu.html#ad869ff0f455bd2bdcea8d232e72beecd">result</a> &lt;= <a class="code" href="classalu.html#a31ec6d555af040fbc75434758413148a">operand1</a>;
<a name="l03320"></a>03320 <span class="vhdlkeyword">end</span>
<a name="l03321"></a>03321
<a name="l03322"></a>03322 <span class="keyword">// CCR not affected</span>
<a name="l03323"></a>03323 <span class="vhdlkeyword">end</span>
<a name="l03324"></a>03324
<a name="l03325"></a>03325 <span class="vhdlkeyword">endcase</span>
<a name="l03326"></a>03326 <span class="vhdlkeyword">end</span>
<a name="l03327"></a>03327 <span class="vhdlkeyword">end</span>
</pre></div>
</div>
</div>
757,7 → 765,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02626">2626</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02627">2627</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
772,7 → 780,7
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<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02627">2627</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02628">2628</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
787,7 → 795,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02630">2630</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02631">2631</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
802,7 → 810,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02632">2632</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02633">2633</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
817,7 → 825,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02634">2634</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02635">2635</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
832,7 → 840,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02636">2636</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02637">2637</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
847,7 → 855,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02637">2637</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02638">2638</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
862,7 → 870,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02639">2639</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02640">2640</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
877,7 → 885,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02640">2640</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02641">2641</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
892,7 → 900,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02642">2642</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02643">2643</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
907,7 → 915,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02643">2643</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02644">2644</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
922,7 → 930,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02645">2645</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02646">2646</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
937,7 → 945,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02646">2646</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02647">2647</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
952,7 → 960,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02647">2647</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02648">2648</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
967,7 → 975,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02658">2658</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02659">2659</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
982,7 → 990,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02661">2661</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02662">2662</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
997,7 → 1005,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02662">2662</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02663">2663</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
1012,7 → 1020,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02663">2663</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02664">2664</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
1027,7 → 1035,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02663">2663</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02664">2664</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
1042,7 → 1050,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02666">2666</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02667">2667</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
1057,7 → 1065,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02669">2669</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02670">2670</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
1072,7 → 1080,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02675">2675</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02676">2676</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
1087,7 → 1095,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02681">2681</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02682">2682</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
1102,7 → 1110,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02734">2734</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02735">2735</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
1117,7 → 1125,7
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<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02765">2765</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02766">2766</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02766">2766</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02767">2767</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02769">2769</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02770">2770</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02771">2771</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02772">2772</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02757">2757</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02758">2758</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02736">2736</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02737">2737</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02759">2759</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02760">2760</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02755">2755</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02756">2756</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02761">2761</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02762">2762</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<li><a class="el" href="ao68000_8v_source.html">ao68000.v</a></li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/hierarchy.html
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</li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/functions_vars_0x70.html
106,7 → 106,7
</li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/globals_vars_0x6f.html
134,7 → 134,7
</li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:04 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/page_old_notes.html
1377,7 → 1377,7
 
 
</pre></div> </div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/globals_0x7a.html
57,7 → 57,7
</li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:04 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/classmemory__registers.html
92,7 → 92,7
</ul>
<p>Currently this module contains <em>altsyncram</em> instantiations from Altera Megafunction/LPM library. </p>
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02059">2059</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02060">2060</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<hr/><h2>Member Function Documentation</h2>
<a class="anchor" id="a833db0d5eda614d712b846b259c0f4d3"></a><!-- doxytag: member="memory_registers::ALWAYS_30" ref="a833db0d5eda614d712b846b259c0f4d3" args="clock, reset_n" -->
<div class="memitem">
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02092">2092</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02093">2093</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<div class="fragment"><pre class="fragment">
<a name="l02092"></a>02092 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classmemory__registers.html#a4d664c63ba14fa2b1664eb44203191fa">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classmemory__registers.html#a431adf2f23f5aaf563824a502920385e">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l02093"></a>02093 <span class="vhdlkeyword">if</span>(<a class="code" href="classmemory__registers.html#a431adf2f23f5aaf563824a502920385e">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <a class="code" href="classmemory__registers.html#aa2114065af0aee3f968f55ab8d0cdd32">usp</a> &lt;= <span class="vhdllogic">32&#39;d0</span>;
<a name="l02094"></a>02094 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classmemory__registers.html#a8d14d4f6f8c5706382c7f69b9e372660">An_address</a> == <span class="vhdllogic">4&#39;b0111</span> &amp;&amp; <a class="code" href="classmemory__registers.html#a388c5aa2ed803d7f8fe0de1afc4ce0b3">An_write_enable</a>) <a class="code" href="classmemory__registers.html#aa2114065af0aee3f968f55ab8d0cdd32">usp</a> &lt;= <a class="code" href="classmemory__registers.html#ada61c344785639f1dff0853342ffc0e2">An_input</a>;
<a name="l02095"></a>02095 <span class="vhdlkeyword">end</span>
<a name="l02093"></a>02093 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classmemory__registers.html#a4d664c63ba14fa2b1664eb44203191fa">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classmemory__registers.html#a431adf2f23f5aaf563824a502920385e">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l02094"></a>02094 <span class="vhdlkeyword">if</span>(<a class="code" href="classmemory__registers.html#a431adf2f23f5aaf563824a502920385e">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <a class="code" href="classmemory__registers.html#aa2114065af0aee3f968f55ab8d0cdd32">usp</a> &lt;= <span class="vhdllogic">32&#39;d0</span>;
<a name="l02095"></a>02095 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classmemory__registers.html#a8d14d4f6f8c5706382c7f69b9e372660">An_address</a> == <span class="vhdllogic">4&#39;b0111</span> &amp;&amp; <a class="code" href="classmemory__registers.html#a388c5aa2ed803d7f8fe0de1afc4ce0b3">An_write_enable</a>) <a class="code" href="classmemory__registers.html#aa2114065af0aee3f968f55ab8d0cdd32">usp</a> &lt;= <a class="code" href="classmemory__registers.html#ada61c344785639f1dff0853342ffc0e2">An_input</a>;
<a name="l02096"></a>02096 <span class="vhdlkeyword">end</span>
</pre></div>
</div>
</div>
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02060">2060</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02061">2061</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02061">2061</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02062">2062</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02064">2064</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02065">2065</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02065">2065</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02066">2066</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02066">2066</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02067">2067</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02067">2067</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02068">2068</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02069">2069</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02070">2070</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02071">2071</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02072">2072</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02072">2072</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02073">2073</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02073">2073</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02074">2074</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02075">2075</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02076">2076</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02076">2076</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02077">2077</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02078">2078</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02079">2079</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02079">2079</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02080">2080</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02082">2082</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02083">2083</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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359,7 → 359,7
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<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02084">2084</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02085">2085</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02087">2087</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02088">2088</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02130">2130</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02131">2131</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02114">2114</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02115">2115</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02098">2098</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02099">2099</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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427,7 → 427,7
<li><a class="el" href="ao68000_8v_source.html">ao68000.v</a></li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:04 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/functions_vars_0x66.html
95,7 → 95,7
</li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/functions_0x64.html
161,7 → 161,7
</li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/group__blocked__o.html
27,7 → 27,7
</table>
<p>Processor blocked indicator. The processor is blocked after a double bus error. </p>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/functions_0x76.html
73,7 → 73,7
</li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/globals_vars_0x72.html
62,7 → 62,7
</li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:04 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/classalu-members.html
67,7 → 67,7
<tr class="memlist"><td><a class="el" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">Sm</a></td><td><a class="el" href="classalu.html">alu</a></td><td><code> [Define]</code></td></tr>
<tr class="memlist"><td><a class="el" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">Z</a></td><td><a class="el" href="classalu.html">alu</a></td><td><code> [Define]</code></td></tr>
</table></div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/functions_vars_0x6a.html
72,7 → 72,7
</li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/globals_0x73.html
99,7 → 99,7
</li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:04 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/functions_0x7a.html
68,7 → 68,7
</li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/functions.html
228,7 → 228,7
</li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/globals_0x69.html
78,7 → 78,7
</li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:04 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/classmemory__registers-members.html
53,7 → 53,7
<tr class="memlist"><td><a class="el" href="classmemory__registers.html#afc54073a43b749eb1f1376c4b31cd1e3">altsyncram</a></td><td><a class="el" href="classmemory__registers.html">memory_registers</a></td><td><code> [Module Instance]</code></td></tr>
<tr class="memlist"><td><a class="el" href="classmemory__registers.html#a833db0d5eda614d712b846b259c0f4d3">ALWAYS_30</a>clock, reset_n</td><td><a class="el" href="classmemory__registers.html">memory_registers</a></td><td><code> [Always Construct]</code></td></tr>
</table></div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:04 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/group__SGL__O.html
27,7 → 27,7
</table>
<p>WISHBONE Cycle Tag, TAG_TYPE: TGC_O, Single Bus Cycle. </p>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/classbus__control.html
141,7 → 141,7
<li>reset output, high when processing the RESET instruction. Can be used to reset external devices. </li>
</ul>
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00757">757</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00758">758</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<hr/><h2>Member Function Documentation</h2>
<a class="anchor" id="ad06cdf24c29b1b82596011bac2c9169c"></a><!-- doxytag: member="bus_control::ALWAYS_0" ref="ad06cdf24c29b1b82596011bac2c9169c" args="CLK_I, reset_n" -->
<div class="memitem">
162,25 → 162,25
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00886">886</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00887">887</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<div class="fragment"><pre class="fragment">
<a name="l00886"></a>00886 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classbus__control.html#a4054e75175a8d9a78f2e34150e1c0465">CLK_I</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classbus__control.html#a7c0d04a169a341f11af2b012abd481b3">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l00887"></a>00887 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#a7c0d04a169a341f11af2b012abd481b3">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>
<a name="l00888"></a>00888 <span class="vhdlchar">interrupt_mask_o</span> &lt;= <span class="vhdllogic">3&#39;b000</span>;
<a name="l00889"></a>00889 <a class="code" href="classbus__control.html#a18d43f989323778008d066233ddaa191">last_interrupt_mask</a> &lt;= <span class="vhdllogic">3&#39;b000</span>;
<a name="l00890"></a>00890 <span class="vhdlkeyword">end</span>
<a name="l00891"></a>00891 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#a93ed536c4b75b18958ffa28838ae5957">ipl_i</a> &gt; <span class="vhdlchar">ipm_i</span> &amp;&amp; <span class="vhdlchar">do_interrupt_i</span> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>
<a name="l00892"></a>00892 <span class="vhdlchar">interrupt_mask_o</span> &lt;= <a class="code" href="classbus__control.html#a93ed536c4b75b18958ffa28838ae5957">ipl_i</a>;
<a name="l00893"></a>00893 <a class="code" href="classbus__control.html#a18d43f989323778008d066233ddaa191">last_interrupt_mask</a> &lt;= <span class="vhdlchar">interrupt_mask_o</span>;
<a name="l00894"></a>00894 <span class="vhdlkeyword">end</span>
<a name="l00895"></a>00895 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_interrupt_i</span> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l00896"></a>00896 <span class="vhdlchar">interrupt_mask_o</span> &lt;= <a class="code" href="classbus__control.html#a18d43f989323778008d066233ddaa191">last_interrupt_mask</a>;
<a name="l00897"></a>00897 <span class="vhdlkeyword">end</span>
<a name="l00898"></a>00898 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l00899"></a>00899 <span class="vhdlchar">interrupt_mask_o</span> &lt;= <span class="vhdllogic">3&#39;b000</span>;
<a name="l00900"></a>00900 <a class="code" href="classbus__control.html#a18d43f989323778008d066233ddaa191">last_interrupt_mask</a> &lt;= <span class="vhdllogic">3&#39;b000</span>;
<a name="l00901"></a>00901 <span class="vhdlkeyword">end</span>
<a name="l00902"></a>00902 <span class="vhdlkeyword">end</span>
<a name="l00887"></a>00887 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classbus__control.html#a4054e75175a8d9a78f2e34150e1c0465">CLK_I</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classbus__control.html#a7c0d04a169a341f11af2b012abd481b3">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l00888"></a>00888 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#a7c0d04a169a341f11af2b012abd481b3">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>
<a name="l00889"></a>00889 <span class="vhdlchar">interrupt_mask_o</span> &lt;= <span class="vhdllogic">3&#39;b000</span>;
<a name="l00890"></a>00890 <a class="code" href="classbus__control.html#a18d43f989323778008d066233ddaa191">last_interrupt_mask</a> &lt;= <span class="vhdllogic">3&#39;b000</span>;
<a name="l00891"></a>00891 <span class="vhdlkeyword">end</span>
<a name="l00892"></a>00892 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#a93ed536c4b75b18958ffa28838ae5957">ipl_i</a> &gt; <span class="vhdlchar">ipm_i</span> &amp;&amp; <span class="vhdlchar">do_interrupt_i</span> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>
<a name="l00893"></a>00893 <span class="vhdlchar">interrupt_mask_o</span> &lt;= <a class="code" href="classbus__control.html#a93ed536c4b75b18958ffa28838ae5957">ipl_i</a>;
<a name="l00894"></a>00894 <a class="code" href="classbus__control.html#a18d43f989323778008d066233ddaa191">last_interrupt_mask</a> &lt;= <span class="vhdlchar">interrupt_mask_o</span>;
<a name="l00895"></a>00895 <span class="vhdlkeyword">end</span>
<a name="l00896"></a>00896 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_interrupt_i</span> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l00897"></a>00897 <span class="vhdlchar">interrupt_mask_o</span> &lt;= <a class="code" href="classbus__control.html#a18d43f989323778008d066233ddaa191">last_interrupt_mask</a>;
<a name="l00898"></a>00898 <span class="vhdlkeyword">end</span>
<a name="l00899"></a>00899 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l00900"></a>00900 <span class="vhdlchar">interrupt_mask_o</span> &lt;= <span class="vhdllogic">3&#39;b000</span>;
<a name="l00901"></a>00901 <a class="code" href="classbus__control.html#a18d43f989323778008d066233ddaa191">last_interrupt_mask</a> &lt;= <span class="vhdllogic">3&#39;b000</span>;
<a name="l00902"></a>00902 <span class="vhdlkeyword">end</span>
<a name="l00903"></a>00903 <span class="vhdlkeyword">end</span>
</pre></div>
</div>
</div>
203,710 → 203,710
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00906">906</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00907">907</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<div class="fragment"><pre class="fragment">
<a name="l00906"></a>00906 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classbus__control.html#a4054e75175a8d9a78f2e34150e1c0465">CLK_I</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classbus__control.html#a7c0d04a169a341f11af2b012abd481b3">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l00907"></a>00907 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#a7c0d04a169a341f11af2b012abd481b3">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>
<a name="l00908"></a>00908 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>;
<a name="l00909"></a>00909 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <span class="vhdllogic">8&#39;d0</span>;
<a name="l00910"></a>00910 <span class="vhdlchar">prefetch_ir_valid_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00911"></a>00911 <span class="vhdlchar">prefetch_ir_valid_32_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00912"></a>00912 <span class="vhdlchar">prefetch_ir_valid_80_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00913"></a>00913
<a name="l00914"></a>00914 <span class="vhdlchar">jmp_address_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00915"></a>00915 <span class="vhdlchar">jmp_bus_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00916"></a>00916
<a name="l00917"></a>00917 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00918"></a>00918 <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> &lt;= <span class="vhdllogic">30&#39;d0</span>;
<a name="l00919"></a>00919 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> &lt;= <span class="vhdllogic">32&#39;d0</span>;
<a name="l00920"></a>00920 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b0</span>;
<a name="l00921"></a>00921 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00922"></a>00922 <a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00923"></a>00923 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00924"></a>00924 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00925"></a>00925 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00926"></a>00926 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <span class="vhdllogic">3&#39;d0</span>;
<a name="l00927"></a>00927 <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a> &lt;= <span class="vhdllogic">3&#39;d0</span>;
<a name="l00928"></a>00928 <a class="code" href="classbus__control.html#a139d4b4c2d79d749375db4dd71f3a9fd">reset_o</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00929"></a>00929 <span class="vhdlchar">blocked_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00930"></a>00930 <span class="vhdlchar">data_read_o</span> &lt;= <span class="vhdllogic">32&#39;d0</span>;
<a name="l00931"></a>00931 <span class="vhdlchar">finished_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00932"></a>00932 <span class="vhdlchar">rw_state_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00933"></a>00933 <span class="vhdlchar">fc_state_o</span> &lt;= <span class="vhdllogic">3&#39;d0</span>;
<a name="l00934"></a>00934 <span class="vhdlchar">fault_address_state_o</span> &lt;= <span class="vhdllogic">32&#39;d0</span>;
<a name="l00935"></a>00935 <a class="code" href="classbus__control.html#a9d1ac811b477c31c0d6aec541dca418d">saved_pc_change</a> &lt;= <span class="vhdllogic">2&#39;b0</span>;
<a name="l00936"></a>00936 <a class="code" href="classbus__control.html#af4b71c6c152246795fcfed45e67bab33">reset_counter</a> &lt;= <span class="vhdllogic">8&#39;d0</span>;
<a name="l00937"></a>00937 <span class="vhdlkeyword">end</span>
<a name="l00938"></a>00938 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l00939"></a>00939 <span class="vhdlkeyword">case</span>(<a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a>)
<a name="l00940"></a>00940 <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>: <span class="vhdlkeyword">begin</span>
<a name="l00941"></a>00941 <span class="vhdlchar">finished_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00942"></a>00942 <span class="vhdlchar">jmp_address_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00943"></a>00943 <span class="vhdlchar">jmp_bus_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00944"></a>00944 <a class="code" href="classbus__control.html#a139d4b4c2d79d749375db4dd71f3a9fd">reset_o</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00945"></a>00945 <span class="vhdlchar">blocked_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00946"></a>00946
<a name="l00947"></a>00947 <span class="keyword">// block</span>
<a name="l00948"></a>00948 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_blocked_i</span> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l00949"></a>00949 <span class="vhdlchar">blocked_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l00950"></a>00950 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a2545a07988315cbf68e808af80333335">S_BLOCKED</a>;
<a name="l00951"></a>00951 <span class="vhdlkeyword">end</span>
<a name="l00952"></a>00952 <span class="keyword">// reset</span>
<a name="l00953"></a>00953 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_reset_i</span> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l00954"></a>00954 <a class="code" href="classbus__control.html#a139d4b4c2d79d749375db4dd71f3a9fd">reset_o</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l00955"></a>00955 <a class="code" href="classbus__control.html#af4b71c6c152246795fcfed45e67bab33">reset_counter</a> &lt;= <span class="vhdllogic">8&#39;d124</span>;
<a name="l00956"></a>00956 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a8e24d83b04e325557b534b6fbe3c06ca">S_RESET</a>;
<a name="l00957"></a>00957 <span class="vhdlkeyword">end</span>
<a name="l00958"></a>00958 <span class="keyword">// read</span>
<a name="l00959"></a>00959 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_read_i</span> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l00960"></a>00960 <a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00961"></a>00961 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">supervisor_i</span> == <span class="vhdllogic">1&#39;b1</span>) <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a> &lt;= (<span class="vhdlchar">address_type_i</span> == <span class="vhdllogic">1&#39;b0</span>) ? <a class="code" href="classbus__control.html#a6cb25547c77c5085562bd0ace17d08a4">FC_SUPERVISOR_DATA</a> : <a class="code" href="classbus__control.html#a1dc6742718597d6e0ef98e8200bb49bf">FC_SUPERVISOR_PROGRAM</a>;
<a name="l00962"></a>00962 <span class="vhdlkeyword">else</span> <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a> &lt;= (<span class="vhdlchar">address_type_i</span> == <span class="vhdllogic">1&#39;b0</span>) ? <a class="code" href="classbus__control.html#abd13c1b70988aa3f59e1d9cc23e62eb2">FC_USER_DATA</a> : <a class="code" href="classbus__control.html#a80b93f8634a7f03a199836a78c52d9bb">FC_USER_PROGRAM</a>;
<a name="l00963"></a>00963
<a name="l00964"></a>00964 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; (<span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b0</span>)) <span class="vhdlkeyword">begin</span> <span class="keyword">// WORD or LONG WORD</span>
<a name="l00965"></a>00965 <span class="vhdlchar">fault_address_state_o</span> &lt;= <span class="vhdlchar">address_i</span>;
<a name="l00966"></a>00966 <span class="vhdlchar">rw_state_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l00967"></a>00967 <span class="vhdlchar">fc_state_o</span> &lt;= (<span class="vhdlchar">supervisor_i</span> == <span class="vhdllogic">1&#39;b1</span>) ? ((<span class="vhdlchar">address_type_i</span> == <span class="vhdllogic">1&#39;b0</span>) ? <a class="code" href="classbus__control.html#a6cb25547c77c5085562bd0ace17d08a4">FC_SUPERVISOR_DATA</a> : <a class="code" href="classbus__control.html#a1dc6742718597d6e0ef98e8200bb49bf">FC_SUPERVISOR_PROGRAM</a>) :
<a name="l00968"></a>00968 ((<span class="vhdlchar">address_type_i</span> == <span class="vhdllogic">1&#39;b0</span>) ? <a class="code" href="classbus__control.html#abd13c1b70988aa3f59e1d9cc23e62eb2">FC_USER_DATA</a> : <a class="code" href="classbus__control.html#a80b93f8634a7f03a199836a78c52d9bb">FC_USER_PROGRAM</a>);
<a name="l00969"></a>00969 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <a class="code" href="classbus__control.html#a16c432fa4a9897426aab6df04ee608e0">VECTOR_ADDRESS_TRAP</a>;
<a name="l00970"></a>00970
<a name="l00971"></a>00971 <span class="vhdlchar">jmp_address_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l00972"></a>00972 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l00973"></a>00973 <span class="vhdlkeyword">end</span>
<a name="l00974"></a>00974 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l00975"></a>00975 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l00976"></a>00976 <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> &lt;= <span class="vhdlchar">address_i</span>[<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>];
<a name="l00977"></a>00977 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= (<span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b00</span>)? <span class="vhdllogic">4&#39;b1000</span> :
<a name="l00978"></a>00978 (<span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b01</span>)? <span class="vhdllogic">4&#39;b0100</span> :
<a name="l00979"></a>00979 (<span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span>)? <span class="vhdllogic">4&#39;b0010</span> :
<a name="l00980"></a>00980 (<span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b11</span>)? <span class="vhdllogic">4&#39;b0001</span> :
<a name="l00981"></a>00981 (<span class="vhdlchar">size_i</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">2&#39;b0</span>)? <span class="vhdllogic">4&#39;b1100</span> :
<a name="l00982"></a>00982 (<span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b0</span> &amp;&amp; <span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">2&#39;b1</span>)? <span class="vhdllogic">4&#39;b0011</span> :
<a name="l00983"></a>00983 <span class="vhdllogic">4&#39;b1111</span>;
<a name="l00984"></a>00984 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l00985"></a>00985
<a name="l00986"></a>00986 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">read_modify_write_i</span> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l00987"></a>00987 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00988"></a>00988 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00989"></a>00989 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l00990"></a>00990 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
<a name="l00991"></a>00991 <span class="vhdlkeyword">end</span>
<a name="l00992"></a>00992 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l00993"></a>00993 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00994"></a>00994 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l00995"></a>00995 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00996"></a>00996 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a9c7e8a6d030ee1f404d7526ebda509ca">CTI_INCR_CYCLE</a>;
<a name="l00997"></a>00997 <span class="vhdlkeyword">end</span>
<a name="l00998"></a>00998 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l00999"></a>00999 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01000"></a>01000 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01001"></a>01001 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01002"></a>01002 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
<a name="l01003"></a>01003 <span class="vhdlkeyword">end</span>
<a name="l01004"></a>01004
<a name="l01005"></a>01005 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#af752b2515eb632068e26865f1569598c">S_READ_1</a>;
<a name="l01006"></a>01006 <span class="vhdlkeyword">end</span>
<a name="l01007"></a>01007 <span class="vhdlkeyword">end</span>
<a name="l01008"></a>01008 <span class="keyword">// write</span>
<a name="l01009"></a>01009 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_write_i</span> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01010"></a>01010 <a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01011"></a>01011 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">supervisor_i</span> == <span class="vhdllogic">1&#39;b1</span>) <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a> &lt;= <a class="code" href="classbus__control.html#a6cb25547c77c5085562bd0ace17d08a4">FC_SUPERVISOR_DATA</a>;
<a name="l01012"></a>01012 <span class="vhdlkeyword">else</span> <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a> &lt;= <a class="code" href="classbus__control.html#abd13c1b70988aa3f59e1d9cc23e62eb2">FC_USER_DATA</a>;
<a name="l01013"></a>01013
<a name="l01014"></a>01014 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span> <span class="keyword">// WORD or LONG WORD</span>
<a name="l01015"></a>01015 <span class="vhdlchar">fault_address_state_o</span> &lt;= <span class="vhdlchar">address_i</span>;
<a name="l01016"></a>01016 <span class="vhdlchar">rw_state_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01017"></a>01017 <span class="vhdlchar">fc_state_o</span> &lt;= (<span class="vhdlchar">supervisor_i</span> == <span class="vhdllogic">1&#39;b1</span>) ? <a class="code" href="classbus__control.html#a6cb25547c77c5085562bd0ace17d08a4">FC_SUPERVISOR_DATA</a> : <a class="code" href="classbus__control.html#abd13c1b70988aa3f59e1d9cc23e62eb2">FC_USER_DATA</a>;
<a name="l01018"></a>01018 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <a class="code" href="classbus__control.html#a16c432fa4a9897426aab6df04ee608e0">VECTOR_ADDRESS_TRAP</a>;
<a name="l01019"></a>01019
<a name="l01020"></a>01020 <span class="vhdlchar">jmp_address_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01021"></a>01021 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01022"></a>01022 <span class="vhdlkeyword">end</span>
<a name="l01023"></a>01023 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01024"></a>01024 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01025"></a>01025 <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> &lt;= <span class="vhdlchar">address_i</span>[<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>];
<a name="l01026"></a>01026 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01027"></a>01027
<a name="l01028"></a>01028 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01029"></a>01029 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> &lt;= { <span class="vhdllogic">16&#39;b0</span>, <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">31</span>:<span class="vhdllogic">16</span>] };
<a name="l01030"></a>01030 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b0011</span>;
<a name="l01031"></a>01031 <span class="vhdlkeyword">end</span>
<a name="l01032"></a>01032 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b00</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01033"></a>01033 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> &lt;= <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l01034"></a>01034 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b1111</span>;
<a name="l01035"></a>01035 <span class="vhdlkeyword">end</span>
<a name="l01036"></a>01036 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01037"></a>01037 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> &lt;= { <span class="vhdllogic">16&#39;b0</span>, <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] };
<a name="l01038"></a>01038 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b0011</span>;
<a name="l01039"></a>01039 <span class="vhdlkeyword">end</span>
<a name="l01040"></a>01040 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b00</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01041"></a>01041 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> &lt;= { <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">16&#39;b0</span> };
<a name="l01042"></a>01042 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b1100</span>;
<a name="l01043"></a>01043 <span class="vhdlkeyword">end</span>
<a name="l01044"></a>01044 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01045"></a>01045 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> &lt;= { <span class="vhdllogic">24&#39;b0</span>, <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] };
<a name="l01046"></a>01046 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b0001</span>;
<a name="l01047"></a>01047 <span class="vhdlkeyword">end</span>
<a name="l01048"></a>01048 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01049"></a>01049 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> &lt;= { <span class="vhdllogic">16&#39;b0</span>, <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">8&#39;b0</span> };
<a name="l01050"></a>01050 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b0010</span>;
<a name="l01051"></a>01051 <span class="vhdlkeyword">end</span>
<a name="l01052"></a>01052 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b01</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01053"></a>01053 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> &lt;= { <span class="vhdllogic">8&#39;b0</span>, <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">16&#39;b0</span> };
<a name="l01054"></a>01054 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b0100</span>;
<a name="l01055"></a>01055 <span class="vhdlkeyword">end</span>
<a name="l01056"></a>01056 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b00</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01057"></a>01057 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> &lt;= { <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">24&#39;b0</span> };
<a name="l01058"></a>01058 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b1000</span>;
<a name="l01059"></a>01059 <span class="vhdlkeyword">end</span>
<a name="l01060"></a>01060
<a name="l01061"></a>01061 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">read_modify_write_i</span> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01062"></a>01062 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01063"></a>01063 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01064"></a>01064 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01065"></a>01065 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
<a name="l01066"></a>01066 <span class="vhdlkeyword">end</span>
<a name="l01067"></a>01067 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01068"></a>01068 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01069"></a>01069 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01070"></a>01070 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01071"></a>01071 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a9c7e8a6d030ee1f404d7526ebda509ca">CTI_INCR_CYCLE</a>;
<a name="l01072"></a>01072 <span class="vhdlkeyword">end</span>
<a name="l01073"></a>01073 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01074"></a>01074 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01075"></a>01075 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01076"></a>01076 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01077"></a>01077 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
<a name="l01078"></a>01078 <span class="vhdlkeyword">end</span>
<a name="l01079"></a>01079
<a name="l01080"></a>01080 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#aad6d7bc2df8264837b68548b4045a54b">S_WRITE_1</a>;
<a name="l01081"></a>01081 <span class="vhdlkeyword">end</span>
<a name="l01082"></a>01082 <span class="vhdlkeyword">end</span>
<a name="l01083"></a>01083 <span class="keyword">// pc</span>
<a name="l01084"></a>01084 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">prefetch_ir_valid_o</span> == <span class="vhdllogic">1&#39;b0</span> || <span class="vhdlchar">pc_change_i</span> != <span class="vhdllogic">2&#39;b00</span>) <span class="vhdlkeyword">begin</span>
<a name="l01085"></a>01085
<a name="l01086"></a>01086 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">prefetch_ir_valid_o</span> == <span class="vhdllogic">1&#39;b0</span> || <span class="vhdlchar">pc_change_i</span> == <span class="vhdllogic">2&#39;b10</span> || <span class="vhdlchar">pc_change_i</span> == <span class="vhdllogic">2&#39;b11</span>) <span class="vhdlkeyword">begin</span>
<a name="l01087"></a>01087 <span class="keyword">// load 4 words: [79:16] in 2,3 cycles</span>
<a name="l01088"></a>01088 <span class="vhdlchar">prefetch_ir_valid_32_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01089"></a>01089 <span class="vhdlchar">prefetch_ir_valid_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01090"></a>01090 <span class="vhdlchar">prefetch_ir_valid_80_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01091"></a>01091
<a name="l01092"></a>01092 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#abc89f2549e5275c60648fc9a94876e29">S_PC_0</a>;
<a name="l01093"></a>01093 <span class="vhdlkeyword">end</span>
<a name="l01094"></a>01094 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">prefetch_ir_valid_80_o</span> == <span class="vhdllogic">1&#39;b0</span> &amp;&amp; <span class="vhdlchar">pc_change_i</span> == <span class="vhdllogic">2&#39;b01</span>) <span class="vhdlkeyword">begin</span>
<a name="l01095"></a>01095 <span class="keyword">// load 2 words: [31:0] in 1 cycle</span>
<a name="l01096"></a>01096 <span class="vhdlchar">prefetch_ir_valid_32_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01097"></a>01097 <span class="vhdlchar">prefetch_ir_valid_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01098"></a>01098 <span class="vhdlchar">prefetch_ir_valid_80_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01099"></a>01099
<a name="l01100"></a>01100 <span class="vhdlchar">prefetch_ir_o</span> &lt;= { <span class="vhdlchar">prefetch_ir_o</span>[<span class="vhdllogic">63</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">16&#39;b0</span> };
<a name="l01101"></a>01101 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#abc89f2549e5275c60648fc9a94876e29">S_PC_0</a>;
<a name="l01102"></a>01102 <span class="vhdlkeyword">end</span>
<a name="l01103"></a>01103 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01104"></a>01104 <span class="keyword">// do not load any words</span>
<a name="l01105"></a>01105 <span class="vhdlchar">prefetch_ir_valid_32_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01106"></a>01106 <span class="vhdlchar">prefetch_ir_valid_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01107"></a>01107 <span class="vhdlchar">prefetch_ir_valid_80_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01108"></a>01108
<a name="l01109"></a>01109 <span class="vhdlchar">prefetch_ir_o</span> &lt;= { <span class="vhdlchar">prefetch_ir_o</span>[<span class="vhdllogic">63</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">16&#39;b0</span> };
<a name="l01110"></a>01110 <span class="vhdlkeyword">end</span>
<a name="l01111"></a>01111
<a name="l00907"></a>00907 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classbus__control.html#a4054e75175a8d9a78f2e34150e1c0465">CLK_I</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classbus__control.html#a7c0d04a169a341f11af2b012abd481b3">reset_n</a>) <span class="vhdlkeyword">begin</span>
<a name="l00908"></a>00908 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#a7c0d04a169a341f11af2b012abd481b3">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>
<a name="l00909"></a>00909 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>;
<a name="l00910"></a>00910 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <span class="vhdllogic">8&#39;d0</span>;
<a name="l00911"></a>00911 <span class="vhdlchar">prefetch_ir_valid_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00912"></a>00912 <span class="vhdlchar">prefetch_ir_valid_32_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00913"></a>00913 <span class="vhdlchar">prefetch_ir_valid_80_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00914"></a>00914
<a name="l00915"></a>00915 <span class="vhdlchar">jmp_address_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00916"></a>00916 <span class="vhdlchar">jmp_bus_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00917"></a>00917
<a name="l00918"></a>00918 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00919"></a>00919 <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> &lt;= <span class="vhdllogic">30&#39;d0</span>;
<a name="l00920"></a>00920 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> &lt;= <span class="vhdllogic">32&#39;d0</span>;
<a name="l00921"></a>00921 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b0</span>;
<a name="l00922"></a>00922 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00923"></a>00923 <a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00924"></a>00924 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00925"></a>00925 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00926"></a>00926 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00927"></a>00927 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <span class="vhdllogic">3&#39;d0</span>;
<a name="l00928"></a>00928 <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a> &lt;= <span class="vhdllogic">3&#39;d0</span>;
<a name="l00929"></a>00929 <a class="code" href="classbus__control.html#a139d4b4c2d79d749375db4dd71f3a9fd">reset_o</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00930"></a>00930 <span class="vhdlchar">blocked_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00931"></a>00931 <span class="vhdlchar">data_read_o</span> &lt;= <span class="vhdllogic">32&#39;d0</span>;
<a name="l00932"></a>00932 <span class="vhdlchar">finished_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00933"></a>00933 <span class="vhdlchar">rw_state_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00934"></a>00934 <span class="vhdlchar">fc_state_o</span> &lt;= <span class="vhdllogic">3&#39;d0</span>;
<a name="l00935"></a>00935 <span class="vhdlchar">fault_address_state_o</span> &lt;= <span class="vhdllogic">32&#39;d0</span>;
<a name="l00936"></a>00936 <a class="code" href="classbus__control.html#a9d1ac811b477c31c0d6aec541dca418d">saved_pc_change</a> &lt;= <span class="vhdllogic">2&#39;b0</span>;
<a name="l00937"></a>00937 <a class="code" href="classbus__control.html#af4b71c6c152246795fcfed45e67bab33">reset_counter</a> &lt;= <span class="vhdllogic">8&#39;d0</span>;
<a name="l00938"></a>00938 <span class="vhdlkeyword">end</span>
<a name="l00939"></a>00939 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l00940"></a>00940 <span class="vhdlkeyword">case</span>(<a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a>)
<a name="l00941"></a>00941 <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>: <span class="vhdlkeyword">begin</span>
<a name="l00942"></a>00942 <span class="vhdlchar">finished_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00943"></a>00943 <span class="vhdlchar">jmp_address_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00944"></a>00944 <span class="vhdlchar">jmp_bus_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00945"></a>00945 <a class="code" href="classbus__control.html#a139d4b4c2d79d749375db4dd71f3a9fd">reset_o</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00946"></a>00946 <span class="vhdlchar">blocked_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00947"></a>00947
<a name="l00948"></a>00948 <span class="keyword">// block</span>
<a name="l00949"></a>00949 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_blocked_i</span> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l00950"></a>00950 <span class="vhdlchar">blocked_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l00951"></a>00951 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a2545a07988315cbf68e808af80333335">S_BLOCKED</a>;
<a name="l00952"></a>00952 <span class="vhdlkeyword">end</span>
<a name="l00953"></a>00953 <span class="keyword">// reset</span>
<a name="l00954"></a>00954 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_reset_i</span> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l00955"></a>00955 <a class="code" href="classbus__control.html#a139d4b4c2d79d749375db4dd71f3a9fd">reset_o</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l00956"></a>00956 <a class="code" href="classbus__control.html#af4b71c6c152246795fcfed45e67bab33">reset_counter</a> &lt;= <span class="vhdllogic">8&#39;d124</span>;
<a name="l00957"></a>00957 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a8e24d83b04e325557b534b6fbe3c06ca">S_RESET</a>;
<a name="l00958"></a>00958 <span class="vhdlkeyword">end</span>
<a name="l00959"></a>00959 <span class="keyword">// read</span>
<a name="l00960"></a>00960 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_read_i</span> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l00961"></a>00961 <a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00962"></a>00962 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">supervisor_i</span> == <span class="vhdllogic">1&#39;b1</span>) <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a> &lt;= (<span class="vhdlchar">address_type_i</span> == <span class="vhdllogic">1&#39;b0</span>) ? <a class="code" href="classbus__control.html#a6cb25547c77c5085562bd0ace17d08a4">FC_SUPERVISOR_DATA</a> : <a class="code" href="classbus__control.html#a1dc6742718597d6e0ef98e8200bb49bf">FC_SUPERVISOR_PROGRAM</a>;
<a name="l00963"></a>00963 <span class="vhdlkeyword">else</span> <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a> &lt;= (<span class="vhdlchar">address_type_i</span> == <span class="vhdllogic">1&#39;b0</span>) ? <a class="code" href="classbus__control.html#abd13c1b70988aa3f59e1d9cc23e62eb2">FC_USER_DATA</a> : <a class="code" href="classbus__control.html#a80b93f8634a7f03a199836a78c52d9bb">FC_USER_PROGRAM</a>;
<a name="l00964"></a>00964
<a name="l00965"></a>00965 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; (<span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b0</span>)) <span class="vhdlkeyword">begin</span> <span class="keyword">// WORD or LONG WORD</span>
<a name="l00966"></a>00966 <span class="vhdlchar">fault_address_state_o</span> &lt;= <span class="vhdlchar">address_i</span>;
<a name="l00967"></a>00967 <span class="vhdlchar">rw_state_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l00968"></a>00968 <span class="vhdlchar">fc_state_o</span> &lt;= (<span class="vhdlchar">supervisor_i</span> == <span class="vhdllogic">1&#39;b1</span>) ? ((<span class="vhdlchar">address_type_i</span> == <span class="vhdllogic">1&#39;b0</span>) ? <a class="code" href="classbus__control.html#a6cb25547c77c5085562bd0ace17d08a4">FC_SUPERVISOR_DATA</a> : <a class="code" href="classbus__control.html#a1dc6742718597d6e0ef98e8200bb49bf">FC_SUPERVISOR_PROGRAM</a>) :
<a name="l00969"></a>00969 ((<span class="vhdlchar">address_type_i</span> == <span class="vhdllogic">1&#39;b0</span>) ? <a class="code" href="classbus__control.html#abd13c1b70988aa3f59e1d9cc23e62eb2">FC_USER_DATA</a> : <a class="code" href="classbus__control.html#a80b93f8634a7f03a199836a78c52d9bb">FC_USER_PROGRAM</a>);
<a name="l00970"></a>00970 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <a class="code" href="classbus__control.html#a16c432fa4a9897426aab6df04ee608e0">VECTOR_ADDRESS_TRAP</a>;
<a name="l00971"></a>00971
<a name="l00972"></a>00972 <span class="vhdlchar">jmp_address_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l00973"></a>00973 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l00974"></a>00974 <span class="vhdlkeyword">end</span>
<a name="l00975"></a>00975 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l00976"></a>00976 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l00977"></a>00977 <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> &lt;= <span class="vhdlchar">address_i</span>[<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>];
<a name="l00978"></a>00978 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= (<span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b00</span>)? <span class="vhdllogic">4&#39;b1000</span> :
<a name="l00979"></a>00979 (<span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b01</span>)? <span class="vhdllogic">4&#39;b0100</span> :
<a name="l00980"></a>00980 (<span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span>)? <span class="vhdllogic">4&#39;b0010</span> :
<a name="l00981"></a>00981 (<span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b11</span>)? <span class="vhdllogic">4&#39;b0001</span> :
<a name="l00982"></a>00982 (<span class="vhdlchar">size_i</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">2&#39;b0</span>)? <span class="vhdllogic">4&#39;b1100</span> :
<a name="l00983"></a>00983 (<span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b0</span> &amp;&amp; <span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">2&#39;b1</span>)? <span class="vhdllogic">4&#39;b0011</span> :
<a name="l00984"></a>00984 <span class="vhdllogic">4&#39;b1111</span>;
<a name="l00985"></a>00985 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l00986"></a>00986
<a name="l00987"></a>00987 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">read_modify_write_i</span> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l00988"></a>00988 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00989"></a>00989 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00990"></a>00990 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l00991"></a>00991 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
<a name="l00992"></a>00992 <span class="vhdlkeyword">end</span>
<a name="l00993"></a>00993 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l00994"></a>00994 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00995"></a>00995 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l00996"></a>00996 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l00997"></a>00997 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a9c7e8a6d030ee1f404d7526ebda509ca">CTI_INCR_CYCLE</a>;
<a name="l00998"></a>00998 <span class="vhdlkeyword">end</span>
<a name="l00999"></a>00999 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01000"></a>01000 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01001"></a>01001 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01002"></a>01002 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01003"></a>01003 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
<a name="l01004"></a>01004 <span class="vhdlkeyword">end</span>
<a name="l01005"></a>01005
<a name="l01006"></a>01006 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#af752b2515eb632068e26865f1569598c">S_READ_1</a>;
<a name="l01007"></a>01007 <span class="vhdlkeyword">end</span>
<a name="l01008"></a>01008 <span class="vhdlkeyword">end</span>
<a name="l01009"></a>01009 <span class="keyword">// write</span>
<a name="l01010"></a>01010 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_write_i</span> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01011"></a>01011 <a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01012"></a>01012 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">supervisor_i</span> == <span class="vhdllogic">1&#39;b1</span>) <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a> &lt;= <a class="code" href="classbus__control.html#a6cb25547c77c5085562bd0ace17d08a4">FC_SUPERVISOR_DATA</a>;
<a name="l01013"></a>01013 <span class="vhdlkeyword">else</span> <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a> &lt;= <a class="code" href="classbus__control.html#abd13c1b70988aa3f59e1d9cc23e62eb2">FC_USER_DATA</a>;
<a name="l01014"></a>01014
<a name="l01015"></a>01015 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span> <span class="keyword">// WORD or LONG WORD</span>
<a name="l01016"></a>01016 <span class="vhdlchar">fault_address_state_o</span> &lt;= <span class="vhdlchar">address_i</span>;
<a name="l01017"></a>01017 <span class="vhdlchar">rw_state_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01018"></a>01018 <span class="vhdlchar">fc_state_o</span> &lt;= (<span class="vhdlchar">supervisor_i</span> == <span class="vhdllogic">1&#39;b1</span>) ? <a class="code" href="classbus__control.html#a6cb25547c77c5085562bd0ace17d08a4">FC_SUPERVISOR_DATA</a> : <a class="code" href="classbus__control.html#abd13c1b70988aa3f59e1d9cc23e62eb2">FC_USER_DATA</a>;
<a name="l01019"></a>01019 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <a class="code" href="classbus__control.html#a16c432fa4a9897426aab6df04ee608e0">VECTOR_ADDRESS_TRAP</a>;
<a name="l01020"></a>01020
<a name="l01021"></a>01021 <span class="vhdlchar">jmp_address_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01022"></a>01022 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01023"></a>01023 <span class="vhdlkeyword">end</span>
<a name="l01024"></a>01024 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01025"></a>01025 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01026"></a>01026 <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> &lt;= <span class="vhdlchar">address_i</span>[<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>];
<a name="l01027"></a>01027 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01028"></a>01028
<a name="l01029"></a>01029 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01030"></a>01030 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> &lt;= { <span class="vhdllogic">16&#39;b0</span>, <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">31</span>:<span class="vhdllogic">16</span>] };
<a name="l01031"></a>01031 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b0011</span>;
<a name="l01032"></a>01032 <span class="vhdlkeyword">end</span>
<a name="l01033"></a>01033 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b00</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01034"></a>01034 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> &lt;= <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l01035"></a>01035 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b1111</span>;
<a name="l01036"></a>01036 <span class="vhdlkeyword">end</span>
<a name="l01037"></a>01037 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01038"></a>01038 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> &lt;= { <span class="vhdllogic">16&#39;b0</span>, <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] };
<a name="l01039"></a>01039 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b0011</span>;
<a name="l01040"></a>01040 <span class="vhdlkeyword">end</span>
<a name="l01041"></a>01041 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b00</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01042"></a>01042 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> &lt;= { <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">16&#39;b0</span> };
<a name="l01043"></a>01043 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b1100</span>;
<a name="l01044"></a>01044 <span class="vhdlkeyword">end</span>
<a name="l01045"></a>01045 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01046"></a>01046 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> &lt;= { <span class="vhdllogic">24&#39;b0</span>, <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] };
<a name="l01047"></a>01047 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b0001</span>;
<a name="l01048"></a>01048 <span class="vhdlkeyword">end</span>
<a name="l01049"></a>01049 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01050"></a>01050 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> &lt;= { <span class="vhdllogic">16&#39;b0</span>, <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">8&#39;b0</span> };
<a name="l01051"></a>01051 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b0010</span>;
<a name="l01052"></a>01052 <span class="vhdlkeyword">end</span>
<a name="l01053"></a>01053 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b01</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01054"></a>01054 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> &lt;= { <span class="vhdllogic">8&#39;b0</span>, <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">16&#39;b0</span> };
<a name="l01055"></a>01055 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b0100</span>;
<a name="l01056"></a>01056 <span class="vhdlkeyword">end</span>
<a name="l01057"></a>01057 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b00</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01058"></a>01058 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> &lt;= { <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">24&#39;b0</span> };
<a name="l01059"></a>01059 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b1000</span>;
<a name="l01060"></a>01060 <span class="vhdlkeyword">end</span>
<a name="l01061"></a>01061
<a name="l01062"></a>01062 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">read_modify_write_i</span> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01063"></a>01063 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01064"></a>01064 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01065"></a>01065 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01066"></a>01066 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
<a name="l01067"></a>01067 <span class="vhdlkeyword">end</span>
<a name="l01068"></a>01068 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01069"></a>01069 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01070"></a>01070 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01071"></a>01071 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01072"></a>01072 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a9c7e8a6d030ee1f404d7526ebda509ca">CTI_INCR_CYCLE</a>;
<a name="l01073"></a>01073 <span class="vhdlkeyword">end</span>
<a name="l01074"></a>01074 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01075"></a>01075 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01076"></a>01076 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01077"></a>01077 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01078"></a>01078 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
<a name="l01079"></a>01079 <span class="vhdlkeyword">end</span>
<a name="l01080"></a>01080
<a name="l01081"></a>01081 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#aad6d7bc2df8264837b68548b4045a54b">S_WRITE_1</a>;
<a name="l01082"></a>01082 <span class="vhdlkeyword">end</span>
<a name="l01083"></a>01083 <span class="vhdlkeyword">end</span>
<a name="l01084"></a>01084 <span class="keyword">// pc</span>
<a name="l01085"></a>01085 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">prefetch_ir_valid_o</span> == <span class="vhdllogic">1&#39;b0</span> || <span class="vhdlchar">pc_change_i</span> != <span class="vhdllogic">2&#39;b00</span>) <span class="vhdlkeyword">begin</span>
<a name="l01086"></a>01086
<a name="l01087"></a>01087 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">prefetch_ir_valid_o</span> == <span class="vhdllogic">1&#39;b0</span> || <span class="vhdlchar">pc_change_i</span> == <span class="vhdllogic">2&#39;b10</span> || <span class="vhdlchar">pc_change_i</span> == <span class="vhdllogic">2&#39;b11</span>) <span class="vhdlkeyword">begin</span>
<a name="l01088"></a>01088 <span class="keyword">// load 4 words: [79:16] in 2,3 cycles</span>
<a name="l01089"></a>01089 <span class="vhdlchar">prefetch_ir_valid_32_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01090"></a>01090 <span class="vhdlchar">prefetch_ir_valid_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01091"></a>01091 <span class="vhdlchar">prefetch_ir_valid_80_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01092"></a>01092
<a name="l01093"></a>01093 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#abc89f2549e5275c60648fc9a94876e29">S_PC_0</a>;
<a name="l01094"></a>01094 <span class="vhdlkeyword">end</span>
<a name="l01095"></a>01095 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">prefetch_ir_valid_80_o</span> == <span class="vhdllogic">1&#39;b0</span> &amp;&amp; <span class="vhdlchar">pc_change_i</span> == <span class="vhdllogic">2&#39;b01</span>) <span class="vhdlkeyword">begin</span>
<a name="l01096"></a>01096 <span class="keyword">// load 2 words: [31:0] in 1 cycle</span>
<a name="l01097"></a>01097 <span class="vhdlchar">prefetch_ir_valid_32_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01098"></a>01098 <span class="vhdlchar">prefetch_ir_valid_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01099"></a>01099 <span class="vhdlchar">prefetch_ir_valid_80_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01100"></a>01100
<a name="l01101"></a>01101 <span class="vhdlchar">prefetch_ir_o</span> &lt;= { <span class="vhdlchar">prefetch_ir_o</span>[<span class="vhdllogic">63</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">16&#39;b0</span> };
<a name="l01102"></a>01102 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#abc89f2549e5275c60648fc9a94876e29">S_PC_0</a>;
<a name="l01103"></a>01103 <span class="vhdlkeyword">end</span>
<a name="l01104"></a>01104 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01105"></a>01105 <span class="keyword">// do not load any words</span>
<a name="l01106"></a>01106 <span class="vhdlchar">prefetch_ir_valid_32_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01107"></a>01107 <span class="vhdlchar">prefetch_ir_valid_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01108"></a>01108 <span class="vhdlchar">prefetch_ir_valid_80_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01109"></a>01109
<a name="l01110"></a>01110 <span class="vhdlchar">prefetch_ir_o</span> &lt;= { <span class="vhdlchar">prefetch_ir_o</span>[<span class="vhdllogic">63</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">16&#39;b0</span> };
<a name="l01111"></a>01111 <span class="vhdlkeyword">end</span>
<a name="l01112"></a>01112
<a name="l01113"></a>01113 <span class="vhdlkeyword">end</span>
<a name="l01114"></a>01114 <span class="keyword">// interrupt</span>
<a name="l01115"></a>01115 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_interrupt_i</span> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01116"></a>01116 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01117"></a>01117 <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> &lt;= { <span class="vhdllogic">27&#39;b111_1111_1111_1111_1111_1111_1111</span>, <a class="code" href="classbus__control.html#a18d43f989323778008d066233ddaa191">last_interrupt_mask</a> };
<a name="l01118"></a>01118 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b1111</span>;
<a name="l01119"></a>01119 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01120"></a>01120 <a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01121"></a>01121
<a name="l01122"></a>01122 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01123"></a>01123 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01124"></a>01124 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01125"></a>01125 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
<a name="l01126"></a>01126
<a name="l01127"></a>01127 <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a> &lt;= <a class="code" href="classbus__control.html#ac44cb27522dcf872ea1f1d63cb652d9b">FC_CPU_SPACE</a>;
<a name="l01128"></a>01128
<a name="l01129"></a>01129 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a8ff92de377aefca42782778cda7132f3">S_INT_1</a>;
<a name="l01130"></a>01130 <span class="vhdlkeyword">end</span>
<a name="l01131"></a>01131 <span class="vhdlkeyword">end</span>
<a name="l01132"></a>01132
<a name="l01133"></a>01133 <a class="code" href="classbus__control.html#a8e24d83b04e325557b534b6fbe3c06ca">S_RESET</a>: <span class="vhdlkeyword">begin</span>
<a name="l01134"></a>01134 <a class="code" href="classbus__control.html#af4b71c6c152246795fcfed45e67bab33">reset_counter</a> &lt;= <a class="code" href="classbus__control.html#af4b71c6c152246795fcfed45e67bab33">reset_counter</a> - <span class="vhdllogic">8&#39;d1</span>;
<a name="l01135"></a>01135
<a name="l01136"></a>01136 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#af4b71c6c152246795fcfed45e67bab33">reset_counter</a> == <span class="vhdllogic">8&#39;d0</span>) <span class="vhdlkeyword">begin</span>
<a name="l01137"></a>01137 <span class="vhdlchar">finished_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01138"></a>01138 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01139"></a>01139 <span class="vhdlkeyword">end</span>
<a name="l01140"></a>01140 <span class="vhdlkeyword">end</span>
<a name="l01141"></a>01141
<a name="l01142"></a>01142 <a class="code" href="classbus__control.html#a2545a07988315cbf68e808af80333335">S_BLOCKED</a>: <span class="vhdlkeyword">begin</span>
<a name="l01143"></a>01143 <span class="vhdlkeyword">end</span>
<a name="l01144"></a>01144
<a name="l01145"></a>01145 <a class="code" href="classbus__control.html#a8ff92de377aefca42782778cda7132f3">S_INT_1</a>: <span class="vhdlkeyword">begin</span>
<a name="l01146"></a>01146 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ACK_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01147"></a>01147 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01148"></a>01148 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01149"></a>01149
<a name="l01150"></a>01150 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];
<a name="l01151"></a>01151
<a name="l01152"></a>01152 <span class="vhdlchar">finished_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01153"></a>01153 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01154"></a>01154 <span class="vhdlkeyword">end</span>
<a name="l01155"></a>01155 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">RTY_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01156"></a>01156 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01157"></a>01157 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01158"></a>01158
<a name="l01159"></a>01159 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <span class="vhdllogic">8&#39;d24</span> + { <span class="vhdllogic">5&#39;b0</span>, <span class="vhdlchar">interrupt_mask_o</span> };
<a name="l01160"></a>01160
<a name="l01161"></a>01161 <span class="vhdlchar">finished_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01162"></a>01162 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01163"></a>01163 <span class="vhdlkeyword">end</span>
<a name="l01164"></a>01164 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ERR_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01165"></a>01165 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01166"></a>01166 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01167"></a>01167
<a name="l01168"></a>01168 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <span class="vhdllogic">8&#39;d24</span>; <span class="keyword">// spurious interrupt</span>
<a name="l01169"></a>01169
<a name="l01170"></a>01170 <span class="vhdlchar">finished_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01171"></a>01171 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01172"></a>01172 <span class="vhdlkeyword">end</span>
<a name="l01173"></a>01173 <span class="vhdlkeyword">end</span>
<a name="l01174"></a>01174
<a name="l01175"></a>01175 <a class="code" href="classbus__control.html#abc89f2549e5275c60648fc9a94876e29">S_PC_0</a>: <span class="vhdlkeyword">begin</span>
<a name="l01176"></a>01176 <a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01177"></a>01177 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">supervisor_i</span> == <span class="vhdllogic">1&#39;b1</span>) <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a> &lt;= <a class="code" href="classbus__control.html#a1dc6742718597d6e0ef98e8200bb49bf">FC_SUPERVISOR_PROGRAM</a>;
<a name="l01178"></a>01178 <span class="vhdlkeyword">else</span> <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a> &lt;= <a class="code" href="classbus__control.html#a80b93f8634a7f03a199836a78c52d9bb">FC_USER_PROGRAM</a>;
<a name="l01179"></a>01179
<a name="l01180"></a>01180 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01181"></a>01181 <span class="vhdlchar">prefetch_ir_valid_32_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01182"></a>01182 <span class="vhdlchar">prefetch_ir_valid_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01183"></a>01183 <span class="vhdlchar">prefetch_ir_valid_80_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01184"></a>01184
<a name="l01185"></a>01185 <span class="vhdlchar">fault_address_state_o</span> &lt;= <span class="vhdlchar">pc_i</span>;
<a name="l01186"></a>01186 <span class="vhdlchar">rw_state_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01187"></a>01187 <span class="vhdlchar">fc_state_o</span> &lt;= (<span class="vhdlchar">supervisor_i</span> == <span class="vhdllogic">1&#39;b1</span>) ? <a class="code" href="classbus__control.html#a1dc6742718597d6e0ef98e8200bb49bf">FC_SUPERVISOR_PROGRAM</a> : <a class="code" href="classbus__control.html#a80b93f8634a7f03a199836a78c52d9bb">FC_USER_PROGRAM</a>;
<a name="l01188"></a>01188 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <a class="code" href="classbus__control.html#a16c432fa4a9897426aab6df04ee608e0">VECTOR_ADDRESS_TRAP</a>;
<a name="l01189"></a>01189
<a name="l01190"></a>01190 <span class="vhdlchar">jmp_address_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01191"></a>01191 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01192"></a>01192 <span class="vhdlkeyword">end</span>
<a name="l01193"></a>01193 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01194"></a>01194 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01195"></a>01195
<a name="l01196"></a>01196 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">prefetch_ir_valid_32_o</span> == <span class="vhdllogic">1&#39;b0</span>) <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> &lt;= <span class="vhdlchar">pc_i</span>[<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>];
<a name="l01197"></a>01197 <span class="vhdlkeyword">else</span> <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> &lt;= <a class="code" href="classbus__control.html#a96afbad4fe8073f7c58baf255b66c944">pc_i_plus_6</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>];
<a name="l01198"></a>01198
<a name="l01199"></a>01199 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= (<span class="vhdlchar">pc_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span>)? <span class="vhdllogic">4&#39;b0011</span> :
<a name="l01200"></a>01200 <span class="vhdllogic">4&#39;b1111</span>;
<a name="l01201"></a>01201 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01202"></a>01202
<a name="l01203"></a>01203 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">prefetch_ir_valid_32_o</span> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>
<a name="l01204"></a>01204 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01205"></a>01205 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01206"></a>01206 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01207"></a>01207 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a9c7e8a6d030ee1f404d7526ebda509ca">CTI_INCR_CYCLE</a>;
<a name="l01208"></a>01208 <span class="vhdlkeyword">end</span>
<a name="l01209"></a>01209 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01210"></a>01210 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01211"></a>01211 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01212"></a>01212 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01213"></a>01213 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
<a name="l01214"></a>01214 <span class="vhdlkeyword">end</span>
<a name="l01215"></a>01215
<a name="l01216"></a>01216 <a class="code" href="classbus__control.html#a9d1ac811b477c31c0d6aec541dca418d">saved_pc_change</a> &lt;= <span class="vhdlchar">pc_change_i</span>;
<a name="l01217"></a>01217 <span class="vhdlchar">prefetch_ir_valid_32_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01218"></a>01218
<a name="l01219"></a>01219 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a729095d9bb813c82aee565216b092f38">S_PC_1</a>;
<a name="l01220"></a>01220 <span class="vhdlkeyword">end</span>
<a name="l01221"></a>01221 <span class="vhdlkeyword">end</span>
<a name="l01222"></a>01222
<a name="l01223"></a>01223 <a class="code" href="classbus__control.html#a729095d9bb813c82aee565216b092f38">S_PC_1</a>: <span class="vhdlkeyword">begin</span>
<a name="l01224"></a>01224 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_change_i</span> != <span class="vhdllogic">2&#39;b00</span>) <a class="code" href="classbus__control.html#a9d1ac811b477c31c0d6aec541dca418d">saved_pc_change</a> &lt;= <span class="vhdlchar">pc_change_i</span>;
<a name="l01225"></a>01225
<a name="l01226"></a>01226 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ACK_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01227"></a>01227 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> == <a class="code" href="classbus__control.html#a9c7e8a6d030ee1f404d7526ebda509ca">CTI_INCR_CYCLE</a>) <span class="vhdlkeyword">begin</span>
<a name="l01228"></a>01228 <span class="keyword">//CYC_O &lt;= 1&#39;b1;</span>
<a name="l01229"></a>01229 <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> &lt;= <a class="code" href="classbus__control.html#addb6490ae2acff8c93b321b1e14c7bd4">pc_i_plus_4</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>];
<a name="l01230"></a>01230 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b1111</span>;
<a name="l01231"></a>01231 <span class="keyword">//STB_O &lt;= 1&#39;b1;</span>
<a name="l01232"></a>01232 <span class="keyword">//WE_O &lt;= 1&#39;b0;</span>
<a name="l01233"></a>01233
<a name="l01234"></a>01234 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span>) <span class="vhdlkeyword">begin</span>
<a name="l01235"></a>01235 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01236"></a>01236 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01237"></a>01237 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01238"></a>01238 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a9c7e8a6d030ee1f404d7526ebda509ca">CTI_INCR_CYCLE</a>;
<a name="l01239"></a>01239 <span class="vhdlkeyword">end</span>
<a name="l01240"></a>01240 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01241"></a>01241 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01242"></a>01242 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01243"></a>01243 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01244"></a>01244 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
<a name="l01245"></a>01245 <span class="vhdlkeyword">end</span>
<a name="l01246"></a>01246
<a name="l01247"></a>01247 <span class="keyword">//if(supervisor_i == 1&#39;b1) fc_o &lt;= FC_SUPERVISOR_PROGRAM;</span>
<a name="l01248"></a>01248 <span class="keyword">//else fc_o &lt;= FC_USER_PROGRAM;</span>
<a name="l01249"></a>01249
<a name="l01250"></a>01250 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span>) <span class="vhdlchar">prefetch_ir_o</span> &lt;= { <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">64&#39;b0</span> };
<a name="l01251"></a>01251 <span class="vhdlkeyword">else</span> <span class="vhdlchar">prefetch_ir_o</span> &lt;= { <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">48&#39;b0</span> };
<a name="l01252"></a>01252
<a name="l01253"></a>01253 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a28895ce8a15bd607103ea20914434342">S_PC_3</a>;
<a name="l01254"></a>01254 <span class="vhdlkeyword">end</span>
<a name="l01255"></a>01255 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01256"></a>01256 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01257"></a>01257 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01258"></a>01258
<a name="l01259"></a>01259 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#a9d1ac811b477c31c0d6aec541dca418d">saved_pc_change</a> == <span class="vhdllogic">2&#39;b10</span> || <a class="code" href="classbus__control.html#a9d1ac811b477c31c0d6aec541dca418d">saved_pc_change</a> == <span class="vhdllogic">2&#39;b11</span> || <span class="vhdlchar">pc_change_i</span> == <span class="vhdllogic">2&#39;b10</span> || <span class="vhdlchar">pc_change_i</span> == <span class="vhdllogic">2&#39;b11</span>) <span class="vhdlkeyword">begin</span>
<a name="l01260"></a>01260 <span class="keyword">// load 4 words: [79:16] in 2,3 cycles</span>
<a name="l01261"></a>01261 <span class="vhdlchar">prefetch_ir_valid_32_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01262"></a>01262 <span class="vhdlchar">prefetch_ir_valid_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01263"></a>01263 <span class="vhdlchar">prefetch_ir_valid_80_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01264"></a>01264
<a name="l01265"></a>01265 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#abc89f2549e5275c60648fc9a94876e29">S_PC_0</a>;
<a name="l01266"></a>01266 <span class="vhdlkeyword">end</span>
<a name="l01267"></a>01267 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#a9d1ac811b477c31c0d6aec541dca418d">saved_pc_change</a> == <span class="vhdllogic">2&#39;b01</span> || <span class="vhdlchar">pc_change_i</span> == <span class="vhdllogic">2&#39;b01</span>) <span class="vhdlkeyword">begin</span>
<a name="l01268"></a>01268 <span class="keyword">// do not load any words</span>
<a name="l01269"></a>01269 <span class="vhdlchar">prefetch_ir_valid_32_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01270"></a>01270 <span class="vhdlchar">prefetch_ir_valid_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01271"></a>01271 <span class="vhdlchar">prefetch_ir_valid_80_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01272"></a>01272
<a name="l01273"></a>01273 <span class="vhdlchar">prefetch_ir_o</span> &lt;= { <span class="vhdlchar">prefetch_ir_o</span>[<span class="vhdllogic">63</span>:<span class="vhdllogic">32</span>], <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">16&#39;b0</span> };
<a name="l01274"></a>01274 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>;
<a name="l01275"></a>01275 <span class="vhdlkeyword">end</span>
<a name="l01276"></a>01276 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01277"></a>01277 <span class="vhdlchar">prefetch_ir_valid_32_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01278"></a>01278 <span class="vhdlchar">prefetch_ir_valid_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01279"></a>01279 <span class="vhdlchar">prefetch_ir_valid_80_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01280"></a>01280
<a name="l01281"></a>01281 <span class="vhdlchar">prefetch_ir_o</span> &lt;= { <span class="vhdlchar">prefetch_ir_o</span>[<span class="vhdllogic">79</span>:<span class="vhdllogic">32</span>], <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] };
<a name="l01282"></a>01282 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>;
<a name="l01283"></a>01283 <span class="vhdlkeyword">end</span>
<a name="l01284"></a>01284 <span class="vhdlkeyword">end</span>
<a name="l01285"></a>01285 <span class="vhdlkeyword">end</span>
<a name="l01286"></a>01286 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">RTY_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01287"></a>01287 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01288"></a>01288 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01289"></a>01289
<a name="l01290"></a>01290 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#aaa3088e2e223cdc5551d535c3739cad5">S_PC_2</a>;
<a name="l01291"></a>01291 <span class="vhdlkeyword">end</span>
<a name="l01292"></a>01292 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ERR_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01293"></a>01293 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01294"></a>01294 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01295"></a>01295
<a name="l01296"></a>01296 <span class="vhdlchar">fault_address_state_o</span> &lt;= { <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a>, <span class="vhdllogic">2&#39;b00</span> };
<a name="l01297"></a>01297 <span class="vhdlchar">rw_state_o</span> &lt;= ~<a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a>;
<a name="l01298"></a>01298 <span class="vhdlchar">fc_state_o</span> &lt;= <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a>;
<a name="l01299"></a>01299 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <a class="code" href="classbus__control.html#a63d428a3abed8bfe070ad6e6f82ca72e">VECTOR_BUS_TRAP</a>;
<a name="l01300"></a>01300
<a name="l01301"></a>01301 <span class="vhdlchar">jmp_bus_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01302"></a>01302 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01303"></a>01303 <span class="vhdlkeyword">end</span>
<a name="l01304"></a>01304 <span class="vhdlkeyword">end</span>
<a name="l01305"></a>01305 <a class="code" href="classbus__control.html#aaa3088e2e223cdc5551d535c3739cad5">S_PC_2</a>: <span class="vhdlkeyword">begin</span>
<a name="l01306"></a>01306 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01307"></a>01307 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01308"></a>01308
<a name="l01309"></a>01309 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a729095d9bb813c82aee565216b092f38">S_PC_1</a>;
<a name="l01310"></a>01310 <span class="vhdlkeyword">end</span>
<a name="l01311"></a>01311 <a class="code" href="classbus__control.html#a28895ce8a15bd607103ea20914434342">S_PC_3</a>: <span class="vhdlkeyword">begin</span>
<a name="l01312"></a>01312 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ACK_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01313"></a>01313 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span>) <span class="vhdlkeyword">begin</span>
<a name="l01314"></a>01314 <span class="keyword">//CYC_O &lt;= 1&#39;b1;</span>
<a name="l01315"></a>01315 <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> &lt;= <a class="code" href="classbus__control.html#a96afbad4fe8073f7c58baf255b66c944">pc_i_plus_6</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>];
<a name="l01316"></a>01316 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b1111</span>;
<a name="l01317"></a>01317 <span class="keyword">//STB_O &lt;= 1&#39;b1;</span>
<a name="l01318"></a>01318 <span class="keyword">//WE_O &lt;= 1&#39;b0;</span>
<a name="l01319"></a>01319
<a name="l01320"></a>01320 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01321"></a>01321 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01322"></a>01322 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01323"></a>01323 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
<a name="l01324"></a>01324
<a name="l01325"></a>01325 <span class="keyword">//if(supervisor_i == 1&#39;b1) fc_o &lt;= FC_SUPERVISOR_PROGRAM;</span>
<a name="l01326"></a>01326 <span class="keyword">//else fc_o &lt;= FC_USER_PROGRAM;</span>
<a name="l01327"></a>01327
<a name="l01328"></a>01328 <span class="vhdlchar">prefetch_ir_o</span> &lt;= { <span class="vhdlchar">prefetch_ir_o</span>[<span class="vhdllogic">79</span>:<span class="vhdllogic">64</span>], <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">32&#39;b0</span> };
<a name="l01329"></a>01329
<a name="l01330"></a>01330 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#aa19b7d76f1e25fd78b158b98088bd82a">S_PC_5</a>;
<a name="l01331"></a>01331 <span class="vhdlkeyword">end</span>
<a name="l01332"></a>01332 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01333"></a>01333 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01334"></a>01334 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01335"></a>01335
<a name="l01336"></a>01336 <span class="vhdlchar">prefetch_ir_o</span> &lt;= { <span class="vhdlchar">prefetch_ir_o</span>[<span class="vhdllogic">79</span>:<span class="vhdllogic">48</span>], <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">16&#39;b0</span> };
<a name="l01337"></a>01337
<a name="l01338"></a>01338 <span class="vhdlchar">prefetch_ir_valid_32_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01339"></a>01339 <span class="vhdlchar">prefetch_ir_valid_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01340"></a>01340 <span class="vhdlchar">prefetch_ir_valid_80_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01341"></a>01341 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>;
<a name="l01342"></a>01342 <span class="vhdlkeyword">end</span>
<a name="l01343"></a>01343 <span class="vhdlkeyword">end</span>
<a name="l01344"></a>01344 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">RTY_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01345"></a>01345 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01346"></a>01346 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01347"></a>01347
<a name="l01348"></a>01348 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a5e72ed7bc2e7991094fecd272775f92c">S_PC_4</a>;
<a name="l01349"></a>01349 <span class="vhdlkeyword">end</span>
<a name="l01350"></a>01350 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ERR_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01351"></a>01351 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01352"></a>01352 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01353"></a>01353
<a name="l01354"></a>01354 <span class="vhdlchar">fault_address_state_o</span> &lt;= { <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a>, <span class="vhdllogic">2&#39;b00</span> };
<a name="l01355"></a>01355 <span class="vhdlchar">rw_state_o</span> &lt;= ~<a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a>;
<a name="l01356"></a>01356 <span class="vhdlchar">fc_state_o</span> &lt;= <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a>;
<a name="l01357"></a>01357 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <a class="code" href="classbus__control.html#a63d428a3abed8bfe070ad6e6f82ca72e">VECTOR_BUS_TRAP</a>;
<a name="l01358"></a>01358
<a name="l01359"></a>01359 <span class="vhdlchar">jmp_bus_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01360"></a>01360 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01361"></a>01361 <span class="vhdlkeyword">end</span>
<a name="l01362"></a>01362 <span class="vhdlkeyword">end</span>
<a name="l01363"></a>01363 <a class="code" href="classbus__control.html#a5e72ed7bc2e7991094fecd272775f92c">S_PC_4</a>: <span class="vhdlkeyword">begin</span>
<a name="l01364"></a>01364 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01365"></a>01365 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01366"></a>01366
<a name="l01367"></a>01367 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a28895ce8a15bd607103ea20914434342">S_PC_3</a>;
<a name="l01368"></a>01368 <span class="vhdlkeyword">end</span>
<a name="l01369"></a>01369 <a class="code" href="classbus__control.html#aa19b7d76f1e25fd78b158b98088bd82a">S_PC_5</a>: <span class="vhdlkeyword">begin</span>
<a name="l01370"></a>01370 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ACK_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01371"></a>01371 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01372"></a>01372 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01373"></a>01373
<a name="l01374"></a>01374 <span class="vhdlchar">prefetch_ir_o</span> &lt;= { <span class="vhdlchar">prefetch_ir_o</span>[<span class="vhdllogic">79</span>:<span class="vhdllogic">32</span>], <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] };
<a name="l01375"></a>01375
<a name="l01376"></a>01376 <span class="vhdlchar">prefetch_ir_valid_32_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01377"></a>01377 <span class="vhdlchar">prefetch_ir_valid_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01378"></a>01378 <span class="vhdlchar">prefetch_ir_valid_80_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01379"></a>01379 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>;
<a name="l01380"></a>01380 <span class="vhdlkeyword">end</span>
<a name="l01381"></a>01381 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">RTY_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01382"></a>01382 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01383"></a>01383 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01384"></a>01384
<a name="l01385"></a>01385 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a1c803cc4a4f514cd4027a798d9236e5e">S_PC_6</a>;
<a name="l01386"></a>01386 <span class="vhdlkeyword">end</span>
<a name="l01387"></a>01387 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ERR_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01388"></a>01388 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01389"></a>01389 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01390"></a>01390
<a name="l01391"></a>01391 <span class="vhdlchar">fault_address_state_o</span> &lt;= { <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a>, <span class="vhdllogic">2&#39;b00</span> };
<a name="l01392"></a>01392 <span class="vhdlchar">rw_state_o</span> &lt;= ~<a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a>;
<a name="l01393"></a>01393 <span class="vhdlchar">fc_state_o</span> &lt;= <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a>;
<a name="l01394"></a>01394 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <a class="code" href="classbus__control.html#a63d428a3abed8bfe070ad6e6f82ca72e">VECTOR_BUS_TRAP</a>;
<a name="l01395"></a>01395
<a name="l01396"></a>01396 <span class="vhdlchar">jmp_bus_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01397"></a>01397 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01398"></a>01398 <span class="vhdlkeyword">end</span>
<a name="l01399"></a>01399 <span class="vhdlkeyword">end</span>
<a name="l01400"></a>01400 <a class="code" href="classbus__control.html#a1c803cc4a4f514cd4027a798d9236e5e">S_PC_6</a>: <span class="vhdlkeyword">begin</span>
<a name="l01401"></a>01401 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01402"></a>01402 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01403"></a>01403
<a name="l01404"></a>01404 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#aa19b7d76f1e25fd78b158b98088bd82a">S_PC_5</a>;
<a name="l01405"></a>01405 <span class="vhdlkeyword">end</span>
<a name="l01406"></a>01406
<a name="l01407"></a>01407 <span class="keyword">//*******************</span>
<a name="l01408"></a>01408 <a class="code" href="classbus__control.html#af752b2515eb632068e26865f1569598c">S_READ_1</a>: <span class="vhdlkeyword">begin</span>
<a name="l01409"></a>01409 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ACK_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01410"></a>01410 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01411"></a>01411 <span class="keyword">//CYC_O &lt;= 1&#39;b1;</span>
<a name="l01412"></a>01412 <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> &lt;= <a class="code" href="classbus__control.html#a2997069937ed71fba6eefb8837ba3282">address_i_plus_4</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>];
<a name="l01413"></a>01413 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b1100</span>;
<a name="l01414"></a>01414 <span class="keyword">//STB_O &lt;= 1&#39;b1;</span>
<a name="l01415"></a>01415 <span class="keyword">//WE_O &lt;= 1&#39;b0;</span>
<a name="l01416"></a>01416
<a name="l01417"></a>01417 <span class="keyword">//SGL_O &lt;= 1&#39;b0;</span>
<a name="l01418"></a>01418 <span class="keyword">//BLK_O &lt;= 1&#39;b1;</span>
<a name="l01419"></a>01419 <span class="keyword">//RMW_O &lt;= 1&#39;b0;</span>
<a name="l01420"></a>01420 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
<a name="l01421"></a>01421
<a name="l01422"></a>01422 <span class="keyword">//if(supervisor_i == 1&#39;b1) fc_o &lt;= (address_type_i == 1&#39;b0) ? FC_SUPERVISOR_DATA : FC_SUPERVISOR_PROGRAM;</span>
<a name="l01423"></a>01423 <span class="keyword">//else fc_o &lt;= (address_type_i == 1&#39;b0) ? FC_USER_DATA : FC_USER_PROGRAM;</span>
<a name="l01424"></a>01424
<a name="l01425"></a>01425 <span class="vhdlchar">data_read_o</span> &lt;= { <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">16&#39;b0</span> };
<a name="l01426"></a>01426
<a name="l01427"></a>01427 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a269161b7fabba2e00d3a3a5153a9620e">S_READ_2</a>;
<a name="l01428"></a>01428 <span class="vhdlkeyword">end</span>
<a name="l01429"></a>01429 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01430"></a>01430 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">read_modify_write_i</span> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01431"></a>01431 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01432"></a>01432 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01433"></a>01433 <span class="vhdlkeyword">end</span>
<a name="l01434"></a>01434 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01435"></a>01435 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01436"></a>01436 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01437"></a>01437 <span class="vhdlkeyword">end</span>
<a name="l01438"></a>01438
<a name="l01439"></a>01439 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b00</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlchar">data_read_o</span> &lt;= <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l01440"></a>01440 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlchar">data_read_o</span> &lt;= { {<span class="vhdllogic">16</span>{<a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">15</span>]}}, <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] };
<a name="l01441"></a>01441 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b00</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlchar">data_read_o</span> &lt;= { {<span class="vhdllogic">16</span>{<a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>]}}, <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">16</span>] };
<a name="l01442"></a>01442 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlchar">data_read_o</span> &lt;= { {<span class="vhdllogic">24</span>{<a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">7</span>]}}, <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] };
<a name="l01443"></a>01443 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlchar">data_read_o</span> &lt;= { {<span class="vhdllogic">24</span>{<a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">15</span>]}}, <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>] };
<a name="l01444"></a>01444 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b01</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlchar">data_read_o</span> &lt;= { {<span class="vhdllogic">24</span>{<a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">23</span>]}}, <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">23</span>:<span class="vhdllogic">16</span>] };
<a name="l01445"></a>01445 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b00</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlchar">data_read_o</span> &lt;= { {<span class="vhdllogic">24</span>{<a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>]}}, <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">24</span>] };
<a name="l01446"></a>01446
<a name="l01447"></a>01447 <span class="vhdlchar">finished_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01448"></a>01448 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01449"></a>01449 <span class="vhdlkeyword">end</span>
<a name="l01450"></a>01450 <span class="vhdlkeyword">end</span>
<a name="l01451"></a>01451 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">RTY_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01452"></a>01452 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01453"></a>01453 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01454"></a>01454
<a name="l01455"></a>01455 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>;
<a name="l01456"></a>01456 <span class="vhdlkeyword">end</span>
<a name="l01457"></a>01457 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ERR_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01458"></a>01458 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01459"></a>01459 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01460"></a>01460
<a name="l01461"></a>01461 <span class="vhdlchar">fault_address_state_o</span> &lt;= { <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a>, <span class="vhdllogic">2&#39;b00</span> };
<a name="l01462"></a>01462 <span class="vhdlchar">rw_state_o</span> &lt;= ~<a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a>;
<a name="l01463"></a>01463 <span class="vhdlchar">fc_state_o</span> &lt;= <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a>;
<a name="l01464"></a>01464 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <a class="code" href="classbus__control.html#a63d428a3abed8bfe070ad6e6f82ca72e">VECTOR_BUS_TRAP</a>;
<a name="l01465"></a>01465
<a name="l01466"></a>01466 <span class="vhdlchar">jmp_bus_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01467"></a>01467 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01468"></a>01468 <span class="vhdlkeyword">end</span>
<a name="l01469"></a>01469 <span class="vhdlkeyword">end</span>
<a name="l01470"></a>01470 <a class="code" href="classbus__control.html#a269161b7fabba2e00d3a3a5153a9620e">S_READ_2</a>: <span class="vhdlkeyword">begin</span>
<a name="l01471"></a>01471 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ACK_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01472"></a>01472 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01473"></a>01473 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01474"></a>01474
<a name="l01475"></a>01475 <span class="vhdlchar">data_read_o</span> &lt;= { <span class="vhdlchar">data_read_o</span>[<span class="vhdllogic">31</span>:<span class="vhdllogic">16</span>], <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">16</span>] };
<a name="l01476"></a>01476
<a name="l01477"></a>01477 <span class="vhdlchar">finished_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01478"></a>01478 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01479"></a>01479
<a name="l01480"></a>01480 <span class="vhdlkeyword">end</span>
<a name="l01481"></a>01481 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">RTY_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01482"></a>01482 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01483"></a>01483 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01484"></a>01484
<a name="l01485"></a>01485 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a8af7b5fb8c5d5d3788e5af5dad48393b">S_READ_3</a>;
<a name="l01486"></a>01486 <span class="vhdlkeyword">end</span>
<a name="l01487"></a>01487 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ERR_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01488"></a>01488 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01489"></a>01489 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01490"></a>01490
<a name="l01491"></a>01491 <span class="vhdlchar">fault_address_state_o</span> &lt;= { <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a>, <span class="vhdllogic">2&#39;b00</span> };
<a name="l01492"></a>01492 <span class="vhdlchar">rw_state_o</span> &lt;= ~<a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a>;
<a name="l01493"></a>01493 <span class="vhdlchar">fc_state_o</span> &lt;= <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a>;
<a name="l01494"></a>01494 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <a class="code" href="classbus__control.html#a63d428a3abed8bfe070ad6e6f82ca72e">VECTOR_BUS_TRAP</a>;
<a name="l01495"></a>01495
<a name="l01496"></a>01496 <span class="vhdlchar">jmp_bus_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01497"></a>01497 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01498"></a>01498 <span class="vhdlkeyword">end</span>
<a name="l01499"></a>01499
<a name="l01500"></a>01500 <span class="vhdlkeyword">end</span>
<a name="l01501"></a>01501 <a class="code" href="classbus__control.html#a8af7b5fb8c5d5d3788e5af5dad48393b">S_READ_3</a>: <span class="vhdlkeyword">begin</span>
<a name="l01502"></a>01502 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01503"></a>01503 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01504"></a>01504
<a name="l01505"></a>01505 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a269161b7fabba2e00d3a3a5153a9620e">S_READ_2</a>;
<a name="l01506"></a>01506 <span class="vhdlkeyword">end</span>
<a name="l01507"></a>01507
<a name="l01113"></a>01113
<a name="l01114"></a>01114 <span class="vhdlkeyword">end</span>
<a name="l01115"></a>01115 <span class="keyword">// interrupt</span>
<a name="l01116"></a>01116 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_interrupt_i</span> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01117"></a>01117 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01118"></a>01118 <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> &lt;= { <span class="vhdllogic">27&#39;b111_1111_1111_1111_1111_1111_1111</span>, <a class="code" href="classbus__control.html#a18d43f989323778008d066233ddaa191">last_interrupt_mask</a> };
<a name="l01119"></a>01119 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b1111</span>;
<a name="l01120"></a>01120 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01121"></a>01121 <a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01122"></a>01122
<a name="l01123"></a>01123 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01124"></a>01124 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01125"></a>01125 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01126"></a>01126 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
<a name="l01127"></a>01127
<a name="l01128"></a>01128 <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a> &lt;= <a class="code" href="classbus__control.html#ac44cb27522dcf872ea1f1d63cb652d9b">FC_CPU_SPACE</a>;
<a name="l01129"></a>01129
<a name="l01130"></a>01130 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a8ff92de377aefca42782778cda7132f3">S_INT_1</a>;
<a name="l01131"></a>01131 <span class="vhdlkeyword">end</span>
<a name="l01132"></a>01132 <span class="vhdlkeyword">end</span>
<a name="l01133"></a>01133
<a name="l01134"></a>01134 <a class="code" href="classbus__control.html#a8e24d83b04e325557b534b6fbe3c06ca">S_RESET</a>: <span class="vhdlkeyword">begin</span>
<a name="l01135"></a>01135 <a class="code" href="classbus__control.html#af4b71c6c152246795fcfed45e67bab33">reset_counter</a> &lt;= <a class="code" href="classbus__control.html#af4b71c6c152246795fcfed45e67bab33">reset_counter</a> - <span class="vhdllogic">8&#39;d1</span>;
<a name="l01136"></a>01136
<a name="l01137"></a>01137 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#af4b71c6c152246795fcfed45e67bab33">reset_counter</a> == <span class="vhdllogic">8&#39;d0</span>) <span class="vhdlkeyword">begin</span>
<a name="l01138"></a>01138 <span class="vhdlchar">finished_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01139"></a>01139 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01140"></a>01140 <span class="vhdlkeyword">end</span>
<a name="l01141"></a>01141 <span class="vhdlkeyword">end</span>
<a name="l01142"></a>01142
<a name="l01143"></a>01143 <a class="code" href="classbus__control.html#a2545a07988315cbf68e808af80333335">S_BLOCKED</a>: <span class="vhdlkeyword">begin</span>
<a name="l01144"></a>01144 <span class="vhdlkeyword">end</span>
<a name="l01145"></a>01145
<a name="l01146"></a>01146 <a class="code" href="classbus__control.html#a8ff92de377aefca42782778cda7132f3">S_INT_1</a>: <span class="vhdlkeyword">begin</span>
<a name="l01147"></a>01147 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ACK_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01148"></a>01148 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01149"></a>01149 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01150"></a>01150
<a name="l01151"></a>01151 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];
<a name="l01152"></a>01152
<a name="l01153"></a>01153 <span class="vhdlchar">finished_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01154"></a>01154 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01155"></a>01155 <span class="vhdlkeyword">end</span>
<a name="l01156"></a>01156 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">RTY_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01157"></a>01157 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01158"></a>01158 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01159"></a>01159
<a name="l01160"></a>01160 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <span class="vhdllogic">8&#39;d24</span> + { <span class="vhdllogic">5&#39;b0</span>, <span class="vhdlchar">interrupt_mask_o</span> };
<a name="l01161"></a>01161
<a name="l01162"></a>01162 <span class="vhdlchar">finished_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01163"></a>01163 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01164"></a>01164 <span class="vhdlkeyword">end</span>
<a name="l01165"></a>01165 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ERR_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01166"></a>01166 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01167"></a>01167 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01168"></a>01168
<a name="l01169"></a>01169 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <span class="vhdllogic">8&#39;d24</span>; <span class="keyword">// spurious interrupt</span>
<a name="l01170"></a>01170
<a name="l01171"></a>01171 <span class="vhdlchar">finished_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01172"></a>01172 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01173"></a>01173 <span class="vhdlkeyword">end</span>
<a name="l01174"></a>01174 <span class="vhdlkeyword">end</span>
<a name="l01175"></a>01175
<a name="l01176"></a>01176 <a class="code" href="classbus__control.html#abc89f2549e5275c60648fc9a94876e29">S_PC_0</a>: <span class="vhdlkeyword">begin</span>
<a name="l01177"></a>01177 <a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01178"></a>01178 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">supervisor_i</span> == <span class="vhdllogic">1&#39;b1</span>) <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a> &lt;= <a class="code" href="classbus__control.html#a1dc6742718597d6e0ef98e8200bb49bf">FC_SUPERVISOR_PROGRAM</a>;
<a name="l01179"></a>01179 <span class="vhdlkeyword">else</span> <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a> &lt;= <a class="code" href="classbus__control.html#a80b93f8634a7f03a199836a78c52d9bb">FC_USER_PROGRAM</a>;
<a name="l01180"></a>01180
<a name="l01181"></a>01181 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01182"></a>01182 <span class="vhdlchar">prefetch_ir_valid_32_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01183"></a>01183 <span class="vhdlchar">prefetch_ir_valid_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01184"></a>01184 <span class="vhdlchar">prefetch_ir_valid_80_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01185"></a>01185
<a name="l01186"></a>01186 <span class="vhdlchar">fault_address_state_o</span> &lt;= <span class="vhdlchar">pc_i</span>;
<a name="l01187"></a>01187 <span class="vhdlchar">rw_state_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01188"></a>01188 <span class="vhdlchar">fc_state_o</span> &lt;= (<span class="vhdlchar">supervisor_i</span> == <span class="vhdllogic">1&#39;b1</span>) ? <a class="code" href="classbus__control.html#a1dc6742718597d6e0ef98e8200bb49bf">FC_SUPERVISOR_PROGRAM</a> : <a class="code" href="classbus__control.html#a80b93f8634a7f03a199836a78c52d9bb">FC_USER_PROGRAM</a>;
<a name="l01189"></a>01189 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <a class="code" href="classbus__control.html#a16c432fa4a9897426aab6df04ee608e0">VECTOR_ADDRESS_TRAP</a>;
<a name="l01190"></a>01190
<a name="l01191"></a>01191 <span class="vhdlchar">jmp_address_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01192"></a>01192 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01193"></a>01193 <span class="vhdlkeyword">end</span>
<a name="l01194"></a>01194 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01195"></a>01195 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01196"></a>01196
<a name="l01197"></a>01197 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">prefetch_ir_valid_32_o</span> == <span class="vhdllogic">1&#39;b0</span>) <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> &lt;= <span class="vhdlchar">pc_i</span>[<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>];
<a name="l01198"></a>01198 <span class="vhdlkeyword">else</span> <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> &lt;= <a class="code" href="classbus__control.html#a96afbad4fe8073f7c58baf255b66c944">pc_i_plus_6</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>];
<a name="l01199"></a>01199
<a name="l01200"></a>01200 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= (<span class="vhdlchar">pc_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span>)? <span class="vhdllogic">4&#39;b0011</span> :
<a name="l01201"></a>01201 <span class="vhdllogic">4&#39;b1111</span>;
<a name="l01202"></a>01202 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01203"></a>01203
<a name="l01204"></a>01204 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">prefetch_ir_valid_32_o</span> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>
<a name="l01205"></a>01205 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01206"></a>01206 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01207"></a>01207 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01208"></a>01208 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a9c7e8a6d030ee1f404d7526ebda509ca">CTI_INCR_CYCLE</a>;
<a name="l01209"></a>01209 <span class="vhdlkeyword">end</span>
<a name="l01210"></a>01210 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01211"></a>01211 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01212"></a>01212 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01213"></a>01213 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01214"></a>01214 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
<a name="l01215"></a>01215 <span class="vhdlkeyword">end</span>
<a name="l01216"></a>01216
<a name="l01217"></a>01217 <a class="code" href="classbus__control.html#a9d1ac811b477c31c0d6aec541dca418d">saved_pc_change</a> &lt;= <span class="vhdlchar">pc_change_i</span>;
<a name="l01218"></a>01218 <span class="vhdlchar">prefetch_ir_valid_32_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01219"></a>01219
<a name="l01220"></a>01220 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a729095d9bb813c82aee565216b092f38">S_PC_1</a>;
<a name="l01221"></a>01221 <span class="vhdlkeyword">end</span>
<a name="l01222"></a>01222 <span class="vhdlkeyword">end</span>
<a name="l01223"></a>01223
<a name="l01224"></a>01224 <a class="code" href="classbus__control.html#a729095d9bb813c82aee565216b092f38">S_PC_1</a>: <span class="vhdlkeyword">begin</span>
<a name="l01225"></a>01225 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_change_i</span> != <span class="vhdllogic">2&#39;b00</span>) <a class="code" href="classbus__control.html#a9d1ac811b477c31c0d6aec541dca418d">saved_pc_change</a> &lt;= <span class="vhdlchar">pc_change_i</span>;
<a name="l01226"></a>01226
<a name="l01227"></a>01227 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ACK_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01228"></a>01228 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> == <a class="code" href="classbus__control.html#a9c7e8a6d030ee1f404d7526ebda509ca">CTI_INCR_CYCLE</a>) <span class="vhdlkeyword">begin</span>
<a name="l01229"></a>01229 <span class="keyword">//CYC_O &lt;= 1&#39;b1;</span>
<a name="l01230"></a>01230 <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> &lt;= <a class="code" href="classbus__control.html#addb6490ae2acff8c93b321b1e14c7bd4">pc_i_plus_4</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>];
<a name="l01231"></a>01231 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b1111</span>;
<a name="l01232"></a>01232 <span class="keyword">//STB_O &lt;= 1&#39;b1;</span>
<a name="l01233"></a>01233 <span class="keyword">//WE_O &lt;= 1&#39;b0;</span>
<a name="l01234"></a>01234
<a name="l01235"></a>01235 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span>) <span class="vhdlkeyword">begin</span>
<a name="l01236"></a>01236 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01237"></a>01237 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01238"></a>01238 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01239"></a>01239 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a9c7e8a6d030ee1f404d7526ebda509ca">CTI_INCR_CYCLE</a>;
<a name="l01240"></a>01240 <span class="vhdlkeyword">end</span>
<a name="l01241"></a>01241 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01242"></a>01242 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01243"></a>01243 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01244"></a>01244 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01245"></a>01245 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
<a name="l01246"></a>01246 <span class="vhdlkeyword">end</span>
<a name="l01247"></a>01247
<a name="l01248"></a>01248 <span class="keyword">//if(supervisor_i == 1&#39;b1) fc_o &lt;= FC_SUPERVISOR_PROGRAM;</span>
<a name="l01249"></a>01249 <span class="keyword">//else fc_o &lt;= FC_USER_PROGRAM;</span>
<a name="l01250"></a>01250
<a name="l01251"></a>01251 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span>) <span class="vhdlchar">prefetch_ir_o</span> &lt;= { <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">64&#39;b0</span> };
<a name="l01252"></a>01252 <span class="vhdlkeyword">else</span> <span class="vhdlchar">prefetch_ir_o</span> &lt;= { <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">48&#39;b0</span> };
<a name="l01253"></a>01253
<a name="l01254"></a>01254 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a28895ce8a15bd607103ea20914434342">S_PC_3</a>;
<a name="l01255"></a>01255 <span class="vhdlkeyword">end</span>
<a name="l01256"></a>01256 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01257"></a>01257 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01258"></a>01258 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01259"></a>01259
<a name="l01260"></a>01260 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#a9d1ac811b477c31c0d6aec541dca418d">saved_pc_change</a> == <span class="vhdllogic">2&#39;b10</span> || <a class="code" href="classbus__control.html#a9d1ac811b477c31c0d6aec541dca418d">saved_pc_change</a> == <span class="vhdllogic">2&#39;b11</span> || <span class="vhdlchar">pc_change_i</span> == <span class="vhdllogic">2&#39;b10</span> || <span class="vhdlchar">pc_change_i</span> == <span class="vhdllogic">2&#39;b11</span>) <span class="vhdlkeyword">begin</span>
<a name="l01261"></a>01261 <span class="keyword">// load 4 words: [79:16] in 2,3 cycles</span>
<a name="l01262"></a>01262 <span class="vhdlchar">prefetch_ir_valid_32_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01263"></a>01263 <span class="vhdlchar">prefetch_ir_valid_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01264"></a>01264 <span class="vhdlchar">prefetch_ir_valid_80_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01265"></a>01265
<a name="l01266"></a>01266 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#abc89f2549e5275c60648fc9a94876e29">S_PC_0</a>;
<a name="l01267"></a>01267 <span class="vhdlkeyword">end</span>
<a name="l01268"></a>01268 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#a9d1ac811b477c31c0d6aec541dca418d">saved_pc_change</a> == <span class="vhdllogic">2&#39;b01</span> || <span class="vhdlchar">pc_change_i</span> == <span class="vhdllogic">2&#39;b01</span>) <span class="vhdlkeyword">begin</span>
<a name="l01269"></a>01269 <span class="keyword">// do not load any words</span>
<a name="l01270"></a>01270 <span class="vhdlchar">prefetch_ir_valid_32_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01271"></a>01271 <span class="vhdlchar">prefetch_ir_valid_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01272"></a>01272 <span class="vhdlchar">prefetch_ir_valid_80_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01273"></a>01273
<a name="l01274"></a>01274 <span class="vhdlchar">prefetch_ir_o</span> &lt;= { <span class="vhdlchar">prefetch_ir_o</span>[<span class="vhdllogic">63</span>:<span class="vhdllogic">32</span>], <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">16&#39;b0</span> };
<a name="l01275"></a>01275 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>;
<a name="l01276"></a>01276 <span class="vhdlkeyword">end</span>
<a name="l01277"></a>01277 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01278"></a>01278 <span class="vhdlchar">prefetch_ir_valid_32_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01279"></a>01279 <span class="vhdlchar">prefetch_ir_valid_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01280"></a>01280 <span class="vhdlchar">prefetch_ir_valid_80_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01281"></a>01281
<a name="l01282"></a>01282 <span class="vhdlchar">prefetch_ir_o</span> &lt;= { <span class="vhdlchar">prefetch_ir_o</span>[<span class="vhdllogic">79</span>:<span class="vhdllogic">32</span>], <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] };
<a name="l01283"></a>01283 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>;
<a name="l01284"></a>01284 <span class="vhdlkeyword">end</span>
<a name="l01285"></a>01285 <span class="vhdlkeyword">end</span>
<a name="l01286"></a>01286 <span class="vhdlkeyword">end</span>
<a name="l01287"></a>01287 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">RTY_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01288"></a>01288 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01289"></a>01289 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01290"></a>01290
<a name="l01291"></a>01291 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#aaa3088e2e223cdc5551d535c3739cad5">S_PC_2</a>;
<a name="l01292"></a>01292 <span class="vhdlkeyword">end</span>
<a name="l01293"></a>01293 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ERR_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01294"></a>01294 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01295"></a>01295 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01296"></a>01296
<a name="l01297"></a>01297 <span class="vhdlchar">fault_address_state_o</span> &lt;= { <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a>, <span class="vhdllogic">2&#39;b00</span> };
<a name="l01298"></a>01298 <span class="vhdlchar">rw_state_o</span> &lt;= ~<a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a>;
<a name="l01299"></a>01299 <span class="vhdlchar">fc_state_o</span> &lt;= <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a>;
<a name="l01300"></a>01300 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <a class="code" href="classbus__control.html#a63d428a3abed8bfe070ad6e6f82ca72e">VECTOR_BUS_TRAP</a>;
<a name="l01301"></a>01301
<a name="l01302"></a>01302 <span class="vhdlchar">jmp_bus_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01303"></a>01303 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01304"></a>01304 <span class="vhdlkeyword">end</span>
<a name="l01305"></a>01305 <span class="vhdlkeyword">end</span>
<a name="l01306"></a>01306 <a class="code" href="classbus__control.html#aaa3088e2e223cdc5551d535c3739cad5">S_PC_2</a>: <span class="vhdlkeyword">begin</span>
<a name="l01307"></a>01307 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01308"></a>01308 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01309"></a>01309
<a name="l01310"></a>01310 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a729095d9bb813c82aee565216b092f38">S_PC_1</a>;
<a name="l01311"></a>01311 <span class="vhdlkeyword">end</span>
<a name="l01312"></a>01312 <a class="code" href="classbus__control.html#a28895ce8a15bd607103ea20914434342">S_PC_3</a>: <span class="vhdlkeyword">begin</span>
<a name="l01313"></a>01313 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ACK_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01314"></a>01314 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span>) <span class="vhdlkeyword">begin</span>
<a name="l01315"></a>01315 <span class="keyword">//CYC_O &lt;= 1&#39;b1;</span>
<a name="l01316"></a>01316 <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> &lt;= <a class="code" href="classbus__control.html#a96afbad4fe8073f7c58baf255b66c944">pc_i_plus_6</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>];
<a name="l01317"></a>01317 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b1111</span>;
<a name="l01318"></a>01318 <span class="keyword">//STB_O &lt;= 1&#39;b1;</span>
<a name="l01319"></a>01319 <span class="keyword">//WE_O &lt;= 1&#39;b0;</span>
<a name="l01320"></a>01320
<a name="l01321"></a>01321 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01322"></a>01322 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01323"></a>01323 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01324"></a>01324 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
<a name="l01325"></a>01325
<a name="l01326"></a>01326 <span class="keyword">//if(supervisor_i == 1&#39;b1) fc_o &lt;= FC_SUPERVISOR_PROGRAM;</span>
<a name="l01327"></a>01327 <span class="keyword">//else fc_o &lt;= FC_USER_PROGRAM;</span>
<a name="l01328"></a>01328
<a name="l01329"></a>01329 <span class="vhdlchar">prefetch_ir_o</span> &lt;= { <span class="vhdlchar">prefetch_ir_o</span>[<span class="vhdllogic">79</span>:<span class="vhdllogic">64</span>], <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">32&#39;b0</span> };
<a name="l01330"></a>01330
<a name="l01331"></a>01331 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#aa19b7d76f1e25fd78b158b98088bd82a">S_PC_5</a>;
<a name="l01332"></a>01332 <span class="vhdlkeyword">end</span>
<a name="l01333"></a>01333 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01334"></a>01334 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01335"></a>01335 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01336"></a>01336
<a name="l01337"></a>01337 <span class="vhdlchar">prefetch_ir_o</span> &lt;= { <span class="vhdlchar">prefetch_ir_o</span>[<span class="vhdllogic">79</span>:<span class="vhdllogic">48</span>], <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">16&#39;b0</span> };
<a name="l01338"></a>01338
<a name="l01339"></a>01339 <span class="vhdlchar">prefetch_ir_valid_32_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01340"></a>01340 <span class="vhdlchar">prefetch_ir_valid_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01341"></a>01341 <span class="vhdlchar">prefetch_ir_valid_80_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01342"></a>01342 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>;
<a name="l01343"></a>01343 <span class="vhdlkeyword">end</span>
<a name="l01344"></a>01344 <span class="vhdlkeyword">end</span>
<a name="l01345"></a>01345 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">RTY_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01346"></a>01346 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01347"></a>01347 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01348"></a>01348
<a name="l01349"></a>01349 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a5e72ed7bc2e7991094fecd272775f92c">S_PC_4</a>;
<a name="l01350"></a>01350 <span class="vhdlkeyword">end</span>
<a name="l01351"></a>01351 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ERR_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01352"></a>01352 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01353"></a>01353 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01354"></a>01354
<a name="l01355"></a>01355 <span class="vhdlchar">fault_address_state_o</span> &lt;= { <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a>, <span class="vhdllogic">2&#39;b00</span> };
<a name="l01356"></a>01356 <span class="vhdlchar">rw_state_o</span> &lt;= ~<a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a>;
<a name="l01357"></a>01357 <span class="vhdlchar">fc_state_o</span> &lt;= <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a>;
<a name="l01358"></a>01358 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <a class="code" href="classbus__control.html#a63d428a3abed8bfe070ad6e6f82ca72e">VECTOR_BUS_TRAP</a>;
<a name="l01359"></a>01359
<a name="l01360"></a>01360 <span class="vhdlchar">jmp_bus_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01361"></a>01361 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01362"></a>01362 <span class="vhdlkeyword">end</span>
<a name="l01363"></a>01363 <span class="vhdlkeyword">end</span>
<a name="l01364"></a>01364 <a class="code" href="classbus__control.html#a5e72ed7bc2e7991094fecd272775f92c">S_PC_4</a>: <span class="vhdlkeyword">begin</span>
<a name="l01365"></a>01365 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01366"></a>01366 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01367"></a>01367
<a name="l01368"></a>01368 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a28895ce8a15bd607103ea20914434342">S_PC_3</a>;
<a name="l01369"></a>01369 <span class="vhdlkeyword">end</span>
<a name="l01370"></a>01370 <a class="code" href="classbus__control.html#aa19b7d76f1e25fd78b158b98088bd82a">S_PC_5</a>: <span class="vhdlkeyword">begin</span>
<a name="l01371"></a>01371 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ACK_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01372"></a>01372 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01373"></a>01373 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01374"></a>01374
<a name="l01375"></a>01375 <span class="vhdlchar">prefetch_ir_o</span> &lt;= { <span class="vhdlchar">prefetch_ir_o</span>[<span class="vhdllogic">79</span>:<span class="vhdllogic">32</span>], <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] };
<a name="l01376"></a>01376
<a name="l01377"></a>01377 <span class="vhdlchar">prefetch_ir_valid_32_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01378"></a>01378 <span class="vhdlchar">prefetch_ir_valid_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01379"></a>01379 <span class="vhdlchar">prefetch_ir_valid_80_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01380"></a>01380 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>;
<a name="l01381"></a>01381 <span class="vhdlkeyword">end</span>
<a name="l01382"></a>01382 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">RTY_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01383"></a>01383 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01384"></a>01384 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01385"></a>01385
<a name="l01386"></a>01386 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a1c803cc4a4f514cd4027a798d9236e5e">S_PC_6</a>;
<a name="l01387"></a>01387 <span class="vhdlkeyword">end</span>
<a name="l01388"></a>01388 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ERR_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01389"></a>01389 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01390"></a>01390 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01391"></a>01391
<a name="l01392"></a>01392 <span class="vhdlchar">fault_address_state_o</span> &lt;= { <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a>, <span class="vhdllogic">2&#39;b00</span> };
<a name="l01393"></a>01393 <span class="vhdlchar">rw_state_o</span> &lt;= ~<a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a>;
<a name="l01394"></a>01394 <span class="vhdlchar">fc_state_o</span> &lt;= <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a>;
<a name="l01395"></a>01395 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <a class="code" href="classbus__control.html#a63d428a3abed8bfe070ad6e6f82ca72e">VECTOR_BUS_TRAP</a>;
<a name="l01396"></a>01396
<a name="l01397"></a>01397 <span class="vhdlchar">jmp_bus_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01398"></a>01398 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01399"></a>01399 <span class="vhdlkeyword">end</span>
<a name="l01400"></a>01400 <span class="vhdlkeyword">end</span>
<a name="l01401"></a>01401 <a class="code" href="classbus__control.html#a1c803cc4a4f514cd4027a798d9236e5e">S_PC_6</a>: <span class="vhdlkeyword">begin</span>
<a name="l01402"></a>01402 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01403"></a>01403 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01404"></a>01404
<a name="l01405"></a>01405 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#aa19b7d76f1e25fd78b158b98088bd82a">S_PC_5</a>;
<a name="l01406"></a>01406 <span class="vhdlkeyword">end</span>
<a name="l01407"></a>01407
<a name="l01408"></a>01408 <span class="keyword">//*******************</span>
<a name="l01409"></a>01409 <a class="code" href="classbus__control.html#af752b2515eb632068e26865f1569598c">S_READ_1</a>: <span class="vhdlkeyword">begin</span>
<a name="l01410"></a>01410 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ACK_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01411"></a>01411 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01412"></a>01412 <span class="keyword">//CYC_O &lt;= 1&#39;b1;</span>
<a name="l01413"></a>01413 <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> &lt;= <a class="code" href="classbus__control.html#a2997069937ed71fba6eefb8837ba3282">address_i_plus_4</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>];
<a name="l01414"></a>01414 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b1100</span>;
<a name="l01415"></a>01415 <span class="keyword">//STB_O &lt;= 1&#39;b1;</span>
<a name="l01416"></a>01416 <span class="keyword">//WE_O &lt;= 1&#39;b0;</span>
<a name="l01417"></a>01417
<a name="l01418"></a>01418 <span class="keyword">//SGL_O &lt;= 1&#39;b0;</span>
<a name="l01419"></a>01419 <span class="keyword">//BLK_O &lt;= 1&#39;b1;</span>
<a name="l01420"></a>01420 <span class="keyword">//RMW_O &lt;= 1&#39;b0;</span>
<a name="l01421"></a>01421 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
<a name="l01422"></a>01422
<a name="l01423"></a>01423 <span class="keyword">//if(supervisor_i == 1&#39;b1) fc_o &lt;= (address_type_i == 1&#39;b0) ? FC_SUPERVISOR_DATA : FC_SUPERVISOR_PROGRAM;</span>
<a name="l01424"></a>01424 <span class="keyword">//else fc_o &lt;= (address_type_i == 1&#39;b0) ? FC_USER_DATA : FC_USER_PROGRAM;</span>
<a name="l01425"></a>01425
<a name="l01426"></a>01426 <span class="vhdlchar">data_read_o</span> &lt;= { <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">16&#39;b0</span> };
<a name="l01427"></a>01427
<a name="l01428"></a>01428 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a269161b7fabba2e00d3a3a5153a9620e">S_READ_2</a>;
<a name="l01429"></a>01429 <span class="vhdlkeyword">end</span>
<a name="l01430"></a>01430 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01431"></a>01431 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">read_modify_write_i</span> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01432"></a>01432 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01433"></a>01433 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01434"></a>01434 <span class="vhdlkeyword">end</span>
<a name="l01435"></a>01435 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01436"></a>01436 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01437"></a>01437 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01438"></a>01438 <span class="vhdlkeyword">end</span>
<a name="l01439"></a>01439
<a name="l01440"></a>01440 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b00</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlchar">data_read_o</span> &lt;= <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
<a name="l01441"></a>01441 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlchar">data_read_o</span> &lt;= { {<span class="vhdllogic">16</span>{<a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">15</span>]}}, <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] };
<a name="l01442"></a>01442 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b00</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlchar">data_read_o</span> &lt;= { {<span class="vhdllogic">16</span>{<a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>]}}, <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">16</span>] };
<a name="l01443"></a>01443 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b11</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlchar">data_read_o</span> &lt;= { {<span class="vhdllogic">24</span>{<a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">7</span>]}}, <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] };
<a name="l01444"></a>01444 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlchar">data_read_o</span> &lt;= { {<span class="vhdllogic">24</span>{<a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">15</span>]}}, <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>] };
<a name="l01445"></a>01445 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b01</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlchar">data_read_o</span> &lt;= { {<span class="vhdllogic">24</span>{<a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">23</span>]}}, <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">23</span>:<span class="vhdllogic">16</span>] };
<a name="l01446"></a>01446 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b00</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlchar">data_read_o</span> &lt;= { {<span class="vhdllogic">24</span>{<a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>]}}, <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">24</span>] };
<a name="l01447"></a>01447
<a name="l01448"></a>01448 <span class="vhdlchar">finished_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01449"></a>01449 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01450"></a>01450 <span class="vhdlkeyword">end</span>
<a name="l01451"></a>01451 <span class="vhdlkeyword">end</span>
<a name="l01452"></a>01452 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">RTY_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01453"></a>01453 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01454"></a>01454 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01455"></a>01455
<a name="l01456"></a>01456 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>;
<a name="l01457"></a>01457 <span class="vhdlkeyword">end</span>
<a name="l01458"></a>01458 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ERR_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01459"></a>01459 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01460"></a>01460 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01461"></a>01461
<a name="l01462"></a>01462 <span class="vhdlchar">fault_address_state_o</span> &lt;= { <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a>, <span class="vhdllogic">2&#39;b00</span> };
<a name="l01463"></a>01463 <span class="vhdlchar">rw_state_o</span> &lt;= ~<a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a>;
<a name="l01464"></a>01464 <span class="vhdlchar">fc_state_o</span> &lt;= <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a>;
<a name="l01465"></a>01465 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <a class="code" href="classbus__control.html#a63d428a3abed8bfe070ad6e6f82ca72e">VECTOR_BUS_TRAP</a>;
<a name="l01466"></a>01466
<a name="l01467"></a>01467 <span class="vhdlchar">jmp_bus_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01468"></a>01468 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01469"></a>01469 <span class="vhdlkeyword">end</span>
<a name="l01470"></a>01470 <span class="vhdlkeyword">end</span>
<a name="l01471"></a>01471 <a class="code" href="classbus__control.html#a269161b7fabba2e00d3a3a5153a9620e">S_READ_2</a>: <span class="vhdlkeyword">begin</span>
<a name="l01472"></a>01472 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ACK_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01473"></a>01473 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01474"></a>01474 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01475"></a>01475
<a name="l01476"></a>01476 <span class="vhdlchar">data_read_o</span> &lt;= { <span class="vhdlchar">data_read_o</span>[<span class="vhdllogic">31</span>:<span class="vhdllogic">16</span>], <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">16</span>] };
<a name="l01477"></a>01477
<a name="l01478"></a>01478 <span class="vhdlchar">finished_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01479"></a>01479 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01480"></a>01480
<a name="l01481"></a>01481 <span class="vhdlkeyword">end</span>
<a name="l01482"></a>01482 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">RTY_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01483"></a>01483 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01484"></a>01484 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01485"></a>01485
<a name="l01486"></a>01486 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a8af7b5fb8c5d5d3788e5af5dad48393b">S_READ_3</a>;
<a name="l01487"></a>01487 <span class="vhdlkeyword">end</span>
<a name="l01488"></a>01488 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ERR_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01489"></a>01489 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01490"></a>01490 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01491"></a>01491
<a name="l01492"></a>01492 <span class="vhdlchar">fault_address_state_o</span> &lt;= { <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a>, <span class="vhdllogic">2&#39;b00</span> };
<a name="l01493"></a>01493 <span class="vhdlchar">rw_state_o</span> &lt;= ~<a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a>;
<a name="l01494"></a>01494 <span class="vhdlchar">fc_state_o</span> &lt;= <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a>;
<a name="l01495"></a>01495 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <a class="code" href="classbus__control.html#a63d428a3abed8bfe070ad6e6f82ca72e">VECTOR_BUS_TRAP</a>;
<a name="l01496"></a>01496
<a name="l01497"></a>01497 <span class="vhdlchar">jmp_bus_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01498"></a>01498 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01499"></a>01499 <span class="vhdlkeyword">end</span>
<a name="l01500"></a>01500
<a name="l01501"></a>01501 <span class="vhdlkeyword">end</span>
<a name="l01502"></a>01502 <a class="code" href="classbus__control.html#a8af7b5fb8c5d5d3788e5af5dad48393b">S_READ_3</a>: <span class="vhdlkeyword">begin</span>
<a name="l01503"></a>01503 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01504"></a>01504 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01505"></a>01505
<a name="l01506"></a>01506 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a269161b7fabba2e00d3a3a5153a9620e">S_READ_2</a>;
<a name="l01507"></a>01507 <span class="vhdlkeyword">end</span>
<a name="l01508"></a>01508
<a name="l01509"></a>01509 <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>: <span class="vhdlkeyword">begin</span>
<a name="l01510"></a>01510 <span class="vhdlchar">jmp_address_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01511"></a>01511 <span class="vhdlchar">jmp_bus_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01512"></a>01512
<a name="l01513"></a>01513 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_read_i</span> == <span class="vhdllogic">1&#39;b0</span> &amp;&amp; <span class="vhdlchar">do_write_i</span> == <span class="vhdllogic">1&#39;b0</span> &amp;&amp; <span class="vhdlchar">do_interrupt_i</span> == <span class="vhdllogic">1&#39;b0</span> &amp;&amp; <span class="vhdlchar">do_reset_i</span> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>
<a name="l01514"></a>01514 <span class="vhdlchar">finished_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01515"></a>01515 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>;
<a name="l01516"></a>01516 <span class="vhdlkeyword">end</span>
<a name="l01517"></a>01517 <span class="vhdlkeyword">end</span>
<a name="l01518"></a>01518
<a name="l01519"></a>01519 <span class="keyword">//**********************</span>
<a name="l01520"></a>01520 <a class="code" href="classbus__control.html#aad6d7bc2df8264837b68548b4045a54b">S_WRITE_1</a>: <span class="vhdlkeyword">begin</span>
<a name="l01521"></a>01521 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ACK_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01522"></a>01522 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01523"></a>01523 <span class="keyword">//CYC_O &lt;= 1&#39;b1;</span>
<a name="l01524"></a>01524 <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> &lt;= <a class="code" href="classbus__control.html#a2997069937ed71fba6eefb8837ba3282">address_i_plus_4</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>];
<a name="l01525"></a>01525 <span class="keyword">//STB_O &lt;= 1&#39;b1;</span>
<a name="l01526"></a>01526 <span class="keyword">//WE_O &lt;= 1&#39;b1;</span>
<a name="l01527"></a>01527
<a name="l01528"></a>01528 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> &lt;= { <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">16&#39;b0</span> };
<a name="l01529"></a>01529 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b1100</span>;
<a name="l01530"></a>01530
<a name="l01531"></a>01531 <span class="keyword">//SGL_O &lt;= 1&#39;b0;</span>
<a name="l01532"></a>01532 <span class="keyword">//BLK_O &lt;= 1&#39;b1;</span>
<a name="l01533"></a>01533 <span class="keyword">//RMW_O &lt;= 1&#39;b0;</span>
<a name="l01534"></a>01534 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
<a name="l01535"></a>01535
<a name="l01536"></a>01536 <span class="keyword">//if(supervisor_i == 1&#39;b1) fc_o &lt;= FC_SUPERVISOR_DATA;</span>
<a name="l01537"></a>01537 <span class="keyword">//else fc_o &lt;= FC_USER_DATA;</span>
<a name="l01538"></a>01538
<a name="l01539"></a>01539 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a1f273f6cbe8fa88c5ac793cdb16128c5">S_WRITE_2</a>;
<a name="l01540"></a>01540 <span class="vhdlkeyword">end</span>
<a name="l01541"></a>01541 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01542"></a>01542 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01543"></a>01543 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01544"></a>01544
<a name="l01545"></a>01545 <span class="vhdlchar">finished_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01546"></a>01546 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01547"></a>01547 <span class="vhdlkeyword">end</span>
<a name="l01548"></a>01548 <span class="vhdlkeyword">end</span>
<a name="l01549"></a>01549 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">RTY_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01550"></a>01550 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01551"></a>01551 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01552"></a>01552
<a name="l01553"></a>01553 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>;
<a name="l01554"></a>01554 <span class="vhdlkeyword">end</span>
<a name="l01555"></a>01555 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ERR_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01556"></a>01556 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01557"></a>01557 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01558"></a>01558
<a name="l01559"></a>01559 <span class="vhdlchar">fault_address_state_o</span> &lt;= { <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a>, <span class="vhdllogic">2&#39;b00</span> };
<a name="l01560"></a>01560 <span class="vhdlchar">rw_state_o</span> &lt;= ~<a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a>;
<a name="l01561"></a>01561 <span class="vhdlchar">fc_state_o</span> &lt;= <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a>;
<a name="l01562"></a>01562 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <a class="code" href="classbus__control.html#a63d428a3abed8bfe070ad6e6f82ca72e">VECTOR_BUS_TRAP</a>;
<a name="l01563"></a>01563
<a name="l01564"></a>01564 <span class="vhdlchar">jmp_bus_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01565"></a>01565 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01566"></a>01566 <span class="vhdlkeyword">end</span>
<a name="l01567"></a>01567
<a name="l01568"></a>01568 <span class="vhdlkeyword">end</span>
<a name="l01569"></a>01569 <a class="code" href="classbus__control.html#a1f273f6cbe8fa88c5ac793cdb16128c5">S_WRITE_2</a>: <span class="vhdlkeyword">begin</span>
<a name="l01570"></a>01570 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ACK_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01571"></a>01571 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01572"></a>01572 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01573"></a>01573
<a name="l01574"></a>01574 <span class="vhdlchar">finished_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01575"></a>01575 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01576"></a>01576
<a name="l01577"></a>01577 <span class="vhdlkeyword">end</span>
<a name="l01578"></a>01578 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">RTY_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01579"></a>01579 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01580"></a>01580 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01581"></a>01581
<a name="l01582"></a>01582 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#aa913a2abc1c8f2afa2bb8f6ebcbbca01">S_WRITE_3</a>;
<a name="l01583"></a>01583 <span class="vhdlkeyword">end</span>
<a name="l01584"></a>01584 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ERR_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01585"></a>01585 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01586"></a>01586 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01587"></a>01587
<a name="l01588"></a>01588 <span class="vhdlchar">fault_address_state_o</span> &lt;= { <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a>, <span class="vhdllogic">2&#39;b00</span> };
<a name="l01589"></a>01589 <span class="vhdlchar">rw_state_o</span> &lt;= ~<a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a>;
<a name="l01590"></a>01590 <span class="vhdlchar">fc_state_o</span> &lt;= <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a>;
<a name="l01591"></a>01591 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <a class="code" href="classbus__control.html#a63d428a3abed8bfe070ad6e6f82ca72e">VECTOR_BUS_TRAP</a>;
<a name="l01592"></a>01592
<a name="l01593"></a>01593 <span class="vhdlchar">jmp_bus_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01594"></a>01594 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01595"></a>01595 <span class="vhdlkeyword">end</span>
<a name="l01596"></a>01596
<a name="l01597"></a>01597 <span class="vhdlkeyword">end</span>
<a name="l01598"></a>01598 <a class="code" href="classbus__control.html#aa913a2abc1c8f2afa2bb8f6ebcbbca01">S_WRITE_3</a>: <span class="vhdlkeyword">begin</span>
<a name="l01599"></a>01599 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01600"></a>01600 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01601"></a>01601
<a name="l01602"></a>01602 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a1f273f6cbe8fa88c5ac793cdb16128c5">S_WRITE_2</a>;
<a name="l01603"></a>01603 <span class="vhdlkeyword">end</span>
<a name="l01604"></a>01604
<a name="l01605"></a>01605 <span class="vhdlkeyword">endcase</span>
<a name="l01606"></a>01606 <span class="vhdlkeyword">end</span>
<a name="l01607"></a>01607 <span class="vhdlkeyword">end</span>
<a name="l01509"></a>01509
<a name="l01510"></a>01510 <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>: <span class="vhdlkeyword">begin</span>
<a name="l01511"></a>01511 <span class="vhdlchar">jmp_address_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01512"></a>01512 <span class="vhdlchar">jmp_bus_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01513"></a>01513
<a name="l01514"></a>01514 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_read_i</span> == <span class="vhdllogic">1&#39;b0</span> &amp;&amp; <span class="vhdlchar">do_write_i</span> == <span class="vhdllogic">1&#39;b0</span> &amp;&amp; <span class="vhdlchar">do_interrupt_i</span> == <span class="vhdllogic">1&#39;b0</span> &amp;&amp; <span class="vhdlchar">do_reset_i</span> == <span class="vhdllogic">1&#39;b0</span>) <span class="vhdlkeyword">begin</span>
<a name="l01515"></a>01515 <span class="vhdlchar">finished_o</span> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01516"></a>01516 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>;
<a name="l01517"></a>01517 <span class="vhdlkeyword">end</span>
<a name="l01518"></a>01518 <span class="vhdlkeyword">end</span>
<a name="l01519"></a>01519
<a name="l01520"></a>01520 <span class="keyword">//**********************</span>
<a name="l01521"></a>01521 <a class="code" href="classbus__control.html#aad6d7bc2df8264837b68548b4045a54b">S_WRITE_1</a>: <span class="vhdlkeyword">begin</span>
<a name="l01522"></a>01522 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ACK_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01523"></a>01523 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2&#39;b10</span> &amp;&amp; <span class="vhdlchar">size_i</span>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01524"></a>01524 <span class="keyword">//CYC_O &lt;= 1&#39;b1;</span>
<a name="l01525"></a>01525 <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> &lt;= <a class="code" href="classbus__control.html#a2997069937ed71fba6eefb8837ba3282">address_i_plus_4</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>];
<a name="l01526"></a>01526 <span class="keyword">//STB_O &lt;= 1&#39;b1;</span>
<a name="l01527"></a>01527 <span class="keyword">//WE_O &lt;= 1&#39;b1;</span>
<a name="l01528"></a>01528
<a name="l01529"></a>01529 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> &lt;= { <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">16&#39;b0</span> };
<a name="l01530"></a>01530 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> &lt;= <span class="vhdllogic">4&#39;b1100</span>;
<a name="l01531"></a>01531
<a name="l01532"></a>01532 <span class="keyword">//SGL_O &lt;= 1&#39;b0;</span>
<a name="l01533"></a>01533 <span class="keyword">//BLK_O &lt;= 1&#39;b1;</span>
<a name="l01534"></a>01534 <span class="keyword">//RMW_O &lt;= 1&#39;b0;</span>
<a name="l01535"></a>01535 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> &lt;= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
<a name="l01536"></a>01536
<a name="l01537"></a>01537 <span class="keyword">//if(supervisor_i == 1&#39;b1) fc_o &lt;= FC_SUPERVISOR_DATA;</span>
<a name="l01538"></a>01538 <span class="keyword">//else fc_o &lt;= FC_USER_DATA;</span>
<a name="l01539"></a>01539
<a name="l01540"></a>01540 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a1f273f6cbe8fa88c5ac793cdb16128c5">S_WRITE_2</a>;
<a name="l01541"></a>01541 <span class="vhdlkeyword">end</span>
<a name="l01542"></a>01542 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
<a name="l01543"></a>01543 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01544"></a>01544 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01545"></a>01545
<a name="l01546"></a>01546 <span class="vhdlchar">finished_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01547"></a>01547 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01548"></a>01548 <span class="vhdlkeyword">end</span>
<a name="l01549"></a>01549 <span class="vhdlkeyword">end</span>
<a name="l01550"></a>01550 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">RTY_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01551"></a>01551 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01552"></a>01552 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01553"></a>01553
<a name="l01554"></a>01554 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>;
<a name="l01555"></a>01555 <span class="vhdlkeyword">end</span>
<a name="l01556"></a>01556 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ERR_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01557"></a>01557 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01558"></a>01558 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01559"></a>01559
<a name="l01560"></a>01560 <span class="vhdlchar">fault_address_state_o</span> &lt;= { <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a>, <span class="vhdllogic">2&#39;b00</span> };
<a name="l01561"></a>01561 <span class="vhdlchar">rw_state_o</span> &lt;= ~<a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a>;
<a name="l01562"></a>01562 <span class="vhdlchar">fc_state_o</span> &lt;= <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a>;
<a name="l01563"></a>01563 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <a class="code" href="classbus__control.html#a63d428a3abed8bfe070ad6e6f82ca72e">VECTOR_BUS_TRAP</a>;
<a name="l01564"></a>01564
<a name="l01565"></a>01565 <span class="vhdlchar">jmp_bus_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01566"></a>01566 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01567"></a>01567 <span class="vhdlkeyword">end</span>
<a name="l01568"></a>01568
<a name="l01569"></a>01569 <span class="vhdlkeyword">end</span>
<a name="l01570"></a>01570 <a class="code" href="classbus__control.html#a1f273f6cbe8fa88c5ac793cdb16128c5">S_WRITE_2</a>: <span class="vhdlkeyword">begin</span>
<a name="l01571"></a>01571 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ACK_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01572"></a>01572 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01573"></a>01573 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01574"></a>01574
<a name="l01575"></a>01575 <span class="vhdlchar">finished_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01576"></a>01576 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01577"></a>01577
<a name="l01578"></a>01578 <span class="vhdlkeyword">end</span>
<a name="l01579"></a>01579 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">RTY_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01580"></a>01580 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01581"></a>01581 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01582"></a>01582
<a name="l01583"></a>01583 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#aa913a2abc1c8f2afa2bb8f6ebcbbca01">S_WRITE_3</a>;
<a name="l01584"></a>01584 <span class="vhdlkeyword">end</span>
<a name="l01585"></a>01585 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ERR_I</a> == <span class="vhdllogic">1&#39;b1</span>) <span class="vhdlkeyword">begin</span>
<a name="l01586"></a>01586 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01587"></a>01587 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b0</span>;
<a name="l01588"></a>01588
<a name="l01589"></a>01589 <span class="vhdlchar">fault_address_state_o</span> &lt;= { <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a>, <span class="vhdllogic">2&#39;b00</span> };
<a name="l01590"></a>01590 <span class="vhdlchar">rw_state_o</span> &lt;= ~<a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a>;
<a name="l01591"></a>01591 <span class="vhdlchar">fc_state_o</span> &lt;= <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a>;
<a name="l01592"></a>01592 <span class="vhdlchar">interrupt_trap_o</span> &lt;= <a class="code" href="classbus__control.html#a63d428a3abed8bfe070ad6e6f82ca72e">VECTOR_BUS_TRAP</a>;
<a name="l01593"></a>01593
<a name="l01594"></a>01594 <span class="vhdlchar">jmp_bus_trap_o</span> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01595"></a>01595 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
<a name="l01596"></a>01596 <span class="vhdlkeyword">end</span>
<a name="l01597"></a>01597
<a name="l01598"></a>01598 <span class="vhdlkeyword">end</span>
<a name="l01599"></a>01599 <a class="code" href="classbus__control.html#aa913a2abc1c8f2afa2bb8f6ebcbbca01">S_WRITE_3</a>: <span class="vhdlkeyword">begin</span>
<a name="l01600"></a>01600 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01601"></a>01601 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> &lt;= <span class="vhdllogic">1&#39;b1</span>;
<a name="l01602"></a>01602
<a name="l01603"></a>01603 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> &lt;= <a class="code" href="classbus__control.html#a1f273f6cbe8fa88c5ac793cdb16128c5">S_WRITE_2</a>;
<a name="l01604"></a>01604 <span class="vhdlkeyword">end</span>
<a name="l01605"></a>01605
<a name="l01606"></a>01606 <span class="vhdlkeyword">endcase</span>
<a name="l01607"></a>01607 <span class="vhdlkeyword">end</span>
<a name="l01608"></a>01608 <span class="vhdlkeyword">end</span>
</pre></div>
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00843">843</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00844">844</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00845">845</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00846">846</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00845">845</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00846">846</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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967,7 → 967,7
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<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00845">845</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00846">846</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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982,7 → 982,7
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<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00845">845</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00846">846</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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997,7 → 997,7
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<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00845">845</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00846">846</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
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1012,7 → 1012,7
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<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00845">845</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00846">846</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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1027,7 → 1027,7
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<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00845">845</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00846">846</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00845">845</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00846">846</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00845">845</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00846">846</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
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1072,7 → 1072,7
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<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00845">845</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00846">846</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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1087,7 → 1087,7
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00845">845</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00846">846</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00845">845</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00846">846</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00845">845</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00846">846</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00845">845</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00846">846</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00845">845</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00846">846</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00845">845</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00846">846</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00845">845</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00846">846</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00845">845</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00846">846</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00865">865</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00866">866</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00865">865</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00866">866</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00865">865</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00866">866</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00865">865</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00866">866</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00865">865</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00866">866</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00872">872</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00873">873</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00872">872</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00873">873</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00872">872</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00873">873</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00872">872</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00873">873</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00878">878</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00879">879</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00878">878</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00879">879</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00882">882</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00883">883</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00883">883</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00884">884</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00885">885</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00886">886</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00760">760</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00761">761</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00761">761</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00762">762</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00763">763</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00764">764</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00764">764</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00765">765</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00765">765</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00766">766</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00766">766</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00767">767</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00767">767</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00768">768</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00768">768</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00769">769</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00769">769</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00770">770</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00771">771</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00772">772</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00772">772</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00773">773</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00773">773</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00774">774</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00776">776</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00777">777</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00777">777</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00778">778</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00778">778</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00779">779</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00781">781</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00782">782</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00782">782</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00783">783</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00785">785</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00786">786</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00788">788</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00789">789</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00789">789</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00790">790</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00835">835</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00836">836</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00837">837</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00838">838</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00840">840</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00841">841</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<li><a class="el" href="ao68000_8v_source.html">ao68000.v</a></li>
</ul>
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<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:04 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
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113,7 → 113,7
</li>
</ul>
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<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/globals.html
85,6 → 85,9
<li>ALU_ABCD_SBCD_ADDX_SUBX
: <a class="el" href="ao68000_8v.html#a3e54001e73374bd4f7cfda3de55bd944">ao68000.v</a>
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<p class="endtd"></p>
</td></tr>
<tr>
<td>CLK_I</td><td>Input Port</td><td>82</td><td>-</td><td>-</td><td>-</td><td>System clock. </td></tr>
<td>CLK_I</td><td>Input Port</td><td>90</td><td>-</td><td>-</td><td>-</td><td>System clock. </td></tr>
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<p>The decoder is an instruction and addressing mode decoder. For instructions it takes as input the ir register from the registers module. The output of the decoder, in this case, is a microcode address of the first microcode word that performs the instruction.</p>
<p>In case of addressing mode decoding, the output is the address of the first microcode word that performs the operand loading or saving. This address is obtained from the currently selected addressing mode saved in the ea_mod and ea_type registers in the registers module. </p>
 
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<hr/><h2>Member Data Documentation</h2>
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<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
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</table>
<p>WISHBONE Master Address Output </p>
</div>
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<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
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- tmp .......................................................................... Temporary build/run directory
</pre></div> </div>
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</ul>
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<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
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<tr class="memlist"><td><a class="el" href="classbus__control.html#ad06cdf24c29b1b82596011bac2c9169c">ALWAYS_0</a>CLK_I, reset_n</td><td><a class="el" href="classbus__control.html">bus_control</a></td><td><code> [Always Construct]</code></td></tr>
<tr class="memlist"><td><a class="el" href="classbus__control.html#af34450e53e6fd2fd36db7dff17caf063">ALWAYS_1</a>CLK_I, reset_n</td><td><a class="el" href="classbus__control.html">bus_control</a></td><td><code> [Always Construct]</code></td></tr>
</table></div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
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</li>
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<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
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<li><a class="el" href="group__blocked__o.html">blocked_o Port</a></li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
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</li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
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</table>
<p>Asynchronous Reset Input </p>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
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<li>on interrupt acknowledge cycle: spurious interrupt. </li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
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<li>on interrupt acknowledge cycle: external vector provided on DAT_I[7:0]. </li>
</ul>
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<tr class="memlist"><td><a class="el" href="classdecoder.html#ab1fdf78d41476f922a501b7e4e0fe24a">ILLEGAL_1111_INSTRUCTION_TRAP</a></td><td><a class="el" href="classdecoder.html">decoder</a></td><td><code> [Parameter]</code></td></tr>
<tr class="memlist"><td><a class="el" href="classdecoder.html#adfdf73062e947946cd9fa70a18e956c8">UNUSED_MICROPC</a></td><td><a class="el" href="classdecoder.html">decoder</a></td><td><code> [Parameter]</code></td></tr>
</table></div>
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<li>ALU_ABCD_SBCD_ADDX_SUBX
: <a class="el" href="ao68000_8v.html#a3e54001e73374bd4f7cfda3de55bd944">ao68000.v</a>
</li>
<li>ALU_ABCD_SBCD_ADDX_SUBX_prepare
: <a class="el" href="ao68000_8v.html#ab6294988eed0a5e85d94de7c134351ec">ao68000.v</a>
</li>
<li>ALU_ADDA_SUBA_CMPA_ADDQ_SUBQ
: <a class="el" href="ao68000_8v.html#a30a87601d2ca38286bb0d486d59f6a07">ao68000.v</a>
</li>
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<li>CISC processor with microcode,</li>
<li>WISHBONE revision B.3 compatible MASTER interface,</li>
<li>Not cycle exact with the MC68000, some instructions take more cycles to complete, some less,</li>
<li>Uses about 4750 LE on Altera Cyclone II and about 45600 bits of RAM for microcode,</li>
<li>Uses about 4810 LE on Altera Cyclone II and about 45600 bits of RAM for microcode,</li>
<li>Tested against the WinUAE M68000 software emulator. Every 16-bit instruction was tested with random register contents and RAM contents (<a class="el" href="page_verification.html">Processor verification</a>). The result of execution was compared,</li>
<li>Contains a simple prefetch which is capable of holding up to 5 16-bit instruction words,</li>
<li>Documentation generated by Doxygen (www.doxygen.org) with doxverilog patch (<a href="http://developer.berlios.de/projects/doxverilog/">http://developer.berlios.de/projects/doxverilog/</a>). The specification is automatically extracted from the Doxygen HTML output.</li>
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<li>Data port maximum operand size: 32-bits,</li>
<li>Data transfer ordering: BIG ENDIAN,</li>
<li>Data transfer sequencing: UNDEFINED,</li>
<li>Constraints on <code>CLK_I</code> signal: described in <a class="el" href="page_spec_clocks.html">Clocks</a>, maximum frequency: about 82 MHz.</li>
<li>Constraints on <code>CLK_I</code> signal: described in <a class="el" href="page_spec_clocks.html">Clocks</a>, maximum frequency: about 90 MHz.</li>
</ul>
<h3>Use</h3>
<ul>
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<li><b>MC68000</b> - the original Motorola MC68000 processor. </li>
</ul>
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[000765ee] [00000752] [000765f6] [000765ee] [000765e4]
[000765da] [000765cf] [000811f8] [00000b00] [00000dc2]
</pre></div> </div>
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</ul>
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</li>
</ul>
</div>
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</table>
<p>WISHBONE Master Cycle Output </p>
</div>
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</ul>
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<a name="l00581"></a>00581
</pre></div></div>
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</ul>
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<p><a class="el" href="classao68000.html" title="ao68000 top level module.">ao68000</a> top level module. </p>
<p>This module contains only instantiations of sub-modules and wire declarations. </p>
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00405">405</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00406">406</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<hr/><h2>Member Data Documentation</h2>
<a class="anchor" id="a6bee7e749a667293d6fbea8fc1380d12"></a><!-- doxytag: member="ao68000::CLK_I" ref="a6bee7e749a667293d6fbea8fc1380d12" args="" -->
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<p><p>WISHBONE Clock Input </p>
</p>
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00407">407</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00408">408</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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</p>
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00419">419</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00420">420</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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</ul>
</p>
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00420">420</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00421">421</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
318,7 → 318,7
<p><p>WISHBONE Cycle Tag, TAG_TYPE: TGC_O, Single Bus Cycle. </p>
</p>
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00423">423</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00424">424</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
336,7 → 336,7
<p><p>WISHBONE Cycle Tag, TAG_TYPE: TGC_O, Block Bus Cycle. </p>
</p>
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00424">424</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00425">425</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
354,7 → 354,7
<p><p>WISHBONE Cycle Tag, TAG_TYPE: TGC_O, Read-Modify-Write Cycle. </p>
</p>
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00425">425</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00426">426</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
372,7 → 372,7
<p><p>WISHBONE Address Tag, TAG_TYPE: TGA_O, Cycle Type Identifier, Incrementing Bus Cycle or End-of-Burst Cycle. </p>
</p>
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00428">428</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00429">429</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
390,7 → 390,7
<p><p>WISHBONE Address Tag, TAG_TYPE: TGA_O, Burst Type Extension, always Linear Burst. </p>
</p>
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00429">429</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00430">430</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
415,7 → 415,7
</ul>
</p>
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00432">432</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00433">433</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
438,7 → 438,7
</ul>
</p>
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00440">440</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00441">441</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
456,7 → 456,7
<p><p>External device reset. Output high when processing the RESET instruction. </p>
</p>
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00441">441</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00442">442</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
474,7 → 474,7
<p><p>Asynchronous Reset Input </p>
</p>
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00408">408</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00409">409</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
492,7 → 492,7
<p><p>Processor blocked indicator. The processor is blocked after a double bus error. </p>
</p>
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00442">442</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00443">443</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
507,7 → 507,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00445">445</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00446">446</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
522,7 → 522,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00446">446</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00447">447</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
537,7 → 537,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00447">447</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00448">448</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
552,7 → 552,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00448">448</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00449">449</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
567,7 → 567,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00449">449</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00450">450</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
582,7 → 582,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00450">450</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00451">451</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
597,7 → 597,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00451">451</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00452">452</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
612,7 → 612,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00452">452</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00453">453</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
627,7 → 627,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00453">453</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00454">454</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
645,7 → 645,7
<p><p>WISHBONE Master Cycle Output </p>
</p>
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00410">410</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00411">411</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
660,7 → 660,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00454">454</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00455">455</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
675,7 → 675,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00455">455</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00456">456</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
690,7 → 690,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00456">456</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00457">457</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
705,7 → 705,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00457">457</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00458">458</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
720,7 → 720,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00458">458</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00459">459</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
735,7 → 735,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00459">459</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00460">460</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
750,7 → 750,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00460">460</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00461">461</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
765,7 → 765,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00461">461</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00462">462</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
780,7 → 780,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00462">462</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00463">463</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
795,7 → 795,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00463">463</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00464">464</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
813,7 → 813,7
<p><p>WISHBONE Master Address Output </p>
</p>
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00411">411</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00412">412</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
828,7 → 828,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00464">464</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00465">465</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
843,7 → 843,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00465">465</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00466">466</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
858,7 → 858,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00466">466</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00467">467</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
873,7 → 873,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00467">467</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00468">468</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
888,7 → 888,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00468">468</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00469">469</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
903,7 → 903,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00469">469</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00470">470</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
918,7 → 918,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00470">470</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00471">471</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
933,7 → 933,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00471">471</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00472">472</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
948,7 → 948,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00472">472</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00473">473</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
963,7 → 963,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00473">473</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00474">474</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
981,7 → 981,7
<p><p>WISHBONE Master Data Output </p>
</p>
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00412">412</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00413">413</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
996,7 → 996,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00474">474</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00475">475</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
1011,7 → 1011,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00475">475</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00476">476</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
1026,7 → 1026,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00476">476</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00477">477</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
1041,7 → 1041,7
</div>
<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00477">477</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00478">478</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
</div>
1056,7 → 1056,7
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<div class="memdoc">
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00478">478</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00479">479</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00479">479</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00480">480</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00480">480</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00481">481</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00481">481</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00482">482</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00482">482</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00483">483</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00483">483</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00484">484</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p><p>WISHBONE Master Data Input </p>
</p>
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00413">413</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00414">414</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00484">484</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00485">485</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00485">485</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00486">486</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00486">486</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00487">487</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00487">487</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00488">488</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00488">488</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00489">489</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00489">489</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00490">490</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00490">490</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00491">491</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00491">491</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00492">492</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00492">492</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00493">493</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00493">493</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00494">494</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p><p>WISHBONE Master Byte Select </p>
</p>
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00414">414</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00415">415</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00494">494</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00495">495</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00495">495</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00496">496</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00496">496</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00497">497</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00497">497</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00498">498</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00498">498</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00499">499</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00499">499</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00500">500</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00500">500</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00501">501</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
</div>
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<p><p>WISHBONE Master Strobe Output </p>
</p>
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00415">415</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00416">416</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p><p>WISHBONE Master Write Enable Output </p>
</p>
 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00416">416</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00417">417</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00418">418</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00419">419</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00679">679</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00680">680</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00502">502</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00503">503</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00673">673</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00674">674</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00654">654</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00655">655</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00637">637</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00638">638</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00696">696</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00697">697</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00554">554</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00555">555</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
 
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<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
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/trunk/doc/doxygen/html/functions_vars_0x65.html
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<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
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/trunk/doc/doxygen/html/globals_0x6f.html
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<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:04 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
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/trunk/doc/doxygen/html/functions_vars_0x77.html
71,7 → 71,7
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<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/functions_0x63.html
113,7 → 113,7
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<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/functions_0x75.html
72,7 → 72,7
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</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/classes.html
40,7 → 40,7
</td><td><a class="el" href="classmemory__registers.html">memory_registers</a>&#160;&#160;&#160;</td><td><a class="el" href="classregisters.html">registers</a>&#160;&#160;&#160;</td></tr><tr><td><a class="el" href="classao68000.html">ao68000</a>&#160;&#160;&#160;</td><td><a name="letter_C"></a><table border="0" cellspacing="0" cellpadding="0"><tr><td><div class="ah">&#160;&#160;C&#160;&#160;</div></td></tr></table>
</td><td><a class="el" href="classdecoder.html">decoder</a>&#160;&#160;&#160;</td><td><a class="el" href="classmicrocode__branch.html">microcode_branch</a>&#160;&#160;&#160;</td></tr></table><div class="qindex"><a class="qindex" href="#letter_A">A</a>&#160;|&#160;<a class="qindex" href="#letter_B">B</a>&#160;|&#160;<a class="qindex" href="#letter_C">C</a>&#160;|&#160;<a class="qindex" href="#letter_D">D</a>&#160;|&#160;<a class="qindex" href="#letter_M">M</a>&#160;|&#160;<a class="qindex" href="#letter_R">R</a></div>
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<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/group__BLK__O.html
27,7 → 27,7
</table>
<p>WISHBONE Cycle Tag, TAG_TYPE: TGC_O, Block Bus Cycle. </p>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
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/trunk/doc/doxygen/html/group__BTE__O.html
27,7 → 27,7
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<p>WISHBONE Address Tag, TAG_TYPE: TGA_O, Burst Type Extension, always Linear Burst. </p>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/globals_vars_0x67.html
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</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:04 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/globals_defs_0x62.html
102,7 → 102,7
</li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:04 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/globals_0x72.html
66,7 → 66,7
</li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:04 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/globals_defs_0x74.html
90,7 → 90,7
</li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:04 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/group__ipl__i.html
32,7 → 32,7
<li>RTY_I: auto-vector. </li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/page_spec_operation.html
91,7 → 91,7
<li>blocked state after a double bus error. </li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/index.html
68,7 → 68,7
</div>
<p><b>About the documentation:</b> The <a class="el" href="classao68000.html" title="ao68000 top level module.">ao68000</a> core documentation is generated by the Doxygen tool (www.doxygen.org) with the doxverilog patch (<a href="http://developer.berlios.de/projects/doxverilog/">http://developer.berlios.de/projects/doxverilog/</a>). </p>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/classao68000-members.html
345,7 → 345,7
<tr class="memlist"><td><a class="el" href="classalu.html#a52a04e7012270413af6cecfc29ce720a">Sm</a></td><td><a class="el" href="classalu.html">alu</a></td><td><code> [Define]</code></td></tr>
<tr class="memlist"><td><a class="el" href="classalu.html#ac5469ea2de38c1332c5a56b6b6242d55">Z</a></td><td><a class="el" href="classalu.html">alu</a></td><td><code> [Define]</code></td></tr>
</table></div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:04 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/doc/doxygen/html/functions_0x6f.html
77,7 → 77,7
</li>
</ul>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by&#160;
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:03 for ao68000 by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
/trunk/sw/ao68000_tool/Microcode.java
726,6 → 726,7
p .BRANCH_procedure().PROCEDURE_call_load_ea();
p .BRANCH_procedure().PROCEDURE_call_perform_ea_read();
 
p .ALU_ABCD_SBCD_ADDX_SUBX_prepare();
p .ALU_ABCD_SBCD_ADDX_SUBX()
.BRANCH_procedure().PROCEDURE_call_write();
 
/trunk/sw/ao68000_tool/Parser.java
531,6 → 531,10
GenerateMicrocode.entry(newline, "ALU_ARITHMETIC_LOGIC");
return new Parser(false);
}
Parser ALU_ABCD_SBCD_ADDX_SUBX_prepare() throws Exception {
GenerateMicrocode.entry(newline, "ALU_ABCD_SBCD_ADDX_SUBX_prepare");
return new Parser(false);
}
Parser ALU_ABCD_SBCD_ADDX_SUBX() throws Exception {
GenerateMicrocode.entry(newline, "ALU_ABCD_SBCD_ADDX_SUBX");
return new Parser(false);
/trunk/Makefile
85,8 → 85,8
cd ./tmp/compare_with_winuae/verilog && iverilog -y. -y./../../../rtl -y./../../../tests/compare_with_winuae/verilog -o tb_ao68000 ./../../../tests/compare_with_winuae/verilog/tb_ao68000.v
cp ./rtl/ao68000_microcode.mif ./tmp/compare_with_winuae/verilog
 
START_IR_DEC := 57344
END_IR_DEC := 61440
START_IR_DEC := 33024
END_IR_DEC := 33040
TERM_PROGRAM := xterm
COUNT := 4
COUNT_LIST := $(wordlist 1,$(COUNT),0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19)

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