URL
https://opencores.org/ocsvn/bustap-jtag/bustap-jtag/trunk
Subversion Repositories bustap-jtag
Compare Revisions
- This comparison shows the changes necessary to convert path
/bustap-jtag
- from Rev 12 to Rev 13
- ↔ Reverse comparison
Rev 12 → Rev 13
/trunk/rtl/up_monitor.v
128,7 → 128,7
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// generate capture wr_in |
assign capture_in = {trig_cond_ok_pulse,wr_en_d1,inter_cap_cnt,addr_in_d1[15:2],2'b00,data_in_d1[31:0]}; |
assign capture_wr = trig_cond_ok_pulse | (addr_mask_ok & trig_cond_ok); |
assign capture_wr = trig_cond_ok_pulse || (addr_mask_ok && trig_cond_ok); |
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// generate pre-trigger wr_in |
assign pretrig_full = (pretrig_cnt >= pretrig_num) || trig_cond_ok; |
/trunk/sim/up_bfm_sv.v
74,6 → 74,11
// start cpu bfm C model |
reg up_start; |
initial begin |
up_wbe_o = 1'b1; |
up_csn_o = 1'b1; |
up_addr_o = 'd0; |
up_data_o = 'd0; |
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@(posedge up_start); |
#100 up_bfm_c(5); |
end |
/trunk/sim/altera/virtual_jtag_stimulus.do
File deleted
/trunk/sim/altera/sim.sh
0,0 → 1,50
quit -sim |
vlib work |
vdel -lib work -all |
vlib work |
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set sim_started 0 |
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# compile vendor independent files |
vlog -work work ../../rtl/up_monitor.v +initreg+0 |
vlog -work work ../../rtl/up_monitor_wrapper.v +initreg+0 |
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# compile altera virtual jtag files |
source virtual_jtag_stimulus.tcl |
vlog -work work ../../rtl/altera/virtual_jtag_adda_fifo.v +incdir+../../rtl/altera |
vlog -work work ../../rtl/altera/virtual_jtag_adda_trig.v +incdir+../../rtl/altera |
vlog -work work ../../rtl/altera/virtual_jtag_addr_mask.v +incdir+../../rtl/altera |
vlog -work work altera_mf.v |
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# compile testbench files |
vlog -work work -sv ../up_monitor_tb.v |
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# compile register bfm files |
vlog -work work -sv ../reg_bfm_sv.v |
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# compile cpu bfm files |
# Sytemverilog DPI steps to combine sv and c |
# step 1: generate dpiheader.h |
vlog -work work -sv -dpiheader ../dpiheader.h ../up_bfm_sv.v |
## step 2: generate up_bfm_sv.obj |
#vsim -dpiexportobj up_bfm_sv up_bfm_sv |
# step 3: generate up_bfm_c.o |
gcc -c -I $::env(MODEL_TECH)/../include ../up_bfm_c.c |
# step 4: generate up_bfm_c.dll |
gcc -shared -Bsymbolic -o up_bfm_c.so up_bfm_c.o |
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# compile jtag bfms files |
vlog -work work -sv jtag_bfm_sv.v +incdir+../../rtl/altera |
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vsim -novopt \ |
-sv_lib up_bfm_c \ |
-t ps \ |
up_monitor_tb |
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set sim_started 1 |
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log -r */* |
radix -hexadecimal |
do wave.do |
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run 10000ns |