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https://opencores.org/ocsvn/hf-risc/hf-risc/trunk
Subversion Repositories hf-risc
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- This comparison shows the changes necessary to convert path
/hf-risc
- from Rev 3 to Rev 4
- ↔ Reverse comparison
Rev 3 → Rev 4
/trunk/ucore/peripherals_busmux.vhd
1,4 → 1,4
-- HF RISC MCU v3.2 |
-- HF-RISC v3.2 |
-- Sergio Johann Filho, 2013 - 2016 |
-- |
-- *This is a quick and dirty organization of a 3-stage pipelined MIPS microprocessor. All registers / memory |
45,7 → 45,7
-- tied to interrupt lines, so are the two counter comparators and the UART. |
-- |
-- *Compiler: |
-- Patched gcc versions 4.6.1 and 4.9.3. |
-- Patched GCC version 4.9.3. |
-- Mandatory gcc options are: -mips1(**) -mpatfree -mfix-r4000 -mno-check-zero-division -msoft-float -fshort-double |
-- -nostdinc -fno-builtin -fomit-frame-pointer -G 0 -mnohwmult -mnohwdiv -ffixed-lo -ffixed-hi |
-- |