URL
https://opencores.org/ocsvn/microriscii/microriscii/trunk
Subversion Repositories microriscii
Compare Revisions
- This comparison shows the changes necessary to convert path
/microriscii
- from Rev 18 to Rev 19
- ↔ Reverse comparison
Rev 18 → Rev 19
/mriscii/mriscii/tags/start/verilog/rtl/au.v
File deleted
/mriscii/mriscii/tags/start/verilog/rtl/regfile.v
File deleted
mriscii/mriscii/tags/start/verilog/rtl/regfile.v
Property changes :
Deleted: svn:executable
## -1 +0,0 ##
-*
\ No newline at end of property
Index: mriscii/mriscii/tags/start/verilog/rtl/lu.v
===================================================================
--- mriscii/mriscii/tags/start/verilog/rtl/lu.v (revision 18)
+++ mriscii/mriscii/tags/start/verilog/rtl/lu.v (nonexistent)
@@ -1,35 +0,0 @@
-//--------------------------------------------------------------------------------------------------
-//
-// Title : lu
-// Design : MicroRISCII
-// Author : Ali Mashtizadeh
-//
-//--------------------------------------------------------------------------------------------------
-`timescale 1ps / 1ps
-
-`define LOGIC_NOT 4'b00
-`define LOGIC_OR 4'b01
-`define LOGIC_AND 4'b10
-`define LOGIC_XOR 4'b11
-
-module lu(a,b,logic_op,o);
- // Inputs
- input [31:0] a;
- wire [31:0] a;
- input [31:0] b;
- wire [31:0] b;
- input [3:0] logic_op;
- wire [3:0] logic_op;
- // Outputs
- output [31:0] o;
- reg [31:0] o;
-
- always @ (logic_op || a || b)
- case (logic_op)
- `LOGIC_NOT : o = !(a);
- `LOGIC_OR : o = a || b;
- `LOGIC_AND : o = a && b;
- `LOGIC_XOR : o = a ^^ b;
- endcase
-
-endmodule
Index: mriscii/mriscii/tags/start/verilog/rtl.directory
===================================================================
--- mriscii/mriscii/tags/start/verilog/rtl.directory (revision 18)
+++ mriscii/mriscii/tags/start/verilog/rtl.directory (nonexistent)
@@ -1,7 +0,0 @@
-[IconPosition::lu.v]
-X=29
-Y=5
-
-[IconPosition::regfile.v]
-X=127
-Y=5
Index: mriscii/mriscii/tags/start/documentation/ISA.txt
===================================================================
--- mriscii/mriscii/tags/start/documentation/ISA.txt (revision 18)
+++ mriscii/mriscii/tags/start/documentation/ISA.txt (nonexistent)
@@ -1,77 +0,0 @@
-The encoding info is scattered in the source I'm gonna organize it all soon.
-
-MicroRISC II Instruction Set
-
-Arithmetic:
-ADD
-SUB
-MUL(U) // Optional / By default it is included
-DIV(U) // Optional
-MOD(U) // Optional
-SHR
-SHL
-ROR
-ROL
-PCNT // Population One Count
-PCNTZ // Population Zero Count
-PCNTC // Population Change Count
-RND // Random Number Generator
-Arguments: reg,reg,reg
-Arguments: reg,reg,imm16
-
-| OP(4) | ALUOP(4) | REGD(4) | REGA(4) | REGB(4) | VOID(12) |
-| OP(4) | ALUOP(4) | REGD(4) | REGA(4) | IMM(16) |
-
-Logic:
-OR
-AND
-XOR
-NOT
-Arguments: reg,reg,reg
-
-| OP(4) | LOGICOP(2) | VOID(2) | REGD(4) | REGA(4) | REGB(4) | VOID(12) |
-
-Memory:
-LB/LW/LD(S)
-SB/SW/SD
-Arguments: reg,[reg+imm16]
-
-| OP(4) | STORE/LOAD(1) | SIGNED(1) | SIZE(2) | REGD(4) | REGA(4) | IMM(16) |
-
-Branch:
-BEQ(L)
-BNE(L)
-BZ(L)
-BNZ(L)
-BC(L)
-BNC(L)
-J(L)
-JR(L)
-
-| OP(4) | REGD(4) | REGA(4) | REGB(4) | IMM(16) |
-
-BLT(L)
-BLTU(L)
-BNL(L)
-BNLU(L)
-BGT(L)
-BGTU(L)
-BNG(L)
-BNGU(L)
-
-| OP(4) | BranchOP(4) | REGD(4) | REGA(4) | REGB(4) | VOID(4) | IMM(8) |
-
-Interupts/Special:
-NOP // No Operation
-LLW imm16 // Load Low Word // Erases register and places 16bit value
-LHW imm16 // Load High Word // Erases register and places the 16bit value
-SIV reg // Set Interupt Vector
-GIV reg // Get Interupt Vector
-THROW reg // Throw and load soft cause(16 bits)
-THROW imm16 // Throw
-CAUSE reg // Get Cause(32 bits)
-IRET reg // Interupt Return
-GPRSR reg // Get Program Restore State Register(Carry,etc.)
-SPRSR reg // Set Program Restore State Register
-
-| OP(4) | SOP(4) | REGD(4) | REGA(4) | IMM(16) |
\ No newline at end of file
Index: mriscii/mriscii/tags
===================================================================
--- mriscii/mriscii/tags (revision 18)
+++ mriscii/mriscii/tags (nonexistent)
mriscii/mriscii/tags
Property changes :
Deleted: svn:mergeinfo
## -0,0 +0,0 ##
Index: mriscii/mriscii/trunk
===================================================================
--- mriscii/mriscii/trunk (revision 18)
+++ mriscii/mriscii/trunk (nonexistent)
mriscii/mriscii/trunk
Property changes :
Deleted: svn:mergeinfo
## -0,0 +0,0 ##
Index: mriscii/mriscii/branches
===================================================================
--- mriscii/mriscii/branches (revision 18)
+++ mriscii/mriscii/branches (nonexistent)
mriscii/mriscii/branches
Property changes :
Deleted: svn:mergeinfo
## -0,0 +0,0 ##
Index: mriscii/web_uploads
===================================================================
--- mriscii/web_uploads (revision 18)
+++ mriscii/web_uploads (nonexistent)
mriscii/web_uploads
Property changes :
Deleted: svn:mergeinfo
## -0,0 +0,0 ##