URL
https://opencores.org/ocsvn/oms8051mini/oms8051mini/trunk
Subversion Repositories oms8051mini
Compare Revisions
- This comparison shows the changes necessary to convert path
/oms8051mini/trunk/rtl/core
- from Rev 11 to Rev 14
- ↔ Reverse comparison
Rev 11 → Rev 14
/digital_core.v
156,13 → 156,7
wire wb_xram_cyc ; // data-ram cycle |
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//--------------------------------------------- |
// 8051 Instruction ROM interface |
//--------------------------------------------- |
wire [15:0] wbi_risc_adr; |
wire [7:0] wbi_risc_rdata; |
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|
//----------------------------- |
// wire Decleration |
//----------------------------- |
242,7 → 236,7
(wbd_risc_adr[15:12] == 4'b1000 ) ? 4'b0001 : |
(wbd_risc_adr[15:12] == 4'b1001 ) ? 4'b0010 : 4'b0000; |
|
wb_crossbar #(.WB_MASTER(3), |
wb_crossbar #(.WB_MASTER(2), |
.WB_SLAVE(3), |
.D_WD(8), |
.BE_WD(1), |
255,37 → 249,30
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// Master Interface Signal |
.wbd_taddr_master ({4'b0000, |
wbd_tar_id, |
.wbd_taddr_master ({ wbd_tar_id, |
ext_reg_tid }), |
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.wbd_din_master ({8'h0 , |
wbd_risc_wdata[7:0], |
.wbd_din_master ({wbd_risc_wdata[7:0], |
ext_reg_wdata } |
), |
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.wbd_dout_master ({wbi_risc_rdata, |
wb_master2_rdata, |
.wbd_dout_master ({wb_master2_rdata, |
ext_reg_rdata}), |
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.wbd_adr_master ({wbi_risc_adr[14:0], |
wbd_risc_adr[14:0], |
.wbd_adr_master ({wbd_risc_adr[14:0], |
ext_reg_addr[14:0]}), |
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.wbd_be_master ({1'b1,1'b1,1'b1}), |
.wbd_be_master ({1'b1,1'b1}), |
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.wbd_we_master ({1'b0,wbd_risc_we,ext_reg_wr } ), |
.wbd_we_master ({wbd_risc_we,ext_reg_wr } ), |
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.wbd_ack_master ({wbi_risc_ack, |
wbd_risc_ack, |
.wbd_ack_master ({wbd_risc_ack, |
ext_reg_ack } ), |
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.wbd_stb_master ({1'b0, |
wbd_risc_stb, |
.wbd_stb_master ({wbd_risc_stb, |
ext_reg_cs} ), |
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.wbd_cyc_master ({1'b0, |
wbd_risc_stb|wbd_risc_ack, |
.wbd_cyc_master ({wbd_risc_stb|wbd_risc_ack, |
ext_reg_cs|ext_reg_ack }), |
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.wbd_err_master (), |