URL
https://opencores.org/ocsvn/oms8051mini/oms8051mini/trunk
Subversion Repositories oms8051mini
Compare Revisions
- This comparison shows the changes necessary to convert path
/oms8051mini/trunk
- from Rev 3 to Rev 4
- ↔ Reverse comparison
Rev 3 → Rev 4
/verif/glog/ext_cast.log
File deleted
/verif/glog/ext_divmul.log
File deleted
/verif/glog/ext_sort.log
File deleted
/verif/glog/int_xram.log
File deleted
/verif/glog/spi_test_1.log
File deleted
/verif/glog/int_cast.log
File deleted
/verif/glog/int_divmul.log
File deleted
/verif/glog/int_sort.log
File deleted
/verif/glog/ext_fib.log
File deleted
/verif/glog/complie.log
File deleted
/verif/glog/ext_gcd.log
File deleted
/verif/glog/ext_xram.log
File deleted
/verif/glog/int_fib.log
File deleted
/verif/glog/uart_test_1.log
File deleted
verif/glog/uart_test_1.log
Property changes :
Deleted: svn:executable
## -1 +0,0 ##
-*
\ No newline at end of property
Index: verif/glog/int_gcd.log
===================================================================
--- verif/glog/int_gcd.log (revision 3)
+++ verif/glog/int_gcd.log (nonexistent)
@@ -1,110 +0,0 @@
-Reading D:/Microsemi/Libero_v10.1/Model/tcl/vsim/pref.tcl
-
-# 10.1b
-
-# vsim +INTERNAL_ROM -do run.do -c tb_top
-# // ModelSim ACTEL 10.1b Apr 27 2012
-# //
-# // Copyright 1991-2012 Mentor Graphics Corporation
-# // All Rights Reserved.
-# //
-# // THIS WORK CONTAINS TRADE SECRET AND PROPRIETARY INFORMATION
-# // WHICH IS THE PROPERTY OF MENTOR GRAPHICS CORPORATION OR ITS
-# // LICENSORS AND IS SUBJECT TO LICENSE TERMS.
-# //
-# Loading sv_std.std
-# Loading work.tb_top
-# Loading work.digital_core
-# Loading work.clkgen
-# Loading work.clk_ctl
-# Loading work.wb_crossbar
-# Loading work.uart_core
-# Loading work.uart_cfg
-# Loading work.generic_register
-# Loading work.stat_register
-# Loading work.uart_txfsm
-# Loading work.uart_rxfsm
-# Loading work.async_fifo
-# Loading work.double_sync_low
-# Loading work.spi_core
-# Loading work.spi_if
-# Loading work.spi_ctl
-# Loading work.spi_cfg
-# Loading work.req_register
-# Loading work.oc8051_top
-# Loading work.oc8051_decoder
-# Loading work.oc8051_alu
-# Loading work.oc8051_multiply
-# Loading work.oc8051_divide
-# Loading work.oc8051_ram_top
-# Loading work.oc8051_ram_256x8_two_bist
-# Loading work.oc8051_alu_src_sel
-# Loading work.oc8051_comp
-# Loading work.oc8051_cy_select
-# Loading work.oc8051_indi_addr
-# Loading work.oc8051_memory_interface
-# Loading work.oc8051_sfr
-# Loading work.oc8051_acc
-# Loading work.oc8051_b_register
-# Loading work.oc8051_sp
-# Loading work.oc8051_dptr
-# Loading work.oc8051_psw
-# Loading work.oc8051_ports
-# Loading work.oc8051_int
-# Loading work.oc8051_tc
-# Loading work.oc8051_tc2
-# Loading work.oc8051_xrom
-# Loading work.oc8051_xram
-# Loading work.uart_agent
-# Loading work.m25p20
-# Loading work.memory_access
-# Loading work.acdc_check
-# Loading work.internal_logic
-# Loading work.AT45DB321
-# Loading work.tb_glbl
-# Loading work.bit_register
-# ** Warning: (vsim-PLI-3003) ../tb/tb_top.v(324): [TOFD] - System task or function '$shm_open' is not defined.
-#
-# Region: /tb_top
-# ** Warning: (vsim-PLI-3003) ../tb/tb_top.v(325): [TOFD] - System task or function '$shm_probe' is not defined.
-#
-# Region: /tb_top
-# ** Warning: (vsim-3017) ../tb/tb_top.v(221): [TFMPC] - Too few port connections. Expected 40, found 38.
-#
-# Region: /tb_top/u_core
-# ** Warning: (vsim-3722) ../tb/tb_top.v(221): [TFMPC] - Missing connection for port 'scan_mode'.
-#
-# ** Warning: (vsim-3722) ../tb/tb_top.v(221): [TFMPC] - Missing connection for port 'scan_enable'.
-#
-# ** Warning: (vsim-3017) ../../rtl/uart/uart_core.v(214): [TFMPC] - Too few port connections. Expected 14, found 12.
-#
-# Region: /tb_top/u_core/u_uart_core/u_rxfifo
-# ** Warning: (vsim-3722) ../../rtl/uart/uart_core.v(214): [TFMPC] - Missing connection for port 'afull'.
-#
-# ** Warning: (vsim-3722) ../../rtl/uart/uart_core.v(214): [TFMPC] - Missing connection for port 'aempty'.
-#
-# ** Warning: (vsim-3017) ../../rtl/uart/uart_core.v(230): [TFMPC] - Too few port connections. Expected 14, found 12.
-#
-# Region: /tb_top/u_core/u_uart_core/u_txfifo
-# ** Warning: (vsim-3722) ../../rtl/uart/uart_core.v(230): [TFMPC] - Missing connection for port 'afull'.
-#
-# ** Warning: (vsim-3722) ../../rtl/uart/uart_core.v(230): [TFMPC] - Missing connection for port 'aempty'.
-#
-# do run.do
-# i : 02
-# i : 00
-# i : 08
-# i : 12
-# i : 00
-# i : 64
-# i : 80
-# i : fe
-# i : 75
-# i : 81
-# NOTE : Load memory with Initial delivery content
-# NOTE : Initial Load End
-# --> Dumpping the design
-# NOTE: COMMUNICATION (RE)STARTED
-################################
-# time 33776 Passed
-################################
Index: verif/run/run_vlog
===================================================================
--- verif/run/run_vlog (revision 3)
+++ verif/run/run_vlog (revision 4)
@@ -4,13 +4,16 @@
#
-set COV = "1"
+set COV = "0"
+set failedm = 0;
set failedi = 0;
set failedx = 0;
+set all_testsm = 0;
set all_testsi = 0;
set all_testsx = 0;
-set internal_tests=(uart_test_1)
+set misc_tests=(uart_test_1 spi_test_1)
+set risc_int_tests=(fib divmul sort gcd cast xram)
echo " Compiling with cadence tools - irun "
@@ -47,40 +50,82 @@
set i = 0;
echo "###########################################"
-foreach internal_test ($internal_tests)
+foreach misc_test ($misc_tests)
@ i += 1;
#echo ""
- #echo "### Running test ${i}: ${internal_test}"
+ #echo "### Running test ${i}: ${misc_test}"
- $ELAB +DUMP +${internal_test} -l ../log/run.log
+ $ELAB +DUMP +${misc_test} -l ../log/run.log
if ($status != 0) then
cat ../log/run.log
exit
else if (`tail -100 ../log/run.log | grep PASSED` == "") then
- echo "### test ${i}: ${internal_test} --> FAILED"
- @ failedi += 1;
- @ all_testsi += 1;
+ echo "### test ${i}: ${misc_test} --> FAILED"
+ @ failedm += 1;
+ @ all_testsm += 1;
else
- echo "### test ${i}: ${internal_test} --> PASSED"
- @ all_testsi += 1;
+ echo "### test ${i}: ${misc_test} --> PASSED"
+ @ all_testsm += 1;
endif
- mv ../log/run.log ../log/${internal_test}.log
+ mv ../log/run.log ../log/${misc_test}.log
end
echo "###########################################"
+echo ""
+echo ""
+echo "###########################################"
+echo "### tesing 8051 programs from internal rom"
+echo "###########################################"
set i = 0;
+ echo "###########################################"
+foreach risc_int_test ($risc_int_tests)
+ @ i += 1;
+ #echo ""
+
+ \cp ../testcase/dat/${risc_int_test}.dat ./dat/oc8051_xrom.in
+ $ELAB +DUMP +INTERNAL_ROM -l ../log/run.log
+ if ($status != 0) then
+ cat ../log/run.log
+ exit
+ else if (`tail ../log/run.log | grep PASSED` == "") then
+ echo "### test ${i}: ${risc_int_test} --> FAILED"
+ @ failedi += 1;
+ @ all_testsi += 1;
+ else
+ echo "### test ${i}: ${risc_int_test} --> PASSED"
+ @ all_testsi += 1;
+ endif
+ mv ../log/run.log ../log/int_${risc_int_test}.log
+
+end
+ echo "###########################################"
+
+set i = 0;
echo ""
echo "###########################################"
echo "### Test Logs "
-foreach internal_test ($internal_tests)
+foreach misc_test ($misc_tests)
@ i += 1;
- echo " test ${i}: ../log/${internal_test}.log"
+ if (`tail ../log/${misc_test}.log | grep PASSED` == "") then
+ echo " test ${i}: ../log/${misc_test}.log --> FAILED"
+ else
+ echo " test ${i}: ../log/${misc_test}.log --> PASSED"
+ endif
end
+
+foreach risc_int_test ($risc_int_tests)
+ @ i += 1;
+ if (`tail ../log/int_${risc_int_test}.log | grep PASSED` == "") then
+ echo " test ${i}: ../log/int_${risc_int_test}.log --> FAILED"
+ else
+ echo " test ${i}: ../log/int_${risc_int_test}.log --> PASSED"
+ endif
+end
echo "###########################################"
echo ""
@@ -87,6 +132,7 @@
echo "###########################################"
echo "### Test Summary "
echo "### "
-echo "### Failed $failedi of $all_testsi internal tests"
+echo "### Failed $failedm of $all_testsm misc tests"
+echo "### Failed $failedi of $all_testsi internal rom tests"
echo "###########################################"
/verif/tb/tb_top.v
365,7 → 365,7
if((p2_out == 8'haa) && // fib.c |
(p3_out == 8'haa )) begin |
$display("################################"); |
$display("time ",$time, " Passed"); |
$display("TEST STATUS : PASSED "); |
$display("################################"); |
#100 |
$finish; |
372,6 → 372,7
end else if(p2_out == 8'h55) begin // fib.c |
$display(""); |
$display("time ",$time," Error: %h", p3_out); |
$display("TEST STATUS : FAILED "); |
$display(""); |
#100 |
$finish; |