OpenCores
URL https://opencores.org/ocsvn/oms8051mini/oms8051mini/trunk

Subversion Repositories oms8051mini

Compare Revisions

  • This comparison shows the changes necessary to convert path
    /oms8051mini
    from Rev 21 to Rev 22
    Reverse comparison

Rev 21 → Rev 22

/trunk/verif/run/filelist_rtl.f
18,6 → 18,7
../../rtl/uart/uart_txfsm.v \
../../rtl/uart/uart_core.v \
../../rtl/uart/uart_cfg.v \
../../rtl/uart/uart_core_nf.v \
../../rtl/clkgen/clkgen.v \
../../rtl/lib/clk_ctl.v \
../../rtl/lib/wb_crossbar.v \
/trunk/verif/run/run_modelsim
5,18 → 5,14
 
set failedm = 0;
set failedi = 0;
set failedx = 0;
set all_testsm = 0;
set all_testsi = 0;
set all_testsx = 0;
 
set misc_tests=(uart_test_1 spi_test_1)
#set misc_tests=( )
 
set risc_ext_tests=(fib divmul sort gcd cast xram)
set risc_int_tests=(fib divmul sort gcd cast xram all_instr)
 
set risc_int_tests=(fib divmul sort gcd cast xram)
 
echo " Compiling with MODELSIM "
 
./compile.modelsim | tee ../log/complie.log
81,37 → 77,7
 
echo ""
echo ""
echo "###########################################"
echo "### tesing 8051 programs from external rom"
echo "###########################################"
 
set i = 0;
echo "###########################################"
foreach risc_ext_test ($risc_ext_tests)
@ i += 1;
#echo ""
 
\cp ../testcase/dat/${risc_ext_test}.dat ./dat/oc8051_xrom.in
vsim -do run.do -c tb_top +EXTERNAL_ROM | tee ../log/run.log
if ($status != 0) then
cat ../log/run.log
exit
else if (`tail ../log/run.log | grep PASSED` == "") then
echo "### test ${i}: ${risc_ext_test} --> FAILED"
@ failedx += 1;
@ all_testsx += 1;
else
echo "### test ${i}: ${risc_ext_test} --> PASSED"
@ all_testsx += 1;
endif
mv ../log/run.log ../log/ext_${risc_ext_test}.log
 
end
echo "###########################################"
 
 
echo ""
echo ""
echo "###########################################"
echo "### tesing 8051 programs from internal rom"
echo "###########################################"
145,7 → 111,6
echo "### Test Summary "
echo "### "
echo "### Failed $failedm of $all_testsm misc tests"
echo "### Failed $failedx of $all_testsx external rom tests"
echo "### Failed $failedi of $all_testsi internal rom tests"
echo "###########################################"
 
/trunk/verif/sw/hex/all_instr.hex
0,0 → 1,29
:03000000020006F5
:03005F0002000399
:0300030002006296
:100062002403740A79143940000037351EB41E0087
:10007200009401741E7A0A9A952C741E040522A318
:10008200791409741E1415227B141B740575F0046F
:10009200A4740A75F00284741E75F00255F0541EA1
:1000A200790357541459531E21521E741E75F002BF
:1000B20045F0441E790347441449431E21421E74ED
:1000C2001E75F00265F0641E790367641469631E8D
:1000D20021621E7441332303137441C49023289375
:1000E200742F75F01925F0D401EC0011EF00120005
:1000F200F3007401790139500000202D0100001035
:100102002D0100007400600000740170000073741F
:1001120037B4010000B96300007903D900009000F0
:100122001E9383E3E0F3F0C003D003741E7932C957
:10013200C521C7D7741E341EC3C201D3D23FB3B286
:100142003F8201B0167202A016A2019201D2937BE5
:07015200FFDBFEC293322225
:06003500E478FFF6D8FD9F
:100013007900E94400601B7A0090015D780175A0C6
:1000230000E493F2A308B8000205A0D9F4DAF2754C
:02003300A0FF2C
:10003B007800E84400600A790175A000E4F309D860
:10004B00FC7800E84400600C7900900001E4F0A318
:04005B00D8FCD9FAFA
:0D000600758107120159E5826003020003B5
:040159007582002289
:00000001FF
/trunk/verif/testcase/dat/all_instr.dat
0,0 → 1,357
///
/// created by oc8051 rom maker
/// author: Simon Teran (simont@opencores.org)
///
/// source file: F:\all_instr.hex
/// date: 03-01-2017
/// time: 22:04:58
///
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