OpenCores
URL https://opencores.org/ocsvn/openarty/openarty/trunk

Subversion Repositories openarty

Compare Revisions

  • This comparison shows the changes necessary to convert path
    /openarty/trunk/sw
    from Rev 32 to Rev 33
    Reverse comparison

Rev 32 → Rev 33

/board/Makefile
40,3 → 40,5
exstartup.txt: exstartup
zip-objdump -S -D exstartup > exstartup.txt
 
clean:
rm -f exstartup exstartup.map exstartup.txt
/board/artyboard.h
99,7 → 99,7
#define ENET_RXBUSY 0x008000
#define ENET_RXERR 0x010000
#define ENET_RXMISS 0x020000
#define ENET_RXCRC 0x040000
#define ENET_RXCRC 0x040000 // Set on a CRC error
#define ENET_RXLEN rxcmd & 0x0ffff
#define ENET_RXCLR 0x004000
#define ENET_RXCLRERR 0x078000
/host/manping.cpp
387,7 → 387,11
m_fpga->writei(R_NET_TXBUF, ln, packet);
 
// And give it the transmit command.
m_fpga->writeio(R_NET_TXCMD, TXGO|(ln<<2)|((config_hw_crc)?0:NOHWCRC));
{ unsigned cmd;
cmd = TXGO|(ln<<2)|((config_hw_crc)?0:NOHWCRC);
m_fpga->writeio(R_NET_TXCMD, cmd);
printf("Sent TX command: 0x%x\n", cmd);
}
 
} else {
int ln;
424,10 → 428,10
for(int i=0; i<rxlen; i++)
printf("\tRX[%2d]: 0x%08x\n", i, buf[i]);
delete[] buf;
m_fpga->writeio(R_NET_RXCMD, 0xffffff);
// m_fpga->writeio(R_NET_RXCMD, 0xffffff);
break;
}
} while(((rxstat & 0x04000)==0)&&(errcount++ < 50));
} while(((rxstat & 0x04000)==0)&&(errcount++ < 500));
 
rxstat = m_fpga->readio(R_NET_RXCMD);
printf("Final Rx Status = %08x\n", rxstat);
/host/regdefs.h
38,6 → 38,7
#ifndef REGDEFS_H
#define REGDEFS_H
 
#define CLOCKFREQ_HZ 81250000
#define R_VERSION 0x00000100
#define R_ICONTROL 0x00000101
#define R_BUSERR 0x00000102

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