URL
https://opencores.org/ocsvn/openfpu64/openfpu64/trunk
Subversion Repositories openfpu64
Compare Revisions
- This comparison shows the changes necessary to convert path
/openfpu64
- from Rev 13 to Rev 14
- ↔ Reverse comparison
Rev 13 → Rev 14
/trunk/fpu_package.vhd
46,5 → 46,6
constant mode_div : std_logic_vector (2 downto 0) := "011"; -- Division Mode |
constant mode_test : std_logic_vector (2 downto 0) := "111"; -- Testing Mode |
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constant DEBUG_MODE : std_logic :='0'; |
end fpu_package; |
|
/trunk/openfpu64_tb.head.vhd
103,7 → 103,7
wait for clk_period / 2; |
count := count+1; |
end procedure; |
|
|
procedure testcase |
( |
number : in integer; -- Testcase number, will be reported |
194,14 → 194,38
-- Bus transfers complete |
|
-- compare actual result with expected result |
assert data_out = expected report "doh "&integer'image(number)&" result was"& |
" S:"&std_logic'image(data_out(63)) & |
" E:"&to_string(data_out(62 downto 52)) & |
" M:"&to_string(data_out(51 downto 0)) & |
" expected" & |
" S:"&std_logic'image(expected(63)) & |
" E:"&to_string(expected(62 downto 52)) & |
" M:"&to_string(expected(51 downto 0)) severity error; |
if data_out /= expected |
then |
-- check if the _both_ expected and actual result is NaN, |
-- if this is the case don't check the sign - NaNs don't have a sign |
-- without this check false positives will be generated for NaNs with different signs. |
if data_out(62 downto 52) = expected(62 downto 52) |
and data_out(51 downto 0) = expected(51 downto 0) |
and data_out(62 downto 52) = std_logic_vector(ONES(62 downto 52)) |
and data_out(51 downto 0) /= std_logic_vector(ZEROS(51 downto 0)) |
then |
if DEBUG_MODE = '1' then -- if we are in DEBUG_MODE,print out the result anyway |
assert false report "NaN:"&integer'image(number)&" result was"& |
" S:"&std_logic'image(data_out(63)) & |
" E:"&to_string(data_out(62 downto 52)) & |
" M:"&to_string(data_out(51 downto 0)) & |
" expected" & |
" S:"&std_logic'image(expected(63)) & |
" E:"&to_string(expected(62 downto 52)) & |
" M:"&to_string(expected(51 downto 0)) severity error; |
end if; |
else |
-- if we reach here, we have a real error - printout the actual and the expected result |
assert false report "doh "&integer'image(number)&" result was"& |
" S:"&std_logic'image(data_out(63)) & |
" E:"&to_string(data_out(62 downto 52)) & |
" M:"&to_string(data_out(51 downto 0)) & |
" expected" & |
" S:"&std_logic'image(expected(63)) & |
" E:"&to_string(expected(62 downto 52)) & |
" M:"&to_string(expected(51 downto 0)) severity error; |
end if; |
end if; |
-- print out statistics |
assert false report "Testcases "&integer'image(number)&" needed " &integer'image(i) &" cycles" severity note; |
end procedure; |