OpenCores
URL https://opencores.org/ocsvn/opengfx430/opengfx430/trunk

Subversion Repositories opengfx430

Compare Revisions

  • This comparison shows the changes necessary to convert path
    /opengfx430
    from Rev 7 to Rev 8
    Reverse comparison

Rev 7 → Rev 8

/trunk/core/rtl/verilog/ogfx_reg.v
198,6 → 198,7
DISPLAY_SIZE_LO = 'h14,
DISPLAY_SIZE_HI = 'h16,
DISPLAY_CFG = 'h18,
DISPLAY_REFR_CNT = 'h1A,
 
LT24_CFG = 'h20, // LT24 configuration and Generic command sending
LT24_REFRESH = 'h22,
251,6 → 252,7
DISPLAY_SIZE_LO_D = (BASE_REG << DISPLAY_SIZE_LO ),
DISPLAY_SIZE_HI_D = (BASE_REG << DISPLAY_SIZE_HI ),
DISPLAY_CFG_D = (BASE_REG << DISPLAY_CFG ),
DISPLAY_REFR_CNT_D = (BASE_REG << DISPLAY_REFR_CNT ),
 
LT24_CFG_D = (BASE_REG << LT24_CFG ),
LT24_REFRESH_D = (BASE_REG << LT24_REFRESH ),
310,6 → 312,7
(DISPLAY_SIZE_LO_D & {DEC_SZ{(reg_addr == DISPLAY_SIZE_LO )}}) |
(DISPLAY_SIZE_HI_D & {DEC_SZ{(reg_addr == DISPLAY_SIZE_HI )}}) |
(DISPLAY_CFG_D & {DEC_SZ{(reg_addr == DISPLAY_CFG )}}) |
(DISPLAY_REFR_CNT_D & {DEC_SZ{(reg_addr == DISPLAY_REFR_CNT )}}) |
 
(LT24_CFG_D & {DEC_SZ{(reg_addr == LT24_CFG )}}) |
(LT24_REFRESH_D & {DEC_SZ{(reg_addr == LT24_REFRESH )}}) |
576,6 → 579,19
display_cl_swap_o};
 
//------------------------------------------------
// DISPLAY_REFR_CNT Register
//------------------------------------------------
reg [15:0] display_refr_cnt;
 
wire display_refr_cnt_wr = reg_wr[DISPLAY_REFR_CNT];
wire display_refr_cnt_dec = gfx_irq_refr_done_set & (display_refr_cnt != 16'h0000);
 
always @ (posedge mclk or posedge puc_rst)
if (puc_rst) display_refr_cnt <= 16'h0000;
else if (display_refr_cnt_wr) display_refr_cnt <= per_din_i;
else if (display_refr_cnt_dec) display_refr_cnt <= display_refr_cnt + 16'hFFFF; // -1
 
//------------------------------------------------
// LT24_CFG Register
//------------------------------------------------
reg [15:0] lt24_cfg;
1225,6 → 1241,7
wire [15:0] display_size_hi_read = display_size_hi_rd & {16{reg_rd[DISPLAY_SIZE_HI ]}};
`endif
wire [15:0] display_cfg_read = display_cfg & {16{reg_rd[DISPLAY_CFG ]}};
wire [15:0] display_refr_cnt_read = display_refr_cnt & {16{reg_rd[DISPLAY_REFR_CNT ]}};
 
wire [15:0] lt24_cfg_read = lt24_cfg & {16{reg_rd[LT24_CFG ]}};
wire [15:0] lt24_refresh_read = lt24_refresh & {16{reg_rd[LT24_REFRESH ]}};
1291,6 → 1308,7
display_size_hi_read |
`endif
display_cfg_read |
display_refr_cnt_read |
 
lt24_cfg_read |
lt24_refresh_read |

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.