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URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

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  • This comparison shows the changes necessary to convert path
    /openrisc/trunk/or1ksim/doc
    from Rev 472 to Rev 483
    Reverse comparison

Rev 472 → Rev 483

/or1ksim.info
64,7 → 64,7
Unpack the software and create a _separate_ directory in which to build
it:
 
tar jxf or1ksim-2011-01-05.tar.bz2
tar jxf or1ksim-2011-01-27.tar.bz2
mkdir builddir_or1ksim
cd builddir_or1ksim
 
81,7 → 81,7
OpenRISC 1000 32-bit architecture. If this argument is omitted, it will
default to OpenRISC 1000 32-bit with a warning
 
../or1ksim-2011-01-05/configure --target=or32-elf ...
../or1ksim-2011-01-27/configure --target=or32-elf ...
 
There are several other options available, many of which are standard
to GNU `configure' scripts. Use `configure --help' to see all the
1058,7 → 1058,25
`l.nop 9'
Instruction tracing is turned off.
 
`l.nop 10'
A 32-bit random number is returned in `r11'.
 
The random numbers are generated using `random', which in turn is
seeded through `srandom' using the host `/dev/urandom' if
available, or else the process ID of the Or1ksim instance.
 
This opcode is particularly useful for situations where a target
program running on Or1ksim needs to obtain genuine system entropy
to generate random numbers.
 
`l.nop 11'
Return a non-zero value in `r11'.
 
This opcode can be used to detect if a target is running under
Or1ksim. Set `r11' to zero, issue this opcode, and look to see if
`r11' is non-zero.
 
 

File: or1ksim.info, Node: Configuration, Next: Interactive Command Line, Prev: Usage, Up: Top
 
4375,6 → 4393,8
(line 6)
* l.nop 0: l.nop Support. (line 12)
* l.nop 1 (end simulation): l.nop Support. (line 15)
* l.nop 10 (return a random number): l.nop Support. (line 51)
* l.nop 11 (return a non-zero value): l.nop Support. (line 62)
* l.nop 2 (report): l.nop Support. (line 19)
* l.nop 3 (printf, now obsolete): l.nop Support. (line 22)
* l.nop 4 (putc): l.nop Support. (line 29)
4845,45 → 4865,45
Node: Networking from OpenRISC Linux and BusyBox34613
Node: Tearing Down a Bridge36275
Node: l.nop Support37018
Node: Configuration38528
Node: Configuration File Format39140
Node: Configuration File Preprocessing39525
Node: Configuration File Syntax39822
Node: Simulator Configuration42607
Node: Simulator Behavior42898
Node: Verification API Configuration47479
Node: CUC Configuration49419
Node: Core OpenRISC Configuration51411
Node: CPU Configuration51913
Node: Memory Configuration56032
Node: Memory Management Configuration62754
Node: Cache Configuration65131
Node: Interrupt Configuration67517
Node: Power Management Configuration69350
Node: Branch Prediction Configuration70627
Node: Debug Interface Configuration71987
Node: Peripheral Configuration74330
Node: Memory Controller Configuration74956
Node: UART Configuration78736
Node: DMA Configuration82255
Node: Ethernet Configuration84122
Node: GPIO Configuration89401
Node: Display Interface Configuration91034
Node: Frame Buffer Configuration93343
Node: Keyboard Configuration95207
Node: Disc Interface Configuration97445
Node: Generic Peripheral Configuration102549
Node: Interactive Command Line104844
Node: Verification API111818
Node: Code Internals116248
Node: Coding Conventions116831
Node: Global Data Structures121258
Node: Concepts123915
Ref: Output Redirection124060
Ref: Interrupts Internal124598
Node: Internal Debugging125751
Node: Regression Testing126275
Node: GNU Free Documentation License130064
Node: Index152471
Node: Configuration39180
Node: Configuration File Format39792
Node: Configuration File Preprocessing40177
Node: Configuration File Syntax40474
Node: Simulator Configuration43259
Node: Simulator Behavior43550
Node: Verification API Configuration48131
Node: CUC Configuration50071
Node: Core OpenRISC Configuration52063
Node: CPU Configuration52565
Node: Memory Configuration56684
Node: Memory Management Configuration63406
Node: Cache Configuration65783
Node: Interrupt Configuration68169
Node: Power Management Configuration70002
Node: Branch Prediction Configuration71279
Node: Debug Interface Configuration72639
Node: Peripheral Configuration74982
Node: Memory Controller Configuration75608
Node: UART Configuration79388
Node: DMA Configuration82907
Node: Ethernet Configuration84774
Node: GPIO Configuration90053
Node: Display Interface Configuration91686
Node: Frame Buffer Configuration93995
Node: Keyboard Configuration95859
Node: Disc Interface Configuration98097
Node: Generic Peripheral Configuration103201
Node: Interactive Command Line105496
Node: Verification API112470
Node: Code Internals116900
Node: Coding Conventions117483
Node: Global Data Structures121910
Node: Concepts124567
Ref: Output Redirection124712
Ref: Interrupts Internal125250
Node: Internal Debugging126403
Node: Regression Testing126927
Node: GNU Free Documentation License130716
Node: Index153123

End Tag Table
/or1ksim.texi
1304,6 → 1304,28
 
Instruction tracing is turned off.
 
@item l.nop 10
@cindex @code{l.nop 10} (return a random number)
 
A 32-bit random number is returned in @code{r11}.
 
The random numbers are generated using @code{random}, which in turn is
seeded through @code{srandom} using the host @file{/dev/urandom} if
available, or else the process ID of the @value{OR1KSIM} instance.
 
This opcode is particularly useful for situations where a target
program running on Or1ksim needs to obtain genuine system entropy to
generate random numbers.
 
@item l.nop 11
@cindex @code{l.nop 11} (return a non-zero value)
 
Return a non-zero value in @code{r11}.
 
This opcode can be used to detect if a target is running under
Or1ksim. Set @code{r11} to zero, issue this opcode, and look to see
if @code{r11} is non-zero.
 
@end table
 
@node Configuration

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