URL
https://opencores.org/ocsvn/openrisc/openrisc/trunk
Subversion Repositories openrisc
Compare Revisions
- This comparison shows the changes necessary to convert path
/openrisc/trunk/or1ksim/peripheral
- from Rev 451 to Rev 457
- ↔ Reverse comparison
Rev 451 → Rev 457
/Makefile.in
1,4 → 1,4
# Makefile.in generated by automake 1.11.1 from Makefile.am. |
# Makefile.in generated by automake 1.11 from Makefile.am. |
# @configure_input@ |
|
# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, |
400,7 → 400,7
# (which will cause the Makefiles to be regenerated when you run `make'); |
# (2) otherwise, pass the desired values on the `make' command line. |
$(RECURSIVE_TARGETS): |
@fail= failcom='exit 1'; \ |
@failcom='exit 1'; \ |
for f in x $$MAKEFLAGS; do \ |
case $$f in \ |
*=* | --[!k]*);; \ |
425,7 → 425,7
fi; test -z "$$fail" |
|
$(RECURSIVE_CLEAN_TARGETS): |
@fail= failcom='exit 1'; \ |
@failcom='exit 1'; \ |
for f in x $$MAKEFLAGS; do \ |
case $$f in \ |
*=* | --[!k]*);; \ |
/channels/Makefile.in
1,4 → 1,4
# Makefile.in generated by automake 1.11.1 from Makefile.am. |
# Makefile.in generated by automake 1.11 from Makefile.am. |
# @configure_input@ |
|
# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, |
/eth.c
71,7 → 71,7
#endif |
|
/*! Period (clock cycles) for rescheduling Rx and Tx controllers. */ |
#define RTX_RESCHED_PERIOD 1 |
#define RTX_RESCHED_PERIOD 10000 |
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/*! MAC address that is always accepted. */ |
static const unsigned char mac_broadcast[ETHER_ADDR_LEN] = |
445,7 → 445,7
fprintf (stderr, "ERROR: Failed to read length from file.\n"); |
return -1; |
} |
|
|
/* Packet must be big enough to hold a header */ |
if (packet_length < ETHER_HDR_LEN) |
{ |
1371,23 → 1371,43
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#if ETH_DEBUG |
/* Only trace registers of particular interest */ |
|
switch (addr) |
{ |
case ETH_MODER: |
case ETH_INT_SOURCE: |
case ETH_INT_MASK: |
case ETH_IPGT: |
case ETH_IPGR1: |
case ETH_IPGR2: |
case ETH_PACKETLEN: |
case ETH_COLLCONF: |
case ETH_TX_BD_NUM: |
case ETH_CTRLMODER: |
case ETH_MAC_ADDR0: |
case ETH_MAC_ADDR1: |
printf ("eth_write32: %s = 0x%08lx\n", eth_regname (addr), |
(unsigned long int) value); |
} |
{ |
case ETH_MODER: |
case ETH_INT_SOURCE: |
case ETH_INT_MASK: |
case ETH_IPGT: |
case ETH_IPGR1: |
case ETH_IPGR2: |
case ETH_PACKETLEN: |
case ETH_COLLCONF: |
case ETH_TX_BD_NUM: |
case ETH_CTRLMODER: |
case ETH_MAC_ADDR0: |
case ETH_MAC_ADDR1: |
printf ("eth_write32: 0x%08lx to %s ", (unsigned long) value, |
eth_regname (addr)); |
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} |
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/* Detail register transitions on MODER, INT_SOURCE AND INT_MASK */ |
|
switch (addr) |
{ |
case ETH_MODER: |
printf("0x%08lx -> ", (unsigned long) eth->regs.moder); |
break; |
case ETH_INT_SOURCE: |
printf("0x%08lx -> ", (unsigned long) eth->regs.int_source); |
break; |
case ETH_INT_MASK: |
printf("0x%08lx -> ", (unsigned long) eth->regs.int_mask); |
break; |
} |
|
|
|
#endif |
|
switch (addr) |
1526,6 → 1546,36
} |
break; |
} |
|
#if ETH_DEBUG |
|
switch (addr) |
{ |
case ETH_MODER: |
printf("0x%08lx", (unsigned long) eth->regs.moder); |
break; |
case ETH_INT_SOURCE: |
printf("0x%08lx", (unsigned long) eth->regs.int_source); |
break; |
case ETH_INT_MASK: |
printf("0x%08lx", (unsigned long) eth->regs.int_mask); |
break; |
case ETH_IPGT: |
case ETH_IPGR1: |
case ETH_IPGR2: |
case ETH_PACKETLEN: |
case ETH_COLLCONF: |
case ETH_TX_BD_NUM: |
case ETH_CTRLMODER: |
case ETH_MAC_ADDR0: |
case ETH_MAC_ADDR1: |
break; |
} |
|
printf("\n"); |
#endif |
|
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} /* eth_write32 () */ |
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