URL
https://opencores.org/ocsvn/openrisc/openrisc/trunk
Subversion Repositories openrisc
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- This comparison shows the changes necessary to convert path
/openrisc/trunk/or1ksim
- from Rev 461 to Rev 472
- ↔ Reverse comparison
Rev 461 → Rev 472
/sim-config.h
200,6 → 200,8
long long reset_cycles; |
|
int hush; /* Is simulator to do reg dumps */ |
int trace_phy; /* Show physical instr addr when tracing */ |
int trace_virt; /* Show virtual instr addr when tracing */ |
} sim; |
|
struct |
/cpu/or32/execute.c
806,11 → 806,12
|
if ((physical_pc = peek_into_itlb (cpu_state.iqueue.insn_addr))) |
{ |
disassemble_instr (physical_pc); |
disassemble_instr (physical_pc, cpu_state.iqueue.insn_addr, |
cpu_state.iqueue.insn); |
} |
else |
{ |
PRINTF ("INTERNAL SIMULATOR ERROR: no trace available\n"); |
PRINTF ("Instruction address translation failed: no trace available\n"); |
} |
} /* trace_instr () */ |
|
/cpu/common/abstract.c
1226,8 → 1226,9
This is a simpler form of disassemble_memory for GDB instruction tracing. |
|
Output format is symbolic disassembly, one instruction per line. Start each |
line with its hex address. At the end print the value of any destination |
register, the flag and the number of cycles executed. |
line with a flag to indicate supervisor or user mode then its hex address |
(physical and/or virtual in that order). At the end print the value of any |
destination register, the flag and the number of cycles executed. |
|
There are all sorts of ways to trip this up, but they are unlikely. The |
validity of a memory area is taken from the address of the start of a line |
1234,86 → 1235,95
to be printed, so assumes the following 3 bytes are present. This could be |
fooled by ridiculous memory declarations. |
|
@param[in] addr Address of the instruction to trace */ |
@param[in] phyaddr Physical address of the instruction to trace |
@param[in] virtaddr Virtual address of the instruction to trace |
@param[in] insn The instruction just fetched and possibly executed. */ |
/*---------------------------------------------------------------------------*/ |
void |
disassemble_instr (oraddr_t addr) |
disassemble_instr (oraddr_t phyaddr, |
oraddr_t virtaddr, |
uint32_t insn) |
{ |
PRINTF ("%" PRIxADDR ": ", addr); |
/* Log whether we are supervisor mode */ |
printf ("%c ", |
(SPR_SR_SM == (cpu_state.sprs[SPR_SR] & SPR_SR_SM)) ? 'S' : 'U'); |
|
/* The address */ |
if (runtime.sim.trace_phy) |
{ |
PRINTF ("%" PRIxADDR ": ", phyaddr); |
} |
|
if (verify_memoryarea (addr)) |
if (runtime.sim.trace_virt) |
{ |
uint32_t insn = eval_direct32 (addr, 0, 0); |
int index = or1ksim_insn_decode (insn); |
PRINTF ("%" PRIxADDR ": ", virtaddr); |
} |
|
PRINTF ("%08" PRIx32 " ", insn); |
/* The instruction details */ |
int index = or1ksim_insn_decode (insn); |
|
if (index >= 0) |
PRINTF ("%08" PRIx32 " ", insn); |
|
if (index >= 0) |
{ |
or1ksim_disassemble_trace_index (insn, index); |
PRINTF ("%-24s", or1ksim_disassembled); |
|
/* Put either the register assignment, SPR value, or store */ |
if (-1 != trace_dest_spr) |
{ |
or1ksim_disassemble_trace_index (insn, index); |
PRINTF ("%-24s", or1ksim_disassembled); |
PRINTF ("SPR[%04x] = %08x", (trace_dest_spr | |
evalsim_reg (trace_dest_reg)), |
cpu_state.sprs[(trace_dest_spr | |
evalsim_reg (trace_dest_reg))]); |
|
/* Put either the register assignment, SPR value, or store */ |
if (-1 != trace_dest_spr) |
{ |
PRINTF ("SPR[%04x] = %08x", (trace_dest_spr | |
evalsim_reg (trace_dest_reg)), |
cpu_state.sprs[(trace_dest_spr | |
evalsim_reg (trace_dest_reg))]); |
|
} |
else if (-1 != trace_dest_reg) |
} |
else if (-1 != trace_dest_reg) |
{ |
PRINTF ("r%-2u = %" PRIxREG "", trace_dest_reg, |
evalsim_reg (trace_dest_reg)); |
} |
else |
{ |
uorreg_t store_val = 0; |
oraddr_t store_addr = 0; |
|
if (0 != trace_store_width) |
{ |
PRINTF ("r%-2u = %" PRIxREG "", trace_dest_reg, |
evalsim_reg (trace_dest_reg)); |
store_val = evalsim_reg (trace_store_val_reg); |
store_addr = evalsim_reg (trace_store_addr_reg) + |
trace_store_imm; |
} |
else |
|
switch (trace_store_width) |
{ |
uorreg_t store_val = 0; |
oraddr_t store_addr = 0; |
case 1: |
PRINTF ("[%" PRIxADDR "] = %02x ", store_addr, |
store_val); |
break; |
|
if (0 != trace_store_width) |
{ |
store_val = evalsim_reg (trace_store_val_reg); |
store_addr = evalsim_reg (trace_store_addr_reg) + |
trace_store_imm; |
} |
|
switch (trace_store_width) |
{ |
case 1: |
PRINTF ("[%" PRIxADDR "] = %02x ", store_addr, |
store_val); |
break; |
|
case 2: |
PRINTF ("[%" PRIxADDR "] = %04x ", store_addr, store_val); |
break; |
case 2: |
PRINTF ("[%" PRIxADDR "] = %04x ", store_addr, store_val); |
break; |
|
case 4: |
PRINTF ("[%" PRIxADDR "] = %08x", store_addr, store_val); |
break; |
case 4: |
PRINTF ("[%" PRIxADDR "] = %08x", store_addr, store_val); |
break; |
|
default: |
PRINTF (" "); |
break; |
} |
default: |
PRINTF (" "); |
break; |
} |
} |
|
|
/* Print the flag */ |
PRINTF (" flag: %u\n", cpu_state.sprs[SPR_SR] & SPR_SR_F ? 1 : 0); |
/* Print the flag */ |
PRINTF (" flag: %u\n", cpu_state.sprs[SPR_SR] & SPR_SR_F ? 1 : 0); |
|
} |
else |
{ |
PRINTF ("<invalid>\n"); |
} |
} |
else |
{ |
/* Not a valid memory area. Print Xs as required */ |
PRINTF ("XXXXXXXX\n"); |
PRINTF ("<invalid>\n"); |
} |
} /* disassemble_instr() */ |
|
/cpu/common/abstract.h
148,7 → 148,9
extern void disassemble_memory (oraddr_t from, |
oraddr_t to, |
int nl); |
extern void disassemble_instr (oraddr_t addr); |
extern void disassemble_instr (oraddr_t phyaddr, |
oraddr_t virtaddr, |
uint32_t insn); |
extern uint32_t evalsim_mem32 (oraddr_t, oraddr_t); |
extern uint16_t evalsim_mem16 (oraddr_t, oraddr_t); |
extern uint8_t evalsim_mem8 (oraddr_t, oraddr_t); |
/doc/or1ksim.info
332,6 → 332,19
Dump instruction just executed and any register/memory location |
chaged after each instruction (one line per instruction). |
|
`--trace-physical' |
`--trace-virtual' |
When tracing instructions, show the physical address |
(`--trace-physical') and/or the virtual address |
(`--trace-virtual') of the instruction being executed. Both flags |
may be specified, in which case both physical and virtual |
addresses are shown, physical first. |
|
Note: Either or both flags may be specified without |
`--trace', to indicate how addresses should be shown if |
subsequently enabled by a `SIGUSER1' signal or `l.nop 8' |
opcode (*note Trace Generation: Trace Generation.). |
|
`-f FILE' |
`--file=FILE' |
Read configuration commands from the specified file, looking first |
519,15 → 532,19
|
An execution trace can be generated at run time with options passed by |
the command line, or via the operating system's signal passing |
mechanism. |
mechanism, or by `l.nop' opcodes in an application program. |
|
The following, passed at run time, can be used to create an execution |
dump. |
The following flag can be used to create an execution dump. |
|
`-t' |
`--trace' |
Dump instruction just executed and any register/memory location |
chaged after each instruction (one line per instruction). |
changed after each instruction (one line per instruction). Each |
line starts with either "S" or "U" to indicate whether the |
processor was in supervisor or user mode _when the instruction |
completed_. It is worth bearing in mind that tracing happens at |
completion of instruction execution and shows the state at that |
time. |
|
Passing a signal `SIGUSR1' while the simulator is running toggles trace |
generation. This can be done with the following command, assuming |
547,6 → 564,19
ps a | grep or32-elf-sim |
kill -SIGUSR1 _process-number_ |
|
Tracing can also be enabled and disabled from within a target program |
using the `l.nop 8' and `l.nop 9' opcodes to enable and disable tracing |
respectively. |
|
By default tracing will show the virtual address of each instruction |
traced. This may be controlled by two options, `--trace-physical' to |
show the physical address and/or `--trace-virtual' to show the virtual |
address. If neither is specified, the virtual address is shown. |
|
Note: Either or both flags may be specified without `--trace', to |
indicate how addresses should be shown if subsequently enabled by a |
`SIGUSER1' signal or `l.nop 8' opcode. |
|
|
File: or1ksim.info, Node: Simulator Library, Next: Ethernet TUN/TAP Interface, Prev: Trace Generation, Up: Usage |
|
3845,7 → 3875,7
|
* --cumulative: Profiling Utility. (line 26) |
* --debug-config: Standalone Simulator. |
(line 86) |
(line 99) |
* --disable-all-tests: Configuring the Build. |
(line 105) |
* --disable-arith-flag: Configuring the Build. |
3873,11 → 3903,11
* --enable-execution: Configuring the Build. |
(line 37) |
* --enable-mprofile: Standalone Simulator. |
(line 120) |
(line 133) |
* --enable-ov-flag: Configuring the Build. |
(line 132) |
* --enable-profile: Standalone Simulator. |
(line 117) |
(line 130) |
* --enable-profiling: Configuring the Build. |
(line 29) |
* --enable-range-stats: Configuring the Build. |
3885,7 → 3915,7
* --enable-unsigned-xori: Configuring the Build. |
(line 68) |
* --file: Standalone Simulator. |
(line 44) |
(line 57) |
* --filename: Memory Profiling Utility. |
(line 51) |
* --generate: Profiling Utility. (line 34) |
3899,23 → 3929,29
* --interactive: Standalone Simulator. |
(line 25) |
* --memory: Standalone Simulator. |
(line 70) |
(line 83) |
* --mode: Memory Profiling Utility. |
(line 26) |
* --nosrv: Standalone Simulator. |
(line 52) |
(line 65) |
* --quiet <1>: Profiling Utility. (line 30) |
* --quiet: Standalone Simulator. |
(line 29) |
* --report-memory-errors: Standalone Simulator. |
(line 91) |
(line 104) |
* --srv: Standalone Simulator. |
(line 60) |
(line 73) |
* --strict-npc: Standalone Simulator. |
(line 100) |
* --trace <1>: Trace Generation. (line 15) |
(line 113) |
* --trace <1>: Trace Generation. (line 14) |
* --trace: Standalone Simulator. |
(line 39) |
* --trace-physical <1>: Trace Generation. (line 44) |
* --trace-physical: Standalone Simulator. |
(line 44) |
* --trace-virtual <1>: Trace Generation. (line 44) |
* --trace-virtual: Standalone Simulator. |
(line 44) |
* --verbose: Standalone Simulator. |
(line 33) |
* --version: Standalone Simulator. |
3925,11 → 3961,11
* --version (profiling utility): Profiling Utility. (line 17) |
* -c: Profiling Utility. (line 26) |
* -d: Standalone Simulator. |
(line 86) |
(line 99) |
* -f <1>: Memory Profiling Utility. |
(line 51) |
* -f: Standalone Simulator. |
(line 44) |
(line 57) |
* -g <1>: Memory Profiling Utility. |
(line 47) |
* -g: Profiling Utility. (line 34) |
3943,11 → 3979,11
* -m <1>: Memory Profiling Utility. |
(line 26) |
* -m: Standalone Simulator. |
(line 70) |
(line 83) |
* -q <1>: Profiling Utility. (line 30) |
* -q: Standalone Simulator. |
(line 29) |
* -t <1>: Trace Generation. (line 15) |
* -t <1>: Trace Generation. (line 14) |
* -t: Standalone Simulator. |
(line 39) |
* -V: Standalone Simulator. |
4345,7 → 4381,9
* l.nop 5 (reset statistics counters): l.nop Support. (line 34) |
* l.nop 6 (get clock ticks): l.nop Support. (line 37) |
* l.nop 7 (get picoseconds per cycle): l.nop Support. (line 41) |
* l.nop 8 (turn on tracing): l.nop Support. (line 45) |
* l.nop 8 (turn off tracing): Trace Generation. (line 40) |
* l.nop 8 (turn on tracing) <1>: l.nop Support. (line 45) |
* l.nop 8 (turn on tracing): Trace Generation. (line 40) |
* l.nop 9 (turn off tracing): l.nop Support. (line 48) |
* l.nop opcode effects: l.nop Support. (line 6) |
* library version of Or1ksim: Simulator Library. (line 6) |
4549,9 → 4587,9
* Remote Serial Protocol: Debug Interface Configuration. |
(line 20) |
* Remote Serial Protocol, --nosrv: Standalone Simulator. |
(line 52) |
(line 65) |
* Remote Serial Protocol, --srv: Standalone Simulator. |
(line 60) |
(line 73) |
* report_interrupt: Concepts. (line 20) |
* reset (Interactive CLI): Interactive Command Line. |
(line 63) |
4795,57 → 4833,57
Node: Known Issues8668 |
Node: Usage9723 |
Node: Standalone Simulator10007 |
Node: Profiling Utility14567 |
Node: Memory Profiling Utility15473 |
Node: Trace Generation16833 |
Node: Simulator Library18075 |
Node: Ethernet TUN/TAP Interface28507 |
Node: Setting Up a Persistent TAP device29612 |
Node: Establishing a Bridge30287 |
Node: Opening the Firewall31970 |
Node: Disabling Ethernet Filtering32461 |
Node: Networking from OpenRISC Linux and BusyBox33086 |
Node: Tearing Down a Bridge34748 |
Node: l.nop Support35491 |
Node: Configuration37001 |
Node: Configuration File Format37613 |
Node: Configuration File Preprocessing37998 |
Node: Configuration File Syntax38295 |
Node: Simulator Configuration41080 |
Node: Simulator Behavior41371 |
Node: Verification API Configuration45952 |
Node: CUC Configuration47892 |
Node: Core OpenRISC Configuration49884 |
Node: CPU Configuration50386 |
Node: Memory Configuration54505 |
Node: Memory Management Configuration61227 |
Node: Cache Configuration63604 |
Node: Interrupt Configuration65990 |
Node: Power Management Configuration67823 |
Node: Branch Prediction Configuration69100 |
Node: Debug Interface Configuration70460 |
Node: Peripheral Configuration72803 |
Node: Memory Controller Configuration73429 |
Node: UART Configuration77209 |
Node: DMA Configuration80728 |
Node: Ethernet Configuration82595 |
Node: GPIO Configuration87874 |
Node: Display Interface Configuration89507 |
Node: Frame Buffer Configuration91816 |
Node: Keyboard Configuration93680 |
Node: Disc Interface Configuration95918 |
Node: Generic Peripheral Configuration101022 |
Node: Interactive Command Line103317 |
Node: Verification API110291 |
Node: Code Internals114721 |
Node: Coding Conventions115304 |
Node: Global Data Structures119731 |
Node: Concepts122388 |
Ref: Output Redirection122533 |
Ref: Interrupts Internal123071 |
Node: Internal Debugging124224 |
Node: Regression Testing124748 |
Node: GNU Free Documentation License128537 |
Node: Index150944 |
Node: Profiling Utility15151 |
Node: Memory Profiling Utility16057 |
Node: Trace Generation17417 |
Node: Simulator Library19602 |
Node: Ethernet TUN/TAP Interface30034 |
Node: Setting Up a Persistent TAP device31139 |
Node: Establishing a Bridge31814 |
Node: Opening the Firewall33497 |
Node: Disabling Ethernet Filtering33988 |
Node: Networking from OpenRISC Linux and BusyBox34613 |
Node: Tearing Down a Bridge36275 |
Node: l.nop Support37018 |
Node: Configuration38528 |
Node: Configuration File Format39140 |
Node: Configuration File Preprocessing39525 |
Node: Configuration File Syntax39822 |
Node: Simulator Configuration42607 |
Node: Simulator Behavior42898 |
Node: Verification API Configuration47479 |
Node: CUC Configuration49419 |
Node: Core OpenRISC Configuration51411 |
Node: CPU Configuration51913 |
Node: Memory Configuration56032 |
Node: Memory Management Configuration62754 |
Node: Cache Configuration65131 |
Node: Interrupt Configuration67517 |
Node: Power Management Configuration69350 |
Node: Branch Prediction Configuration70627 |
Node: Debug Interface Configuration71987 |
Node: Peripheral Configuration74330 |
Node: Memory Controller Configuration74956 |
Node: UART Configuration78736 |
Node: DMA Configuration82255 |
Node: Ethernet Configuration84122 |
Node: GPIO Configuration89401 |
Node: Display Interface Configuration91034 |
Node: Frame Buffer Configuration93343 |
Node: Keyboard Configuration95207 |
Node: Disc Interface Configuration97445 |
Node: Generic Peripheral Configuration102549 |
Node: Interactive Command Line104844 |
Node: Verification API111818 |
Node: Code Internals116248 |
Node: Coding Conventions116831 |
Node: Global Data Structures121258 |
Node: Concepts123915 |
Ref: Output Redirection124060 |
Ref: Interrupts Internal124598 |
Node: Internal Debugging125751 |
Node: Regression Testing126275 |
Node: GNU Free Documentation License130064 |
Node: Index152471 |
|
End Tag Table |
/doc/or1ksim.texi
415,6 → 415,23
Dump instruction just executed and any register/memory location chaged |
after each instruction (one line per instruction). |
|
@item --trace-physical |
@itemx --trace-virtual |
@cindex @code{--trace-physical} |
@cindex @code{--trace-virtual} |
When tracing instructions, show the physical address |
(@code{--trace-physical}) and/or the virtual address |
(@code{--trace-virtual}) of the instruction being executed. Both flags |
may be specified, in which case both physical and virtual addresses are |
shown, physical first. |
|
@quotation Note |
Either or both flags may be specified without @code{--trace}, to |
indicate how addresses should be shown if subsequently enabled by a |
@code{SIGUSER1} signal or @code{l.nop 8} opcode (@pxref{Trace |
Generation, , Trace Generation}). |
@end quotation |
|
@item -f @var{file} |
@itemx --file=@var{file} |
@cindex @code{-f} |
645,9 → 662,9
|
An execution trace can be generated at run time with options passed by |
the command line, or via the operating system's signal passing |
mechanism. |
mechanism, or by @code{l.nop} opcodes in an application program. |
|
The following, passed at run time, can be used to create an execution dump. |
The following flag can be used to create an execution dump. |
|
@table @code |
|
655,8 → 672,12
@itemx --trace |
@cindex @code{-t} |
@cindex @code{--trace} |
Dump instruction just executed and any register/memory location chaged |
after each instruction (one line per instruction). |
Dump instruction just executed and any register/memory location changed |
after each instruction (one line per instruction). Each line starts |
with either ``S'' or ``U'' to indicate whether the processor was in |
supervisor or user mode @emph{when the instruction completed}. It is |
worth bearing in mind that tracing happens at completion of instruction |
execution and shows the state at that time. |
@end table |
|
Passing a signal @code{SIGUSR1} while the simulator is running toggles |
682,7 → 703,25
kill -SIGUSR1 @emph{process-number} |
@end example |
|
@cindex l.nop 8 (turn on tracing) |
@cindex l.nop 8 (turn off tracing) |
Tracing can also be enabled and disabled from within a target program |
using the @code{l.nop 8} and @code{l.nop 9} opcodes to enable and |
disable tracing respectively. |
|
@cindex @code{--trace-physical} |
@cindex @code{--trace-virtual} |
By default tracing will show the virtual address of each instruction |
traced. This may be controlled by two options, @code{--trace-physical} |
to show the physical address and/or @code{--trace-virtual} to show the |
virtual address. If neither is specified, the virtual address is shown. |
|
@quotation Note |
Either or both flags may be specified without @code{--trace}, to |
indicate how addresses should be shown if subsequently enabled by a |
@code{SIGUSER1} signal or @code{l.nop 8} opcode. |
@end quotation |
|
@node Simulator Library |
@section Simulator Library |
@cindex library version of @value{OR1KSIM} |
/ChangeLog
1,5 → 1,38
2011-01-05 Jeremy Bennett <jeremy@jeremybennett.com> |
|
* cpu/common/abstract.c (diassemble_instr): Added instruction |
as third parameter. No longer look up in memory. |
* cpu/common/abstract.h <diassemble_instr>: Updated prototype. |
* cpu/or32/execute.c (trace_instr): Pass instruction as third |
parameter to dissassemble_instr. Clearer message when we can't get |
a physical address. |
|
2011-01-05 Jeremy Bennett <jeremy@jeremybennett.com> |
|
* cpu/common/abstract.c (diassemble_instr): Start each line with a |
flag indicating if user or supervisor mode. |
* doc/or1ksim.texi: Updated with new trace flags and explaining |
trace ouptut in more detail. |
|
2011-01-05 Jeremy Bennett <jeremy@jeremybennett.com> |
|
* cpu/common/abstract.c (diassemble_instr): Control output of |
physical/virtual address with --trace-physical and --trace-virtual |
flags. |
* sim-config.c (parse_args): Add --trace-physical and |
--trace-virtual flags. |
* sim-config.h <runtime.sim>: Add trace_phy and trace_virt flags. |
|
2011-01-05 Jeremy Bennett <jeremy@jeremybennett.com> |
|
* cpu/common/abstract.c (diassemble_instr): Added virtual address |
as second parameter, used for trace O/P. |
* cpu/common/abstract.h <diassemble_instr>: Updated prototype. |
* cpu/or32/execute.c (trace_instr): Pass virtual as well as |
physical address to disassemble_instr. |
|
2011-01-05 Jeremy Bennett <jeremy@jeremybennett.com> |
|
* configure: Regenerated. |
* configure.ac: Updated version. |
* cpu/or1k/spr-defs.h: Added definition of NOP_TRACE_ON and |
/sim-config.c
944,6 → 944,8
struct arg_lit *quiet; |
struct arg_lit *verbose; |
struct arg_lit *trace; |
struct arg_lit *trace_phy; |
struct arg_lit *trace_virt; |
struct arg_lit *report_mem_errs; |
struct arg_lit *strict_npc; |
struct arg_lit *profile; |
968,6 → 970,10
quiet = arg_lit0 ("q", "quiet", "minimal message output"); |
verbose = arg_lit0 ("V", "verbose", "verbose message output"); |
trace = arg_lit0 ("t", "trace", "trace each instruction"); |
trace_phy = arg_lit0 (NULL, "trace-physical", |
"show physical instruction address when tracing"); |
trace_virt = arg_lit0 (NULL, "trace-virtual", |
"show virtual instruction address when tracing"); |
report_mem_errs = arg_lit0 (NULL, "report-memory-errors", |
"Report out of memory accesses"); |
strict_npc = arg_lit0 (NULL, "strict-npc", "setting NPC flushes pipeline"); |
989,6 → 995,8
quiet, |
verbose, |
trace, |
trace_phy, |
trace_virt, |
report_mem_errs, |
strict_npc, |
profile, |
1046,9 → 1054,18
config.sim.verbose = verbose->count; |
} |
|
/* Request for tracing */ |
runtime.sim.hush = trace->count ? 0 : 1; |
/* Request for tracing. We may ask for instructions to be recorded with |
either the physical or virtual address. */ |
runtime.sim.hush = trace->count ? 0 : 1; |
runtime.sim.trace_phy = trace_phy->count ? 1 : 0; |
runtime.sim.trace_virt = trace_virt->count ? 1 : 0; |
|
/* Ensure we have a least one address type in use. */ |
if (!runtime.sim.trace_phy && !runtime.sim.trace_virt) |
{ |
runtime.sim.trace_virt = 1; |
} |
|
/* Request for memory errors */ |
config.sim.report_mem_errs = report_mem_errs->count; |
|