Subversion Repositories openrisc

cpu/or32/dyngen.c Property changes : Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -Id \ No newline at end of property Index: cpu/or32/dyngen.h =================================================================== --- cpu/or32/dyngen.h (revision 538) +++ cpu/or32/dyngen.h (nonexistent) @@ -1,45 +0,0 @@ -/* dyngen.h -- Definitions for dyngen.c - Copyright (C) 2005 György `nog' Jeney, nog@sdf.lonestar.org - -This file is part of OpenRISC 1000 Architectural Simulator. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2 of the License, or -(at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software -Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ - - -struct reloc { - unsigned int func_offset; - unsigned int addend; - int type; - const char *name; -}; - -struct bff { - void *(*open_obj)(const char *object); /* Open the object file */ - void (*close_obj)(void *); - char *(*get_func_name)(void *, unsigned int func); /* Gets the name of func */ - void *(*get_func_start)(void *, unsigned int func); - unsigned int (*get_func_len)(void *, unsigned int func); - int (*get_func_reloc)(void *, unsigned int func, unsigned int relocn, struct reloc *reloc); -}; - -extern const struct bff bffs; - -struct archf { - unsigned int (*get_real_func_len)(void *func, unsigned int len, char *name); - void (*gen_reloc)(FILE *f, struct reloc *reloc, unsigned int param); - void (*gen_func_reloc)(FILE *f, struct reloc *reloc); -}; - -extern const struct archf archfs;

cpu/or32/dyngen.h Property changes : Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -Id \ No newline at end of property Index: cpu/or32/dyngen-elf.c =================================================================== --- cpu/or32/dyngen-elf.c (revision 538) +++ cpu/or32/dyngen-elf.c (nonexistent) @@ -1,359 +0,0 @@ -/* dyngen-elf.c -- Elf parser for dyngen - Copyright (C) 2005 György `nog' Jeney, nog@sdf.lonestar.org - -This file is part of OpenRISC 1000 Architectural Simulator. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2 of the License, or -(at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software -Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ - - -#include -#include -#include -#include - -#include - -#include "dyngen.h" - -struct elf_obj { - Elf32_Ehdr e_hdr; - Elf32_Shdr *e_shdrs; - void **e_sections; - Elf32_Sym *e_syms; /* The symbol table in the elf file */ - unsigned int e_sym_num; /* The number of symbols */ - unsigned int e_sym_str_tab; /* The string-table associated with symbols */ - Elf32_Rel *e_rels; - unsigned int e_rel_num; /* The number of relocations (in e_rel) */ - unsigned int e_rel_sym; - unsigned int e_rel_sec; /* The section to modify */ - Elf32_Rela *e_relas; - unsigned int e_rela_num; /* The number of relocations (in e_rela) */ - unsigned int e_rela_sym; - unsigned int e_rela_sec; /* The section to modify */ -}; - -void *elf_open_obj(const char *file) -{ - struct elf_obj *obj; - FILE *f; - int i; - - if(!(obj = malloc(sizeof(struct elf_obj)))) { - fprintf(stderr, "OOM\n"); - return NULL; - } - - if(!(f = fopen(file, "r"))) { - free(obj); - return NULL; - } - - fread(&obj->e_hdr, sizeof(Elf32_Ehdr), 1, f); - - /* Do some sanity checks */ - if((obj->e_hdr.e_ident[EI_MAG0] != ELFMAG0) || - (obj->e_hdr.e_ident[EI_MAG1] != ELFMAG1) || - (obj->e_hdr.e_ident[EI_MAG2] != ELFMAG2) || - (obj->e_hdr.e_ident[EI_MAG3] != ELFMAG3)) { - fprintf(stderr, "%s is not an elf file!\n", file); - goto error_load; - } - - if(obj->e_hdr.e_ident[EI_CLASS] == ELFCLASSNONE) { - fprintf(stderr, "Invalid class in ELF header\n"); - goto error_load; - } - - if(obj->e_hdr.e_ident[EI_DATA] == ELFDATANONE) { - fprintf(stderr, "Invalid data format in ELF header\n"); - goto error_load; - } - - /* FIXME: Swap data as necessary */ - - if((obj->e_hdr.e_ident[EI_VERSION] != 1) || - (obj->e_hdr.e_version != 1)) { - fprintf(stderr, "Unexpected elf version found: %i (%li)\n", - obj->e_hdr.e_ident[EI_VERSION], (long int)obj->e_hdr.e_version); - goto error_load; - } - - if(obj->e_hdr.e_type != ET_REL) { - fprintf(stderr, "Appears that we did not receive a object file\n"); - goto error_load; - } - - if(obj->e_hdr.e_phoff) { - fprintf(stderr, "What am I supposed to do with a program header??\n"); - goto error_load; - } - - if(obj->e_hdr.e_ehsize != sizeof(Elf32_Ehdr)) { - fprintf(stderr, "Unknown size of elf header\n"); - goto error_load; - } - - if(!obj->e_hdr.e_shoff || !obj->e_hdr.e_shnum) { - fprintf(stderr, "The elf file contains no sections!\n"); - goto error_load; - } - - if(obj->e_hdr.e_shentsize != sizeof(Elf32_Shdr)) { - fprintf(stderr, "Unknown section header size %i\n", obj->e_hdr.e_shentsize); - goto error_load; - } - - /* Load the section headers */ - if(!(obj->e_shdrs = malloc(obj->e_hdr.e_shentsize * obj->e_hdr.e_shnum))){ - fprintf(stderr, "OOM\n"); - goto error_load; - } - - fseek(f, obj->e_hdr.e_shoff, SEEK_SET); - fread(obj->e_shdrs, obj->e_hdr.e_shentsize, obj->e_hdr.e_shnum, f); - - /* FIXME: swap data */ - - /* Load the sections */ - if(!(obj->e_sections = calloc(obj->e_hdr.e_shnum, sizeof(void *)))) { - fprintf(stderr, "OOM\n"); - free(obj->e_shdrs); - goto error_load; - } - - for(i = 0; i < obj->e_hdr.e_shnum; i++) { - if(obj->e_shdrs[i].sh_type == SHT_NOBITS) - continue; - if(!(obj->e_sections[i] = malloc(obj->e_shdrs[i].sh_size))) { - fprintf(stderr, "OOM\n"); - goto post_sec_error_load; - } - fseek(f, obj->e_shdrs[i].sh_offset, SEEK_SET); - fread(obj->e_sections[i], obj->e_shdrs[i].sh_size, 1, f); - } - - obj->e_rels = NULL; - obj->e_syms = NULL; - obj->e_relas = NULL; - - /* Find the symbol table and relocation table(s) */ - for(i = 0; i < obj->e_hdr.e_shnum; i++) { - switch(obj->e_shdrs[i].sh_type) { - case SHT_SYMTAB: - if(obj->e_syms) { - fprintf(stderr, "ELF file has more than one symbol table\n"); - goto post_sec_error_load; - } - if(obj->e_shdrs[i].sh_entsize != sizeof(Elf32_Sym)) { - fprintf(stderr, "ELF symbol table entry size is unknown\n"); - goto post_sec_error_load; - } - if((obj->e_shdrs[i].sh_size % obj->e_shdrs[i].sh_entsize)) { - fprintf(stderr, "Symbol table's length is not a multiple of sizeof(Elf32_Sym\n"); - goto post_sec_error_load; - } - obj->e_syms = obj->e_sections[i]; - obj->e_sym_num = obj->e_shdrs[i].sh_size / obj->e_shdrs[i].sh_entsize; - obj->e_sym_str_tab = obj->e_shdrs[i].sh_link; - break; - case SHT_REL: - if(obj->e_rels) { - fprintf(stderr, "ELF file has more than one relocation table\n"); - goto post_sec_error_load; - } - if(obj->e_shdrs[i].sh_entsize != sizeof(Elf32_Rel)) { - fprintf(stderr, "ELF relocation table entry size is unknown\n"); - goto post_sec_error_load; - } - if((obj->e_shdrs[i].sh_size % obj->e_shdrs[i].sh_entsize)) { - fprintf(stderr, "Relocation table's length is not a multiple of sizeof(Elf32_Rel\n"); - goto post_sec_error_load; - } - obj->e_rels = obj->e_sections[i]; - obj->e_rel_sec = obj->e_shdrs[i].sh_info; - obj->e_rel_sym = obj->e_shdrs[i].sh_link; - obj->e_rel_num = obj->e_shdrs[i].sh_size / obj->e_shdrs[i].sh_entsize; - break; - case SHT_RELA: - if(obj->e_relas) { - fprintf(stderr, "ELF file has more than one a-relocation table\n"); - goto post_sec_error_load; - } - if(obj->e_shdrs[i].sh_entsize != sizeof(Elf32_Rela)) { - fprintf(stderr, "ELF a-relocation table entry size is unknown\n"); - goto post_sec_error_load; - } - if((obj->e_shdrs[i].sh_size % obj->e_shdrs[i].sh_entsize)) { - fprintf(stderr, "Relocation table's length is not a multiple of sizeof(Elf32_Rela)\n"); - goto post_sec_error_load; - } - obj->e_relas = obj->e_sections[i]; - obj->e_rela_sec = obj->e_shdrs[i].sh_info; - obj->e_rela_sym = obj->e_shdrs[i].sh_link; - obj->e_rela_num = obj->e_shdrs[i].sh_size / obj->e_shdrs[i].sh_entsize; - break; - } - } - - fclose(f); - return obj; - -post_sec_error_load: - for(i = 0; i < obj->e_hdr.e_shnum; i++) { - if(obj->e_sections[i]) - free(obj->e_sections[i]); - } - free(obj->e_sections); - free(obj->e_shdrs); -error_load: - free(obj); - fclose(f); - return NULL; -} - -void elf_close_obj(void *e_obj) -{ - struct elf_obj *obj = e_obj; - int i; - - for(i = 0; i < obj->e_hdr.e_shnum; i++) { - if(obj->e_sections[i]) - free(obj->e_sections[i]); - } - free(obj->e_sections); - free(obj->e_shdrs); - free(obj); -} - -static Elf32_Sym *elf_find_func(struct elf_obj *obj, unsigned int func) -{ - int i, j; - Elf32_Sym *cur; - - for(i = 0, j = 0, cur = obj->e_syms; i < obj->e_sym_num; i++, cur++) { - if(ELF32_ST_BIND(cur->st_info) != STB_GLOBAL) - continue; - if(ELF32_ST_TYPE(cur->st_info) != STT_FUNC) - continue; - if(j == func) - return cur; - j++; - } - return NULL; -} - -char *elf_get_func_name(void *e_obj, unsigned int func) -{ - struct elf_obj *obj = e_obj; - Elf32_Sym *func_sym = elf_find_func(obj, func); - - if(func_sym) - return obj->e_sections[obj->e_sym_str_tab] + func_sym->st_name; - - return NULL; -} - -unsigned int elf_get_func_len(void *e_obj, unsigned int func) -{ - struct elf_obj *obj = e_obj; - Elf32_Sym *func_sym = elf_find_func(obj, func); - - if(func_sym) - return func_sym->st_size; - return 0; -} - -void *elf_get_func_start(void *e_obj, unsigned int func) -{ - struct elf_obj *obj = e_obj; - Elf32_Sym *func_sym = elf_find_func(obj, func); - - if(!func_sym) - return NULL; - - if(func_sym->st_shndx == SHN_COMMON) { - fprintf(stderr, "Don't know how to handle SHN_COMMON section header\n"); - return NULL; - } - - return obj->e_sections[func_sym->st_shndx] + func_sym->st_value; -} - -static char *elf_get_sym_name(struct elf_obj *obj, unsigned int sym) -{ - char *name; - - name = obj->e_sections[obj->e_sym_str_tab]; - name += obj->e_syms[sym].st_name; - - return name; -} - -int elf_get_func_reloc(void *e_obj, unsigned int func, unsigned int relocn, - struct reloc *reloc) -{ - struct elf_obj *obj = e_obj; - Elf32_Sym *func_sym = elf_find_func(obj, func); - Elf32_Rel *cur; - Elf32_Rela *cura; - int i, j; - -/* - if(obj->e_rel_sec != func_sym->st_shndx) { - fprintf(stderr, "Don't know what to do: Function does not have a relocation table\n"); - return 0; - } -*/ - - for(i = 0, j = 0, cur = obj->e_rels; i < obj->e_rel_num; i++, cur++) { - if((cur->r_offset - func_sym->st_value) > func_sym->st_size) - continue; - if(relocn == j) { - reloc->name = elf_get_sym_name(obj, ELF32_R_SYM(cur->r_info)); - reloc->func_offset = cur->r_offset - func_sym->st_value; - reloc->type = ELF32_R_TYPE(cur->r_info); - /* FIXME: Byte-swap */ - reloc->addend = *(uint32_t *)(obj->e_sections[obj->e_rel_sec] + cur->r_offset); - return 1; - } - j++; - } - - if(!obj->e_relas) - return 0; - - for(i = 0, cura = obj->e_relas; i < obj->e_rela_num; i++, cura++) { - if((cura->r_offset - func_sym->st_value) > func_sym->st_size) - continue; - if(relocn == j) { - reloc->name = elf_get_sym_name(obj, ELF32_R_SYM(cur->r_info)); - reloc->func_offset = cura->r_offset - func_sym->st_value; - reloc->type = ELF32_R_TYPE(cur->r_info); - reloc->addend = cura->r_addend; - return 1; - } - j++; - } - - return 0; -} - -const struct bff bffs = { - elf_open_obj, - elf_close_obj, - elf_get_func_name, - elf_get_func_start, - elf_get_func_len, - elf_get_func_reloc };

cpu/or32/dyngen-elf.c Property changes : Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -Id \ No newline at end of property Index: cpu/or32/op-i386.h =================================================================== --- cpu/or32/op-i386.h (revision 538) +++ cpu/or32/op-i386.h (nonexistent) @@ -1,46 +0,0 @@ -/* op-i386.h -- i386 specific support routines for micro operations - - Copyright (C) 2005 György `nog' Jeney, nog@sdf.lonestar.org - Copyright (C) 2008 Embecosm Limited - - Contributor Jeremy Bennett - - This file is part of Or1ksim, the OpenRISC 1000 Architectural Simulator. - - This program is free software; you can redistribute it and/or modify it - under the terms of the GNU General Public License as published by the Free - Software Foundation; either version 3 of the License, or (at your option) - any later version. - - This program is distributed in the hope that it will be useful, but WITHOUT - ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - more details. - - You should have received a copy of the GNU General Public License along - with this program. If not, see . */ - -/* This program is commented throughout in a fashion suitable for processing - with Doxygen. */ - - -#ifndef OP_I386__H -#define OP_I386__H - -#define OP_JUMP(x) asm("jmp *%0" : : "rm" (x)) - -#define FORCE_RET asm volatile ("") - -/* Does a function call (with no arguments) makeing sure that gcc doesn't peddle - * the stack. (FIXME: Is this safe??) */ -#define SPEEDY_CALL(func) asm("call "#func"\n") - -/* Return out of the recompiled code */ -asm (" .align 2\n" - " .p2align 4,,15\n" - ".globl op_do_jump\n" - " .type op_do_jump,@function\n" - "op_do_jump:\n" - " ret\n" " ret\n" "1:\n" " .size op_do_jump,1b-op_do_jump\n"); - -#endif /* OP_I386__H */

cpu/or32/op-i386.h Property changes : Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -Id \ No newline at end of property Index: cpu/or32/op-extend-op.h =================================================================== --- cpu/or32/op-extend-op.h (revision 538) +++ cpu/or32/op-extend-op.h (nonexistent) @@ -1,27 +0,0 @@ -/* op-extend-op.h -- Micro operations template for sign extention operations - Copyright (C) 2005 György `nog' Jeney, nog@sdf.lonestar.org - -This file is part of OpenRISC 1000 Architectural Simulator. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2 of the License, or -(at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software -Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ - - -void glue(glue(op_, EXT_NAME), T)(void) -{ - register EXT_TYPE x; - x = T1; - T0 = EXT_CAST x; -} -

cpu/or32/op-extend-op.h Property changes : Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -Id \ No newline at end of property Index: cpu/or32/dyn-rec.c =================================================================== --- cpu/or32/dyn-rec.c (revision 538) +++ cpu/or32/dyn-rec.c (nonexistent) @@ -1,2451 +0,0 @@ -/* dyn-rec.c -- Dynamic recompiler implementation for or32 - Copyright (C) 2005 György `nog' Jeney, nog@sdf.lonestar.org - -This file is part of OpenRISC 1000 Architectural Simulator. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2 of the License, or -(at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software -Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ - -#include -#include -#include -#include -#include -#include -#include - -#include "config.h" - -#ifdef HAVE_INTTYPES_H -#include -#endif - -#include "port.h" -#include "arch.h" -#include "immu.h" -#include "abstract.h" -#include "opcode/or32.h" -#include "spr-defs.h" -#include "execute.h" -#include "except.h" -#include "spr-defs.h" -#include "sim-config.h" -#include "sched.h" -#include "i386-regs.h" -#include "def-op-t.h" -#include "dyn-rec.h" -#include "gen-ops.h" -#include "op-support.h" -#include "toplevel-support.h" - - -/* NOTE: All openrisc (or) addresses in this file are *PHYSICAL* addresses */ - -/* FIXME: Optimise sorted list adding */ - -typedef void (*generic_gen_op)(struct op_queue *opq, int end); -typedef void (*imm_gen_op)(struct op_queue *opq, int end, uorreg_t imm); - -void gen_l_invalid(struct op_queue *opq, int param_t[3], int delay_slot); - -/* ttg->temporary to gpr */ -DEF_GPR_OP(generic_gen_op, gen_op_move_gpr_t, gen_op_ttg_gpr); -/* gtt->gpr to temporary */ -DEF_GPR_OP(generic_gen_op, gen_op_move_t_gpr, gen_op_gtt_gpr); - -DEF_1T_OP(imm_gen_op, calc_insn_ea_table, gen_op_calc_insn_ea); - -/* Linker stubs. This will allow the linker to link in op.o. The relocations - * that the linker does for these will be irrelevent anyway, since we patch the - * relocations during recompilation. */ -uorreg_t __op_param1; -uorreg_t __op_param2; -uorreg_t __op_param3; - -/* The number of bytes that a dynamicly recompiled page should be enlarged by */ -#define RECED_PAGE_ENLARGE_BY 51200 - -/* The number of entries that the micro operations array in op_queue should be - * enlarged by */ -#define OPS_ENLARGE_BY 5 - -#define T_NONE (-1) - -/* Temporary is used as a source operand */ -#define TFLAG_SRC 1 -/* Temporary is used as a destination operand */ -#define TFLAG_DST 2 -/* Temporary has been saved to permanent storage */ -#define TFLAG_SAVED 4 -/* Temporary contains the value of the register before the instruction execution - * occurs (either by an explicit reg->t move or implicitly being left over from - * a previous instruction) */ -#define TFLAG_SOURCED 8 - -/* FIXME: Put this into some header */ -extern int do_stats; - -static int sigsegv_state = 0; -static void *sigsegv_addr = NULL; - -void dyn_ret_stack_prot(void); - -void dyn_sigsegv_debug(int u, siginfo_t *siginf, void *dat) -{ - struct dyn_page *dp; - FILE *f; - char filen[18]; /* 18 == strlen("or_page.%08x") + 1 */ - int i; - struct sigcontext *sigc = dat; - - if(!sigsegv_state) { - sigsegv_addr = siginf->si_addr; - } else { - fprintf(stderr, "Nested SIGSEGV occured, dumping next chuck of info\n"); - sigsegv_state++; - } - - /* First dump all the data that does not need dereferenceing to get */ - switch(sigsegv_state) { - case 0: - fflush(stderr); - fprintf(stderr, "Segmentation fault on acces to %p at 0x%08lx, (or address: 0x%"PRIxADDR")\n\n", - sigsegv_addr, sigc->eip, cpu_state.pc); - sigsegv_state++; - case 1: - /* Run through the recompiled pages, dumping them to disk as we go */ - for(i = 0; i < (2 << (32 - immu_state->pagesize_log2)); i++) { - dp = cpu_state.dyn_pages[i]; - if(!dp) - continue; - fprintf(stderr, "Dumping%s page 0x%"PRIxADDR" recompiled to %p (len: %u) to disk\n", - dp->dirty ? " dirty" : "", dp->or_page, dp->host_page, - dp->host_len); - fflush(stdout); - - sprintf(filen, "or_page.%"PRIxADDR, dp->or_page); - if(!(f = fopen(filen, "w"))) { - fprintf(stderr, "Unable to open %s to dump the recompiled page to: %s\n", - filen, strerror(errno)); - continue; - } - if(fwrite(dp->host_page, dp->host_len, 1, f) < 1) - fprintf(stderr, "Unable to write recompiled data to file: %s\n", - strerror(errno)); - - fclose(f); - } - sigsegv_state++; - case 2: - sim_done(); - } -} - -struct dyn_page *new_dp(oraddr_t page) -{ - struct dyn_page *dp = malloc(sizeof(struct dyn_page)); - dp->or_page = IADDR_PAGE(page); - - dp->locs = malloc(sizeof(void *) * (immu_state->pagesize / 4)); - - dp->host_len = 0; - dp->host_page = NULL; - dp->dirty = 1; - - if(do_stats) { - dp->insns = malloc(immu_state->pagesize); - dp->insn_indexs = malloc(sizeof(unsigned int) * (immu_state->pagesize / 4)); - } - - cpu_state.dyn_pages[dp->or_page >> immu_state->pagesize_log2] = dp; - return dp; -} - -void dyn_main(void) -{ - struct dyn_page *target_dp; - oraddr_t phys_page; - - setjmp(cpu_state.excpt_loc); - for(;;) { - phys_page = immu_translate(cpu_state.pc); - -/* - printf("Recompiled code jumping out to %"PRIxADDR" from %"PRIxADDR"\n", - phys_page, cpu_state.sprs[SPR_PPC] - 4); -*/ - - /* immu_translate() adds the hit delay to runtime.sim.mem_cycles but we add - * it to the cycles when the instruction is executed so if we don't reset it - * now it will produce wrong results */ - runtime.sim.mem_cycles = 0; - - target_dp = cpu_state.dyn_pages[phys_page >> immu_state->pagesize_log2]; - - if(!target_dp) - target_dp = new_dp(phys_page); - - /* Since writes to the 0x0-0xff range do not dirtyfy a page recompile the - * 0x0 page if the jump is to that location */ - if(phys_page < 0x100) - target_dp->dirty = 1; - - if(target_dp->dirty) - recompile_page(target_dp); - - cpu_state.curr_page = target_dp; - - /* FIXME: If the page is backed by more than one type of memory, this will - * produce wrong results */ - cpu_state.cycles_dec = target_dp->delayr; - if(cpu_state.sprs[SPR_SR] & SPR_SR_IME) - /* Add the mmu hit delay to the cycle counter */ - cpu_state.cycles_dec -= immu_state->hitdelay; - - /* FIXME: ebp, ebx, esi and edi are expected to be preserved across function - * calls but the recompiled code trashes them... */ - enter_dyn_code(phys_page, target_dp); - } -} - -static void immu_retranslate(void *dat) -{ - int got_en_dis = (int)dat; - immu_translate(cpu_state.pc); - runtime.sim.mem_cycles = 0; - - /* Only update the cycle decrementer if the mmu got enabled or disabled */ - if(got_en_dis == IMMU_GOT_ENABLED) - /* Add the mmu hit delay to the cycle counter */ - cpu_state.cycles_dec = cpu_state.curr_page->delayr - immu_state->hitdelay; - else if(got_en_dis == IMMU_GOT_DISABLED) - cpu_state.cycles_dec = cpu_state.curr_page->delayr; -} - -/* This is called whenever the immu is either enabled/disabled or reconfigured - * while enabled. This checks if an itlb miss would occour and updates the immu - * hit delay counter */ -void recheck_immu(int got_en_dis) -{ - oraddr_t addr; - - if(cpu_state.delay_insn) - addr = cpu_state.pc_delay; - else - addr = cpu_state.pc + 4; - - if(IADDR_PAGE(cpu_state.pc) == IADDR_PAGE(addr)) - /* Schedule a job to do immu_translate() */ - SCHED_ADD(immu_retranslate, (void *)got_en_dis, 0); -} - -/* Runs the scheduler. Called from except_handler (and dirtyfy_page below) */ -void run_sched_out_of_line(void) -{ - oraddr_t off = (cpu_state.pc & immu_state->page_offset_mask) >> 2; - - if(do_stats) { - cpu_state.iqueue.insn_addr = cpu_state.pc; - cpu_state.iqueue.insn = cpu_state.curr_page->insns[off]; - cpu_state.iqueue.insn_index = cpu_state.curr_page->insn_indexs[off]; - runtime.cpu.instructions++; - analysis(&cpu_state.iqueue); - } - - /* Run the scheduler */ - scheduler.job_queue->time += cpu_state.cycles_dec; - runtime.sim.cycles -= cpu_state.cycles_dec; - - op_join_mem_cycles(); - if(scheduler.job_queue->time <= 0) - do_scheduler(); -} - -/* Signals a page as dirty */ -static void dirtyfy_page(struct dyn_page *dp) -{ - oraddr_t check; - - printf("Dirtyfying page 0x%"PRIxADDR"\n", dp->or_page); - - dp->dirty = 1; - - /* If the execution is currently in the page that was touched then recompile - * it now and jump back to the point of execution */ - check = cpu_state.delay_insn ? cpu_state.pc_delay : cpu_state.pc + 4; - if(IADDR_PAGE(check) == dp->or_page) { - run_sched_out_of_line(); - recompile_page(dp); - - cpu_state.delay_insn = 0; - - /* Jump out to the next instruction */ - do_jump(check); - } -} - -/* Checks to see if a write happened to a recompiled page. If so marks it as - * dirty */ -void dyn_checkwrite(oraddr_t addr) -{ - /* FIXME: Do this with mprotect() */ - struct dyn_page *dp = cpu_state.dyn_pages[addr >> immu_state->pagesize_log2]; - - /* Since the locations 0x0-0xff are nearly always written to in an exception - * handler, ignore any writes to these locations. If code ends up jumping - * out there, we'll recompile when the jump actually happens. */ - if((addr > 0x100) && dp && !dp->dirty) - dirtyfy_page(dp); -} - -/* Moves the temprary t to its permanent storage if it has been used as a - * destination register */ -static void ship_t_out(struct op_queue *opq, unsigned int t) -{ - unsigned int gpr = opq->reg_t[t]; - - for(; opq; opq = opq->prev) { - if(opq->reg_t[t] != gpr) - return; - if((opq->tflags[t] & TFLAG_DST) && !(opq->tflags[t] & TFLAG_SAVED)) { - opq->tflags[t] |= TFLAG_SAVED; - - /* FIXME: Check if this is still neccesary */ - /* Before takeing the temporaries out, temporarily remove the op_do_sched - * operation such that dyn_page->ts_bound shall be correct before the - * scheduler runs */ - if(opq->num_ops && (opq->ops[opq->num_ops - 1] == op_do_sched_indx)) { - opq->num_ops--; - gen_op_move_gpr_t[t][gpr](opq, 1); - gen_op_do_sched(opq, 1); - return; - } - - gen_op_move_gpr_t[t][gpr](opq, 1); - - return; - } - } -} - -static void ship_gprs_out_t(struct op_queue *opq) -{ - int i; - - if(!opq) - return; - - for(i = 0; i < NUM_T_REGS; i++) { - if(opq->reg_t[i] < 32) - /* Ship temporaries out in the last opq that actually touched it */ - ship_t_out(opq, i); - } -} - -/* FIXME: Look at the following instructions to make a better guess at which - * temporary to return */ -static int find_t(struct op_queue *opq, unsigned int reg) -{ - int i, j, t = -1; - - for(i = 0; i < NUM_T_REGS; i++) { - if(opq->reg_t[i] == reg) - return i; - - /* Ok, we have found an as-yet unused temporary, check if it is needed - * later in this instruction */ - for(j = 0; j < opq->param_num; j++) { - if((opq->param_type[j] & OPTYPE_REG) && (opq->param[j] == opq->reg_t[i])) - break; - } - - if(j != opq->param_num) - continue; - - /* We have found the temporary (temporarily:) fit for use */ - if((t == -1) || (opq->reg_t[i] == 32)) - t = i; - } - - return t; -} - -/* Checks if there is enough space in dp->host_page, if not grow it */ -void *enough_host_page(struct dyn_page *dp, void *cur, unsigned int *len, - unsigned int amount) -{ - unsigned int used = cur - dp->host_page; - - /* The array is long enough */ - if((used + amount) <= *len) - return cur; - - /* Reallocate */ - *len += RECED_PAGE_ENLARGE_BY; - - if(!(dp->host_page = realloc(dp->host_page, *len))) { - fprintf(stderr, "OOM\n"); - exit(1); - } - - return dp->host_page + used; -} - -/* Adds an operation to the opq */ -void add_to_opq(struct op_queue *opq, int end, int op) -{ - if(opq->num_ops == opq->ops_len) { - opq->ops_len += OPS_ENLARGE_BY; - if(!(opq->ops = realloc(opq->ops, opq->ops_len * sizeof(int)))) { - fprintf(stderr, "OOM\n"); - exit(1); - } - } - - if(end) - opq->ops[opq->num_ops] = op; - else { - /* Shift everything over by one */ - memmove(opq->ops + 1, opq->ops, opq->num_ops* sizeof(int)); - opq->ops[0] = op; - } - - opq->num_ops++; -} - -static void gen_op_mark_loc(struct op_queue *opq, int end) -{ - add_to_opq(opq, end, op_mark_loc_indx); -} - -/* Adds a parameter to the opq */ -void add_to_op_params(struct op_queue *opq, int end, unsigned long param) -{ - if(opq->num_ops_param == opq->ops_param_len) { - opq->ops_param_len += OPS_ENLARGE_BY; - if(!(opq->ops_param = realloc(opq->ops_param, opq->ops_param_len * sizeof(int)))) { - fprintf(stderr, "OOM\n"); - exit(1); - } - } - - if(end) - opq->ops_param[opq->num_ops_param] = param; - else { - /* Shift everything over by one */ - memmove(opq->ops_param + 1, opq->ops_param, opq->num_ops_param); - opq->ops_param[0] = param; - } - - opq->num_ops_param++; -} - -/* Initialises the recompiler */ -void init_dyn_recomp(void) -{ - struct sigaction sigact; - struct op_queue *opq = NULL; - unsigned int i; - - cpu_state.opqs = NULL; - - /* Allocate the operation queue list (+1 for the page chaining) */ - for(i = 0; i < (immu_state->pagesize / 4) + 1; i++) { - if(!(opq = malloc(sizeof(struct op_queue)))) { - fprintf(stderr, "OOM\n"); - exit(1); - } - - /* initialise some fields */ - opq->ops_len = 0; - opq->ops = NULL; - opq->ops_param_len = 0; - opq->ops_param = NULL; - opq->xref = 0; - - if(cpu_state.opqs) - cpu_state.opqs->prev = opq; - - opq->next = cpu_state.opqs; - cpu_state.opqs = opq; - } - - opq->prev = NULL; - - cpu_state.curr_page = NULL; - if(!(cpu_state.dyn_pages = malloc(sizeof(void *) * (2 << (32 - - immu_state->pagesize_log2))))) { - fprintf(stderr, "OOM\n"); - exit(1); - } - memset(cpu_state.dyn_pages, 0, - sizeof(void *) * (2 << (32 - immu_state->pagesize_log2))); - - /* Register our segmentation fault handler */ - sigact.sa_sigaction = dyn_sigsegv_debug; - memset(&sigact.sa_mask, 0, sizeof(sigact.sa_mask)); - sigact.sa_flags = SA_SIGINFO | SA_NOMASK; - if(sigaction(SIGSEGV, &sigact, NULL)) - printf("WARN: Unable to install SIGSEGV handler! Don't expect to be able to debug the recompiler.\n"); - - /* FIXME: Find a better place for this */ - { /* Needed by execution */ - extern int do_stats; - do_stats = config.cpu.dependstats || config.cpu.superscalar || config.cpu.dependstats - || config.sim.history || config.sim.exe_log; - } - - printf("Recompile engine up and running\n"); -} - -/* Parses instructions and their operands and populates opq with them */ -static void eval_insn_ops(struct op_queue *opq, oraddr_t addr) -{ - int breakp; - struct insn_op_struct *opd; - - for(; opq->next; opq = opq->next, addr += 4) { - opq->param_num = 0; - breakp = 0; - opq->insn = eval_insn(addr, &breakp); - - /* FIXME: If a breakpoint is set at this location, insert exception code */ - if(breakp) { - fprintf(stderr, "FIXME: Insert breakpoint code\n"); - } - - opq->insn_index = insn_decode(opq->insn); - - if(opq->insn_index == -1) - continue; - - opd = op_start[opq->insn_index]; - - do { - opq->param[opq->param_num] = eval_operand_val(opq->insn, opd); - opq->param_type[opq->param_num] = opd->type; - - opq->param_num++; - while(!(opd->type & OPTYPE_OP)) opd++; - } while(!(opd++->type & OPTYPE_LAST)); - } -} - -/* Adds code to the opq for the instruction pointed to by addr */ -static void recompile_insn(struct op_queue *opq, int delay_insn) -{ - int j, k; - int param_t[5]; /* Which temporary the parameters reside in */ - - /* Check if we have an illegal instruction */ - if(opq->insn_index == -1) { - gen_l_invalid(opq, NULL, delay_insn); - return; - } - - /* If we are recompileing an instruction that has a delay slot and is in the - * delay slot, ignore it. This is undefined behavour. */ - if(delay_insn && (or32_opcodes[opq->insn_index].flags & OR32_IF_DELAY)) - return; - - param_t[0] = T_NONE; - param_t[1] = T_NONE; - param_t[2] = T_NONE; - param_t[3] = T_NONE; - param_t[4] = T_NONE; - - /* Jump instructions are special since they have a delay slot and thus they - * need to control the exact operation sequence. Special case these here to - * avoid haveing loads of if(!(.& OR32_IF_DELAY)) below */ - if(or32_opcodes[opq->insn_index].flags & OR32_IF_DELAY) { - /* Jump instructions don't have a disposition */ - or32_opcodes[opq->insn_index].exec(opq, param_t, delay_insn); - - /* Analysis is done by the individual jump instructions */ - /* Jump instructions don't touch runtime.sim.mem_cycles */ - /* Jump instructions run their own scheduler */ - return; - } - - /* Before an exception takes place, all registers must be stored. */ - if((or32_opcodes[opq->insn_index].func_unit == it_exception)) { - ship_gprs_out_t(opq); - - or32_opcodes[opq->insn_index].exec(opq, param_t, delay_insn); - return; - } - - for(j = 0; j < opq->param_num; j++) { - if(!(opq->param_type[j] & OPTYPE_REG)) - continue; - - /* Never, ever, move r0 into a temporary */ - if(!opq->param[j]) - continue; - - k = find_t(opq, opq->param[j]); - - param_t[j] = k; - - if(opq->reg_t[k] == opq->param[j]) { - if(!(opq->param_type[j] & OPTYPE_DST) && - !(opq->tflags[k] & TFLAG_SOURCED)) { - gen_op_move_t_gpr[k][opq->reg_t[k]](opq, 0); - opq->tflags[k] |= TFLAG_SOURCED; - } - - if(opq->param_type[j] & OPTYPE_DST) - opq->tflags[k] |= TFLAG_DST; - else - opq->tflags[k] |= TFLAG_SRC; - - continue; - } - - if(opq->reg_t[k] < 32) { - /* Only ship the temporary out if it has been used as a destination - * register */ - ship_t_out(opq, k); - } - - if(opq->param_type[j] & OPTYPE_DST) - opq->tflags[k] = TFLAG_DST; - else - opq->tflags[k] = TFLAG_SRC; - - opq->reg_t[k] = opq->param[j]; - - /* Only generate code to move the register into a temporary if it is used as - * a source operand */ - if(!(opq->param_type[j] & OPTYPE_DST)) { - gen_op_move_t_gpr[k][opq->reg_t[k]](opq, 0); - opq->tflags[k] |= TFLAG_SOURCED; - } - } - - /* To get the execution log correct for instructions like l.lwz r4,0(r4) the - * effective address needs to be calculated before the instruction is - * simulated */ - if(do_stats) { - for(j = 0; j < opq->param_num; j++) { - if(!(opq->param_type[j] & OPTYPE_DIS)) - continue; - - if(!opq->param[j + 1]) - gen_op_store_insn_ea(opq, 1, opq->param[j]); - else - calc_insn_ea_table[param_t[j + 1]](opq, 1, opq->param[j]); - } - } - - or32_opcodes[opq->insn_index].exec(opq, param_t, delay_insn); - - if(do_stats) { - ship_gprs_out_t(opq); - gen_op_analysis(opq, 1); - } - - /* The call to join_mem_cycles() could be put into the individual operations - * that emulate the load/store instructions, but then it would be added to - * the cycle counter before analysis() is called, which is not how the complex - * execution model does it. */ - if((or32_opcodes[opq->insn_index].func_unit == it_load) || - (or32_opcodes[opq->insn_index].func_unit == it_store)) - gen_op_join_mem_cycles(opq, 1); - - /* Delay slot instructions get a special scheduler, thus don't generate it - * here */ - if(!delay_insn) - gen_op_do_sched(opq, 1); -} - -/* Recompiles the page associated with *dyn */ -void recompile_page(struct dyn_page *dyn) -{ - unsigned int j; - struct op_queue *opq = cpu_state.opqs; - oraddr_t rec_addr = dyn->or_page; - oraddr_t rec_page = dyn->or_page; - void **loc; - - /* The start of the next page */ - rec_page += immu_state->pagesize; - - printf("Recompileing page %"PRIxADDR"\n", rec_addr); - fflush(stdout); - - /* Mark all temporaries as not containing a register */ - for(j = 0; j < NUM_T_REGS; j++) { - opq->reg_t[j] = 32; /* Out-of-range registers */ - opq->tflags[j] = 0; - } - - dyn->delayr = -verify_memoryarea(rec_addr)->ops.delayr; - - opq->num_ops = 0; - opq->num_ops_param = 0; - - eval_insn_ops(opq, rec_addr); - - /* Insert code to check if the first instruction is exeucted in a delay slot*/ - gen_op_check_delay_slot(opq, 1, 0); - recompile_insn(opq, 1); - ship_gprs_out_t(opq); - gen_op_do_sched_delay(opq, 1); - gen_op_clear_delay_insn(opq, 1); - gen_op_do_jump_delay(opq, 1); - gen_op_do_jump(opq, 1); - gen_op_mark_loc(opq, 1); - - for(j = 0; j < NUM_T_REGS; j++) - opq->reg_t[j] = 32; /* Out-of-range registers */ - - for(; rec_addr < rec_page; rec_addr += 4, opq = opq->next) { - if(opq->prev) { - opq->num_ops = 0; - opq->num_ops_param = 0; - } - opq->jump_local = -1; - opq->not_jump_loc = -1; - - opq->insn_addr = rec_addr; - - for(j = 0; j < NUM_T_REGS; j++) - opq->tflags[j] = TFLAG_SOURCED; - - /* Check if this location is cross referenced */ - if(opq->xref) { - /* If the current address is cross-referenced, the temporaries shall be - * in an undefined state, so we must assume that no registers reside in - * them */ - /* Ship out the current set of registers from the temporaries */ - if(opq->prev) { - ship_gprs_out_t(opq->prev); - for(j = 0; j < NUM_T_REGS; j++) { - opq->reg_t[j] = 32; - opq->prev->reg_t[j] = 32; - } - } - } - - recompile_insn(opq, 0); - - /* Store the state of the temporaries */ - memcpy(opq->next->reg_t, opq->reg_t, sizeof(opq->reg_t)); - } - - dyn->dirty = 0; - - /* Ship temporaries out to the corrisponding registers */ - ship_gprs_out_t(opq->prev); - - opq->num_ops = 0; - opq->num_ops_param = 0; - opq->not_jump_loc = -1; - opq->jump_local = -1; - - /* Insert code to jump to the next page */ - gen_op_do_jump(opq, 1); - - /* Generate the code */ - gen_code(cpu_state.opqs, dyn); - - /* Fix up the locations */ - for(loc = dyn->locs; loc < &dyn->locs[immu_state->pagesize / 4]; loc++) - *loc += (unsigned int)dyn->host_page; - - cpu_state.opqs->ops_param[0] += (unsigned int)dyn->host_page; - - /* Search for page-local jumps */ - opq = cpu_state.opqs; - for(j = 0; j < (immu_state->pagesize / 4); opq = opq->next, j++) { - if(opq->jump_local != -1) - opq->ops_param[opq->jump_local] = - (unsigned int)dyn->locs[opq->jump_local_loc >> 2]; - - if(opq->not_jump_loc != -1) - opq->ops_param[opq->not_jump_loc] = (unsigned int)dyn->locs[j + 1]; - - /* Store the state of the temporaries into dyn->ts_bound */ - dyn->ts_bound[j] = 0; - if(opq->reg_t[0] < 32) - dyn->ts_bound[j] = opq->reg_t[0]; - if(opq->reg_t[1] < 32) - dyn->ts_bound[j] |= opq->reg_t[1] << 5; - if(opq->reg_t[2] < 32) - dyn->ts_bound[j] |= opq->reg_t[2] << 10; - - /* Reset for the next page to be recompiled */ - opq->xref = 0; - } - - /* Patch the relocations */ - patch_relocs(cpu_state.opqs, dyn->host_page); - - if(do_stats) { - opq = cpu_state.opqs; - for(j = 0; j < (immu_state->pagesize / 4); j++, opq = opq->next) { - dyn->insns[j] = opq->insn; - dyn->insn_indexs[j] = opq->insn_index; - } - } - - /* FIXME: Fix the issue below in a more elegent way */ - /* Since eval_insn is called to get the instruction, runtime.sim.mem_cycles is - * updated but the recompiler expectes it to start a 0, so reset it */ - runtime.sim.mem_cycles = 0; -} - -/* Recompiles a delay-slot instruction (opq is the opq of the instruction - * haveing the delay-slot) */ -static void recompile_delay_insn(struct op_queue *opq) -{ - struct op_queue delay_opq; - int i; - - /* Setup a fake opq that looks very much like the delay slot instruction */ - memcpy(&delay_opq, opq, sizeof(struct op_queue)); - /* `Fix' a couple of bits */ - for(i = 0; i < NUM_T_REGS; i++) - delay_opq.tflags[i] = TFLAG_SOURCED; - delay_opq.insn_index = opq->next->insn_index; - memcpy(delay_opq.param_type, opq->next->param_type, sizeof(delay_opq.param_type)); - memcpy(delay_opq.param, opq->next->param, sizeof(delay_opq.param)); - delay_opq.param_num = opq->next->param_num; - delay_opq.insn = opq->next->insn; - - delay_opq.xref = 0; - delay_opq.insn_addr = opq->insn_addr + 4; - delay_opq.prev = opq->prev; - delay_opq.next = NULL; - - /* Generate the delay slot instruction */ - recompile_insn(&delay_opq, 1); - - ship_gprs_out_t(&delay_opq); - - opq->num_ops = delay_opq.num_ops; - opq->ops_len = delay_opq.ops_len; - opq->ops = delay_opq.ops; - opq->num_ops_param = delay_opq.num_ops_param; - opq->ops_param_len = delay_opq.ops_param_len; - opq->ops_param = delay_opq.ops_param; - - for(i = 0; i < NUM_T_REGS; i++) - opq->reg_t[i] = 32; -} - -/* Returns non-zero if the jump is into this page, 0 otherwise */ -static int find_jump_loc(oraddr_t j_ea, struct op_queue *opq) -{ - int i; - - /* Mark the jump as non page local if the delay slot instruction is on the - * next page to the jump instruction. This should not be needed */ - if(IADDR_PAGE(j_ea) != IADDR_PAGE(opq->insn_addr)) - /* We can't do anything as the j_ea (as passed to find_jump_loc) is a - * VIRTUAL offset and the next physical page may not be the next VIRTUAL - * page */ - return 0; - - /* The jump is into the page currently undergoing dynamic recompilation */ - - /* If we haven't got to the location of the jump, everything is ok */ - if(j_ea > opq->insn_addr) { - /* Find the corissponding opq and mark it as cross referenced */ - for(i = (j_ea - opq->insn_addr) / 4; i; i--) - opq = opq->next; - opq->xref = 1; - return 1; - } - - /* Insert temporary -> register code before the jump ea and register -> - * temporary at the x-ref address */ - for(i = (opq->insn_addr - j_ea) / 4; i; i--) - opq = opq->prev; - - if(!opq->prev) - /* We're at the begining of a page, no need to do anything */ - return 1; - - /* Found location, insert code */ - - ship_gprs_out_t(opq->prev); - - for(i = 0; i < NUM_T_REGS; i++) { - if(opq->prev->reg_t[i] < 32) - /* FIXME: Ship temporaries in the begining of the opq that needs it */ - gen_op_move_t_gpr[i][opq->prev->reg_t[i]](opq, 0); - } - - opq->xref = 1; - - return 1; -} - -static void gen_j_imm(struct op_queue *opq, oraddr_t off) -{ - int jump_local; - - off <<= 2; - - if(IADDR_PAGE(opq->insn_addr) != IADDR_PAGE(opq->insn_addr + 4)) { - gen_op_set_pc_delay_imm(opq, 1, off); - gen_op_do_sched(opq, 1); - return; - } - - jump_local = find_jump_loc(opq->insn_addr + off, opq); - - gen_op_set_delay_insn(opq, 1); - gen_op_do_sched(opq, 1); - - recompile_delay_insn(opq); - - gen_op_add_pc(opq, 1, (orreg_t)off - 8); - gen_op_clear_delay_insn(opq, 1); - gen_op_do_sched_delay(opq, 1); - - if(jump_local) { - gen_op_jmp_imm(opq, 1, 0); - opq->jump_local = opq->num_ops_param - 1; - opq->jump_local_loc = (opq->insn_addr + (orreg_t)off) & immu_state->page_offset_mask; - } else - gen_op_do_jump(opq, 1); -} - -static const generic_gen_op set_pc_delay_gpr[32] = { - NULL, - gen_op_move_gpr1_pc_delay, - gen_op_move_gpr2_pc_delay, - gen_op_move_gpr3_pc_delay, - gen_op_move_gpr4_pc_delay, - gen_op_move_gpr5_pc_delay, - gen_op_move_gpr6_pc_delay, - gen_op_move_gpr7_pc_delay, - gen_op_move_gpr8_pc_delay, - gen_op_move_gpr9_pc_delay, - gen_op_move_gpr10_pc_delay, - gen_op_move_gpr11_pc_delay, - gen_op_move_gpr12_pc_delay, - gen_op_move_gpr13_pc_delay, - gen_op_move_gpr14_pc_delay, - gen_op_move_gpr15_pc_delay, - gen_op_move_gpr16_pc_delay, - gen_op_move_gpr17_pc_delay, - gen_op_move_gpr18_pc_delay, - gen_op_move_gpr19_pc_delay, - gen_op_move_gpr20_pc_delay, - gen_op_move_gpr21_pc_delay, - gen_op_move_gpr22_pc_delay, - gen_op_move_gpr23_pc_delay, - gen_op_move_gpr24_pc_delay, - gen_op_move_gpr25_pc_delay, - gen_op_move_gpr26_pc_delay, - gen_op_move_gpr27_pc_delay, - gen_op_move_gpr28_pc_delay, - gen_op_move_gpr29_pc_delay, - gen_op_move_gpr30_pc_delay, - gen_op_move_gpr31_pc_delay }; - -static void gen_j_reg(struct op_queue *opq, unsigned int gpr) -{ - int i; - - /* Ship the jump-to register out (if it exists). It requires special - * handleing */ - for(i = 0; i < NUM_T_REGS; i++) { - if(opq->reg_t[i] == opq->param[0]) - /* Ship temporary out in the last opq that used it */ - ship_t_out(opq, i); - } - - if(do_stats) - gen_op_analysis(opq, 1); - - if(!gpr) - gen_op_clear_pc_delay(opq, 1); - else - set_pc_delay_gpr[gpr](opq, 1); - - gen_op_do_sched(opq, 1); - - if(IADDR_PAGE(opq->insn_addr) != IADDR_PAGE(opq->insn_addr + 4)) - return; - - recompile_delay_insn(opq); - - gen_op_set_pc_pc_delay(opq, 1); - gen_op_clear_delay_insn(opq, 1); - gen_op_do_sched_delay(opq, 1); - - gen_op_do_jump_delay(opq, 1); - gen_op_do_jump(opq, 1); -} - -/*------------------------------[ Operation generation for an instruction ]---*/ -/* FIXME: Flag setting is not done in any instruction */ -/* FIXME: Since r0 is not moved into a temporary, check all arguments below! */ - -DEF_1T_OP(generic_gen_op, clear_t, gen_op_clear); -DEF_2T_OP_NEQ(generic_gen_op, move_t_t, gen_op_move); -DEF_1T_OP(imm_gen_op, mov_t_imm, gen_op_imm); - -DEF_2T_OP(imm_gen_op, l_add_imm_t_table, gen_op_add_imm); -DEF_3T_OP(generic_gen_op, l_add_t_table, gen_op_add); - -void gen_l_add(struct op_queue *opq, int param_t[3], int delay_slot) -{ - if(!opq->param[0]) - /* Screw this, the operation shall do nothing */ - return; - - if(!opq->param[1] && !opq->param[2]) { - /* Just clear param_t[0] */ - clear_t[param_t[0]](opq, 1); - return; - } - - if(!opq->param[2]) { - if(opq->param[0] != opq->param[1]) - /* This just moves a register */ - move_t_t[param_t[0]][param_t[1]](opq, 1); - return; - } - - if(!opq->param[1]) { - /* Check if we are moveing an immediate */ - if(param_t[2] == T_NONE) { - /* Yep, an immediate */ - mov_t_imm[param_t[0]](opq, 1, opq->param[2]); - return; - } - /* Just another move */ - if(opq->param[0] != opq->param[2]) - move_t_t[param_t[0]][param_t[2]](opq, 1); - return; - } - - /* Ok, This _IS_ an add... */ - if(param_t[2] == T_NONE) - /* immediate */ - l_add_imm_t_table[param_t[0]][param_t[1]](opq, 1, opq->param[2]); - else - l_add_t_table[param_t[0]][param_t[1]][param_t[2]](opq, 1); -} - -DEF_3T_OP(generic_gen_op, l_addc_t_table, gen_op_addc); - -void gen_l_addc(struct op_queue *opq, int param_t[3], int delay_slot) -{ - if(!opq->param[0]) - /* Screw this, the operation shall do nothing */ - return; - - /* FIXME: More optimisations !! (...and immediate...) */ - l_addc_t_table[param_t[0]][param_t[1]][param_t[2]](opq, 1); -} - -DEF_2T_OP(imm_gen_op, l_and_imm_t_table, gen_op_and_imm); -DEF_3T_OP_NEQ(generic_gen_op, l_and_t_table, gen_op_and); - -void gen_l_and(struct op_queue *opq, int param_t[3], int delay_slot) -{ - if(!opq->param[0]) - /* Screw this, the operation shall do nothing */ - return; - - if(!opq->param[1] || !opq->param[2]) { - /* Just clear param_t[0] */ - clear_t[param_t[0]](opq, 1); - return; - } - - if((opq->param[0] == opq->param[1]) && - (opq->param[0] == opq->param[2]) && - (param_t[2] != T_NONE)) - return; - - if(param_t[2] == T_NONE) - l_and_imm_t_table[param_t[0]][param_t[1]](opq, 1, opq->param[2]); - else - l_and_t_table[param_t[0]][param_t[1]][param_t[2]](opq, 1); -} - -void gen_l_bf(struct op_queue *opq, int param_t[3], int delay_slot) -{ - if(do_stats) - /* All gprs are current since this insn doesn't touch any reg */ - gen_op_analysis(opq, 1); - - /* The temporaries are expected to be shiped out after the execution of the - * branch instruction wether it branched or not */ - ship_gprs_out_t(opq->prev); - - if(IADDR_PAGE(opq->insn_addr) != IADDR_PAGE(opq->insn_addr + 4)) { - gen_op_check_flag_delay(opq, 1, opq->param[0] << 2); - gen_op_do_sched(opq, 1); - opq->not_jump_loc = -1; - return; - } - - gen_op_check_flag(opq, 1, 0); - opq->not_jump_loc = opq->num_ops_param - 1; - - gen_j_imm(opq, opq->param[0]); -} - -void gen_l_bnf(struct op_queue *opq, int param_t[3], int delay_slot) -{ - if(do_stats) - /* All gprs are current since this insn doesn't touch any reg */ - gen_op_analysis(opq, 1); - - /* The temporaries are expected to be shiped out after the execution of the - * branch instruction wether it branched or not */ - ship_gprs_out_t(opq->prev); - - if(IADDR_PAGE(opq->insn_addr) != IADDR_PAGE(opq->insn_addr + 4)) { - gen_op_check_not_flag_delay(opq, 1, opq->param[0] << 2); - gen_op_do_sched(opq, 1); - opq->not_jump_loc = -1; - return; - } - - gen_op_check_not_flag(opq, 1, 0); - opq->not_jump_loc = opq->num_ops_param - 1; - - gen_j_imm(opq, opq->param[0]); -} - -DEF_3T_OP_NEQ(generic_gen_op, l_cmov_t_table, gen_op_cmov); - -/* FIXME: Check if either opperand 1 or 2 is r0 */ -void gen_l_cmov(struct op_queue *opq, int param_t[3], int delay_slot) -{ - if(!opq->param[0]) - return; - - if(!opq->param[1] && !opq->param[2]) { - clear_t[param_t[0]](opq, 1); - return; - } - - if((opq->param[1] == opq->param[2]) && (opq->param[0] == opq->param[1])) - return; - - if(opq->param[1] == opq->param[2]) { - move_t_t[param_t[0]][param_t[1]](opq, 1); - return; - } - - l_cmov_t_table[param_t[0]][param_t[1]][param_t[2]](opq, 1); -} - -void gen_l_cust1(struct op_queue *opq, int param_t[3], int delay_slot) -{ -} - -void gen_l_cust2(struct op_queue *opq, int param_t[3], int delay_slot) -{ -} - -void gen_l_cust3(struct op_queue *opq, int param_t[3], int delay_slot) -{ -} - -void gen_l_cust4(struct op_queue *opq, int param_t[3], int delay_slot) -{ -} - -void gen_l_cust5(struct op_queue *opq, int param_t[3], int delay_slot) -{ -} - -void gen_l_cust6(struct op_queue *opq, int param_t[3], int delay_slot) -{ -} - -void gen_l_cust7(struct op_queue *opq, int param_t[3], int delay_slot) -{ -} - -void gen_l_cust8(struct op_queue *opq, int param_t[3], int delay_slot) -{ -} - -/* FIXME: All registers need to be stored before the div instructions as they - * have the potenticial to cause an exception */ - -DEF_1T_OP(generic_gen_op, check_null_excpt, gen_op_check_null_except); -DEF_1T_OP(generic_gen_op, check_null_excpt_delay, gen_op_check_null_except_delay); -DEF_3T_OP(generic_gen_op, l_div_t_table, gen_op_div); - -void gen_l_div(struct op_queue *opq, int param_t[3], int delay_slot) -{ - if(!opq->param[2]) { - /* There is no option. This _will_ cause an illeagal exception */ - if(!delay_slot) { - gen_op_illegal(opq, 1); - gen_op_do_jump(opq, 1); - } else { - gen_op_illegal(opq, 1); - gen_op_do_jump(opq, 1); - } - return; - } - - if(!delay_slot) - check_null_excpt[param_t[2]](opq, 1); - else - check_null_excpt_delay[param_t[2]](opq, 1); - - if(!opq->param[0]) - return; - - if(!opq->param[1]) { - /* Clear param_t[0] */ - clear_t[param_t[0]](opq, 1); - return; - } - - l_div_t_table[param_t[0]][param_t[1]][param_t[2]](opq, 1); -} - -DEF_3T_OP(generic_gen_op, l_divu_t_table, gen_op_divu); - -void gen_l_divu(struct op_queue *opq, int param_t[3], int delay_slot) -{ - if(!opq->param[2]) { - /* There is no option. This _will_ cause an illeagal exception */ - if(!delay_slot) { - gen_op_illegal(opq, 1); - gen_op_do_jump(opq, 1); - } else { - gen_op_illegal(opq, 1); - gen_op_do_jump(opq, 1); - } - return; - } - - if(!delay_slot) - check_null_excpt[param_t[2]](opq, 1); - else - check_null_excpt_delay[param_t[2]](opq, 1); - - if(!opq->param[0]) - return; - - if(!opq->param[1]) { - /* Clear param_t[0] */ - clear_t[param_t[0]](opq, 1); - return; - } - - l_divu_t_table[param_t[0]][param_t[1]][param_t[2]](opq, 1); -} - -DEF_2T_OP(generic_gen_op, l_extbs_t_table, gen_op_extbs); - -void gen_l_extbs(struct op_queue *opq, int param_t[3], int delay_slot) -{ - if(!opq->param[0]) - return; - - if(!opq->param[1]) { - clear_t[param_t[0]](opq, 1); - return; - } - - l_extbs_t_table[param_t[0]][param_t[1]](opq, 1); -} - -DEF_2T_OP(generic_gen_op, l_extbz_t_table, gen_op_extbz); - -void gen_l_extbz(struct op_queue *opq, int param_t[3], int delay_slot) -{ - if(!opq->param[0]) - return; - - if(!opq->param[1]) { - clear_t[param_t[0]](opq, 1); - return; - } - - l_extbz_t_table[param_t[0]][param_t[1]](opq, 1); -} - -DEF_2T_OP(generic_gen_op, l_exths_t_table, gen_op_exths); - -void gen_l_exths(struct op_queue *opq, int param_t[3], int delay_slot) -{ - if(!opq->param[0]) - return; - - if(!opq->param[1]) { - clear_t[param_t[0]](opq, 1); - return; - } - - l_exths_t_table[param_t[0]][param_t[1]](opq, 1); -} - -DEF_2T_OP(generic_gen_op, l_exthz_t_table, gen_op_exthz); - -void gen_l_exthz(struct op_queue *opq, int param_t[3], int delay_slot) -{ - if(!opq->param[0]) - return; - - if(!opq->param[1]) { - clear_t[param_t[0]](opq, 1); - return; - } - - l_exthz_t_table[param_t[0]][param_t[1]](opq, 1); -} - -void gen_l_extws(struct op_queue *opq, int param_t[3], int delay_slot) -{ - if(!opq->param[0]) - return; - - if(!opq->param[1]) { - clear_t[param_t[0]](opq, 1); - return; - } - - if(opq->param[0] == opq->param[1]) - return; - - /* In the 32-bit architechture this instruction reduces to a move */ - move_t_t[param_t[0]][param_t[1]](opq, 1); -} - -void gen_l_extwz(struct op_queue *opq, int param_t[3], int delay_slot) -{ - if(!opq->param[0]) - return; - - if(!opq->param[1]) { - clear_t[param_t[0]](opq, 1); - return; - } - - if(opq->param[0] == opq->param[1]) - return; - - /* In the 32-bit architechture this instruction reduces to a move */ - move_t_t[param_t[0]][param_t[1]](opq, 1); -} - -DEF_2T_OP(generic_gen_op, l_ff1_t_table, gen_op_ff1); - -void gen_l_ff1(struct op_queue *opq, int param_t[3], int delay_slot) -{ - if(!opq->param[0]) - return; - - if(!opq->param[1]) { - clear_t[param_t[0]](opq, 1); - return; - } - - l_ff1_t_table[param_t[0]][param_t[1]](opq, 1); -} - -void gen_l_j(struct op_queue *opq, int param_t[3], int delay_slot) -{ - if(do_stats) - /* All gprs are current since this insn doesn't touch any reg */ - gen_op_analysis(opq, 1); - - gen_j_imm(opq, opq->param[0]); -} - -void gen_l_jal(struct op_queue *opq, int param_t[3], int delay_slot) -{ - int i; - - /* In the case of a l.jal instruction, make sure that LINK_REGNO is not in - * a temporary. The problem is that the l.jal(r) instruction stores the - * `return address' in LINK_REGNO. The temporaries are shiped out only - * after the delay slot instruction has executed and so it overwrittes the - * `return address'. */ - for(i = 0; i < NUM_T_REGS; i++) { - if(opq->reg_t[i] == LINK_REGNO) { - /* Don't bother storeing the register, it is going to get clobered in this - * instruction anyway */ - opq->reg_t[i] = 32; - break; - } - } - - /* Store the return address */ - gen_op_store_link_addr_gpr(opq, 1); - - if(do_stats) - /* All gprs are current since this insn doesn't touch any reg */ - gen_op_analysis(opq, 1); - - gen_j_imm(opq, opq->param[0]); -} - -void gen_l_jr(struct op_queue *opq, int param_t[3], int delay_slot) -{ - gen_j_reg(opq, opq->param[0]); -} - -void gen_l_jalr(struct op_queue *opq, int param_t[3], int delay_slot) -{ - int i; - - /* In the case of a l.jal instruction, make sure that LINK_REGNO is not in - * a temporary. The problem is that the l.jal(r) instruction stores the - * `return address' in LINK_REGNO. The temporaries are shiped out only - * after the delay slot instruction has executed and so it overwrittes the - * `return address'. */ - for(i = 0; i < NUM_T_REGS; i++) { - if(opq->reg_t[i] == LINK_REGNO) { - /* Don't bother storeing the register, it is going to get clobered in this - * instruction anyway */ - opq->reg_t[i] = 32; - break; - } - } - - /* Store the return address */ - gen_op_store_link_addr_gpr(opq, 1); - - gen_j_reg(opq, opq->param[0]); -} - -/* FIXME: Optimise all load instruction when the disposition == 0 */ - -DEF_1T_OP(imm_gen_op, l_lbs_imm_t_table, gen_op_lbs_imm); -DEF_2T_OP(imm_gen_op, l_lbs_t_table, gen_op_lbs); - -void gen_l_lbs(struct op_queue *opq, int param_t[3], int delay_slot) -{ - if(!opq->param[0]) { - /* FIXME: This will work, but the statistics need to be updated... */ - return; - } - - /* Just in case an exception happens */ - ship_gprs_out_t(opq->prev); - - if(!opq->param[2]) { - /* Load the data from the immediate */ - l_lbs_imm_t_table[param_t[0]](opq, 1, opq->param[1]); - return; - } - - l_lbs_t_table[param_t[0]][param_t[2]](opq, 1, opq->param[1]); -} - -DEF_1T_OP(imm_gen_op, l_lbz_imm_t_table, gen_op_lbz_imm); -DEF_2T_OP(imm_gen_op, l_lbz_t_table, gen_op_lbz); - -void gen_l_lbz(struct op_queue *opq, int param_t[3], int delay_slot) -{ - if(!opq->param[0]) { - /* FIXME: This will work, but the statistics need to be updated... */ - return; - } - - /* Just in case an exception happens */ - ship_gprs_out_t(opq->prev); - - if(!opq->param[2]) { - /* Load the data from the immediate */ - l_lbz_imm_t_table[param_t[0]](opq, 1, opq->param[1]); - return; - } - - l_lbz_t_table[param_t[0]][param_t[2]](opq, 1, opq->param[1]); -} - -DEF_1T_OP(imm_gen_op, l_lhs_imm_t_table, gen_op_lhs_imm); -DEF_2T_OP(imm_gen_op, l_lhs_t_table, gen_op_lhs); - -void gen_l_lhs(struct op_queue *opq, int param_t[3], int delay_slot) -{ - if(!opq->param[0]) { - /* FIXME: This will work, but the statistics need to be updated... */ - return; - } - - /* Just in case an exception happens */ - ship_gprs_out_t(opq->prev); - - if(!opq->param[2]) { - /* Load the data from the immediate */ - l_lhs_imm_t_table[param_t[0]](opq, 1, opq->param[1]); - return; - } - - l_lhs_t_table[param_t[0]][param_t[2]](opq, 1, opq->param[1]); -} - -DEF_1T_OP(imm_gen_op, l_lhz_imm_t_table, gen_op_lhz_imm); -DEF_2T_OP(imm_gen_op, l_lhz_t_table, gen_op_lhz); - -void gen_l_lhz(struct op_queue *opq, int param_t[3], int delay_slot) -{ - if(!opq->param[0]) { - /* FIXME: This will work, but the statistics need to be updated... */ - return; - } - - /* Just in case an exception happens */ - ship_gprs_out_t(opq->prev); - - if(!opq->param[2]) { - /* Load the data from the immediate */ - l_lhz_imm_t_table[param_t[0]](opq, 1, opq->param[1]); - return; - } - - l_lhz_t_table[param_t[0]][param_t[2]](opq, 1, opq->param[1]); -} - -DEF_1T_OP(imm_gen_op, l_lws_imm_t_table, gen_op_lws_imm); -DEF_2T_OP(imm_gen_op, l_lws_t_table, gen_op_lws); - -void gen_l_lws(struct op_queue *opq, int param_t[3], int delay_slot) -{ - if(!opq->param[0]) { - /* FIXME: This will work, but the statistics need to be updated... */ - return; - } - - /* Just in case an exception happens */ - ship_gprs_out_t(opq->prev); - - if(!opq->param[2]) { - /* Load the data from the immediate */ - l_lws_imm_t_table[param_t[0]](opq, 1, opq->param[1]); - return; - } - - l_lws_t_table[param_t[0]][param_t[2]](opq, 1, opq->param[1]); -} - -DEF_1T_OP(imm_gen_op, l_lwz_imm_t_table, gen_op_lwz_imm); -DEF_2T_OP(imm_gen_op, l_lwz_t_table, gen_op_lwz); - -void gen_l_lwz(struct op_queue *opq, int param_t[3], int delay_slot) -{ - if(!opq->param[0]) { - /* FIXME: This will work, but the statistics need to be updated... */ - return; - } - - /* Just in case an exception happens */ - ship_gprs_out_t(opq->prev); - - if(!opq->param[2]) { - /* Load the data from the immediate */ - l_lwz_imm_t_table[param_t[0]](opq, 1, opq->param[1]); - return; - } - - l_lwz_t_table[param_t[0]][param_t[2]](opq, 1, opq->param[1]); -} - -DEF_1T_OP(imm_gen_op, l_mac_imm_t_table, gen_op_mac_imm); -DEF_2T_OP(generic_gen_op, l_mac_t_table, gen_op_mac); - -void gen_l_mac(struct op_queue *opq, int param_t[3], int delay_slot) -{ - if(!opq->param[0] || !opq->param[1]) - return; - - if(param_t[1] == T_NONE) - l_mac_imm_t_table[param_t[0]](opq, 1, opq->param[1]); - else - l_mac_t_table[param_t[0]][param_t[1]](opq, 1); -} - -DEF_1T_OP(generic_gen_op, l_macrc_t_table, gen_op_macrc); - -void gen_l_macrc(struct op_queue *opq, int param_t[3], int delay_slot) -{ - if(!opq->param[0]) { - gen_op_macc(opq, 1); - return; - } - - l_macrc_t_table[param_t[0]](opq, 1); -} - -DEF_1T_OP(imm_gen_op, l_mfspr_imm_t_table, gen_op_mfspr_imm); -DEF_2T_OP(imm_gen_op, l_mfspr_t_table, gen_op_mfspr); - -void gen_l_mfspr(struct op_queue *opq, int param_t[3], int delay_slot) -{ - if(!opq->param[0]) - return; - - if(!opq->param[1]) { - l_mfspr_imm_t_table[param_t[0]](opq, 1, opq->param[2]); - return; - } - - l_mfspr_t_table[param_t[0]][param_t[1]](opq, 1, opq->param[2]); -} - -void gen_l_movhi(struct op_queue *opq, int param_t[3], int delay_slot) -{ - if(!opq->param[0]) - return; - - if(!opq->param[1]) { - clear_t[param_t[0]](opq, 1); - return; - } - - mov_t_imm[param_t[0]](opq, 1, opq->param[1] << 16); -} - -DEF_2T_OP(generic_gen_op, l_msb_t_table, gen_op_msb); - -void gen_l_msb(struct op_queue *opq, int param_t[3], int delay_slot) -{ - if(!opq->param[0] || !opq->param[1]) - return; - - l_msb_t_table[param_t[0]][param_t[1]](opq, 1); -} - -DEF_1T_OP(imm_gen_op, l_mtspr_clear_t_table, gen_op_mtspr_clear); -DEF_1T_OP(imm_gen_op, l_mtspr_imm_t_table, gen_op_mtspr_imm); -DEF_2T_OP(imm_gen_op, l_mtspr_t_table, gen_op_mtspr); - -void gen_l_mtspr(struct op_queue *opq, int param_t[3], int delay_slot) -{ - /* Just in case an exception happens */ - ship_gprs_out_t(opq->prev); - - if(!opq->param[0]) { - if(!opq->param[1]) { - /* Clear the immediate SPR */ - gen_op_mtspr_imm_clear(opq, 1, opq->param[2]); - return; - } - l_mtspr_imm_t_table[param_t[1]](opq, 1, opq->param[2]); - return; - } - - if(!opq->param[1]) { - l_mtspr_clear_t_table[param_t[0]](opq, 1, opq->param[2]); - return; - } - - l_mtspr_t_table[param_t[0]][param_t[1]](opq, 1, opq->param[2]); -} - -DEF_2T_OP(imm_gen_op, l_mul_imm_t_table, gen_op_mul_imm); -DEF_3T_OP(generic_gen_op, l_mul_t_table, gen_op_mul); - -void gen_l_mul(struct op_queue *opq, int param_t[3], int delay_slot) -{ - if(!opq->param[0]) - return; - - if(!opq->param[1] || !opq->param[2]) { - clear_t[param_t[0]](opq, 1); - return; - } - - if(param_t[2] == T_NONE) - l_mul_imm_t_table[param_t[0]][param_t[1]](opq, 1, opq->param[2]); - else - l_mul_t_table[param_t[0]][param_t[1]][param_t[2]](opq, 1); -} - -DEF_3T_OP(generic_gen_op, l_mulu_t_table, gen_op_mulu); - -void gen_l_mulu(struct op_queue *opq, int param_t[3], int delay_slot) -{ - if(!opq->param[0]) - return; - - if(!opq->param[1] || !opq->param[2]) { - clear_t[param_t[0]](opq, 1); - return; - } - - l_mulu_t_table[param_t[0]][param_t[1]][param_t[2]](opq, 1); -} - -void gen_l_nop(struct op_queue *opq, int param_t[3], int delay_slot) -{ - /* Do parameter switch now */ - switch(opq->param[0]) { - case NOP_NOP: - break; - case NOP_EXIT: - ship_gprs_out_t(opq->prev); - gen_op_nop_exit(opq, 1); - break; - case NOP_CNT_RESET: - gen_op_nop_reset(opq, 1); - break; - case NOP_PRINTF: - ship_gprs_out_t(opq->prev); - gen_op_nop_printf(opq, 1); - break; - case NOP_REPORT: - ship_gprs_out_t(opq->prev); - gen_op_nop_report(opq, 1); - break; - default: - if((opq->param[0] >= NOP_REPORT_FIRST) && (opq->param[0] <= NOP_REPORT_LAST)) { - ship_gprs_out_t(opq->prev); - gen_op_nop_report_imm(opq, 1, opq->param[0] - NOP_REPORT_FIRST); - } - break; - } -} - -DEF_2T_OP(imm_gen_op, l_or_imm_t_table, gen_op_or_imm); -DEF_3T_OP_NEQ(generic_gen_op, l_or_t_table, gen_op_or); - -void gen_l_or(struct op_queue *opq, int param_t[3], int delay_slot) -{ - if(!opq->param[0]) - return; - - if((opq->param[0] == opq->param[1]) && - (opq->param[0] == opq->param[2]) && - (param_t[2] != T_NONE)) - return; - - if(!opq->param[1] && !opq->param[2]) { - clear_t[param_t[0]](opq, 1); - return; - } - - if(!opq->param[2]) { - if((param_t[2] == T_NONE) && (opq->param[0] == opq->param[1])) - return; - move_t_t[param_t[0]][param_t[1]](opq, 1); - return; - } - - if(!opq->param[1]) { - /* Check if we are moveing an immediate */ - if(param_t[2] == T_NONE) { - /* Yep, an immediate */ - mov_t_imm[param_t[0]](opq, 1, opq->param[2]); - return; - } - /* Just another move */ - move_t_t[param_t[0]][param_t[2]](opq, 1); - return; - } - - if(param_t[2] == T_NONE) - l_or_imm_t_table[param_t[0]][param_t[1]](opq, 1, opq->param[2]); - else - l_or_t_table[param_t[0]][param_t[1]][param_t[2]](opq, 1); -} - -void gen_l_rfe(struct op_queue *opq, int param_t[3], int delay_slot) -{ - if(do_stats) - /* All gprs are current since this insn doesn't touch any reg */ - gen_op_analysis(opq, 1); - - gen_op_prep_rfe(opq, 1); - /* FIXME: rename op_do_sched_delay */ - gen_op_do_sched_delay(opq, 1); - gen_op_do_jump(opq, 1); -} - -/* FIXME: All store instructions should be optimised when the disposition = 0 */ - -DEF_1T_OP(imm_gen_op, l_sb_clear_table, gen_op_sb_clear); -DEF_1T_OP(imm_gen_op, l_sb_imm_t_table, gen_op_sb_imm); -DEF_2T_OP(imm_gen_op, l_sb_t_table, gen_op_sb); - -void gen_l_sb(struct op_queue *opq, int param_t[3], int delay_slot) -{ - /* Just in case an exception happens */ - ship_gprs_out_t(opq->prev); - - if(!opq->param[2]) { - if(!opq->param[1]) { - gen_op_sb_clear_imm(opq, 1, opq->param[0]); - return; - } - l_sb_clear_table[param_t[1]](opq, 1, opq->param[0]); - return; - } - - if(!opq->param[1]) { - /* Store the data to the immediate */ - l_sb_imm_t_table[param_t[2]](opq, 1, opq->param[0]); - return; - } - - l_sb_t_table[param_t[1]][param_t[2]](opq, 1, opq->param[0]); -} - -DEF_1T_OP(imm_gen_op, l_sh_clear_table, gen_op_sh_clear); -DEF_1T_OP(imm_gen_op, l_sh_imm_t_table, gen_op_sh_imm); -DEF_2T_OP(imm_gen_op, l_sh_t_table, gen_op_sh); - -void gen_l_sh(struct op_queue *opq, int param_t[3], int delay_slot) -{ - /* Just in case an exception happens */ - ship_gprs_out_t(opq->prev); - - if(!opq->param[2]) { - if(!opq->param[1]) { - gen_op_sh_clear_imm(opq, 1, opq->param[0]); - return; - } - l_sh_clear_table[param_t[1]](opq, 1, opq->param[0]); - return; - } - - if(!opq->param[1]) { - /* Store the data to the immediate */ - l_sh_imm_t_table[param_t[2]](opq, 1, opq->param[0]); - return; - } - - l_sh_t_table[param_t[1]][param_t[2]](opq, 1, opq->param[0]); -} - -DEF_1T_OP(imm_gen_op, l_sw_clear_table, gen_op_sw_clear); -DEF_1T_OP(imm_gen_op, l_sw_imm_t_table, gen_op_sw_imm); -DEF_2T_OP(imm_gen_op, l_sw_t_table, gen_op_sw); - -void gen_l_sw(struct op_queue *opq, int param_t[3], int delay_slot) -{ - /* Just in case an exception happens */ - ship_gprs_out_t(opq->prev); - - if(!opq->param[2]) { - if(!opq->param[1]) { - gen_op_sw_clear_imm(opq, 1, opq->param[0]); - return; - } - l_sw_clear_table[param_t[1]](opq, 1, opq->param[0]); - return; - } - - if(!opq->param[1]) { - /* Store the data to the immediate */ - l_sw_imm_t_table[param_t[2]](opq, 1, opq->param[0]); - return; - } - - l_sw_t_table[param_t[1]][param_t[2]](opq, 1, opq->param[0]); -} - -DEF_1T_OP(generic_gen_op, l_sfeq_null_t_table, gen_op_sfeq_null); -DEF_1T_OP(imm_gen_op, l_sfeq_imm_t_table, gen_op_sfeq_imm); -DEF_2T_OP(generic_gen_op, l_sfeq_t_table, gen_op_sfeq); - -void gen_l_sfeq(struct op_queue *opq, int param_t[3], int delay_slot) -{ - if(!opq->param[0] && !opq->param[1]) { - gen_op_set_flag(opq, 1); - return; - } - - if(!opq->param[0]) { - if(param_t[1] == T_NONE) { - if(!opq->param[1]) - gen_op_set_flag(opq, 1); - else - gen_op_clear_flag(opq, 1); - } else - l_sfeq_null_t_table[param_t[1]](opq, 1); - return; - } - - if(!opq->param[1]) { - l_sfeq_null_t_table[param_t[0]](opq, 1); - return; - } - - if(param_t[1] == T_NONE) - l_sfeq_imm_t_table[param_t[0]](opq, 1, opq->param[1]); - else - l_sfeq_t_table[param_t[0]][param_t[1]](opq, 1); -} - -DEF_1T_OP(generic_gen_op, l_sfges_null_t_table, gen_op_sfges_null); -DEF_1T_OP(generic_gen_op, l_sfles_null_t_table, gen_op_sfles_null); -DEF_1T_OP(imm_gen_op, l_sfges_imm_t_table, gen_op_sfges_imm); -DEF_2T_OP(generic_gen_op, l_sfges_t_table, gen_op_sfges); - -void gen_l_sfges(struct op_queue *opq, int param_t[3], int delay_slot) -{ - if(!opq->param[0] && !opq->param[1]) { - gen_op_set_flag(opq, 1); - return; - } - - if(!opq->param[0]) { - /* sfles IS correct */ - if(param_t[1] == T_NONE) { - if(0 >= (orreg_t)opq->param[1]) - gen_op_set_flag(opq, 1); - else - gen_op_clear_flag(opq, 1); - } else - l_sfles_null_t_table[param_t[1]](opq, 1); - return; - } - - if(!opq->param[1]) { - l_sfges_null_t_table[param_t[0]](opq, 1); - return; - } - - if(param_t[1] == T_NONE) - l_sfges_imm_t_table[param_t[0]](opq, 1, opq->param[1]); - else - l_sfges_t_table[param_t[0]][param_t[1]](opq, 1); -} - -DEF_1T_OP(generic_gen_op, l_sfgeu_null_t_table, gen_op_sfgeu_null); -DEF_1T_OP(generic_gen_op, l_sfleu_null_t_table, gen_op_sfleu_null); -DEF_1T_OP(imm_gen_op, l_sfgeu_imm_t_table, gen_op_sfgeu_imm); -DEF_2T_OP(generic_gen_op, l_sfgeu_t_table, gen_op_sfgeu); - -void gen_l_sfgeu(struct op_queue *opq, int param_t[3], int delay_slot) -{ - if(!opq->param[0] && !opq->param[1]) { - gen_op_set_flag(opq, 1); - return; - } - - if(!opq->param[0]) { - /* sfleu IS correct */ - if(param_t[1] == T_NONE) { - if(0 >= opq->param[1]) - gen_op_set_flag(opq, 1); - else - gen_op_clear_flag(opq, 1); - } else - l_sfleu_null_t_table[param_t[1]](opq, 1); - return; - } - - if(!opq->param[1]) { - l_sfgeu_null_t_table[param_t[0]](opq, 1); - return; - } - if(param_t[1] == T_NONE) - l_sfgeu_imm_t_table[param_t[0]](opq, 1, opq->param[1]); - else - l_sfgeu_t_table[param_t[0]][param_t[1]](opq, 1); -} - -DEF_1T_OP(generic_gen_op, l_sfgts_null_t_table, gen_op_sfgts_null); -DEF_1T_OP(generic_gen_op, l_sflts_null_t_table, gen_op_sflts_null); -DEF_1T_OP(imm_gen_op, l_sfgts_imm_t_table, gen_op_sfgts_imm); -DEF_2T_OP(generic_gen_op, l_sfgts_t_table, gen_op_sfgts); - -void gen_l_sfgts(struct op_queue *opq, int param_t[3], int delay_slot) -{ - if(!opq->param[0] && !opq->param[1]) { - gen_op_clear_flag(opq, 1); - return; - } - - if(!opq->param[0]) { - /* sflts IS correct */ - if(param_t[1] == T_NONE) { - if(0 > (orreg_t)opq->param[1]) - gen_op_set_flag(opq, 1); - else - gen_op_clear_flag(opq, 1); - } else - l_sflts_null_t_table[param_t[1]](opq, 1); - return; - } - - if(!opq->param[1]) { - l_sfgts_null_t_table[param_t[0]](opq, 1); - return; - } - - if(param_t[1] == T_NONE) - l_sfgts_imm_t_table[param_t[0]](opq, 1, opq->param[1]); - else - l_sfgts_t_table[param_t[0]][param_t[1]](opq, 1); -} - -DEF_1T_OP(generic_gen_op, l_sfgtu_null_t_table, gen_op_sfgtu_null); -DEF_1T_OP(generic_gen_op, l_sfltu_null_t_table, gen_op_sfltu_null); -DEF_1T_OP(imm_gen_op, l_sfgtu_imm_t_table, gen_op_sfgtu_imm); -DEF_2T_OP(generic_gen_op, l_sfgtu_t_table, gen_op_sfgtu); - -void gen_l_sfgtu(struct op_queue *opq, int param_t[3], int delay_slot) -{ - if(!opq->param[0] && !opq->param[1]) { - gen_op_clear_flag(opq, 1); - return; - } - - if(!opq->param[0]) { - /* sfltu IS correct */ - if(param_t[1] == T_NONE) { - if(0 > opq->param[1]) - gen_op_set_flag(opq, 1); - else - gen_op_clear_flag(opq, 1); - } else - l_sfltu_null_t_table[param_t[1]](opq, 1); - return; - } - - if(!opq->param[1]) { - l_sfgtu_null_t_table[param_t[0]](opq, 1); - return; - } - - if(param_t[1] == T_NONE) - l_sfgtu_imm_t_table[param_t[0]](opq, 1, opq->param[1]); - else - l_sfgtu_t_table[param_t[0]][param_t[1]](opq, 1); -} - -DEF_1T_OP(imm_gen_op, l_sfles_imm_t_table, gen_op_sfles_imm); -DEF_2T_OP(generic_gen_op, l_sfles_t_table, gen_op_sfles); - -void gen_l_sfles(struct op_queue *opq, int param_t[3], int delay_slot) -{ - if(!opq->param[0] && !opq->param[1]) { - gen_op_set_flag(opq, 1); - return; - } - - if(!opq->param[0]) { - /* sfges IS correct */ - if(param_t[1] == T_NONE) { - if(0 <= (orreg_t)opq->param[1]) - gen_op_set_flag(opq, 1); - else - gen_op_clear_flag(opq, 1); - } else - l_sfges_null_t_table[param_t[1]](opq, 1); - return; - } - - if(!opq->param[1]) { - l_sfles_null_t_table[param_t[0]](opq, 1); - return; - } - - if(param_t[1] == T_NONE) - l_sfles_imm_t_table[param_t[0]](opq, 1, opq->param[1]); - else - l_sfles_t_table[param_t[0]][param_t[1]](opq, 1); -} - -DEF_1T_OP(imm_gen_op, l_sfleu_imm_t_table, gen_op_sfleu_imm); -DEF_2T_OP(generic_gen_op, l_sfleu_t_table, gen_op_sfleu); - -void gen_l_sfleu(struct op_queue *opq, int param_t[3], int delay_slot) -{ - if(!opq->param[0] && !opq->param[1]) { - gen_op_set_flag(opq, 1); - return; - } - - if(!opq->param[0]) { - /* sfleu IS correct */ - if(param_t[1] == T_NONE) { - if(0 <= opq->param[1]) - gen_op_set_flag(opq, 1); - else - gen_op_clear_flag(opq, 1); - } else - l_sfgeu_null_t_table[param_t[1]](opq, 1); - return; - } - - if(!opq->param[1]) { - l_sfleu_null_t_table[param_t[0]](opq, 1); - return; - } - - if(param_t[1] == T_NONE) - l_sfleu_imm_t_table[param_t[0]](opq, 1, opq->param[1]); - else - l_sfleu_t_table[param_t[0]][param_t[1]](opq, 1); -} - -DEF_1T_OP(imm_gen_op, l_sflts_imm_t_table, gen_op_sflts_imm); -DEF_2T_OP(generic_gen_op, l_sflts_t_table, gen_op_sflts); - -void gen_l_sflts(struct op_queue *opq, int param_t[3], int delay_slot) -{ - if(!opq->param[0] && !opq->param[1]) { - gen_op_clear_flag(opq, 1); - return; - } - - if(!opq->param[0]) { - /* sfgts IS correct */ - if(param_t[1] == T_NONE) { - if(0 < (orreg_t)opq->param[1]) - gen_op_set_flag(opq, 1); - else - gen_op_clear_flag(opq, 1); - } else - l_sfgts_null_t_table[param_t[1]](opq, 1); - return; - } - - if(!opq->param[1]) { - l_sflts_null_t_table[param_t[0]](opq, 1); - return; - } - - if(param_t[1] == T_NONE) - l_sflts_imm_t_table[param_t[0]](opq, 1, opq->param[1]); - else - l_sflts_t_table[param_t[0]][param_t[1]](opq, 1); -} - -DEF_1T_OP(imm_gen_op, l_sfltu_imm_t_table, gen_op_sfltu_imm); -DEF_2T_OP(generic_gen_op, l_sfltu_t_table, gen_op_sfltu); - -void gen_l_sfltu(struct op_queue *opq, int param_t[3], int delay_slot) -{ - if(!opq->param[0] && !opq->param[1]) { - gen_op_clear_flag(opq, 1); - return; - } - - if(!opq->param[0]) { - /* sfgtu IS correct */ - if(param_t[1] == T_NONE) { - if(0 < opq->param[1]) - gen_op_set_flag(opq, 1); - else - gen_op_clear_flag(opq, 1); - } else - l_sfgtu_null_t_table[param_t[1]](opq, 1); - return; - } - - if(!opq->param[1]) { - l_sfltu_null_t_table[param_t[0]](opq, 1); - return; - } - - if(param_t[1] == T_NONE) - l_sfltu_imm_t_table[param_t[0]](opq, 1, opq->param[1]); - else - l_sfltu_t_table[param_t[0]][param_t[1]](opq, 1); -} - -DEF_1T_OP(generic_gen_op, l_sfne_null_t_table, gen_op_sfne_null); -DEF_1T_OP(imm_gen_op, l_sfne_imm_t_table, gen_op_sfne_imm); -DEF_2T_OP(generic_gen_op, l_sfne_t_table, gen_op_sfne); - -void gen_l_sfne(struct op_queue *opq, int param_t[3], int delay_slot) -{ - if(!opq->param[0] && !opq->param[1]) { - gen_op_set_flag(opq, 1); - return; - } - - if(!opq->param[0]) { - if(param_t[1] == T_NONE) - if(opq->param[1]) - gen_op_set_flag(opq, 1); - else - gen_op_clear_flag(opq, 1); - else - l_sfne_null_t_table[param_t[1]](opq, 1); - return; - } - - if(!opq->param[1]) { - l_sfne_null_t_table[param_t[0]](opq, 1); - return; - } - - if(param_t[1] == T_NONE) - l_sfne_imm_t_table[param_t[0]](opq, 1, opq->param[1]); - else - l_sfne_t_table[param_t[0]][param_t[1]](opq, 1); -} - -DEF_2T_OP(imm_gen_op, l_sll_imm_t_table, gen_op_sll_imm); -DEF_3T_OP(generic_gen_op, l_sll_t_table, gen_op_sll); - -void gen_l_sll(struct op_queue *opq, int param_t[3], int delay_slot) -{ - if(!opq->param[0]) - return; - - if(!opq->param[1]) { - clear_t[param_t[0]](opq, 1); - return; - } - - if(!opq->param[2]) { - move_t_t[param_t[0]][param_t[1]](opq, 1); - return; - } - - if(param_t[2] == T_NONE) - l_sll_imm_t_table[param_t[0]][param_t[1]](opq, 1, opq->param[2]); - else - l_sll_t_table[param_t[0]][param_t[1]][param_t[2]](opq, 1); -} - -DEF_2T_OP(imm_gen_op, l_sra_imm_t_table, gen_op_sra_imm); -DEF_3T_OP(generic_gen_op, l_sra_t_table, gen_op_sra); - -void gen_l_sra(struct op_queue *opq, int param_t[3], int delay_slot) -{ - if(!opq->param[0]) - return; - - if(!opq->param[1]) { - clear_t[param_t[0]](opq, 1); - return; - } - - if(!opq->param[2]) { - move_t_t[param_t[0]][param_t[1]](opq, 1); - return; - } - - if(param_t[2] == T_NONE) - l_sra_imm_t_table[param_t[0]][param_t[1]](opq, 1, opq->param[2]); - else - l_sra_t_table[param_t[0]][param_t[1]][param_t[2]](opq, 1); -} - -DEF_2T_OP(imm_gen_op, l_srl_imm_t_table, gen_op_srl_imm); -DEF_3T_OP(generic_gen_op, l_srl_t_table, gen_op_srl); - -void gen_l_srl(struct op_queue *opq, int param_t[3], int delay_slot) -{ - if(!opq->param[0]) - return; - - if(!opq->param[1]) { - clear_t[param_t[0]](opq, 1); - return; - } - - if(!opq->param[2]) { - move_t_t[param_t[0]][param_t[1]](opq, 1); - return; - } - - if(param_t[2] == T_NONE) - l_srl_imm_t_table[param_t[0]][param_t[1]](opq, 1, opq->param[2]); - else - l_srl_t_table[param_t[0]][param_t[1]][param_t[2]](opq, 1); -} - -DEF_2T_OP(generic_gen_op, l_neg_t_table, gen_op_neg); -DEF_3T_OP(generic_gen_op, l_sub_t_table, gen_op_sub); - -void gen_l_sub(struct op_queue *opq, int param_t[3], int delay_slot) -{ - if(!opq->param[0]) - return; - - if((param_t[2] != T_NONE) && (opq->param[1] == opq->param[2])) { - clear_t[param_t[0]](opq, 1); - return; - } - - if(!opq->param[1] && !opq->param[2]) { - clear_t[param_t[0]](opq, 1); - return; - } - - if(!opq->param[1]) { - if(param_t[2] == T_NONE) - mov_t_imm[param_t[0]](opq, 1, -opq->param[2]); - else - l_neg_t_table[param_t[0]][param_t[2]](opq, 1); - return; - } - - if(!opq->param[2]) { - move_t_t[param_t[0]][param_t[1]](opq, 1); - return; - } - - l_sub_t_table[param_t[0]][param_t[1]][param_t[2]](opq, 1); -} - -/* FIXME: This will not work if the l.sys is in a delay slot */ -void gen_l_sys(struct op_queue *opq, int param_t[3], int delay_slot) -{ - if(do_stats) - /* All gprs are current since this insn doesn't touch any reg */ - gen_op_analysis(opq, 1); - - if(!delay_slot) - gen_op_prep_sys(opq, 1); - else - gen_op_prep_sys_delay(opq, 1); - - gen_op_do_sched(opq, 1); - gen_op_do_jump(opq, 1); -} - -/* FIXME: This will not work if the l.trap is in a delay slot */ -void gen_l_trap(struct op_queue *opq, int param_t[3], int delay_slot) -{ - if(do_stats) - /* All gprs are current since this insn doesn't touch any reg */ - gen_op_analysis(opq, 1); - - if(!delay_slot) - gen_op_prep_trap(opq, 1); - else - gen_op_prep_trap_delay(opq, 1); -} - -DEF_2T_OP(imm_gen_op, l_xor_imm_t_table, gen_op_xor_imm); -/* FIXME: Make unused elements NULL */ -DEF_3T_OP_NEQ(generic_gen_op, l_xor_t_table, gen_op_xor); - -void gen_l_xor(struct op_queue *opq, int param_t[3], int delay_slot) -{ - if(!opq->param[0]) - return; - - if((param_t[2] != T_NONE) && (opq->param[1] == opq->param[2])) { - clear_t[param_t[0]](opq, 1); - return; - } - - if(!opq->param[2]) { - if((param_t[2] == T_NONE) && (opq->param[0] == opq->param[1])) - return; - move_t_t[param_t[0]][param_t[1]](opq, 1); - return; - } - - if(!opq->param[1]) { - if(param_t[2] == T_NONE) { - mov_t_imm[param_t[0]](opq, 1, opq->param[2]); - return; - } - move_t_t[param_t[0]][param_t[2]](opq, 1); - return; - } - - if(param_t[2] == T_NONE) - l_xor_imm_t_table[param_t[0]][param_t[1]](opq, 1, opq->param[2]); - else - l_xor_t_table[param_t[0]][param_t[1]][param_t[2]](opq, 1); -} - -void gen_l_invalid(struct op_queue *opq, int param_t[3], int delay_slot) -{ - if(!delay_slot) { - gen_op_illegal(opq, 1); - gen_op_do_jump(opq, 1); - } else { - gen_op_illegal_delay(opq, 1); - gen_op_do_jump(opq, 1); - } -} - -/*----------------------------------[ Floating point instructions (stubs) ]---*/ -void gen_lf_add_s(struct op_queue *opq, int param_t[3], int delay_slot) -{ - gen_l_invalid(opq, param_t, delay_slot); -} - -void gen_lf_div_s(struct op_queue *opq, int param_t[3], int delay_slot) -{ - gen_l_invalid(opq, param_t, delay_slot); -} - -void gen_lf_ftoi_s(struct op_queue *opq, int param_t[3], int delay_slot) -{ - gen_l_invalid(opq, param_t, delay_slot); -} - -void gen_lf_itof_s(struct op_queue *opq, int param_t[3], int delay_slot) -{ - gen_l_invalid(opq, param_t, delay_slot); -} - -void gen_lf_madd_s(struct op_queue *opq, int param_t[3], int delay_slot) -{ - gen_l_invalid(opq, param_t, delay_slot); -} - -void gen_lf_mul_s(struct op_queue *opq, int param_t[3], int delay_slot) -{ - gen_l_invalid(opq, param_t, delay_slot); -} - -void gen_lf_rem_s(struct op_queue *opq, int param_t[3], int delay_slot) -{ - gen_l_invalid(opq, param_t, delay_slot); -} - -void gen_lf_sfeq_s(struct op_queue *opq, int param_t[3], int delay_slot) -{ - gen_l_invalid(opq, param_t, delay_slot); -} - -void gen_lf_sfge_s(struct op_queue *opq, int param_t[3], int delay_slot) -{ - gen_l_invalid(opq, param_t, delay_slot); -} - -void gen_lf_sfgt_s(struct op_queue *opq, int param_t[3], int delay_slot) -{ - gen_l_invalid(opq, param_t, delay_slot); -} - -void gen_lf_sfle_s(struct op_queue *opq, int param_t[3], int delay_slot) -{ - gen_l_invalid(opq, param_t, delay_slot); -} - -void gen_lf_sflt_s(struct op_queue *opq, int param_t[3], int delay_slot) -{ - gen_l_invalid(opq, param_t, delay_slot); -} - -void gen_lf_sfne_s(struct op_queue *opq, int param_t[3], int delay_slot) -{ - gen_l_invalid(opq, param_t, delay_slot); -} - -void gen_lf_sub_s(struct op_queue *opq, int param_t[3], int delay_slot) -{ - gen_l_invalid(opq, param_t, delay_slot); -} -

cpu/or32/dyn-rec.c Property changes : Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -Id \ No newline at end of property Index: cpu/or32/op-mftspr-op.h =================================================================== --- cpu/or32/op-mftspr-op.h (revision 538) +++ cpu/or32/op-mftspr-op.h (nonexistent) @@ -1,78 +0,0 @@ -/* op-mftspr-op.h -- Micro operations template for the m{f,t}spr operations - - Copyright (C) 2005 György `nog' Jeney, nog@sdf.lonestar.org - Copyright (C) 2008 Embecosm Limited - - Contributor Jeremy Bennett - - This file is part of Or1ksim, the OpenRISC 1000 Architectural Simulator. - - This program is free software; you can redistribute it and/or modify it - under the terms of the GNU General Public License as published by the Free - Software Foundation; either version 3 of the License, or (at your option) - any later version. - - This program is distributed in the hope that it will be useful, but WITHOUT - ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - more details. - - You should have received a copy of the GNU General Public License along - with this program. If not, see . */ - -/* This program is commented throughout in a fashion suitable for processing - with Doxygen. */ - - -#ifdef OP_2T -__or_dynop void glue (op_mfspr, T) (void) -{ - /* FIXME: NPC/PPC Handling is br0ke */ - if (env->sprs[SPR_SR] & SPR_SR_SM) - T0 = mfspr (T1 + OP_PARAM1); -} -#endif - -#ifdef OP_1T -__or_dynop void glue (op_mfspr_imm, T) (void) -{ - /* FIXME: NPC/PPC Handling is br0ke */ - if (env->sprs[SPR_SR] & SPR_SR_SM) - T0 = mfspr (OP_PARAM1); -} -#endif - -#ifdef OP_2T -__or_dynop void glue (op_mtspr, T) (void) -{ - /* FIXME: NPC handling DOES NOT WORK like this */ - if (env->sprs[SPR_SR] & SPR_SR_SM) - mtspr (T0 + OP_PARAM1, T1); -} -#endif - -#ifdef OP_1T -__or_dynop void glue (op_mtspr_clear, T) (void) -{ - /* FIXME: NPC handling DOES NOT WORK like this */ - if (env->sprs[SPR_SR] & SPR_SR_SM) - mtspr (T0 + OP_PARAM1, 0); -} - -__or_dynop void glue (op_mtspr_imm, T) (void) -{ - /* FIXME: NPC handling DOES NOT WORK like this */ - if (env->sprs[SPR_SR] & SPR_SR_SM) - mtspr (OP_PARAM1, T0); -} -#endif - -#if !defined(OP_1T) && !defined(OP_2T) -__or_dynop void -op_mtspr_imm_clear (void) -{ - /* FIXME: NPC handling DOES NOT WORK like this */ - if (env->sprs[SPR_SR] & SPR_SR_SM) - mtspr (OP_PARAM1, 0); -} -#endif

cpu/or32/op-mftspr-op.h Property changes : Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -Id \ No newline at end of property Index: cpu/or32/dyn-rec.h =================================================================== --- cpu/or32/dyn-rec.h (revision 538) +++ cpu/or32/dyn-rec.h (nonexistent) @@ -1,70 +0,0 @@ -/* dyn-rec.h -- Recompiler specific definitions - - Copyright (C) 2005 György `nog' Jeney, nog@sdf.lonestar.org - Copyright (C) 2008 Embecosm Limited - - Contributor Jeremy Bennett - - This file is part of OpenRISC 1000 Architectural Simulator. - - This program is free software; you can redistribute it and/or modify it - under the terms of the GNU General Public License as published by the Free - Software Foundation; either version 3 of the License, or (at your option) - any later version. - - This program is distributed in the hope that it will be useful, but WITHOUT - ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - more details. - - You should have received a copy of the GNU General Public License along - with this program. If not, see . */ - -/* This program is commented throughout in a fashion suitable for processing - with Doxygen. */ - - -#ifndef DYN_REC__H -#define DYN_REC__H - -typedef void (*gen_code_ent)(void); - -/* Each dynamically recompiled page has one of these */ -struct dyn_page { - oraddr_t or_page; - void *host_page; - unsigned int host_len; - int dirty; /* Is recompiled page invalid? */ - int delayr; /* delayr of memory backing this page */ - uint16_t ts_bound[2049]; /* What registers the temporaries back (on the - * begining boundry of the instruction) */ - void **locs; /* Openrisc locations in the recompiled code */ - uint32_t *insns; /* Copy of instructions on this page */ - unsigned int *insn_indexs; /* Decoded instructions on this page */ -}; - -/* Function prototypes for external use */ -extern void recompile_page(struct dyn_page *dyn); -extern struct dyn_page *new_dp(oraddr_t page); -extern void add_to_opq(struct op_queue *opq, int end, int op); -extern void add_to_op_params(struct op_queue *opq, int end, unsigned long param); -extern void *enough_host_page(struct dyn_page *dp, void *cur, unsigned int *len, - unsigned int amount); -extern void init_dyn_recomp(void); -extern void run_sched_out_of_line(void); -extern void recheck_immu(int got_en_dis); -extern void enter_dyn_code(oraddr_t addr, struct dyn_page *dp); -extern void dyn_checkwrite(oraddr_t addr); -extern void dyn_main(void); - -/* Global variables for external use */ -extern void *rec_stack_base; - -#define IMMU_GOT_ENABLED 1 -#define IMMU_GOT_DISABLED 2 - -#define xglue(x, y) x ## y -#define glue(x, y) xglue(x, y) - -#endif /* DYN_REC__H */ -

cpu/or32/dyn-rec.h Property changes : Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -Id \ No newline at end of property Index: cpu/or32/op-ff1-op.h =================================================================== --- cpu/or32/op-ff1-op.h (revision 538) +++ cpu/or32/op-ff1-op.h (nonexistent) @@ -1,35 +0,0 @@ -/* op-ff1-op.h -- Micro operations template for the ff1 instruction - Copyright (C) 2005 György `nog' Jeney, nog@sdf.lonestar.org - -This file is part of OpenRISC 1000 Architectural Simulator. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2 of the License, or -(at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software -Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ - - -__or_dynop void glue(glue(glue(op_ff1_, DST_T), _), SRC_T)(void) -{ - int i; - - for(i = 0; i < 32; i++, SRC_T >>= 1) { - if(SRC_T & 1) { - DST_T = i; - break; - } - } - - FORCE_RET; -} - -

cpu/or32/op-ff1-op.h Property changes : Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -Id \ No newline at end of property Index: cpu/or32/i386-regs.h =================================================================== --- cpu/or32/i386-regs.h (revision 538) +++ cpu/or32/i386-regs.h (nonexistent) @@ -1,26 +0,0 @@ -/* i386_regs.h -- Register definitions for i386 - Copyright (C) 2005 György `nog' Jeney, nog@sdf.lonestar.org - -This file is part of OpenRISC 1000 Architectural Simulator. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2 of the License, or -(at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software -Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ - - -#define CPU_STATE_REG "ebp" -#define T0_REG "ebx" -#define T1_REG "esi" -#define T2_REG "edi" - -#define NUM_T_REGS 3

cpu/or32/i386-regs.h Property changes : Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -Id \ No newline at end of property Index: cpu/or32/op-3t.h =================================================================== --- cpu/or32/op-3t.h (revision 538) +++ cpu/or32/op-3t.h (nonexistent) @@ -1,135 +0,0 @@ -/* op-3t.h -- Instantiation of operatations that work on only 3 temporary - Copyright (C) 2005 György `nog' Jeney, nog@sdf.lonestar.org - -This file is part of OpenRISC 1000 Architectural Simulator. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2 of the License, or -(at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software -Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ - - -#define OP_3T -#define T glue(glue(glue(glue(glue(_, T0), _), T1), _), T2) - -#if NUM_T_REGS == 3 -# define T0 t0 -# define T1 t0 -# define T2 t0 -# include OP_FILE -# undef T2 -# define T2 t1 -# include OP_FILE -# undef T2 -# define T2 t2 -# include OP_FILE -# undef T2 -# undef T1 -# define T1 t1 -# define T2 t0 -# include OP_FILE -# undef T2 -# define T2 t1 -# include OP_FILE -# undef T2 -# define T2 t2 -# include OP_FILE -# undef T2 -# undef T1 -# define T1 t2 -# define T2 t0 -# include OP_FILE -# undef T2 -# define T2 t1 -# include OP_FILE -# undef T2 -# define T2 t2 -# include OP_FILE -# undef T2 -# undef T1 -# undef T0 -# define T0 t1 -# define T1 t0 -# define T2 t0 -# include OP_FILE -# undef T2 -# define T2 t1 -# include OP_FILE -# undef T2 -# define T2 t2 -# include OP_FILE -# undef T2 -# undef T1 -# define T1 t1 -# define T2 t0 -# include OP_FILE -# undef T2 -# define T2 t1 -# include OP_FILE -# undef T2 -# define T2 t2 -# include OP_FILE -# undef T2 -# undef T1 -# define T1 t2 -# define T2 t0 -# include OP_FILE -# undef T2 -# define T2 t1 -# include OP_FILE -# undef T2 -# define T2 t2 -# include OP_FILE -# undef T2 -# undef T1 -# undef T0 -# define T0 t2 -# define T1 t0 -# define T2 t0 -# include OP_FILE -# undef T2 -# define T2 t1 -# include OP_FILE -# undef T2 -# define T2 t2 -# include OP_FILE -# undef T2 -# undef T1 -# define T1 t1 -# define T2 t0 -# include OP_FILE -# undef T2 -# define T2 t1 -# include OP_FILE -# undef T2 -# define T2 t2 -# include OP_FILE -# undef T2 -# undef T1 -# define T1 t2 -# define T2 t0 -# include OP_FILE -# undef T2 -# define T2 t1 -# include OP_FILE -# undef T2 -# define T2 t2 -# include OP_FILE -# undef T2 -# undef T1 -# undef T0 -#else -#error Update op_3t.h for NUM_T_REGS temporaries -#endif - -#undef T -#undef OP_3T

cpu/or32/op-3t.h Property changes : Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -Id \ No newline at end of property Index: cpu/or32/op-2t.h =================================================================== --- cpu/or32/op-2t.h (revision 538) +++ cpu/or32/op-2t.h (nonexistent) @@ -1,62 +0,0 @@ -/* op-2t.h -- Instantiation of operatations that work on only 2 temporary - Copyright (C) 2005 György `nog' Jeney, nog@sdf.lonestar.org - -This file is part of OpenRISC 1000 Architectural Simulator. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2 of the License, or -(at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software -Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ - -#define OP_2T -#define T glue(glue(glue(_, T0), _), T1) - -#if NUM_T_REGS == 3 -# define T0 t0 -# define T1 t0 -# include OP_FILE -# undef T1 -# define T1 t1 -# include OP_FILE -# undef T1 -# define T1 t2 -# include OP_FILE -# undef T1 -# undef T0 -# define T0 t1 -# define T1 t0 -# include OP_FILE -# undef T1 -# define T1 t1 -# include OP_FILE -# undef T1 -# define T1 t2 -# include OP_FILE -# undef T1 -# undef T0 -# define T0 t2 -# define T1 t0 -# include OP_FILE -# undef T1 -# define T1 t1 -# include OP_FILE -# undef T1 -# define T1 t2 -# include OP_FILE -# undef T1 -# undef T0 -#else -#error Update op_2t.h for NUM_T_REGS temporaries -#endif - -#undef T -#undef OP_2T

cpu/or32/op-2t.h Property changes : Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -Id \ No newline at end of property Index: cpu/or32/op-1t.h =================================================================== --- cpu/or32/op-1t.h (revision 538) +++ cpu/or32/op-1t.h (nonexistent) @@ -1,38 +0,0 @@ -/* op-1t.h -- Instantiation of operatations that work on only 1 temporary - Copyright (C) 2005 György `nog' Jeney, nog@sdf.lonestar.org - -This file is part of OpenRISC 1000 Architectural Simulator. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2 of the License, or -(at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software -Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ - -#define OP_1T -#define T glue(_, T0) - -#if NUM_T_REGS == 3 -#define T0 t0 -#include OP_FILE -#undef T0 -#define T0 t1 -#include OP_FILE -#undef T0 -#define T0 t2 -#include OP_FILE -#undef T0 -#else -#error Update op_1t.h for NUM_T_REGS temporaries -#endif - -#undef T -#undef OP_1T

cpu/or32/op-1t.h Property changes : Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -Id \ No newline at end of property Index: cpu/or32/op-comp-op.h =================================================================== --- cpu/or32/op-comp-op.h (revision 538) +++ cpu/or32/op-comp-op.h (nonexistent) @@ -1,50 +0,0 @@ -/* op-comp-op.h -- Micro operations template for comparison operations - Copyright (C) 2005 György `nog' Jeney, nog@sdf.lonestar.org - -This file is part of OpenRISC 1000 Architectural Simulator. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2 of the License, or -(at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software -Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ - -#ifdef OP_2T -__or_dynop void glue(glue(op_, COMP_NAME), T)(void) -{ - if(COMP_CAST(T0) COMP COMP_CAST(T1)) - env->sprs[SPR_SR] |= SPR_SR_F; - else - env->sprs[SPR_SR] &= ~SPR_SR_F; - FORCE_RET; -} -#endif - -#ifdef OP_1T -__or_dynop void glue(glue(glue(op_, COMP_NAME), _imm), T)(void) -{ - if(COMP_CAST(T0) COMP COMP_CAST(OP_PARAM1)) - env->sprs[SPR_SR] |= SPR_SR_F; - else - env->sprs[SPR_SR] &= ~SPR_SR_F; - FORCE_RET; -} - -__or_dynop void glue(glue(glue(op_, COMP_NAME), _null), T)(void) -{ - if(COMP_CAST(T0) COMP 0) - env->sprs[SPR_SR] |= SPR_SR_F; - else - env->sprs[SPR_SR] &= ~SPR_SR_F; - FORCE_RET; -} -#endif -

cpu/or32/op-comp-op.h Property changes : Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -Id \ No newline at end of property Index: cpu/or32/def-op-t.h =================================================================== --- cpu/or32/def-op-t.h (revision 538) +++ cpu/or32/def-op-t.h (nonexistent) @@ -1,138 +0,0 @@ -/* def_op_t.h -- Operation-generation strucutre definitions helpers - Copyright (C) 2005 György `nog' Jeney, nog@sdf.lonestar.org - -This file is part of OpenRISC 1000 Architectural Simulator. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2 of the License, or -(at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software -Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ - -#define GPR_T(op_name, temp) \ - { NULL, \ - glue(glue(op_name, 1), temp), \ - glue(glue(op_name, 2), temp), \ - glue(glue(op_name, 3), temp), \ - glue(glue(op_name, 4), temp), \ - glue(glue(op_name, 5), temp), \ - glue(glue(op_name, 6), temp), \ - glue(glue(op_name, 7), temp), \ - glue(glue(op_name, 8), temp), \ - glue(glue(op_name, 9), temp), \ - glue(glue(op_name, 10), temp), \ - glue(glue(op_name, 11), temp), \ - glue(glue(op_name, 12), temp), \ - glue(glue(op_name, 13), temp), \ - glue(glue(op_name, 14), temp), \ - glue(glue(op_name, 15), temp), \ - glue(glue(op_name, 16), temp), \ - glue(glue(op_name, 17), temp), \ - glue(glue(op_name, 18), temp), \ - glue(glue(op_name, 19), temp), \ - glue(glue(op_name, 20), temp), \ - glue(glue(op_name, 21), temp), \ - glue(glue(op_name, 22), temp), \ - glue(glue(op_name, 23), temp), \ - glue(glue(op_name, 24), temp), \ - glue(glue(op_name, 25), temp), \ - glue(glue(op_name, 26), temp), \ - glue(glue(op_name, 27), temp), \ - glue(glue(op_name, 28), temp), \ - glue(glue(op_name, 29), temp), \ - glue(glue(op_name, 30), temp), \ - glue(glue(op_name, 31), temp) } - -#if NUM_T_REGS == 3 - -#define OP_ROW(op_name) \ - { glue(op_name, _t0), glue(op_name, _t1), glue(op_name, _t2) } - -#define OP_ROW_NEQ0(op_name) \ - { NULL, glue(op_name, _t1), glue(op_name, _t2) } - -#define OP_ROW_NEQ1(op_name) \ - { glue(op_name, _t0), NULL, glue(op_name, _t2) } - -#define OP_ROW_NEQ2(op_name) \ - { glue(op_name, _t0), glue(op_name, _t1), NULL } - -#define OP_ROW_COL(op_name) { \ - OP_ROW(glue(op_name, _t0)), \ - OP_ROW(glue(op_name, _t1)), \ - OP_ROW(glue(op_name, _t2)), } - -/* In 3D space: row, column, ??? */ -#define OP_ROW_COL_3D(op_name) { \ - OP_ROW_COL(glue(op_name, _t0)), \ - OP_ROW_COL(glue(op_name, _t1)), \ - OP_ROW_COL(glue(op_name, _t2)) } - -#define OP_ROW_COL_NEQ(op_name) { \ - OP_ROW_NEQ0(glue(op_name, _t0)), \ - OP_ROW_NEQ1(glue(op_name, _t1)), \ - OP_ROW_NEQ2(glue(op_name, _t2)) } - -#define OP_ROW_COL_NEQ0(op_name) { \ - OP_ROW_NEQ0(glue(op_name, _t0)), \ - OP_ROW(glue(op_name, _t1)), \ - OP_ROW(glue(op_name, _t2)) } - -#define OP_ROW_COL_NEQ1(op_name) { \ - OP_ROW(glue(op_name, _t0)), \ - OP_ROW_NEQ1(glue(op_name, _t1)), \ - OP_ROW(glue(op_name, _t2)) } - -#define OP_ROW_COL_NEQ2(op_name) { \ - OP_ROW(glue(op_name, _t0)), \ - OP_ROW(glue(op_name, _t1)), \ - OP_ROW_NEQ2(glue(op_name, _t2)) } - -#define OP_ROW_COL_3D_NEQ(op_name) { \ - OP_ROW_COL_NEQ0(glue(op_name, _t0)), \ - OP_ROW_COL_NEQ1(glue(op_name, _t1)), \ - OP_ROW_COL_NEQ2(glue(op_name, _t2)) } - -#define GPR_ROW_COL(op_name) { \ - GPR_T(op_name, _t0), \ - GPR_T(op_name, _t1), \ - GPR_T(op_name, _t2) } - -#else -#error Update def_op_t.h for NUM_T_REGS temporaries -#endif - -#define DEF_1T_OP(type, name, op_name) \ - static const type name[NUM_T_REGS] = \ - OP_ROW(op_name) - -#define DEF_2T_OP(type, name, op_name) \ - static const type name[NUM_T_REGS][NUM_T_REGS] = \ - OP_ROW_COL(op_name) - -#define DEF_3T_OP(type, name, op_name) \ - static const type name[NUM_T_REGS][NUM_T_REGS][NUM_T_REGS] = \ - OP_ROW_COL_3D(op_name) - -/* Same as above but put NULL in places where T0 == T1 */ -#define DEF_2T_OP_NEQ(type, name, op_name) \ - static const type name[NUM_T_REGS][NUM_T_REGS] = \ - OP_ROW_COL_NEQ(op_name) - -/* Same as above but put NULL in places where T0 == T1 == T2 */ -#define DEF_3T_OP_NEQ(type, name, op_name) \ - static const type name[NUM_T_REGS][NUM_T_REGS][NUM_T_REGS] = \ - OP_ROW_COL_3D_NEQ(op_name) - -#define DEF_GPR_OP(type, name, op_name) \ - static const generic_gen_op name[NUM_T_REGS][32] = \ - GPR_ROW_COL(op_name) -

cpu/or32/def-op-t.h Property changes : Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -Id \ No newline at end of property Index: cpu/or32/op-lwhb-op.h =================================================================== --- cpu/or32/op-lwhb-op.h (revision 538) +++ cpu/or32/op-lwhb-op.h (nonexistent) @@ -1,38 +0,0 @@ -/* op-lwhb-op.h -- Micro operations template for load operations - Copyright (C) 2005 György `nog' Jeney, nog@sdf.lonestar.org - -This file is part of OpenRISC 1000 Architectural Simulator. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2 of the License, or -(at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software -Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ - - -/* FIXME: Do something if a breakpoint is hit */ - -#ifdef OP_2T -__or_dynop void glue(glue(op_, LS_OP_NAME), T)(void) -{ - int breakpoint; - T0 = LS_OP_CAST LS_OP_FUNC(T1 + OP_PARAM1, &breakpoint); -} -#endif - -#ifdef OP_1T -__or_dynop void glue(glue(glue(op_, LS_OP_NAME), _imm), T)(void) -{ - int breakpoint; - T0 = LS_OP_CAST LS_OP_FUNC(OP_PARAM1, &breakpoint); -} -#endif -

cpu/or32/op-lwhb-op.h Property changes : Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -Id \ No newline at end of property Index: cpu/or32/op-swhb-op.h =================================================================== --- cpu/or32/op-swhb-op.h (revision 538) +++ cpu/or32/op-swhb-op.h (nonexistent) @@ -1,57 +0,0 @@ -/* op-swhb-op.h -- Micro operations template for store operations - - Copyright (C) 2005 György `nog' Jeney, nog@sdf.lonestar.org - Copyright (C) 2008 Embecosm Limited - - Contributor Jeremy Bennett - - This file is part of Or1ksim, the OpenRISC 1000 Architectural Simulator. - - This program is free software; you can redistribute it and/or modify it - under the terms of the GNU General Public License as published by the Free - Software Foundation; either version 3 of the License, or (at your option) - any later version. - - This program is distributed in the hope that it will be useful, but WITHOUT - ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - more details. - - You should have received a copy of the GNU General Public License along - with this program. If not, see . */ - -/* This program is commented throughout in a fashion suitable for processing - with Doxygen. */ - -/* FIXME: Do something with breakpoint */ - - -#ifdef OP_2T -__or_dynop void glue (glue (op_, S_OP_NAME), T) (void) -{ - int breakpoint; - S_FUNC (T0 + OP_PARAM1, T1, &breakpoint); -} -#endif - -#ifdef OP_1T -__or_dynop void glue (glue (glue (op_, S_OP_NAME), _imm), T) (void) -{ - int breakpoint; - S_FUNC (OP_PARAM1, T0, &breakpoint); -} - -__or_dynop void glue (glue (glue (op_, S_OP_NAME), _clear), T) (void) -{ - int breakpoint; - S_FUNC (T0 + OP_PARAM1, 0, &breakpoint); -} -#endif - -#if !defined(OP_1T) && !defined(OP_2T) -__or_dynop void glue (glue (op_, S_OP_NAME), _clear_imm) (void) -{ - int breakpoint; - S_FUNC (OP_PARAM1, 0, &breakpoint); -} -#endif

cpu/or32/op-swhb-op.h Property changes : Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -Id \ No newline at end of property Index: cpu/or32/op-t-reg-mov-op.h =================================================================== --- cpu/or32/op-t-reg-mov-op.h (revision 538) +++ cpu/or32/op-t-reg-mov-op.h (nonexistent) @@ -1,330 +0,0 @@ -/* op-t-reg-mov-op.h -- Micro operations template for reg<->temporary operations - Copyright (C) 2005 György `nog' Jeney, nog@sdf.lonestar.org - -This file is part of OpenRISC 1000 Architectural Simulator. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2 of the License, or -(at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software -Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ - - -__or_dynop void glue(op_gtt_gpr1, T)(void) -{ - T0 = env->reg[1]; -} - -__or_dynop void glue(op_gtt_gpr2, T)(void) -{ - T0 = env->reg[2]; -} - -__or_dynop void glue(op_gtt_gpr3, T)(void) -{ - T0 = env->reg[3]; -} - -__or_dynop void glue(op_gtt_gpr4, T)(void) -{ - T0 = env->reg[4]; -} - -__or_dynop void glue(op_gtt_gpr5, T)(void) -{ - T0 = env->reg[5]; -} - -__or_dynop void glue(op_gtt_gpr6, T)(void) -{ - T0 = env->reg[6]; -} - -__or_dynop void glue(op_gtt_gpr7, T)(void) -{ - T0 = env->reg[7]; -} - -__or_dynop void glue(op_gtt_gpr8, T)(void) -{ - T0 = env->reg[8]; -} - -__or_dynop void glue(op_gtt_gpr9, T)(void) -{ - T0 = env->reg[9]; -} - -__or_dynop void glue(op_gtt_gpr10, T)(void) -{ - T0 = env->reg[10]; -} - -__or_dynop void glue(op_gtt_gpr11, T)(void) -{ - T0 = env->reg[11]; -} - -__or_dynop void glue(op_gtt_gpr12, T)(void) -{ - T0 = env->reg[12]; -} - -__or_dynop void glue(op_gtt_gpr13, T)(void) -{ - T0 = env->reg[13]; -} - -__or_dynop void glue(op_gtt_gpr14, T)(void) -{ - T0 = env->reg[14]; -} - -__or_dynop void glue(op_gtt_gpr15, T)(void) -{ - T0 = env->reg[15]; -} - -__or_dynop void glue(op_gtt_gpr16, T)(void) -{ - T0 = env->reg[16]; -} - -__or_dynop void glue(op_gtt_gpr17, T)(void) -{ - T0 = env->reg[17]; -} - -__or_dynop void glue(op_gtt_gpr18, T)(void) -{ - T0 = env->reg[18]; -} - -__or_dynop void glue(op_gtt_gpr19, T)(void) -{ - T0 = env->reg[19]; -} - -__or_dynop void glue(op_gtt_gpr20, T)(void) -{ - T0 = env->reg[20]; -} - -__or_dynop void glue(op_gtt_gpr21, T)(void) -{ - T0 = env->reg[21]; -} - -__or_dynop void glue(op_gtt_gpr22, T)(void) -{ - T0 = env->reg[22]; -} - -__or_dynop void glue(op_gtt_gpr23, T)(void) -{ - T0 = env->reg[23]; -} - -__or_dynop void glue(op_gtt_gpr24, T)(void) -{ - T0 = env->reg[24]; -} - -__or_dynop void glue(op_gtt_gpr25, T)(void) -{ - T0 = env->reg[25]; -} - -__or_dynop void glue(op_gtt_gpr26, T)(void) -{ - T0 = env->reg[26]; -} - -__or_dynop void glue(op_gtt_gpr27, T)(void) -{ - T0 = env->reg[27]; -} - -__or_dynop void glue(op_gtt_gpr28, T)(void) -{ - T0 = env->reg[28]; -} - -__or_dynop void glue(op_gtt_gpr29, T)(void) -{ - T0 = env->reg[29]; -} - -__or_dynop void glue(op_gtt_gpr30, T)(void) -{ - T0 = env->reg[30]; -} - -__or_dynop void glue(op_gtt_gpr31, T)(void) -{ - T0 = env->reg[31]; -} - -__or_dynop void glue(op_ttg_gpr1, T)(void) -{ - env->reg[1] = T0; -} - -__or_dynop void glue(op_ttg_gpr2, T)(void) -{ - env->reg[2] = T0; -} - -__or_dynop void glue(op_ttg_gpr3, T)(void) -{ - env->reg[3] = T0; -} - -__or_dynop void glue(op_ttg_gpr4, T)(void) -{ - env->reg[4] = T0; -} - -__or_dynop void glue(op_ttg_gpr5, T)(void) -{ - env->reg[5] = T0; -} - -__or_dynop void glue(op_ttg_gpr6, T)(void) -{ - env->reg[6] = T0; -} - -__or_dynop void glue(op_ttg_gpr7, T)(void) -{ - env->reg[7] = T0; -} - -__or_dynop void glue(op_ttg_gpr8, T)(void) -{ - env->reg[8] = T0; -} - -__or_dynop void glue(op_ttg_gpr9, T)(void) -{ - env->reg[9] = T0; -} - -__or_dynop void glue(op_ttg_gpr10, T)(void) -{ - env->reg[10] = T0; -} - -__or_dynop void glue(op_ttg_gpr11, T)(void) -{ - env->reg[11] = T0; -} - -__or_dynop void glue(op_ttg_gpr12, T)(void) -{ - env->reg[12] = T0; -} - -__or_dynop void glue(op_ttg_gpr13, T)(void) -{ - env->reg[13] = T0; -} - -__or_dynop void glue(op_ttg_gpr14, T)(void) -{ - env->reg[14] = T0; -} - -__or_dynop void glue(op_ttg_gpr15, T)(void) -{ - env->reg[15] = T0; -} - -__or_dynop void glue(op_ttg_gpr16, T)(void) -{ - env->reg[16] = T0; -} - -__or_dynop void glue(op_ttg_gpr17, T)(void) -{ - env->reg[17] = T0; -} - -__or_dynop void glue(op_ttg_gpr18, T)(void) -{ - env->reg[18] = T0; -} - -__or_dynop void glue(op_ttg_gpr19, T)(void) -{ - env->reg[19] = T0; -} - -__or_dynop void glue(op_ttg_gpr20, T)(void) -{ - env->reg[20] = T0; -} - -__or_dynop void glue(op_ttg_gpr21, T)(void) -{ - env->reg[21] = T0; -} - -__or_dynop void glue(op_ttg_gpr22, T)(void) -{ - env->reg[22] = T0; -} - -__or_dynop void glue(op_ttg_gpr23, T)(void) -{ - env->reg[23] = T0; -} - -__or_dynop void glue(op_ttg_gpr24, T)(void) -{ - env->reg[24] = T0; -} - -__or_dynop void glue(op_ttg_gpr25, T)(void) -{ - env->reg[25] = T0; -} - -__or_dynop void glue(op_ttg_gpr26, T)(void) -{ - env->reg[26] = T0; -} - -__or_dynop void glue(op_ttg_gpr27, T)(void) -{ - env->reg[27] = T0; -} - -__or_dynop void glue(op_ttg_gpr28, T)(void) -{ - env->reg[28] = T0; -} - -__or_dynop void glue(op_ttg_gpr29, T)(void) -{ - env->reg[29] = T0; -} - -__or_dynop void glue(op_ttg_gpr30, T)(void) -{ - env->reg[30] = T0; -} - -__or_dynop void glue(op_ttg_gpr31, T)(void) -{ - env->reg[31] = T0; -} -

cpu/or32/op-t-reg-mov-op.h Property changes : Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -Id \ No newline at end of property Index: cpu/or32/op-support.h =================================================================== --- cpu/or32/op-support.h (revision 538) +++ cpu/or32/op-support.h (nonexistent) @@ -1,28 +0,0 @@ -/* op-support.h -- Definitions of support routines for operations - Copyright (C) 2005 György `nog' Jeney, nog@sdf.lonestar.org - -This file is part of OpenRISC 1000 Architectural Simulator. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2 of the License, or -(at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software -Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ - -void op_support_nop_exit(void); -void op_support_nop_reset(void); -void op_support_nop_printf(void); -void op_support_nop_report(void); -void op_support_nop_report_imm(int imm); -void op_support_analysis(void); -void do_jump(oraddr_t addr); - -void upd_reg_from_t(oraddr_t pc, int bound);

cpu/or32/op-support.h Property changes : Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -Id \ No newline at end of property Index: cpu/or32/op-support.c =================================================================== --- cpu/or32/op-support.c (revision 538) +++ cpu/or32/op-support.c (nonexistent) @@ -1,114 +0,0 @@ -/* op-support.c -- Support routines for micro operations - Copyright (C) 2005 György `nog' Jeney, nog@sdf.lonestar.org - -This file is part of OpenRISC 1000 Architectural Simulator. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2 of the License, or -(at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software -Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ - - -#include - -#include "config.h" - -#ifdef HAVE_INTTYPES_H -#include -#endif - -#include "port.h" -#include "arch.h" -#include "opcode/or32.h" -#include "sim-config.h" -#include "spr-defs.h" -#include "except.h" -#include "immu.h" -#include "abstract.h" -#include "execute.h" -#include "sched.h" -#include "i386-regs.h" -#include "dyn-rec.h" -#include "op-support.h" -#include "simprintf.h" - - -/* Stuff that is really a `micro' operation but is rather big (or for some other - * reason like calling exit()) */ - -void op_support_nop_exit(void) -{ - PRINTF("exit(%"PRIdREG")\n", cpu_state.reg[3]); - fprintf(stderr, "@reset : cycles %lld, insn #%lld\n", - runtime.sim.reset_cycles, runtime.cpu.reset_instructions); - fprintf(stderr, "@exit : cycles %lld, insn #%lld\n", runtime.sim.cycles, - runtime.cpu.instructions); - fprintf(stderr, " diff : cycles %lld, insn #%lld\n", - runtime.sim.cycles - runtime.sim.reset_cycles, - runtime.cpu.instructions - runtime.cpu.reset_instructions); - /* FIXME: Implement emulation of a stalled cpu - if (config.debug.gdb_enabled) - set_stall_state (1); - else { - handle_sim_command(); - sim_done(); - } - */ - exit(0); -} - -void op_support_nop_reset(void) -{ - PRINTF("****************** counters reset ******************\n"); - PRINTF("cycles %lld, insn #%lld\n", runtime.sim.cycles, runtime.cpu.instructions); - PRINTF("****************** counters reset ******************\n"); - runtime.sim.reset_cycles = runtime.sim.cycles; - runtime.cpu.reset_instructions = runtime.cpu.instructions; -} - -void op_support_nop_printf(void) -{ - simprintf(cpu_state.reg[4], cpu_state.reg[3]); -} - -void op_support_nop_report(void) -{ - PRINTF("report(0x%"PRIxREG");\n", cpu_state.reg[3]); -} - -void op_support_nop_report_imm(int imm) -{ - PRINTF("report %i (0x%"PRIxREG");\n", imm, cpu_state.reg[3]); -} - -/* Handles a jump */ -/* addr is a VIRTUAL address */ -/* NOTE: We can't use env since this code is compiled like the rest of the - * simulator (most likely without -fomit-frame-pointer) and thus env will point - * to some bogus value. */ -void do_jump(oraddr_t addr) -{ - cpu_state.pc = addr; - longjmp(cpu_state.excpt_loc, 0); -} - -/* Wrapper around analysis() that contains all the recompiler specific stuff */ -void op_support_analysis(void) -{ - oraddr_t off = (cpu_state.pc & immu_state->page_offset_mask) >> 2; - runtime.cpu.instructions++; - cpu_state.iqueue.insn_index = cpu_state.curr_page->insn_indexs[off]; - cpu_state.iqueue.insn = cpu_state.curr_page->insns[off]; - cpu_state.iqueue.insn_addr = cpu_state.pc; - analysis(&cpu_state.iqueue); -} -

cpu/or32/op-support.c Property changes : Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -Id \ No newline at end of property Index: cpu/or32/dyn32-defs.h =================================================================== --- cpu/or32/dyn32-defs.h (revision 538) +++ cpu/or32/dyn32-defs.h (nonexistent) @@ -1,139 +0,0 @@ -/* dyn32-defs.h -- Definitions for the dynamic execution model - - Copyright (C) 2005 György `nog' Jeney, nog@sdf.lonestar.org - Copyright (C) 2008 Embecosm Limited - - Contributor Jeremy Bennett - - This file is part of OpenRISC 1000 Architectural Simulator. - - This program is free software; you can redistribute it and/or modify it - under the terms of the GNU General Public License as published by the Free - Software Foundation; either version 3 of the License, or (at your option) - any later version. - - This program is distributed in the hope that it will be useful, but WITHOUT - ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - more details. - - You should have received a copy of the GNU General Public License along - with this program. If not, see . */ - -/* This program is commented throughout in a fashion suitable for processing - with Doxygen. */ - - -#ifndef DYN32_DEFS__H -#define DYN32_DEFS__H - - -/* Package includes */ -#include "arch.h" - - -struct op_queue { - unsigned int num_ops; - unsigned int ops_len; - unsigned int *ops; - unsigned int num_ops_param; - unsigned int ops_param_len; - unsigned int *ops_param; - unsigned int jump_local; /* Parameter index that holds the location of the jump */ - oraddr_t jump_local_loc; /* Location to jump to (relative to start of page */ - unsigned int not_jump_loc; /* Location to jump if not jumping (l.bf/l.bnf) */ - int xref; /* Is this location cross referenced? */ - oraddr_t insn_addr; /* Physical address of the instruction */ - unsigned int reg_t[3]; /* Which registers are in the temporaries (after the instruction)? */ - unsigned int tflags[3]; - - int insn_index; - unsigned int param_type[5]; /* opd->type */ - orreg_t param[5]; /* Value of operand */ - unsigned int param_num; /* Number of operands */ - uint32_t insn; /* Instruction word */ - - struct op_queue *prev; - struct op_queue *next; -}; - -void gen_l_add PARAMS((struct op_queue *, int *, int)); -void gen_l_addc PARAMS((struct op_queue *, int *, int)); -void gen_l_and PARAMS((struct op_queue *, int *, int)); -void gen_l_bf PARAMS((struct op_queue *, int *, int)); -void gen_l_bnf PARAMS((struct op_queue *, int *, int)); -void gen_l_cmov PARAMS((struct op_queue *, int *, int)); -void gen_l_cust1 PARAMS((struct op_queue *, int *, int)); -void gen_l_cust2 PARAMS((struct op_queue *, int *, int)); -void gen_l_cust3 PARAMS((struct op_queue *, int *, int)); -void gen_l_cust4 PARAMS((struct op_queue *, int *, int)); -void gen_l_div PARAMS((struct op_queue *, int *, int)); -void gen_l_divu PARAMS((struct op_queue *, int *, int)); -void gen_l_extbs PARAMS((struct op_queue *, int *, int)); -void gen_l_extbz PARAMS((struct op_queue *, int *, int)); -void gen_l_exths PARAMS((struct op_queue *, int *, int)); -void gen_l_exthz PARAMS((struct op_queue *, int *, int)); -void gen_l_extws PARAMS((struct op_queue *, int *, int)); -void gen_l_extwz PARAMS((struct op_queue *, int *, int)); -void gen_l_ff1 PARAMS((struct op_queue *, int *, int)); -void gen_l_j PARAMS((struct op_queue *, int *, int)); -void gen_l_jal PARAMS((struct op_queue *, int *, int)); -void gen_l_jr PARAMS((struct op_queue *, int *, int)); -void gen_l_jalr PARAMS((struct op_queue *, int *, int)); -void gen_l_lbs PARAMS((struct op_queue *, int *, int)); -void gen_l_lbz PARAMS((struct op_queue *, int *, int)); -void gen_l_lhs PARAMS((struct op_queue *, int *, int)); -void gen_l_lhz PARAMS((struct op_queue *, int *, int)); -void gen_l_lws PARAMS((struct op_queue *, int *, int)); -void gen_l_lwz PARAMS((struct op_queue *, int *, int)); -void gen_l_mac PARAMS((struct op_queue *, int *, int)); -void gen_l_macrc PARAMS((struct op_queue *, int *, int)); -void gen_l_mfspr PARAMS((struct op_queue *, int *, int)); -void gen_l_movhi PARAMS((struct op_queue *, int *, int)); -void gen_l_msb PARAMS((struct op_queue *, int *, int)); -void gen_l_mtspr PARAMS((struct op_queue *, int *, int)); -void gen_l_mul PARAMS((struct op_queue *, int *, int)); -void gen_l_mulu PARAMS((struct op_queue *, int *, int)); -void gen_l_nop PARAMS((struct op_queue *, int *, int)); -void gen_l_or PARAMS((struct op_queue *, int *, int)); -void gen_l_rfe PARAMS((struct op_queue *, int *, int)); -void gen_l_sb PARAMS((struct op_queue *, int *, int)); -void gen_l_sh PARAMS((struct op_queue *, int *, int)); -void gen_l_sw PARAMS((struct op_queue *, int *, int)); -void gen_l_sfeq PARAMS((struct op_queue *, int *, int)); -void gen_l_sfges PARAMS((struct op_queue *, int *, int)); -void gen_l_sfgeu PARAMS((struct op_queue *, int *, int)); -void gen_l_sfgts PARAMS((struct op_queue *, int *, int)); -void gen_l_sfgtu PARAMS((struct op_queue *, int *, int)); -void gen_l_sfles PARAMS((struct op_queue *, int *, int)); -void gen_l_sfleu PARAMS((struct op_queue *, int *, int)); -void gen_l_sflts PARAMS((struct op_queue *, int *, int)); -void gen_l_sfltu PARAMS((struct op_queue *, int *, int)); -void gen_l_sfne PARAMS((struct op_queue *, int *, int)); -void gen_l_sll PARAMS((struct op_queue *, int *, int)); -void gen_l_sra PARAMS((struct op_queue *, int *, int)); -void gen_l_srl PARAMS((struct op_queue *, int *, int)); -void gen_l_sub PARAMS((struct op_queue *, int *, int)); -void gen_l_sys PARAMS((struct op_queue *, int *, int)); -void gen_l_trap PARAMS((struct op_queue *, int *, int)); -void gen_l_xor PARAMS((struct op_queue *, int *, int)); -void gen_l_invalid PARAMS((struct op_queue *, int *, int)); - -void gen_lf_add_s PARAMS((struct op_queue *, int *, int)); -void gen_lf_div_s PARAMS((struct op_queue *, int *, int)); -void gen_lf_ftoi_s PARAMS((struct op_queue *, int *, int)); -void gen_lf_itof_s PARAMS((struct op_queue *, int *, int)); -void gen_lf_madd_s PARAMS((struct op_queue *, int *, int)); -void gen_lf_mul_s PARAMS((struct op_queue *, int *, int)); -void gen_lf_rem_s PARAMS((struct op_queue *, int *, int)); -void gen_lf_sfeq_s PARAMS((struct op_queue *, int *, int)); -void gen_lf_sfge_s PARAMS((struct op_queue *, int *, int)); -void gen_lf_sfgt_s PARAMS((struct op_queue *, int *, int)); -void gen_lf_sfle_s PARAMS((struct op_queue *, int *, int)); -void gen_lf_sflt_s PARAMS((struct op_queue *, int *, int)); -void gen_lf_sfne_s PARAMS((struct op_queue *, int *, int)); -void gen_lf_sub_s PARAMS((struct op_queue *, int *, int)); -void l_none(struct op_queue *opq, int *param_t, int delay_slot); - -#endif /* DYN32_DEFS__H */ -

cpu/or32/dyn32-defs.h Property changes : Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -Id \ No newline at end of property Index: cpu/or32/op-arith-op.h =================================================================== --- cpu/or32/op-arith-op.h (revision 538) +++ cpu/or32/op-arith-op.h (nonexistent) @@ -1,33 +0,0 @@ -/* op-arith-op.h -- Micro operations template for arithmetic operations - Copyright (C) 2005 György `nog' Jeney, nog@sdf.lonestar.org - -This file is part of OpenRISC 1000 Architectural Simulator. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2 of the License, or -(at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software -Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ - -#ifdef OP_3T -__or_dynop void glue(glue(op_, OP_NAME), T)(void) -{ - T0 = OP_CAST(T1) OP OP_CAST(T2) OP_EXTRA; -} -#endif - -#ifdef OP_2T -__or_dynop void glue(glue(glue(op_, OP_NAME), _imm), T)(void) -{ - T0 = OP_CAST(T1) OP OP_CAST(OP_PARAM1) OP_EXTRA; -} -#endif -

cpu/or32/op-arith-op.h Property changes : Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -Id \ No newline at end of property Index: cpu/or32/rec-i386.h =================================================================== --- cpu/or32/rec-i386.h (revision 538) +++ cpu/or32/rec-i386.h (nonexistent) @@ -1,28 +0,0 @@ -/* rec-i386.h -- i386 specific parts of the recompile engine - Copyright (C) 2005 György `nog' Jeney, nog@sdf.lonestar.org - -This file is part of OpenRISC 1000 Architectural Simulator. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2 of the License, or -(at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software -Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ - - -/* Gets the current stack pointer */ -static void *get_sp(void) -{ - void *stack; - asm("movl %%esp, %0" : "=rm" (stack)); - return stack; -} -

cpu/or32/rec-i386.h Property changes : Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -Id \ No newline at end of property Index: cpu/or32/Makefile.in =================================================================== --- cpu/or32/Makefile.in (revision 538) +++ cpu/or32/Makefile.in (revision 552) @@ -58,8 +58,6 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@noinst_PROGRAMS = generate$(EXEEXT) -@DYNAMIC_EXECUTION_TRUE@noinst_PROGRAMS = dyngen$(EXEEXT) subdir = cpu/or32 DIST_COMMON = $(srcdir)/Makefile.am $(srcdir)/Makefile.in ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 @@ -75,49 +73,15 @@ CONFIG_CLEAN_VPATH_FILES = LTLIBRARIES = $(noinst_LTLIBRARIES) libarch_la_LIBADD = -am__libarch_la_SOURCES_DIST = execute.c or32.c common-i386.h \ - dyn32-defs.h dyngen.h dyn-rec.h i386-regs.h op-arith-op.h \ - op-comp-op.h op-extend-op.h op-ff1-op.h op-i386.h op-lwhb-op.h \ - op-mac-op.h op-mftspr-op.h op-support.h op-swhb-op.h \ - op-t-reg-mov-op.h rec-i386.h sched-i386.h simpl32-defs.h op.c \ - dyn-rec.c op-support.c -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_FALSE@am_libarch_la_OBJECTS = \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_FALSE@ execute.lo \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_FALSE@ or32.lo -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@am_libarch_la_OBJECTS = \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@ execute.lo \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@ or32.lo -@DYNAMIC_EXECUTION_TRUE@am_libarch_la_OBJECTS = execute.lo or32.lo \ -@DYNAMIC_EXECUTION_TRUE@ op.lo dyn-rec.lo op-support.lo -@DYNAMIC_EXECUTION_TRUE@nodist_libarch_la_OBJECTS = gen-ops.lo \ -@DYNAMIC_EXECUTION_TRUE@ gen-ops-gen.lo gen-ops-rel.lo +am__libarch_la_SOURCES_DIST = execute.c or32.c simpl32-defs.h +@GENERATE_NEEDED_FALSE@am_libarch_la_OBJECTS = execute.lo or32.lo +@GENERATE_NEEDED_TRUE@am_libarch_la_OBJECTS = execute.lo or32.lo am__dist_EXTRA_libarch_la_SOURCES_DIST = insnset.c -libarch_la_OBJECTS = $(am_libarch_la_OBJECTS) \ - $(nodist_libarch_la_OBJECTS) -@DYNAMIC_EXECUTION_FALSE@am_libarch_la_rpath = -@DYNAMIC_EXECUTION_TRUE@am_libarch_la_rpath = +libarch_la_OBJECTS = $(am_libarch_la_OBJECTS) PROGRAMS = $(noinst_PROGRAMS) -am__dyngen_SOURCES_DIST = dyngen.c dyngen-i386.c dyngen-elf.c \ - common-i386.h dyn32-defs.h dyngen.h dyn-rec.h i386-regs.h \ - op-arith-op.h op-comp-op.h op-extend-op.h op-ff1-op.h \ - op-i386.h op-lwhb-op.h op-mac-op.h op-mftspr-op.h op-support.h \ - op-swhb-op.h op-t-reg-mov-op.h rec-i386.h sched-i386.h \ - simpl32-defs.h -@DYNAMIC_EXECUTION_TRUE@am_dyngen_OBJECTS = dyngen-dyngen.$(OBJEXT) \ -@DYNAMIC_EXECUTION_TRUE@ dyngen-dyngen-i386.$(OBJEXT) \ -@DYNAMIC_EXECUTION_TRUE@ dyngen-dyngen-elf.$(OBJEXT) -dyngen_OBJECTS = $(am_dyngen_OBJECTS) -dyngen_LDADD = $(LDADD) -dyngen_LINK = $(LIBTOOL) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) \ - --mode=link $(CCLD) $(dyngen_CFLAGS) $(CFLAGS) $(AM_LDFLAGS) \ - $(LDFLAGS) -o $@ -am__generate_SOURCES_DIST = or32.c generate.c common-i386.h \ - dyn32-defs.h dyngen.h dyn-rec.h i386-regs.h op-arith-op.h \ - op-comp-op.h op-extend-op.h op-ff1-op.h op-i386.h op-lwhb-op.h \ - op-mac-op.h op-mftspr-op.h op-support.h op-swhb-op.h \ - op-t-reg-mov-op.h rec-i386.h sched-i386.h simpl32-defs.h -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@am_generate_OBJECTS = generate-or32.$(OBJEXT) \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@ generate-generate.$(OBJEXT) +am__generate_SOURCES_DIST = or32.c generate.c simpl32-defs.h +@GENERATE_NEEDED_TRUE@am_generate_OBJECTS = generate-or32.$(OBJEXT) \ +@GENERATE_NEEDED_TRUE@ generate-generate.$(OBJEXT) generate_OBJECTS = $(am_generate_OBJECTS) generate_LDADD = $(LDADD) generate_LINK = $(LIBTOOL) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) \ @@ -136,12 +100,11 @@ LINK = $(LIBTOOL) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) \ --mode=link $(CCLD) $(AM_CFLAGS) $(CFLAGS) $(AM_LDFLAGS) \ $(LDFLAGS) -o $@ -SOURCES = $(libarch_la_SOURCES) $(nodist_libarch_la_SOURCES) \ - $(dist_EXTRA_libarch_la_SOURCES) $(dyngen_SOURCES) \ +SOURCES = $(libarch_la_SOURCES) $(dist_EXTRA_libarch_la_SOURCES) \ $(generate_SOURCES) DIST_SOURCES = $(am__libarch_la_SOURCES_DIST) \ $(am__dist_EXTRA_libarch_la_SOURCES_DIST) \ - $(am__dyngen_SOURCES_DIST) $(am__generate_SOURCES_DIST) + $(am__generate_SOURCES_DIST) ETAGS = etags CTAGS = ctags DISTFILES = $(DIST_COMMON) $(DIST_SOURCES) $(TEXINFOS) $(EXTRA_DIST) @@ -277,147 +240,29 @@ top_build_prefix = @top_build_prefix@ top_builddir = @top_builddir@ top_srcdir = @top_srcdir@ -@DYNAMIC_EXECUTION_FALSE@noinst_LTLIBRARIES = libarch.la -@DYNAMIC_EXECUTION_TRUE@noinst_LTLIBRARIES = libarch.la -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_FALSE@libarch_la_SOURCES = execute.c \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_FALSE@ or32.c \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_FALSE@ common-i386.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_FALSE@ dyn32-defs.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_FALSE@ dyngen.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_FALSE@ dyn-rec.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_FALSE@ i386-regs.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_FALSE@ op-arith-op.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_FALSE@ op-comp-op.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_FALSE@ op-extend-op.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_FALSE@ op-ff1-op.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_FALSE@ op-i386.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_FALSE@ op-lwhb-op.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_FALSE@ op-mac-op.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_FALSE@ op-mftspr-op.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_FALSE@ op-support.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_FALSE@ op-swhb-op.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_FALSE@ op-t-reg-mov-op.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_FALSE@ rec-i386.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_FALSE@ sched-i386.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_FALSE@ simpl32-defs.h +noinst_LTLIBRARIES = libarch.la +@GENERATE_NEEDED_TRUE@EXTRA_DIST = insnset.c +@GENERATE_NEEDED_FALSE@libarch_la_SOURCES = execute.c \ +@GENERATE_NEEDED_FALSE@ or32.c \ +@GENERATE_NEEDED_FALSE@ simpl32-defs.h -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@libarch_la_SOURCES = execute.c \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@ or32.c \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@ common-i386.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@ dyn32-defs.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@ dyngen.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@ dyn-rec.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@ i386-regs.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@ op-arith-op.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@ op-comp-op.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@ op-extend-op.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@ op-ff1-op.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@ op-i386.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@ op-lwhb-op.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@ op-mac-op.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@ op-mftspr-op.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@ op-support.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@ op-swhb-op.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@ op-t-reg-mov-op.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@ rec-i386.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@ sched-i386.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@ simpl32-defs.h +@GENERATE_NEEDED_TRUE@libarch_la_SOURCES = execute.c \ +@GENERATE_NEEDED_TRUE@ or32.c \ +@GENERATE_NEEDED_TRUE@ simpl32-defs.h -@DYNAMIC_EXECUTION_TRUE@libarch_la_SOURCES = execute.c \ -@DYNAMIC_EXECUTION_TRUE@ or32.c \ -@DYNAMIC_EXECUTION_TRUE@ op.c \ -@DYNAMIC_EXECUTION_TRUE@ dyn-rec.c \ -@DYNAMIC_EXECUTION_TRUE@ op-support.c \ -@DYNAMIC_EXECUTION_TRUE@ common-i386.h \ -@DYNAMIC_EXECUTION_TRUE@ dyn32-defs.h \ -@DYNAMIC_EXECUTION_TRUE@ dyngen.h \ -@DYNAMIC_EXECUTION_TRUE@ dyn-rec.h \ -@DYNAMIC_EXECUTION_TRUE@ i386-regs.h \ -@DYNAMIC_EXECUTION_TRUE@ op-arith-op.h \ -@DYNAMIC_EXECUTION_TRUE@ op-comp-op.h \ -@DYNAMIC_EXECUTION_TRUE@ op-extend-op.h \ -@DYNAMIC_EXECUTION_TRUE@ op-ff1-op.h \ -@DYNAMIC_EXECUTION_TRUE@ op-i386.h \ -@DYNAMIC_EXECUTION_TRUE@ op-lwhb-op.h \ -@DYNAMIC_EXECUTION_TRUE@ op-mac-op.h \ -@DYNAMIC_EXECUTION_TRUE@ op-mftspr-op.h \ -@DYNAMIC_EXECUTION_TRUE@ op-support.h \ -@DYNAMIC_EXECUTION_TRUE@ op-swhb-op.h \ -@DYNAMIC_EXECUTION_TRUE@ op-t-reg-mov-op.h \ -@DYNAMIC_EXECUTION_TRUE@ rec-i386.h \ -@DYNAMIC_EXECUTION_TRUE@ sched-i386.h \ -@DYNAMIC_EXECUTION_TRUE@ simpl32-defs.h +@GENERATE_NEEDED_TRUE@BUILT_SOURCES = execgen.c +@GENERATE_NEEDED_TRUE@noinst_PROGRAMS = generate$(EXEEXT) +@GENERATE_NEEDED_TRUE@generate_SOURCES = or32.c \ +@GENERATE_NEEDED_TRUE@ generate.c \ +@GENERATE_NEEDED_TRUE@ simpl32-defs.h -@DYNAMIC_EXECUTION_TRUE@nodist_libarch_la_SOURCES = gen-ops.h \ -@DYNAMIC_EXECUTION_TRUE@ gen-ops.c \ -@DYNAMIC_EXECUTION_TRUE@ gen-ops-gen.c \ -@DYNAMIC_EXECUTION_TRUE@ gen-ops-rel.c +@GENERATE_NEEDED_TRUE@generate_CFLAGS = $(AM_CFLAGS) +@GENERATE_NEEDED_FALSE@dist_EXTRA_libarch_la_SOURCES = insnset.c -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@BUILT_SOURCES = execgen.c -@DYNAMIC_EXECUTION_TRUE@BUILT_SOURCES = gen-ops.h \ -@DYNAMIC_EXECUTION_TRUE@ gen-ops.c \ -@DYNAMIC_EXECUTION_TRUE@ gen-ops-gen.c \ -@DYNAMIC_EXECUTION_TRUE@ gen-ops-rel.c - -@DYNAMIC_EXECUTION_TRUE@dyngen_SOURCES = dyngen.c \ -@DYNAMIC_EXECUTION_TRUE@ dyngen-i386.c \ -@DYNAMIC_EXECUTION_TRUE@ dyngen-elf.c \ -@DYNAMIC_EXECUTION_TRUE@ common-i386.h \ -@DYNAMIC_EXECUTION_TRUE@ dyn32-defs.h \ -@DYNAMIC_EXECUTION_TRUE@ dyngen.h \ -@DYNAMIC_EXECUTION_TRUE@ dyn-rec.h \ -@DYNAMIC_EXECUTION_TRUE@ i386-regs.h \ -@DYNAMIC_EXECUTION_TRUE@ op-arith-op.h \ -@DYNAMIC_EXECUTION_TRUE@ op-comp-op.h \ -@DYNAMIC_EXECUTION_TRUE@ op-extend-op.h \ -@DYNAMIC_EXECUTION_TRUE@ op-ff1-op.h \ -@DYNAMIC_EXECUTION_TRUE@ op-i386.h \ -@DYNAMIC_EXECUTION_TRUE@ op-lwhb-op.h \ -@DYNAMIC_EXECUTION_TRUE@ op-mac-op.h \ -@DYNAMIC_EXECUTION_TRUE@ op-mftspr-op.h \ -@DYNAMIC_EXECUTION_TRUE@ op-support.h \ -@DYNAMIC_EXECUTION_TRUE@ op-swhb-op.h \ -@DYNAMIC_EXECUTION_TRUE@ op-t-reg-mov-op.h \ -@DYNAMIC_EXECUTION_TRUE@ rec-i386.h \ -@DYNAMIC_EXECUTION_TRUE@ sched-i386.h \ -@DYNAMIC_EXECUTION_TRUE@ simpl32-defs.h - -@DYNAMIC_EXECUTION_TRUE@dyngen_CFLAGS = $(AM_CFLAGS) -@DYNAMIC_EXECUTION_TRUE@OP_CFLAGS = -Wall -fomit-frame-pointer -fno-reorder-blocks -O2 -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@EXTRA_DIST = insnset.c -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@generate_SOURCES = or32.c \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@ generate.c \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@ common-i386.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@ dyn32-defs.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@ dyngen.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@ dyn-rec.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@ i386-regs.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@ op-arith-op.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@ op-comp-op.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@ op-extend-op.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@ op-ff1-op.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@ op-i386.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@ op-lwhb-op.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@ op-mac-op.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@ op-mftspr-op.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@ op-support.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@ op-swhb-op.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@ op-t-reg-mov-op.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@ rec-i386.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@ sched-i386.h \ -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@ simpl32-defs.h - -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@generate_CFLAGS = $(AM_CFLAGS) -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_FALSE@dist_EXTRA_libarch_la_SOURCES = insnset.c - # If the simulator was first built without --enable-simple and then with it, # then also remove these two files CLEANFILES = execgen.c \ - generate \ - gen-ops.c \ - gen-ops.h \ - gen-ops-rel.c \ - gen-ops-gen.c + generate all: $(BUILT_SOURCES) $(MAKE) $(AM_MAKEFLAGS) all-am @@ -464,7 +309,7 @@ rm -f "$${dir}/so_locations"; \ done libarch.la: $(libarch_la_OBJECTS) $(libarch_la_DEPENDENCIES) - $(LINK) $(am_libarch_la_rpath) $(libarch_la_OBJECTS) $(libarch_la_LIBADD) $(LIBS) + $(LINK) $(libarch_la_OBJECTS) $(libarch_la_LIBADD) $(LIBS) clean-noinstPROGRAMS: @list='$(noinst_PROGRAMS)'; test -n "$$list" || exit 0; \ @@ -474,9 +319,6 @@ list=`for p in $$list; do echo "$$p"; done | sed 's/$(EXEEXT)$$//'`; \ echo " rm -f" $$list; \ rm -f $$list -dyngen$(EXEEXT): $(dyngen_OBJECTS) $(dyngen_DEPENDENCIES) - @rm -f dyngen$(EXEEXT) - $(dyngen_LINK) $(dyngen_OBJECTS) $(dyngen_LDADD) $(LIBS) generate$(EXEEXT): $(generate_OBJECTS) $(generate_DEPENDENCIES) @rm -f generate$(EXEEXT) $(generate_LINK) $(generate_OBJECTS) $(generate_LDADD) $(LIBS) @@ -487,19 +329,10 @@ distclean-compile: -rm -f *.tab.c -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/dyn-rec.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/dyngen-dyngen-elf.Po@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/dyngen-dyngen-i386.Po@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/dyngen-dyngen.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/execute.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gen-ops-gen.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gen-ops-rel.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gen-ops.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/generate-generate.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/generate-or32.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/insnset.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/op-support.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/op.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/or32.Plo@am__quote@ .c.o: @@ -523,48 +356,6 @@ @AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@ @am__fastdepCC_FALSE@ $(LTCOMPILE) -c -o $@ $< -dyngen-dyngen.o: dyngen.c -@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(dyngen_CFLAGS) $(CFLAGS) -MT dyngen-dyngen.o -MD -MP -MF $(DEPDIR)/dyngen-dyngen.Tpo -c -o dyngen-dyngen.o `test -f 'dyngen.c' || echo '$(srcdir)/'`dyngen.c -@am__fastdepCC_TRUE@ $(am__mv) $(DEPDIR)/dyngen-dyngen.Tpo $(DEPDIR)/dyngen-dyngen.Po -@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='dyngen.c' object='dyngen-dyngen.o' libtool=no @AMDEPBACKSLASH@ -@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@ -@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(dyngen_CFLAGS) $(CFLAGS) -c -o dyngen-dyngen.o `test -f 'dyngen.c' || echo '$(srcdir)/'`dyngen.c - -dyngen-dyngen.obj: dyngen.c -@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(dyngen_CFLAGS) $(CFLAGS) -MT dyngen-dyngen.obj -MD -MP -MF $(DEPDIR)/dyngen-dyngen.Tpo -c -o dyngen-dyngen.obj `if test -f 'dyngen.c'; then $(CYGPATH_W) 'dyngen.c'; else $(CYGPATH_W) '$(srcdir)/dyngen.c'; fi` -@am__fastdepCC_TRUE@ $(am__mv) $(DEPDIR)/dyngen-dyngen.Tpo $(DEPDIR)/dyngen-dyngen.Po -@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='dyngen.c' object='dyngen-dyngen.obj' libtool=no @AMDEPBACKSLASH@ -@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@ -@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(dyngen_CFLAGS) $(CFLAGS) -c -o dyngen-dyngen.obj `if test -f 'dyngen.c'; then $(CYGPATH_W) 'dyngen.c'; else $(CYGPATH_W) '$(srcdir)/dyngen.c'; fi` - -dyngen-dyngen-i386.o: dyngen-i386.c -@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(dyngen_CFLAGS) $(CFLAGS) -MT dyngen-dyngen-i386.o -MD -MP -MF $(DEPDIR)/dyngen-dyngen-i386.Tpo -c -o dyngen-dyngen-i386.o `test -f 'dyngen-i386.c' || echo '$(srcdir)/'`dyngen-i386.c -@am__fastdepCC_TRUE@ $(am__mv) $(DEPDIR)/dyngen-dyngen-i386.Tpo $(DEPDIR)/dyngen-dyngen-i386.Po -@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='dyngen-i386.c' object='dyngen-dyngen-i386.o' libtool=no @AMDEPBACKSLASH@ -@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@ -@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(dyngen_CFLAGS) $(CFLAGS) -c -o dyngen-dyngen-i386.o `test -f 'dyngen-i386.c' || echo '$(srcdir)/'`dyngen-i386.c - -dyngen-dyngen-i386.obj: dyngen-i386.c -@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(dyngen_CFLAGS) $(CFLAGS) -MT dyngen-dyngen-i386.obj -MD -MP -MF $(DEPDIR)/dyngen-dyngen-i386.Tpo -c -o dyngen-dyngen-i386.obj `if test -f 'dyngen-i386.c'; then $(CYGPATH_W) 'dyngen-i386.c'; else $(CYGPATH_W) '$(srcdir)/dyngen-i386.c'; fi` -@am__fastdepCC_TRUE@ $(am__mv) $(DEPDIR)/dyngen-dyngen-i386.Tpo $(DEPDIR)/dyngen-dyngen-i386.Po -@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='dyngen-i386.c' object='dyngen-dyngen-i386.obj' libtool=no @AMDEPBACKSLASH@ -@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@ -@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(dyngen_CFLAGS) $(CFLAGS) -c -o dyngen-dyngen-i386.obj `if test -f 'dyngen-i386.c'; then $(CYGPATH_W) 'dyngen-i386.c'; else $(CYGPATH_W) '$(srcdir)/dyngen-i386.c'; fi` - -dyngen-dyngen-elf.o: dyngen-elf.c -@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(dyngen_CFLAGS) $(CFLAGS) -MT dyngen-dyngen-elf.o -MD -MP -MF $(DEPDIR)/dyngen-dyngen-elf.Tpo -c -o dyngen-dyngen-elf.o `test -f 'dyngen-elf.c' || echo '$(srcdir)/'`dyngen-elf.c -@am__fastdepCC_TRUE@ $(am__mv) $(DEPDIR)/dyngen-dyngen-elf.Tpo $(DEPDIR)/dyngen-dyngen-elf.Po -@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='dyngen-elf.c' object='dyngen-dyngen-elf.o' libtool=no @AMDEPBACKSLASH@ -@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@ -@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(dyngen_CFLAGS) $(CFLAGS) -c -o dyngen-dyngen-elf.o `test -f 'dyngen-elf.c' || echo '$(srcdir)/'`dyngen-elf.c - -dyngen-dyngen-elf.obj: dyngen-elf.c -@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(dyngen_CFLAGS) $(CFLAGS) -MT dyngen-dyngen-elf.obj -MD -MP -MF $(DEPDIR)/dyngen-dyngen-elf.Tpo -c -o dyngen-dyngen-elf.obj `if test -f 'dyngen-elf.c'; then $(CYGPATH_W) 'dyngen-elf.c'; else $(CYGPATH_W) '$(srcdir)/dyngen-elf.c'; fi` -@am__fastdepCC_TRUE@ $(am__mv) $(DEPDIR)/dyngen-dyngen-elf.Tpo $(DEPDIR)/dyngen-dyngen-elf.Po -@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='dyngen-elf.c' object='dyngen-dyngen-elf.obj' libtool=no @AMDEPBACKSLASH@ -@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@ -@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(dyngen_CFLAGS) $(CFLAGS) -c -o dyngen-dyngen-elf.obj `if test -f 'dyngen-elf.c'; then $(CYGPATH_W) 'dyngen-elf.c'; else $(CYGPATH_W) '$(srcdir)/dyngen-elf.c'; fi` - generate-or32.o: or32.c @am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(generate_CFLAGS) $(CFLAGS) -MT generate-or32.o -MD -MP -MF $(DEPDIR)/generate-or32.Tpo -c -o generate-or32.o `test -f 'or32.c' || echo '$(srcdir)/'`or32.c @am__fastdepCC_TRUE@ $(am__mv) $(DEPDIR)/generate-or32.Tpo $(DEPDIR)/generate-or32.Po @@ -802,17 +593,9 @@ tags uninstall uninstall-am -@DYNAMIC_EXECUTION_TRUE@gen-ops.h gen-ops.c gen-ops-gen.c gen-ops-rel.c: dyngen$(EXEEXT) op-tmp.o -@DYNAMIC_EXECUTION_TRUE@ ./dyngen$(EXEEXT) op-tmp.o gen-ops.c gen-ops-gen.c gen-ops-rel.c gen-ops.h +@GENERATE_NEEDED_TRUE@execgen.c: generate$(EXEEXT) insnset.c +@GENERATE_NEEDED_TRUE@ ./generate$(EXEEXT) $(srcdir)/insnset.c execgen.c -@DYNAMIC_EXECUTION_TRUE@op-tmp.o: op.c op-t-reg-mov-op.h op-i386.h op-arith-op.h op-comp-op.h \ -@DYNAMIC_EXECUTION_TRUE@ op-extend-op.h op-ff1-op.h op-mac-op.h op-mftspr-op.h op-lwhb-op.h \ -@DYNAMIC_EXECUTION_TRUE@ op-swhb-op.h -@DYNAMIC_EXECUTION_TRUE@ $(CC) $(INCLUDES) -I$(top_builddir) $(OP_CFLAGS) -o $@ -c $< - -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@execgen.c: generate$(EXEEXT) insnset.c -@DYNAMIC_EXECUTION_FALSE@@GENERATE_NEEDED_TRUE@ ./generate$(EXEEXT) $(srcdir)/insnset.c execgen.c - # Tell versions [3.59,3.63) of GNU make to not export all variables. # Otherwise a system limit (for SysV at least) may be exceeded. .NOEXPORT:

/cpu/or32/execute.c

/cpu/or32/or32.c

/cpu/or32/Makefile.am

/cpu/common/abstract.c

/cpu/common/execute.h

/cpu/or1k/sprs.c

/cpu/or1k/except.c

/cpu/or1k/opcode/or32.h

/configure.ac

/doc/or1ksim.info

/doc/or1ksim.texi

/doc/version.texi

/sim-cmd.c

/ChangeLog

/config.h.in

/configure

/autom4te.cache/output.1

/autom4te.cache/traces.0