URL
https://opencores.org/ocsvn/pcie_ds_dma/pcie_ds_dma/trunk
Subversion Repositories pcie_ds_dma
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- This comparison shows the changes necessary to convert path
/pcie_ds_dma/trunk
- from Rev 31 to Rev 32
- ↔ Reverse comparison
Rev 31 → Rev 32
/core/ds_dma64/pcie_src/components/pcie_core/pcie_core64_wishbone_m8.vhd
85,6 → 85,9
use work.core64_pb_wishbone_pkg.all; |
use work.block_pe_main_pkg.all; |
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library unisim; |
use unisim.vcomponents.all; |
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entity pcie_core64_wishbone_m8 is |
generic |
( |
166,6 → 169,10
signal reset_p : std_logic; |
signal reset_p_z1 : std_logic; |
signal reset_p_z2 : std_logic; |
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signal clk125x : std_logic:='0'; |
signal clk125 : std_logic; |
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------------------------------------------------------------------------------- |
begin |
------------------------------------------------------------------------------- |
201,7 → 208,7
dcm_rstp => dcm_rst_out, -- S6 PCIE x1 module INV trn_reset_n_c |
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---- BAR1 (PB bus) ---- |
aclk => clk, -- !!! same clock as clk_out |
aclk => clk125, |
aclk_lock => '1', -- |
pb_master => pb_master, -- |
pb_slave => pb_slave, -- |
219,9 → 226,12
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); |
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clk125x <= not clk125x after 0.5 ns when rising_edge( clk ); |
xclk125: bufg port map( clk125, clk125x ); |
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reset_p <= (not reset) or (not brd_mode(3)); |
reset_p_z1 <= reset_p after 1 ns when rising_edge( clk ); |
reset_p_z2 <= reset_p_z1 after 1 ns when rising_edge( clk ); |
reset_p_z1 <= reset_p after 1 ns when rising_edge( clk125 ); |
reset_p_z2 <= reset_p_z1 after 1 ns when rising_edge( clk125 ); |
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-- Deal with CORE BP Input data: |
bp_data <= bp0_data when bp_sel="00" else (others=>'0'); |
262,7 → 272,7
port map |
( |
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---- BAR1 ---- |
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290,12 → 300,12
-- |
-- Module Output route: |
-- |
o_wb_clk <= clk; -- route from PW_WB wrk clock |
o_wb_clk <= clk125; -- route from PW_WB wrk clock |
-- |
pr_o_wb_rst: process( reset_p, clk ) begin |
pr_o_wb_rst: process( reset_p, clk125 ) begin |
if( reset_p='1' ) then |
o_wb_rst <= '1' after 1 ns; |
elsif( rising_edge( clk ) ) then |
elsif( rising_edge( clk125 ) ) then |
o_wb_rst <= reset_p_z2 after 1 ns; |
end if; |
end process; |