OpenCores
URL https://opencores.org/ocsvn/usb_fpga_1_2/usb_fpga_1_2/trunk

Subversion Repositories usb_fpga_1_2

Compare Revisions

  • This comparison shows the changes necessary to convert path 
    /usb_fpga_1_2/trunk
    from Rev 3 to Rev 4
    ↔ Reverse comparison
  •

Rev 3 → Rev 4

/java/FWLoader.java
1,6 → 1,6
/*!
Firmware / Bitstream loader for the ZTEX Firmware Kit
Copyright (C) 2008-2009 ZTEX e.K.
Copyright (C) 2009-2010 ZTEX e.K.
http://www.ztex.de
 
This program is free software; you can redistribute it and/or modify
46,6 → 46,7
"Ordered parameters:\n"+
" -i Info\n"+
" -ii Info + capabilities\n"+
" -if Read FPGA state\n"+
" -ru Reset EZ-USB Microcontroller\n"+
" -uu <ihx file> Upload EZ-USB Firmware\n"+
" -rf Reset FPGA\n"+
59,7 → 60,7
// process global parameters
try {
 
int usbVendorId = -1;
int usbVendorId = ZtexDevice1.ztexVendorId;
int usbProductId = -1;
boolean cypress = false;
int devNum = 0;
96,8 → 97,8
}
}
else if ( args[i].equals("-vc") ) {
usbVendorId = 0x4b4;
usbProductId = 0x8613;
usbVendorId = ZtexDevice1.cypressVendorId;
usbProductId = ZtexDevice1.cypressProductId;
}
else if ( args[i].equals("-f") ) {
forceUpload = true;
125,7 → 126,7
System.err.println(helpMsg);
System.exit(0);
}
else if ( args[i].equals("-i") || args[i].equals("-ii") || args[i].equals("-ru") || args[i].equals("-rf") || args[i].equals("-re") || args[i].equals("-rm") ) {
else if ( args[i].equals("-i") || args[i].equals("-ii") || args[i].equals("-if") || args[i].equals("-ru") || args[i].equals("-rf") || args[i].equals("-re") || args[i].equals("-rm") ) {
}
else if ( args[i].equals("-uu") || args[i].equals("-uf") || args[i].equals("-ue") || args[i].equals("-um") ) {
i+=1;
163,6 → 164,9
System.out.println( " Capabilities:\n "+str);
}
}
if ( args[i].equals("-if") ) {
ztex.printFpgaState();
}
else if ( args[i].equals("-ru") ) {
ztex.resetEzUsb();
}
/java/ztex/CapabilityException.java
1,6 → 1,6
/*!
Java Driver API for the ZTEX Firmware Kit
Copyright (C) 2008-2009 ZTEX e.K.
Copyright (C) 2009-2010 ZTEX e.K.
http://www.ztex.de
 
This program is free software; you can redistribute it and/or modify
/java/ztex/FirmwareUploadException.java
1,6 → 1,6
/*!
Java Driver API for the ZTEX Firmware Kit
Copyright (C) 2008-2009 ZTEX e.K.
Copyright (C) 2009-2010 ZTEX e.K.
http://www.ztex.de
 
This program is free software; you can redistribute it and/or modify
/java/ztex/IhxParseException.java
1,6 → 1,6
/*!
Java Driver API for the ZTEX Firmware Kit
Copyright (C) 2008-2009 ZTEX e.K.
Copyright (C) 2009-2010 ZTEX e.K.
http://www.ztex.de
 
This program is free software; you can redistribute it and/or modify
/java/ztex/InvalidFirmwareException.java
1,6 → 1,6
/*!
Java Driver API for the ZTEX Firmware Kit
Copyright (C) 2008-2009 ZTEX e.K.
Copyright (C) 2009-2010 ZTEX e.K.
http://www.ztex.de
 
This program is free software; you can redistribute it and/or modify
/java/ztex/BitstreamReadException.java
1,6 → 1,6
/*!
Java Driver API for the ZTEX Firmware Kit
Copyright (C) 2008-2009 ZTEX e.K.
Copyright (C) 2009-2010 ZTEX e.K.
http://www.ztex.de
 
This program is free software; you can redistribute it and/or modify
/java/ztex/AlreadyConfiguredException.java
1,6 → 1,6
/*!
Java Driver API for the ZTEX Firmware Kit
Copyright (C) 2008-2009 ZTEX e.K.
Copyright (C) 2009-2010 ZTEX e.K.
http://www.ztex.de
 
This program is free software; you can redistribute it and/or modify
/java/ztex/UsbException.java
1,6 → 1,6
/*!
Java Driver API for the ZTEX Firmware Kit
Copyright (C) 2008-2009 ZTEX e.K.
Copyright (C) 2009-2010 ZTEX e.K.
http://www.ztex.de
 
This program is free software; you can redistribute it and/or modify
/java/ztex/IhxFileDamagedException.java
1,6 → 1,6
/*!
Java Driver API for the ZTEX Firmware Kit
Copyright (C) 2008-2009 ZTEX e.K.
Copyright (C) 2009-2010 ZTEX e.K.
http://www.ztex.de
 
This program is free software; you can redistribute it and/or modify
/java/ztex/Ztex1.java
1,6 → 1,6
/*!
Java Driver API for the ZTEX Firmware Kit
Copyright (C) 2008-2009 ZTEX e.K.
Copyright (C) 2009-2010 ZTEX e.K.
http://www.ztex.de
 
This program is free software; you can redistribute it and/or modify
44,7 → 44,7
private ZtexDevice1 dev = null;
private boolean oldDevices[] = new boolean[128];
private String usbBusName = null;
/** * Setting to true will enable certain workarounds, e.g. to deal with bad driver/OS implementations. */
/** * Setting to true enables certain workarounds, e.g. to deal with bad driver/OS implementations. */
public boolean certainWorkarounds = false;
/** * The timeout for control messages in ms. */
public int controlMsgTimeout = 1000; // in ms
60,8 → 60,8
dev = pDev;
 
handle = LibusbJava.usb_open(dev.dev());
if ( handle<=0 )
throw new UsbException(dev.dev(), "Error opening device");
// if ( handle<=0 )
// throw new UsbException(dev.dev(), "Error opening device");
}
 
// ******* finalize ************************************************************
298,6 → 298,54
vendorRequest2(cmd, func, 0, 0, buf, maxlen);
}
 
 
 
// ******* setConfiguration ****************************************************
/**
* Sets the configuration.
* @param config The configuration number (usually 1)
* @throws UsbException if an error occurs while attempting to set the configuration.
*/
public void setConfiguration ( int config) throws UsbException{
if ( LibusbJava.usb_set_configuration(handle(), config) < 0 )
throw new UsbException("Setting configuration to " + config + " failed: " + LibusbJava.usb_strerror());
}
 
 
// ******* trySetConfiguration ****************************************************
/**
* Tries to set the configuration.
* If an error occurs while attempting to set the configuration, a warning messaage is printed to stderr.
* @param config The configuration number (usually 1)
*/
public void trySetConfiguration ( int config) {
if ( LibusbJava.usb_set_configuration(handle(), config) < 0 )
System.err.println("Setting configuration to " + config + " failed: " + LibusbJava.usb_strerror());
}
 
 
// ******* claimInterface ******************************************************
/**
* Claims an interface.
* @param iface The interface number (usually 0)
* @throws UsbException if an error occurs while attempting to claim the interface.
*/
public void claimInterface ( int iface) throws UsbException{
if ( LibusbJava.usb_claim_interface(handle(), iface) < 0 )
throw new UsbException("Claiming interface " + iface + " failed: " + LibusbJava.usb_strerror());
}
 
 
// ******* releaseInterface ****************************************************
/**
* Releases an interface.
* @param iface The interface number (usually 0)
*/
public void releaseInterface ( int iface ) {
LibusbJava.usb_release_interface(handle(), iface);
}
 
 
// ******* findOldDevices ******************************************************
private synchronized void findOldDevices () {
Usb_Bus bus = dev.dev().getBus();
/java/ztex/package.html
51,7 → 51,7
</table>
 
<p>
<h2>System overview</h2>
<h2>SDK overview</h2>
The following diagram gives an overview about the usage of the different parts of the <a href="http://www.ztex.de/firmware-kit/index.e.html">ZTEX EZ-USB SDK</a>.
<p>
<img src="../../imgs/ztex_firmware_kit-diagram.png" width="660" height="600" alt="ZTEX EZ-USB SDK overview for Linux and Windows">
/java/ztex/BitstreamUploadException.java
1,6 → 1,6
/*!
Java Driver API for the ZTEX Firmware Kit
Copyright (C) 2008-2009 ZTEX e.K.
Copyright (C) 2009-2010 ZTEX e.K.
http://www.ztex.de
 
This program is free software; you can redistribute it and/or modify
/java/ztex/DeviceLostException.java
1,6 → 1,6
/*!
Java Driver API for the ZTEX Firmware Kit
Copyright (C) 2008-2009 ZTEX e.K.
Copyright (C) 2009-2010 ZTEX e.K.
http://www.ztex.de
 
This program is free software; you can redistribute it and/or modify
/java/ztex/IncompatibleFirmwareException.java
1,6 → 1,6
/*!
Java Driver API for the ZTEX Firmware Kit
Copyright (C) 2008-2009 ZTEX e.K.
Copyright (C) 2009-2010 ZTEX e.K.
http://www.ztex.de
 
This program is free software; you can redistribute it and/or modify
/java/ztex/Ztex1v1.java
1,6 → 1,6
/*!
Java Driver API for the ZTEX Firmware Kit
Copyright (C) 2008-2009 ZTEX e.K.
Copyright (C) 2009-2010 ZTEX e.K.
http://www.ztex.de
 
This program is free software; you can redistribute it and/or modify
226,6 → 226,8
private int fpgaChecksum = 0;
private int fpgaBytes = 0;
private int fpgaInitB = 0;
private int fpgaFlashResult = 255;
private boolean fpgaFlashBitSwap = false;
/** * Number of bytes written to EEPROM. (Obtained by {@link #eepromState()}.) */
public int eepromBytes = 0;
252,6 → 254,8
public static final int FLASH_EC_READ_ERROR = 5;
/** * Signals an error while attempting to write to Flash. */
public static final int FLASH_EC_WRITE_ERROR = 6;
/** * Signals the the installed Flash memeory is not supported. */
public static final int FLASH_EC_NOTSUPPORTED = 7;
 
// ******* Ztex1v1 *************************************************************
/**
346,16 → 350,18
 
// ******* getFpgaState ********************************************************
private void getFpgaState () throws UsbException, InvalidFirmwareException, CapabilityException {
byte[] buffer = new byte[7];
byte[] buffer = new byte[9];
checkCapability(0,1);
vendorRequest2(0x30, "getFpgaState", buffer, 7);
vendorRequest2(0x30, "getFpgaState", buffer, 9);
fpgaConfigured = buffer[0] == 0;
fpgaChecksum = buffer[1] & 0xff;
fpgaBytes = ((buffer[5] & 0xff)<<24) | ((buffer[4] & 0xff)<<16) | ((buffer[3] & 0xff)<<8) | (buffer[2] & 0xff);
fpgaInitB = buffer[6] & 0xff;
fpgaFlashResult = buffer[7];
fpgaFlashBitSwap = buffer[8] != 0;
}
 
// ******* getFpgaState ********************************************************
// ******* printFpgaState ******************************************************
/**
* Prints out the FPGA state.
* @throws InvalidFirmwareException if interface 1 is not supported.
364,7 → 370,7
*/
public void printFpgaState () throws UsbException, InvalidFirmwareException, CapabilityException {
getFpgaState();
System.out.println( "size=" + fpgaBytes + " ; checksum=" + fpgaChecksum + "; INIT_B_HIST=" + fpgaInitB +" (should be 222)" );
System.out.println( "size=" + fpgaBytes + "; checksum=" + fpgaChecksum + "; INIT_B_HIST=" + fpgaInitB +" (should be 222); flash_configuration_result=" + fpgaFlashResult );
}
 
// ******* getFpgaConfiguration ************************************************
484,8 → 490,8
+ fpgaChecksum + " , should be " + cs + "; INIT_B_HIST=" + fpgaInitB +", should be 222)" );
}
// System.out.println( "FPGA configuration: size=" + fpgaBytes + " , " + (bs - fpgaBytes) + " bytes went lost; checksum=" + fpgaChecksum + " , should be " + cs + "; INIT_B_HIST=" + fpgaInitB +", should be 222" );
if ( fpgaInitB != 222 )
System.err.println ( "Warning: FPGA configuration may have failed: DONE pin has gone high but INIT_B states are wrong: " + fpgaInitB +", should be 222");
// if ( fpgaInitB != 222 )
// System.err.println ( "Warning: FPGA configuration may have failed: DONE pin has gone high but INIT_B states are wrong: " + fpgaInitB +", should be 222");
tries = 0;
t0 += new Date().getTime();
755,6 → 761,8
return "Read error";
case FLASH_EC_WRITE_ERROR:
return "Write error";
case FLASH_EC_NOTSUPPORTED:
return "Not supported";
}
return "Error " + errNum;
}
838,7 → 846,7
throw new CapabilityException(this, "No Flash memory installed or");
 
try {
vendorRequest2( 0x41, "Flash Read", sector, 0, buf, flashSectorSize );
vendorRequest2( 0x41, "Flash Read", sector, sector >> 16, buf, flashSectorSize );
}
catch ( UsbException e ) {
throw new UsbException( dev().dev(), "Flash Read: " + flashStrError() );
861,7 → 869,7
throw new CapabilityException(this, "No Flash memory installed or");
 
try {
vendorCommand2( 0x42, "Flash Write", sector, 0, buf, flashSectorSize );
vendorCommand2( 0x42, "Flash Write", sector, sector >> 16, buf, flashSectorSize );
}
catch ( UsbException e ) {
throw new UsbException( dev().dev(), "Flash Write: " + flashStrError() );
926,7 → 934,7
* @throws CapabilityException if Flash memory access is not supported by the firmware.
*/
public long flashSize () throws UsbException, InvalidFirmwareException, CapabilityException {
return flashSectorSize() * flashSectors();
return flashSectorSize() * (long)flashSectors();
}
 
// ******* printMmcState *******************************************************
939,15 → 947,16
* @throws CapabilityException if Flash memory access is not supported by the firmware.
*/
public boolean printMmcState ( ) throws UsbException, InvalidFirmwareException, CapabilityException {
byte[] buf = new byte[22];
byte[] buf = new byte[23];
checkCapability(0,2);
vendorRequest2(0x43, "MMC State", 0, 0, buf, 22);
vendorRequest2(0x43, "MMC State", 0, 0, buf, 23);
System.out.println("status=" + Integer.toBinaryString(256+(buf[0] & 255)).substring(1) + "." + Integer.toBinaryString(256+(buf[1] & 255)).substring(1) +
" lastCmd=" + buf[3] +
" lastCmdResponse=" + Integer.toBinaryString(256+(buf[4] & 255)).substring(1) +
" ec=" + buf[2] +
" BUSY=" + buf[21] +
" buf=" + (buf[5] & 255)+" "+(buf[6] & 255)+" "+(buf[7] & 255)+" "+(buf[8] & 255)+" "+(buf[9] & 255)+" "+(buf[10] & 255)+" "+(buf[11] & 255)); // +" "+(buf[12] & 255)+" "+(buf[13] & 255)+" "+(buf[14] & 255)+" "+(buf[15] & 255)+" "+(buf[16] & 255));
" BUSY=" + buf[22] +
" SDHC=" + buf[5] +
" buf=" + (buf[6] & 255)+" "+(buf[7] & 255)+" "+(buf[8] & 255)+" "+(buf[9] & 255)+" "+(buf[10] & 255)+" "+(buf[11] & 255)+" "+(buf[12] & 255)); // +" "+(buf[13] & 255)+" "+(buf[14] & 255)+" "+(buf[15] & 255)+" "+(buf[16] & 255)+" "+(buf[17] & 255));
 
return flashEnabled == 1;
}
1001,9 → 1010,11
* @throws BitstreamReadException if an error occurred while attempting to read the Bitstream.
*/
public long flashUploadBitstream ( String fwFileName ) throws BitstreamReadException, UsbException, InvalidFirmwareException, CapabilityException {
checkCapability(0,1);
checkCapability(0,2);
if ( ! flashEnabled() )
throw new CapabilityException(this, "No Flash memory installed or");
getFpgaState();
// read the Bitstream file
byte[][] buffer = new byte[2048][];
1014,6 → 1025,19
for ( i=0; i<buffer.length && j==flashSectorSize; i++ ) {
buffer[i] = new byte[flashSectorSize];
j = inputStream.read( buffer[i] );
if ( fpgaFlashBitSwap ) {
for (int k=0; k<flashSectorSize; k++ ) {
byte b = buffer[i][k];
buffer[i][k] = (byte) ( ((b & 128) >> 7) |
((b & 64) >> 5) |
((b & 32) >> 3) |
((b & 16) >> 1) |
((b & 8) << 1) |
((b & 4) << 3) |
((b & 2) << 5) |
((b & 1) << 7));
}
}
if ( j < 0 )
j = 0;
}
/java/ztex/ZtexIhxFile1.java
1,6 → 1,6
/*!
Java Driver API for the ZTEX Firmware Kit
Copyright (C) 2008-2009 ZTEX e.K.
Copyright (C) 2009-2010 ZTEX e.K.
http://www.ztex.de
 
This program is free software; you can redistribute it and/or modify
/java/ztex/JInputStream.java
1,6 → 1,6
/*!
Java Driver API for the ZTEX Firmware Kit
Copyright (C) 2008-2009 ZTEX e.K.
Copyright (C) 2009-2010 ZTEX e.K.
http://www.ztex.de
 
This program is free software; you can redistribute it and/or modify
/java/ztex/IhxFile.java
1,6 → 1,6
/*!
Java Driver API for the ZTEX Firmware Kit
Copyright (C) 2008-2009 ZTEX e.K.
Copyright (C) 2009-2010 ZTEX e.K.
http://www.ztex.de
 
This program is free software; you can redistribute it and/or modify
/java/ztex/EzUsb.java
1,6 → 1,6
/*!
Java Driver API for the ZTEX Firmware Kit
Copyright (C) 2008-2009 ZTEX e.K.
Copyright (C) 2009-2010 ZTEX e.K.
http://www.ztex.de
 
This program is free software; you can redistribute it and/or modify
/java/ztex/ZtexScanBus1.java
1,6 → 1,6
/*!
Java Driver API for the ZTEX Firmware Kit
Copyright (C) 2008-2009 ZTEX e.K.
Copyright (C) 2009-2010 ZTEX e.K.
http://www.ztex.de
 
This program is free software; you can redistribute it and/or modify
/java/ztex/ZtexDevice1.java
1,6 → 1,6
/*!
Java Driver API for the ZTEX Firmware Kit
Copyright (C) 2008-2009 ZTEX e.K.
Copyright (C) 2009-2010 ZTEX e.K.
http://www.ztex.de
 
This program is free software; you can redistribute it and/or modify
30,6 → 30,7
* A class representing an EZ-USB device that supports the ZTEX descriptor 1 or an unconfigured EZ-USB device.<br>
* Instances of this class are usually created by {@link ZtexScanBus1}.
* The following table describes the ZTEX descriptor 1.
* <a name="descriptor"></a>
* <table bgcolor="#404040" cellspacing=1 cellpadding=4>
* <tr>
* <td bgcolor="#d0d0d0" valign="top"><b>Field name</b></td>
114,11 → 115,31
*/
 
public class ZtexDevice1 {
/** * The Cypress vendor ID 0x4b4. */
/** * Cypress vendor ID: 0x4b4 */
public static final int cypressVendorId = 0x4b4;
/** * The EZ-USB product ID 0x8613. */
/** * EZ-USB USB product ID: 0x8613 */
public static final int cypressProductId = 0x8613;
 
/** * ZTEX vendor ID: 0x221a */
public static final int ztexVendorId = 0x221A;
/**
* USB product ID for ZTEX devices that support ZTEX descriptor 1: 0x100.
* This product ID is intended for general purpose use and can be shared by all devices that base on ZTEX modules.
* Different products are identified by a second product ID, namely the PRODUCT_ID field of the <a href="#descriptor"> ZTEX descriptor 1</a>.
* <p>
* Please read the <a href="http://www.ztex.de/firmware-kit/usb_ids.e.html">informations about USB vendor and product ID's<a>.
* @see #ztexProductIdMax
*/
public static final int ztexProductId = 0x100;
/**
* Largest USB product ID for ZTEX devices that support ZTEX descriptor 1: 0x1ff.
* USB product ID's from {@link #ztexProductId}+1 to ztexProductIdMax (0x101 to 0x1ff) are reserved for ZTEX devices and allow to identify products without reading the ZTEX descriptor.
* <p>
* Please read the <a href="http://www.ztex.de/firmware-kit/usb_ids.e.html">informations about USB vendor and product ID's<a>.
* @see #ztexProductId
*/
public static final int ztexProductIdMax = 0x1ff;
 
private Usb_Device dev = null;
private boolean isCypress = false; // true if Cypress device
private boolean valid = false; // true if descriptor 1 is available
175,7 → 196,7
int handle = LibusbJava.usb_open(dev);
 
if ( handle > 0 ) {
// if ( handle > 0 ) {
if ( dd.getIManufacturer() > 0 )
manufacturerString = LibusbJava.usb_get_string_simple( handle, dd.getIManufacturer() );
if ( dd.getIProduct() > 0 )
183,7 → 204,7
if ( dd.getISerialNumber() > 0 )
snString = LibusbJava.usb_get_string_simple( handle, dd.getISerialNumber() );
if ( usbVendorId == pUsbVendorId && usbProductId == pUsbProductId ) {
if ( usbVendorId == pUsbVendorId && (usbProductId == pUsbProductId || ( usbVendorId == ztexVendorId && pUsbProductId<0 && usbProductId>=ztexProductId && usbProductId<ztexProductIdMax ) ) ) {
if ( snString == null ) {
LibusbJava.usb_close(handle);
throw new InvalidFirmwareException( dev, "Not a ZTEX device" ); // ZTEX devices always have a SN. See also the next comment a few lines below
230,10 → 251,10
valid = true;
}
}
else {
throw new UsbException( dev, "Error opening device: " + LibusbJava.usb_strerror() );
}
// }
// else {
// throw new UsbException( dev, "Error opening device: " + LibusbJava.usb_strerror() );
// }
LibusbJava.usb_close(handle);
}
244,7 → 265,7
* @return a string representation if the device with a lot of useful information.
*/
public String toString () {
return "bus=" + dev().getBus().getDirname() + " device=" + dev().getFilename() +
return "bus=" + dev().getBus().getDirname() + " device=" + dev().getFilename() + " ID=" + Integer.toHexString(usbVendorId) + ":" + Integer.toHexString(usbProductId) +
"\n " + ( isCypress ? "Cypress" : "" ) +
( manufacturerString == null ? "" : (" Manufacturer=\"" + manufacturerString + "\"") ) +
( productString == null ? "" : (" Product=\"" + productString + "\"") ) +
/Makefile.mk
3,7 → 3,7
# The following variables are used:
#
# ZTEXPREFIX
# Defines location if this firmware / driver kit.
# Defines the location of the EZ-USB SDK
# Must be defined!
# Example: ZTEXPREFIX=../../..
#
28,11 → 28,18
# Example: IHXEXTRADEPS:=$(shell echo $(ZTEXPREFIX)/include/*.h)
#
# EXTRAJARFILES
# Extra files that should be included into th jar achieve
# Extra files that should be included into the jar archive
# Example: EXTRAJARFILES=ucecho.ihx fpga/ucecho.bin
 
.PHONY: all ihx jar clean distclean
# EXTRACLEANFILES
# Extra files that should be cleaned by target "clean"
 
# EXTRADISTCLEANFILES
# Extra files that should be cleaned by target "distclean"
 
 
.PHONY: all ihx jar clean distclean default
 
JAVAC=javac
SDCC=$(ZTEXPREFIX)/bin/bmpsdcc.sh
CLASSPATH:=.:$(ZTEXPREFIX)/libusbJava:$(ZTEXPREFIX)/java:$(CLASSPATH)
55,7 → 62,9
rm -f *~ *.bak *.old
rm -f *.class
rm -f *.rel *.rst *.lnk *.lst *.map *.asm *.sym *.mem *.tmp.c
rm -f $(EXTRACLEANFILES)
 
distclean: clean
rm -f $(JARTARGET)
rm -f *.ihx
rm -f $(EXTRADISTCLEANFILES)
/include/ztex-descriptors.h
1,6 → 1,6
/*!
ZTEX Firmware Kit for EZ-USB Microcontrollers
Copyright (C) 2008-2009 ZTEX e.K.
Copyright (C) 2009-2010 ZTEX e.K.
http://www.ztex.de
 
This program is free software; you can redistribute it and/or modify
49,6 → 49,7
1.*.*.* // may be used for experimental purposes
10.*.*.* // used for ZTEX products
10.11.*.* // ZTEX USB-FPGA-Module 1.2
10.12.*.* // ZTEX USB-FPGA-Module 1.10
10.20.*.* // ZTEX USB-Module 1.0
Please contact me (http://www.ztex.de --> Impressum/Kontakt) if you want to register/reserve a Product ID (range).
81,11 → 82,11
 
/* Are Vendor ID and Product ID defined? */
#ifndef[USB_VENDOR_ID]
#error[No USB Vendor ID defined (you may use the Cypress Vendor ID 0x04b4 (only !) for development purposes)]
#error[No USB Vendor ID defined]
#endif
 
#ifndef[USB_PRODUCT_ID]
#error[No USB Product ID defined (you may use the FX2 Product ID 0x8613 from Cypress (only !) during the development process)]
#error[No USB Product ID defined]
#endif
 
/* Prepare the Interfaces, i.e. check which interfaces are defined */
213,22 → 214,22
#else
#error[Invalid type for endpoint $0: `EP$0_TYPE' (`ISO', 'BULK' or `INT' expected)]
#endif
#ifeq[EP$0_SIZE][64] // to avoid stupid warnings
,64 // 4, max. packet size (L)
,0 // 5, max. packet size (H)
#else
#ifdef[HIGH_SPEED]
,EP$0_SIZE & 0xff // 4, max. packet size (L)
,EP$0_SIZE >> 8 // 5, max. packet size (H)
#ifneq[EP$0_TYPE][BULK]
| ( (EP$0_PPMF-1) << 3 )
#endif
#else
,64 // 4, max. packet size (L)
,0 // 5, max. packet size (H)
#endif
#endif
#ifeq[EP$0_TYPE][ISO]
,1 // 6, Polling interval
#ifeq[EP$0_TYPE][BULK]
,0 // 6, Polling interval
#elifeq[EP$0_TYPE][ISO]
 
#else
,0 // 6, Polling interval
 
#endif
]
252,7 → 253,7
#endif
#endif
#endif
,0 // 3, Alternate setting
,0 // 3, Alternate setting 0
,0 // 4, Number of end points
#ifeq[EP1IN_INTERFACE][$0]
+1
384,8 → 385,8
{
9 // 0, Descriptor length
,0x02 // 1, Decriptor type
,sizeof(HighSpeedConfigDescriptor) & 0xff // 2, Total length (LSB)
// ,sizeof(HighSpeedConfigDescriptor) >> 8 // 3, Total length (MSB)
,sizeof(FullSpeedConfigDescriptor) & 0xff // 2, Total length (LSB)
// ,sizeof(FullSpeedConfigDescriptor) >> 8 // 3, Total length (MSB)
,0 // 3, To avoid warnings, descriptor length will never exceed 255 bytes
,0 // 4, Number of Interfaces
#ifdef[CONFIG_INTERFACE0]
/include/ztex.h
1,6 → 1,6
/*!
ZTEX Firmware Kit for EZ-USB Microcontrollers
Copyright (C) 2008-2009 ZTEX e.K.
Copyright (C) 2009-2010 ZTEX e.K.
http://www.ztex.de
 
This program is free software; you can redistribute it and/or modify
23,6 → 23,8
#ifndef[ZTEX_H]
#define[ZTEX_H]
 
#define[INIT_CMDS;][]
 
/* *********************************************************************
***** include the basic functions ***********************************
********************************************************************* */
65,11 → 67,21
#define[MMC_BIT_CLK][5]
#include[ztex-flash1.h]
 
#elifeq[PRODUCT_IS][UM-1_10]
#elifeq[PRODUCT_IS][UFM-1_10]
#define[MMC_PORT][A]
#define[MMC__PORT_DO][D]
#define[MMC_BIT_DO][0]
#define[MMC_BIT_CS][5]
#define[MMC_BIT_DI][6]
#define[MMC_BIT_CLK][7]
#include[ztex-flash1.h]
 
#elifeq[PRODUCT_IS][UFM-1_11]
#define[MMC_PORT][C]
#define[MMC_BIT_CS][4]
#define[MMC_BIT_DI][5]
#define[MMC_BIT_DO][7]
#define[MMC__PORT_DO][D]
#define[MMC_BIT_DO][0]
#define[MMC_BIT_CS][5]
#define[MMC_BIT_DI][7]
#define[MMC_BIT_CLK][6]
#include[ztex-flash1.h]
 
83,11 → 95,15
***** FPGA configuration support ************************************
********************************************************************* */
#ifeq[PRODUCT_IS][UFM-1_0]
#include[ztex-fpga.h]
#include[ztex-fpga1.h]
#elifeq[PRODUCT_IS][UFM-1_1]
#include[ztex-fpga.h]
#include[ztex-fpga1.h]
#elifeq[PRODUCT_IS][UFM-1_2]
#include[ztex-fpga.h]
#include[ztex-fpga1.h]
#elifeq[PRODUCT_IS][UFM-1_10]
#include[ztex-fpga2.h]
#elifeq[PRODUCT_IS][UFM-1_11]
#include[ztex-fpga3.h]
#endif
 
/* *********************************************************************
155,8 → 171,16
#elifeq[PRODUCT_IS][UFM-1_2]
IOA1 = 1;
OEA |= bmBIT1;
#elifeq[PRODUCT_IS][UFM-1_10]
IOA1 = 1;
OEA |= bmBIT1;
#elifeq[PRODUCT_IS][UFM-1_11]
IOA1 = 1;
OEA |= bmBIT1;
#endif
 
INIT_CMDS;
 
EA = 0;
EUSB = 0;
 
/include/ezregs.h
1,6 → 1,6
/*!
ZTEX Firmware Kit for EZ-USB Microcontrollers
Copyright (C) 2008-2009 ZTEX e.K.
Copyright (C) 2009-2010 ZTEX e.K.
http://www.ztex.de
 
This program is free software; you can redistribute it and/or modify
/include/ztex-fpga-flash.h
0,0 → 1,142
/*!
ZTEX Firmware Kit for EZ-USB Microcontrollers
Copyright (C) 2009-2010 ZTEX e.K.
http://www.ztex.de
 
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License version 3 as
published by the Free Software Foundation.
 
This program is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
General Public License for more details.
 
You should have received a copy of the GNU General Public License
along with this program; if not, see http://www.gnu.org/licenses/.
!*/
 
/*
Common functions for FPGA configuration from flash memory
*/
 
 
code BYTE fpga_flash_boot_id[] = {'Z','T','E', 'X', 'B', 'S', '\1', '\1'};
 
/* *********************************************************************
***** fpga_configure_from_flash *************************************
********************************************************************* */
/*
Configure the FPGA using a bitstream from flash.
If force == 0 a already configured FPGA is not re-configured.
Return values:
0 : configuration successfull
1 : fpga already configured
2 : Flash error
3 : No bitstream found
4 : Configuration error
 
The format of the boot sector (secor 0 of the flash memeory) is
0..7 ID, must be "ZTEXBS",1,1
8..9 Number of used sectors, or 0 is disabled
10..11 Number of bytes in the last sector, i.e. th total size of bitstream is ((bs[8] | (bs[9]<<8) - 1) * flash_sector_size + ((bs[10] | (bs[11]<<8)
the rest of the sector is reserved for future use and preserved by the host software
*/
 
BYTE fpga_configure_from_flash( BYTE force) {
WORD i,j,k;
if ( force == 0 ) {
OEA &= ~bmBIT1;
if ( IOA1 ) { // FPGA already configured
IOA1 = 1;
OEA |= bmBIT1;
return 1;
}
}
{
PRE_FPGA_RESET
}
reset_fpga_flash(); // reset FPGA
 
// read the boot sector
if ( flash_read_init( 0 ) ) // prepare reading sector 0
return 2;
for ( i=0; i<8 && flash_read_byte()==fpga_flash_boot_id[i]; i++ );
if ( i != 8 ) {
flash_read_finish(flash_sector_size - i); // dummy-read the rest of the sector + finish read opration
return 3;
}
i = flash_read_byte();
i |= flash_read_byte() << 8;
j = flash_read_byte();
j |= flash_read_byte() << 8;
flash_read_finish(flash_sector_size - 12); // dummy-read the rest of the sector + finish read opration
if ( i==0 )
return 3;
 
// read the bitstream
for ( k=1; k<i; k++ ) {
if ( flash_read_init( k ) ) // prepare reading sector k
return 2;
fpga_send_bitstream_from_flash( flash_sector_size );
flash_read_finish(0); // finish read opration
}
if ( flash_read_init( i ) ) // prepare reading sector i
return 2;
fpga_send_bitstream_from_flash( j );
flash_read_finish(flash_sector_size - j); // finish read opration
finish_fpga_configuration(); // finish the FPGA configuration
 
OEA &= ~bmBIT1;
if ( IOA1 ) { // FPGA configured
IOA1 = 1;
OEA |= bmBIT1;
return 0;
}
IOA1 = 1;
OEA |= bmBIT1;
return 4; // FPGA not configured correctly
}
 
/* *********************************************************************
***** fpga_first_free_sector ****************************************
********************************************************************* */
// First free sector. Returns 0 if no boot sector exeists.
// Use the macro FLASH_FIRST_FREE_SECTOR instead of this function.
#define[FLASH_FIRST_FREE_SECTOR][fpga_first_free_sector()];
WORD fpga_first_free_sector() {
BYTE i,j;
flash_read_init( 0 ); // prepare reading sector 0
for ( i=0; i<8 && flash_read_byte()==fpga_flash_boot_id[i]; i++ );
if ( i != 8 ) {
flash_read_finish(flash_sector_size - i); // dummy-read the rest of the sector + finish read opration
return 0;
}
i=flash_read_byte();
j=flash_read_byte();
flash_read_finish(flash_sector_size - 10); // dummy-read the rest of the sector + finish read opration
return (i | (j<<8))+1;
}
 
 
/* *********************************************************************
***** fpga_configure_from_flash_init ********************************
********************************************************************* */
// this function is colled by init_USB;
void fpga_configure_from_flash_init() {
fpga_flash_result = fpga_configure_from_flash(0);
if ( fpga_flash_result == 1 ) {
post_fpga_config();
}
else if ( fpga_flash_result == 4 ) {
fpga_flash_result = fpga_configure_from_flash(0); // up to two tries
}
}
 
 
#define[INIT_CMDS;][INIT_CMDS;
fpga_flash_result= 255;
]
/include/ztex-HSFPGAConf.h
1,6 → 1,6
/*!
ZTEX Firmware Kit for EZ-USB Microcontrollers
Copyright (C) 2008-2009 ZTEX e.K.
Copyright (C) 2009-2010 ZTEX e.K.
http://www.ztex.de
 
This program is free software; you can redistribute it and/or modify
/include/ztex-flash1.h
1,6 → 1,6
/*!
ZTEX Firmware Kit for EZ-USB Microcontrollers
Copyright (C) 2008-2009 ZTEX e.K.
Copyright (C) 2009-2010 ZTEX e.K.
http://www.ztex.de
 
This program is free software; you can redistribute it and/or modify
54,6 → 54,16
#error[MMC_BIT_CLK not defined]
#endif
 
#ifndef[MMC__PORT_DO]
#define[MMC__PORT_DO][MMC_PORT]
#endif
 
#ifdef[MMC_bmMODE]
#ifneq[MMC__PORT_DO][MMC_PORT]
#error[MMC__PORT_DO and MMC_PORT must be equal]
#endif
#endif
 
#define[MMC_bmCS][bmBITMMC_BIT_CS]
#define[MMC_bmDI][bmBITMMC_BIT_DI]
#define[MMC_bmDO][bmBITMMC_BIT_DO]
60,12 → 70,13
#define[MMC_bmCLK][bmBITMMC_BIT_CLK]
 
#define[MMC_IO][IOMMC_PORT]
#define[MMC__IO_DO][IOMMC__PORT_DO]
 
#ifndef[MMC_bmMODE]
#define[MMC_CS][IOMMC_PORTMMC_BIT_CS]
#define[MMC_CLK][IOMMC_PORTMMC_BIT_CLK]
#define[MMC_DI][IOMMC_PORTMMC_BIT_DI]
#define[MMC_DO][IOMMC_PORTMMC_BIT_DO]
#define[MMC_DO][IOMMC__PORT_DOMMC_BIT_DO]
#endif
 
// may be redefined if the first sectors are reserved (e.g. for a FPGA bitstream)
78,7 → 89,8
 
xdata BYTE mmc_last_cmd; // 0
xdata BYTE mmc_response; // 1
xdata BYTE mmc_buffer[16]; // 2
xdata BYTE mmc_version; // 2
xdata BYTE mmc_buffer[16]; // 3
 
#define[FLASH_EC_CMD_ERROR][1]
#define[FLASH_EC_TIMEOUT][2]
86,6 → 98,7
#define[FLASH_EC_PENDING][4]
#define[FLASH_EC_READ_ERROR][5]
#define[FLASH_EC_WRITE_ERROR][6]
#define[FLASH_EC_NOTSUPPORTED][7]
 
/* *********************************************************************
***** mmc_clocks ****************************************************
641,7 → 654,7
flash_ec = FLASH_EC_BUSY;
MMC_IO |= MMC_bmDI; // avoids that in-data is interpreted as command
for (i=0; (flash_read_byte()!=255) && i<65535; i++ ) ;
if ( MMC_IO & MMC_bmDO ) {
if ( MMC__IO_DO & MMC_bmDO ) {
flash_ec = 0;
return 0;
}
731,13 → 744,22
mmc_deselect();
return FLASH_EC_BUSY;
}
mmc_clocks(8); // 8 dummy clocks
mmc_last_cmd = 17;
mmc_buffer[0] = 17 | 64;
s = s << 1;
mmc_buffer[1] = s >> 16;
mmc_buffer[2] = s >> 8;
mmc_buffer[3] = s;
mmc_buffer[4] = 0;
if ( mmc_version == 0 ) {
s = s << 1;
mmc_buffer[1] = s >> 16;
mmc_buffer[2] = s >> 8;
mmc_buffer[3] = s;
mmc_buffer[4] = 0;
}
else {
mmc_buffer[1] = s >> 24;
mmc_buffer[2] = s >> 16;
mmc_buffer[3] = s >> 8;
mmc_buffer[4] = s;
}
mmc_buffer[5] = 1;
flash_write(mmc_buffer,6);
mmc_read_response();
787,14 → 809,22
mmc_deselect();
return FLASH_EC_BUSY;
}
mmc_clocks(8);
mmc_clocks(8); // 8 dummy clocks
mmc_last_cmd = 24;
mmc_buffer[0] = 24 | 64;
s = s << 1;
mmc_buffer[1] = s >> 16;
mmc_buffer[2] = s >> 8;
mmc_buffer[3] = s;
mmc_buffer[4] = 0;
if ( mmc_version == 0 ) {
s = s << 1;
mmc_buffer[1] = s >> 16;
mmc_buffer[2] = s >> 8;
mmc_buffer[3] = s;
mmc_buffer[4] = 0;
}
else {
mmc_buffer[1] = s >> 24;
mmc_buffer[2] = s >> 16;
mmc_buffer[3] = s >> 8;
mmc_buffer[4] = s;
}
mmc_buffer[5] = 1;
flash_write(mmc_buffer,6);
mmc_read_response();
843,14 → 873,15
***** mmc_send_cmd **************************************************
********************************************************************* */
// send a command
#define[mmc_send_cmd(][,$1);][{ // send a command, argument=0
#define[mmc_send_cmd(][,$1.$2.$3.$4,$5);][{ // send a command, argument=0
mmc_clocks(8); // 8 dummy clocks
mmc_last_cmd = $0;
mmc_buffer[0] = 64 | ($0 & 127);
mmc_buffer[1] = 0;
mmc_buffer[2] = 0;
mmc_buffer[3] = 0;
mmc_buffer[4] = 0;
mmc_buffer[5] = $1 | 1;
mmc_buffer[1] = $1;
mmc_buffer[2] = $2;
mmc_buffer[3] = $3;
mmc_buffer[4] = $4;
mmc_buffer[5] = $5 | 1;
flash_write(mmc_buffer,6);
mmc_read_response();
}]
860,12 → 891,15
********************************************************************* */
// init the card
void flash_init() {
BYTE i;
BYTE i, j, k;
 
flash_enabled = 1;
flash_sector_size = 512;
mmc_version = 0;
OEMMC_PORT = (OEMMC_PORT & ~MMC_bmDO) | ( MMC_bmCS | MMC_bmDI | MMC_bmCLK );
OEMMC_PORT = OEMMC_PORT | ( MMC_bmCS | MMC_bmDI | MMC_bmCLK );
OEMMC__PORT_DO = OEMMC__PORT_DO & ~MMC_bmDO;
 
MMC_IO |= MMC_bmDI;
MMC_IO |= MMC_bmCS;
mmc_clocks(0); // 256 clocks
873,30 → 907,75
mmc_select(); // select te card
flash_ec = FLASH_EC_BUSY;
mmc_send_cmd(0, 0x95); // send reset command
mmc_send_cmd(0, 0.0.0.0, 0x95); // send reset command
if ( mmc_response & ~1 ) { // check for errors
goto mmc_init_cmd_err;
}
 
// send cmd8, valid ? 2.0 mode : 1.xx mode
mmc_send_cmd(8, 0.0.1.0xaa, 0x87);
if ( ( mmc_response & bmBIT2) == 0 ) {
if ( (mmc_response & 0xfe) != 0 )
goto mmc_init_cmd_err;
flash_read(mmc_buffer,4);
if ( ( (mmc_buffer[2] & 15) != 1) || (mmc_buffer[3] != 0xaa ) ) {
flash_ec = FLASH_EC_NOTSUPPORTED;
goto mmc_init_err;
}
mmc_version=1;
}
// CMD1 is not recommended, therefore we try ACMD41 first
k=mmc_version ? 64 : 0;
mmc_send_cmd(55, 0.0.0.0, 0);
if ( (mmc_response & 0xfe) == 0 )
mmc_send_cmd(41, k.0.0.0, 0);
j = mmc_response & 0xfe;
for ( i=0; mmc_response != 0 && i<255; i++ ) { // send the init command and wait wait (up to 1s) until ready
wait(4);
mmc_send_cmd(1, 0xff);
if ( j ) {
mmc_send_cmd(1, k.0.0.0, 0xff);
}
else {
mmc_send_cmd(55, 0.0.0.0, 0);
mmc_send_cmd(41, k.0.0.0, 0);
}
}
if ( mmc_response != 0 ) { // check for errors
goto mmc_init_cmd_err;
}
 
if ( mmc_version ) {
mmc_send_cmd(58, 0.0.0.0, 0); // check the high capacity mode
if ( mmc_response != 0 ) // check for errors
goto mmc_init_cmd_err;
flash_read(mmc_buffer,4);
if ( (mmc_buffer[0] & 64) == 0 ) // card in standard capacity mode
mmc_version = 0;
}
 
mmc_send_cmd(9, 0); // read the CSD
mmc_send_cmd(9, 0.0.0.0, 0); // read the CSD
if ( mmc_wait_start() ) {
flash_ec = FLASH_EC_TIMEOUT;
goto mmc_init_err;
}
flash_read(mmc_buffer,16);
mmc_clocks(16); // CRC is clocked out to nirvana
mmc_clocks(16); // CRC is clocked out
 
i = (mmc_buffer[5] & 15) + ((mmc_buffer[10] >> 7) | ((mmc_buffer[9] & 3) << 1)) - 7;
flash_sectors = ((mmc_buffer[8] >> 6) | (mmc_buffer[7] << 2) | ((mmc_buffer[6] & 3) << 10)) + 1;
flash_sectors = flash_sectors << i;
mmc_buffer[0] &= 192;
if ( (mmc_buffer[0] & 192) == 0 ) {
i = (mmc_buffer[5] & 15) + ((mmc_buffer[10] >> 7) | ((mmc_buffer[9] & 3) << 1)) - 7;
flash_sectors = ((mmc_buffer[8] >> 6) | (mmc_buffer[7] << 2) | ((mmc_buffer[6] & 3) << 10)) + 1;
flash_sectors = flash_sectors << i;
}
else if ( (mmc_buffer[0] & 192) == 64 ) { // todo
flash_sectors = ( ( ((DWORD)(mmc_buffer[7] & 63) << 16) | (mmc_buffer[8] << 8) | mmc_buffer[9] ) +1 ) << 10;
}
else {
flash_ec = FLASH_EC_NOTSUPPORTED;
goto mmc_init_err;
}
 
flash_ec = 0;
mmc_deselect();
942,8 → 1021,10
mmc_deselect();
EP0_STALL;
}
mmc_clocks(8); // 8 dummy clocks
mmc_last_cmd = 17;
mmc_buffer[0] = 17 | 64;
if ( mmc_version == 0 ) {
_asm
clr c
mov dptr,#(_SETUPDAT + 2)
964,7 → 1045,14
rlc a
movx @dptr,a
_endasm;
mmc_buffer[4] = 0;
mmc_buffer[4] = 0;
}
else {
mmc_buffer[1] = SETUPDAT[5];
mmc_buffer[2] = SETUPDAT[4];
mmc_buffer[3] = SETUPDAT[3];
mmc_buffer[4] = SETUPDAT[2];
}
mmc_buffer[5] = 1;
flash_write(mmc_buffer,6);
mmc_read_response();
1016,8 → 1104,10
mmc_deselect();
EP0_STALL;
}
mmc_clocks(8); // 8 dummy clocks
mmc_last_cmd = 24;
mmc_buffer[0] = 24 | 64;
if ( mmc_version == 0 ) {
_asm
clr c
mov dptr,#(_SETUPDAT + 2)
1038,7 → 1128,15
rlc a
movx @dptr,a
_endasm;
mmc_buffer[4] = 0;
mmc_buffer[4] = 0;
}
else {
mmc_buffer[1] = SETUPDAT[5];
mmc_buffer[2] = SETUPDAT[4];
mmc_buffer[3] = SETUPDAT[3];
mmc_buffer[4] = SETUPDAT[2];
}
 
mmc_buffer[5] = 1;
flash_write(mmc_buffer,6);
mmc_read_response();
1068,15 → 1166,15
********************************************************************* */
// send detailed MMC status plus debug information
ADD_EP0_VENDOR_REQUEST((0x43,, // this may interrupt a pending operation
MEM_COPY1(flash_ec,EP0BUF+2,19);
EP0BUF[21] = (MMC_IO & MMC_bmDO) == 0;
MEM_COPY1(flash_ec,EP0BUF+2,20);
EP0BUF[22] = (MMC__IO_DO & MMC_bmDO) == 0;
mmc_select();
mmc_send_cmd(13, 0);
mmc_send_cmd(13, 0.0.0.0, 0);
EP0BUF[0] = mmc_response;
EP0BUF[1] = flash_read_byte();
mmc_deselect();
EP0BCH = 0;
EP0BCL = 22;
EP0BCL = 23;
,,
));;
 
/include/ztex-flash2.h
1,6 → 1,6
/*!
ZTEX Firmware Kit for EZ-USB Microcontrollers
Copyright (C) 2008-2009 ZTEX e.K.
Copyright (C) 2009-2010 ZTEX e.K.
http://www.ztex.de
 
This program is free software; you can redistribute it and/or modify
/include/ezintavecs.h
1,6 → 1,6
/*!
ZTEX Firmware Kit for EZ-USB Microcontrollers
Copyright (C) 2008-2009 ZTEX e.K.
Copyright (C) 2009-2010 ZTEX e.K.
http://www.ztex.de
 
This program is free software; you can redistribute it and/or modify
/include/ztex-conf.h
1,6 → 1,6
/*!
ZTEX Firmware Kit for EZ-USB Microcontrollers
Copyright (C) 2008-2009 ZTEX e.K.
Copyright (C) 2009-2010 ZTEX e.K.
http://www.ztex.de
 
This program is free software; you can redistribute it and/or modify
34,15 → 34,25
/*
This macro defines the USB Vendor ID and USB Product ID (not the product ID
from the ZTEX descriptor). The Vendor ID must be purchased from the USB-IF
(http://www.usb.org). The Cypress Vendor ID may only be used during the
develpoment process.
(http://www.usb.org).
The default vendor ID is the ZTEX vendor ID 0x221A, default product ID is
0x100 which is assigned to ZTEX modules. These ID's can be shared by many
differend products which are identified by the product ID of the ZTEX
descriptor. According to the USB-IF rules these ID's must not be used by
hardware which is not manufactured by ZTEX. (Of course, this ID's can be
used during the development process or for internal purposes.)
Please read the http://www.ztex.de/firmware-kit/usb_ids.e.html for more
informations about this topic.
Usage:
SET_VPID(<Vendor ID>,<Pioduct ID>);
*/
#define[SET_VPID(][,$1);][#define[USB_VENDOR_ID][$0]
#define[USB_PRODUCT_ID][$1]]
SET_VPID(0x221a,0x100);
 
 
/*
This macro is called before FPGA Firmware is reset, e.g. to save some
settings. After this macro is called the I/O ports are set to default
121,25 → 131,32
 
 
/*
Endoint 2,4,5,8 configuration:
Endoint 1,2,4,5,8 configuration:
 
EP_CONFIG(<EP number>,<interface>,<type>,<direction>,<size>,<buffers>)
<EP number> = 2 | 4 | 6 | 8 Endpoint numer
<INTERFACE> = 0 | 1 | 2 | 3 To which interface this endpoint belongs
<EP number> = 1IN | 1OUT | 2 | 4 | 6 | 8 Endpoint numer
<INTERFACE> = 0 | 1 | 2 | 3 To which interface this endpoint belongs
<type> = BULK | ISO | INT
<dir> = IN | OUT
<size> = 512 | 1024
<buffers> = 1 | 2 | 3 | 4
Example: EP2_CONFIG(2,0,ISO,OUT,1024,4);
Example: EP_CONFIG(2,0,ISO,OUT,1024,4);
Importand note: No spaces next to the commas
 
Endoint 1 configuration. These Endpoints are defined by default and assigned to interface 0.
 
Endoint 1 configuration:
These Endpoints are defined by default as bulk endpoints and are assigned to interface 0.
Endpoint size is always 64 bytes, but reported Endpoint size will be 512 bytes for USB 2.0 compliance.
These Endpoints can be redefined using EP_CONFIG or using:
EP1IN_CONFIG(<interface>);
<INTERFACE> = 0 | 1 | 2 | 3 To which interface EP1IN belongs; default: 0
<INTERFACE> = 0 | 1 | 2 | 3 Interface to which EP1IN belongs; default: 0
EP1OUT_CONFIG(<interface>);
<INTERFACE> = 0 | 1 | 2 | 3 To which interface EP1OUT belongs; default: 0
<INTERFACE> = 0 | 1 | 2 | 3 Interface to which EP1OUT belongs; default: 0
EP1_CONFIG(<interface>);
<INTERFACE> = 0 | 1 | 2 | 3 To which interface EP1IN and EP1OUT belongs; default: 0
<INTERFACE> = 0 | 1 | 2 | 3 Interface to which EP1IN and EP1OUT belongs; default: 0
 
The following (maximum) configurations are possible:
EP2 EP4 EP6 EP8
180,8 → 197,7
#elifneq[$3][OUT]
#error[EP_CONFIG: Invalid 4th parameter: `$3'. Expected `IN' or 'OUT']
#endif
#ifeq[$4][64]
#elifeq[$4][512]
#ifeq[$4][512]
#elifneq[$4][1024]
#error[EP_CONFIG: Invalid 5th parameter: `$4'. Expected `512' or '1024']
#endif
202,11 → 218,77
#define[EP1_CONFIG(][);][#define[EP1IN_INTERFACE][$0]
#define[EP1OUT_INTERFACE][$0]]
 
EP_CONFIG(1IN,0,BULK,IN,64,1);
EP_CONFIG(1OUT,0,BULK,OUT,64,1);
EP_CONFIG(1IN,0,BULK,IN,512,1);
EP_CONFIG(1OUT,0,BULK,OUT,512,1);
 
/*
ISO and INT Transactions per microframe:
 
Default value is 1 for all endpoints.
 
EP_PPMF(<EP number>,<tansactions per microframe>)
<EP number> = 1IN | 1OUT | 2 | 4 | 6 | 8 Endpoint
<tansactions per microframe> = 1 | 2 | 3 Transactions per microframe
Example: EP_PPMF(2,3);
Importand note: No spaces next to the commas
*/
#define[EP_PPMF(][,$1);][
#ifeq[$0][1IN]
#elifeq[$0][1OUT]
#elifeq[$0][2]
#elifeq[$0][4]
#elifeq[$0][6]
#elifneq[$0][8]
#error[EP_CONFIG: Invalid 1st parameter: `$0'. Expected `1IN', `1OUT', `2', `4', `6' or '8']
#endif
#ifeq[$1][1]
#elifeq[$1][2]
#elifneq[$1][3]
#error[EP_CONFIG: Invalid 2nd parameter: `$1'. Expected `1', `2' or '3']
#endif
#define[EP$0_PPMF][$1]]
 
EP_PPMF(1IN,1);
EP_PPMF(1OUT,1);
EP_PPMF(2,1);
EP_PPMF(4,1);
EP_PPMF(6,1);
EP_PPMF(8,1);
 
/*
Polling interval in microframes for INT transactions:
 
Default value is 1 for all endpoints.
 
EP_POLL(<EP number>,<polling interval>)
<EP number> = 1IN | 1OUT | 2 | 4 | 6 | 8 Endpoint
<polling interval> = 1 | 2 | 3 Polling interval
Example: EP_POLL(2,1);
Importand note: No spaces next to the commas
*/
#define[EP_POLL(][,$1);][
#ifeq[$0][1IN]
#elifeq[$0][1OUT]
#elifeq[$0][2]
#elifeq[$0][4]
#elifeq[$0][6]
#elifneq[$0][8]
#error[EP_CONFIG: Invalid 1st parameter: `$0'. Expected `1IN', `1OUT', `2', `4', `6' or '8']
#endif
#define[EP$0_POLL][$1]]
 
EP_POLL(1IN,1);
EP_POLL(1OUT,1);
EP_POLL(2,1);
EP_POLL(4,1);
EP_POLL(6,1);
EP_POLL(8,1);
 
 
 
/*
Settings which depends PRODUCT_ID, e.g extra capabilities.
Overwrite this macros as desired.
*/
269,8 → 351,32
#define[PRODUCT_IS][UFM-1_2]
#define[PRODUCT_STRING]["USB-FPGA Module 1.2"]]
 
/*
Identify as ZTEX USB FPGA Module 1.10
Usage: IDENTITY_UFM_1_10(<PRODUCT_ID_0>.<PRODUCT_ID_1><PRODUCT_ID_2>.<PRODUCT_ID_3>,<FW_VERSION>);
*/
#define[IDENTITY_UFM_1_10(][.$1.$2.$3,$4);][#define[PRODUCT_ID_0][$0]
#define[PRODUCT_ID_1][$1]
#define[PRODUCT_ID_2][$2]
#define[PRODUCT_ID_3][$3]
#define[FWVER][$4]
#define[PRODUCT_IS][UFM-1_10]
#define[PRODUCT_STRING]["USB-FPGA Module 1.10"]]
 
/*
Identify as ZTEX USB FPGA Module 1.11
Usage: IDENTITY_UFM_1_10(<PRODUCT_ID_0>.<PRODUCT_ID_1><PRODUCT_ID_2>.<PRODUCT_ID_3>,<FW_VERSION>);
*/
#define[IDENTITY_UFM_1_11(][.$1.$2.$3,$4);][#define[PRODUCT_ID_0][$0]
#define[PRODUCT_ID_1][$1]
#define[PRODUCT_ID_2][$2]
#define[PRODUCT_ID_3][$3]
#define[FWVER][$4]
#define[PRODUCT_IS][UFM-1_11]
#define[PRODUCT_STRING]["USB-FPGA Module 1.11"]]
 
 
/*
Identify as ZTEX USB Module 1.0
Usage: IDENTITY_UM_1_0(<PRODUCT_ID_0>.<PRODUCT_ID_1><PRODUCT_ID_2>.<PRODUCT_ID_3>,<FW_VERSION>);
*/
/include/ztex-eeprom.h
1,6 → 1,6
/*!
ZTEX Firmware Kit for EZ-USB Microcontrollers
Copyright (C) 2008-2009 ZTEX e.K.
Copyright (C) 2009-2010 ZTEX e.K.
http://www.ztex.de
 
This program is free software; you can redistribute it and/or modify
/include/ztex-isr.h
1,6 → 1,6
/*!
ZTEX Firmware Kit for EZ-USB Microcontrollers
Copyright (C) 2008-2009 ZTEX e.K.
Copyright (C) 2009-2010 ZTEX e.K.
http://www.ztex.de
 
This program is free software; you can redistribute it and/or modify
63,7 → 63,7
/* *********************************************************************
***** getStringDescriptor *******************************************
********************************************************************* */
#define[SEND_STRING_DESCRIPTOR(][,$1);][sendStringDescriptor(LSB($1), MSB($1), sizeof($1) );]
#define[SEND_STRING_DESCRIPTOR(][);][sendStringDescriptor(LSB($0), MSB($0), sizeof($0) );]
 
static void sendStringDescriptor (BYTE loAddr, BYTE hiAddr, BYTE size)
{
70,12 → 70,12
BYTE i;
if ( size > 31)
size = 31;
AUTOPTRSETUP = 7;
AUTOPTRL1 = loAddr;
AUTOPTRH1 = hiAddr;
AUTOPTRL2 = (BYTE)(((unsigned short)(&EP0BUF))+1);
AUTOPTRH2 = (BYTE)((((unsigned short)(&EP0BUF))+1) >> 8);
XAUTODAT2 = 3;
AUTOPTRSETUP = 7;
for (i=0; i<size; i++) {
XAUTODAT2 = XAUTODAT1;
XAUTODAT2 = 0;
214,16 → 214,16
case 0x03: // strings
switch (SETUPDAT[2]) {
case 1:
SEND_STRING_DESCRIPTOR(1,manufacturerString);
SEND_STRING_DESCRIPTOR(manufacturerString);
break;
case 2:
SEND_STRING_DESCRIPTOR(2,productString);
SEND_STRING_DESCRIPTOR(productString);
break;
case 3:
SEND_STRING_DESCRIPTOR(3,SN_STRING);
SEND_STRING_DESCRIPTOR(SN_STRING);
break;
case 4:
SEND_STRING_DESCRIPTOR(4,configurationString);
SEND_STRING_DESCRIPTOR(configurationString);
break;
default:
SUDPTRH = MSB(&EmptyStringDescriptor);
/include/ztex-fpga1.h
0,0 → 1,265
/*!
ZTEX Firmware Kit for EZ-USB Microcontrollers
Copyright (C) 2009-2010 ZTEX e.K.
http://www.ztex.de
 
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License version 3 as
published by the Free Software Foundation.
 
This program is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
General Public License for more details.
 
You should have received a copy of the GNU General Public License
along with this program; if not, see http://www.gnu.org/licenses/.
!*/
 
/*
FPGA support for ZTEX USB FPGA Modules 1.0, 1.1 and 1.2
*/
 
#ifndef[ZTEX_FPGA_H]
#define[ZTEX_FPGA_H]
 
#define[@CAPABILITY_FPGA;]
 
xdata BYTE fpga_checksum; // checksum
xdata DWORD fpga_bytes; // transfered bytes
xdata BYTE fpga_init_b; // init_b state (should be 222 after configuration)
xdata BYTE fpga_flash_result; // result of FPGA configuarion from Flash at startup
 
/* *********************************************************************
***** reset_fpga ****************************************************
********************************************************************* */
static void reset_fpga () { // reset FPGA
unsigned short k;
IFCONFIG = bmBIT7;
SYNCDELAY;
PORTACFG = 0;
PORTCCFG = 0;
 
OEA = bmBIT1;
IOA1 = 0;
wait(10);
OEB = 0xff; // setup IO's
OEC = bmBIT2 | bmBIT3;
IOC = bmBIT3;
OED = bmBIT0;
IOD0 = 0;
 
IOA1 = 1; // ready for configuration
IOD0 = 1;
k=0;
while (!IOC0 && k<65535)
k++;
 
fpga_init_b = IOC0 ? 200 : 100;
fpga_bytes = 0;
fpga_checksum = 0;
IOC = 0;
}
 
#define[reset_fpga_flash][reset_fpga];
 
/* *********************************************************************
***** init_fpga_configuration ***************************************
********************************************************************* */
static void init_fpga_configuration () {
{
PRE_FPGA_RESET
}
reset_fpga(); // reset FPGA
}
 
/* *********************************************************************
***** post_fpga_confog **********************************************
********************************************************************* */
static void post_fpga_config () {
POST_FPGA_CONFIG
}
 
/* *********************************************************************
***** finish_fpga_configuration *************************************
********************************************************************* */
static void finish_fpga_configuration () {
fpga_init_b += IOC0 ? 20 : 10;
IOD0 = 0; IOB = 0; IOD0 = 1;
IOD0 = 0; IOD0 = 1;
IOD0 = 0; IOD0 = 1;
IOD0 = 0; IOD0 = 1;
IOD0 = 0; IOD0 = 1;
IOD0 = 0; IOD0 = 1;
IOD0 = 0; IOD0 = 1;
IOD0 = 0; IOD0 = 1;
IOD0 = 0; IOD0 = 1;
IOD0 = 0; IOD0 = 1;
IOD0 = 0; IOD0 = 1;
OEB = 0;
OEC = 0;
OED = 0;
OEA = 0;
fpga_init_b += IOC0 ? 2 : 1;
if ( IOA1 ) {
IOA1 = 1;
post_fpga_config();
}
 
IOA1 = 1;
OEA |= bmBIT1;
}
 
 
/* *********************************************************************
***** EP0 vendor request 0x30 ***************************************
********************************************************************* */
ADD_EP0_VENDOR_REQUEST((0x30,, // get FPGA state
MEM_COPY1(fpga_checksum,EP0BUF+1,7);
OEA &= ~bmBIT1;
if ( IOA1 ) {
EP0BUF[0] = 0; // FPGA configured
IOA1 = 1;
OEA |= bmBIT1;
}
else {
EP0BUF[0] = 1; // FPGA unconfigured
reset_fpga(); // prepare FPGA for configuration
}
EP0BUF[8] = 0; // bit order for bitstream in FLASH: non swapped
EP0BCH = 0;
EP0BCL = 9;
,,));;
 
 
/* *********************************************************************
***** EP0 vendor command 0x31 ***************************************
********************************************************************* */
ADD_EP0_VENDOR_COMMAND((0x31,,init_fpga_configuration();,,));; // reset FPGA
 
 
/* *********************************************************************
***** EP0 vendor command 0x32 ***************************************
********************************************************************* */
void fpga_send_ep0() {
fpga_bytes += ep0_payload_transfer;
_asm
mov dptr,#_EP0BCL
movx a,@dptr
jz 010000$
mov r2,a
mov _AUTOPTRL1,#(_EP0BUF)
mov _AUTOPTRH1,#(_EP0BUF >> 8)
mov _AUTOPTRSETUP,#0x07
mov dptr,#_fpga_checksum
movx a,@dptr
mov r1,a
mov dptr,#_XAUTODAT1
010001$:
clr _IOD0
movx a,@dptr
mov _IOB,a
add a,r1
mov r1,a
setb _IOD0
djnz r2, 010001$
 
mov dptr,#_fpga_checksum
mov a,r1
movx @dptr,a
010000$:
_endasm;
if ( EP0BCL<64 ) {
finish_fpga_configuration();
}
}
 
ADD_EP0_VENDOR_COMMAND((0x32,, // send FPGA configuration data
,,
fpga_send_ep0();
));;
 
 
#ifeq[FLASH_BITSTREAM_ENABLED][1]
#ifeq[FLASH_ENABLED][1]
 
/* *********************************************************************
***** fpga__send_bitstream_from_flash *******************************
********************************************************************* */
void fpga_send_bitstream_from_flash (WORD size) {
size; // this avoids stupid warnings
_asm
mov r5,dpl // = size
mov r6,dph
 
// fpga_bytes+=size
mov dptr,#_fpga_bytes
movx a,@dptr
mov r1,a
inc dptr
movx a,@dptr
mov r2,a
inc dptr
movx a,@dptr
mov r3,a
inc dptr
movx a,@dptr
mov r4,a
 
mov dptr,#_fpga_bytes
mov a,r5
add a,r1
movx @dptr,a
mov a,r6
addc a,r2
inc dptr
movx @dptr,a
mov a,#0
addc a,r3
inc dptr
movx @dptr,a
mov a,#0
addc a,r4
inc dptr
movx @dptr,a
 
mov dptr,#_fpga_checksum
movx a,@dptr
mov r7,a
 
010003$:
cjne r5,#0x00,010002$
cjne r6,#0x00,010002$
mov dptr,#_fpga_checksum
mov a,r7
movx @dptr,a
ret
010002$:
clr _IOD0
lcall _flash_read_byte
mov a,dpl
mov _IOB,a
add a,r7
mov r7,a
setb _IOD0
dec r5
cjne r5,#0xff,010003$
dec r6
sjmp 010003$
_endasm;
}
 
#include[ztex-fpga-flash.h]
 
#else
#warning[Flash interface is not enabled but required for FPGA configuration using a bitstream from Flash meomory]
#define[FLASH_BITSTREAM_ENABLED][0]
#endif
#endif
 
#endif /*ZTEX_FPGA_H*/
/include/ztex-fpga2.h
0,0 → 1,278
/*!
ZTEX Firmware Kit for EZ-USB Microcontrollers
Copyright (C) 2009-2010 ZTEX e.K.
http://www.ztex.de
 
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License version 3 as
published by the Free Software Foundation.
 
This program is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
General Public License for more details.
 
You should have received a copy of the GNU General Public License
along with this program; if not, see http://www.gnu.org/licenses/.
!*/
 
/*
FPGA support for ZTEX USB FPGA Modules 1.10
*/
 
#ifndef[ZTEX_FPGA_H]
#define[ZTEX_FPGA_H]
 
#define[@CAPABILITY_FPGA;]
 
xdata BYTE fpga_checksum; // checksum
xdata DWORD fpga_bytes; // transfered bytes
xdata BYTE fpga_init_b; // init_b state (should be 222 after configuration)
xdata BYTE fpga_flash_result; // result of automatic fpga configuarion from Flash
 
/* *********************************************************************
***** reset_fpga ****************************************************
********************************************************************* */
static void reset_fpga_int (BYTE mode) { // reset FPGA
unsigned short k;
IFCONFIG = bmBIT7;
SYNCDELAY;
PORTACFG = 0;
PORTCCFG = 0;
 
OEA = (OEA & 0xe0) | bmBIT1 | bmBIT3 | bmBIT4;
IOA = (IOA & 0xe0) | bmBIT4;
wait(10);
OEC = bmBIT4 | bmBIT6 | bmBIT7;
IOC = mode;
 
IOA = (IOA & 0xe0) | bmBIT1; // ready for configuration
k=0;
while (!IOA0 && k<65535)
k++;
 
fpga_init_b = IOA0 ? 200 : 100;
fpga_bytes = 0;
fpga_checksum = 0;
}
 
static void reset_fpga () {
reset_fpga_int(bmBIT4);
}
 
static void reset_fpga_flash () {
reset_fpga_int(bmBIT4 | bmBIT6);
}
/* *********************************************************************
***** init_fpga_configuration ***************************************
********************************************************************* */
static void init_fpga_configuration () {
{
PRE_FPGA_RESET
}
reset_fpga(); // reset FPGA
}
 
/* *********************************************************************
***** post_fpga_confog **********************************************
********************************************************************* */
static void post_fpga_config () {
POST_FPGA_CONFIG
}
 
/* *********************************************************************
***** finish_fpga_configuration *************************************
********************************************************************* */
static void finish_fpga_configuration () {
WORD w;
fpga_init_b += IOA0 ? 20 : 10;
 
for ( w=0; w<65535; w++ ) {
IOA3 = 1; IOA3 = 0;
}
 
IOA3 = 1; IOA3 = 0;
IOA3 = 1; IOA3 = 0;
IOA3 = 1; IOA3 = 0;
IOA3 = 1; IOA3 = 0;
IOA4 = 1;
IOA3 = 1; IOA3 = 0;
OEC = 0;
IOA3 = 1; IOA3 = 0;
IOA3 = 1; IOA3 = 0;
IOA3 = 1; IOA3 = 0;
 
OEA = OEA & 0xe0;
fpga_init_b += IOA0 ? 2 : 1;
if ( IOA1 ) {
IOA1 = 1;
post_fpga_config();
}
 
IOA1 = 1;
OEA |= bmBIT1;
}
 
 
/* *********************************************************************
***** EP0 vendor request 0x30 ***************************************
********************************************************************* */
ADD_EP0_VENDOR_REQUEST((0x30,, // get FPGA state
MEM_COPY1(fpga_checksum,EP0BUF+1,7);
OEA &= ~bmBIT1;
if ( IOA1 ) {
EP0BUF[0] = 0; // FPGA configured
IOA1 = 1;
OEA |= bmBIT1;
}
else {
EP0BUF[0] = 1; // FPGA unconfigured
reset_fpga(); // prepare FPGA for configuration
}
EP0BUF[8] = 1; // bit order for bitstream in Flash memory: swapped
EP0BCH = 0;
EP0BCL = 9;
,,));;
 
 
/* *********************************************************************
***** EP0 vendor command 0x31 ***************************************
********************************************************************* */
ADD_EP0_VENDOR_COMMAND((0x31,,init_fpga_configuration();,,));; // reset FPGA
 
 
/* *********************************************************************
***** EP0 vendor command 0x32 ***************************************
********************************************************************* */
void fpga_send_ep0() {
BYTE oOED;
oOED = OED;
OED = 255;
fpga_bytes += ep0_payload_transfer;
_asm
mov dptr,#_EP0BCL
movx a,@dptr
jz 010000$
mov r2,a
mov _AUTOPTRL1,#(_EP0BUF)
mov _AUTOPTRH1,#(_EP0BUF >> 8)
mov _AUTOPTRSETUP,#0x07
mov dptr,#_fpga_checksum
movx a,@dptr
mov r1,a
mov dptr,#_XAUTODAT1
010001$:
movx a,@dptr
mov _IOD,a
setb _IOA3
add a,r1
mov r1,a
clr _IOA3
djnz r2, 010001$
 
mov dptr,#_fpga_checksum
mov a,r1
movx @dptr,a
010000$:
_endasm;
OED = oOED;
if ( EP0BCL<64 ) {
finish_fpga_configuration();
}
}
 
ADD_EP0_VENDOR_COMMAND((0x32,, // send FPGA configuration data
,,
fpga_send_ep0();
));;
 
 
#ifeq[FLASH_BITSTREAM_ENABLED][1]
#ifeq[FLASH_ENABLED][1]
 
/* *********************************************************************
***** fpga_send_bitstream_from_flash ********************************
********************************************************************* */
void fpga_send_bitstream_from_flash (WORD size) {
size; // this avoids stupid warnings
_asm
push _OED
mov _OED,#0
 
mov r5,dpl // = size
mov r6,dph
 
// fpga_bytes+=size
mov dptr,#_fpga_bytes
movx a,@dptr
mov r1,a
inc dptr
movx a,@dptr
mov r2,a
inc dptr
movx a,@dptr
mov r3,a
inc dptr
movx a,@dptr
mov r4,a
 
mov dptr,#_fpga_bytes
mov a,r5
add a,r1
movx @dptr,a
mov a,r6
addc a,r2
inc dptr
movx @dptr,a
mov a,#0
addc a,r3
inc dptr
movx @dptr,a
mov a,#0
addc a,r4
inc dptr
movx @dptr,a
 
010003$:
cjne r5,#0x00,010002$
cjne r6,#0x00,010002$
pop _OED
ret
010002$:
mov _IOA,#(bmBIT1 | bmBIT6 | bmBIT3 | bmBIT7)
mov _IOA,#(bmBIT1 | bmBIT6)
mov _IOA,#(bmBIT1 | bmBIT6 | bmBIT3 | bmBIT7)
mov _IOA,#(bmBIT1 | bmBIT6)
mov _IOA,#(bmBIT1 | bmBIT6 | bmBIT3 | bmBIT7)
mov _IOA,#(bmBIT1 | bmBIT6)
mov _IOA,#(bmBIT1 | bmBIT6 | bmBIT3 | bmBIT7)
mov _IOA,#(bmBIT1 | bmBIT6)
mov _IOA,#(bmBIT1 | bmBIT6 | bmBIT3 | bmBIT7)
mov _IOA,#(bmBIT1 | bmBIT6)
mov _IOA,#(bmBIT1 | bmBIT6 | bmBIT3 | bmBIT7)
mov _IOA,#(bmBIT1 | bmBIT6)
mov _IOA,#(bmBIT1 | bmBIT6 | bmBIT3 | bmBIT7)
mov _IOA,#(bmBIT1 | bmBIT6)
mov _IOA,#(bmBIT1 | bmBIT6 | bmBIT3 | bmBIT7)
mov _IOA,#(bmBIT1 | bmBIT6)
dec r5
cjne r5,#0xff,010003$
dec r6
sjmp 010003$
_endasm;
}
 
#include[ztex-fpga-flash.h]
 
#else
#warning[Flash interface is not enabled but required for FPGA configuration using a bitstream from Flash meomory]
#define[FLASH_BITSTREAM_ENABLED][0]
#endif
#endif
 
#endif /*ZTEX_FPGA_H*/
/include/ztex-fpga3.h
0,0 → 1,299
/*!
ZTEX Firmware Kit for EZ-USB Microcontrollers
Copyright (C) 2009-2010 ZTEX e.K.
http://www.ztex.de
 
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License version 3 as
published by the Free Software Foundation.
 
This program is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
General Public License for more details.
 
You should have received a copy of the GNU General Public License
along with this program; if not, see http://www.gnu.org/licenses/.
!*/
 
/*
FPGA support for ZTEX USB FPGA Modules 1.10
*/
 
#ifndef[ZTEX_FPGA_H]
#define[ZTEX_FPGA_H]
 
#define[@CAPABILITY_FPGA;]
 
xdata BYTE fpga_checksum; // checksum
xdata DWORD fpga_bytes; // transfered bytes
xdata BYTE fpga_init_b; // init_b state (should be 222 after configuration)
xdata BYTE fpga_flash_result; // result of automatic fpga configuarion from Flash
 
/* *********************************************************************
***** reset_fpga ****************************************************
********************************************************************* */
static void reset_fpga_int (BYTE mode) { // reset FPGA
unsigned short k;
IFCONFIG = bmBIT7;
SYNCDELAY;
PORTACFG = 0;
PORTCCFG = 0;
 
OEA = bmBIT1 | bmBIT3 | bmBIT4 | bmBIT5 | bmBIT6 | bmBIT7;
IOA = bmBIT7 | mode;
wait(10);
OEC &= ~bmBIT3;
 
IOA = bmBIT1 | mode; // ready for configuration
k=0;
while (!IOA0 && k<65535)
k++;
 
fpga_init_b = IOA0 ? 200 : 100;
fpga_bytes = 0;
fpga_checksum = 0;
}
 
static void reset_fpga () {
reset_fpga_int(bmBIT5);
}
 
static void reset_fpga_flash () {
reset_fpga_int(bmBIT5 | bmBIT6);
}
/* *********************************************************************
***** init_fpga_configuration ***************************************
********************************************************************* */
static void init_fpga_configuration () {
{
PRE_FPGA_RESET
}
reset_fpga(); // reset FPGA
}
 
/* *********************************************************************
***** post_fpga_confog **********************************************
********************************************************************* */
static void post_fpga_config () {
POST_FPGA_CONFIG
}
 
/* *********************************************************************
***** finish_fpga_configuration *************************************
********************************************************************* */
static void finish_fpga_configuration () {
WORD w;
fpga_init_b += IOA0 ? 20 : 10;
 
for ( w=0; w<65535; w++ ) {
IOA3 = 1; IOA3 = 0;
}
 
IOA3 = 1; IOA3 = 0;
IOA3 = 1; IOA3 = 0;
IOA3 = 1; IOA3 = 0;
IOA3 = 1; IOA3 = 0;
IOA7 = 1;
IOA3 = 1; IOA3 = 0;
IOA3 = 1; IOA3 = 0;
IOA3 = 1; IOA3 = 0;
IOA3 = 1; IOA3 = 0;
 
OEA = 0;
fpga_init_b += IOA0 ? 2 : 1;
if ( IOA1 ) {
IOA1 = 1;
post_fpga_config();
}
 
IOA1 = 1;
OEA |= bmBIT1;
}
 
 
/* *********************************************************************
***** EP0 vendor request 0x30 ***************************************
********************************************************************* */
ADD_EP0_VENDOR_REQUEST((0x30,, // get FPGA state
MEM_COPY1(fpga_checksum,EP0BUF+1,7);
OEA &= ~bmBIT1;
if ( IOA1 ) {
EP0BUF[0] = 0; // FPGA configured
IOA1 = 1;
OEA |= bmBIT1;
}
else {
EP0BUF[0] = 1; // FPGA unconfigured
reset_fpga(); // prepare FPGA for configuration
}
EP0BUF[8] = 1; // bit order for bitstream in Flash memory: swapped
EP0BCH = 0;
EP0BCL = 9;
,,));;
 
 
/* *********************************************************************
***** EP0 vendor command 0x31 ***************************************
********************************************************************* */
ADD_EP0_VENDOR_COMMAND((0x31,,init_fpga_configuration();,,));; // reset FPGA
 
 
/* *********************************************************************
***** EP0 vendor command 0x32 ***************************************
********************************************************************* */
void fpga_send_ep0() {
BYTE oOED;
oOED = OED;
OED = 255;
fpga_bytes += ep0_payload_transfer;
_asm
mov dptr,#_EP0BCL
movx a,@dptr
jz 010000$
mov r2,a
mov _AUTOPTRL1,#(_EP0BUF)
mov _AUTOPTRH1,#(_EP0BUF >> 8)
mov _AUTOPTRSETUP,#0x07
mov dptr,#_fpga_checksum
movx a,@dptr
mov r1,a
mov dptr,#_XAUTODAT1
010001$:
movx a,@dptr
mov _IOD,a
setb _IOA3
add a,r1
mov r1,a
clr _IOA3
djnz r2, 010001$
 
mov dptr,#_fpga_checksum
mov a,r1
movx @dptr,a
010000$:
_endasm;
OED = oOED;
if ( EP0BCL<64 ) {
finish_fpga_configuration();
}
}
 
ADD_EP0_VENDOR_COMMAND((0x32,, // send FPGA configuration data
,,
fpga_send_ep0();
));;
 
 
#ifeq[FLASH_BITSTREAM_ENABLED][1]
#ifeq[FLASH_ENABLED][1]
 
/* *********************************************************************
***** fpga_send_bitstream_from_flash ********************************
********************************************************************* */
void fpga_send_bitstream_from_flash (WORD size) {
size; // this avoids stupid warnings
_asm
push _OED
mov _OED,#0
 
mov r5,dpl // = size
mov r6,dph
 
// fpga_bytes+=size
mov dptr,#_fpga_bytes
movx a,@dptr
mov r1,a
inc dptr
movx a,@dptr
mov r2,a
inc dptr
movx a,@dptr
mov r3,a
inc dptr
movx a,@dptr
mov r4,a
 
mov dptr,#_fpga_bytes
mov a,r5
add a,r1
movx @dptr,a
mov a,r6
addc a,r2
inc dptr
movx @dptr,a
mov a,#0
addc a,r3
inc dptr
movx @dptr,a
mov a,#0
addc a,r4
inc dptr
movx @dptr,a
 
010003$:
cjne r5,#0x00,010002$
cjne r6,#0x00,010002$
pop _OED
ret
010002$:
setb _IOA3
setb _IOC6
clr _IOA3
clr _IOC6
 
setb _IOA3
setb _IOC6
clr _IOA3
clr _IOC6
setb _IOA3
setb _IOC6
clr _IOA3
clr _IOC6
 
setb _IOA3
setb _IOC6
clr _IOA3
clr _IOC6
setb _IOA3
setb _IOC6
clr _IOA3
clr _IOC6
 
setb _IOA3
setb _IOC6
clr _IOA3
clr _IOC6
setb _IOA3
setb _IOC6
clr _IOA3
clr _IOC6
 
setb _IOA3
setb _IOC6
clr _IOA3
clr _IOC6
dec r5
cjne r5,#0xff,010003$
dec r6
sjmp 010003$
_endasm;
}
 
#include[ztex-fpga-flash.h]
 
#else
#warning[Flash interface is not enabled but required for FPGA configuration using a bitstream from Flash meomory]
#define[FLASH_BITSTREAM_ENABLED][0]
#endif
#endif
 
#endif /*ZTEX_FPGA_H*/
/include/ztex-utils.h
1,6 → 1,6
/*!
ZTEX Firmware Kit for EZ-USB Microcontrollers
Copyright (C) 2008-2009 ZTEX e.K.
Copyright (C) 2009-2010 ZTEX e.K.
http://www.ztex.de
 
This program is free software; you can redistribute it and/or modify
/makecopyright.tmp
0,0 → 1,15
|''examples/all/ucecho'' | ucecho -- uppercase conversion example for all EZ-USB devices |
|''examples/all/ucecho/c''UCEcho -- C host software for ucecho examples |
|''examples/usb-1.0/flashbench'' | flashbench -- Flash memory benchmark for ZTEX USB Module 1.0 |
|''examples/usb-1.0/flashdemo'' | flashdemo -- demo for Flash memory access from firmware and host software for ZTEX USB Module 1.0 |
|''examples/usb-fpga-1.2/flashbench'' | flashbench -- Flash memory benchmark for ZTEX USB FPGA Module 1.2 |
|''examples/usb-fpga-1.2/flashdemo'' | flashdemo -- demo for Flash memory access from firmware and host software for ZTEX USB FPGA Module 1.2 |
|''examples/usb-fpga-1.2/intraffic'' | intraffic -- example showing how the EZ-USB FIFO interface is used on ZTEX USB FPGA Module 1.2 |
|''examples/usb-fpga-1.2/standalone'' | standalone -- standalone firmware that supports FPGA configuration from FLASH and firmware loading from EEPROM for ZTEX USB FPGA Module 1.2 |
|''examples/usb-fpga-1.2/ucecho'' ucecho -- uppercase conversion example for ZTEX USB FPGA Module 1.2 |
|''examples/usb-fpga-1.11/flashbench'' | flashbench -- Flash memory benchmark for ZTEX USB FPGA Module 1.11 |
|''examples/usb-fpga-1.11/flashdemo'' | flashdemo -- demo for Flash memory access from firmware and host software for ZTEX USB FPGA Module 1.11 |
|''examples/usb-fpga-1.11/intraffic'' | intraffic -- example showing how the EZ-USB FIFO interface is used on ZTEX USB FPGA Module 1.11 |
|''examples/usb-fpga-1.11/memtest'' | memtest -- DDR SDRAM FIFO for testing memory on ZTEX USB FPGA Module 1.11 |
|''examples/usb-fpga-1.11/standalone'' | standalone -- standalone firmware that supports FPGA configuration from FLASH and firmware loading from EEPROM for ZTEX USB FPGA Module 1.11 |
|''examples/usb-fpga-1.11/ucecho'' | ucecho -- uppercase conversion example for ZTEX USB FPGA Module 1.11 |
makecopyright.tmp Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: makecopyright =================================================================== --- makecopyright (revision 3) +++ makecopyright (revision 4) @@ -1,7 +1,7 @@ #!/bin/sh # # makecopyright - put a copyright info into source files -# Copyright (C) 2008-2009 ZTEX e.K., http://www.ztex.de +# Copyright (C) 2009-2010 ZTEX e.K., http://www.ztex.de # # writes the copyright info to stdout @@ -11,7 +11,7 @@ msg () { echo "$2 $1 - Copyright (C) 2008-2009 ZTEX e.K. + Copyright (C) 2009-2010 ZTEX e.K. http://www.ztex.de This program is free software; you can redistribute it and/or modify @@ -58,6 +58,9 @@ # $1 dir # $2 description singledir () { + if [ ! -d $1 ]; then + echo "Directory not found: $1" + fi for i in $1/*.pas $1/*.inc; do singlefile "$i" "$2" "{*!" "!*}" done @@ -69,9 +72,22 @@ rm -f files.tmp singledir bmp/src "bmp -- babel macro processor" -singledir examples/usb-fpga-1.2/ucecho "ucecho -- example for ZTEX USB FPGA Module 1.2" +singledir examples/all/ucecho "ucecho -- uppercase conversion example for all EZ-USB devices" +singledir examples/all/ucecho/c "UCEcho -- C host software for ucecho examples" +singledir examples/usb-1.0/flashbench "flashbench -- Flash memory benchmark for ZTEX USB Module 1.0" +singledir examples/usb-1.0/flashdemo "flashdemo -- demo for Flash memory access from firmware and host software for ZTEX USB Module 1.0" +singledir examples/usb-fpga-1.2/flashbench "flashbench -- Flash memory benchmark for ZTEX USB FPGA Module 1.2" +singledir examples/usb-fpga-1.2/flashdemo "flashdemo -- demo for Flash memory access from firmware and host software for ZTEX USB FPGA Module 1.2" +singledir examples/usb-fpga-1.2/intraffic "intraffic -- example showing how the EZ-USB FIFO interface is used on ZTEX USB FPGA Module 1.2" +singledir examples/usb-fpga-1.2/standalone "standalone -- standalone firmware that supports FPGA configuration from FLASH and firmware loading from EEPROM for ZTEX USB FPGA Module 1.2" +singledir examples/usb-fpga-1.2/ucecho "ucecho -- uppercase conversion example for ZTEX USB FPGA Module 1.2" +singledir examples/usb-fpga-1.11/flashbench "flashbench -- Flash memory benchmark for ZTEX USB FPGA Module 1.11" +singledir examples/usb-fpga-1.11/flashdemo "flashdemo -- demo for Flash memory access from firmware and host software for ZTEX USB FPGA Module 1.11" +singledir examples/usb-fpga-1.11/intraffic "intraffic -- example showing how the EZ-USB FIFO interface is used on ZTEX USB FPGA Module 1.11" +singledir examples/usb-fpga-1.11/memtest "memtest -- DDR SDRAM FIFO for testing memory on ZTEX USB FPGA Module 1.11" +singledir examples/usb-fpga-1.11/standalone "standalone -- standalone firmware that supports FPGA configuration from FLASH and firmware loading from EEPROM for ZTEX USB FPGA Module 1.11" +singledir examples/usb-fpga-1.11/ucecho "ucecho -- uppercase conversion example for ZTEX USB FPGA Module 1.11" singledir include "ZTEX Firmware Kit for EZ-USB Microcontrollers" -#singledir java "Java utilities for the ZTEX Firmware Kit / Driver API" singledir java "Firmware / Bitstream loader for the ZTEX Firmware Kit" singledir java/ztex "Java Driver API for the ZTEX Firmware Kit"
/libusbJava-src/ch/ntb/usb/LibusbJava.java
363,7 → 363,14
if (os.contains("Windows")) {
LibLoader.load( "libusbJava" );
} else {
LibLoader.load( "usbJava" );
try {
LibLoader.load( "usbJavaSh" );
// System.err.println("loaded libusbJavaSh");
}
catch ( UnsatisfiedLinkError e ) {
LibLoader.load( "usbJavaSt" );
// System.err.println("loaded libusbJavaSt");
}
}
// define the error codes
ERROR_SUCCESS = 0;
/libusbJava-src/Makefile
29,7 → 29,8
LIBEXTRADEPS=LibusbJava.h
JAVASRCS=$(shell echo ch/ntb/usb/*.java) $(shell echo ch/ntb/usb/logger/*.java)
 
LIBTARGET=libusbJava.so
LIBTARGET_SH=libusbJavaSh.so
LIBTARGET_ST=libusbJavaSt.so
LIBLIBS=-lusb
LIBINCS=-I $(JAVAPREFIX)/include -I $(JAVAPREFIX)/include/linux
 
39,11 → 40,14
 
classes: classes.made
 
libs: $(LIBTARGET)
libs: $(LIBTARGET_SH) $(LIBTARGET_ST)
 
$(LIBTARGET): $(LIBSRCS) $(LIBEXTRADEPS)
$(GCC) -shared -std=c99 -Wall -Wl,-static,-soname,$(LIBTARGET) $(LIBINCS) -static $(LIBSRCS) -o $(LIBTARGET) $(LIBLIBS)
$(LIBTARGET_ST): $(LIBSRCS) $(LIBEXTRADEPS)
$(GCC) -shared -std=c99 -Wall -Wl,-static,-soname,$(LIBTARGET_ST) $(LIBINCS) -static $(LIBSRCS) -o $(LIBTARGET_ST) $(LIBLIBS)
 
$(LIBTARGET_SH): $(LIBSRCS) $(LIBEXTRADEPS)
$(GCC) -shared -std=c99 -Wall -Wl,-soname,$(LIBTARGET_SH) $(LIBINCS) $(LIBSRCS) -o $(LIBTARGET_SH) $(LIBLIBS)
 
classes.made: $(JAVASRCS)
$(JAVAC) $(JAVASRCS)
echo > classes.made
53,7 → 57,8
install2: all
$(INSTALLDIR) ../libusbJava/ch/ntb/usb/logger
$(INSTALLFILE) $(LIBTARGET) ../libusbJava
$(INSTALLFILE) $(LIBTARGET_SH) ../libusbJava
$(INSTALLFILE) $(LIBTARGET_ST) ../libusbJava
$(INSTALLFILE) ch/ntb/usb/*.class ../libusbJava/ch/ntb/usb
$(INSTALLFILE) ch/ntb/usb/logger/*.class ../libusbJava/ch/ntb/usb/logger
 
61,4 → 66,4
$(RM) *.o
 
distclean:
$(RM) $(LIBTARGET) ch/ntb/usb/*.class ch/ntb/usb/logger/*.class classes.made
$(RM) $(LIBTARGET_SH) $(LIBTARGET_ST) ch/ntb/usb/*.class ch/ntb/usb/logger/*.class classes.made
/docs/java/index-all.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Thu Dec 10 20:53:20 CET 2009 -->
<!-- Generated by javadoc (build 1.6.0_02) on Fri Jun 11 14:15:44 CEST 2010 -->
<TITLE>
Index
</TITLE>
 
<META NAME="date" CONTENT="2009-12-10">
<META NAME="date" CONTENT="2010-06-11">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="./stylesheet.css" TITLE="Style">
 
123,7 → 123,7
<DD>The names of the capabilities
<DT><A HREF="./ztex/Ztex1.html#certainWorkarounds"><B>certainWorkarounds</B></A> -
Variable in class ztex.<A HREF="./ztex/Ztex1.html" title="class in ztex">Ztex1</A>
<DD>Setting to true will enable certain workarounds, e.g. to deal with bad driver/OS implementations.
<DD>Setting to true enables certain workarounds, e.g. to deal with bad driver/OS implementations.
<DT><A HREF="./ch/ntb/usb/package-summary.html"><B>ch.ntb.usb</B></A> - package ch.ntb.usb<DD>A Java wrapper for the libusb 0.1 and libusb-win32 USB library.<DT><A HREF="./ztex/Ztex1v1.html#checkCapability(int, int)"><B>checkCapability(int, int)</B></A> -
Method in class ztex.<A HREF="./ztex/Ztex1v1.html" title="class in ztex">Ztex1v1</A>
<DD>Checks whether ZTEX descriptor 1 is available and interface 1 and a given capability are supported.
136,6 → 136,9
<DT><A HREF="./ztex/Ztex1v1.html#checkValid()"><B>checkValid()</B></A> -
Method in class ztex.<A HREF="./ztex/Ztex1v1.html" title="class in ztex">Ztex1v1</A>
<DD>Checks whether ZTEX descriptor 1 is available and interface 1 is supported.
<DT><A HREF="./ztex/Ztex1.html#claimInterface(int)"><B>claimInterface(int)</B></A> -
Method in class ztex.<A HREF="./ztex/Ztex1.html" title="class in ztex">Ztex1</A>
<DD>Claims an interface.
<DT><A HREF="./ch/ntb/usb/Device.html#close()"><B>close()</B></A> -
Method in class ch.ntb.usb.<A HREF="./ch/ntb/usb/Device.html" title="class in ch.ntb.usb">Device</A>
<DD>Release the claimed interface and close the opened device.
156,10 → 159,10
<DD>The timeout for control messages in ms.
<DT><A HREF="./ztex/ZtexDevice1.html#cypressProductId"><B>cypressProductId</B></A> -
Static variable in class ztex.<A HREF="./ztex/ZtexDevice1.html" title="class in ztex">ZtexDevice1</A>
<DD>The EZ-USB product ID 0x8613.
<DD>EZ-USB USB product ID: 0x8613
<DT><A HREF="./ztex/ZtexDevice1.html#cypressVendorId"><B>cypressVendorId</B></A> -
Static variable in class ztex.<A HREF="./ztex/ZtexDevice1.html" title="class in ztex">ZtexDevice1</A>
<DD>The Cypress vendor ID 0x4b4.
<DD>Cypress vendor ID: 0x4b4
</DL>
<HR>
<A NAME="_D_"><!-- --></A><H2>
758,6 → 761,9
<DT><A HREF="./ch/ntb/usb/Device.html#readInterrupt(int, byte[], int, int, boolean)"><B>readInterrupt(int, byte[], int, int, boolean)</B></A> -
Method in class ch.ntb.usb.<A HREF="./ch/ntb/usb/Device.html" title="class in ch.ntb.usb">Device</A>
<DD>Read data from the device using a interrupt transfer.
<DT><A HREF="./ztex/Ztex1.html#releaseInterface(int)"><B>releaseInterface(int)</B></A> -
Method in class ztex.<A HREF="./ztex/Ztex1.html" title="class in ztex">Ztex1</A>
<DD>Releases an interface.
<DT><A HREF="./ch/ntb/usb/USB.html#REQ_CLEAR_FEATURE"><B>REQ_CLEAR_FEATURE</B></A> -
Static variable in class ch.ntb.usb.<A HREF="./ch/ntb/usb/USB.html" title="class in ch.ntb.usb">USB</A>
<DD>This request is used to clear or disable a specific feature (USB spec
849,6 → 855,9
<A NAME="_S_"><!-- --></A><H2>
<B>S</B></H2>
<DL>
<DT><A HREF="./ztex/Ztex1.html#setConfiguration(int)"><B>setConfiguration(int)</B></A> -
Method in class ztex.<A HREF="./ztex/Ztex1.html" title="class in ztex">Ztex1</A>
<DD>Sets the configuration.
<DT><A HREF="./ch/ntb/usb/Device.html#setResetOnFirstOpen(boolean, int)"><B>setResetOnFirstOpen(boolean, int)</B></A> -
Method in class ch.ntb.usb.<A HREF="./ch/ntb/usb/Device.html" title="class in ch.ntb.usb">Device</A>
<DD>If enabled, the device is reset when first opened.
899,6 → 908,9
<DT><A HREF="./ztex/ZtexIhxFile1.html#toString()"><B>toString()</B></A> -
Method in class ztex.<A HREF="./ztex/ZtexIhxFile1.html" title="class in ztex">ZtexIhxFile1</A>
<DD>Returns a string representation if the instance.
<DT><A HREF="./ztex/Ztex1.html#trySetConfiguration(int)"><B>trySetConfiguration(int)</B></A> -
Method in class ztex.<A HREF="./ztex/Ztex1.html" title="class in ztex">Ztex1</A>
<DD>Tries to set the configuration.
</DL>
<HR>
<A NAME="_U_"><!-- --></A><H2>
1214,6 → 1226,12
<DT><A HREF="./ztex/ZtexIhxFile1.html#ZtexIhxFile1(java.lang.String)"><B>ZtexIhxFile1(String)</B></A> -
Constructor for class ztex.<A HREF="./ztex/ZtexIhxFile1.html" title="class in ztex">ZtexIhxFile1</A>
<DD>Constructs an instance from a given file name.
<DT><A HREF="./ztex/ZtexDevice1.html#ztexProductId"><B>ztexProductId</B></A> -
Static variable in class ztex.<A HREF="./ztex/ZtexDevice1.html" title="class in ztex">ZtexDevice1</A>
<DD>USB product ID for ZTEX devices that support ZTEX descriptor 1: 0x100.
<DT><A HREF="./ztex/ZtexDevice1.html#ztexProductIdMax"><B>ztexProductIdMax</B></A> -
Static variable in class ztex.<A HREF="./ztex/ZtexDevice1.html" title="class in ztex">ZtexDevice1</A>
<DD>Largest USB product ID for ZTEX devices that support ZTEX descriptor 1: 0x1ff.
<DT><A HREF="./ztex/ZtexScanBus1.html" title="class in ztex"><B>ZtexScanBus1</B></A> - Class in <A HREF="./ztex/package-summary.html">ztex</A><DD>A class used for finding the EZ-USB devices on the USB.<DT><A HREF="./ztex/ZtexScanBus1.html#ZtexScanBus1(int, int, boolean, boolean, int, int, int, int, int)"><B>ZtexScanBus1(int, int, boolean, boolean, int, int, int, int, int)</B></A> -
Constructor for class ztex.<A HREF="./ztex/ZtexScanBus1.html" title="class in ztex">ZtexScanBus1</A>
<DD>Scans the USB for suitable devices and constructs a list of them.
1223,6 → 1241,9
<DT><A HREF="./ztex/ZtexScanBus1.html#ZtexScanBus1(int, int, boolean, boolean)"><B>ZtexScanBus1(int, int, boolean, boolean)</B></A> -
Constructor for class ztex.<A HREF="./ztex/ZtexScanBus1.html" title="class in ztex">ZtexScanBus1</A>
<DD>Scans the USB for suitable devices and constructs a list of them.
<DT><A HREF="./ztex/ZtexDevice1.html#ztexVendorId"><B>ztexVendorId</B></A> -
Static variable in class ztex.<A HREF="./ztex/ZtexDevice1.html" title="class in ztex">ZtexDevice1</A>
<DD>ZTEX vendor ID: 0x221a
</DL>
<HR>
<A HREF="#_A_">A</A> <A HREF="#_B_">B</A> <A HREF="#_C_">C</A> <A HREF="#_D_">D</A> <A HREF="#_E_">E</A> <A HREF="#_F_">F</A> <A HREF="#_G_">G</A> <A HREF="#_H_">H</A> <A HREF="#_I_">I</A> <A HREF="#_J_">J</A> <A HREF="#_L_">L</A> <A HREF="#_M_">M</A> <A HREF="#_N_">N</A> <A HREF="#_O_">O</A> <A HREF="#_P_">P</A> <A HREF="#_R_">R</A> <A HREF="#_S_">S</A> <A HREF="#_T_">T</A> <A HREF="#_U_">U</A> <A HREF="#_V_">V</A> <A HREF="#_W_">W</A> <A HREF="#_Z_">Z</A>
/docs/java/allclasses-frame.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
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<TITLE>
All Classes
</TITLE>
 
<META NAME="date" CONTENT="2009-12-10">
<META NAME="date" CONTENT="2010-06-11">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="stylesheet.css" TITLE="Style">
 
/docs/java/constant-values.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Thu Dec 10 20:53:20 CET 2009 -->
<!-- Generated by javadoc (build 1.6.0_02) on Fri Jun 11 14:15:44 CEST 2010 -->
<TITLE>
Constant Field Values
</TITLE>
 
<META NAME="date" CONTENT="2009-12-10">
<META NAME="date" CONTENT="2010-06-11">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="stylesheet.css" TITLE="Style">
 
597,6 → 597,24
<TD ALIGN="left"><CODE><A HREF="ztex/ZtexDevice1.html#cypressVendorId">cypressVendorId</A></CODE></TD>
<TD ALIGN="right"><CODE>1204</CODE></TD>
</TR>
<TR BGCOLOR="white" CLASS="TableRowColor">
<A NAME="ztex.ZtexDevice1.ztexProductId"><!-- --></A><TD ALIGN="right"><FONT SIZE="-1">
<CODE>public&nbsp;static&nbsp;final&nbsp;int</CODE></FONT></TD>
<TD ALIGN="left"><CODE><A HREF="ztex/ZtexDevice1.html#ztexProductId">ztexProductId</A></CODE></TD>
<TD ALIGN="right"><CODE>256</CODE></TD>
</TR>
<TR BGCOLOR="white" CLASS="TableRowColor">
<A NAME="ztex.ZtexDevice1.ztexProductIdMax"><!-- --></A><TD ALIGN="right"><FONT SIZE="-1">
<CODE>public&nbsp;static&nbsp;final&nbsp;int</CODE></FONT></TD>
<TD ALIGN="left"><CODE><A HREF="ztex/ZtexDevice1.html#ztexProductIdMax">ztexProductIdMax</A></CODE></TD>
<TD ALIGN="right"><CODE>511</CODE></TD>
</TR>
<TR BGCOLOR="white" CLASS="TableRowColor">
<A NAME="ztex.ZtexDevice1.ztexVendorId"><!-- --></A><TD ALIGN="right"><FONT SIZE="-1">
<CODE>public&nbsp;static&nbsp;final&nbsp;int</CODE></FONT></TD>
<TD ALIGN="left"><CODE><A HREF="ztex/ZtexDevice1.html#ztexVendorId">ztexVendorId</A></CODE></TD>
<TD ALIGN="right"><CODE>8730</CODE></TD>
</TR>
</FONT></TD>
</TR>
</TABLE>
/docs/java/ch/ntb/usb/Usb_Config_Descriptor.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
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<TITLE>
Usb_Config_Descriptor
</TITLE>
 
<META NAME="date" CONTENT="2009-12-10">
<META NAME="date" CONTENT="2010-06-11">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../../../stylesheet.css" TITLE="Style">
 
/docs/java/ch/ntb/usb/USBTimeoutException.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Thu Dec 10 20:53:20 CET 2009 -->
<!-- Generated by javadoc (build 1.6.0_02) on Fri Jun 11 14:15:44 CEST 2010 -->
<TITLE>
USBTimeoutException
</TITLE>
 
<META NAME="date" CONTENT="2009-12-10">
<META NAME="date" CONTENT="2010-06-11">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../../../stylesheet.css" TITLE="Style">
 
/docs/java/ch/ntb/usb/LibusbJava.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Thu Dec 10 20:53:20 CET 2009 -->
<!-- Generated by javadoc (build 1.6.0_02) on Fri Jun 11 14:15:44 CEST 2010 -->
<TITLE>
LibusbJava
</TITLE>
 
<META NAME="date" CONTENT="2009-12-10">
<META NAME="date" CONTENT="2010-06-11">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../../../stylesheet.css" TITLE="Style">
 
/docs/java/ch/ntb/usb/package-frame.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
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ch.ntb.usb
</TITLE>
 
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<META NAME="date" CONTENT="2010-06-11">
 
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/docs/java/ch/ntb/usb/package-summary.html
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ch.ntb.usb
</TITLE>
 
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<META NAME="date" CONTENT="2010-06-11">
 
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/docs/java/ch/ntb/usb/Usb_Descriptor.html
2,12 → 2,12
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Usb_Descriptor
</TITLE>
 
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<META NAME="date" CONTENT="2010-06-11">
 
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/docs/java/ch/ntb/usb/Usb_Endpoint_Descriptor.html
2,12 → 2,12
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<TITLE>
Usb_Endpoint_Descriptor
</TITLE>
 
<META NAME="date" CONTENT="2009-12-10">
<META NAME="date" CONTENT="2010-06-11">
 
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/docs/java/ch/ntb/usb/package-tree.html
2,12 → 2,12
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<TITLE>
ch.ntb.usb Class Hierarchy
</TITLE>
 
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<META NAME="date" CONTENT="2010-06-11">
 
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/docs/java/ch/ntb/usb/USB.html
2,12 → 2,12
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<TITLE>
USB
</TITLE>
 
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<META NAME="date" CONTENT="2010-06-11">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../../../stylesheet.css" TITLE="Style">
 
/docs/java/ch/ntb/usb/LibLoader.html
2,12 → 2,12
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<TITLE>
LibLoader
</TITLE>
 
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<META NAME="date" CONTENT="2010-06-11">
 
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/docs/java/ch/ntb/usb/Device.html
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<TITLE>
Device
</TITLE>
 
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<META NAME="date" CONTENT="2010-06-11">
 
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/docs/java/ch/ntb/usb/Utils.html
2,12 → 2,12
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<TITLE>
Utils
</TITLE>
 
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/docs/java/ch/ntb/usb/Usb_Bus.html
2,12 → 2,12
<!--NewPage-->
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<TITLE>
Usb_Bus
</TITLE>
 
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<META NAME="date" CONTENT="2010-06-11">
 
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/docs/java/ch/ntb/usb/Usb_Device_Descriptor.html
2,12 → 2,12
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<TITLE>
Usb_Device_Descriptor
</TITLE>
 
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/docs/java/ch/ntb/usb/Usb_Interface_Descriptor.html
2,12 → 2,12
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<TITLE>
Usb_Interface_Descriptor
</TITLE>
 
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/docs/java/ch/ntb/usb/Usb_Device.html
2,12 → 2,12
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<TITLE>
Usb_Device
</TITLE>
 
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/docs/java/ch/ntb/usb/USBException.html
2,12 → 2,12
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<TITLE>
USBException
</TITLE>
 
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/docs/java/ch/ntb/usb/Usb_Interface.html
2,12 → 2,12
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<TITLE>
Usb_Interface
</TITLE>
 
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/docs/java/ztex/BitstreamUploadException.html
2,12 → 2,12
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BitstreamUploadException
</TITLE>
 
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/docs/java/ztex/DeviceLostException.html
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DeviceLostException
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/docs/java/ztex/IncompatibleFirmwareException.html
2,12 → 2,12
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<TITLE>
IncompatibleFirmwareException
</TITLE>
 
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/docs/java/ztex/Ztex1v1.html
2,12 → 2,12
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<TITLE>
Ztex1v1
</TITLE>
 
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<LINK REL ="stylesheet" TYPE="text/css" HREF="../stylesheet.css" TITLE="Style">
 
669,7 → 669,7
<TH ALIGN="left"><B>Methods inherited from class ztex.<A HREF="../ztex/Ztex1.html" title="class in ztex">Ztex1</A></B></TH>
</TR>
<TR BGCOLOR="white" CLASS="TableRowColor">
<TD><CODE><A HREF="../ztex/Ztex1.html#dev()">dev</A>, <A HREF="../ztex/Ztex1.html#finalize()">finalize</A>, <A HREF="../ztex/Ztex1.html#handle()">handle</A>, <A HREF="../ztex/Ztex1.html#resetEzUsb()">resetEzUsb</A>, <A HREF="../ztex/Ztex1.html#uploadFirmware(java.lang.String, boolean)">uploadFirmware</A>, <A HREF="../ztex/Ztex1.html#vendorCommand(int, java.lang.String)">vendorCommand</A>, <A HREF="../ztex/Ztex1.html#vendorCommand(int, java.lang.String, int, int)">vendorCommand</A>, <A HREF="../ztex/Ztex1.html#vendorCommand(int, java.lang.String, int, int, byte[], int)">vendorCommand</A>, <A HREF="../ztex/Ztex1.html#vendorCommand2(int, java.lang.String, int, int, byte[], int)">vendorCommand2</A>, <A HREF="../ztex/Ztex1.html#vendorRequest(int, java.lang.String, byte[], int)">vendorRequest</A>, <A HREF="../ztex/Ztex1.html#vendorRequest(int, java.lang.String, int, int, byte[], int)">vendorRequest</A>, <A HREF="../ztex/Ztex1.html#vendorRequest2(int, java.lang.String, byte[], int)">vendorRequest2</A>, <A HREF="../ztex/Ztex1.html#vendorRequest2(int, java.lang.String, int, int, byte[], int)">vendorRequest2</A></CODE></TD>
<TD><CODE><A HREF="../ztex/Ztex1.html#claimInterface(int)">claimInterface</A>, <A HREF="../ztex/Ztex1.html#dev()">dev</A>, <A HREF="../ztex/Ztex1.html#finalize()">finalize</A>, <A HREF="../ztex/Ztex1.html#handle()">handle</A>, <A HREF="../ztex/Ztex1.html#releaseInterface(int)">releaseInterface</A>, <A HREF="../ztex/Ztex1.html#resetEzUsb()">resetEzUsb</A>, <A HREF="../ztex/Ztex1.html#setConfiguration(int)">setConfiguration</A>, <A HREF="../ztex/Ztex1.html#trySetConfiguration(int)">trySetConfiguration</A>, <A HREF="../ztex/Ztex1.html#uploadFirmware(java.lang.String, boolean)">uploadFirmware</A>, <A HREF="../ztex/Ztex1.html#vendorCommand(int, java.lang.String)">vendorCommand</A>, <A HREF="../ztex/Ztex1.html#vendorCommand(int, java.lang.String, int, int)">vendorCommand</A>, <A HREF="../ztex/Ztex1.html#vendorCommand(int, java.lang.String, int, int, byte[], int)">vendorCommand</A>, <A HREF="../ztex/Ztex1.html#vendorCommand2(int, java.lang.String, int, int, byte[], int)">vendorCommand2</A>, <A HREF="../ztex/Ztex1.html#vendorRequest(int, java.lang.String, byte[], int)">vendorRequest</A>, <A HREF="../ztex/Ztex1.html#vendorRequest(int, java.lang.String, int, int, byte[], int)">vendorRequest</A>, <A HREF="../ztex/Ztex1.html#vendorRequest2(int, java.lang.String, byte[], int)">vendorRequest2</A>, <A HREF="../ztex/Ztex1.html#vendorRequest2(int, java.lang.String, int, int, byte[], int)">vendorRequest2</A></CODE></TD>
</TR>
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&nbsp;<A NAME="methods_inherited_from_class_java.lang.Object"><!-- --></A>
/docs/java/ztex/package-frame.html
2,12 → 2,12
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ztex
</TITLE>
 
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/docs/java/ztex/ZtexIhxFile1.html
2,12 → 2,12
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<TITLE>
ZtexIhxFile1
</TITLE>
 
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<META NAME="date" CONTENT="2010-06-11">
 
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/docs/java/ztex/JInputStream.html
2,12 → 2,12
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<TITLE>
JInputStream
</TITLE>
 
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<META NAME="date" CONTENT="2010-06-11">
 
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/docs/java/ztex/package-summary.html
2,12 → 2,12
<!--NewPage-->
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<TITLE>
ztex
</TITLE>
 
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237,7 → 237,7
</table>
 
<p>
<h2>System overview</h2>
<h2>SDK overview</h2>
The following diagram gives an overview about the usage of the different parts of the <a href="http://www.ztex.de/firmware-kit/index.e.html">ZTEX EZ-USB SDK</a>.
<p>
<img src="../../imgs/ztex_firmware_kit-diagram.png" width="660" height="600" alt="ZTEX EZ-USB SDK overview for Linux and Windows">
/docs/java/ztex/package-tree.html
2,12 → 2,12
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<TITLE>
ztex Class Hierarchy
</TITLE>
 
<META NAME="date" CONTENT="2009-12-10">
<META NAME="date" CONTENT="2010-06-11">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../stylesheet.css" TITLE="Style">
 
/docs/java/ztex/EzUsb.html
2,12 → 2,12
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<TITLE>
EzUsb
</TITLE>
 
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<META NAME="date" CONTENT="2010-06-11">
 
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/docs/java/ztex/IhxFile.html
2,12 → 2,12
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<TITLE>
IhxFile
</TITLE>
 
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<META NAME="date" CONTENT="2010-06-11">
 
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/docs/java/ztex/ZtexScanBus1.html
2,12 → 2,12
<!--NewPage-->
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<TITLE>
ZtexScanBus1
</TITLE>
 
<META NAME="date" CONTENT="2009-12-10">
<META NAME="date" CONTENT="2010-06-11">
 
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/docs/java/ztex/ZtexDevice1.html
2,12 → 2,12
<!--NewPage-->
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<TITLE>
ZtexDevice1
</TITLE>
 
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103,6 → 103,7
A class representing an EZ-USB device that supports the ZTEX descriptor 1 or an unconfigured EZ-USB device.<br>
Instances of this class are usually created by <A HREF="../ztex/ZtexScanBus1.html" title="class in ztex"><CODE>ZtexScanBus1</CODE></A>.
The following table describes the ZTEX descriptor 1.
<a name="descriptor"></a>
<table bgcolor="#404040" cellspacing=1 cellpadding=4>
<tr>
<td bgcolor="#d0d0d0" valign="top"><b>Field name</b></td>
205,7 → 206,7
<TD><CODE><B><A HREF="../ztex/ZtexDevice1.html#cypressProductId">cypressProductId</A></B></CODE>
 
<BR>
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;The EZ-USB product ID 0x8613.</TD>
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;EZ-USB USB product ID: 0x8613</TD>
</TR>
<TR BGCOLOR="white" CLASS="TableRowColor">
<TD ALIGN="right" VALIGN="top" WIDTH="1%"><FONT SIZE="-1">
213,8 → 214,32
<TD><CODE><B><A HREF="../ztex/ZtexDevice1.html#cypressVendorId">cypressVendorId</A></B></CODE>
 
<BR>
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;The Cypress vendor ID 0x4b4.</TD>
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;Cypress vendor ID: 0x4b4</TD>
</TR>
<TR BGCOLOR="white" CLASS="TableRowColor">
<TD ALIGN="right" VALIGN="top" WIDTH="1%"><FONT SIZE="-1">
<CODE>static&nbsp;int</CODE></FONT></TD>
<TD><CODE><B><A HREF="../ztex/ZtexDevice1.html#ztexProductId">ztexProductId</A></B></CODE>
 
<BR>
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;USB product ID for ZTEX devices that support ZTEX descriptor 1: 0x100.</TD>
</TR>
<TR BGCOLOR="white" CLASS="TableRowColor">
<TD ALIGN="right" VALIGN="top" WIDTH="1%"><FONT SIZE="-1">
<CODE>static&nbsp;int</CODE></FONT></TD>
<TD><CODE><B><A HREF="../ztex/ZtexDevice1.html#ztexProductIdMax">ztexProductIdMax</A></B></CODE>
 
<BR>
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;Largest USB product ID for ZTEX devices that support ZTEX descriptor 1: 0x1ff.</TD>
</TR>
<TR BGCOLOR="white" CLASS="TableRowColor">
<TD ALIGN="right" VALIGN="top" WIDTH="1%"><FONT SIZE="-1">
<CODE>static&nbsp;int</CODE></FONT></TD>
<TD><CODE><B><A HREF="../ztex/ZtexDevice1.html#ztexVendorId">ztexVendorId</A></B></CODE>
 
<BR>
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;ZTEX vendor ID: 0x221a</TD>
</TR>
</TABLE>
&nbsp;
<!-- ======== CONSTRUCTOR SUMMARY ======== -->
435,7 → 460,7
<PRE>
public static final int <B>cypressVendorId</B></PRE>
<DL>
<DD>The Cypress vendor ID 0x4b4.
<DD>Cypress vendor ID: 0x4b4
<P>
<DL>
<DT><B>See Also:</B><DD><A HREF="../constant-values.html#ztex.ZtexDevice1.cypressVendorId">Constant Field Values</A></DL>
447,12 → 472,57
<PRE>
public static final int <B>cypressProductId</B></PRE>
<DL>
<DD>The EZ-USB product ID 0x8613.
<DD>EZ-USB USB product ID: 0x8613
<P>
<DL>
<DT><B>See Also:</B><DD><A HREF="../constant-values.html#ztex.ZtexDevice1.cypressProductId">Constant Field Values</A></DL>
</DL>
<HR>
 
<A NAME="ztexVendorId"><!-- --></A><H3>
ztexVendorId</H3>
<PRE>
public static final int <B>ztexVendorId</B></PRE>
<DL>
<DD>ZTEX vendor ID: 0x221a
<P>
<DL>
<DT><B>See Also:</B><DD><A HREF="../constant-values.html#ztex.ZtexDevice1.ztexVendorId">Constant Field Values</A></DL>
</DL>
<HR>
 
<A NAME="ztexProductId"><!-- --></A><H3>
ztexProductId</H3>
<PRE>
public static final int <B>ztexProductId</B></PRE>
<DL>
<DD>USB product ID for ZTEX devices that support ZTEX descriptor 1: 0x100.
This product ID is intended for general purpose use and can be shared by all devices that base on ZTEX modules.
Different products are identified by a second product ID, namely the PRODUCT_ID field of the <a href="#descriptor"> ZTEX descriptor 1</a>.
<p>
Please read the <a href="http://www.ztex.de/firmware-kit/usb_ids.e.html">informations about USB vendor and product ID's<a>.
<P>
<DL>
<DT><B>See Also:</B><DD><A HREF="../ztex/ZtexDevice1.html#ztexProductIdMax"><CODE>ztexProductIdMax</CODE></A>,
<A HREF="../constant-values.html#ztex.ZtexDevice1.ztexProductId">Constant Field Values</A></DL>
</DL>
<HR>
 
<A NAME="ztexProductIdMax"><!-- --></A><H3>
ztexProductIdMax</H3>
<PRE>
public static final int <B>ztexProductIdMax</B></PRE>
<DL>
<DD>Largest USB product ID for ZTEX devices that support ZTEX descriptor 1: 0x1ff.
USB product ID's from <A HREF="../ztex/ZtexDevice1.html#ztexProductId"><CODE>ztexProductId</CODE></A>+1 to ztexProductIdMax (0x101 to 0x1ff) are reserved for ZTEX devices and allow to identify products without reading the ZTEX descriptor.
<p>
Please read the <a href="http://www.ztex.de/firmware-kit/usb_ids.e.html">informations about USB vendor and product ID's<a>.
<P>
<DL>
<DT><B>See Also:</B><DD><A HREF="../ztex/ZtexDevice1.html#ztexProductId"><CODE>ztexProductId</CODE></A>,
<A HREF="../constant-values.html#ztex.ZtexDevice1.ztexProductIdMax">Constant Field Values</A></DL>
</DL>
 
<!-- ========= CONSTRUCTOR DETAIL ======== -->
 
<A NAME="constructor_detail"><!-- --></A>
/docs/java/ztex/CapabilityException.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Thu Dec 10 20:53:19 CET 2009 -->
<!-- Generated by javadoc (build 1.6.0_02) on Fri Jun 11 14:15:44 CEST 2010 -->
<TITLE>
CapabilityException
</TITLE>
 
<META NAME="date" CONTENT="2009-12-10">
<META NAME="date" CONTENT="2010-06-11">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../stylesheet.css" TITLE="Style">
 
/docs/java/ztex/FirmwareUploadException.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Thu Dec 10 20:53:19 CET 2009 -->
<!-- Generated by javadoc (build 1.6.0_02) on Fri Jun 11 14:15:44 CEST 2010 -->
<TITLE>
FirmwareUploadException
</TITLE>
 
<META NAME="date" CONTENT="2009-12-10">
<META NAME="date" CONTENT="2010-06-11">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../stylesheet.css" TITLE="Style">
 
/docs/java/ztex/InvalidFirmwareException.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Thu Dec 10 20:53:19 CET 2009 -->
<!-- Generated by javadoc (build 1.6.0_02) on Fri Jun 11 14:15:44 CEST 2010 -->
<TITLE>
InvalidFirmwareException
</TITLE>
 
<META NAME="date" CONTENT="2009-12-10">
<META NAME="date" CONTENT="2010-06-11">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../stylesheet.css" TITLE="Style">
 
/docs/java/ztex/IhxParseException.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Thu Dec 10 20:53:19 CET 2009 -->
<!-- Generated by javadoc (build 1.6.0_02) on Fri Jun 11 14:15:44 CEST 2010 -->
<TITLE>
IhxParseException
</TITLE>
 
<META NAME="date" CONTENT="2009-12-10">
<META NAME="date" CONTENT="2010-06-11">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../stylesheet.css" TITLE="Style">
 
/docs/java/ztex/BitstreamReadException.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Thu Dec 10 20:53:19 CET 2009 -->
<!-- Generated by javadoc (build 1.6.0_02) on Fri Jun 11 14:15:44 CEST 2010 -->
<TITLE>
BitstreamReadException
</TITLE>
 
<META NAME="date" CONTENT="2009-12-10">
<META NAME="date" CONTENT="2010-06-11">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../stylesheet.css" TITLE="Style">
 
/docs/java/ztex/AlreadyConfiguredException.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Thu Dec 10 20:53:19 CET 2009 -->
<!-- Generated by javadoc (build 1.6.0_02) on Fri Jun 11 14:15:44 CEST 2010 -->
<TITLE>
AlreadyConfiguredException
</TITLE>
 
<META NAME="date" CONTENT="2009-12-10">
<META NAME="date" CONTENT="2010-06-11">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../stylesheet.css" TITLE="Style">
 
/docs/java/ztex/UsbException.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Thu Dec 10 20:53:19 CET 2009 -->
<!-- Generated by javadoc (build 1.6.0_02) on Fri Jun 11 14:15:44 CEST 2010 -->
<TITLE>
UsbException
</TITLE>
 
<META NAME="date" CONTENT="2009-12-10">
<META NAME="date" CONTENT="2010-06-11">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../stylesheet.css" TITLE="Style">
 
/docs/java/ztex/IhxFileDamagedException.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Thu Dec 10 20:53:19 CET 2009 -->
<!-- Generated by javadoc (build 1.6.0_02) on Fri Jun 11 14:15:44 CEST 2010 -->
<TITLE>
IhxFileDamagedException
</TITLE>
 
<META NAME="date" CONTENT="2009-12-10">
<META NAME="date" CONTENT="2010-06-11">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../stylesheet.css" TITLE="Style">
 
/docs/java/ztex/Ztex1.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Thu Dec 10 20:53:19 CET 2009 -->
<!-- Generated by javadoc (build 1.6.0_02) on Fri Jun 11 14:15:44 CEST 2010 -->
<TITLE>
Ztex1
</TITLE>
 
<META NAME="date" CONTENT="2009-12-10">
<META NAME="date" CONTENT="2010-06-11">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="../stylesheet.css" TITLE="Style">
 
135,7 → 135,7
<TD><CODE><B><A HREF="../ztex/Ztex1.html#certainWorkarounds">certainWorkarounds</A></B></CODE>
 
<BR>
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;Setting to true will enable certain workarounds, e.g. to deal with bad driver/OS implementations.</TD>
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;Setting to true enables certain workarounds, e.g. to deal with bad driver/OS implementations.</TD>
</TR>
<TR BGCOLOR="white" CLASS="TableRowColor">
<TD ALIGN="right" VALIGN="top" WIDTH="1%"><FONT SIZE="-1">
181,6 → 181,14
</TR>
<TR BGCOLOR="white" CLASS="TableRowColor">
<TD ALIGN="right" VALIGN="top" WIDTH="1%"><FONT SIZE="-1">
<CODE>&nbsp;void</CODE></FONT></TD>
<TD><CODE><B><A HREF="../ztex/Ztex1.html#claimInterface(int)">claimInterface</A></B>(int&nbsp;iface)</CODE>
 
<BR>
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;Claims an interface.</TD>
</TR>
<TR BGCOLOR="white" CLASS="TableRowColor">
<TD ALIGN="right" VALIGN="top" WIDTH="1%"><FONT SIZE="-1">
<CODE>&nbsp;<A HREF="../ztex/ZtexDevice1.html" title="class in ztex">ZtexDevice1</A></CODE></FONT></TD>
<TD><CODE><B><A HREF="../ztex/Ztex1.html#dev()">dev</A></B>()</CODE>
 
206,6 → 214,14
<TR BGCOLOR="white" CLASS="TableRowColor">
<TD ALIGN="right" VALIGN="top" WIDTH="1%"><FONT SIZE="-1">
<CODE>&nbsp;void</CODE></FONT></TD>
<TD><CODE><B><A HREF="../ztex/Ztex1.html#releaseInterface(int)">releaseInterface</A></B>(int&nbsp;iface)</CODE>
 
<BR>
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;Releases an interface.</TD>
</TR>
<TR BGCOLOR="white" CLASS="TableRowColor">
<TD ALIGN="right" VALIGN="top" WIDTH="1%"><FONT SIZE="-1">
<CODE>&nbsp;void</CODE></FONT></TD>
<TD><CODE><B><A HREF="../ztex/Ztex1.html#resetEzUsb()">resetEzUsb</A></B>()</CODE>
 
<BR>
213,6 → 229,14
</TR>
<TR BGCOLOR="white" CLASS="TableRowColor">
<TD ALIGN="right" VALIGN="top" WIDTH="1%"><FONT SIZE="-1">
<CODE>&nbsp;void</CODE></FONT></TD>
<TD><CODE><B><A HREF="../ztex/Ztex1.html#setConfiguration(int)">setConfiguration</A></B>(int&nbsp;config)</CODE>
 
<BR>
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;Sets the configuration.</TD>
</TR>
<TR BGCOLOR="white" CLASS="TableRowColor">
<TD ALIGN="right" VALIGN="top" WIDTH="1%"><FONT SIZE="-1">
<CODE>&nbsp;java.lang.String</CODE></FONT></TD>
<TD><CODE><B><A HREF="../ztex/Ztex1.html#toString()">toString</A></B>()</CODE>
 
221,6 → 245,14
</TR>
<TR BGCOLOR="white" CLASS="TableRowColor">
<TD ALIGN="right" VALIGN="top" WIDTH="1%"><FONT SIZE="-1">
<CODE>&nbsp;void</CODE></FONT></TD>
<TD><CODE><B><A HREF="../ztex/Ztex1.html#trySetConfiguration(int)">trySetConfiguration</A></B>(int&nbsp;config)</CODE>
 
<BR>
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;Tries to set the configuration.</TD>
</TR>
<TR BGCOLOR="white" CLASS="TableRowColor">
<TD ALIGN="right" VALIGN="top" WIDTH="1%"><FONT SIZE="-1">
<CODE>&nbsp;long</CODE></FONT></TD>
<TD><CODE><B><A HREF="../ztex/Ztex1.html#uploadFirmware(java.lang.String, boolean)">uploadFirmware</A></B>(java.lang.String&nbsp;ihxFileName,
boolean&nbsp;force)</CODE>
358,7 → 390,7
<PRE>
public boolean <B>certainWorkarounds</B></PRE>
<DL>
<DD>Setting to true will enable certain workarounds, e.g. to deal with bad driver/OS implementations.
<DD>Setting to true enables certain workarounds, e.g. to deal with bad driver/OS implementations.
<P>
<DL>
</DL>
654,6 → 686,65
</DL>
<HR>
 
<A NAME="setConfiguration(int)"><!-- --></A><H3>
setConfiguration</H3>
<PRE>
public void <B>setConfiguration</B>(int&nbsp;config)
throws <A HREF="../ztex/UsbException.html" title="class in ztex">UsbException</A></PRE>
<DL>
<DD>Sets the configuration.
<P>
<DD><DL>
<DT><B>Parameters:</B><DD><CODE>config</CODE> - The configuration number (usually 1)
<DT><B>Throws:</B>
<DD><CODE><A HREF="../ztex/UsbException.html" title="class in ztex">UsbException</A></CODE> - if an error occurs while attempting to set the configuration.</DL>
</DD>
</DL>
<HR>
 
<A NAME="trySetConfiguration(int)"><!-- --></A><H3>
trySetConfiguration</H3>
<PRE>
public void <B>trySetConfiguration</B>(int&nbsp;config)</PRE>
<DL>
<DD>Tries to set the configuration.
If an error occurs while attempting to set the configuration, a warning messaage is printed to stderr.
<P>
<DD><DL>
<DT><B>Parameters:</B><DD><CODE>config</CODE> - The configuration number (usually 1)</DL>
</DD>
</DL>
<HR>
 
<A NAME="claimInterface(int)"><!-- --></A><H3>
claimInterface</H3>
<PRE>
public void <B>claimInterface</B>(int&nbsp;iface)
throws <A HREF="../ztex/UsbException.html" title="class in ztex">UsbException</A></PRE>
<DL>
<DD>Claims an interface.
<P>
<DD><DL>
<DT><B>Parameters:</B><DD><CODE>iface</CODE> - The interface number (usually 0)
<DT><B>Throws:</B>
<DD><CODE><A HREF="../ztex/UsbException.html" title="class in ztex">UsbException</A></CODE> - if an error occurs while attempting to claim the interface.</DL>
</DD>
</DL>
<HR>
 
<A NAME="releaseInterface(int)"><!-- --></A><H3>
releaseInterface</H3>
<PRE>
public void <B>releaseInterface</B>(int&nbsp;iface)</PRE>
<DL>
<DD>Releases an interface.
<P>
<DD><DL>
<DT><B>Parameters:</B><DD><CODE>iface</CODE> - The interface number (usually 0)</DL>
</DD>
</DL>
<HR>
 
<A NAME="uploadFirmware(java.lang.String, boolean)"><!-- --></A><H3>
uploadFirmware</H3>
<PRE>
/docs/java/help-doc.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Thu Dec 10 20:53:20 CET 2009 -->
<!-- Generated by javadoc (build 1.6.0_02) on Fri Jun 11 14:15:44 CEST 2010 -->
<TITLE>
API Help
</TITLE>
 
<META NAME="date" CONTENT="2009-12-10">
<META NAME="date" CONTENT="2010-06-11">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="stylesheet.css" TITLE="Style">
 
/docs/java/serialized-form.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Thu Dec 10 20:53:20 CET 2009 -->
<!-- Generated by javadoc (build 1.6.0_02) on Fri Jun 11 14:15:44 CEST 2010 -->
<TITLE>
Serialized Form
</TITLE>
 
<META NAME="date" CONTENT="2009-12-10">
<META NAME="date" CONTENT="2010-06-11">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="stylesheet.css" TITLE="Style">
 
/docs/java/overview-frame.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Thu Dec 10 20:53:20 CET 2009 -->
<!-- Generated by javadoc (build 1.6.0_02) on Fri Jun 11 14:15:44 CEST 2010 -->
<TITLE>
Overview List
</TITLE>
 
<META NAME="date" CONTENT="2009-12-10">
<META NAME="date" CONTENT="2010-06-11">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="stylesheet.css" TITLE="Style">
 
/docs/java/overview-summary.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Thu Dec 10 20:53:20 CET 2009 -->
<!-- Generated by javadoc (build 1.6.0_02) on Fri Jun 11 14:15:44 CEST 2010 -->
<TITLE>
Overview
</TITLE>
 
<META NAME="date" CONTENT="2009-12-10">
<META NAME="date" CONTENT="2010-06-11">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="stylesheet.css" TITLE="Style">
 
/docs/java/overview-tree.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Thu Dec 10 20:53:20 CET 2009 -->
<!-- Generated by javadoc (build 1.6.0_02) on Fri Jun 11 14:15:44 CEST 2010 -->
<TITLE>
Class Hierarchy
</TITLE>
 
<META NAME="date" CONTENT="2009-12-10">
<META NAME="date" CONTENT="2010-06-11">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="stylesheet.css" TITLE="Style">
 
/docs/java/index.html
2,7 → 2,7
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc on Thu Dec 10 20:53:20 CET 2009-->
<!-- Generated by javadoc on Fri Jun 11 14:15:44 CEST 2010-->
<TITLE>
Generated Documentation (Untitled)
</TITLE>
/docs/java/deprecated-list.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Thu Dec 10 20:53:20 CET 2009 -->
<!-- Generated by javadoc (build 1.6.0_02) on Fri Jun 11 14:15:44 CEST 2010 -->
<TITLE>
Deprecated List
</TITLE>
 
<META NAME="date" CONTENT="2009-12-10">
<META NAME="date" CONTENT="2010-06-11">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="stylesheet.css" TITLE="Style">
 
/docs/java/allclasses-noframe.html
2,12 → 2,12
<!--NewPage-->
<HTML>
<HEAD>
<!-- Generated by javadoc (build 1.6.0_02) on Thu Dec 10 20:53:20 CET 2009 -->
<!-- Generated by javadoc (build 1.6.0_02) on Fri Jun 11 14:15:44 CEST 2010 -->
<TITLE>
All Classes
</TITLE>
 
<META NAME="date" CONTENT="2009-12-10">
<META NAME="date" CONTENT="2010-06-11">
 
<LINK REL ="stylesheet" TYPE="text/css" HREF="stylesheet.css" TITLE="Style">
 
/Readme
1,10 → 1,9
ZTEX Firmware Kit and Driver API for EZ-USB Microcontrollers
------------------------------------------------------------
ZTEX EZ-USB SDK
---------------
 
This package is especially developed for the ZTEX Modules with EZ-USB
Microcontrollers but also works with other EZ-USB based hardware.
 
 
For documentation and more information please visit
 
http://wiki.ztex.de
/bmp/src/bmpsys.pas
1,6 → 1,6
{*!
bmp -- babel macro processor
Copyright (C) 2008-2009 ZTEX e.K.
Copyright (C) 2009-2010 ZTEX e.K.
http://www.ztex.de
 
This program is free software; you can redistribute it and/or modify
/bmp/src/bmp.pas
1,6 → 1,6
{*!
bmp -- babel macro processor
Copyright (C) 2008-2009 ZTEX e.K.
Copyright (C) 2009-2010 ZTEX e.K.
http://www.ztex.de
 
This program is free software; you can redistribute it and/or modify
390,36 → 390,9
{$ifdef WINDOWS}
initsymb('WINDOWS');
{$endif}
{$ifdef dos}
initsymb('dos');
{$ifdef LINUX}
initsymb('LINUX');
{$endif}
{$ifdef linux}
initsymb('linux');
{$endif}
{$ifdef unix}
initsymb('unix');
{$endif}
{$ifdef go32v1}
initsymb('go32v1');
{$endif}
{$ifdef go32v2}
initsymb('go32v2');
{$endif}
{$ifdef os2}
initsymb('os2');
{$endif}
{$ifdef win32}
initsymb('win32');
{$endif}
{$ifdef macos}
initsymb('macos');
{$endif}
{$ifdef amiga}
initsymb('amiga');
{$endif}
{$ifdef atari}
initsymb('atari');
{$endif}
end;
 
{ ****** destroy **************************************************** }
432,7 → 405,8
 
{ ****** run ******************************************************** }
procedure CMainBmp.run(const mf:ansistring; var fo:text);
var i,mode,j,k,l,bl,ifc : longint;
var i,mode,j,k,l,ifc : longint;
bl,bl_ne : longint;
outfile,bm_expand : longint;
prevli,ampos : dword;
sx,endnoexpand : bmpstring;
657,12 → 631,12
repeat
i+=1;
k:=bufm[(rbp-i) and rbufmax];
// writeln(stderr,' i=',i,' k=',k);
// writeln(stderr,' i=',i,' k=',k,' rbuf=',rbuf[(rbp-i) and rbufmax]);
until (i>=rbufmax) or (k=bm_if) or (k=bm_ifeq_scb2) or (k=bm_ifeq_scb2_ne) or (k=bm_ifneq_scb2) or (k=bm_ifneq_scb2_ne);
repeat
j+=1;
l:=bufm[(rbp-j) and rbufmax];
// writeln(stderr,' j=',j,' l=',l);
// writeln(stderr,' j=',j,' l=',l,' rbuf=',rbuf[(rbp-j) and rbufmax]);
until (j>=rbufmax) or (l=bm_if) or (l=bm_ifeq_scb1) or (l=bm_ifeq_scb1_ne) or (l=bm_ifneq_scb1) or (l=bm_ifneq_scb1_ne);
// writeln(stderr,rbp,',',i,',',j,'-->',rbuf[(rbp-i) and rbufmax],'<-->',rbuf[(rbp-j) and rbufmax],'<--');
until (j>=rbufmax) or (l=bm_if) or (k=bm_if) or (rbuf[(rbp-i) and rbufmax]<>rbuf[(rbp-j) and rbufmax]);
925,11 → 899,12
mode:=bm_plain;
end;
{noexpand mode}
if ((mode=bm_pm) or (mode=bm_ifeq_scb1) or (mode=bm_ifeq_scb2) or (mode=bm_ifneq_scb1) or (mode=bm_ifneq_scb2)) and matchstr(bc_pm+'noexpand'+bc_ob,bm_pm) then
if ((mode=bm_pm) or (mode=bm_ifeq_scb1) or (mode=bm_ifeq_scb2) or (mode=bm_ifneq_scb1) or (mode=bm_ifneq_scb2)) and matchstr(bc_pm+'noexpand'+bc_ob,mode) then
begin
setmode(length(bc_pm+'noexpand'+bc_ob),bm_pm,bm_noexpand);
setmode(length(bc_pm+'noexpand'+bc_ob),mode,bm_noexpand);
mode:=bm_noexpand_scb;
bli[0]:=lineInfo;
bl_ne:=bl;
bl:=1;
end;
if (mode=bm_noexpand_scb) and (bl=0) then
943,15 → 918,13
else mode:=bm_neplain;
end;
ampos:=lineInfo;
bl:=bl_ne-1;
end;
if ((mode=bm_neplain) or (mode=bm_ifeq_scb1_ne) or (mode=bm_ifeq_scb2_ne) or (mode=bm_ifneq_scb1_ne) or (mode=bm_ifneq_scb2_ne)) and (endnoexpand<>'') and matchstr(endnoexpand,bm_neplain) then
if ((mode=bm_neplain) or (mode=bm_ifeq_scb1_ne) or (mode=bm_ifeq_scb2_ne) or (mode=bm_ifneq_scb1_ne) or (mode=bm_ifneq_scb2_ne)) and (endnoexpand<>'') and matchstr(endnoexpand,mode) then
begin
setmode(length(endnoexpand),bm_neplain,bm_noexpand);
setmode(length(endnoexpand),mode,bm_noexpand);
case bm_expand of
bm_ifeq_scb1_ne : mode:=bm_ifeq_scb1;
bm_ifeq_scb2_ne : mode:=bm_ifeq_scb2;
bm_ifneq_scb1_ne : mode:=bm_ifneq_scb1;
bm_ifneq_scb2_ne : mode:=bm_ifneq_scb2;
bm_ifeq_scb1, bm_ifeq_scb2, bm_ifneq_scb1, bm_ifneq_scb2 : mode:=bm_expand;
else mode:=bm_plain;
end;
end;
1561,19 → 1534,19
{ ****** paramerr ***************************************************** }
procedure paramerr(msg:ansistring);
begin
writeln(stderr,'Usage: '+paramstr(0)+' [<Options>] [<filename1> [<filename1> ...]]');
writeln(stderr,'Usage: '+paramstr(0)+' [<Options>] [<filename1> [<filename2> ...]]');
writeln(stderr,'Options: ');
writeln(stderr,' -o <fileneme> Output file');
writeln(stderr,' -p Pascal mode (default), equal to -mm "//" -mo "[" -mc "]" -mp "#"');
writeln(stderr,' -c C mode, equal to -mm "#" -mo "[" -mc "]" -mp "$" -l "\"#line %2 "%1\""');
writeln(stderr,' -i Ignore case');
writeln(stderr,' -l Line info (default for C mode: "#line %2 \"%1\"")');
writeln(stderr,' -c C mode, equal to -mm "#" -mo "[" -mc "]" -mp "$" -l ''#line %2 "%1"''');
writeln(stderr,' -i Ignore upper/lower case');
writeln(stderr,' -l Line info (default for C mode: ''#line %2 "%1"'')');
writeln(stderr,' -I <directory> Include path');
writeln(stderr,' -D <symbol> Define symbol <symbol>');
writeln(stderr,' -mm <string> Meta macro start string');
writeln(stderr,' -mo <char> Open bracket');
writeln(stderr,' -mc <char> Close bracket');
writeln(stderr,' -mp <char> Parameter sign');
writeln(stderr,' -mp <char> Parameter character');
//writeln(stderr,' -nh Disable hints');
{$ifdef ENABLE_DEBUGOUT}
writeln(stderr,' -do Enable debug output');
/bmp/src/textbuf.pas
1,6 → 1,6
{*!
bmp -- babel macro processor
Copyright (C) 2008-2009 ZTEX e.K.
Copyright (C) 2009-2010 ZTEX e.K.
http://www.ztex.de
 
This program is free software; you can redistribute it and/or modify
/examples/usb-fpga-1.2/flashdemo/FlashDemo.java
0,0 → 1,146
/*!
flashdemo -- demo for Flash memory access from firmware and host software for ZTEX USB FPGA Module 1.2
Copyright (C) 2009-2010 ZTEX e.K.
http://www.ztex.de
 
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License version 3 as
published by the Free Software Foundation.
 
This program is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
General Public License for more details.
 
You should have received a copy of the GNU General Public License
along with this program; if not, see http://www.gnu.org/licenses/.
!*/
 
import java.io.*;
import java.util.*;
 
import ch.ntb.usb.*;
 
import ztex.*;
 
// *****************************************************************************
// ******* ParameterException **************************************************
// *****************************************************************************
// Exception the prints a help message
class ParameterException extends Exception {
public final static String helpMsg = new String (
"Parameters:\n"+
" -d <number> Device Number (default: 0)\n" +
" -f Force uploads\n" +
" -p Print bus info\n" +
" -ue Upload Firmware to EEPROM\n" +
" -re Reset EEPROM Firmware\n" +
" -w Enable certain workarounds\n" +
" -h This help" );
public ParameterException (String msg) {
super( msg + "\n" + helpMsg );
}
}
 
// *****************************************************************************
// ******* Test0 ***************************************************************
// *****************************************************************************
class FlashDemo extends Ztex1v1 {
 
// ******* FlashDemo ***********************************************************
// constructor
public FlashDemo ( ZtexDevice1 pDev ) throws UsbException {
super ( pDev );
}
 
// ******* main ****************************************************************
public static void main (String args[]) {
int devNum = 0;
boolean force = false;
boolean workarounds = false;
try {
// init USB stuff
LibusbJava.usb_init();
 
// scan the USB bus
ZtexScanBus1 bus = new ZtexScanBus1( ZtexDevice1.ztexVendorId, ZtexDevice1.ztexProductId, true, false, 1);
if ( bus.numberOfDevices() <= 0) {
System.err.println("No devices found");
System.exit(0);
}
// scan the command line arguments
for (int i=0; i<args.length; i++ ) {
if ( args[i].equals("-d") ) {
i++;
try {
if (i>=args.length) throw new Exception();
devNum = Integer.parseInt( args[i] );
}
catch (Exception e) {
throw new ParameterException("Device number expected after -d");
}
}
else if ( args[i].equals("-f") ) {
force = true;
}
else if ( args[i].equals("-p") ) {
bus.printBus(System.out);
System.exit(0);
}
else if ( args[i].equals("-w") ) {
workarounds = true;
}
else if ( args[i].equals("-h") ) {
System.err.println(ParameterException.helpMsg);
System.exit(0);
}
else if ( !args[i].equals("-re") && !args[i].equals("-ue") )
throw new ParameterException("Invalid Parameter: "+args[i]);
}
 
// create the main class
FlashDemo ztex = new FlashDemo ( bus.device(devNum) );
ztex.certainWorkarounds = workarounds;
// upload the firmware if necessary
if ( force || ! ztex.valid() || ! ztex.dev().productString().equals("Flash demo for UFM 1.2") ) {
System.out.println("Firmware upload time: " + ztex.uploadFirmware( "flashdemo.ihx", force ) + " ms");
}
for (int i=0; i<args.length; i++ ) {
if ( args[i].equals("-re") ) {
ztex.eepromDisable();
}
else if ( args[i].equals("-ue") ) {
System.out.println("Firmware to EEPROM upload time: " + ztex.eepromUpload( "flashdemo.ihx", force ) + " ms");
}
}
// print some information
System.out.println("Capabilities: " + ztex.capabilityInfo(", "));
System.out.println("Enabled: " + ztex.flashEnabled());
System.out.println("Size: " + ztex.flashSize());
byte[] buf = new byte[ztex.flashSectorSize()];
ztex.flashReadSector(0,buf); // read out the las sector;
int sector = (buf[0] & 255) | ((buf[1] & 255) << 8) | ((buf[1] & 255) << 16) | ((buf[1] & 255) << 24);
System.out.println("Last sector: "+sector);
 
ztex.flashReadSector(sector,buf); // read out the string
int i=0;
while ( buf[i] != '\0'&& i < ztex.flashSectorSize() )
i++;
System.out.println("The string: `" + new String(buf,0,i)+ "'");
 
}
catch (Exception e) {
System.out.println("Error: "+e.getLocalizedMessage() );
}
}
}
/examples/usb-fpga-1.2/flashdemo/flashdemo.c
0,0 → 1,63
/*!
flashdemo -- demo for Flash memory access from firmware and host software for ZTEX USB FPGA Module 1.2
Copyright (C) 2009-2010 ZTEX e.K.
http://www.ztex.de
 
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License version 3 as
published by the Free Software Foundation.
 
This program is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
General Public License for more details.
 
You should have received a copy of the GNU General Public License
along with this program; if not, see http://www.gnu.org/licenses/.
!*/
 
#include[ztex-conf.h] // Loads the configuration macros, see ztex-conf.h for the available macros
#include[ztex-utils.h] // include basic functions and variables
 
// select ZTEX USB FPGA Module 1.2 as target
IDENTITY_UFM_1_2(10.11.0.0,0);
 
// enable Flash support
ENABLE_FLASH;
 
// this product string is also used for identification by the host software
#define[PRODUCT_STRING]["Flash demo for UFM 1.2"]
 
code char flash_string[] = "Hello World!";
 
// include the main part of the firmware kit, define the descriptors, ...
#include[ztex.h]
 
void main(void)
{
xdata DWORD sector;
 
init_USB(); // init everything
 
if ( flash_enabled ) {
flash_read_init( 0 ); // prepare reading sector 0
flash_read((xdata BYTE*) &sector, 4); // read the number of last sector
flash_read_finish(flash_sector_size - 4); // dummy-read the rest of the sector + finish read operation
 
sector++;
if ( sector > flash_sectors || sector == 0 ) {
sector = 1;
}
 
flash_write_init( 0 ); // prepare writing sector 0
flash_write((xdata BYTE*) &sector, 4); // write the current sector number
flash_write_finish(flash_sector_size - 4); // dummy-write the rest of the sector + finish write operation
 
flash_write_init( sector ); // prepare writing sector sector
flash_write((xdata BYTE*) flash_string, sizeof(flash_string)); // write the string
flash_write_finish(flash_sector_size - sizeof(flash_string)); // dummy-write the rest of the sector + finish write operation
}
 
while (1) { } // twiddle thumbs
}
 
/examples/usb-fpga-1.2/flashdemo/flashdemo.bat
0,0 → 1,2
java -cp FlashDemo.jar FlashDemo
pause
/examples/usb-fpga-1.2/flashdemo/flashdemo.sh
0,0 → 1,3
#make -C ../../../java distclean all || exit
#make distclean all || exit
java -cp FlashDemo.jar FlashDemo $@
examples/usb-fpga-1.2/flashdemo/flashdemo.sh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: examples/usb-fpga-1.2/flashdemo/Readme =================================================================== --- examples/usb-fpga-1.2/flashdemo/Readme (revision 3) +++ examples/usb-fpga-1.2/flashdemo/Readme (revision 4) @@ -1,4 +1,16 @@ -Please go to the directory ../../usb-1.0/flashdemo and replace -"IDENTITY_UM_1_0(10.20.0.0,0);" by "IDENTITY_UFM_1_2(10.11.0.0,0);" +flashdemo +--------- +This example demonstrates how data can be read and written to/from the +Flash memory. +During the start-up the firmware (defined in flashdemo.c) reads the +number of last sector n from sector 0 (dword at position 0) and +increments it by one. If n is larger than or equal to the total amount +of sectors, or if it is equal to 0, n is set to 1. + +Then n is written back to sector 0 and sector n is filled with the +string "Hello World!". + +The host software (defined in FlashDemo.java) reads out the string from +the last sector of the flash memory.
/examples/usb-fpga-1.2/flashdemo/Makefile
0,0 → 1,23
#########################
# configuration section #
#########################
 
ZTEXPREFIX=../../..
 
JARTARGET=FlashDemo.jar
CLASSTARGETS=FlashDemo.class
CLASSEXTRADEPS=
 
IHXTARGETS=flashdemo.ihx
IHXEXTRADEPS=
EXTRAJARFILES=flashdemo.ihx
EXTRADISTCLEANFILES=
 
default: all
 
################################
# DO NOT CHANAGE THE FOLLOWING #
################################
 
include $(ZTEXPREFIX)/Makefile.mk
 
/examples/usb-fpga-1.2/intraffic/InTraffic.java
0,0 → 1,316
/*!
intraffic -- example showing how the EZ-USB FIFO interface is used on ZTEX USB FPGA Module 1.2
Copyright (C) 2009-2010 ZTEX e.K.
http://www.ztex.de
 
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License version 3 as
published by the Free Software Foundation.
 
This program is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
General Public License for more details.
 
You should have received a copy of the GNU General Public License
along with this program; if not, see http://www.gnu.org/licenses/.
!*/
 
import java.io.*;
import java.util.*;
 
import ch.ntb.usb.*;
 
import ztex.*;
 
// *****************************************************************************
// ******* ParameterException **************************************************
// *****************************************************************************
// Exception the prints a help message
class ParameterException extends Exception {
public final static String helpMsg = new String (
"Parameters:\n"+
" -d <number> Device Number (default: 0)\n" +
" -f Force uploads\n" +
" -p Print bus info\n" +
" -w Enable certain workarounds\n"+
" -h This help" );
public ParameterException (String msg) {
super( msg + "\n" + helpMsg );
}
}
 
// *****************************************************************************
// ******* USBReader ***********************************************************
// *****************************************************************************
class UsbReader extends Thread {
private final int bufNum = 8;
public final int bufSize = 512*1024;
public byte[][] buf = new byte[bufNum][];
public int[] bufBytes = new int[bufNum];
private int readCount = -1;
private int getCount = -1;
public boolean terminate = false;
private Ztex1v1 ztex;
 
public UsbReader ( Ztex1v1 p_ztex ) {
super ();
ztex = p_ztex;
for (int i=0; i<bufNum; i++) {
buf[i]=new byte[bufSize];
}
}
public int getBuffer () {
getCount += 1;
while (getCount >= readCount) {
try {
sleep(1);
}
catch ( InterruptedException e) {
}
}
return getCount % bufNum;
}
 
public void reset () {
getCount = readCount + 1;
}
 
public void run() {
setPriority(MAX_PRIORITY);
 
// claim interface 0
try {
ztex.trySetConfiguration ( 1 );
ztex.claimInterface ( 0 );
}
catch ( Exception e) {
System.out.println("Error: "+e.getLocalizedMessage() );
System.exit(2);
}
// reader loop
while ( !terminate ) {
readCount += 1;
while ( readCount - bufNum >= getCount ) {
try {
sleep(1);
}
catch ( InterruptedException e) {
}
}
 
int i = readCount % bufNum;
bufBytes[i] = LibusbJava.usb_bulk_read(ztex.handle(), 0x82, buf[i], bufSize, 1000);
// System.out.println("Buffer " + i +": read " + bufBytes[i] + " bytes");
}
 
// release interface 0
ztex.releaseInterface( 0 );
}
}
 
 
// *****************************************************************************
// ******* Test0 ***************************************************************
// *****************************************************************************
class InTraffic extends Ztex1v1 {
 
// ******* InTraffic **************************************************************
// constructor
public InTraffic ( ZtexDevice1 pDev ) throws UsbException {
super ( pDev );
}
 
// ******* main ****************************************************************
public static void main (String args[]) {
int devNum = 0;
boolean force = false;
boolean workarounds = false;
try {
// init USB stuff
LibusbJava.usb_init();
 
// scan the USB bus
ZtexScanBus1 bus = new ZtexScanBus1( ZtexDevice1.ztexVendorId, ZtexDevice1.ztexProductId, true, false, 1);
if ( bus.numberOfDevices() <= 0) {
System.err.println("No devices found");
System.exit(0);
}
// scan the command line arguments
for (int i=0; i<args.length; i++ ) {
if ( args[i].equals("-d") ) {
i++;
try {
if (i>=args.length) throw new Exception();
devNum = Integer.parseInt( args[i] );
}
catch (Exception e) {
throw new ParameterException("Device number expected after -d");
}
}
else if ( args[i].equals("-f") ) {
force = true;
}
else if ( args[i].equals("-p") ) {
bus.printBus(System.out);
System.exit(0);
}
else if ( args[i].equals("-p") ) {
bus.printBus(System.out);
System.exit(0);
}
else if ( args[i].equals("-w") ) {
workarounds = true;
}
else if ( args[i].equals("-h") ) {
System.err.println(ParameterException.helpMsg);
System.exit(0);
}
else throw new ParameterException("Invalid Parameter: "+args[i]);
}
 
// create the main class
InTraffic ztex = new InTraffic ( bus.device(devNum) );
ztex.certainWorkarounds = workarounds;
// upload the firmware if necessary
if ( force || ! ztex.valid() || ! ztex.dev().productString().equals("intraffic example for UFM 1.2") ) {
System.out.println("Firmware upload time: " + ztex.uploadFirmware( "intraffic.ihx", force ) + " ms");
}
// upload the bitstream if necessary
if ( force || ! ztex.getFpgaConfiguration() ) {
System.out.println("FPGA configuration time: " + ztex.configureFpga( "fpga/intraffic.bin" , force ) + " ms");
}
 
// read the traffic
UsbReader reader = new UsbReader( ztex );
reader.start();
 
// EZ-USB FIFO test (controlled mode)
ztex.vendorCommand (0x60, "Set test mode", 0, 0);
reader.reset();
int vcurrent = -1;
for (int i=0; i<1000; i++) {
int j = reader.getBuffer();
int bb = reader.bufBytes[j];
byte[] b = reader.buf[j];
int current = vcurrent+1;
int lastwi = -1;
int aerrors = 0;
int ferrors = 0;
int errors = 0;
int prevErrors = 0;
for (int k=1; k<bb; k+=2 ) {
if ( (b[k] & 0x80) == 0 ) {
current = ((b[k] & 0x7f) << 8) | (b[k-1] & 0xff);
if ( lastwi == 0 ) aerrors+=1;
if ( lastwi == 0 ) System.out.println("Alignment error: 0 at " + i + ":" + (k-1) );
lastwi = 0;
}
else {
current |= ((b[k] & 0x7f) << 23) | ((b[k-1] & 0xff) << 15);
vcurrent += 1;
if ( vcurrent % 100 == 90 )
vcurrent += 10;
 
if ( lastwi == 1 ) {
aerrors+=1;
System.out.println("Alignment error: 1 at " + i + ":" + (k-1) );
}
else if ( vcurrent != current ) {
if ( (i != 0) && ( k != 3) ) {
System.out.println("Error: 0b" + Integer.toBinaryString(vcurrent) + " expected at " + i + ":" + (k-3) + " but " );
System.out.println(" 0b" + Integer.toBinaryString(current) + " found");
errors+=1;
prevErrors+=1;
}
vcurrent = current;
}
else {
// if ( prevErrors > 0 ) System.out.println(" 0b" + Integer.toBinaryString(current) );
if ( prevErrors == 1 )
ferrors +=1;
prevErrors = 0;
}
lastwi = 1;
// System.out.println(current);
}
// System.out.println(b[k]+" " +b[k+1]);
}
System.out.print("Buffer " + i + ": " + (errors-ferrors) + " errors, " + ferrors + " FIFO errors, " + aerrors + " alignment errors \r");
}
System.out.println();
 
// performance test (continous mode)
ztex.vendorCommand (0x60, "Set test mode", 1, 0);
reader.reset();
int words = 0;
int intSum = 0;
int intMax = 0;
int intAdj = 0;
int lastwi = -1;
for (int i=0; i<1000; i++) {
int j = reader.getBuffer();
int bb = reader.bufBytes[j];
byte[] b = reader.buf[j];
int current = vcurrent+1;
for (int k=1; k<bb; k+=2 ) {
if ( (b[k] & 0x80) == 0 ) {
current = ((b[k] & 0x7f) << 8) | (b[k-1] & 0xff);
if ( lastwi == 0 ) intAdj -= 1;
lastwi = 0;
}
else {
current |= ((b[k] & 0x7f) << 23) | ((b[k-1] & 0xff) << 15);
if ( lastwi == 1 ) {
intAdj += 1;
}
else {
vcurrent += 1;
int it = (current - vcurrent)*2 + intAdj;
if ( it > 0 && words > 0) {
intSum += it;
if ( it > intMax )
intMax = it;
}
words += 2;
vcurrent = current;
intAdj = 0;
}
lastwi = 1;
// System.out.println(current);
}
// System.out.println(b[k]+" " +b[k+1]);
}
System.out.print("Buffer " + i + ": " + Math.round(words*6000.0/(words+intSum))/100.0 + "MB/s, max. interrupt: " + Math.round(intMax/150.0)/100 + "ms \r");
}
System.out.println();
reader.terminate=true;
}
catch (Exception e) {
System.out.println("Error: "+e.getLocalizedMessage() );
}
}
}
/examples/usb-fpga-1.2/intraffic/intraffic.c
0,0 → 1,101
/*!
intraffic -- example showing how the EZ-USB FIFO interface is used on ZTEX USB FPGA Module 1.2
Copyright (C) 2009-2010 ZTEX e.K.
http://www.ztex.de
 
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License version 3 as
published by the Free Software Foundation.
 
This program is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
General Public License for more details.
 
You should have received a copy of the GNU General Public License
along with this program; if not, see http://www.gnu.org/licenses/.
!*/
 
#include[ztex-conf.h] // Loads the configuration macros, see ztex-conf.h for the available macros
#include[ztex-utils.h] // include basic functions
 
// 1024 (instead of 512) byte bulk transfers.
// According to USB standard they are invalid but usually supported and 25% faster.
//#define[fastmode]
 
#ifdef[fastmode]
// configure endpoint 2, in, quad buffered, 1024 bytes, interface 0
EP_CONFIG(2,0,BULK,IN,1024,4);
#else
// configure endpoint 2, in, quad buffered, 512 bytes, interface 0
EP_CONFIG(2,0,BULK,IN,512,4);
#endif
 
// select ZTEX USB FPGA Module 1.2 as target (required for FPGA configuration)
IDENTITY_UFM_1_2(10.11.0.0,0);
 
// this product string is also used for identification by the host software
#define[PRODUCT_STRING]["intraffic example for UFM 1.2"]
 
// this is called automatically after FPGA configuration
#define[POST_FPGA_CONFIG][POST_FPGA_CONFIG
IOA0 = 1; // reset on
IOA3 = 0; // controlled mode
OEA |= bmBIT0 | bmBIT3;
 
EP2CS &= ~bmBIT0; // clear stall bit
REVCTL = 0x3;
SYNCDELAY;
 
IFCONFIG = bmBIT7 | bmBIT5 | 3; // internel 30MHz clock, drive IFCLK ouput, slave FIFO interface
SYNCDELAY;
EP2FIFOCFG = bmBIT3 | bmBIT0; // AOTUOIN, WORDWIDE
SYNCDELAY;
#ifdef[fastmode]
EP2AUTOINLENH = 4; // 1024 bytes
#else
EP2AUTOINLENH = 2; // 512 bytes
#endif
SYNCDELAY;
EP2AUTOINLENL = 0;
SYNCDELAY;
 
FIFORESET = 0x80; // reset FIFO
SYNCDELAY;
FIFORESET = 2;
SYNCDELAY;
FIFORESET = 0x00;
SYNCDELAY;
 
FIFOPINPOLAR = 0;
SYNCDELAY;
PINFLAGSAB = 0;
SYNCDELAY;
PINFLAGSCD = 0;
SYNCDELAY;
 
IOA0 = 0; // reset off
]
 
// set mode
ADD_EP0_VENDOR_COMMAND((0x60,,
IOA0 = 1; // reset on
IOA3 = SETUPDAT[2] ? 1 : 0;
IOA0 = 0; // reset off
,,
NOP;
));;
 
// include the main part of the firmware kit, define the descriptors, ...
#include[ztex.h]
 
void main(void)
{
init_USB();
 
while (1) {
}
}
 
/examples/usb-fpga-1.2/intraffic/fpga/promgen.sh
0,0 → 1,14
#!/bin/bash
 
# On my computer I use a sript named xilinx to preload the environment
# variables. The command "xilinx ise" starts the ISE for example.
# Therefore we check for the xilinx script first.
if `which xilinx > /dev/null`; then
xilinx="xilinx"
else
xilinx=""
fi
 
for i in *.bit; do
$xilinx promgen -w -p bin -u 0 $i
done
examples/usb-fpga-1.2/intraffic/fpga/promgen.sh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: examples/usb-fpga-1.2/intraffic/fpga/intraffic.ucf =================================================================== --- examples/usb-fpga-1.2/intraffic/fpga/intraffic.ucf (nonexistent) +++ examples/usb-fpga-1.2/intraffic/fpga/intraffic.ucf (revision 4) @@ -0,0 +1,40 @@ +# NET "CLK" TNM_NET = "CLK"; +# TIMESPEC "TS_CLK" = PERIOD "CLK" 20 ns HIGH 50 %; +# NET "CLK" LOC = "P52" | IOSTANDARD = LVCMOS33 ; + +NET "IFCLK" TNM_NET = "IFCLK"; +TIMESPEC "TS_IFCLK" = PERIOD "IFCLK" 20 ns HIGH 50 %; +NET "IFCLK" LOC = "P56" | IOSTANDARD = LVCMOS33 ; + +# TIMESPEC "TS_CLK_IFCLK" = FROM "CLK" TO "IFCLK" 3ns DATAPATHONLY; +# TIMESPEC "TS_IFCLK_CLK" = FROM "IFCLK" TO "CLK" 3ns DATAPATHONLY; + +NET "RESET" LOC = "P31" | IOSTANDARD = LVCMOS33 ; # PA0 +NET "SLOE" LOC = "P30" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # PA2 +NET "CONT" LOC = "P28" | IOSTANDARD = LVCMOS33 ; # PA3 +NET "FIFOADR0" LOC = "P27" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # PA4 +NET "FIFOADR1" LOC = "P26" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # PA5 +NET "PKTEND" LOC = "P25" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # PA6 +# NET "PA7" LOC = "P24" | IOSTANDARD = LVCMOS33 ; + +NET "FD<0>" LOC = "P65" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "FD<1>" LOC = "P63" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "FD<2>" LOC = "P60" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "FD<3>" LOC = "P59" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "FD<4>" LOC = "P51" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "FD<5>" LOC = "P50" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "FD<6>" LOC = "P47" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "FD<7>" LOC = "P46" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "FD<8>" LOC = "P21" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "FD<9>" LOC = "P20" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "FD<10>" LOC = "P18" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "FD<11>" LOC = "P17" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "FD<12>" LOC = "P15" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "FD<13>" LOC = "P14" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "FD<14>" LOC = "P13" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "FD<15>" LOC = "P12" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; + +NET "FLAGB" LOC = "P55" | IOSTANDARD = LVCMOS33 ; + +NET "SLRD" LOC = "P11" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "SLWR" LOC = "P10" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; Index: examples/usb-fpga-1.2/intraffic/fpga/intraffic.ise =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream Index: examples/usb-fpga-1.2/intraffic/fpga/intraffic.ise =================================================================== --- examples/usb-fpga-1.2/intraffic/fpga/intraffic.ise (nonexistent) +++ examples/usb-fpga-1.2/intraffic/fpga/intraffic.ise (revision 4)
examples/usb-fpga-1.2/intraffic/fpga/intraffic.ise Property changes : Added: svn:mime-type ## -0,0 +1 ## +application/octet-stream \ No newline at end of property Index: examples/usb-fpga-1.2/intraffic/fpga/intraffic.vhd =================================================================== --- examples/usb-fpga-1.2/intraffic/fpga/intraffic.vhd (nonexistent) +++ examples/usb-fpga-1.2/intraffic/fpga/intraffic.vhd (revision 4) @@ -0,0 +1,91 @@ +library ieee; +use IEEE.std_logic_1164.all; +use IEEE.std_logic_arith.all; +use IEEE.std_logic_unsigned.all; + + +entity intraffic is + port( + RESET : in std_logic; + CONT : in std_logic; + IFCLK : in std_logic; + + FD : out std_logic_vector(15 downto 0); + + SLOE : out std_logic; + SLRD : out std_logic; + SLWR : out std_logic; + FIFOADR0 : out std_logic; + FIFOADR1 : out std_logic; + PKTEND : out std_logic; + + FLAGB : in std_logic + ); +end intraffic; + +architecture RTL of intraffic is + +---------------------------- +-- test pattern generator -- +---------------------------- +-- 30 bit counter +signal GEN_CNT : std_logic_vector(29 downto 0); +signal INT_CNT : std_logic_vector(6 downto 0); + +signal FIFO_WORD : std_logic; + +begin + + SLOE <= '1'; + SLRD <= '1'; + FIFOADR0 <= '0'; + FIFOADR1 <= '0'; + PKTEND <= '1'; -- no data alignment + + dpIFCLK: process (IFCLK, RESET) + begin +-- reset + if RESET = '1' + then + GEN_CNT <= ( others => '0' ); + INT_CNT <= ( others => '0' ); + FIFO_WORD <= '0'; + SLWR <= '1'; +-- IFCLK + elsif IFCLK'event and IFCLK = '1' + then + + if CONT = '1' or FLAGB = '1' + then + if FIFO_WORD = '0' + then + FD(14 downto 0) <= GEN_CNT(14 downto 0); + else + FD(14 downto 0) <= GEN_CNT(29 downto 15); + end if; + FD(15) <= FIFO_WORD; + + if FIFO_WORD = '1' + then + GEN_CNT <= GEN_CNT + '1'; + if INT_CNT = conv_std_logic_vector(99,7) + then + INT_CNT <= ( others => '0' ); + else + INT_CNT <= INT_CNT + '1'; + end if; + end if; + FIFO_WORD <= not FIFO_WORD; + end if; + + if ( INT_CNT >= conv_std_logic_vector(90,7) ) and ( CONT = '0' ) + then + SLWR <= '1'; + else + SLWR <= '0'; + end if; + + end if; + end process dpIFCLK; + +end RTL; Index: examples/usb-fpga-1.2/intraffic/fpga/clean.sh =================================================================== --- examples/usb-fpga-1.2/intraffic/fpga/clean.sh (nonexistent) +++ examples/usb-fpga-1.2/intraffic/fpga/clean.sh (revision 4) @@ -0,0 +1,79 @@ +#!/bin/bash + +# This files / directories from this directory will not be removed +# Filenames with spaces or other spuid characters will be ignored +sourcefiles="*.vhd *.ucf *.sh *.ise *.bit *.bin *.xise" +subdirs="ipcore_dir" + +# This sould not be edited. +list_files() { + if [ "$2" != "" ]; then + echo "$1" + for i in $2; do + echo " $i" + done + fi +} + +rmfiles="" +rmdirs="" +keepfiles="" +keepdirs="" +allfiles=`ls -A` +for f in $allfiles; do + keep=false + for i in $sourcefiles; do + if [ "$i" == "$f" ]; then + keep=true + fi + done + for i in $subdirs; do + if [ "$i" == "$f" ]; then + keep=true + fi + done + if [ -d "$f" ]; then + if $keep; then + keepdirs+=" $f" + else + rmdirs+=" $f" + fi + fi + if [ -f "$f" ]; then + if $keep; then + keepfiles+=" $f" + else + rmfiles+=" $f" + fi + fi +done + +echo +echo "Directory $PWD:" +list_files "This directories will NOT be removed:" "$keepdirs" +list_files "This files will NOT be removed:" "$keepfiles" +list_files "This directories will be removed:" "$rmdirs" +list_files "This files will be removed:" "$rmfiles" + +if [ "$rmfiles" == "" -a "$rmdirs" == "" ]; then + c="yes" +else + echo -n 'Confirm this by entering "yes": ' + read c +fi + +if [ "$c" == "yes" ]; then + [ "$rmfiles" != "" ] && rm $rmfiles + [ "$rmdirs" != "" ] && rm -r $rmdirs + + for d in $subdirs; do + if [ -x "$d/clean.sh" ]; then + cd $d + ./clean.sh || exit 1 + cd .. + fi + done + + exit 0 +fi +exit 1
examples/usb-fpga-1.2/intraffic/fpga/clean.sh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: examples/usb-fpga-1.2/intraffic/fpga/intraffic.xise =================================================================== --- examples/usb-fpga-1.2/intraffic/fpga/intraffic.xise (nonexistent) +++ examples/usb-fpga-1.2/intraffic/fpga/intraffic.xise (revision 4) @@ -0,0 +1,306 @@ + + + +
+ + + + + + + + +
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Index: examples/usb-fpga-1.2/intraffic/Makefile =================================================================== --- examples/usb-fpga-1.2/intraffic/Makefile (nonexistent) +++ examples/usb-fpga-1.2/intraffic/Makefile (revision 4) @@ -0,0 +1,27 @@ +######################### +# configuration section # +######################### + +# Defines the location of the EZ-USB SDK +ZTEXPREFIX=../../.. + +# The name of the jar archive +JARTARGET=InTraffic.jar +# Java Classes that have to be build +CLASSTARGETS=InTraffic.class +# Extra dependencies for Java Classes +CLASSEXTRADEPS= + +# ihx files (firmware ROM files) that have to be build +IHXTARGETS=intraffic.ihx +# Extra Dependencies for ihx files +IHXEXTRADEPS= + +# Extra files that should be included into th jar archive +EXTRAJARFILES=intraffic.ihx fpga/intraffic.bin + +################################ +# DO NOT CHANAGE THE FOLLOWING # +################################ +# includes the main Makefile +include $(ZTEXPREFIX)/Makefile.mk Index: examples/usb-fpga-1.2/intraffic/Readme =================================================================== --- examples/usb-fpga-1.2/intraffic/Readme (nonexistent) +++ examples/usb-fpga-1.2/intraffic/Readme (revision 4) @@ -0,0 +1,18 @@ +intraffic +--------- + +This example shows how the EZ-USB input FIFO interface is used. + +A traffic generator sends test data to the EZ-USB. The hosts PC reads +out this data and verifies it. + +The traffic generator is implemented in the FPGA and supports two modes: + +1. (IOA3=0) This mode supports data flow control using FIFO full flag + (FLAGB) and SLWR control pin. Use this mode as starting point for + data acquisition applications. + +2. (IOA=3) In this mode and uninterrupted test pattern is generated, + i.e. flow control is disabled. This mode is used for performance + measurements (speed rate and interrupt measurements) + Index: examples/usb-fpga-1.2/intraffic/intraffic.sh =================================================================== --- examples/usb-fpga-1.2/intraffic/intraffic.sh (nonexistent) +++ examples/usb-fpga-1.2/intraffic/intraffic.sh (revision 4) @@ -0,0 +1,5 @@ +#make -C ../../../java distclean all || exit +#cd fpga; ./promgen.sh; cd .. +#make distclean all || exit +#make || exit +java -cp InTraffic.jar InTraffic $@
examples/usb-fpga-1.2/intraffic/intraffic.sh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: examples/usb-fpga-1.2/ucecho/ucecho.sh =================================================================== --- examples/usb-fpga-1.2/ucecho/ucecho.sh (revision 3) +++ examples/usb-fpga-1.2/ucecho/ucecho.sh (revision 4) @@ -1,3 +1,4 @@ #make -C ../../../java distclean all || exit +#make distclean all || exit #make || exit java -cp UCEcho.jar UCEcho $@ Index: examples/usb-fpga-1.2/ucecho/UCEcho.java =================================================================== --- examples/usb-fpga-1.2/ucecho/UCEcho.java (revision 3) +++ examples/usb-fpga-1.2/ucecho/UCEcho.java (revision 4) @@ -1,6 +1,6 @@ /*! - ucecho -- example for ZTEX USB FPGA Module 1.2 - Copyright (C) 2008-2009 ZTEX e.K. + ucecho -- uppercase conversion example for ZTEX USB FPGA Module 1.2 + Copyright (C) 2009-2010 ZTEX e.K. http://www.ztex.de This program is free software; you can redistribute it and/or modify @@ -52,21 +52,6 @@ super ( pDev ); } -// ******* claimInterface ****************************************************** -// claims interface 0 - public void claimInterface ( ) throws UsbException{ - if ( LibusbJava.usb_set_configuration(handle(), 1) < 0 ) - throw new UsbException("Setting configuration to 1 failed: " + LibusbJava.usb_strerror()); - if ( LibusbJava.usb_claim_interface(handle(), 0) < 0 ) - throw new UsbException("Claiming interface 0 failed: " + LibusbJava.usb_strerror()); - } - -// ******* releaseInterface **************************************************** -// releases interface 0 - public void releaseInterface ( ) { - LibusbJava.usb_release_interface(handle(), 0); - } - // ******* echo **************************************************************** // writes a string to Endpoint 4, reads it back from Endpoint 2 and writes the output to System.out public void echo ( String input ) throws UsbException { @@ -101,7 +86,7 @@ LibusbJava.usb_init(); // scan the USB bus - ZtexScanBus1 bus = new ZtexScanBus1( ZtexDevice1.cypressVendorId, ZtexDevice1.cypressProductId, true, false, 1); + ZtexScanBus1 bus = new ZtexScanBus1( ZtexDevice1.ztexVendorId, ZtexDevice1.ztexProductId, true, false, 1); if ( bus.numberOfDevices() <= 0) { System.err.println("No devices found"); System.exit(0); @@ -146,7 +131,7 @@ ztex.certainWorkarounds = workarounds; // upload the firmware if necessary - if ( force || ! ztex.valid() || ! ztex.dev().productString().equals("ucecho for USB FPGA MODULE 1.2") ) { + if ( force || ! ztex.valid() || ! ztex.dev().productString().equals("ucecho example for UFM 1.2") ) { System.out.println("Firmware upload time: " + ztex.uploadFirmware( "ucecho.ihx", force ) + " ms"); } @@ -157,7 +142,8 @@ // claim interface 0 - ztex.claimInterface(); + ztex.trySetConfiguration ( 1 ); + ztex.claimInterface ( 0 ); // read string from stdin and write it to USB device String str = ""; @@ -171,7 +157,7 @@ } // release interface 0 - ztex.releaseInterface(); + ztex.releaseInterface( 0 ); } catch (Exception e) {
/examples/usb-fpga-1.2/ucecho/ucecho.c
1,6 → 1,6
/*!
ucecho -- example for ZTEX USB FPGA Module 1.2
Copyright (C) 2008-2009 ZTEX e.K.
ucecho -- uppercase conversion example for ZTEX USB FPGA Module 1.2
Copyright (C) 2009-2010 ZTEX e.K.
http://www.ztex.de
 
This program is free software; you can redistribute it and/or modify
19,18 → 19,15
#include[ztex-conf.h] // Loads the configuration macros, see ztex-conf.h for the available macros
#include[ztex-utils.h] // include basic functions
 
// Cypress vendor ID and product ID may only (!) be used for experimental purposes
SET_VPID(0x4b4,0x8613);
 
// define endpoints 2 and 4, both belong to interface 0 (in/out are from the point of view of the host)
// configure endpoints 2 and 4, both belong to interface 0 (in/out are from the point of view of the host)
EP_CONFIG(2,0,BULK,IN,512,2);
EP_CONFIG(4,0,BULK,OUT,512,2);
 
// select ZTEX USB FPGA Module 1.2 as target (Important for FPGA configuration)
// select ZTEX USB FPGA Module 1.2 as target (required for FPGA configuration)
IDENTITY_UFM_1_2(10.11.0.0,0);
 
// give them a nice name
#define[PRODUCT_STRING]["ucecho for USB FPGA MODULE 1.2"]
// this product string is also used for identification by the host software
#define[PRODUCT_STRING]["ucecho example for UFM 1.2"]
 
// this is called automatically after FPGA configuration
#define[POST_FPGA_CONFIG][POST_FPGA_CONFIG
40,7 → 37,6
// include the main part of the firmware kit, define the descriptors, ...
#include[ztex.h]
 
 
void main(void)
{
WORD i,size;
/examples/usb-fpga-1.2/ucecho/Makefile
2,20 → 2,26
# configuration section #
#########################
 
# Defines the location of the EZ-USB SDK
ZTEXPREFIX=../../..
 
# The name of the jar archive
JARTARGET=UCEcho.jar
# Java Classes that have to be build
CLASSTARGETS=UCEcho.class
# Extra dependencies for Java Classes
CLASSEXTRADEPS=
#CLASSEXTRADEPS:=$(shell echo $(ZTEXPREFIX)/java/ztex/*.java)
 
# ihx files (firmware ROM files) that have to be build
IHXTARGETS=ucecho.ihx
# Extra Dependencies for ihx files
IHXEXTRADEPS=
#IHXEXTRADEPS:=$(shell echo $(ZTEXPREFIX)/include/*.h)
 
# Extra files that should be included into th jar archive
EXTRAJARFILES=ucecho.ihx fpga/ucecho.bin
 
################################
# DO NOT CHANAGE THE FOLLOWING #
################################
 
# includes the main Makefile
include $(ZTEXPREFIX)/Makefile.mk
/examples/usb-fpga-1.2/ucecho/fpga/ucecho.ucf
1,7 → 1,7
NET "CLK" TNM_NET = "CLK";
TIMESPEC "TS_CLK" = PERIOD "CLK" 20 ns HIGH 50 %;
#PACE: Start of PACE I/O Pin Assignments
NET "CLK" LOC = "P52" | IOSTANDARD = LVCMOS33 ;
 
NET "pb<0>" LOC = "P65" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;
NET "pb<1>" LOC = "P63" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;
NET "pb<2>" LOC = "P60" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;
10,6 → 10,7
NET "pb<5>" LOC = "P50" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;
NET "pb<6>" LOC = "P47" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;
NET "pb<7>" LOC = "P46" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;
 
NET "pc<0>" LOC = "P58" | IOSTANDARD = LVCMOS33 ;
NET "pc<1>" LOC = "P44" | IOSTANDARD = LVCMOS33 ;
NET "pc<2>" LOC = "P41" | IOSTANDARD = LVCMOS33 ;
/examples/usb-fpga-1.2/ucecho/fpga/ucecho.ise Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream
/examples/usb-fpga-1.2/ucecho/fpga/clean.sh
2,7 → 2,8
 
# This files / directories from this directory will not be removed
# Filenames with spaces or other spuid characters will be ignored
sourcefiles="*.vhd *.ucf *.sh *.ise *.bit *.bin"
sourcefiles="*.vhd *.ucf *.sh *.ise *.bit *.bin *.xise"
subdirs="ipcore_dir"
 
 
# This sould not be edited.
27,9 → 28,9
keep=true
fi
done
for i in $binfiles; do # binfiles is set by distclean.sh
for i in $subdirs; do
if [ "$i" == "$f" ]; then
keep=false
keep=true
fi
done
if [ -d "$f" ]; then
48,7 → 49,8
fi
done
 
echo
echo "Directory $PWD:"
list_files "This directories will NOT be removed:" "$keepdirs"
list_files "This files will NOT be removed:" "$keepfiles"
list_files "This directories will be removed:" "$rmdirs"
55,16 → 57,24
list_files "This files will be removed:" "$rmfiles"
 
if [ "$rmfiles" == "" -a "$rmdirs" == "" ]; then
exit 0
c="yes"
else
echo -n 'Confirm this by entering "yes": '
read c
fi
echo -n 'Confirm this by entering "yes": '
read c
if [ "$c" == "yes" ]; then
[ "$rmfiles" != "" ] && rm $rmfiles
[ "$rmdirs" != "" ] && rm -r $rmdirs
 
for d in $subdirs; do
if [ -x "$d/clean.sh" ]; then
cd $d
./clean.sh || exit 1
cd ..
fi
done
 
exit 0
fi
exit 1
 
 
/examples/usb-fpga-1.2/ucecho/fpga/ucecho.xise
0,0 → 1,319
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<project xmlns="http://www.xilinx.com/XMLSchema" xmlns:xil_pn="http://www.xilinx.com/XMLSchema">
 
<header>
<!-- ISE source project file created by Project Navigator. -->
<!-- -->
<!-- This file contains project source information including a list of -->
<!-- project source files, project and process properties. This file, -->
<!-- along with the project source files, is sufficient to open and -->
<!-- implement in ISE Project Navigator. -->
<!-- -->
<!-- Copyright (c) 1995-2009 Xilinx, Inc. All rights reserved. -->
</header>
 
<version xil_pn:ise_version="11.4" xil_pn:schema_version="2"/>
 
<files>
<file xil_pn:name="ucecho.ucf" xil_pn:type="FILE_UCF">
<association xil_pn:name="Implementation"/>
</file>
<file xil_pn:name="ucecho.vhd" xil_pn:type="FILE_VHDL">
<association xil_pn:name="BehavioralSimulation"/>
<association xil_pn:name="Implementation"/>
</file>
</files>
 
<properties>
<property xil_pn:name="Add I/O Buffers" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Allow Logic Optimization Across Hierarchy" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Allow SelectMAP Pins to Persist" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Allow Unexpanded Blocks" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Allow Unmatched LOC Constraints" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Allow Unmatched Timing Group Constraints" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Asynchronous To Synchronous" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Auto Implementation Compile Order" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Auto Implementation Top" xil_pn:value="false" xil_pn:valueState="non-default"/>
<property xil_pn:name="Automatic BRAM Packing" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Automatically Insert glbl Module in the Netlist" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Automatically Run Generate Target PROM/ACE File" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="BRAM Utilization Ratio" xil_pn:value="100" xil_pn:valueState="default"/>
<property xil_pn:name="Baud rate" xil_pn:value="None" xil_pn:valueState="default"/>
<property xil_pn:name="Bring Out Global Set/Reset Net as a Port" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Bring Out Global Tristate Net as a Port" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Bus Delimiter" xil_pn:value="&lt;>" xil_pn:valueState="default"/>
<property xil_pn:name="CLB Pack Factor Percentage" xil_pn:value="100" xil_pn:valueState="default"/>
<property xil_pn:name="Case" xil_pn:value="Maintain" xil_pn:valueState="default"/>
<property xil_pn:name="Case Implementation Style" xil_pn:value="None" xil_pn:valueState="default"/>
<property xil_pn:name="Change Device Speed To" xil_pn:value="-4" xil_pn:valueState="default"/>
<property xil_pn:name="Change Device Speed To Post Trace" xil_pn:value="-4" xil_pn:valueState="default"/>
<property xil_pn:name="Combinatorial Logic Optimization" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Compile EDK Simulation Library" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Compile SIMPRIM (Timing) Simulation Library" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Compile UNISIM (Functional) Simulation Library" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Compile XilinxCoreLib (CORE Generator) Simulation Library" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Compile for HDL Debugging" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Configuration Clk (Configuration Pins)" xil_pn:value="Pull Up" xil_pn:valueState="default"/>
<property xil_pn:name="Configuration Pin Done" xil_pn:value="Pull Up" xil_pn:valueState="default"/>
<property xil_pn:name="Configuration Pin HSWAPEN" xil_pn:value="Pull Up" xil_pn:valueState="default"/>
<property xil_pn:name="Configuration Pin M0" xil_pn:value="Pull Up" xil_pn:valueState="default"/>
<property xil_pn:name="Configuration Pin M1" xil_pn:value="Pull Up" xil_pn:valueState="default"/>
<property xil_pn:name="Configuration Pin M2" xil_pn:value="Pull Up" xil_pn:valueState="default"/>
<property xil_pn:name="Configuration Pin Program" xil_pn:value="Pull Up" xil_pn:valueState="default"/>
<property xil_pn:name="Configuration Rate" xil_pn:value="Default (6)" xil_pn:valueState="default"/>
<property xil_pn:name="Convert Tristates To Logic" xil_pn:value="Yes" xil_pn:valueState="default"/>
<property xil_pn:name="Correlate Output to Input Design" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Create ASCII Configuration File" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Create Binary Configuration File" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Create Bit File" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Create I/O Pads from Ports" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Create IEEE 1532 Configuration File" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Create Logic Allocation File" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Create Mask File" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Create ReadBack Data Files" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Cross Clock Analysis" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="DCI Update Mode" xil_pn:value="As Required" xil_pn:valueState="default"/>
<property xil_pn:name="Decoder Extraction" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Delay Values To Be Read from SDF" xil_pn:value="Setup Time" xil_pn:valueState="default"/>
<property xil_pn:name="Device" xil_pn:value="xc3s400" xil_pn:valueState="non-default"/>
<property xil_pn:name="Device Family" xil_pn:value="Spartan3" xil_pn:valueState="non-default"/>
<property xil_pn:name="Device Speed Grade/Select ABS Minimum" xil_pn:value="-4" xil_pn:valueState="default"/>
<property xil_pn:name="Display Incremental Messages" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Do Not Escape Signal and Instance Names in Netlist" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Done (Output Events)" xil_pn:value="Default (4)" xil_pn:valueState="default"/>
<property xil_pn:name="Drive Done Pin High" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Enable BitStream Compression" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Enable Cyclic Redundancy Checking (CRC)" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Enable Debugging of Serial Mode BitStream" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Enable Enhanced Design Summary" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Enable Internal Done Pipe" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Enable Message Filtering" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Enable Outputs (Output Events)" xil_pn:value="6" xil_pn:valueState="non-default"/>
<property xil_pn:name="Equivalent Register Removal XST" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Exclude Compilation of Deprecated EDK Cores" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Exclude Compilation of EDK Sub-Libraries" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Extra Effort" xil_pn:value="None" xil_pn:valueState="default"/>
<property xil_pn:name="Extra Effort (Highest PAR level only)" xil_pn:value="None" xil_pn:valueState="default"/>
<property xil_pn:name="FPGA Start-Up Clock" xil_pn:value="CCLK" xil_pn:valueState="default"/>
<property xil_pn:name="FSM Encoding Algorithm" xil_pn:value="Auto" xil_pn:valueState="default"/>
<property xil_pn:name="FSM Style" xil_pn:value="LUT" xil_pn:valueState="default"/>
<property xil_pn:name="Filter Files From Compile Order" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Flatten Output Netlist" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Functional Model Target Language ArchWiz" xil_pn:value="VHDL" xil_pn:valueState="default"/>
<property xil_pn:name="Functional Model Target Language Coregen" xil_pn:value="VHDL" xil_pn:valueState="default"/>
<property xil_pn:name="Functional Model Target Language Schematic" xil_pn:value="VHDL" xil_pn:valueState="default"/>
<property xil_pn:name="Generate Architecture Only (No Entity Declaration)" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Generate Asynchronous Delay Report" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Generate Clock Region Report" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Generate Constraints Interaction Report" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Generate Constraints Interaction Report Post Trace" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Generate Datasheet Section" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Generate Datasheet Section Post Trace" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Generate Detailed MAP Report" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Generate Multiple Hierarchical Netlist Files" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Generate Post-Place &amp; Route Power Report" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Generate Post-Place &amp; Route Simulation Model" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Generate RTL Schematic" xil_pn:value="Yes" xil_pn:valueState="default"/>
<property xil_pn:name="Generate SAIF File for Power Optimization/Estimation Par" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Generate Testbench File" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Generate Timegroups Section" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Generate Timegroups Section Post Trace" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Generics, Parameters" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Global Clock Delay 0 (Binary String)" xil_pn:value="11111" xil_pn:valueState="default"/>
<property xil_pn:name="Global Clock Delay 1 (Binary String)" xil_pn:value="11111" xil_pn:valueState="default"/>
<property xil_pn:name="Global Clock Delay 2 (Binary String)" xil_pn:value="11111" xil_pn:valueState="default"/>
<property xil_pn:name="Global Clock Delay 3 (Binary String)" xil_pn:value="11111" xil_pn:valueState="default"/>
<property xil_pn:name="Global Optimization Goal" xil_pn:value="AllClockNets" xil_pn:valueState="default"/>
<property xil_pn:name="Global Set/Reset Port Name" xil_pn:value="GSR_PORT" xil_pn:valueState="default"/>
<property xil_pn:name="Global Tristate Port Name" xil_pn:value="GTS_PORT" xil_pn:valueState="default"/>
<property xil_pn:name="Hierarchy Separator" xil_pn:value="/" xil_pn:valueState="default"/>
<property xil_pn:name="ISim UUT Instance Name" xil_pn:value="UUT" xil_pn:valueState="default"/>
<property xil_pn:name="Ignore User Timing Constraints Map" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Ignore User Timing Constraints Par" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Implementation Top" xil_pn:value="Architecture|ucecho|RTL" xil_pn:valueState="non-default"/>
<property xil_pn:name="Implementation Top Instance Path" xil_pn:value="/ucecho" xil_pn:valueState="non-default"/>
<property xil_pn:name="Include 'uselib Directive in Verilog File" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Include SIMPRIM Models in Verilog File" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Include UNISIM Models in Verilog File" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Include sdf_annotate task in Verilog File" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Incremental Compilation" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Insert Buffers to Prevent Pulse Swallowing" xil_pn:value="false" xil_pn:valueState="non-default"/>
<property xil_pn:name="Instantiation Template Target Language Xps" xil_pn:value="VHDL" xil_pn:valueState="default"/>
<property xil_pn:name="JTAG Pin TCK" xil_pn:value="Pull Up" xil_pn:valueState="default"/>
<property xil_pn:name="JTAG Pin TDI" xil_pn:value="Pull Up" xil_pn:valueState="default"/>
<property xil_pn:name="JTAG Pin TDO" xil_pn:value="Pull Up" xil_pn:valueState="default"/>
<property xil_pn:name="JTAG Pin TMS" xil_pn:value="Pull Up" xil_pn:valueState="default"/>
<property xil_pn:name="Keep Hierarchy" xil_pn:value="No" xil_pn:valueState="default"/>
<property xil_pn:name="Language" xil_pn:value="VHDL" xil_pn:valueState="default"/>
<property xil_pn:name="Last Applied Goal" xil_pn:value="Balanced" xil_pn:valueState="default"/>
<property xil_pn:name="Last Applied Strategy" xil_pn:value="Xilinx Default (unlocked)" xil_pn:valueState="default"/>
<property xil_pn:name="Last Unlock Status" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Load Setting File" xil_pn:value="Default" xil_pn:valueState="non-default"/>
<property xil_pn:name="Logical Shifter Extraction" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Manual Implementation Compile Order" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Map Effort Level" xil_pn:value="Standard" xil_pn:valueState="non-default"/>
<property xil_pn:name="Map Slice Logic into Unused Block RAMs" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Max Fanout" xil_pn:value="100" xil_pn:valueState="non-default"/>
<property xil_pn:name="Maximum Number of Lines in Report" xil_pn:value="1000" xil_pn:valueState="default"/>
<property xil_pn:name="Maximum Signal Name Length" xil_pn:value="20" xil_pn:valueState="default"/>
<property xil_pn:name="Move First Flip-Flop Stage" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Move Last Flip-Flop Stage" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Multiplier Style" xil_pn:value="LUT" xil_pn:valueState="non-default"/>
<property xil_pn:name="Mux Extraction" xil_pn:value="Yes" xil_pn:valueState="default"/>
<property xil_pn:name="Mux Style" xil_pn:value="Auto" xil_pn:valueState="default"/>
<property xil_pn:name="Netlist Hierarchy" xil_pn:value="As Optimized" xil_pn:valueState="default"/>
<property xil_pn:name="Netlist Translation Type" xil_pn:value="Timestamp" xil_pn:valueState="default"/>
<property xil_pn:name="Number of Clock Buffers" xil_pn:value="4" xil_pn:valueState="non-default"/>
<property xil_pn:name="Number of Paths in Error/Verbose Report" xil_pn:value="3" xil_pn:valueState="default"/>
<property xil_pn:name="Number of Paths in Error/Verbose Report Post Trace" xil_pn:value="3" xil_pn:valueState="default"/>
<property xil_pn:name="Optimization Effort" xil_pn:value="Normal" xil_pn:valueState="default"/>
<property xil_pn:name="Optimization Goal" xil_pn:value="Speed" xil_pn:valueState="default"/>
<property xil_pn:name="Optimization Strategy (Cover Mode)" xil_pn:value="Area" xil_pn:valueState="default"/>
<property xil_pn:name="Optimize Instantiated Primitives" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Other Bitgen Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Other Compiler Options" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Other Compiler Options Par" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Other Compxlib Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Other Map Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Other NETGEN Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Other Ngdbuild Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Other Place &amp; Route Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Other XPWR Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Other XST Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Output Extended Identifiers" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Output File Name" xil_pn:value="ucecho" xil_pn:valueState="default"/>
<property xil_pn:name="Overwrite Compiled Libraries" xil_pn:value="true" xil_pn:valueState="non-default"/>
<property xil_pn:name="Pack I/O Registers into IOBs" xil_pn:value="Auto" xil_pn:valueState="default"/>
<property xil_pn:name="Pack I/O Registers/Latches into IOBs" xil_pn:value="For Inputs and Outputs" xil_pn:valueState="non-default"/>
<property xil_pn:name="Package" xil_pn:value="tq144" xil_pn:valueState="non-default"/>
<property xil_pn:name="Perform Advanced Analysis" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Perform Advanced Analysis Post Trace" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Perform Timing-Driven Packing and Placement" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Place &amp; Route Effort Level (Overall)" xil_pn:value="Standard" xil_pn:valueState="non-default"/>
<property xil_pn:name="Place And Route Mode" xil_pn:value="Normal Place and Route" xil_pn:valueState="default"/>
<property xil_pn:name="Placer Effort Level (Overrides Overall Level)" xil_pn:value="None" xil_pn:valueState="default"/>
<property xil_pn:name="Port to be used" xil_pn:value="Auto - default" xil_pn:valueState="default"/>
<property xil_pn:name="Post Map Simulation Model Name" xil_pn:value="ucecho_map.vhd" xil_pn:valueState="default"/>
<property xil_pn:name="Post Place &amp; Route Simulation Model Name" xil_pn:value="ucecho_timesim.vhd" xil_pn:valueState="default"/>
<property xil_pn:name="Post Synthesis Simulation Model Name" xil_pn:value="ucecho_synthesis.vhd" xil_pn:valueState="default"/>
<property xil_pn:name="Post Translate Simulation Model Name" xil_pn:value="ucecho_translate.vhd" xil_pn:valueState="default"/>
<property xil_pn:name="Power Reduction Map" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Power Reduction Par" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Preferred Language" xil_pn:value="VHDL" xil_pn:valueState="non-default"/>
<property xil_pn:name="Priority Encoder Extraction" xil_pn:value="Yes" xil_pn:valueState="default"/>
<property xil_pn:name="Produce Advanced Verbose Report" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Produce Verbose Report" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Project Description" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Property Specification in Project File" xil_pn:value="Store all values" xil_pn:valueState="default"/>
<property xil_pn:name="RAM Extraction" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="RAM Style" xil_pn:value="Auto" xil_pn:valueState="default"/>
<property xil_pn:name="ROM Extraction" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="ROM Style" xil_pn:value="Auto" xil_pn:valueState="default"/>
<property xil_pn:name="Read Cores" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Regenerate Core" xil_pn:value="Under Current Project Setting" xil_pn:valueState="default"/>
<property xil_pn:name="Register Balancing" xil_pn:value="No" xil_pn:valueState="default"/>
<property xil_pn:name="Register Duplication" xil_pn:value="Off" xil_pn:valueState="default"/>
<property xil_pn:name="Register Duplication Xst" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Release Set/Reset (Output Events)" xil_pn:value="Default (6)" xil_pn:valueState="default"/>
<property xil_pn:name="Release Write Enable (Output Events)" xil_pn:value="Default (6)" xil_pn:valueState="default"/>
<property xil_pn:name="Rename Design Instance in Testbench File to" xil_pn:value="UUT" xil_pn:valueState="default"/>
<property xil_pn:name="Rename Top Level Architecture To" xil_pn:value="Structure" xil_pn:valueState="default"/>
<property xil_pn:name="Rename Top Level Entity to" xil_pn:value="ucecho" xil_pn:valueState="default"/>
<property xil_pn:name="Rename Top Level Module To" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Report Fastest Path(s) in Each Constraint" xil_pn:value="false" xil_pn:valueState="non-default"/>
<property xil_pn:name="Report Fastest Path(s) in Each Constraint Post Trace" xil_pn:value="false" xil_pn:valueState="non-default"/>
<property xil_pn:name="Report Paths by Endpoint" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Report Paths by Endpoint Post Trace" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Report Type" xil_pn:value="Error Report" xil_pn:valueState="non-default"/>
<property xil_pn:name="Report Type Post Trace" xil_pn:value="Error Report" xil_pn:valueState="non-default"/>
<property xil_pn:name="Report Unconstrained Paths" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Report Unconstrained Paths Post Trace" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Reset DCM if SHUTDOWN &amp; AGHIGH performed" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Reset On Configuration Pulse Width" xil_pn:value="100" xil_pn:valueState="default"/>
<property xil_pn:name="Resource Sharing" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Retain Hierarchy" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Router Effort Level (Overrides Overall Level)" xil_pn:value="None" xil_pn:valueState="default"/>
<property xil_pn:name="Run Design Rules Checker (DRC)" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Run for Specified Time" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Run for Specified Time Par" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Safe Implementation" xil_pn:value="No" xil_pn:valueState="default"/>
<property xil_pn:name="Security" xil_pn:value="Enable Readback and Reconfiguration" xil_pn:valueState="default"/>
<property xil_pn:name="Selected Simulation Root Source Node Behavioral" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Selected Simulation Root Source Node Post-Route" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Selected Simulation Source Node" xil_pn:value="UUT" xil_pn:valueState="default"/>
<property xil_pn:name="Setting Output File" xil_pn:value="Default" xil_pn:valueState="non-default"/>
<property xil_pn:name="Shift Register Extraction" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Show All Models" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Simulation Model Target" xil_pn:value="VHDL" xil_pn:valueState="default"/>
<property xil_pn:name="Simulation Run Time ISim" xil_pn:value="1000 ns" xil_pn:valueState="default"/>
<property xil_pn:name="Simulation Run Time Par" xil_pn:value="1000 ns" xil_pn:valueState="default"/>
<property xil_pn:name="Simulator" xil_pn:value="ISim (VHDL/Verilog)" xil_pn:valueState="default"/>
<property xil_pn:name="Slice Packing" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Slice Utilization Ratio" xil_pn:value="100" xil_pn:valueState="default"/>
<property xil_pn:name="Specify 'define Macro Name and Value" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Specify Top Level Instance Names Behavioral" xil_pn:value="Default" xil_pn:valueState="default"/>
<property xil_pn:name="Specify Top Level Instance Names Post-Route" xil_pn:value="Default" xil_pn:valueState="default"/>
<property xil_pn:name="Speed Grade" xil_pn:value="-4" xil_pn:valueState="non-default"/>
<property xil_pn:name="Starting Placer Cost Table (1-100) Map" xil_pn:value="1" xil_pn:valueState="default"/>
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<property xil_pn:name="Synthesis Tool" xil_pn:value="XST (VHDL/Verilog)" xil_pn:valueState="default"/>
<property xil_pn:name="Timing Mode Map" xil_pn:value="Non Timing Driven" xil_pn:valueState="default"/>
<property xil_pn:name="Timing Mode Par" xil_pn:value="Performance Evaluation" xil_pn:valueState="default"/>
<property xil_pn:name="Top-Level Module Name in Output Netlist" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Top-Level Source Type" xil_pn:value="HDL" xil_pn:valueState="default"/>
<property xil_pn:name="Tri-state Buffer Transformation Mode" xil_pn:value="Off" xil_pn:valueState="default"/>
<property xil_pn:name="Trim Unconnected Signals" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Tristate On Configuration Pulse Width" xil_pn:value="0" xil_pn:valueState="default"/>
<property xil_pn:name="Unused IOB Pins" xil_pn:value="Pull Down" xil_pn:valueState="default"/>
<property xil_pn:name="Use Bonded I/Os" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Use Clock Enable" xil_pn:value="Yes" xil_pn:valueState="default"/>
<property xil_pn:name="Use Custom Project File Behavioral" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Use Custom Project File Post-Route" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Use Custom Simulation Command File Behavioral" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Use Custom Simulation Command File Par" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Use Custom Waveform Configuration File Behav" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Use Custom Waveform Configuration File Par" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Use LOC Constraints" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Use RLOC Constraints" xil_pn:value="Yes" xil_pn:valueState="default"/>
<property xil_pn:name="Use Smart Guide" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Use Synchronous Reset" xil_pn:value="Yes" xil_pn:valueState="default"/>
<property xil_pn:name="Use Synchronous Set" xil_pn:value="Yes" xil_pn:valueState="default"/>
<property xil_pn:name="Use Synthesis Constraints File" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="User Browsed Strategy Files" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="UserID Code (8 Digit Hexadecimal)" xil_pn:value="0xFFFFFFFF" xil_pn:valueState="default"/>
<property xil_pn:name="Value Range Check" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Verilog 2001 Xst" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Verilog Macros" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Wait for DCI Match (Output Events) virtex2" xil_pn:value="Auto" xil_pn:valueState="default"/>
<property xil_pn:name="Wait for DLL Lock (Output Events)" xil_pn:value="Default (NoWait)" xil_pn:valueState="default"/>
<property xil_pn:name="Working Directory" xil_pn:value="." xil_pn:valueState="non-default"/>
<property xil_pn:name="Write Timing Constraints" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="XOR Collapsing" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="iMPACT Project File" xil_pn:value="" xil_pn:valueState="non-default"/>
<!-- -->
<!-- The following properties are for internal use only. These should not be modified.-->
<!-- -->
<property xil_pn:name="PROP_BehavioralSimTop" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="PROP_DesignName" xil_pn:value="ucecho" xil_pn:valueState="non-default"/>
<property xil_pn:name="PROP_DevFamilyPMName" xil_pn:value="spartan3" xil_pn:valueState="default"/>
<property xil_pn:name="PROP_PartitionCreateDelete" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="PROP_PartitionForcePlacement" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="PROP_PartitionForceSynth" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="PROP_PartitionForceTranslate" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="PROP_PostMapSimTop" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="PROP_PostParSimTop" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="PROP_PostSynthSimTop" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="PROP_PostXlateSimTop" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="PROP_intWorkingDirLocWRTProjDir" xil_pn:value="Same" xil_pn:valueState="non-default"/>
<property xil_pn:name="PROP_intWorkingDirUsed" xil_pn:value="No" xil_pn:valueState="non-default"/>
<property xil_pn:name="PROP_mapSmartGuideFileName" xil_pn:value="" xil_pn:valueState="non-default"/>
<property xil_pn:name="PROP_parSmartGuideFileName" xil_pn:value="" xil_pn:valueState="non-default"/>
</properties>
 
<bindings/>
 
<libraries/>
 
<partitions/>
 
</project>
/examples/usb-fpga-1.2/standalone/standalone.sh
0,0 → 1,6
if [ "$1" = "" ]; then
echo "Usage: $0 <bitstream>"
exit 1
fi
../../../java/FWLoader -c -uu standalone.ihx -ue standalone.ihx -um $1
 
examples/usb-fpga-1.2/standalone/standalone.sh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: examples/usb-fpga-1.2/standalone/standalone.c =================================================================== --- examples/usb-fpga-1.2/standalone/standalone.c (nonexistent) +++ examples/usb-fpga-1.2/standalone/standalone.c (revision 4) @@ -0,0 +1,41 @@ +/*! + standalone -- standalone firmware that supports FPGA configuration from FLASH and firmware loading from EEPROM for ZTEX USB FPGA Module 1.2 + Copyright (C) 2009-2010 ZTEX e.K. + http://www.ztex.de + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License version 3 as + published by the Free Software Foundation. + + This program is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, see http://www.gnu.org/licenses/. +!*/ + +#include[ztex-conf.h] // Loads the configuration macros, see ztex-conf.h for the available macros +#include[ztex-utils.h] // include basic functions and variables + +// select ZTEX USB FPGA Module 1.2 as target +IDENTITY_UFM_1_2(10.11.0.0,0); + +// this product string can also used for identification by the host software +#define[PRODUCT_STRING]["UFM 1.2 standalone firmware"] + +// enable Flash support +ENABLE_FLASH; +ENABLE_FLASH_BITSTREAM; + +#include[ztex.h] + +void main(void) +{ + init_USB(); // init everything + + while (1) { } // twiddle thumbs +} + + Index: examples/usb-fpga-1.2/standalone/Makefile =================================================================== --- examples/usb-fpga-1.2/standalone/Makefile (nonexistent) +++ examples/usb-fpga-1.2/standalone/Makefile (revision 4) @@ -0,0 +1,23 @@ +######################### +# configuration section # +######################### + +ZTEXPREFIX=../../.. + +JARTARGET= +CLASSTARGETS= +CLASSEXTRADEPS= + +IHXTARGETS=standalone.ihx +IHXEXTRADEPS= +EXTRAJARFILES= +EXTRADISTCLEANFILES= + +default: all + +################################ +# DO NOT CHANAGE THE FOLLOWING # +################################ + +include $(ZTEXPREFIX)/Makefile.mk + Index: examples/usb-fpga-1.2/standalone/Readme =================================================================== --- examples/usb-fpga-1.2/standalone/Readme (nonexistent) +++ examples/usb-fpga-1.2/standalone/Readme (revision 4) @@ -0,0 +1,16 @@ +standalone +---------- + +This firmware can be used for standalone applications where firmware is +loaded from EEPROM and bitstream is read from Flash memory. + +The FWLoader utility is used to upload +1. the firmware to the microcontroller (if no valid firmware is + running), +2. the firmware into EEPROM and +3. the FPGA bitstream into the Flash memory, + +e.g. by calling + +./FWLoader -c -uu standalone.ihx -ue standalone.ihx -um + Index: examples/usb-fpga-1.2/Makefile =================================================================== --- examples/usb-fpga-1.2/Makefile (revision 3) +++ examples/usb-fpga-1.2/Makefile (revision 4) @@ -1,4 +1,4 @@ -DIRS=ucecho +DIRS=ucecho flashdemo flashbench intraffic standalone .PHONY: default all clean distclean
/examples/usb-fpga-1.2/flashbench/flashbench.bat
0,0 → 1,2
java -cp FlashBench.jar FlashBench
pause
/examples/usb-fpga-1.2/flashbench/flashbench.sh
0,0 → 1,3
#make -C ../../ztex/java distclean all || exit
#make distclean all || exit
java -cp FlashBench.jar FlashBench $@
examples/usb-fpga-1.2/flashbench/flashbench.sh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: examples/usb-fpga-1.2/flashbench/FlashBench.java =================================================================== --- examples/usb-fpga-1.2/flashbench/FlashBench.java (nonexistent) +++ examples/usb-fpga-1.2/flashbench/FlashBench.java (revision 4) @@ -0,0 +1,222 @@ +/*! + flashbench -- Flash memory benchmark for ZTEX USB FPGA Module 1.2 + Copyright (C) 2009-2010 ZTEX e.K. + http://www.ztex.de + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License version 3 as + published by the Free Software Foundation. + + This program is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, see http://www.gnu.org/licenses/. +!*/ + +import java.io.*; +import java.util.*; + +import ch.ntb.usb.*; + +import ztex.*; + +// ***************************************************************************** +// ******* ParameterException ************************************************** +// ***************************************************************************** +// Exception the prints a help message +class ParameterException extends Exception { + public final static String helpMsg = new String ( + "Parameters:\n"+ + " -d Device Number (default: 0)\n" + + " -s Number of sectors to be tested, -1 means all (default: 10000)\n" + + " -f Force uploads\n" + + " -p Print bus info\n" + + " -w Enable certain workarounds which may be required for vmware + windows\n"+ + " -h This help" ); + + public ParameterException (String msg) { + super( msg + "\n" + helpMsg ); + } +} + +// ***************************************************************************** +// ******* Test0 *************************************************************** +// ***************************************************************************** +class FlashBench extends Ztex1v1 { + +// ******* FlashBench ********************************************************** +// constructor + public FlashBench ( ZtexDevice1 pDev ) throws UsbException { + super ( pDev ); + } + +// ******* testRW ************************************************************** +// measures read + write performance + public double testRW ( int num ) throws UsbException, InvalidFirmwareException, CapabilityException { + byte[] buf1 = new byte[flashSectorSize()]; + byte[] buf2 = new byte[flashSectorSize()]; + int errors = 0; + + long t0 = new Date().getTime(); + + for ( int i=0; i=args.length) throw new Exception(); + devNum = Integer.parseInt( args[i] ); + } + catch (Exception e) { + throw new ParameterException("Device number expected after -d"); + } + } + if ( args[i].equals("-s") ) { + i++; + try { + if (i>=args.length) throw new Exception(); + sectors = Integer.parseInt( args[i] ); + } + catch (Exception e) { + throw new ParameterException("Number of sectors expected after -s"); + } + } + else if ( args[i].equals("-f") ) { + force = true; + } + else if ( args[i].equals("-p") ) { + bus.printBus(System.out); + System.exit(0); + } + else if ( args[i].equals("-p") ) { + bus.printBus(System.out); + System.exit(0); + } + else if ( args[i].equals("-w") ) { + workarounds = true; + } + else if ( args[i].equals("-h") ) { + System.err.println(ParameterException.helpMsg); + System.exit(0); + } + else throw new ParameterException("Invalid Parameter: "+args[i]); + } + + +// create the main class + FlashBench ztex = new FlashBench ( bus.device(devNum) ); + ztex.certainWorkarounds = workarounds; + +// upload the firmware if necessary + if ( force || ! ztex.valid() || ! ztex.dev().productString().equals("flashbench for UFM 1.2") ) { + System.out.println("Firmware upload time: " + ztex.uploadFirmware( "flashbench.ihx", force ) + " ms"); + } + +// print some information + System.out.println("Capabilities: " + ztex.capabilityInfo(", ")); + System.out.println("Enabled: " + ztex.flashEnabled()); + System.out.println("Size: " + ztex.flashSize()+" Bytes"); +// ztex.printMmcState(); + + if ( sectors<1 || sectors>ztex.flashSectors() ) sectors = ztex.flashSectors(); + + System.out.println("Read + Write Performance: " + ztex.testRW(sectors) + "kb/s \n"); + int seed = (int) Math.round(65535*Math.random()); + System.out.println("Write Performance: " + ztex.testW(sectors, seed) + "kb/s "); + System.out.println("Read Performance: " + ztex.testR(sectors, seed) + "kb/s \n"); + } + catch (Exception e) { + System.out.println("Error: "+e.getLocalizedMessage() ); + } + } + +} Index: examples/usb-fpga-1.2/flashbench/Makefile =================================================================== --- examples/usb-fpga-1.2/flashbench/Makefile (nonexistent) +++ examples/usb-fpga-1.2/flashbench/Makefile (revision 4) @@ -0,0 +1,21 @@ +######################### +# configuration section # +######################### + +ZTEXPREFIX=../../.. + +JARTARGET=FlashBench.jar +CLASSTARGETS=FlashBench.class +CLASSEXTRADEPS= +#CLASSEXTRADEPS:=$(shell echo $(ZTEXPREFIX)/java/ztex/*.java) + +IHXTARGETS=flashbench.ihx +IHXEXTRADEPS= +#IHXEXTRADEPS:=$(shell echo $(ZTEXPREFIX)/include/*.h) +EXTRAJARFILES=flashbench.ihx + +################################ +# DO NOT CHANAGE THE FOLLOWING # +################################ + +include $(ZTEXPREFIX)/Makefile.mk Index: examples/usb-fpga-1.2/flashbench/Readme =================================================================== --- examples/usb-fpga-1.2/flashbench/Readme (nonexistent) +++ examples/usb-fpga-1.2/flashbench/Readme (revision 4) @@ -0,0 +1,18 @@ +flashbench +---------- + +A write / read benchmark for Flash memory on ZTEX modules. + +ATTENTION: The tests will destroy the data stored in Flash memory. + +The number of sectors to be tested can be specified using the +-s parameter of the host software. + +Three tests are performed: +1. Read/write test: Pseudo-random test data is written and immediately + read and compared (i.e. write sector 0, read sector 0, write sector + 1, read sector 1, ...) +2. Write test: Pseudo-random test data is written (i.e. write sector 0, + write sector 1, ...) +3. Write test: Pseudo-random test data is read and compared (i.e. read + sector 0, read sector 1, ...) Index: examples/usb-fpga-1.2/flashbench/flashbench.c =================================================================== --- examples/usb-fpga-1.2/flashbench/flashbench.c (nonexistent) +++ examples/usb-fpga-1.2/flashbench/flashbench.c (revision 4) @@ -0,0 +1,40 @@ +/*! + flashbench -- Flash memory benchmark for ZTEX USB FPGA Module 1.2 + Copyright (C) 2009-2010 ZTEX e.K. + http://www.ztex.de + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License version 3 as + published by the Free Software Foundation. + + This program is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, see http://www.gnu.org/licenses/. +!*/ + +#include[ztex-conf.h] // Loads the configuration macros, see ztex-conf.h for the available macros +#include[ztex-utils.h] // include basic functions and variables + +// select ZTEX USB FPGA Module 1.2 as target (required for FPGA configuration) +IDENTITY_UFM_1_2(10.11.0.0,0); + +// this product string is also used for identification by the host software +#define[PRODUCT_STRING]["flashbench for UFM 1.2"] + +// enable Flash support +ENABLE_FLASH; + +// include the main part of the firmware kit, define the descriptors, ... +#include[ztex.h] + +void main(void) +{ + init_USB(); // init everything ... + + while (1) { } // ... and twiddle thumbs +} + Index: examples/usb-fpga-1.11/flashdemo/FlashDemo.java =================================================================== --- examples/usb-fpga-1.11/flashdemo/FlashDemo.java (nonexistent) +++ examples/usb-fpga-1.11/flashdemo/FlashDemo.java (revision 4) @@ -0,0 +1,146 @@ +/*! + flashdemo -- demo for Flash memory access from firmware and host software for ZTEX USB FPGA Module 1.11 + Copyright (C) 2009-2010 ZTEX e.K. + http://www.ztex.de + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License version 3 as + published by the Free Software Foundation. + + This program is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, see http://www.gnu.org/licenses/. +!*/ + +import java.io.*; +import java.util.*; + +import ch.ntb.usb.*; + +import ztex.*; + +// ***************************************************************************** +// ******* ParameterException ************************************************** +// ***************************************************************************** +// Exception the prints a help message +class ParameterException extends Exception { + public final static String helpMsg = new String ( + "Parameters:\n"+ + " -d Device Number (default: 0)\n" + + " -f Force uploads\n" + + " -p Print bus info\n" + + " -ue Upload Firmware to EEPROM\n" + + " -re Reset EEPROM Firmware\n" + + " -w Enable certain workarounds\n" + + " -h This help" ); + + public ParameterException (String msg) { + super( msg + "\n" + helpMsg ); + } +} + +// ***************************************************************************** +// ******* Test0 *************************************************************** +// ***************************************************************************** +class FlashDemo extends Ztex1v1 { + +// ******* FlashDemo *********************************************************** +// constructor + public FlashDemo ( ZtexDevice1 pDev ) throws UsbException { + super ( pDev ); + } + +// ******* main **************************************************************** + public static void main (String args[]) { + + int devNum = 0; + boolean force = false; + boolean workarounds = false; + + try { +// init USB stuff + LibusbJava.usb_init(); + +// scan the USB bus + ZtexScanBus1 bus = new ZtexScanBus1( ZtexDevice1.ztexVendorId, ZtexDevice1.ztexProductId, true, false, 1); + if ( bus.numberOfDevices() <= 0) { + System.err.println("No devices found"); + System.exit(0); + } + +// scan the command line arguments + for (int i=0; i=args.length) throw new Exception(); + devNum = Integer.parseInt( args[i] ); + } + catch (Exception e) { + throw new ParameterException("Device number expected after -d"); + } + } + else if ( args[i].equals("-f") ) { + force = true; + } + else if ( args[i].equals("-p") ) { + bus.printBus(System.out); + System.exit(0); + } + else if ( args[i].equals("-w") ) { + workarounds = true; + } + else if ( args[i].equals("-h") ) { + System.err.println(ParameterException.helpMsg); + System.exit(0); + } + else if ( !args[i].equals("-re") && !args[i].equals("-ue") ) + throw new ParameterException("Invalid Parameter: "+args[i]); + } + + +// create the main class + FlashDemo ztex = new FlashDemo ( bus.device(devNum) ); + ztex.certainWorkarounds = workarounds; + +// upload the firmware if necessary + if ( force || ! ztex.valid() || ! ztex.dev().productString().equals("Flash demo for UFM 1.11") ) { + System.out.println("Firmware upload time: " + ztex.uploadFirmware( "flashdemo.ihx", force ) + " ms"); + } + + for (int i=0; i flash_sectors || sector == 0 ) { + sector = 1; + } + + flash_write_init( 0 ); // prepare writing sector 0 + flash_write((xdata BYTE*) §or, 4); // write the current sector number + flash_write_finish(flash_sector_size - 4); // dummy-write the rest of the sector + finish write operation + + flash_write_init( sector ); // prepare writing sector sector + flash_write((xdata BYTE*) flash_string, sizeof(flash_string)); // write the string + flash_write_finish(flash_sector_size - sizeof(flash_string)); // dummy-write the rest of the sector + finish write operation + } + + while (1) { } // twiddle thumbs +} + Index: examples/usb-fpga-1.11/flashdemo/flashdemo.bat =================================================================== --- examples/usb-fpga-1.11/flashdemo/flashdemo.bat (nonexistent) +++ examples/usb-fpga-1.11/flashdemo/flashdemo.bat (revision 4) @@ -0,0 +1,2 @@ +java -cp FlashDemo.jar FlashDemo +pause Index: examples/usb-fpga-1.11/flashdemo/flashdemo.sh =================================================================== --- examples/usb-fpga-1.11/flashdemo/flashdemo.sh (nonexistent) +++ examples/usb-fpga-1.11/flashdemo/flashdemo.sh (revision 4) @@ -0,0 +1,3 @@ +#make -C ../../../java distclean all || exit +#make distclean all || exit +java -cp FlashDemo.jar FlashDemo $@
examples/usb-fpga-1.11/flashdemo/flashdemo.sh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: examples/usb-fpga-1.11/flashdemo/Readme =================================================================== --- examples/usb-fpga-1.11/flashdemo/Readme (nonexistent) +++ examples/usb-fpga-1.11/flashdemo/Readme (revision 4) @@ -0,0 +1,16 @@ +flashdemo +--------- + +This example demonstrates how data can be read and written to/from the +Flash memory. + +During the start-up the firmware (defined in flashdemo.c) reads the +number of last sector n from sector 0 (dword at position 0) and +increments it by one. If n is larger than or equal to the total amount +of sectors, or if it is equal to 0, n is set to 1. + +Then n is written back to sector 0 and sector n is filled with the +string "Hello World!". + +The host software (defined in FlashDemo.java) reads out the string from +the last sector of the flash memory. Index: examples/usb-fpga-1.11/flashdemo/Makefile =================================================================== --- examples/usb-fpga-1.11/flashdemo/Makefile (nonexistent) +++ examples/usb-fpga-1.11/flashdemo/Makefile (revision 4) @@ -0,0 +1,23 @@ +######################### +# configuration section # +######################### + +ZTEXPREFIX=../../.. + +JARTARGET=FlashDemo.jar +CLASSTARGETS=FlashDemo.class +CLASSEXTRADEPS= + +IHXTARGETS=flashdemo.ihx +IHXEXTRADEPS= +EXTRAJARFILES=flashdemo.ihx +EXTRADISTCLEANFILES= + +default: all + +################################ +# DO NOT CHANAGE THE FOLLOWING # +################################ + +include $(ZTEXPREFIX)/Makefile.mk + Index: examples/usb-fpga-1.11/intraffic/InTraffic.java =================================================================== --- examples/usb-fpga-1.11/intraffic/InTraffic.java (nonexistent) +++ examples/usb-fpga-1.11/intraffic/InTraffic.java (revision 4) @@ -0,0 +1,316 @@ +/*! + intraffic -- example showing how the EZ-USB FIFO interface is used on ZTEX USB FPGA Module 1.11 + Copyright (C) 2009-2010 ZTEX e.K. + http://www.ztex.de + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License version 3 as + published by the Free Software Foundation. + + This program is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, see http://www.gnu.org/licenses/. +!*/ + +import java.io.*; +import java.util.*; + +import ch.ntb.usb.*; + +import ztex.*; + +// ***************************************************************************** +// ******* ParameterException ************************************************** +// ***************************************************************************** +// Exception the prints a help message +class ParameterException extends Exception { + public final static String helpMsg = new String ( + "Parameters:\n"+ + " -d Device Number (default: 0)\n" + + " -f Force uploads\n" + + " -p Print bus info\n" + + " -w Enable certain workarounds\n"+ + " -h This help" ); + + public ParameterException (String msg) { + super( msg + "\n" + helpMsg ); + } +} + +// ***************************************************************************** +// ******* USBReader *********************************************************** +// ***************************************************************************** +class UsbReader extends Thread { + private final int bufNum = 8; + public final int bufSize = 512*1024; + public byte[][] buf = new byte[bufNum][]; + public int[] bufBytes = new int[bufNum]; + private int readCount = -1; + private int getCount = -1; + public boolean terminate = false; + private Ztex1v1 ztex; + + public UsbReader ( Ztex1v1 p_ztex ) { + super (); + ztex = p_ztex; + for (int i=0; i= readCount) { + try { + sleep(1); + } + catch ( InterruptedException e) { + } + } + return getCount % bufNum; + } + + public void reset () { + getCount = readCount + 1; + } + + public void run() { + setPriority(MAX_PRIORITY); + +// claim interface 0 + try { + ztex.trySetConfiguration ( 1 ); + ztex.claimInterface ( 0 ); + } + catch ( Exception e) { + System.out.println("Error: "+e.getLocalizedMessage() ); + System.exit(2); + } + + +// reader loop + while ( !terminate ) { + readCount += 1; + + while ( readCount - bufNum >= getCount ) { + try { + sleep(1); + } + catch ( InterruptedException e) { + } + } + + int i = readCount % bufNum; + bufBytes[i] = LibusbJava.usb_bulk_read(ztex.handle(), 0x82, buf[i], bufSize, 1000); +// System.out.println("Buffer " + i +": read " + bufBytes[i] + " bytes"); + } + +// release interface 0 + ztex.releaseInterface( 0 ); + + } +} + + +// ***************************************************************************** +// ******* Test0 *************************************************************** +// ***************************************************************************** +class InTraffic extends Ztex1v1 { + +// ******* InTraffic ************************************************************** +// constructor + public InTraffic ( ZtexDevice1 pDev ) throws UsbException { + super ( pDev ); + } + +// ******* main **************************************************************** + public static void main (String args[]) { + + int devNum = 0; + boolean force = false; + boolean workarounds = false; + + try { +// init USB stuff + LibusbJava.usb_init(); + +// scan the USB bus + ZtexScanBus1 bus = new ZtexScanBus1( ZtexDevice1.ztexVendorId, ZtexDevice1.ztexProductId, true, false, 1); + if ( bus.numberOfDevices() <= 0) { + System.err.println("No devices found"); + System.exit(0); + } + +// scan the command line arguments + for (int i=0; i=args.length) throw new Exception(); + devNum = Integer.parseInt( args[i] ); + } + catch (Exception e) { + throw new ParameterException("Device number expected after -d"); + } + } + else if ( args[i].equals("-f") ) { + force = true; + } + else if ( args[i].equals("-p") ) { + bus.printBus(System.out); + System.exit(0); + } + else if ( args[i].equals("-p") ) { + bus.printBus(System.out); + System.exit(0); + } + else if ( args[i].equals("-w") ) { + workarounds = true; + } + else if ( args[i].equals("-h") ) { + System.err.println(ParameterException.helpMsg); + System.exit(0); + } + else throw new ParameterException("Invalid Parameter: "+args[i]); + } + + +// create the main class + InTraffic ztex = new InTraffic ( bus.device(devNum) ); + ztex.certainWorkarounds = workarounds; + +// upload the firmware if necessary + if ( force || ! ztex.valid() || ! ztex.dev().productString().equals("intraffic example for UFM 1.11") ) { + System.out.println("Firmware upload time: " + ztex.uploadFirmware( "intraffic.ihx", force ) + " ms"); + } + +// upload the bitstream if necessary + if ( force || ! ztex.getFpgaConfiguration() ) { + System.out.println("FPGA configuration time: " + ztex.configureFpga( "fpga/intraffic.bin" , force ) + " ms"); + } + +// read the traffic + UsbReader reader = new UsbReader( ztex ); + reader.start(); + +// EZ-USB FIFO test (controlled mode) + ztex.vendorCommand (0x60, "Set test mode", 0, 0); + reader.reset(); + + int vcurrent = -1; + for (int i=0; i<1000; i++) { + int j = reader.getBuffer(); + int bb = reader.bufBytes[j]; + byte[] b = reader.buf[j]; + int current = vcurrent+1; + int lastwi = -1; + int aerrors = 0; + int ferrors = 0; + int errors = 0; + int prevErrors = 0; + + for (int k=1; k 0 ) System.out.println(" 0b" + Integer.toBinaryString(current) ); + if ( prevErrors == 1 ) + ferrors +=1; + prevErrors = 0; + } + + lastwi = 1; +// System.out.println(current); + } +// System.out.println(b[k]+" " +b[k+1]); + } + System.out.print("Buffer " + i + ": " + (errors-ferrors) + " errors, " + ferrors + " FIFO errors, " + aerrors + " alignment errors \r"); + } + System.out.println(); + +// performance test (continous mode) + ztex.vendorCommand (0x60, "Set test mode", 1, 0); + reader.reset(); + + int words = 0; + int intSum = 0; + int intMax = 0; + int intAdj = 0; + int lastwi = -1; + for (int i=0; i<1000; i++) { + int j = reader.getBuffer(); + int bb = reader.bufBytes[j]; + byte[] b = reader.buf[j]; + int current = vcurrent+1; + + for (int k=1; k 0 && words > 0) { + intSum += it; + if ( it > intMax ) + intMax = it; + } + words += 2; + vcurrent = current; + intAdj = 0; + } + lastwi = 1; +// System.out.println(current); + } +// System.out.println(b[k]+" " +b[k+1]); + } + System.out.print("Buffer " + i + ": " + Math.round(words*6000.0/(words+intSum))/100.0 + "MB/s, max. interrupt: " + Math.round(intMax/150.0)/100 + "ms \r"); + } + System.out.println(); + + + reader.terminate=true; + + } + catch (Exception e) { + System.out.println("Error: "+e.getLocalizedMessage() ); + } + } + +} Index: examples/usb-fpga-1.11/intraffic/intraffic.c =================================================================== --- examples/usb-fpga-1.11/intraffic/intraffic.c (nonexistent) +++ examples/usb-fpga-1.11/intraffic/intraffic.c (revision 4) @@ -0,0 +1,101 @@ +/*! + intraffic -- example showing how the EZ-USB FIFO interface is used on ZTEX USB FPGA Module 1.11 + Copyright (C) 2009-2010 ZTEX e.K. + http://www.ztex.de + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License version 3 as + published by the Free Software Foundation. + + This program is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, see http://www.gnu.org/licenses/. +!*/ + +#include[ztex-conf.h] // Loads the configuration macros, see ztex-conf.h for the available macros +#include[ztex-utils.h] // include basic functions + +// 1024 (instead of 512) byte bulk transfers. +// According to USB standard they are invalid but usually supported and 25% faster. +//#define[fastmode] + +#ifdef[fastmode] +// configure endpoint 2, in, quad buffered, 1024 bytes, interface 0 +EP_CONFIG(2,0,BULK,IN,1024,4); +#else +// configure endpoint 2, in, quad buffered, 512 bytes, interface 0 +EP_CONFIG(2,0,BULK,IN,512,4); +#endif + +// select ZTEX USB FPGA Module 1.11 as target (required for FPGA configuration) +IDENTITY_UFM_1_11(10.12.0.0,0); + +// this product string is also used for identification by the host software +#define[PRODUCT_STRING]["intraffic example for UFM 1.11"] + +// this is called automatically after FPGA configuration +#define[POST_FPGA_CONFIG][POST_FPGA_CONFIG + IOA0 = 1; // reset on + IOA3 = 0; // controlled mode + OEA |= bmBIT0 | bmBIT3; + + EP2CS &= ~bmBIT0; // clear stall bit + + REVCTL = 0x3; + SYNCDELAY; + + IFCONFIG = bmBIT7 | bmBIT5 | 3; // internel 30MHz clock, drive IFCLK ouput, slave FIFO interface + SYNCDELAY; + EP2FIFOCFG = bmBIT3 | bmBIT0; // AOTUOIN, WORDWIDE + SYNCDELAY; + +#ifdef[fastmode] + EP2AUTOINLENH = 4; // 1024 bytes +#else + EP2AUTOINLENH = 2; // 512 bytes +#endif + SYNCDELAY; + EP2AUTOINLENL = 0; + SYNCDELAY; + + FIFORESET = 0x80; // reset FIFO + SYNCDELAY; + FIFORESET = 2; + SYNCDELAY; + FIFORESET = 0x00; + SYNCDELAY; + + FIFOPINPOLAR = 0; + SYNCDELAY; + PINFLAGSAB = 0; + SYNCDELAY; + PINFLAGSCD = 0; + SYNCDELAY; + + IOA0 = 0; // reset off +] + +// set mode +ADD_EP0_VENDOR_COMMAND((0x60,, + IOA0 = 1; // reset on + IOA3 = SETUPDAT[2] ? 1 : 0; + IOA0 = 0; // reset off +,, + NOP; +));; + +// include the main part of the firmware kit, define the descriptors, ... +#include[ztex.h] + +void main(void) +{ + init_USB(); + + while (1) { + } +} + Index: examples/usb-fpga-1.11/intraffic/fpga/promgen.sh =================================================================== --- examples/usb-fpga-1.11/intraffic/fpga/promgen.sh (nonexistent) +++ examples/usb-fpga-1.11/intraffic/fpga/promgen.sh (revision 4) @@ -0,0 +1,14 @@ +#!/bin/bash + +# On my computer I use a sript named xilinx to preload the environment +# variables. The command "xilinx ise" starts the ISE for example. +# Therefore we check for the xilinx script first. +if `which xilinx > /dev/null`; then + xilinx="xilinx" +else + xilinx="" +fi + +for i in *.bit; do + $xilinx promgen -w -p bin -u 0 $i +done
examples/usb-fpga-1.11/intraffic/fpga/promgen.sh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: examples/usb-fpga-1.11/intraffic/fpga/intraffic.ucf =================================================================== --- examples/usb-fpga-1.11/intraffic/fpga/intraffic.ucf (nonexistent) +++ examples/usb-fpga-1.11/intraffic/fpga/intraffic.ucf (revision 4) @@ -0,0 +1,50 @@ +# NET "CLK" TNM_NET = "CLK"; +# TIMESPEC "TS_CLK" = PERIOD "CLK" 20 ns HIGH 50 %; +# NET "CLK" LOC = "K14" | IOSTANDARD = LVCMOS33 ; + +NET "IFCLK" TNM_NET = "IFCLK"; +TIMESPEC "TS_IFCLK" = PERIOD "IFCLK" 20 ns HIGH 50 %; +NET "IFCLK" LOC = "J14" | IOSTANDARD = LVCMOS33 ; + +# TIMESPEC "TS_CLK_IFCLK" = FROM "CLK" TO "IFCLK" 3ns DATAPATHONLY; +# TIMESPEC "TS_IFCLK_CLK" = FROM "IFCLK" TO "CLK" 3ns DATAPATHONLY; + +NET "RESET" LOC = "R3" | IOSTANDARD = LVCMOS33 ; # PA0 +NET "SLOE" LOC = "T3" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # PA2 +NET "CONT" LOC = "R11" | IOSTANDARD = LVCMOS33 ; # PA3 +NET "FIFOADR0" LOC = "T10" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # PA4 +NET "FIFOADR1" LOC = "H14" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # PA5 +NET "PKTEND" LOC = "H13" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # PA6 +# NET "PA7" LOC = "H11" | IOSTANDARD = LVCMOS33 ; + +NET "FD<0>" LOC = "C16" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "FD<1>" LOC = "C15" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "FD<2>" LOC = "D16" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "FD<3>" LOC = "D14" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "FD<4>" LOC = "E13" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "FD<5>" LOC = "E12" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "FD<6>" LOC = "F16" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "FD<7>" LOC = "F15" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "FD<8>" LOC = "P10" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "FD<9>" LOC = "N12" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "FD<10>" LOC = "P12" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "FD<11>" LOC = "N5" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "FD<12>" LOC = "P5" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "FD<13>" LOC = "L8" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "FD<14>" LOC = "L7" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "FD<15>" LOC = "R5" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; + +# NET "PC<0>" LOC = "G12" | IOSTANDARD = LVCMOS33 ; +# NET "PC<1>" LOC = "G11" | IOSTANDARD = LVCMOS33 ; +# NET "PC<2>" LOC = "H15" | IOSTANDARD = LVCMOS33 ; +# NET "PC<3>" LOC = "M14" | IOSTANDARD = LVCMOS33 ; +# NET "pc<4>" LOC = "P11" | IOSTANDARD = LVCMOS33 ; +# NET "pc<5>" LOC = "H14" | IOSTANDARD = LVCMOS33 ; +# NET "pc<6>" LOC = "H11" | IOSTANDARD = LVCMOS33 ; +# NET "pc<7>" LOC = "H13" | IOSTANDARD = LVCMOS33 ; + +NET "FLAGB" LOC = "G16" | IOSTANDARD = LVCMOS33 ; + +NET "SLRD" LOC = "K11" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "SLWR" LOC = "J11" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; + Index: examples/usb-fpga-1.11/intraffic/fpga/intraffic.ise =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream Index: examples/usb-fpga-1.11/intraffic/fpga/intraffic.ise =================================================================== --- examples/usb-fpga-1.11/intraffic/fpga/intraffic.ise (nonexistent) +++ examples/usb-fpga-1.11/intraffic/fpga/intraffic.ise (revision 4)
examples/usb-fpga-1.11/intraffic/fpga/intraffic.ise Property changes : Added: svn:mime-type ## -0,0 +1 ## +application/octet-stream \ No newline at end of property Index: examples/usb-fpga-1.11/intraffic/fpga/intraffic.vhd =================================================================== --- examples/usb-fpga-1.11/intraffic/fpga/intraffic.vhd (nonexistent) +++ examples/usb-fpga-1.11/intraffic/fpga/intraffic.vhd (revision 4) @@ -0,0 +1,91 @@ +library ieee; +use IEEE.std_logic_1164.all; +use IEEE.std_logic_arith.all; +use IEEE.std_logic_unsigned.all; + + +entity intraffic is + port( + RESET : in std_logic; + CONT : in std_logic; + IFCLK : in std_logic; + + FD : out std_logic_vector(15 downto 0); + + SLOE : out std_logic; + SLRD : out std_logic; + SLWR : out std_logic; + FIFOADR0 : out std_logic; + FIFOADR1 : out std_logic; + PKTEND : out std_logic; + + FLAGB : in std_logic + ); +end intraffic; + +architecture RTL of intraffic is + +---------------------------- +-- test pattern generator -- +---------------------------- +-- 30 bit counter +signal GEN_CNT : std_logic_vector(29 downto 0); +signal INT_CNT : std_logic_vector(6 downto 0); + +signal FIFO_WORD : std_logic; + +begin + + SLOE <= '1'; + SLRD <= '1'; + FIFOADR0 <= '0'; + FIFOADR1 <= '0'; + PKTEND <= '1'; -- no data alignment + + dpIFCLK: process (IFCLK, RESET) + begin +-- reset + if RESET = '1' + then + GEN_CNT <= ( others => '0' ); + INT_CNT <= ( others => '0' ); + FIFO_WORD <= '0'; + SLWR <= '1'; +-- IFCLK + elsif IFCLK'event and IFCLK = '1' + then + + if CONT = '1' or FLAGB = '1' + then + if FIFO_WORD = '0' + then + FD(14 downto 0) <= GEN_CNT(14 downto 0); + else + FD(14 downto 0) <= GEN_CNT(29 downto 15); + end if; + FD(15) <= FIFO_WORD; + + if FIFO_WORD = '1' + then + GEN_CNT <= GEN_CNT + '1'; + if INT_CNT = conv_std_logic_vector(99,7) + then + INT_CNT <= ( others => '0' ); + else + INT_CNT <= INT_CNT + '1'; + end if; + end if; + FIFO_WORD <= not FIFO_WORD; + end if; + + if ( INT_CNT >= conv_std_logic_vector(90,7) ) and ( CONT = '0' ) + then + SLWR <= '1'; + else + SLWR <= '0'; + end if; + + end if; + end process dpIFCLK; + +end RTL; Index: examples/usb-fpga-1.11/intraffic/fpga/clean.sh =================================================================== --- examples/usb-fpga-1.11/intraffic/fpga/clean.sh (nonexistent) +++ examples/usb-fpga-1.11/intraffic/fpga/clean.sh (revision 4) @@ -0,0 +1,79 @@ +#!/bin/bash + +# This files / directories from this directory will not be removed +# Filenames with spaces or other spuid characters will be ignored +sourcefiles="*.vhd *.ucf *.sh *.ise *.bit *.bin *.xise" +subdirs="ipcore_dir" + +# This sould not be edited. +list_files() { + if [ "$2" != "" ]; then + echo "$1" + for i in $2; do + echo " $i" + done + fi +} + +rmfiles="" +rmdirs="" +keepfiles="" +keepdirs="" +allfiles=`ls -A` +for f in $allfiles; do + keep=false + for i in $sourcefiles; do + if [ "$i" == "$f" ]; then + keep=true + fi + done + for i in $subdirs; do + if [ "$i" == "$f" ]; then + keep=true + fi + done + if [ -d "$f" ]; then + if $keep; then + keepdirs+=" $f" + else + rmdirs+=" $f" + fi + fi + if [ -f "$f" ]; then + if $keep; then + keepfiles+=" $f" + else + rmfiles+=" $f" + fi + fi +done + +echo +echo "Directory $PWD:" +list_files "This directories will NOT be removed:" "$keepdirs" +list_files "This files will NOT be removed:" "$keepfiles" +list_files "This directories will be removed:" "$rmdirs" +list_files "This files will be removed:" "$rmfiles" + +if [ "$rmfiles" == "" -a "$rmdirs" == "" ]; then + c="yes" +else + echo -n 'Confirm this by entering "yes": ' + read c +fi + +if [ "$c" == "yes" ]; then + [ "$rmfiles" != "" ] && rm $rmfiles + [ "$rmdirs" != "" ] && rm -r $rmdirs + + for d in $subdirs; do + if [ -x "$d/clean.sh" ]; then + cd $d + ./clean.sh || exit 1 + cd .. + fi + done + + exit 0 +fi +exit 1
examples/usb-fpga-1.11/intraffic/fpga/clean.sh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: examples/usb-fpga-1.11/intraffic/fpga/intraffic.xise =================================================================== --- examples/usb-fpga-1.11/intraffic/fpga/intraffic.xise (nonexistent) +++ examples/usb-fpga-1.11/intraffic/fpga/intraffic.xise (revision 4) @@ -0,0 +1,442 @@ + + + +
+ + + + + + + + +
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Index: examples/usb-fpga-1.11/intraffic/Readme =================================================================== --- examples/usb-fpga-1.11/intraffic/Readme (nonexistent) +++ examples/usb-fpga-1.11/intraffic/Readme (revision 4) @@ -0,0 +1,18 @@ +intraffic +--------- + +This example shows how the EZ-USB input FIFO interface is used. + +A traffic generator sends test data to the EZ-USB. The hosts PC reads +out this data and verifies it. + +The traffic generator is implemented in the FPGA and supports two modes: + +1. (IOA3=0) This mode supports data flow control using FIFO full flag + (FLAGB) and SLWR control pin. Use this mode as starting point for + data acquisition applications. + +2. (IOA=3) In this mode and uninterrupted test pattern is generated, + i.e. flow control is disabled. This mode is used for performance + measurements (speed rate and interrupt measurements) + Index: examples/usb-fpga-1.11/intraffic/Makefile =================================================================== --- examples/usb-fpga-1.11/intraffic/Makefile (nonexistent) +++ examples/usb-fpga-1.11/intraffic/Makefile (revision 4) @@ -0,0 +1,27 @@ +######################### +# configuration section # +######################### + +# Defines the location of the EZ-USB SDK +ZTEXPREFIX=../../.. + +# The name of the jar archive +JARTARGET=InTraffic.jar +# Java Classes that have to be build +CLASSTARGETS=InTraffic.class +# Extra dependencies for Java Classes +CLASSEXTRADEPS= + +# ihx files (firmware ROM files) that have to be build +IHXTARGETS=intraffic.ihx +# Extra Dependencies for ihx files +IHXEXTRADEPS= + +# Extra files that should be included into th jar archive +EXTRAJARFILES=intraffic.ihx fpga/intraffic.bin + +################################ +# DO NOT CHANAGE THE FOLLOWING # +################################ +# includes the main Makefile +include $(ZTEXPREFIX)/Makefile.mk Index: examples/usb-fpga-1.11/intraffic/intraffic.sh =================================================================== --- examples/usb-fpga-1.11/intraffic/intraffic.sh (nonexistent) +++ examples/usb-fpga-1.11/intraffic/intraffic.sh (revision 4) @@ -0,0 +1,4 @@ +#make -C ../../../java distclean all || exit +#make distclean all || exit +#make || exit +java -cp InTraffic.jar InTraffic $@
examples/usb-fpga-1.11/intraffic/intraffic.sh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: examples/usb-fpga-1.11/ucecho/ucecho.sh =================================================================== --- examples/usb-fpga-1.11/ucecho/ucecho.sh (nonexistent) +++ examples/usb-fpga-1.11/ucecho/ucecho.sh (revision 4) @@ -0,0 +1,4 @@ +#make -C ../../../java distclean all || exit +#make distclean all || exit +#make || exit +java -cp UCEcho.jar UCEcho $@
examples/usb-fpga-1.11/ucecho/ucecho.sh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: examples/usb-fpga-1.11/ucecho/UCEcho.java =================================================================== --- examples/usb-fpga-1.11/ucecho/UCEcho.java (nonexistent) +++ examples/usb-fpga-1.11/ucecho/UCEcho.java (revision 4) @@ -0,0 +1,168 @@ +/*! + ucecho -- uppercase conversion example for ZTEX USB FPGA Module 1.11 + Copyright (C) 2009-2010 ZTEX e.K. + http://www.ztex.de + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License version 3 as + published by the Free Software Foundation. + + This program is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, see http://www.gnu.org/licenses/. +!*/ + +import java.io.*; +import java.util.*; + +import ch.ntb.usb.*; + +import ztex.*; + +// ***************************************************************************** +// ******* ParameterException ************************************************** +// ***************************************************************************** +// Exception the prints a help message +class ParameterException extends Exception { + public final static String helpMsg = new String ( + "Parameters:\n"+ + " -d Device Number (default: 0)\n" + + " -f Force uploads\n" + + " -p Print bus info\n" + + " -w Enable certain workarounds\n"+ + " -h This help" ); + + public ParameterException (String msg) { + super( msg + "\n" + helpMsg ); + } +} + +// ***************************************************************************** +// ******* Test0 *************************************************************** +// ***************************************************************************** +class UCEcho extends Ztex1v1 { + +// ******* UCEcho ************************************************************** +// constructor + public UCEcho ( ZtexDevice1 pDev ) throws UsbException { + super ( pDev ); + } + +// ******* echo **************************************************************** +// writes a string to Endpoint 4, reads it back from Endpoint 2 and writes the output to System.out + public void echo ( String input ) throws UsbException { + byte buf[] = input.getBytes(); + int i = LibusbJava.usb_bulk_write(handle(), 0x04, buf, buf.length, 1000); + if ( i<0 ) + throw new UsbException("Error sending data: " + LibusbJava.usb_strerror()); + System.out.println("Send "+i+" bytes: `"+input+"'" ); + + try { + Thread.sleep( 10 ); + } + catch ( InterruptedException e ) { + } + + buf = new byte[1024]; + i = LibusbJava.usb_bulk_read(handle(), 0x82, buf, 1024, 1000); + if ( i<0 ) + throw new UsbException("Error receiving data: " + LibusbJava.usb_strerror()); + System.out.println("Read "+i+" bytes: `"+new String(buf,0,i)+"'" ); + } + +// ******* main **************************************************************** + public static void main (String args[]) { + + int devNum = 0; + boolean force = false; + boolean workarounds = false; + + try { +// init USB stuff + LibusbJava.usb_init(); + +// scan the USB bus + ZtexScanBus1 bus = new ZtexScanBus1( ZtexDevice1.ztexVendorId, ZtexDevice1.ztexProductId, true, false, 1); + if ( bus.numberOfDevices() <= 0) { + System.err.println("No devices found"); + System.exit(0); + } + +// scan the command line arguments + for (int i=0; i=args.length) throw new Exception(); + devNum = Integer.parseInt( args[i] ); + } + catch (Exception e) { + throw new ParameterException("Device number expected after -d"); + } + } + else if ( args[i].equals("-f") ) { + force = true; + } + else if ( args[i].equals("-p") ) { + bus.printBus(System.out); + System.exit(0); + } + else if ( args[i].equals("-p") ) { + bus.printBus(System.out); + System.exit(0); + } + else if ( args[i].equals("-w") ) { + workarounds = true; + } + else if ( args[i].equals("-h") ) { + System.err.println(ParameterException.helpMsg); + System.exit(0); + } + else throw new ParameterException("Invalid Parameter: "+args[i]); + } + + +// create the main class + UCEcho ztex = new UCEcho ( bus.device(devNum) ); + ztex.certainWorkarounds = workarounds; + +// upload the firmware if necessary + if ( force || ! ztex.valid() || ! ztex.dev().productString().equals("ucecho example for UFM 1.11") ) { + System.out.println("Firmware upload time: " + ztex.uploadFirmware( "ucecho.ihx", force ) + " ms"); + } + +// upload the bitstream if necessary + if ( force || ! ztex.getFpgaConfiguration() ) { + System.out.println("FPGA configuration time: " + ztex.configureFpga( "fpga/ucecho.bin" , force ) + " ms"); + } + + +// claim interface 0 + ztex.trySetConfiguration ( 1 ); + ztex.claimInterface ( 0 ); + +// read string from stdin and write it to USB device + String str = ""; + BufferedReader reader = new BufferedReader( new InputStreamReader( System.in ) ); + while ( ! str.equals("quit") ) { + System.out.print("Enter a string or `quit' to exit the program: "); + str = reader.readLine(); + if ( ! str.equals("") ) + ztex.echo(str); + System.out.println(""); + } + +// release interface 0 + ztex.releaseInterface( 0 ); + + } + catch (Exception e) { + System.out.println("Error: "+e.getLocalizedMessage() ); + } + } + +} Index: examples/usb-fpga-1.11/ucecho/ucecho.c =================================================================== --- examples/usb-fpga-1.11/ucecho/ucecho.c (nonexistent) +++ examples/usb-fpga-1.11/ucecho/ucecho.c (revision 4) @@ -0,0 +1,72 @@ +/*! + ucecho -- uppercase conversion example for ZTEX USB FPGA Module 1.11 + Copyright (C) 2009-2010 ZTEX e.K. + http://www.ztex.de + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License version 3 as + published by the Free Software Foundation. + + This program is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, see http://www.gnu.org/licenses/. +!*/ + +#include[ztex-conf.h] // Loads the configuration macros, see ztex-conf.h for the available macros +#include[ztex-utils.h] // include basic functions + +// configure endpoints 2 and 4, both belong to interface 0 (in/out are from the point of view of the host) +EP_CONFIG(2,0,BULK,IN,512,2); +EP_CONFIG(4,0,BULK,OUT,512,2); + +// select ZTEX USB FPGA Module 1.11 as target (required for FPGA configuration) +IDENTITY_UFM_1_11(10.12.0.0,0); + +// this product string is also used for identification by the host software +#define[PRODUCT_STRING]["ucecho example for UFM 1.11"] + +// this is called automatically after FPGA configuration +#define[POST_FPGA_CONFIG][POST_FPGA_CONFIG + OEC = 255; +] + +// include the main part of the firmware kit, define the descriptors, ... +#include[ztex.h] + +void main(void) +{ + WORD i,size; + +// init everything + init_USB(); + + EP2CS &= ~bmBIT0; // stall = 0 + SYNCDELAY; + EP4CS &= ~bmBIT0; // stall = 0 + + SYNCDELAY; // first two packages are waste + EP4BCL = 0x80; // skip package, (re)arm EP4 + SYNCDELAY; + EP4BCL = 0x80; // skip package, (re)arm EP4 + + while (1) { + if ( !(EP4CS & bmBIT2) ) { // EP4 is not empty + size = (EP4BCH << 8) | EP4BCL; + if ( size>0 && size<=512 && !(EP2CS & bmBIT3)) { // EP2 is not full + for ( i=0; i> 8; + SYNCDELAY; + EP2BCL = size & 255; // arm EP2 + } + SYNCDELAY; + EP4BCL = 0x80; // skip package, (re)arm EP4 + } + } +} Index: examples/usb-fpga-1.11/ucecho/ucecho.bat =================================================================== --- examples/usb-fpga-1.11/ucecho/ucecho.bat (nonexistent) +++ examples/usb-fpga-1.11/ucecho/ucecho.bat (revision 4) @@ -0,0 +1,2 @@ +java -cp UCEcho.jar UCEcho +pause Index: examples/usb-fpga-1.11/ucecho/fpga/promgen.sh =================================================================== --- examples/usb-fpga-1.11/ucecho/fpga/promgen.sh (nonexistent) +++ examples/usb-fpga-1.11/ucecho/fpga/promgen.sh (revision 4) @@ -0,0 +1,14 @@ +#!/bin/bash + +# On my computer I use a sript named xilinx to preload the environment +# variables. The command "xilinx ise" starts the ISE for example. +# Therefore we check for the xilinx script first. +if `which xilinx > /dev/null`; then + xilinx="xilinx" +else + xilinx="" +fi + +for i in *.bit; do + $xilinx promgen -w -p bin -u 0 $i +done
examples/usb-fpga-1.11/ucecho/fpga/promgen.sh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: examples/usb-fpga-1.11/ucecho/fpga/ucecho.ucf =================================================================== --- examples/usb-fpga-1.11/ucecho/fpga/ucecho.ucf (nonexistent) +++ examples/usb-fpga-1.11/ucecho/fpga/ucecho.ucf (revision 4) @@ -0,0 +1,21 @@ +NET "CLK" TNM_NET = "CLK"; +TIMESPEC "TS_CLK" = PERIOD "CLK" 20 ns HIGH 50 %; +NET "CLK" LOC = "K14" | IOSTANDARD = LVCMOS33 ; + +NET "pb<0>" LOC = "C16" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "pb<1>" LOC = "C15" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "pb<2>" LOC = "D16" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "pb<3>" LOC = "D14" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "pb<4>" LOC = "E13" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "pb<5>" LOC = "E12" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "pb<6>" LOC = "F16" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "pb<7>" LOC = "F15" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; + +NET "pc<0>" LOC = "G12" | IOSTANDARD = LVCMOS33 ; +NET "pc<1>" LOC = "G11" | IOSTANDARD = LVCMOS33 ; +NET "pc<2>" LOC = "H15" | IOSTANDARD = LVCMOS33 ; +NET "pc<3>" LOC = "M14" | IOSTANDARD = LVCMOS33 ; +NET "pc<4>" LOC = "P11" | IOSTANDARD = LVCMOS33 ; +NET "pc<5>" LOC = "H14" | IOSTANDARD = LVCMOS33 ; +NET "pc<6>" LOC = "H11" | IOSTANDARD = LVCMOS33 ; +NET "pc<7>" LOC = "H13" | IOSTANDARD = LVCMOS33 ; Index: examples/usb-fpga-1.11/ucecho/fpga/ucecho.ise =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream Index: examples/usb-fpga-1.11/ucecho/fpga/ucecho.ise =================================================================== --- examples/usb-fpga-1.11/ucecho/fpga/ucecho.ise (nonexistent) +++ examples/usb-fpga-1.11/ucecho/fpga/ucecho.ise (revision 4)
examples/usb-fpga-1.11/ucecho/fpga/ucecho.ise Property changes : Added: svn:mime-type ## -0,0 +1 ## +application/octet-stream \ No newline at end of property Index: examples/usb-fpga-1.11/ucecho/fpga/ucecho.vhd =================================================================== --- examples/usb-fpga-1.11/ucecho/fpga/ucecho.vhd (nonexistent) +++ examples/usb-fpga-1.11/ucecho/fpga/ucecho.vhd (revision 4) @@ -0,0 +1,30 @@ +library ieee; +use IEEE.std_logic_1164.all; +use IEEE.numeric_std.all; + +entity ucecho is + port( + pc : in unsigned(7 downto 0); + pb : out unsigned(7 downto 0); + CLK : in std_logic + ); +end ucecho; + + +--signal declaration +architecture RTL of ucecho is + +begin + dpUCECHO: process(CLK) + begin + if CLK' event and CLK = '1' then + if ( pc >= 97 ) and ( pc <= 122) + then + pb <= pc - 32; + else + pb <= pc; + end if; + end if; + end process dpUCECHO; + +end RTL; Index: examples/usb-fpga-1.11/ucecho/fpga/clean.sh =================================================================== --- examples/usb-fpga-1.11/ucecho/fpga/clean.sh (nonexistent) +++ examples/usb-fpga-1.11/ucecho/fpga/clean.sh (revision 4) @@ -0,0 +1,80 @@ +#!/bin/bash + +# This files / directories from this directory will not be removed +# Filenames with spaces or other spuid characters will be ignored +sourcefiles="*.vhd *.ucf *.sh *.ise *.bit *.bin *.xise" +subdirs="ipcore_dir" + + +# This sould not be edited. +list_files() { + if [ "$2" != "" ]; then + echo "$1" + for i in $2; do + echo " $i" + done + fi +} + +rmfiles="" +rmdirs="" +keepfiles="" +keepdirs="" +allfiles=`ls -A` +for f in $allfiles; do + keep=false + for i in $sourcefiles; do + if [ "$i" == "$f" ]; then + keep=true + fi + done + for i in $subdirs; do + if [ "$i" == "$f" ]; then + keep=true + fi + done + if [ -d "$f" ]; then + if $keep; then + keepdirs+=" $f" + else + rmdirs+=" $f" + fi + fi + if [ -f "$f" ]; then + if $keep; then + keepfiles+=" $f" + else + rmfiles+=" $f" + fi + fi +done + +echo +echo "Directory $PWD:" +list_files "This directories will NOT be removed:" "$keepdirs" +list_files "This files will NOT be removed:" "$keepfiles" +list_files "This directories will be removed:" "$rmdirs" +list_files "This files will be removed:" "$rmfiles" + +if [ "$rmfiles" == "" -a "$rmdirs" == "" ]; then + c="yes" +else + echo -n 'Confirm this by entering "yes": ' + read c +fi + +if [ "$c" == "yes" ]; then + [ "$rmfiles" != "" ] && rm $rmfiles + [ "$rmdirs" != "" ] && rm -r $rmdirs + + for d in $subdirs; do + if [ -x "$d/clean.sh" ]; then + cd $d + ./clean.sh || exit 1 + cd .. + fi + done + + exit 0 +fi +exit 1
examples/usb-fpga-1.11/ucecho/fpga/clean.sh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: examples/usb-fpga-1.11/ucecho/fpga/ucecho.xise =================================================================== --- examples/usb-fpga-1.11/ucecho/fpga/ucecho.xise (nonexistent) +++ examples/usb-fpga-1.11/ucecho/fpga/ucecho.xise (revision 4) @@ -0,0 +1,55 @@ + + + +
+ + + + + + + + +
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Index: examples/usb-fpga-1.11/ucecho/Readme =================================================================== --- examples/usb-fpga-1.11/ucecho/Readme (nonexistent) +++ examples/usb-fpga-1.11/ucecho/Readme (revision 4) @@ -0,0 +1,21 @@ +ucecho +------ + +This example is intended for ZTEX USB-FPGA-Modules. + +The firmware (defined in ucecho.c) declares Endpoint 2 and Endpoint 4 +(both 512 bytes, double buffered, bulk transfer, belong to interface 0). +All data that is written to Endpoint 4 is converted to uppercase by +the FPGA and can be read back from Endpoint 2. + +This example does the same as the example in directory ../../all/ucecho +except that the uppercase - lowercase conversion made by the FPGA. + +The driver (defined in UCEcho.java) uploads the the Firmware (ucecho.ihx) +to the EZ-USB Microcontroller and the Bitstream (fpga/ucecho.bin) to the +FPGA if necessary, sends user string to the device and reads them back. + +Uploading the Firmware to EEPROM is also supported by the firmware (e.g. +using the FWLoader utility). + +This example may serve a good starting point for own projects. Index: examples/usb-fpga-1.11/ucecho/Makefile =================================================================== --- examples/usb-fpga-1.11/ucecho/Makefile (nonexistent) +++ examples/usb-fpga-1.11/ucecho/Makefile (revision 4) @@ -0,0 +1,27 @@ +######################### +# configuration section # +######################### + +# Defines the location of the EZ-USB SDK +ZTEXPREFIX=../../.. + +# The name of the jar archive +JARTARGET=UCEcho.jar +# Java Classes that have to be build +CLASSTARGETS=UCEcho.class +# Extra dependencies for Java Classes +CLASSEXTRADEPS= + +# ihx files (firmware ROM files) that have to be build +IHXTARGETS=ucecho.ihx +# Extra Dependencies for ihx files +IHXEXTRADEPS= + +# Extra files that should be included into th jar archive +EXTRAJARFILES=ucecho.ihx fpga/ucecho.bin + +################################ +# DO NOT CHANAGE THE FOLLOWING # +################################ +# includes the main Makefile +include $(ZTEXPREFIX)/Makefile.mk Index: examples/usb-fpga-1.11/standalone/standalone.sh =================================================================== --- examples/usb-fpga-1.11/standalone/standalone.sh (nonexistent) +++ examples/usb-fpga-1.11/standalone/standalone.sh (revision 4) @@ -0,0 +1,6 @@ +if [ "$1" = "" ]; then + echo "Usage: $0 " + exit 1 +fi +../../../java/FWLoader -c -uu standalone.ihx -ue standalone.ihx -um $1 +
examples/usb-fpga-1.11/standalone/standalone.sh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: examples/usb-fpga-1.11/standalone/standalone.c =================================================================== --- examples/usb-fpga-1.11/standalone/standalone.c (nonexistent) +++ examples/usb-fpga-1.11/standalone/standalone.c (revision 4) @@ -0,0 +1,41 @@ +/*! + standalone -- standalone firmware that supports FPGA configuration from FLASH and firmware loading from EEPROM for ZTEX USB FPGA Module 1.11 + Copyright (C) 2009-2010 ZTEX e.K. + http://www.ztex.de + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License version 3 as + published by the Free Software Foundation. + + This program is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, see http://www.gnu.org/licenses/. +!*/ + +#include[ztex-conf.h] // Loads the configuration macros, see ztex-conf.h for the available macros +#include[ztex-utils.h] // include basic functions and variables + +// select ZTEX USB FPGA Module 1.11 as target +IDENTITY_UFM_1_11(10.12.0.0,0); + +// this product string can also used for identification by the host software +#define[PRODUCT_STRING]["UFM 1.11 standalone firmware"] + +// enable Flash support +ENABLE_FLASH; +ENABLE_FLASH_BITSTREAM; + +#include[ztex.h] + +void main(void) +{ + init_USB(); // init everything + + while (1) { } // twiddle thumbs +} + + Index: examples/usb-fpga-1.11/standalone/Readme =================================================================== --- examples/usb-fpga-1.11/standalone/Readme (nonexistent) +++ examples/usb-fpga-1.11/standalone/Readme (revision 4) @@ -0,0 +1,16 @@ +standalone +---------- + +This firmware can be used for standalone applications where firmware is +loaded from EEPROM and bitstream is read from Flash memory. + +The FWLoader utility is used to upload +1. the firmware to the microcontroller (if no valid firmware is + running), +2. the firmware into EEPROM and +3. the FPGA bitstream into the Flash memory, + +e.g. by calling + +./FWLoader -c -uu standalone.ihx -ue standalone.ihx -um + Index: examples/usb-fpga-1.11/standalone/Makefile =================================================================== --- examples/usb-fpga-1.11/standalone/Makefile (nonexistent) +++ examples/usb-fpga-1.11/standalone/Makefile (revision 4) @@ -0,0 +1,23 @@ +######################### +# configuration section # +######################### + +ZTEXPREFIX=../../.. + +JARTARGET= +CLASSTARGETS= +CLASSEXTRADEPS= + +IHXTARGETS=standalone.ihx +IHXEXTRADEPS= +EXTRAJARFILES= +EXTRADISTCLEANFILES= + +default: all + +################################ +# DO NOT CHANAGE THE FOLLOWING # +################################ + +include $(ZTEXPREFIX)/Makefile.mk + Index: examples/usb-fpga-1.11/flashbench/flashbench.bat =================================================================== --- examples/usb-fpga-1.11/flashbench/flashbench.bat (nonexistent) +++ examples/usb-fpga-1.11/flashbench/flashbench.bat (revision 4) @@ -0,0 +1,2 @@ +java -cp FlashBench.jar FlashBench +pause Index: examples/usb-fpga-1.11/flashbench/flashbench.sh =================================================================== --- examples/usb-fpga-1.11/flashbench/flashbench.sh (nonexistent) +++ examples/usb-fpga-1.11/flashbench/flashbench.sh (revision 4) @@ -0,0 +1,3 @@ +#make -C ../../ztex/java distclean all || exit +#make distclean all || exit +java -cp FlashBench.jar FlashBench $@
examples/usb-fpga-1.11/flashbench/flashbench.sh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: examples/usb-fpga-1.11/flashbench/Readme =================================================================== --- examples/usb-fpga-1.11/flashbench/Readme (nonexistent) +++ examples/usb-fpga-1.11/flashbench/Readme (revision 4) @@ -0,0 +1,18 @@ +flashbench +---------- + +A write / read benchmark for Flash memory on ZTEX modules. + +ATTENTION: The tests will destroy the data stored in Flash memory. + +The number of sectors to be tested can be specified using the +-s parameter of the host software. + +Three tests are performed: +1. Read/write test: Pseudo-random test data is written and immediately + read and compared (i.e. write sector 0, read sector 0, write sector + 1, read sector 1, ...) +2. Write test: Pseudo-random test data is written (i.e. write sector 0, + write sector 1, ...) +3. Write test: Pseudo-random test data is read and compared (i.e. read + sector 0, read sector 1, ...) Index: examples/usb-fpga-1.11/flashbench/FlashBench.java =================================================================== --- examples/usb-fpga-1.11/flashbench/FlashBench.java (nonexistent) +++ examples/usb-fpga-1.11/flashbench/FlashBench.java (revision 4) @@ -0,0 +1,222 @@ +/*! + flashbench -- Flash memory benchmark for ZTEX USB FPGA Module 1.11 + Copyright (C) 2009-2010 ZTEX e.K. + http://www.ztex.de + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License version 3 as + published by the Free Software Foundation. + + This program is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, see http://www.gnu.org/licenses/. +!*/ + +import java.io.*; +import java.util.*; + +import ch.ntb.usb.*; + +import ztex.*; + +// ***************************************************************************** +// ******* ParameterException ************************************************** +// ***************************************************************************** +// Exception the prints a help message +class ParameterException extends Exception { + public final static String helpMsg = new String ( + "Parameters:\n"+ + " -d Device Number (default: 0)\n" + + " -s Number of sectors to be tested, -1 means all (default: 10000)\n" + + " -f Force uploads\n" + + " -p Print bus info\n" + + " -w Enable certain workarounds which may be required for vmware + windows\n"+ + " -h This help" ); + + public ParameterException (String msg) { + super( msg + "\n" + helpMsg ); + } +} + +// ***************************************************************************** +// ******* Test0 *************************************************************** +// ***************************************************************************** +class FlashBench extends Ztex1v1 { + +// ******* FlashBench ********************************************************** +// constructor + public FlashBench ( ZtexDevice1 pDev ) throws UsbException { + super ( pDev ); + } + +// ******* testRW ************************************************************** +// measures read + write performance + public double testRW ( int num ) throws UsbException, InvalidFirmwareException, CapabilityException { + byte[] buf1 = new byte[flashSectorSize()]; + byte[] buf2 = new byte[flashSectorSize()]; + int errors = 0; + + long t0 = new Date().getTime(); + + for ( int i=0; i=args.length) throw new Exception(); + devNum = Integer.parseInt( args[i] ); + } + catch (Exception e) { + throw new ParameterException("Device number expected after -d"); + } + } + if ( args[i].equals("-s") ) { + i++; + try { + if (i>=args.length) throw new Exception(); + sectors = Integer.parseInt( args[i] ); + } + catch (Exception e) { + throw new ParameterException("Number of sectors expected after -s"); + } + } + else if ( args[i].equals("-f") ) { + force = true; + } + else if ( args[i].equals("-p") ) { + bus.printBus(System.out); + System.exit(0); + } + else if ( args[i].equals("-p") ) { + bus.printBus(System.out); + System.exit(0); + } + else if ( args[i].equals("-w") ) { + workarounds = true; + } + else if ( args[i].equals("-h") ) { + System.err.println(ParameterException.helpMsg); + System.exit(0); + } + else throw new ParameterException("Invalid Parameter: "+args[i]); + } + + +// create the main class + FlashBench ztex = new FlashBench ( bus.device(devNum) ); + ztex.certainWorkarounds = workarounds; + +// upload the firmware if necessary + if ( force || ! ztex.valid() || ! ztex.dev().productString().equals("flashbench for UFM 1.11") ) { + System.out.println("Firmware upload time: " + ztex.uploadFirmware( "flashbench.ihx", force ) + " ms"); + } + +// print some information + System.out.println("Capabilities: " + ztex.capabilityInfo(", ")); + System.out.println("Enabled: " + ztex.flashEnabled()); + System.out.println("Size: " + ztex.flashSize()+" Bytes"); +// ztex.printMmcState(); + + if ( sectors<1 || sectors>ztex.flashSectors() ) sectors = ztex.flashSectors(); + + System.out.println("Read + Write Performance: " + ztex.testRW(sectors) + "kb/s \n"); + int seed = (int) Math.round(65535*Math.random()); + System.out.println("Write Performance: " + ztex.testW(sectors, seed) + "kb/s "); + System.out.println("Read Performance: " + ztex.testR(sectors, seed) + "kb/s \n"); + } + catch (Exception e) { + System.out.println("Error: "+e.getLocalizedMessage() ); + } + } + +} Index: examples/usb-fpga-1.11/flashbench/Makefile =================================================================== --- examples/usb-fpga-1.11/flashbench/Makefile (nonexistent) +++ examples/usb-fpga-1.11/flashbench/Makefile (revision 4) @@ -0,0 +1,21 @@ +######################### +# configuration section # +######################### + +ZTEXPREFIX=../../.. + +JARTARGET=FlashBench.jar +CLASSTARGETS=FlashBench.class +CLASSEXTRADEPS= +#CLASSEXTRADEPS:=$(shell echo $(ZTEXPREFIX)/java/ztex/*.java) + +IHXTARGETS=flashbench.ihx +IHXEXTRADEPS= +#IHXEXTRADEPS:=$(shell echo $(ZTEXPREFIX)/include/*.h) +EXTRAJARFILES=flashbench.ihx + +################################ +# DO NOT CHANAGE THE FOLLOWING # +################################ + +include $(ZTEXPREFIX)/Makefile.mk Index: examples/usb-fpga-1.11/flashbench/flashbench.c =================================================================== --- examples/usb-fpga-1.11/flashbench/flashbench.c (nonexistent) +++ examples/usb-fpga-1.11/flashbench/flashbench.c (revision 4) @@ -0,0 +1,40 @@ +/*! + flashbench -- Flash memory benchmark for ZTEX USB FPGA Module 1.11 + Copyright (C) 2009-2010 ZTEX e.K. + http://www.ztex.de + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License version 3 as + published by the Free Software Foundation. + + This program is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, see http://www.gnu.org/licenses/. +!*/ + +#include[ztex-conf.h] // Loads the configuration macros, see ztex-conf.h for the available macros +#include[ztex-utils.h] // include basic functions and variables + +// select ZTEX USB FPGA Module 1.11 as target (required for FPGA configuration) +IDENTITY_UFM_1_11(10.12.0.0,0); + +// this product string is also used for identification by the host software +#define[PRODUCT_STRING]["flashbench for UFM 1.11"] + +// enable Flash support +ENABLE_FLASH; + +// include the main part of the firmware kit, define the descriptors, ... +#include[ztex.h] + +void main(void) +{ + init_USB(); // init everything ... + + while (1) { } // ... and twiddle thumbs +} + Index: examples/usb-fpga-1.11/Makefile =================================================================== --- examples/usb-fpga-1.11/Makefile (nonexistent) +++ examples/usb-fpga-1.11/Makefile (revision 4) @@ -0,0 +1,16 @@ +DIRS=ucecho flashdemo flashbench standalone intraffic memtest + +.PHONY: default all clean distclean + +default: + @echo "This makefile is intended to clean up the project or to build all examples in this subdirectory" + @echo "Usage: make all | clean | distclean" + +all: + for i in $(DIRS); do make -C $$i all; done + +clean: + for i in $(DIRS); do make -C $$i clean; done + +distclean: clean + for i in $(DIRS); do make -C $$i distclean; done Index: examples/usb-fpga-1.11/memtest/memtest.c =================================================================== --- examples/usb-fpga-1.11/memtest/memtest.c (nonexistent) +++ examples/usb-fpga-1.11/memtest/memtest.c (revision 4) @@ -0,0 +1,102 @@ +/*! + memtest -- DDR SDRAM FIFO for testing memory on ZTEX USB FPGA Module 1.11 + Copyright (C) 2009-2010 ZTEX e.K. + http://www.ztex.de + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License version 3 as + published by the Free Software Foundation. + + This program is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, see http://www.gnu.org/licenses/. +!*/ + +#include[ztex-conf.h] // Loads the configuration macros, see ztex-conf.h for the available macros +#include[ztex-utils.h] // include basic functions + +// 1024 (instead of 512) byte bulk transferns. +// According to USB standard they are invalid but usually supported and 25% faster. +//#define[fastmode] + +#ifdef[fastmode] +// configure endpoint 2, in, quad buffered, 1024 bytes, interface 0 +EP_CONFIG(2,0,BULK,IN,1024,4); +#else +// configure endpoint 2, in, quad buffered, 512 bytes, interface 0 +EP_CONFIG(2,0,BULK,IN,512,4); +#endif + +// select ZTEX USB FPGA Module 1.11 as target (required for FPGA configuration) +IDENTITY_UFM_1_11(10.12.0.0,0); + +// this product string is also used for identification by the host software +#define[PRODUCT_STRING]["memtest example for UFM 1.11"] + +// 0 : counter mode; 1: shift pattern mode +xdata BYTE mode = 0; + +// this is called automatically after FPGA configuration +#define[POST_FPGA_CONFIG][POST_FPGA_CONFIG + IOA0 = 1; // reset on + OEA |= bmBIT0 | bmBIT3; + if ( mode ) IOA3 = 1; + + EP2CS &= ~bmBIT0; // clear stall bit + + REVCTL = 0x3; + SYNCDELAY; + + IFCONFIG = bmBIT7 | bmBIT5 | 3; // internel 30MHz clock, drive IFCLK ouput, slave FIFO interface + SYNCDELAY; + EP2FIFOCFG = bmBIT3 | bmBIT0; // AOTUOIN, WORDWIDE + SYNCDELAY; + +#ifdef[fastmode] + EP2AUTOINLENH = 4; // 1024 bytes +#else + EP2AUTOINLENH = 2; // 512 bytes +#endif + SYNCDELAY; + EP2AUTOINLENL = 0; + SYNCDELAY; + + FIFORESET = 0x80; // reset FIFO + SYNCDELAY; + FIFORESET = 2; + SYNCDELAY; + FIFORESET = 0x00; + SYNCDELAY; + + FIFOPINPOLAR = 0; + SYNCDELAY; + PINFLAGSAB = 0; + SYNCDELAY; + PINFLAGSCD = 0; + SYNCDELAY; + + IOA0 = 0; // reset off +] + +// set the test pattern +ADD_EP0_VENDOR_COMMAND((0x60,, + mode = SETUPDAT[2]; +,, + NOP; +));; + +// include the main part of the firmware kit, define the descriptors, ... +#include[ztex.h] + +void main(void) +{ + init_USB(); + + while (1) { + } +} + Index: examples/usb-fpga-1.11/memtest/memtest.bat =================================================================== --- examples/usb-fpga-1.11/memtest/memtest.bat (nonexistent) +++ examples/usb-fpga-1.11/memtest/memtest.bat (revision 4) @@ -0,0 +1,3 @@ +java -cp MemTest.jar MemTest +pause + Index: examples/usb-fpga-1.11/memtest/memtest.sh =================================================================== --- examples/usb-fpga-1.11/memtest/memtest.sh (nonexistent) +++ examples/usb-fpga-1.11/memtest/memtest.sh (revision 4) @@ -0,0 +1,6 @@ +#make -C ../../../java distclean all || exit +#cd fpga +#./promgen.sh +#cd .. +#make distclean all || exit +java -cp MemTest.jar MemTest $@
examples/usb-fpga-1.11/memtest/memtest.sh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: examples/usb-fpga-1.11/memtest/fpga/ipcore_dir/dcm0.ise =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream Index: examples/usb-fpga-1.11/memtest/fpga/ipcore_dir/dcm0.ise =================================================================== --- examples/usb-fpga-1.11/memtest/fpga/ipcore_dir/dcm0.ise (nonexistent) +++ examples/usb-fpga-1.11/memtest/fpga/ipcore_dir/dcm0.ise (revision 4)
examples/usb-fpga-1.11/memtest/fpga/ipcore_dir/dcm0.ise Property changes : Added: svn:mime-type ## -0,0 +1 ## +application/octet-stream \ No newline at end of property Index: examples/usb-fpga-1.11/memtest/fpga/ipcore_dir/mem0.xise =================================================================== --- examples/usb-fpga-1.11/memtest/fpga/ipcore_dir/mem0.xise (nonexistent) +++ examples/usb-fpga-1.11/memtest/fpga/ipcore_dir/mem0.xise (revision 4) @@ -0,0 +1,375 @@ + + + +
+ + + + + + + + +
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Index: examples/usb-fpga-1.11/memtest/fpga/ipcore_dir/mem0.xco =================================================================== --- examples/usb-fpga-1.11/memtest/fpga/ipcore_dir/mem0.xco (nonexistent) +++ examples/usb-fpga-1.11/memtest/fpga/ipcore_dir/mem0.xco (revision 4) @@ -0,0 +1,42 @@ +############################################################## +# +# Xilinx Core Generator version 11.4 +# Date: Mon Jun 7 10:52:19 2010 +# +############################################################## +# +# This file contains the customisation parameters for a +# Xilinx CORE Generator IP GUI. It is strongly recommended +# that you do not manually alter this file as it may cause +# unexpected and unsupported behavior. +# +############################################################## +# +# BEGIN Project Options +SET addpads = False +SET asysymbol = True +SET busformat = BusFormatAngleBracketNotRipped +SET createndf = False +SET designentry = VHDL +SET device = xc6slx16 +SET devicefamily = spartan6 +SET flowvendor = Foundation_ISE +SET formalverification = False +SET foundationsym = False +SET implementationfiletype = Ngc +SET package = ftg256 +SET removerpms = False +SET simulationfiles = Behavioral +SET speedgrade = -2 +SET verilogsim = False +SET vhdlsim = True +# END Project Options +# BEGIN Select +SELECT MIG family Xilinx,_Inc. 3.3 +# END Select +# BEGIN Parameters +CSET component_name=mem0 +CSET xml_input_file=/drv_s2/usb-fpga/ztex/examples/usb-fpga-1.11/memtest/fpga/ipcore_dir/mem0/user_design/mig.prj +# END Parameters +GENERATE +# CRC: 79d4171a Index: examples/usb-fpga-1.11/memtest/fpga/ipcore_dir/dcm0.xise =================================================================== --- examples/usb-fpga-1.11/memtest/fpga/ipcore_dir/dcm0.xise (nonexistent) +++ examples/usb-fpga-1.11/memtest/fpga/ipcore_dir/dcm0.xise (revision 4) @@ -0,0 +1,322 @@ + + + +
+ + + + + + + + +
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Index: examples/usb-fpga-1.11/memtest/fpga/ipcore_dir/dcm0.xco =================================================================== --- examples/usb-fpga-1.11/memtest/fpga/ipcore_dir/dcm0.xco (nonexistent) +++ examples/usb-fpga-1.11/memtest/fpga/ipcore_dir/dcm0.xco (revision 4) @@ -0,0 +1,211 @@ +############################################################## +# +# Xilinx Core Generator version 11.4 +# Date: Mon Jun 7 13:33:38 2010 +# +############################################################## +# +# This file contains the customisation parameters for a +# Xilinx CORE Generator IP GUI. It is strongly recommended +# that you do not manually alter this file as it may cause +# unexpected and unsupported behavior. +# +############################################################## +# +# BEGIN Project Options +SET addpads = False +SET asysymbol = True +SET busformat = BusFormatAngleBracketNotRipped +SET createndf = False +SET designentry = VHDL +SET device = xc6slx16 +SET devicefamily = spartan6 +SET flowvendor = Foundation_ISE +SET formalverification = False +SET foundationsym = False +SET implementationfiletype = Ngc +SET package = ftg256 +SET removerpms = False +SET simulationfiles = Behavioral +SET speedgrade = -2 +SET verilogsim = True +SET vhdlsim = True +# END Project Options +# BEGIN Select +SELECT Clocking_Wizard family Xilinx,_Inc. 1.4 +# END Select +# BEGIN Parameters +CSET clkfb_in_signaling=SINGLE +CSET clkin1_jitter_ps=100.0 +CSET clkin2_jitter_ps=100.0 +CSET clkout1_drives=BUFG +CSET clkout1_requested_duty_cycle=50.0 +CSET clkout1_requested_out_freq=200.000 +CSET clkout1_requested_phase=0.000 +CSET clkout2_drives=BUFG +CSET clkout2_requested_duty_cycle=50.0 +CSET clkout2_requested_out_freq=50.000 +CSET clkout2_requested_phase=0.000 +CSET clkout2_used=true +CSET clkout3_drives=BUFG +CSET clkout3_requested_duty_cycle=50.0 +CSET clkout3_requested_out_freq=48 +CSET clkout3_requested_phase=0.000 +CSET clkout3_used=false +CSET clkout4_drives=BUFG +CSET clkout4_requested_duty_cycle=50.0 +CSET clkout4_requested_out_freq=100.000 +CSET clkout4_requested_phase=0.000 +CSET clkout4_used=false +CSET clkout5_drives=BUFG +CSET clkout5_requested_duty_cycle=50.0 +CSET clkout5_requested_out_freq=100.000 +CSET clkout5_requested_phase=0.000 +CSET clkout5_used=false +CSET clkout6_drives=BUFG +CSET clkout6_requested_duty_cycle=50.0 +CSET clkout6_requested_out_freq=100.000 +CSET clkout6_requested_phase=0.000 +CSET clkout6_used=false +CSET clkout7_drives=BUFG +CSET clkout7_requested_duty_cycle=50.0 +CSET clkout7_requested_out_freq=100.000 +CSET clkout7_requested_phase=0.000 +CSET clkout7_used=false +CSET clock_mgr_type=MANUAL +CSET component_name=dcm0 +CSET dcm_clk_feedback=1X +CSET dcm_clk_out1_port=CLKFX +CSET dcm_clk_out2_port=CLK0 +CSET dcm_clk_out3_port=CLK0 +CSET dcm_clk_out4_port=CLK0 +CSET dcm_clk_out5_port=CLK0 +CSET dcm_clk_out6_port=CLK0 +CSET dcm_clkdv_divide=12.0 +CSET dcm_clkfx_divide=1 +CSET dcm_clkfx_multiply=4 +CSET dcm_clkgen_clk_out1_port=CLKFX +CSET dcm_clkgen_clk_out2_port=CLKFXDV +CSET dcm_clkgen_clk_out3_port=CLKFX +CSET dcm_clkgen_clkfx_divide=1 +CSET dcm_clkgen_clkfx_md_max=0.000 +CSET dcm_clkgen_clkfx_multiply=4 +CSET dcm_clkgen_clkfxdv_divide=4 +CSET dcm_clkgen_clkin_period=20.000 +CSET dcm_clkgen_notes=None +CSET dcm_clkgen_spread_spectrum=NONE +CSET dcm_clkgen_startup_wait=false +CSET dcm_clkin_divide_by_2=false +CSET dcm_clkin_period=20.833 +CSET dcm_clkout_phase_shift=NONE +CSET dcm_deskew_adjust=SYSTEM_SYNCHRONOUS +CSET dcm_notes=None +CSET dcm_phase_shift=0 +CSET dcm_startup_wait=false +CSET feedback_source=FDBK_AUTO +CSET in_freq_units=Units_MHz +CSET in_jitter_units=Units_UI +CSET jitter_sel=No_Jitter +CSET mmcm_bandwidth=OPTIMIZED +CSET mmcm_clkfbout_mult_f=4.000 +CSET mmcm_clkfbout_phase=0.000 +CSET mmcm_clkfbout_use_fine_ps=false +CSET mmcm_clkin1_period=10.000 +CSET mmcm_clkin2_period=10.000 +CSET mmcm_clkout0_divide_f=4.000 +CSET mmcm_clkout0_duty_cycle=0.500 +CSET mmcm_clkout0_phase=0.000 +CSET mmcm_clkout0_use_fine_ps=false +CSET mmcm_clkout1_divide=1 +CSET mmcm_clkout1_duty_cycle=0.500 +CSET mmcm_clkout1_phase=0.000 +CSET mmcm_clkout1_use_fine_ps=false +CSET mmcm_clkout2_divide=1 +CSET mmcm_clkout2_duty_cycle=0.500 +CSET mmcm_clkout2_phase=0.000 +CSET mmcm_clkout2_use_fine_ps=false +CSET mmcm_clkout3_divide=1 +CSET mmcm_clkout3_duty_cycle=0.500 +CSET mmcm_clkout3_phase=0.000 +CSET mmcm_clkout3_use_fine_ps=false +CSET mmcm_clkout4_cascade=false +CSET mmcm_clkout4_divide=1 +CSET mmcm_clkout4_duty_cycle=0.500 +CSET mmcm_clkout4_phase=0.000 +CSET mmcm_clkout4_use_fine_ps=false +CSET mmcm_clkout5_divide=1 +CSET mmcm_clkout5_duty_cycle=0.500 +CSET mmcm_clkout5_phase=0.000 +CSET mmcm_clkout5_use_fine_ps=false +CSET mmcm_clkout6_divide=1 +CSET mmcm_clkout6_duty_cycle=0.500 +CSET mmcm_clkout6_phase=0.000 +CSET mmcm_clkout6_use_fine_ps=false +CSET mmcm_clock_hold=false +CSET mmcm_compensation=ZHOLD +CSET mmcm_divclk_divide=1 +CSET mmcm_notes=None +CSET mmcm_ref_jitter1=0.010 +CSET mmcm_ref_jitter2=0.010 +CSET mmcm_startup_wait=false +CSET num_out_clks=2 +CSET override_dcm=false +CSET override_dcm_clkgen=false +CSET override_mmcm=false +CSET override_pll=false +CSET platform=lin +CSET pll_bandwidth=OPTIMIZED +CSET pll_clk_feedback=CLKFBOUT +CSET pll_clkfbout_mult=12 +CSET pll_clkfbout_phase=0.000 +CSET pll_clkin_period=20.833 +CSET pll_clkout0_divide=3 +CSET pll_clkout0_duty_cycle=0.500 +CSET pll_clkout0_phase=0.000 +CSET pll_clkout1_divide=12 +CSET pll_clkout1_duty_cycle=0.500 +CSET pll_clkout1_phase=0.000 +CSET pll_clkout2_divide=6 +CSET pll_clkout2_duty_cycle=0.500 +CSET pll_clkout2_phase=0.000 +CSET pll_clkout3_divide=1 +CSET pll_clkout3_duty_cycle=0.500 +CSET pll_clkout3_phase=0.000 +CSET pll_clkout4_divide=1 +CSET pll_clkout4_duty_cycle=0.500 +CSET pll_clkout4_phase=0.000 +CSET pll_clkout5_divide=1 +CSET pll_clkout5_duty_cycle=0.500 +CSET pll_clkout5_phase=0.000 +CSET pll_compensation=INTERNAL +CSET pll_divclk_divide=1 +CSET pll_notes=None +CSET pll_ref_jitter=0.010 +CSET prim_in_freq=50.000 +CSET prim_in_jitter=0.010 +CSET prim_source=Single_ended_clock_capable_pin +CSET primtype_sel=DCM_CLKGEN +CSET relative_inclk=REL_PRIMARY +CSET secondary_in_freq=100.000 +CSET secondary_in_jitter=0.010 +CSET secondary_source=Single_ended_clock_capable_pin +CSET summary_strings=empty +CSET use_clk_valid=true +CSET use_dyn_phase_shift=false +CSET use_dyn_reconfig=false +CSET use_freeze=false +CSET use_freq_synth=true +CSET use_inclk_stopped=false +CSET use_inclk_switchover=false +CSET use_locked=true +CSET use_max_i_jitter=false +CSET use_min_o_jitter=false +CSET use_min_power=false +CSET use_phase_alignment=false +CSET use_power_down=false +CSET use_reset=true +CSET use_spread_spectrum=false +CSET use_status=false +# END Parameters +GENERATE +# CRC: 25f4ae4a Index: examples/usb-fpga-1.11/memtest/fpga/ipcore_dir/clean.sh =================================================================== --- examples/usb-fpga-1.11/memtest/fpga/ipcore_dir/clean.sh (nonexistent) +++ examples/usb-fpga-1.11/memtest/fpga/ipcore_dir/clean.sh (revision 4) @@ -0,0 +1,85 @@ +#!/bin/bash + +# This files / directories from this directory will not be removed +# Filenames with spaces or other spuid characters will be ignored +sourcefiles="*.vhd *.sh *.ise *.xco *.xise *.tcl" +subdirs="mem0" + +# This sould not be edited. +list_files() { + if [ "$2" != "" ]; then + echo "$1" + for i in $2; do + echo " $i" + done + fi +} + +rmfiles="" +rmdirs="" +keepfiles="" +keepdirs="" +allfiles=`ls -A` +for f in $allfiles; do + keep=false + for i in $sourcefiles; do + if [ "$i" == "$f" ]; then + keep=true + fi + done + for i in $subdirs; do + if [ "$i" == "$f" ]; then + keep=true + fi + done + for i in $binfiles; do # binfiles is set by distclean.sh + if [ "$i" == "$f" ]; then + keep=false + fi + done + if [ -d "$f" ]; then + if $keep; then + keepdirs+=" $f" + else + rmdirs+=" $f" + fi + fi + if [ -f "$f" ]; then + if $keep; then + keepfiles+=" $f" + else + rmfiles+=" $f" + fi + fi +done + + +echo +echo "Directory $PWD:" +list_files "This directories will NOT be removed:" "$keepdirs" +list_files "This files will NOT be removed:" "$keepfiles" +list_files "This directories will be removed:" "$rmdirs" +list_files "This files will be removed:" "$rmfiles" + +if [ "$rmfiles" == "" -a "$rmdirs" == "" ]; then + c="yes" +else + echo -n 'Confirm this by entering "yes": ' + read c +fi + +if [ "$c" == "yes" ]; then + [ "$rmfiles" != "" ] && rm $rmfiles + [ "$rmdirs" != "" ] && rm -r $rmdirs + + for d in $subdirs; do + if [ -x "$d/clean.sh" ]; then + cd $d + ./clean.sh || exit 1 + cd .. + fi + done + + exit 0 +fi +exit 1
examples/usb-fpga-1.11/memtest/fpga/ipcore_dir/clean.sh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: examples/usb-fpga-1.11/memtest/fpga/ipcore_dir/mem0.ise =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream Index: examples/usb-fpga-1.11/memtest/fpga/ipcore_dir/mem0.ise =================================================================== --- examples/usb-fpga-1.11/memtest/fpga/ipcore_dir/mem0.ise (nonexistent) +++ examples/usb-fpga-1.11/memtest/fpga/ipcore_dir/mem0.ise (revision 4)
examples/usb-fpga-1.11/memtest/fpga/ipcore_dir/mem0.ise Property changes : Added: svn:mime-type ## -0,0 +1 ## +application/octet-stream \ No newline at end of property Index: examples/usb-fpga-1.11/memtest/fpga/ipcore_dir/mem0/user_design/rtl/memc3_infrastructure.vhd.diff =================================================================== --- examples/usb-fpga-1.11/memtest/fpga/ipcore_dir/mem0/user_design/rtl/memc3_infrastructure.vhd.diff (nonexistent) +++ examples/usb-fpga-1.11/memtest/fpga/ipcore_dir/mem0/user_design/rtl/memc3_infrastructure.vhd.diff (revision 4) @@ -0,0 +1,45 @@ +--- memc3_infrastructure.orig.vhd 2010-05-29 12:15:17.000000000 +0200 ++++ memc3_infrastructure.vhd 2010-05-29 12:17:39.000000000 +0200 +@@ -118,7 +118,6 @@ + signal clkfbout_clkfbin : std_logic; + signal locked : std_logic; + signal rst_tmp : std_logic; +- signal sys_clk_ibufg : std_logic; + signal sys_rst : std_logic; + signal rst0_sync_r : std_logic_vector(RST_SYNC_NUM-1 downto 0); + +@@ -135,25 +134,6 @@ + + + +-diff_input_clk : if(C_INPUT_CLK_TYPE = "DIFFERENTIAL") generate +- u_ibufg_sys_clk : IBUFGDS +- port map ( +- I => sys_clk_p, +- IB => sys_clk_n, +- O => sys_clk_ibufg +- ); +-end generate; +- +- +-se_input_clk : if(C_INPUT_CLK_TYPE = "SINGLE_ENDED") generate +- u_ibufg_sys_clk : IBUFG +- port map ( +- I => sys_clk, +- O => sys_clk_ibufg +- ); +-end generate; +- +- + --*************************************************************************** + -- Global clock generation and distribution + --*************************************************************************** +@@ -192,7 +172,7 @@ + ( + CLKFBIN => clkfbout_clkfbin, + CLKINSEL => '1', +- CLKIN1 => sys_clk_ibufg, ++ CLKIN1 => sys_clk, + CLKIN2 => '0', + DADDR => (others => '0'), + DCLK => '0', Index: examples/usb-fpga-1.11/memtest/fpga/ipcore_dir/mem0/user_design/mig.prj =================================================================== --- examples/usb-fpga-1.11/memtest/fpga/ipcore_dir/mem0/user_design/mig.prj (nonexistent) +++ examples/usb-fpga-1.11/memtest/fpga/ipcore_dir/mem0/user_design/mig.prj (revision 4) @@ -0,0 +1,50 @@ + + + mem0 + xc6slx16-ftg256/-2 + 3.3 + + DDR_SDRAM/Components/MT46V32M16XX-5B-IT + 5000 + 1 + FALSE + + 13 + 10 + 2 + + + + 4(010) + 3 + Enable-Normal + Normal + Class II + Class II + UNCALIB_TERM + 50 Ohms + 0000 + 000 + 0 + 0 + Disable + Single-Ended + Two 32-bit bi-directional and four 32-bit unidirectional ports + Port0,Port1,Port2,Port3,Port4,Port5 + Bi-directional,Bi-directional,Write,Read,Write,Read + ROW_BANK_COLUMN + Round Robin + 012345 + 123450 + 234501 + 345012 + 450123 + 501234 + 012345 + 123450 + 234501 + 345012 + 450123 + 501234 + + Index: examples/usb-fpga-1.11/memtest/fpga/ipcore_dir/mem0/user_design/clean.sh =================================================================== --- examples/usb-fpga-1.11/memtest/fpga/ipcore_dir/mem0/user_design/clean.sh (nonexistent) +++ examples/usb-fpga-1.11/memtest/fpga/ipcore_dir/mem0/user_design/clean.sh (revision 4) @@ -0,0 +1,85 @@ +#!/bin/bash + +# This files / directories from this directory will not be removed +# Filenames with spaces or other spuid characters will be ignored +sourcefiles="*.sh *.prj" +subdirs="par rtl synth" + +# This sould not be edited. +list_files() { + if [ "$2" != "" ]; then + echo "$1" + for i in $2; do + echo " $i" + done + fi +} + +rmfiles="" +rmdirs="" +keepfiles="" +keepdirs="" +allfiles=`ls -A` +for f in $allfiles; do + keep=false + for i in $sourcefiles; do + if [ "$i" == "$f" ]; then + keep=true + fi + done + for i in $subdirs; do + if [ "$i" == "$f" ]; then + keep=true + fi + done + for i in $binfiles; do # binfiles is set by distclean.sh + if [ "$i" == "$f" ]; then + keep=false + fi + done + if [ -d "$f" ]; then + if $keep; then + keepdirs+=" $f" + else + rmdirs+=" $f" + fi + fi + if [ -f "$f" ]; then + if $keep; then + keepfiles+=" $f" + else + rmfiles+=" $f" + fi + fi +done + + +echo +echo "Directory $PWD:" +list_files "This directories will NOT be removed:" "$keepdirs" +list_files "This files will NOT be removed:" "$keepfiles" +list_files "This directories will be removed:" "$rmdirs" +list_files "This files will be removed:" "$rmfiles" + +if [ "$rmfiles" == "" -a "$rmdirs" == "" ]; then + c="yes" +else + echo -n 'Confirm this by entering "yes": ' + read c +fi + +if [ "$c" == "yes" ]; then + [ "$rmfiles" != "" ] && rm $rmfiles + [ "$rmdirs" != "" ] && rm -r $rmdirs + + for d in $subdirs; do + if [ -x "$d/clean.sh" ]; then + cd $d + ./clean.sh || exit 1 + cd .. + fi + done + + exit 0 +fi +exit 1
examples/usb-fpga-1.11/memtest/fpga/ipcore_dir/mem0/user_design/clean.sh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: examples/usb-fpga-1.11/memtest/fpga/ipcore_dir/mem0/clean.sh =================================================================== --- examples/usb-fpga-1.11/memtest/fpga/ipcore_dir/mem0/clean.sh (nonexistent) +++ examples/usb-fpga-1.11/memtest/fpga/ipcore_dir/mem0/clean.sh (revision 4) @@ -0,0 +1,86 @@ +#!/bin/bash + +# This files / directories from this directory will not be removed +# Filenames with spaces or other spuid characters will be ignored +sourcefiles="*.sh" +subdirs="user_design" + + +# This sould not be edited. +list_files() { + if [ "$2" != "" ]; then + echo "$1" + for i in $2; do + echo " $i" + done + fi +} + +rmfiles="" +rmdirs="" +keepfiles="" +keepdirs="" +allfiles=`ls -A` +for f in $allfiles; do + keep=false + for i in $sourcefiles; do + if [ "$i" == "$f" ]; then + keep=true + fi + done + for i in $subdirs; do + if [ "$i" == "$f" ]; then + keep=true + fi + done + for i in $binfiles; do # binfiles is set by distclean.sh + if [ "$i" == "$f" ]; then + keep=false + fi + done + if [ -d "$f" ]; then + if $keep; then + keepdirs+=" $f" + else + rmdirs+=" $f" + fi + fi + if [ -f "$f" ]; then + if $keep; then + keepfiles+=" $f" + else + rmfiles+=" $f" + fi + fi +done + + +echo +echo "Directory $PWD:" +list_files "This directories will NOT be removed:" "$keepdirs" +list_files "This files will NOT be removed:" "$keepfiles" +list_files "This directories will be removed:" "$rmdirs" +list_files "This files will be removed:" "$rmfiles" + +if [ "$rmfiles" == "" -a "$rmdirs" == "" ]; then + c="yes" +else + echo -n 'Confirm this by entering "yes": ' + read c +fi + +if [ "$c" == "yes" ]; then + [ "$rmfiles" != "" ] && rm $rmfiles + [ "$rmdirs" != "" ] && rm -r $rmdirs + + for d in $subdirs; do + if [ -x "$d/clean.sh" ]; then + cd $d + ./clean.sh || exit 1 + cd .. + fi + done + + exit 0 +fi +exit 1
examples/usb-fpga-1.11/memtest/fpga/ipcore_dir/mem0/clean.sh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: examples/usb-fpga-1.11/memtest/fpga/promgen.sh =================================================================== --- examples/usb-fpga-1.11/memtest/fpga/promgen.sh (nonexistent) +++ examples/usb-fpga-1.11/memtest/fpga/promgen.sh (revision 4) @@ -0,0 +1,14 @@ +#!/bin/bash + +# On my computer I use a sript named xilinx to preload the environment +# variables. The command "xilinx ise" starts the ISE for example. +# Therefore we check for the xilinx script first. +if `which xilinx > /dev/null`; then + xilinx="xilinx" +else + xilinx="" +fi + +for i in *.bit; do + $xilinx promgen -w -p bin -u 0 $i +done
examples/usb-fpga-1.11/memtest/fpga/promgen.sh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: examples/usb-fpga-1.11/memtest/fpga/memtest.xise =================================================================== --- examples/usb-fpga-1.11/memtest/fpga/memtest.xise (nonexistent) +++ examples/usb-fpga-1.11/memtest/fpga/memtest.xise (revision 4) @@ -0,0 +1,452 @@ + + + +
+ + + + + + + + +
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Index: examples/usb-fpga-1.11/memtest/fpga/memtest.ucf =================================================================== --- examples/usb-fpga-1.11/memtest/fpga/memtest.ucf (nonexistent) +++ examples/usb-fpga-1.11/memtest/fpga/memtest.ucf (revision 4) @@ -0,0 +1,169 @@ +NET "FXCLK" TNM_NET = "FXCLK"; +TIMESPEC "TS_FXCLK" = PERIOD "FXCLK" 20 ns HIGH 50 %; +NET "FXCLK" LOC = "K14" | IOSTANDARD = LVCMOS33 ; + +NET "IFCLK" TNM_NET = "IFCLK"; +TIMESPEC "TS_IFCLK" = PERIOD "IFCLK" 20 ns HIGH 50 %; +NET "IFCLK" LOC = "J14" | IOSTANDARD = LVCMOS33 ; + +NET "CLK" TNM_NET = "CLK"; +TIMESPEC "TS_CLK_IFCLK" = FROM "CLK" TO "IFCLK" 3ns DATAPATHONLY; +TIMESPEC "TS_IFCLK_CLK" = FROM "IFCLK" TO "CLK" 3ns DATAPATHONLY; + +NET "RESET_IN" LOC = "R3" | IOSTANDARD = LVCMOS33 ; # PA0 +NET "SLOE" LOC = "T3" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # PA2 +NET "PA3" LOC = "R11" | IOSTANDARD = LVCMOS33 ; # PA3 +NET "FIFOADR0" LOC = "T5" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # PA4 +NET "FIFOADR1" LOC = "N11" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # PA5 +NET "PKTEND" LOC = "T11" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; # PA6 +# NET "PA7" LOC = "T10" | IOSTANDARD = LVCMOS33 ; + +NET "FD<0>" LOC = "C16" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "FD<1>" LOC = "C15" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "FD<2>" LOC = "D16" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "FD<3>" LOC = "D14" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "FD<4>" LOC = "E13" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "FD<5>" LOC = "E12" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "FD<6>" LOC = "F16" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "FD<7>" LOC = "F15" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "FD<8>" LOC = "P10" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "FD<9>" LOC = "N12" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "FD<10>" LOC = "P12" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "FD<11>" LOC = "N5" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "FD<12>" LOC = "P5" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "FD<13>" LOC = "L8" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "FD<14>" LOC = "L7" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "FD<15>" LOC = "R5" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; + + +NET "PC<0>" LOC = "G12" | IOSTANDARD = LVCMOS33 ; +NET "PC<1>" LOC = "G11" | IOSTANDARD = LVCMOS33 ; +NET "PC<2>" LOC = "H15" | IOSTANDARD = LVCMOS33 ; +NET "PC<3>" LOC = "M14" | IOSTANDARD = LVCMOS33 ; +NET "pc<4>" LOC = "P11" | IOSTANDARD = LVCMOS33 ; +NET "pc<5>" LOC = "H14" | IOSTANDARD = LVCMOS33 ; +NET "pc<6>" LOC = "H11" | IOSTANDARD = LVCMOS33 ; +NET "pc<7>" LOC = "H13" | IOSTANDARD = LVCMOS33 ; + +NET "FLAGB" LOC = "G16" | IOSTANDARD = LVCMOS33 ; + +NET "SLRD" LOC = "K11" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; +NET "SLWR" LOC = "J11" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ; + + +############################################################################ +# VCC AUX VOLTAGE +############################################################################ +CONFIG VCCAUX=2.5; + +############################################################################ +## Memory Controller 3 +## Memory Device: DDR_SDRAM->MT46V32M16XX-5B-IT +## Frequency: 200 MHz +## Time Period: 5000 ps +## Supported Part Numbers: MT46V32M16BN-5B-IT +############################################################################ + +############################################################################ +## I/O TERMINATION +############################################################################ +NET "mcb3_dram_dq[*]" IN_TERM = UNTUNED_SPLIT_50; +NET "mcb3_dram_dqs" IN_TERM = UNTUNED_SPLIT_50; +NET "mcb3_dram_udqs" IN_TERM = UNTUNED_SPLIT_50; + +NET "mcb3_dram_a[*]" OUT_TERM = UNTUNED_50; +NET "mcb3_dram_ba[*]" OUT_TERM = UNTUNED_50; +NET "mcb3_dram_ck" OUT_TERM = UNTUNED_50; +NET "mcb3_dram_ck_n" OUT_TERM = UNTUNED_50; +NET "mcb3_dram_cke" OUT_TERM = UNTUNED_50; +NET "mcb3_dram_ras_n" OUT_TERM = UNTUNED_50; +NET "mcb3_dram_cas_n" OUT_TERM = UNTUNED_50; +NET "mcb3_dram_we_n" OUT_TERM = UNTUNED_50; +NET "mcb3_dram_dm" OUT_TERM = UNTUNED_50; +NET "mcb3_dram_udm" OUT_TERM = UNTUNED_50; + +############################################################################ +# I/O STANDARDS +############################################################################ +# NET "mcb3_dram_dq[*]" IOSTANDARD = LVCMOS25; +# NET "mcb3_dram_dqs" IOSTANDARD = LVCMOS25; +# NET "mcb3_dram_udqs" IOSTANDARD = LVCMOS25; +# NET "mcb3_rzq" IOSTANDARD = LVCMOS25; +# NET "mcb3_zio" IOSTANDARD = LVCMOS25; +NET "mcb3_dram_dq[*]" IOSTANDARD = SSTL2_II; +NET "mcb3_dram_dqs" IOSTANDARD = SSTL2_II; +NET "mcb3_dram_udqs" IOSTANDARD = SSTL2_II; +NET "mcb3_rzq" IOSTANDARD = SSTL2_II; +NET "mcb3_zio" IOSTANDARD = SSTL2_II; + +NET "mcb3_dram_a[*]" IOSTANDARD = SSTL2_II; +NET "mcb3_dram_ba[*]" IOSTANDARD = SSTL2_II; +NET "mcb3_dram_ck" IOSTANDARD = DIFF_SSTL2_II; +NET "mcb3_dram_ck_n" IOSTANDARD = DIFF_SSTL2_II; +NET "mcb3_dram_cke" IOSTANDARD = SSTL2_II; +NET "mcb3_dram_ras_n" IOSTANDARD = SSTL2_II; +NET "mcb3_dram_cas_n" IOSTANDARD = SSTL2_II; +NET "mcb3_dram_we_n" IOSTANDARD = SSTL2_II; +NET "mcb3_dram_dm" IOSTANDARD = SSTL2_II; +NET "mcb3_dram_udm" IOSTANDARD = SSTL2_II; + + +############################################################################ +# MCB 3 +# Pin Location Constraints for Clock, Masks, Address, and Controls +############################################################################ + +NET "mcb3_dram_dq[4]" LOC = "F2" ; +NET "mcb3_dram_dq[5]" LOC = "F1" ; +NET "mcb3_dram_dq[6]" LOC = "G3" ; +NET "mcb3_dram_dq[7]" LOC = "G1" ; +NET "mcb3_dram_dq[2]" LOC = "J3" ; +NET "mcb3_dram_dq[3]" LOC = "J1" ; +NET "mcb3_dram_dq[0]" LOC = "K2" ; +NET "mcb3_dram_dq[1]" LOC = "K1" ; + +NET "mcb3_dram_dq[8]" LOC = "L3" ; +NET "mcb3_dram_dq[9]" LOC = "L1" ; +NET "mcb3_dram_dq[10]" LOC = "M2" ; +NET "mcb3_dram_dq[11]" LOC = "M1" ; +NET "mcb3_dram_dq[12]" LOC = "P2" ; +NET "mcb3_dram_dq[13]" LOC = "P1" ; +NET "mcb3_dram_dq[14]" LOC = "R2" ; +NET "mcb3_dram_dq[15]" LOC = "R1" ; + +NET "mcb3_dram_dqs" LOC = "H2" ; +NET "mcb3_dram_udqs" LOC = "N3" ; + +NET "mcb3_dram_ba[0]" LOC = "C3" ; +NET "mcb3_dram_ba[1]" LOC = "C2" ; + +NET "mcb3_dram_a[0]" LOC = "K5" ; +NET "mcb3_dram_a[1]" LOC = "K6" ; +NET "mcb3_dram_a[2]" LOC = "D1" ; +NET "mcb3_dram_a[3]" LOC = "L4" ; +NET "mcb3_dram_a[4]" LOC = "G5" ; +NET "mcb3_dram_a[5]" LOC = "H4" ; +NET "mcb3_dram_a[6]" LOC = "H3" ; +NET "mcb3_dram_a[7]" LOC = "D3" ; +NET "mcb3_dram_a[8]" LOC = "B2" ; +NET "mcb3_dram_a[9]" LOC = "A2" ; +NET "mcb3_dram_a[10]" LOC = "G6" ; +NET "mcb3_dram_a[11]" LOC = "E3" ; +NET "mcb3_dram_a[12]" LOC = "F3" ; + +NET "mcb3_dram_dm" LOC = "J4" ; +NET "mcb3_dram_udm" LOC = "K3" ; + +NET "mcb3_dram_ras_n" LOC = "J6" ; +NET "mcb3_dram_cas_n" LOC = "H5" ; +NET "mcb3_dram_we_n" LOC = "C1" ; + +NET "mcb3_dram_ck" LOC = "E2" ; +NET "mcb3_dram_ck_n" LOC = "E1" ; +NET "mcb3_dram_cke" LOC = "F4" ; + +# NC pins +NET "mcb3_rzq" LOC = "M4" ; +NET "mcb3_zio" LOC = "M5" ; + + Index: examples/usb-fpga-1.11/memtest/fpga/clean.sh =================================================================== --- examples/usb-fpga-1.11/memtest/fpga/clean.sh (nonexistent) +++ examples/usb-fpga-1.11/memtest/fpga/clean.sh (revision 4) @@ -0,0 +1,80 @@ +#!/bin/bash + +# This files / directories from this directory will not be removed +# Filenames with spaces or other spuid characters will be ignored +sourcefiles="*.vhd *.ucf *.sh *.ise *.bit *.bin *.xise" +subdirs="ipcore_dir" + + +# This sould not be edited. +list_files() { + if [ "$2" != "" ]; then + echo "$1" + for i in $2; do + echo " $i" + done + fi +} + +rmfiles="" +rmdirs="" +keepfiles="" +keepdirs="" +allfiles=`ls -A` +for f in $allfiles; do + keep=false + for i in $sourcefiles; do + if [ "$i" == "$f" ]; then + keep=true + fi + done + for i in $subdirs; do + if [ "$i" == "$f" ]; then + keep=true + fi + done + if [ -d "$f" ]; then + if $keep; then + keepdirs+=" $f" + else + rmdirs+=" $f" + fi + fi + if [ -f "$f" ]; then + if $keep; then + keepfiles+=" $f" + else + rmfiles+=" $f" + fi + fi +done + +echo +echo "Directory $PWD:" +list_files "This directories will NOT be removed:" "$keepdirs" +list_files "This files will NOT be removed:" "$keepfiles" +list_files "This directories will be removed:" "$rmdirs" +list_files "This files will be removed:" "$rmfiles" + +if [ "$rmfiles" == "" -a "$rmdirs" == "" ]; then + c="yes" +else + echo -n 'Confirm this by entering "yes": ' + read c +fi + +if [ "$c" == "yes" ]; then + [ "$rmfiles" != "" ] && rm $rmfiles + [ "$rmdirs" != "" ] && rm -r $rmdirs + + for d in $subdirs; do + if [ -x "$d/clean.sh" ]; then + cd $d + ./clean.sh || exit 1 + cd .. + fi + done + + exit 0 +fi +exit 1
examples/usb-fpga-1.11/memtest/fpga/clean.sh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: examples/usb-fpga-1.11/memtest/fpga/memtest.ise =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream Index: examples/usb-fpga-1.11/memtest/fpga/memtest.ise =================================================================== --- examples/usb-fpga-1.11/memtest/fpga/memtest.ise (nonexistent) +++ examples/usb-fpga-1.11/memtest/fpga/memtest.ise (revision 4)
examples/usb-fpga-1.11/memtest/fpga/memtest.ise Property changes : Added: svn:mime-type ## -0,0 +1 ## +application/octet-stream \ No newline at end of property Index: examples/usb-fpga-1.11/memtest/fpga/memtest.vhd =================================================================== --- examples/usb-fpga-1.11/memtest/fpga/memtest.vhd (nonexistent) +++ examples/usb-fpga-1.11/memtest/fpga/memtest.vhd (revision 4) @@ -0,0 +1,620 @@ +library ieee; +use IEEE.std_logic_1164.all; +use IEEE.std_logic_arith.all; +use IEEE.std_logic_unsigned.all; + +entity memtest is + port( + FXCLK : in std_logic; + RESET_IN : in std_logic; + IFCLK : in std_logic; + + -- FX2 FIFO + FD : out std_logic_vector(15 downto 0); + + SLOE : out std_logic; + SLRD : out std_logic; + SLWR : out std_logic; + FIFOADR0 : out std_logic; + FIFOADR1 : out std_logic; + PKTEND : out std_logic; + + FLAGB : in std_logic; + PA3 : in std_logic; + + -- errors ... + PC : out std_logic_vector(7 downto 0); + + -- DDR-SDRAM + mcb3_dram_dq : inout std_logic_vector(15 downto 0); + mcb3_rzq : inout std_logic; + mcb3_zio : inout std_logic; + mcb3_dram_udqs : inout std_logic; + mcb3_dram_dqs : inout std_logic; + mcb3_dram_a : out std_logic_vector(12 downto 0); + mcb3_dram_ba : out std_logic_vector(1 downto 0); + mcb3_dram_cke : out std_logic; + mcb3_dram_ras_n : out std_logic; + mcb3_dram_cas_n : out std_logic; + mcb3_dram_we_n : out std_logic; + mcb3_dram_dm : out std_logic; + mcb3_dram_udm : out std_logic; + mcb3_dram_ck : out std_logic; + mcb3_dram_ck_n : out std_logic + ); +end memtest; + +architecture RTL of memtest is + +component dcm0 + port ( + -- Clock in ports + CLK_IN1 : in std_logic; + -- Clock out ports + CLK_OUT1 : out std_logic; + CLK_OUT2 : out std_logic; + -- Status and control signals + RESET : in std_logic; + LOCKED : out std_logic; + CLK_VALID : out std_logic + ); +end component; + +component mem0 + generic ( + C3_P0_MASK_SIZE : integer := 4; + C3_P0_DATA_PORT_SIZE : integer := 32; + C3_P1_MASK_SIZE : integer := 4; + C3_P1_DATA_PORT_SIZE : integer := 32; + C3_MEMCLK_PERIOD : integer := 5000; + C3_INPUT_CLK_TYPE : string := "SINGLE_ENDED"; + C3_RST_ACT_LOW : integer := 0; + C3_CALIB_SOFT_IP : string := "FALSE"; + C3_MEM_ADDR_ORDER : string := "ROW_BANK_COLUMN"; + C3_NUM_DQ_PINS : integer := 16; + C3_MEM_ADDR_WIDTH : integer := 13; + C3_MEM_BANKADDR_WIDTH : integer := 2; + C3_MC_CALIB_BYPASS : string := "NO" + ); + + port ( + mcb3_dram_dq : inout std_logic_vector(C3_NUM_DQ_PINS-1 downto 0); + mcb3_dram_a : out std_logic_vector(C3_MEM_ADDR_WIDTH-1 downto 0); + mcb3_dram_ba : out std_logic_vector(C3_MEM_BANKADDR_WIDTH-1 downto 0); + mcb3_dram_cke : out std_logic; + mcb3_dram_ras_n : out std_logic; + mcb3_dram_cas_n : out std_logic; + mcb3_dram_we_n : out std_logic; + mcb3_dram_dm : out std_logic; + mcb3_dram_udqs : inout std_logic; + mcb3_rzq : inout std_logic; + mcb3_zio : inout std_logic; + mcb3_dram_udm : out std_logic; + mcb3_dram_dqs : inout std_logic; + mcb3_dram_ck : out std_logic; + mcb3_dram_ck_n : out std_logic; + + c3_sys_clk : in std_logic; + c3_sys_rst_n : in std_logic; + + c3_calib_done : out std_logic; + c3_clk0 : out std_logic; + c3_rst0 : out std_logic; + + c3_p0_cmd_clk : in std_logic; + c3_p0_cmd_en : in std_logic; + c3_p0_cmd_instr : in std_logic_vector(2 downto 0); + c3_p0_cmd_bl : in std_logic_vector(5 downto 0); + c3_p0_cmd_byte_addr : in std_logic_vector(29 downto 0); + c3_p0_cmd_empty : out std_logic; + c3_p0_cmd_full : out std_logic; + c3_p0_wr_clk : in std_logic; + c3_p0_wr_en : in std_logic; + c3_p0_wr_mask : in std_logic_vector(C3_P0_MASK_SIZE - 1 downto 0); + c3_p0_wr_data : in std_logic_vector(C3_P0_DATA_PORT_SIZE - 1 downto 0); + c3_p0_wr_full : out std_logic; + c3_p0_wr_empty : out std_logic; + c3_p0_wr_count : out std_logic_vector(6 downto 0); + c3_p0_wr_underrun : out std_logic; + c3_p0_wr_error : out std_logic; + c3_p0_rd_clk : in std_logic; + c3_p0_rd_en : in std_logic; + c3_p0_rd_data : out std_logic_vector(C3_P0_DATA_PORT_SIZE - 1 downto 0); + c3_p0_rd_full : out std_logic; + c3_p0_rd_empty : out std_logic; + c3_p0_rd_count : out std_logic_vector(6 downto 0); + c3_p0_rd_overflow : out std_logic; + c3_p0_rd_error : out std_logic; + + c3_p1_cmd_clk : in std_logic; + c3_p1_cmd_en : in std_logic; + c3_p1_cmd_instr : in std_logic_vector(2 downto 0); + c3_p1_cmd_bl : in std_logic_vector(5 downto 0); + c3_p1_cmd_byte_addr : in std_logic_vector(29 downto 0); + c3_p1_cmd_empty : out std_logic; + c3_p1_cmd_full : out std_logic; + c3_p1_wr_clk : in std_logic; + c3_p1_wr_en : in std_logic; + c3_p1_wr_mask : in std_logic_vector(C3_P1_MASK_SIZE - 1 downto 0); + c3_p1_wr_data : in std_logic_vector(C3_P1_DATA_PORT_SIZE - 1 downto 0); + c3_p1_wr_full : out std_logic; + c3_p1_wr_empty : out std_logic; + c3_p1_wr_count : out std_logic_vector(6 downto 0); + c3_p1_wr_underrun : out std_logic; + c3_p1_wr_error : out std_logic; + c3_p1_rd_clk : in std_logic; + c3_p1_rd_en : in std_logic; + c3_p1_rd_data : out std_logic_vector(C3_P1_DATA_PORT_SIZE - 1 downto 0); + c3_p1_rd_full : out std_logic; + c3_p1_rd_empty : out std_logic; + c3_p1_rd_count : out std_logic_vector(6 downto 0); + c3_p1_rd_overflow : out std_logic; + c3_p1_rd_error : out std_logic; + + c3_p2_cmd_clk : in std_logic; + c3_p2_cmd_en : in std_logic; + c3_p2_cmd_instr : in std_logic_vector(2 downto 0); + c3_p2_cmd_bl : in std_logic_vector(5 downto 0); + c3_p2_cmd_byte_addr : in std_logic_vector(29 downto 0); + c3_p2_cmd_empty : out std_logic; + c3_p2_cmd_full : out std_logic; + c3_p2_wr_clk : in std_logic; + c3_p2_wr_en : in std_logic; + c3_p2_wr_mask : in std_logic_vector(3 downto 0); + c3_p2_wr_data : in std_logic_vector(31 downto 0); + c3_p2_wr_full : out std_logic; + c3_p2_wr_empty : out std_logic; + c3_p2_wr_count : out std_logic_vector(6 downto 0); + c3_p2_wr_underrun : out std_logic; + c3_p2_wr_error : out std_logic; + + c3_p3_cmd_clk : in std_logic; + c3_p3_cmd_en : in std_logic; + c3_p3_cmd_instr : in std_logic_vector(2 downto 0); + c3_p3_cmd_bl : in std_logic_vector(5 downto 0); + c3_p3_cmd_byte_addr : in std_logic_vector(29 downto 0); + c3_p3_cmd_empty : out std_logic; + c3_p3_cmd_full : out std_logic; + c3_p3_rd_clk : in std_logic; + c3_p3_rd_en : in std_logic; + c3_p3_rd_data : out std_logic_vector(31 downto 0); + c3_p3_rd_full : out std_logic; + c3_p3_rd_empty : out std_logic; + c3_p3_rd_count : out std_logic_vector(6 downto 0); + c3_p3_rd_overflow : out std_logic; + c3_p3_rd_error : out std_logic; + + c3_p4_cmd_clk : in std_logic; + c3_p4_cmd_en : in std_logic; + c3_p4_cmd_instr : in std_logic_vector(2 downto 0); + c3_p4_cmd_bl : in std_logic_vector(5 downto 0); + c3_p4_cmd_byte_addr : in std_logic_vector(29 downto 0); + c3_p4_cmd_empty : out std_logic; + c3_p4_cmd_full : out std_logic; + c3_p4_wr_clk : in std_logic; + c3_p4_wr_en : in std_logic; + c3_p4_wr_mask : in std_logic_vector(3 downto 0); + c3_p4_wr_data : in std_logic_vector(31 downto 0); + c3_p4_wr_full : out std_logic; + c3_p4_wr_empty : out std_logic; + c3_p4_wr_count : out std_logic_vector(6 downto 0); + c3_p4_wr_underrun : out std_logic; + c3_p4_wr_error : out std_logic; + + c3_p5_cmd_clk : in std_logic; + c3_p5_cmd_en : in std_logic; + c3_p5_cmd_instr : in std_logic_vector(2 downto 0); + c3_p5_cmd_bl : in std_logic_vector(5 downto 0); + c3_p5_cmd_byte_addr : in std_logic_vector(29 downto 0); + c3_p5_cmd_empty : out std_logic; + c3_p5_cmd_full : out std_logic; + c3_p5_rd_clk : in std_logic; + c3_p5_rd_en : in std_logic; + c3_p5_rd_data : out std_logic_vector(31 downto 0); + c3_p5_rd_full : out std_logic; + c3_p5_rd_empty : out std_logic; + c3_p5_rd_count : out std_logic_vector(6 downto 0); + c3_p5_rd_overflow : out std_logic; + c3_p5_rd_error : out std_logic +); +end component; + +signal CLK : std_logic; +signal RESET0 : std_logic; -- released after dcm0 is ready +signal RESET : std_logic; -- released after MCB is ready + +signal DCM0_LOCKED : std_logic; +signal DCM0_CLK_VALID : std_logic; + +---------------------------- +-- test pattern generator -- +---------------------------- +signal GEN_CNT : std_logic_vector(29 downto 0); +signal GEN_PATTERN : std_logic_vector(29 downto 0); + +signal FIFO_WORD : std_logic; + +----------------------- +-- memory controller -- +----------------------- +signal MEM_CLK : std_logic; +signal C3_CALIB_DONE : std_logic; +signal C3_RST0 : std_logic; + +--------------- +-- DRAM FIFO -- +--------------- +signal WR_CLK : std_logic; +signal WR_CMD_EN : std_logic_vector(2 downto 0); +type WR_CMD_ADDR_ARRAY is array(2 downto 0) of std_logic_vector(29 downto 0); +signal WR_CMD_ADDR : WR_CMD_ADDR_ARRAY; +signal WR_ADDR : std_logic_vector(17 downto 0); -- in 256 bytes burst blocks +signal WR_EN : std_logic_vector(2 downto 0); +signal WR_EN_TMP : std_logic_vector(2 downto 0); +signal WR_DATA : std_logic_vector(31 downto 0); +signal WR_EMPTY : std_logic_vector(2 downto 0); +signal WR_UNDERRUN : std_logic_vector(2 downto 0); +signal WR_ERROR : std_logic_vector(2 downto 0); +type WR_COUNT_ARRAY is array(2 downto 0) of std_logic_vector(6 downto 0); +signal WR_COUNT : WR_COUNT_ARRAY; +signal WR_PORT : std_logic_vector(1 downto 0); + +signal RD_CLK : std_logic; +signal RD_CMD_EN : std_logic_vector(2 downto 0); +type RD_CMD_ADDR_ARRAY is array(2 downto 0) of std_logic_vector(29 downto 0); +signal RD_CMD_ADDR : WR_CMD_ADDR_ARRAY; +signal RD_ADDR : std_logic_vector(17 downto 0); -- in 256 bytes burst blocks +signal RD_EN : std_logic_vector(2 downto 0); +type RD_DATA_ARRAY is array(2 downto 0) of std_logic_vector(31 downto 0); +signal RD_DATA : RD_DATA_ARRAY; +signal RD_EMPTY : std_logic_vector(2 downto 0); +signal RD_OVERFLOW : std_logic_vector(2 downto 0); +signal RD_ERROR : std_logic_vector(2 downto 0); +signal RD_PORT : std_logic_vector(1 downto 0); +type RD_COUNT_ARRAY is array(2 downto 0) of std_logic_vector(6 downto 0); +signal RD_COUNT : RD_COUNT_ARRAY; + +signal FD_TMP : std_logic_vector(15 downto 0); + +signal RD_ADDR2 : std_logic_vector(17 downto 0); -- 256 bytes burst block currently beeing read +signal RD_ADDR2_BAK1 : std_logic_vector(17 downto 0); -- backup for synchronization +signal RD_ADDR2_BAK2 : std_logic_vector(17 downto 0); -- backup for synchronization +signal WR_ADDR2 : std_logic_vector(17 downto 0); -- 256 bytes burst block currently beeing written +signal WR_ADDR2_BAK1 : std_logic_vector(17 downto 0); -- backup for synchronization +signal WR_ADDR2_BAK2 : std_logic_vector(17 downto 0); -- backup for synchronization + +signal RD_STOP : std_logic; + +begin + + inst_dcm0 : dcm0 port map( + -- Clock in ports + CLK_IN1 => FXCLK, + -- Clock out ports + CLK_OUT1 => MEM_CLK, + CLK_OUT2 => CLK, + -- Status and control signals + RESET => RESET_IN, + LOCKED => DCM0_LOCKED, + CLK_VALID => DCM0_CLK_VALID + ); + + inst_mem0 : mem0 port map ( + mcb3_dram_dq => mcb3_dram_dq, + mcb3_dram_a => mcb3_dram_a, + mcb3_dram_ba => mcb3_dram_ba, + mcb3_dram_ras_n => mcb3_dram_ras_n, + mcb3_dram_cas_n => mcb3_dram_cas_n, + mcb3_dram_we_n => mcb3_dram_we_n, + mcb3_dram_cke => mcb3_dram_cke, + mcb3_dram_ck => mcb3_dram_ck, + mcb3_dram_ck_n => mcb3_dram_ck_n, + mcb3_dram_dqs => mcb3_dram_dqs, + mcb3_dram_udqs => mcb3_dram_udqs, -- for X16 parts + mcb3_dram_udm => mcb3_dram_udm, -- for X16 parts + mcb3_dram_dm => mcb3_dram_dm, + mcb3_rzq => mcb3_rzq, + mcb3_zio => mcb3_zio, + + c3_sys_clk => MEM_CLK, + c3_sys_rst_n => RESET0, + + c3_clk0 => open, + c3_rst0 => C3_RST0, + c3_calib_done => C3_CALIB_DONE, + + c3_p0_cmd_clk => WR_CLK, + c3_p0_cmd_en => WR_CMD_EN(0), + c3_p0_cmd_instr => "000", + c3_p0_cmd_bl => ( others => '1' ), + c3_p0_cmd_byte_addr => WR_CMD_ADDR(0), + c3_p0_cmd_empty => open, + c3_p0_cmd_full => open, + c3_p0_wr_clk => WR_CLK, + c3_p0_wr_en => WR_EN(0), + c3_p0_wr_mask => ( others => '0' ), + c3_p0_wr_data => WR_DATA, + c3_p0_wr_full => open, + c3_p0_wr_empty => WR_EMPTY(0), + c3_p0_wr_count => open, + c3_p0_wr_underrun => WR_UNDERRUN(0), + c3_p0_wr_error => WR_ERROR(0), + c3_p0_rd_clk => WR_CLK, + c3_p0_rd_en => '0', + c3_p0_rd_data => open, + c3_p0_rd_full => open, + c3_p0_rd_empty => open, + c3_p0_rd_count => open, + c3_p0_rd_overflow => open, + c3_p0_rd_error => open, + + c3_p2_cmd_clk => WR_CLK, + c3_p2_cmd_en => WR_CMD_EN(1), + c3_p2_cmd_instr => "000", + c3_p2_cmd_bl => ( others => '1' ), + c3_p2_cmd_byte_addr => WR_CMD_ADDR(1), + c3_p2_cmd_empty => open, + c3_p2_cmd_full => open, + c3_p2_wr_clk => WR_CLK, + c3_p2_wr_en => WR_EN(1), + c3_p2_wr_mask => ( others => '0' ), + c3_p2_wr_data => WR_DATA, + c3_p2_wr_full => open, + c3_p2_wr_empty => WR_EMPTY(1), + c3_p2_wr_count => open, + c3_p2_wr_underrun => WR_UNDERRUN(1), + c3_p2_wr_error => WR_ERROR(1), + + c3_p4_cmd_clk => WR_CLK, + c3_p4_cmd_en => WR_CMD_EN(2), + c3_p4_cmd_instr => "000", + c3_p4_cmd_bl => ( others => '1' ), + c3_p4_cmd_byte_addr => WR_CMD_ADDR(2), + c3_p4_cmd_empty => open, + c3_p4_cmd_full => open, + c3_p4_wr_clk => WR_CLK, + c3_p4_wr_en => WR_EN(2), + c3_p4_wr_mask => ( others => '0' ), + c3_p4_wr_data => WR_DATA, + c3_p4_wr_full => open, + c3_p4_wr_empty => WR_EMPTY(2), + c3_p4_wr_count => open, + c3_p4_wr_underrun => WR_UNDERRUN(2), + c3_p4_wr_error => WR_ERROR(2), + + c3_p1_cmd_clk => RD_CLK, + c3_p1_cmd_en => RD_CMD_EN(0), + c3_p1_cmd_instr => "001", + c3_p1_cmd_bl => ( others => '1' ), + c3_p1_cmd_byte_addr => RD_CMD_ADDR(0), + c3_p1_cmd_empty => open, + c3_p1_cmd_full => open, + c3_p1_wr_clk => RD_CLK, + c3_p1_wr_en => '0', + c3_p1_wr_mask => ( others => '0' ), + c3_p1_wr_data => ( others => '0' ), + c3_p1_wr_full => open, + c3_p1_wr_empty => open, + c3_p1_wr_count => open, + c3_p1_wr_underrun => open, + c3_p1_wr_error => open, + c3_p1_rd_clk => RD_CLK, + c3_p1_rd_en => RD_EN(0), + c3_p1_rd_data => RD_DATA(0), + c3_p1_rd_full => open, + c3_p1_rd_empty => RD_EMPTY(0), + c3_p1_rd_count => open, + c3_p1_rd_overflow => RD_OVERFLOW(0), + c3_p1_rd_error => RD_ERROR(0), + + c3_p3_cmd_clk => RD_CLK, + c3_p3_cmd_en => RD_CMD_EN(1), + c3_p3_cmd_instr => "001", + c3_p3_cmd_bl => ( others => '1' ), + c3_p3_cmd_byte_addr => RD_CMD_ADDR(1), + c3_p3_cmd_empty => open, + c3_p3_cmd_full => open, + c3_p3_rd_clk => RD_CLK, + c3_p3_rd_en => RD_EN(1), + c3_p3_rd_data => RD_DATA(1), + c3_p3_rd_full => open, + c3_p3_rd_empty => RD_EMPTY(1), + c3_p3_rd_count => open, + c3_p3_rd_overflow => RD_OVERFLOW(1), + c3_p3_rd_error => RD_ERROR(1), + + c3_p5_cmd_clk => RD_CLK, + c3_p5_cmd_en => RD_CMD_EN(2), + c3_p5_cmd_instr => "001", + c3_p5_cmd_bl => ( others => '1' ), + c3_p5_cmd_byte_addr => RD_CMD_ADDR(2), + c3_p5_cmd_empty => open, + c3_p5_cmd_full => open, + c3_p5_rd_clk => RD_CLK, + c3_p5_rd_en => RD_EN(2), + c3_p5_rd_data => RD_DATA(2), + c3_p5_rd_full => open, + c3_p5_rd_empty => RD_EMPTY(2), + c3_p5_rd_count => open, + c3_p5_rd_overflow => RD_OVERFLOW(2), + c3_p5_rd_error => RD_ERROR(2) +); + + SLOE <= '1'; + SLRD <= '1'; + FIFOADR0 <= '0'; + FIFOADR1 <= '0'; + PKTEND <= '1'; + + WR_CLK <= CLK; + RD_CLK <= IFCLK; + + RESET0 <= RESET_IN or (not DCM0_LOCKED) or (not DCM0_CLK_VALID); + RESET <= RESET0 or (not C3_CALIB_DONE) or C3_RST0; + + PC(0) <= WR_UNDERRUN(0) or WR_UNDERRUN(1) or WR_UNDERRUN(2); + PC(1) <= WR_ERROR(0) or WR_ERROR(1) or WR_ERROR(2); + PC(2) <= RD_OVERFLOW(0) or RD_OVERFLOW(1) or RD_OVERFLOW(2); + PC(3) <= RD_ERROR(0) or RD_ERROR(1) or RD_ERROR(2); + PC(4) <= C3_CALIB_DONE; + PC(5) <= C3_RST0; + PC(6) <= RESET0; + PC(7) <= RESET; + + dpCLK: process (CLK, RESET) + begin +-- reset + if RESET = '1' + then + GEN_CNT <= ( others => '0' ); + GEN_PATTERN <= "100101010101010101010101010101"; + + WR_CMD_EN <= ( others => '0' ); + WR_CMD_ADDR(0) <= ( others => '0' ); + WR_CMD_ADDR(1) <= ( others => '0' ); + WR_CMD_ADDR(2) <= ( others => '0' ); + WR_ADDR <= conv_std_logic_vector(3,18); + WR_EN <= ( others => '0' ); + WR_COUNT(0) <= ( others => '0' ); + WR_COUNT(1) <= ( others => '0' ); + WR_COUNT(2) <= ( others => '0' ); + WR_PORT <= ( others => '0' ); + + WR_ADDR2 <= ( others => '0' ); + RD_ADDR2_BAK1 <= ( others => '0' ); + RD_ADDR2_BAK2 <= ( others => '0' ); + +-- CLK + elsif CLK'event and CLK = '1' + then + WR_CMD_EN <= ( others => '0' ); + WR_EN <= ( others => '0' ); + WR_CMD_ADDR(conv_integer(WR_PORT))(25 downto 8) <= WR_ADDR; + + if ( WR_COUNT(conv_integer(WR_PORT)) = conv_std_logic_vector(64,7) ) + then + -- FF flag = 1 + if ( RD_ADDR2_BAK1 = RD_ADDR2_BAK2 ) and ( RD_ADDR2_BAK2 /= WR_ADDR ) + then + WR_CMD_EN(conv_integer(WR_PORT)) <= '1'; + WR_COUNT(conv_integer(WR_PORT)) <= ( others => '0' ); + if WR_PORT = "10" + then + WR_PORT <= "00"; + else + WR_PORT <= WR_PORT + 1; + end if; + WR_ADDR <= WR_ADDR + 1; + WR_ADDR2 <= WR_ADDR2 + 1; + end if; + elsif ( WR_COUNT(conv_integer(WR_PORT)) = conv_std_logic_vector(0,7)) and (WR_EMPTY(conv_integer(WR_PORT)) = '0' ) -- write port fifo not empty + then + -- FF flag = 1 + else + WR_EN(conv_integer(WR_PORT)) <= '1'; + WR_DATA(31) <= '1'; + WR_DATA(15) <= '0'; + if PA3 = '1' + then + WR_DATA(30 downto 16) <= GEN_PATTERN(29 downto 15); + WR_DATA(14 downto 0) <= GEN_PATTERN(14 downto 0); + else + WR_DATA(30 downto 16) <= GEN_CNT(29 downto 15); + WR_DATA(14 downto 0) <= GEN_CNT(14 downto 0); + end if; + GEN_CNT <= GEN_CNT + 1; + GEN_PATTERN(29) <= GEN_PATTERN(0); + GEN_PATTERN(28 downto 0) <= GEN_PATTERN(29 downto 1); +-- if ( WR_COUNT(conv_integer(WR_PORT)) = conv_std_logic_vector(63,7) ) and ( RD_ADDR2_BAK1 = RD_ADDR2_BAK2 ) and ( RD_ADDR2_BAK2 /= WR_ADDR ) +-- Add code from above here. This saves one clock cylcle and is required for uninterrupred input. +-- then +-- else + WR_COUNT(conv_integer(WR_PORT)) <= WR_COUNT(conv_integer(WR_PORT)) + 1; +-- end if; + end if; + + RD_ADDR2_BAK1 <= RD_ADDR2; + RD_ADDR2_BAK2 <= RD_ADDR2_BAK1; + + end if; + end process dpCLK; + + + dpIFCLK: process (IFCLK, RESET) + begin +-- reset + if RESET = '1' + then + FIFO_WORD <= '0'; + SLWR <= '1'; + + RD_CMD_EN <= ( others => '0' ); + RD_CMD_ADDR(0) <= ( others => '0' ); + RD_CMD_ADDR(1) <= ( others => '0' ); + RD_CMD_ADDR(2) <= ( others => '0' ); + RD_ADDR <= conv_std_logic_vector(3,18); + RD_EN <= ( others => '0' ); + RD_COUNT(0) <= conv_std_logic_vector(64,7); + RD_COUNT(1) <= conv_std_logic_vector(64,7); + RD_COUNT(2) <= conv_std_logic_vector(64,7); + RD_PORT <= ( others => '0' ); + + RD_ADDR2 <= ( others => '0' ); + WR_ADDR2_BAK1 <= ( others => '0' ); + WR_ADDR2_BAK2 <= ( others => '0' ); + + RD_STOP <= '1'; + +-- IFCLK + elsif IFCLK'event and IFCLK = '1' + then + + RD_CMD_EN <= ( others => '0' ); + RD_CMD_ADDR(conv_integer(RD_PORT))(25 downto 8) <= RD_ADDR; + RD_EN(conv_integer(RD_PORT)) <= '0'; + + if FLAGB = '1' + then + if ( RD_EMPTY(conv_integer(RD_PORT)) = '1' ) or ( RD_COUNT(conv_integer(RD_PORT)) = conv_std_logic_vector(64,7) ) + then + SLWR <= '1'; + if ( RD_COUNT(conv_integer(RD_PORT)) = conv_std_logic_vector(64,7) ) and ( RD_EMPTY(conv_integer(RD_PORT)) = '1' ) and ( WR_ADDR2_BAK2 = WR_ADDR2_BAK1 ) and ( WR_ADDR2_BAK2 /= RD_ADDR ) and ( RD_STOP = '0' ) + then + RD_CMD_EN(conv_integer(RD_PORT)) <= '1'; + RD_COUNT(conv_integer(RD_PORT)) <= ( others => '0' ); + if RD_PORT = "10" + then + RD_PORT <= "00"; + else + RD_PORT <= RD_PORT + 1; + end if; + RD_ADDR <= RD_ADDR + 1; + RD_ADDR2 <= RD_ADDR2 + 1; + end if; + else + SLWR <= '0'; + if FIFO_WORD = '0' + then + FD(15 downto 0) <= RD_DATA(conv_integer(RD_PORT))(15 downto 0); + FD_TMP <= RD_DATA(conv_integer(RD_PORT))(31 downto 16); + RD_EN(conv_integer(RD_PORT)) <= '1'; + else + FD(15 downto 0) <= FD_TMP; + RD_COUNT(conv_integer(RD_PORT)) <= RD_COUNT(conv_integer(RD_PORT)) + 1; + end if; + FIFO_WORD <= not FIFO_WORD; + end if; + end if; + + WR_ADDR2_BAK1 <= WR_ADDR2; + WR_ADDR2_BAK2 <= WR_ADDR2_BAK1; + + if ( WR_ADDR2_BAK1 = WR_ADDR2_BAK2 ) and ( WR_ADDR2_BAK2(3) = '1') + then + RD_STOP <= '0'; + end if; + + end if; + end process dpIFCLK; + +end RTL; Index: examples/usb-fpga-1.11/memtest/Readme =================================================================== --- examples/usb-fpga-1.11/memtest/Readme (nonexistent) +++ examples/usb-fpga-1.11/memtest/Readme (revision 4) @@ -0,0 +1,12 @@ +memtest +------- + +This example implements a FIFO using DDR SDRAM. + +The input data is generated by a test pattern generator and is written +continously to the SDRAM FIFO. This FIFO is read out continously and +the data is written to the EZ-USB usinng the slave FIFO interface of the +EZ-USB. The host PC's reads out this data via USB and verifies it. + +Use this example as starting point for high speed (uninterrupted) +data acquisition applications. Index: examples/usb-fpga-1.11/memtest/Makefile =================================================================== --- examples/usb-fpga-1.11/memtest/Makefile (nonexistent) +++ examples/usb-fpga-1.11/memtest/Makefile (revision 4) @@ -0,0 +1,27 @@ +######################### +# configuration section # +######################### + +# Defines the location of the EZ-USB SDK +ZTEXPREFIX=../../.. + +# The name of the jar archive +JARTARGET=MemTest.jar +# Java Classes that have to be build +CLASSTARGETS=MemTest.class +# Extra dependencies for Java Classes +CLASSEXTRADEPS= + +# ihx files (firmware ROM files) that have to be build +IHXTARGETS=memtest.ihx +# Extra Dependencies for ihx files +IHXEXTRADEPS= + +# Extra files that should be included into th jar archive +EXTRAJARFILES=memtest.ihx fpga/memtest.bin + +################################ +# DO NOT CHANAGE THE FOLLOWING # +################################ +# includes the main Makefile +include $(ZTEXPREFIX)/Makefile.mk Index: examples/usb-fpga-1.11/memtest/MemTest.java =================================================================== --- examples/usb-fpga-1.11/memtest/MemTest.java (nonexistent) +++ examples/usb-fpga-1.11/memtest/MemTest.java (revision 4) @@ -0,0 +1,278 @@ +/*! + memtest -- DDR SDRAM FIFO for testing memory on ZTEX USB FPGA Module 1.11 + Copyright (C) 2009-2010 ZTEX e.K. + http://www.ztex.de + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License version 3 as + published by the Free Software Foundation. + + This program is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, see http://www.gnu.org/licenses/. +!*/ + +import java.io.*; +import java.util.*; + +import ch.ntb.usb.*; + +import ztex.*; + +// ***************************************************************************** +// ******* ParameterException ************************************************** +// ***************************************************************************** +// Exception the prints a help message +class ParameterException extends Exception { + public final static String helpMsg = new String ( + "Parameters:\n"+ + " -d Device Number (default: 0)\n" + + " -c Counter test aptttern\n" + + " -f Force uploads\n" + + " -p Print bus info\n" + + " -w Enable certain workarounds\n"+ + " -h This help" ); + + public ParameterException (String msg) { + super( msg + "\n" + helpMsg ); + } +} + +// ***************************************************************************** +// ******* USBReader *********************************************************** +// ***************************************************************************** +class UsbReader extends Thread { + private final int bufNum = 8; + public final int bufSize = 512*1024; + public byte[][] buf = new byte[bufNum][]; + public int[] bufBytes = new int[bufNum]; + private int readCount = -1; + private int getCount = -1; + public boolean terminate = false; + private Ztex1v1 ztex; + + public UsbReader ( Ztex1v1 p_ztex ) { + super (); + ztex = p_ztex; + for (int i=0; i= readCount) { + try { + sleep(1); + } + catch ( InterruptedException e) { + } + } + return getCount % bufNum; + } + + + public void run() { + setPriority(MAX_PRIORITY); + +// claim interface 0 + try { + ztex.trySetConfiguration ( 1 ); + ztex.claimInterface ( 0 ); + } + catch ( Exception e) { + System.out.println("Error: "+e.getLocalizedMessage() ); + System.exit(2); + } + + +// reader loop + while ( !terminate ) { + readCount += 1; + + while ( readCount - bufNum >= getCount ) { + try { + sleep(1); + } + catch ( InterruptedException e) { + } + } + + int i = readCount % bufNum; + bufBytes[i] = LibusbJava.usb_bulk_read(ztex.handle(), 0x82, buf[i], bufSize, 1000); +// System.out.println("Buffer " + i +": read " + bufBytes[i] + " bytes"); + } + +// release interface 0 + ztex.releaseInterface( 0 ); + + } +} + +// ***************************************************************************** +// ******* Test0 *************************************************************** +// ***************************************************************************** +class MemTest extends Ztex1v1 { + +// ******* MemTest ************************************************************** +// constructor + public MemTest ( ZtexDevice1 pDev ) throws UsbException { + super ( pDev ); + } + +// ******* main **************************************************************** + public static void main (String args[]) { + + int devNum = 0; + boolean force = false; + boolean workarounds = false; + boolean genMode = true; + + try { +// init USB stuff + LibusbJava.usb_init(); + +// scan the USB bus + ZtexScanBus1 bus = new ZtexScanBus1( ZtexDevice1.ztexVendorId, ZtexDevice1.ztexProductId, true, false, 1); + if ( bus.numberOfDevices() <= 0) { + System.err.println("No devices found"); + System.exit(0); + } + +// scan the command line arguments + for (int i=0; i=args.length) throw new Exception(); + devNum = Integer.parseInt( args[i] ); + } + catch (Exception e) { + throw new ParameterException("Device number expected after -d"); + } + } + else if ( args[i].equals("-f") ) { + force = true; + } + else if ( args[i].equals("-c") ) { + genMode = false; + } + else if ( args[i].equals("-p") ) { + bus.printBus(System.out); + System.exit(0); + } + else if ( args[i].equals("-p") ) { + bus.printBus(System.out); + System.exit(0); + } + else if ( args[i].equals("-w") ) { + workarounds = true; + } + else if ( args[i].equals("-h") ) { + System.err.println(ParameterException.helpMsg); + System.exit(0); + } + else throw new ParameterException("Invalid Parameter: "+args[i]); + } + + +// create the main class + MemTest ztex = new MemTest ( bus.device(devNum) ); + ztex.certainWorkarounds = workarounds; + +// upload the firmware if necessary + if ( force || ! ztex.valid() || ! ztex.dev().productString().equals("memtest example for UFM 1.11") ) { + System.out.println("Firmware upload time: " + ztex.uploadFirmware( "memtest.ihx", force ) + " ms"); + } + + ztex.vendorCommand (0x60, "Set test pattern", (genMode ? 1 : 0), 0); + +// upload the bitstream if necessary + if ( force || ! ztex.getFpgaConfiguration() ) { + System.out.println("FPGA configuration time: " + ztex.configureFpga( "fpga/memtest.bin" , force ) + " ms"); + } + +// read the traffic + UsbReader reader = new UsbReader( ztex ); + reader.start(); + +// test + int vcurrent = -1; + int prevErrors = 0; + + for (int i=0; i<1921; i++) { + int j = reader.getBuffer(); + int bb = reader.bufBytes[j]; + byte[] b = reader.buf[j]; + int current = vcurrent+1; + int lastwi = 1; + int aerrors = 0; + int ferrors = 0; + int errors = 0; + + for (int k=1; k> 1) | (1 << 29); + else + vcurrent = (vcurrent >> 1); + } + else { + vcurrent += 1; + } + + if ( lastwi == 1 ) { + aerrors+=1; + System.out.println("Alignment error: 1 at " + i + ":" + (k-1) ); + } + else if ( vcurrent != current ) { + if ( (i != 0) && ( k != 3) ) { + System.out.println("Error: 0b" + Integer.toBinaryString(vcurrent) + " expected at " + i + ":" + (k-3) + " but " ); + System.out.println(" 0b" + Integer.toBinaryString(current) + " found"); + errors+=1; + prevErrors+=1; + } + vcurrent = current; + } + else { +// if ( prevErrors > 0 ) System.out.println(" 0b" + Integer.toBinaryString(current) ); + if ( prevErrors == 1 ) + ferrors +=1; + prevErrors = 0; + } + + lastwi = 1; +// System.out.println(current); + } +// System.out.println( (((b[k] & 0x7f) << 8) | (b[k-1] & 0xff)) + " " + Integer.toBinaryString(b[k] & 255) + " " + Integer.toBinaryString(b[k-1] & 255)); + } + System.out.print("Buffer " + i + ": " + (errors-ferrors) + " errors, " + ferrors + " FIFO errors, " + aerrors + " alignment errors \r"); + if ( errors != 0 | aerrors != 0 ) System.out.println(); + } + System.out.println(); + +// stop the reader + reader.terminate=true; + + } + catch (Exception e) { + System.out.println("Error: "+e.getLocalizedMessage() ); + } + } + +} Index: examples/usb-1.0/flashdemo/FlashDemo.java =================================================================== --- examples/usb-1.0/flashdemo/FlashDemo.java (revision 3) +++ examples/usb-1.0/flashdemo/FlashDemo.java (revision 4) @@ -1,6 +1,6 @@ /*! - flashdemo -- Flash memory example - Copyright (C) 2008-2009 ZTEX e.K. + flashdemo -- demo for Flash memory access from firmware and host software for ZTEX USB Module 1.0 + Copyright (C) 2009-2010 ZTEX e.K. http://www.ztex.de This program is free software; you can redistribute it and/or modify @@ -66,7 +66,7 @@ LibusbJava.usb_init(); // scan the USB bus - ZtexScanBus1 bus = new ZtexScanBus1( ZtexDevice1.cypressVendorId, ZtexDevice1.cypressProductId, true, false, 1); + ZtexScanBus1 bus = new ZtexScanBus1( ZtexDevice1.ztexVendorId, ZtexDevice1.ztexProductId, true, false, 1); if ( bus.numberOfDevices() <= 0) { System.err.println("No devices found"); System.exit(0); @@ -108,7 +108,7 @@ ztex.certainWorkarounds = workarounds; // upload the firmware if necessary - if ( force || ! ztex.valid() || ! ztex.dev().productString().equals("Flash demo") ) { + if ( force || ! ztex.valid() || ! ztex.dev().productString().equals("Flash demo for UM 1.0") ) { System.out.println("Firmware upload time: " + ztex.uploadFirmware( "flashdemo.ihx", force ) + " ms"); }
/examples/usb-1.0/flashdemo/flashdemo.c
1,6 → 1,6
/*!
flashdemo -- Flash memory example
Copyright (C) 2008-2009 ZTEX e.K.
flashdemo -- demo for Flash memory access from firmware and host software for ZTEX USB Module 1.0
Copyright (C) 2009-2010 ZTEX e.K.
http://www.ztex.de
 
This program is free software; you can redistribute it and/or modify
19,19 → 19,14
#include[ztex-conf.h] // Loads the configuration macros, see ztex-conf.h for the available macros
#include[ztex-utils.h] // include basic functions and variables
 
// Cypress vendor ID and product ID may only (!) be used for experimental purposes
SET_VPID(0x4b4,0x8613);
 
// select ZTEX USB Module 1.0 as target (required for FLASH support)
// select ZTEX USB Module 1.0 as target
IDENTITY_UM_1_0(10.20.0.0,0);
// uncomment the following line and comment the line above to run this example on ZTEX USB Module 1.2
//IDENTITY_UFM_1_2(10.11.0.0,0);
 
// enable Flash support
ENABLE_FLASH;
 
// this product string is also used for identification of the firmware in FlashDemo.java
#define[PRODUCT_STRING]["Flash demo"]
// this product string is also used for identification by the host software
#define[PRODUCT_STRING]["Flash demo for UM 1.0"]
 
code char flash_string[] = "Hello World!";
 
43,26 → 38,26
xdata DWORD sector;
 
init_USB(); // init everything
 
if ( flash_enabled ) {
flash_read_init( 0 ); // prepare reading sector 0
flash_read(&sector, 4); // read the number of last sector
flash_read((xdata BYTE*) &sector, 4); // read the number of last sector
flash_read_finish(flash_sector_size - 4); // dummy-read the rest of the sector + finish read operation
sector++;
 
sector++;
if ( sector > flash_sectors || sector == 0 ) {
sector = 1;
}
 
flash_write_init( 0 ); // prepare writing sector 0
flash_write(&sector, 4); // write the current sector number
flash_write((xdata BYTE*) &sector, 4); // write the current sector number
flash_write_finish(flash_sector_size - 4); // dummy-write the rest of the sector + finish write operation
 
flash_write_init( sector ); // prepare writing sector sector
flash_write((xdata*) flash_string, sizeof(flash_string)); // write the string
flash_write((xdata BYTE*) flash_string, sizeof(flash_string)); // write the string
flash_write_finish(flash_sector_size - sizeof(flash_string)); // dummy-write the rest of the sector + finish write operation
}
}
 
while (1) { } // twiddle thumbs
}
 
/examples/usb-1.0/flashdemo/flashdemo.sh
1,3 → 1,3
make -C ../../../java distclean all || exit
make distclean all || exit
#make -C ../../../java distclean all || exit
#make distclean all || exit
java -cp FlashDemo.jar FlashDemo $@
/examples/usb-1.0/flashdemo/Makefile
7,15 → 7,17
JARTARGET=FlashDemo.jar
CLASSTARGETS=FlashDemo.class
CLASSEXTRADEPS=
#CLASSEXTRADEPS:=$(shell echo $(ZTEXPREFIX)/java/ztex/*.java)
 
IHXTARGETS=flashdemo.ihx
IHXEXTRADEPS=
#IHXEXTRADEPS:=$(shell echo $(ZTEXPREFIX)/include/*.h)
EXTRAJARFILES=flashdemo.ihx
EXTRADISTCLEANFILES=
 
default: all
 
################################
# DO NOT CHANAGE THE FOLLOWING #
################################
 
include $(ZTEXPREFIX)/Makefile.mk
 
/examples/usb-1.0/flashdemo/Readme
4,13 → 4,13
This example demonstrates how data can be read and written to/from the
Flash memory.
 
During the start-up the firmware (defined in flashdemo.c) reads the number of
last sector n from sector 0 (dword at position 0) and increments it by one. If n
is larger than or equal to the total amount of sectors, or if it is equal to 0,
n is set to 1.
During the start-up the firmware (defined in flashdemo.c) reads the
number of last sector n from sector 0 (dword at position 0) and
increments it by one. If n is larger than or equal to the total amount
of sectors, or if it is equal to 0, n is set to 1.
 
Then n is written back to sector 0 and sector n is filled with the string
"Hello World!".
Then n is written back to sector 0 and sector n is filled with the
string "Hello World!".
 
The host software (defined in FlashDemo.java) reads out the string from the last
sector of the flash memory.
The host software (defined in FlashDemo.java) reads out the string from
the last sector of the flash memory.
/examples/usb-1.0/Makefile
1,4 → 1,4
DIRS=flashdemo
DIRS=flashdemo flashbench
 
.PHONY: default all clean distclean
 
/examples/usb-1.0/flashbench/flashbench.bat
0,0 → 1,2
java -cp FlashBench.jar FlashBench
pause
/examples/usb-1.0/flashbench/flashbench.sh
0,0 → 1,3
#make -C ../../ztex/java distclean all || exit
#make distclean all || exit
java -cp FlashBench.jar FlashBench $@
examples/usb-1.0/flashbench/flashbench.sh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: examples/usb-1.0/flashbench/Makefile =================================================================== --- examples/usb-1.0/flashbench/Makefile (nonexistent) +++ examples/usb-1.0/flashbench/Makefile (revision 4) @@ -0,0 +1,21 @@ +######################### +# configuration section # +######################### + +ZTEXPREFIX=../../.. + +JARTARGET=FlashBench.jar +CLASSTARGETS=FlashBench.class +CLASSEXTRADEPS= +#CLASSEXTRADEPS:=$(shell echo $(ZTEXPREFIX)/java/ztex/*.java) + +IHXTARGETS=flashbench.ihx +IHXEXTRADEPS= +#IHXEXTRADEPS:=$(shell echo $(ZTEXPREFIX)/include/*.h) +EXTRAJARFILES=flashbench.ihx + +################################ +# DO NOT CHANAGE THE FOLLOWING # +################################ + +include $(ZTEXPREFIX)/Makefile.mk Index: examples/usb-1.0/flashbench/FlashBench.java =================================================================== --- examples/usb-1.0/flashbench/FlashBench.java (nonexistent) +++ examples/usb-1.0/flashbench/FlashBench.java (revision 4) @@ -0,0 +1,222 @@ +/*! + flashbench -- Flash memory benchmark for ZTEX USB Module 1.0 + Copyright (C) 2009-2010 ZTEX e.K. + http://www.ztex.de + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License version 3 as + published by the Free Software Foundation. + + This program is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, see http://www.gnu.org/licenses/. +!*/ + +import java.io.*; +import java.util.*; + +import ch.ntb.usb.*; + +import ztex.*; + +// ***************************************************************************** +// ******* ParameterException ************************************************** +// ***************************************************************************** +// Exception the prints a help message +class ParameterException extends Exception { + public final static String helpMsg = new String ( + "Parameters:\n"+ + " -d Device Number (default: 0)\n" + + " -s Number of sectors to be tested, -1 means all (default: 10000)\n" + + " -f Force uploads\n" + + " -p Print bus info\n" + + " -w Enable certain workarounds which may be required for vmware + windows\n"+ + " -h This help" ); + + public ParameterException (String msg) { + super( msg + "\n" + helpMsg ); + } +} + +// ***************************************************************************** +// ******* Test0 *************************************************************** +// ***************************************************************************** +class FlashBench extends Ztex1v1 { + +// ******* FlashBench ********************************************************** +// constructor + public FlashBench ( ZtexDevice1 pDev ) throws UsbException { + super ( pDev ); + } + +// ******* testRW ************************************************************** +// measures read + write performance + public double testRW ( int num ) throws UsbException, InvalidFirmwareException, CapabilityException { + byte[] buf1 = new byte[flashSectorSize()]; + byte[] buf2 = new byte[flashSectorSize()]; + int errors = 0; + + long t0 = new Date().getTime(); + + for ( int i=0; i=args.length) throw new Exception(); + devNum = Integer.parseInt( args[i] ); + } + catch (Exception e) { + throw new ParameterException("Device number expected after -d"); + } + } + if ( args[i].equals("-s") ) { + i++; + try { + if (i>=args.length) throw new Exception(); + sectors = Integer.parseInt( args[i] ); + } + catch (Exception e) { + throw new ParameterException("Number of sectors expected after -s"); + } + } + else if ( args[i].equals("-f") ) { + force = true; + } + else if ( args[i].equals("-p") ) { + bus.printBus(System.out); + System.exit(0); + } + else if ( args[i].equals("-p") ) { + bus.printBus(System.out); + System.exit(0); + } + else if ( args[i].equals("-w") ) { + workarounds = true; + } + else if ( args[i].equals("-h") ) { + System.err.println(ParameterException.helpMsg); + System.exit(0); + } + else throw new ParameterException("Invalid Parameter: "+args[i]); + } + + +// create the main class + FlashBench ztex = new FlashBench ( bus.device(devNum) ); + ztex.certainWorkarounds = workarounds; + +// upload the firmware if necessary + if ( force || ! ztex.valid() || ! ztex.dev().productString().equals("flashbench for UM 1.0") ) { + System.out.println("Firmware upload time: " + ztex.uploadFirmware( "flashbench.ihx", force ) + " ms"); + } + +// print some information + System.out.println("Capabilities: " + ztex.capabilityInfo(", ")); + System.out.println("Enabled: " + ztex.flashEnabled()); + System.out.println("Size: " + ztex.flashSize()+" Bytes"); +// ztex.printMmcState(); + + if ( sectors<1 || sectors>ztex.flashSectors() ) sectors = ztex.flashSectors(); + + System.out.println("Read + Write Performance: " + ztex.testRW(sectors) + "kb/s \n"); + int seed = (int) Math.round(65535*Math.random()); + System.out.println("Write Performance: " + ztex.testW(sectors, seed) + "kb/s "); + System.out.println("Read Performance: " + ztex.testR(sectors, seed) + "kb/s \n"); + } + catch (Exception e) { + System.out.println("Error: "+e.getLocalizedMessage() ); + } + } + +} Index: examples/usb-1.0/flashbench/Readme =================================================================== --- examples/usb-1.0/flashbench/Readme (nonexistent) +++ examples/usb-1.0/flashbench/Readme (revision 4) @@ -0,0 +1,18 @@ +flashbench +---------- + +A write / read benchmark for Flash memory on ZTEX modules. + +ATTENTION: The tests will destroy the data stored in Flash memory. + +The number of sectors to be tested can be specified using the +-s parameter of the host software. + +Three tests are performed: +1. Read/write test: Pseudo-random test data is written and immediately + read and compared (i.e. write sector 0, read sector 0, write sector + 1, read sector 1, ...) +2. Write test: Pseudo-random test data is written (i.e. write sector 0, + write sector 1, ...) +3. Write test: Pseudo-random test data is read and compared (i.e. read + sector 0, read sector 1, ...) Index: examples/usb-1.0/flashbench/flashbench.c =================================================================== --- examples/usb-1.0/flashbench/flashbench.c (nonexistent) +++ examples/usb-1.0/flashbench/flashbench.c (revision 4) @@ -0,0 +1,40 @@ +/*! + flashbench -- Flash memory benchmark for ZTEX USB Module 1.0 + Copyright (C) 2009-2010 ZTEX e.K. + http://www.ztex.de + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License version 3 as + published by the Free Software Foundation. + + This program is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, see http://www.gnu.org/licenses/. +!*/ + +#include[ztex-conf.h] // Loads the configuration macros, see ztex-conf.h for the available macros +#include[ztex-utils.h] // include basic functions and variables + +// select ZTEX USB Module 1.0 as target +IDENTITY_UM_1_0(10.20.0.0,0); + +// this product string is also used for identification by the host software +#define[PRODUCT_STRING]["flashbench for UM 1.0"] + +// enable Flash support +ENABLE_FLASH; + +// include the main part of the firmware kit, define the descriptors, ... +#include[ztex.h] + +void main(void) +{ + init_USB(); // init everything ... + + while (1) { } // ... and twiddle thumbs +} + Index: examples/all/ucecho/c/ucecho.sh =================================================================== --- examples/all/ucecho/c/ucecho.sh (nonexistent) +++ examples/all/ucecho/c/ucecho.sh (revision 4) @@ -0,0 +1,9 @@ +if [ "$1" != "" ]; then + if [ ! -f "$1" ]; then + echo "Usage: ./ucecho.sh []" + exit 1 + fi + ../../../../java/FWLoader -c -uu $1 +fi + +./UCEcho
examples/all/ucecho/c/ucecho.sh Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: examples/all/ucecho/c/UCEcho.c =================================================================== --- examples/all/ucecho/c/UCEcho.c (nonexistent) +++ examples/all/ucecho/c/UCEcho.c (revision 4) @@ -0,0 +1,102 @@ +/*! + UCEcho -- C host software for ucecho examples + Copyright (C) 2009-2010 ZTEX e.K. + http://www.ztex.de + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License version 3 as + published by the Free Software Foundation. + + This program is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, see http://www.gnu.org/licenses/. +!*/ +#include +#include +#include +#include + +#define BUFSIZE 256 + +struct usb_device *device; +usb_dev_handle *handle; +char buf[BUFSIZE]; + +// find the first ucecho device +struct usb_device *find_device () +{ + struct usb_bus *bus_search; + struct usb_device *device_search; + + bus_search = usb_busses; + while (bus_search != NULL) + { + device_search = bus_search->devices; + while (device_search != NULL) + { + if ( (device_search->descriptor.idVendor == 0x221a) && (device_search->descriptor.idProduct == 0x100) ) + { + handle = usb_open(device_search); + usb_get_string_simple(handle, device_search->descriptor.iProduct, buf, BUFSIZE); + if ( ! strncmp("ucecho", buf , 6 ) ) + return device_search; + usb_close(handle); + } + device_search = device_search->next; + } + bus_search = bus_search->next; + } + + return NULL; +} + +// main +int main(int argc, char *argv[]) +{ + usb_init(); // initializing libusb + usb_find_busses(); // ... finding busses + usb_find_devices(); // ... and devices + + device = find_device(); // find the device (hopefully the correct one) + + if ( device == NULL ) { // nothing found + fprintf(stderr, "Cannot find ucecho device\n"); + return 1; + } + + if (usb_claim_interface(handle, 0) < 0) { + fprintf(stderr, "Error claiming interface 0: %s\n", usb_strerror()); + return 1; + } + + while ( strcmp("QUIT", buf) ) { + // read string from stdin + printf("Enter a string or `quit' to exit the program: "); + scanf("%s", buf); + + // write string to ucecho device + int i = usb_bulk_write(handle, 0x04, buf, strlen(buf)+1, 1000); + if ( i < 0 ) { + fprintf(stderr, "Error sending data: %s\n", usb_strerror()); + return 1; + } + printf("Send %d bytes: `%s'\n", i , buf); + + // read string back from ucecho device + i = usb_bulk_read(handle, 0x82, buf, BUFSIZE, 1000); + if ( i < 0 ) { + fprintf(stderr, "Error readin data: %s\n", usb_strerror()); + return 1; + } + printf("Read %d bytes: `%s'\n", i , buf); + + } + + usb_release_interface(handle, 0); + usb_close(handle); + return 0; +} Index: examples/all/ucecho/c/Readme =================================================================== --- examples/all/ucecho/c/Readme (nonexistent) +++ examples/all/ucecho/c/Readme (revision 4) @@ -0,0 +1,11 @@ +C host software for ucecho examples +----------------------------------- + +This example demonstrates how EZ-USB devices can be accessed using C and +the libusb library. + +The example works with all ucecho examples. User strings are send via +Endpoint 4 to the device, converted uppercase and are read back via +Endpoint 2. + +See Readme's of the certain ucecho examples for further details. Index: examples/all/ucecho/c/Makefile =================================================================== --- examples/all/ucecho/c/Makefile (nonexistent) +++ examples/all/ucecho/c/Makefile (revision 4) @@ -0,0 +1,12 @@ +GCC=gcc -pipe -g + +all: UCEcho + +UCEcho: UCEcho.c + $(GCC) UCEcho.c -lusb -o UCEcho + +clean: + rm -f *.o *.old *.bak *~ + +distclean: + rm -f UCEcho Index: examples/all/ucecho/UCEcho.java =================================================================== --- examples/all/ucecho/UCEcho.java (revision 3) +++ examples/all/ucecho/UCEcho.java (revision 4) @@ -1,6 +1,6 @@ /*! - ucecho -- example for ZTEX USB FPGA Module 1.2 - Copyright (C) 2008-2009 ZTEX e.K. + ucecho -- uppercase conversion example for all EZ-USB devices + Copyright (C) 2009-2010 ZTEX e.K. http://www.ztex.de This program is free software; you can redistribute it and/or modify @@ -52,21 +52,6 @@ super ( pDev ); } -// ******* claimInterface ****************************************************** -// claims interface 0 - public void claimInterface ( ) throws UsbException{ - if ( LibusbJava.usb_set_configuration(handle(), 1) < 0 ) - throw new UsbException("Setting configuration to 1 failed: " + LibusbJava.usb_strerror()); - if ( LibusbJava.usb_claim_interface(handle(), 0) < 0 ) - throw new UsbException("Claiming interface 0 failed: " + LibusbJava.usb_strerror()); - } - -// ******* releaseInterface **************************************************** -// releases interface 0 - public void releaseInterface ( ) { - LibusbJava.usb_release_interface(handle(), 0); - } - // ******* echo **************************************************************** // writes a string to Endpoint 4, reads it back from Endpoint 2 and writes the output to System.out public void echo ( String input ) throws UsbException { @@ -101,7 +86,7 @@ LibusbJava.usb_init(); // scan the USB bus - ZtexScanBus1 bus = new ZtexScanBus1( ZtexDevice1.cypressVendorId, ZtexDevice1.cypressProductId, true, false, 1); + ZtexScanBus1 bus = new ZtexScanBus1( ZtexDevice1.ztexVendorId, ZtexDevice1.ztexProductId, true, false, 1); if ( bus.numberOfDevices() <= 0) { System.err.println("No devices found"); System.exit(0); @@ -151,7 +136,8 @@ } // claim interface 0 - ztex.claimInterface(); + ztex.trySetConfiguration ( 1 ); + ztex.claimInterface ( 0 ); // read string from stdin and write it to USB device String str = ""; @@ -165,7 +151,7 @@ } // release interface 0 - ztex.releaseInterface(); + ztex.releaseInterface(0); } catch (Exception e) {
/examples/all/ucecho/ucecho.c
1,6 → 1,6
/*!
ucecho -- example for ZTEX USB FPGA Module 1.2
Copyright (C) 2008-2009 ZTEX e.K.
ucecho -- uppercase conversion example for all EZ-USB devices
Copyright (C) 2009-2010 ZTEX e.K.
http://www.ztex.de
 
This program is free software; you can redistribute it and/or modify
19,14 → 19,11
#include[ztex-conf.h] // Loads the configuration macros, see ztex-conf.h for the available macros
#include[ztex-utils.h] // include basic functions
 
// Cypress vendor ID and product ID may only (!) be used for experimental purposes
SET_VPID(0x4b4,0x8613);
 
// define endpoints 2 and 4, both belong to interface 0 (in/out are from the point of view of the host)
EP_CONFIG(2,0,BULK,IN,512,2);
EP_CONFIG(4,0,BULK,OUT,512,2);
 
// give them a nice name
// this product string is also used for identification by the host software
#define[PRODUCT_STRING]["ucecho for EZ-USB devices"]
 
// include the main part of the firmware kit, define the descriptors, ...
/examples/all/Makefile
1,4 → 1,4
DIRS=ucecho
DIRS=ucecho ucecho/c
 
.PHONY: default all clean distclean
 
/examples/Makefile
1,4 → 1,4
DIRS=all usb-fpga-1.2 usb-1.0
DIRS=all usb-fpga-1.2 usb-1.0 usb-fpga-1.11
 
.PHONY: default all clean distclean
 

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