Rev 5 → Rev 6
/trunk/hw/ft232h_fifos_interface.sv
0,0 → 1,137
module ft232h_fifos_interface ( |
reset_i, |
|
// FT232H |
usb_clk_i, |
usb_data_io, |
usb_rxf_n_i, |
usb_txe_n_i, |
usb_rd_n_o, |
usb_wr_n_o, |
usb_oe_n_o, |
|
// RX FIFO |
rxf_wrclk_o, |
rxf_wrfull_i, |
rxf_wrreq_o, |
rxf_wrdata_o, |
|
// TX FIFO |
txf_rdclk_o, |
txf_rdempty_i, |
txf_rdreq_o, |
txf_rddata_i |
); |
|
|
parameter READ_LATENCY = 1; |
parameter WRITE_LATENCY = 1; |
|
|
input logic reset_i; |
|
input logic usb_clk_i; |
inout logic [7:0] usb_data_io; |
input logic usb_rxf_n_i; |
input logic usb_txe_n_i; |
output logic usb_rd_n_o; |
output logic usb_wr_n_o; |
output logic usb_oe_n_o; |
|
output logic rxf_wrclk_o; |
input logic rxf_wrfull_i; |
output logic rxf_wrreq_o; |
output logic [7:0] rxf_wrdata_o; |
|
output logic txf_rdclk_o; |
input logic txf_rdempty_i; |
output logic txf_rdreq_o; |
input logic [7:0] txf_rddata_i; |
|
|
|
logic [7:0] usb_data_in; |
logic [7:0] usb_data_out; |
|
logic rx_ready; |
logic receiving; |
logic receive; |
|
logic tx_ready; |
logic sending; |
logic send; |
|
|
|
assign usb_data_io = usb_oe_n_o ? usb_data_out : {8{1'bZ}}; |
assign usb_data_in = usb_data_io; |
|
|
|
ft232h_receiver rx_inst ( |
.reset_i (reset_i), |
.ready_o (rx_ready), |
.receive_i (receive), |
.receiving_o (receiving), |
// USB |
.usb_clk_i (usb_clk_i), |
.usb_rxf_n_i (usb_rxf_n_i), |
.usb_rd_n_o (usb_rd_n_o), |
.usb_oe_n_o (usb_oe_n_o), |
.usb_data_i (usb_data_in), |
// FIFO |
.fifo_wrfull_i (rxf_wrfull_i), |
.fifo_wrclk_o (rxf_wrclk_o), |
.fifo_wrreq_o (rxf_wrreq_o), |
.fifo_data_o (rxf_wrdata_o) |
); |
defparam |
rx_inst.LATENCY = READ_LATENCY; |
|
|
|
ft232h_transmitter tx_inst ( |
.reset_i (reset_i), |
.ready_o (tx_ready), |
.transmit_i (send), |
.sending_o (sending), |
// FT232H |
.usb_clk_i (usb_clk_i), |
.usb_txe_n_i (usb_txe_n_i), |
.usb_wr_n_o (usb_wr_n_o), |
.usb_data_o (usb_data_out), |
// FIFO |
.fifo_rdclk_o (txf_rdclk_o), |
.fifo_rdempty_i (txf_rdempty_i), |
.fifo_rdreq_o (txf_rdreq_o), |
.fifo_rddata_i (txf_rddata_i) |
); |
defparam |
tx_inst.LATENCY = WRITE_LATENCY; |
|
|
|
always_ff @(posedge usb_clk_i or posedge reset_i) |
begin |
if (reset_i) |
begin |
send <= 1'b0; |
receive <= 1'b0; |
end |
else |
begin |
if (tx_ready & ~receiving & ~(receive & rx_ready)) |
begin |
send <= 1'b1; |
receive <= 1'b0; |
end |
else if (rx_ready & ~sending) |
begin |
send <= 1'b0; |
receive <= 1'b1; |
end |
end |
end |
|
|
endmodule |
trunk/hw/ft232h_fifos_interface.sv
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/hw/ft232h_receiver.sv
===================================================================
--- trunk/hw/ft232h_receiver.sv (nonexistent)
+++ trunk/hw/ft232h_receiver.sv (revision 6)
@@ -0,0 +1,104 @@
+module ft232h_receiver (
+ reset_i,
+ ready_o,
+ receive_i,
+ receiving_o,
+
+ // USB
+ usb_clk_i,
+ usb_rxf_n_i,
+ usb_rd_n_o,
+ usb_oe_n_o,
+
+ usb_data_i,
+
+ // FIFO
+ fifo_wrfull_i,
+ fifo_wrclk_o,
+ fifo_wrreq_o,
+ fifo_data_o
+);
+
+
+parameter LATENCY = 1;
+
+
+input logic reset_i;
+output logic ready_o;
+input logic receive_i;
+output logic receiving_o;
+
+input logic usb_clk_i;
+input logic usb_rxf_n_i;
+output logic usb_rd_n_o;
+output logic usb_oe_n_o;
+
+input logic [7:0] usb_data_i;
+
+input logic fifo_wrfull_i;
+output logic fifo_wrclk_o;
+output logic fifo_wrreq_o;
+output logic [7:0] fifo_data_o;
+
+
+
+logic fifo_wrfull_reg;
+logic usb_datavalid;
+logic pipeline_ready;
+
+
+
+assign fifo_wrclk_o = ~usb_clk_i;
+assign ready_o = pipeline_ready & ~usb_rxf_n_i;
+assign receiving_o = ~usb_oe_n_o | ~usb_rd_n_o;
+
+assign usb_datavalid = ~usb_rd_n_o & ~usb_rxf_n_i;
+
+
+
+pipeline pipe_inst (
+ .clk_i (usb_clk_i),
+ .reset_i (reset_i),
+ // data source side
+ .valid_i (usb_datavalid),
+ .data_i (usb_data_i),
+ .ready_o (pipeline_ready),
+ // data destination side
+ .ready_i (~fifo_wrfull_reg),
+ .valid_o (fifo_wrreq_o),
+ .data_o (fifo_data_o)
+ );
+ defparam
+ pipe_inst.LATENCY = LATENCY;
+
+
+
+always_ff @(posedge usb_clk_i)
+begin
+ fifo_wrfull_reg <= fifo_wrfull_i;
+end
+
+
+always_ff @(posedge usb_clk_i or posedge reset_i)
+begin
+ if (reset_i)
+ begin
+ end
+ else
+ begin
+ if (receive_i & ready_o & ~fifo_wrfull_i)
+ begin
+ usb_oe_n_o <= 1'b0;
+ if (~usb_oe_n_o)
+ usb_rd_n_o <= 1'b0;
+ end
+ else
+ begin
+ usb_oe_n_o <= 1'b1;
+ usb_rd_n_o <= 1'b1;
+ end
+ end
+end
+
+
+endmodule
trunk/hw/ft232h_receiver.sv
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/hw/ft232h_transmitter.sv
===================================================================
--- trunk/hw/ft232h_transmitter.sv (nonexistent)
+++ trunk/hw/ft232h_transmitter.sv (revision 6)
@@ -0,0 +1,120 @@
+module ft232h_transmitter (
+ reset_i,
+ ready_o,
+ transmit_i,
+ sending_o,
+
+ // FT232H
+ usb_clk_i,
+ usb_txe_n_i,
+ usb_wr_n_o,
+
+ usb_data_o,
+
+ // FIFO
+ fifo_rdclk_o,
+ fifo_rdempty_i,
+ fifo_rdreq_o,
+ fifo_rddata_i
+);
+
+
+parameter LATENCY = 1;
+
+
+input logic reset_i;
+output logic ready_o;
+input logic transmit_i;
+output logic sending_o;
+
+input logic usb_clk_i;
+input logic usb_txe_n_i;
+output logic usb_wr_n_o;
+
+output logic [7:0] usb_data_o;
+
+output logic fifo_rdclk_o;
+input logic fifo_rdempty_i;
+output logic fifo_rdreq_o;
+input logic [7:0] fifo_rddata_i;
+
+
+
+logic dest_ready;
+logic fifo_datavalid;
+reg fifo_datavalid_reg;
+logic pipeline_ready;
+logic usb_datavalid;
+logic usb_txe_n_reg;
+
+
+
+
+assign fifo_rdclk_o = usb_clk_i;
+assign dest_ready = transmit_i & ~usb_txe_n_i & ~usb_txe_n_reg;
+assign ready_o = ~usb_txe_n_i & (~fifo_rdempty_i | fifo_datavalid_reg);
+assign sending_o = fifo_rdreq_o | ~usb_wr_n_o;
+assign usb_wr_n_o = ~(usb_datavalid & dest_ready);
+
+assign fifo_datavalid = dest_ready ? fifo_datavalid_reg : 1'b0;
+
+
+
+pipeline pipe_inst (
+ .clk_i (usb_clk_i),
+ .reset_i (reset_i),
+ // data source side
+ .valid_i (fifo_datavalid),
+ .data_i (fifo_rddata_i),
+ .ready_o (pipeline_ready),
+ // data destination side
+ .ready_i (dest_ready),
+ .valid_o (usb_datavalid),
+ .data_o (usb_data_o)
+ );
+ defparam
+ pipe_inst.LATENCY = LATENCY;
+
+
+
+
+always_ff @(posedge usb_clk_i)
+begin
+ usb_txe_n_reg <= usb_txe_n_i;
+end
+
+
+always_ff @(negedge fifo_rdclk_o or posedge reset_i)
+begin
+ if (reset_i)
+ begin
+ fifo_rdreq_o <= 1'b0;
+ end
+ else
+ begin
+ if (transmit_i & ~fifo_rdempty_i & pipeline_ready)
+ fifo_rdreq_o <= 1'b1;
+ else
+ fifo_rdreq_o <= 1'b0;
+ end
+end
+
+always_ff @(posedge fifo_rdclk_o or posedge reset_i)
+begin
+ if (reset_i)
+ begin
+ fifo_datavalid_reg <= 1'b0;
+ end
+ else
+ begin
+ if (pipeline_ready)
+ begin
+ if (fifo_rdreq_o)
+ fifo_datavalid_reg <= 1'b1;
+ else
+ fifo_datavalid_reg <= 1'b0;
+ end
+ end
+end
+
+endmodule
trunk/hw/ft232h_transmitter.sv
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/hw/pipeline.sv
===================================================================
--- trunk/hw/pipeline.sv (nonexistent)
+++ trunk/hw/pipeline.sv (revision 6)
@@ -0,0 +1,137 @@
+module pipeline_step (
+ clk_i,
+ reset_i,
+
+ // data source side
+ valid_i,
+ data_i,
+ ready_o,
+
+ // data destination side
+ ready_i,
+ valid_o,
+ data_o
+);
+
+
+parameter DATA_WIDTH = 8;
+
+
+input wire clk_i;
+input wire reset_i;
+
+input wire valid_i;
+input wire [DATA_WIDTH-1:0] data_i;
+output wire ready_o;
+
+input wire ready_i;
+output logic valid_o;
+output reg [DATA_WIDTH-1:0] data_o;
+
+
+
+reg valid_reg;
+
+
+
+assign ready_o = ready_i;
+assign valid_o = ready_i ? valid_reg : 1'b0;
+
+
+
+always_ff @(posedge clk_i or posedge reset_i)
+begin
+ if (reset_i)
+ begin
+ valid_reg <= 1'b0;
+ data_o <= '0;
+ end
+ else
+ begin
+ if (ready_i)
+ begin
+ valid_reg <= valid_i;
+ data_o <= data_i;
+ end
+ end
+end
+
+
+endmodule
+
+
+module pipeline (
+ clk_i,
+ reset_i,
+
+ // data source side
+ valid_i,
+ data_i,
+ ready_o,
+
+ // data destination side
+ ready_i,
+ valid_o,
+ data_o
+);
+
+
+parameter DATA_WIDTH = 8;
+parameter LATENCY = 1;
+
+
+localparam COUNT = LATENCY + 1;
+
+
+input wire clk_i;
+input wire reset_i;
+
+input wire valid_i;
+input wire [DATA_WIDTH-1:0] data_i;
+output wire ready_o;
+
+input wire ready_i;
+output logic valid_o;
+output reg [DATA_WIDTH-1:0] data_o;
+
+
+
+logic pl_ready [COUNT];
+logic pl_valid [COUNT];
+logic [DATA_WIDTH-1:0] pl_data [COUNT];
+
+
+
+assign ready_o = pl_ready[0];
+assign pl_valid[0] = valid_i;
+assign pl_data[0] = data_i;
+
+assign pl_ready[COUNT-1] = ready_i;
+assign valid_o = pl_valid[COUNT-1];
+assign data_o = pl_data[COUNT-1];
+
+
+genvar i;
+generate
+for ( i = 1; i < COUNT; i = i + 1 )
+begin: pipeline_generate
+ pipeline_step pl_step(
+ .clk_i (clk_i),
+ .reset_i (reset_i),
+
+ .valid_i (pl_valid[i-1]),
+ .data_i (pl_data[i-1]),
+ .ready_o (pl_ready[i-1]),
+
+ .ready_i (pl_ready[i]),
+ .valid_o (pl_valid[i]),
+ .data_o (pl_data[i])
+ );
+ defparam
+ pl_step.DATA_WIDTH = DATA_WIDTH;
+end
+endgenerate
+
+
+endmodule
+
trunk/hw/pipeline.sv
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/hw/usb_fifos_avalon_mm_interface.sv
===================================================================
--- trunk/hw/usb_fifos_avalon_mm_interface.sv (nonexistent)
+++ trunk/hw/usb_fifos_avalon_mm_interface.sv (revision 6)
@@ -0,0 +1,369 @@
+module usb_fifos_avalon_mm_interface(
+ reset_i,
+ clk_i,
+
+ // Avalon-MM
+ address_i,
+ read_i,
+ readdata_o,
+ readdatavalid_o,
+ write_i,
+ writedata_i,
+ waitrequest_o,
+
+ // RX FIFO
+ rxf_rdclk_o,
+ rxf_rdempty_i,
+ rxf_rdfull_i,
+ rxf_rdreq_o,
+ rxf_rddata_i,
+ rxf_rdusedw_i,
+
+ // TX FIFO
+ txf_wrclk_o,
+ txf_wrfull_i,
+ txf_wrreq_o,
+ txf_wrdata_o,
+ txf_wrusedw_i
+);
+
+
+parameter RX_FIFO_WIDTHU = 9;
+parameter TX_FIFO_WIDTHU = 9;
+parameter CMD_LATENCY = 1;
+parameter READ_LATENCY = 1;
+parameter WRITE_LATENCY = 1;
+
+
+localparam WRDATA_ADDR = 3'd0;
+localparam RDDATA_ADDR = 3'd1;
+localparam TXSTATUSL_ADDR = 3'd2;
+localparam TXSTATUSH_ADDR = 3'd3;
+localparam RXSTATUSL_ADDR = 3'd4;
+localparam RXSTATUSH_ADDR = 3'd5;
+
+
+
+input logic reset_i;
+input logic clk_i;
+ // Avalon-MM
+input logic [2:0] address_i;
+input logic read_i;
+output logic [7:0] readdata_o;
+output logic readdatavalid_o;
+input logic write_i;
+input logic [7:0] writedata_i;
+output logic waitrequest_o;
+ // RX FIFO
+output logic rxf_rdclk_o;
+input logic rxf_rdempty_i;
+input logic rxf_rdfull_i;
+output logic rxf_rdreq_o;
+input logic [7:0] rxf_rddata_i;
+input logic [RX_FIFO_WIDTHU-1:0] rxf_rdusedw_i;
+ // TX FIFO
+output logic txf_wrclk_o;
+input logic txf_wrfull_i;
+output logic txf_wrreq_o;
+output logic [7:0] txf_wrdata_o;
+input logic [TX_FIFO_WIDTHU-1:0] txf_wrusedw_i;
+
+
+
+
+logic [15:0] txstatus;
+logic [15:0] rxstatus;
+
+
+logic read_ready;
+logic read_waitrequest;
+
+logic read_pipe;
+logic [2:0] address_pipe;
+
+logic [7:0] read_data;
+logic read_datavalid;
+
+logic rxf_rdreq_reg;
+
+logic [5:0] address_decode;
+logic [5:0] address_decode_pipe;
+
+logic ad_en;
+logic ad_clken;
+logic ad_en_reg;
+logic [3:0] ad_status;
+
+logic ad_rdata;
+logic ad_rxsl;
+logic ad_rxsh;
+logic ad_txsl;
+logic ad_txsh;
+
+
+
+
+assign rxf_rdclk_o = clk_i;
+
+
+// READ
+assign read_ready = ~rxf_rdempty_i;
+assign read_waitrequest = ad_rdata & ~read_ready;
+
+assign ad_en = read_pipe | read_waitrequest;
+assign ad_clken = (ad_en | ad_en_reg) & ~read_waitrequest;
+
+assign ad_rdata = address_decode_pipe[1];
+assign ad_rxsl = ad_status[2];
+assign ad_rxsh = ad_status[3];
+assign ad_txsl = ad_status[0];
+assign ad_txsh = ad_status[1];
+
+
+
+
+pipeline cmd_pipe_inst (
+ .clk_i (clk_i),
+ .reset_i (reset_i),
+ // data source side
+ .valid_i (1'b1),
+ .data_i (read_i),
+ .ready_o (),
+ // data destination side
+ .ready_i (~read_waitrequest),
+ .valid_o (),
+ .data_o (read_pipe)
+ );
+ defparam
+ cmd_pipe_inst.LATENCY = CMD_LATENCY,
+ cmd_pipe_inst.DATA_WIDTH = 1;
+
+
+pipeline addr_pipe_inst (
+ .clk_i (clk_i),
+ .reset_i (reset_i),
+ // data source side
+ .valid_i (1'b1),
+ .data_i (address_i),
+ .ready_o (),
+ // data destination side
+ .ready_i (~read_waitrequest),
+ .valid_o (),
+ .data_o (address_pipe)
+ );
+ defparam
+ addr_pipe_inst.LATENCY = CMD_LATENCY,
+ addr_pipe_inst.DATA_WIDTH = 3;
+
+
+pipeline read_pipe_inst (
+ .clk_i (clk_i),
+ .reset_i (reset_i),
+ // data source side
+ .valid_i (read_datavalid),
+ .data_i (read_data),
+ .ready_o (),
+ // data destination side
+ .ready_i (1'b1),
+ .valid_o (readdatavalid_o),
+ .data_o (readdata_o)
+ );
+ defparam
+ read_pipe_inst.LATENCY = READ_LATENCY;
+
+
+lpm_decode LPM_DECODE_component (
+ .clock (clk_i),
+ .data (address_pipe),
+ .eq (address_decode),
+ .aclr (),
+ .clken (ad_clken),
+ .enable (ad_en)
+ );
+ defparam
+ LPM_DECODE_component.lpm_decodes = 6,
+ LPM_DECODE_component.lpm_pipeline = 1,
+ LPM_DECODE_component.lpm_type = "LPM_DECODE",
+ LPM_DECODE_component.lpm_width = 3;
+
+
+
+
+always_ff @(posedge clk_i)
+begin
+ txstatus[15] <= ~txf_wrfull_i; //can write
+ txstatus[14:TX_FIFO_WIDTHU+1] <= 0;
+ txstatus[TX_FIFO_WIDTHU] <= txf_wrfull_i;
+ txstatus[TX_FIFO_WIDTHU-1:0] <= ( txf_wrfull_i ? {TX_FIFO_WIDTHU{1'b0}} : txf_wrusedw_i );
+
+ rxstatus[15] <= ~rxf_rdempty_i; //can read
+ rxstatus[14:RX_FIFO_WIDTHU+1] <= 0;
+ rxstatus[RX_FIFO_WIDTHU] <= rxf_rdfull_i;
+ rxstatus[RX_FIFO_WIDTHU-1:0] <= ( rxf_rdempty_i ? {RX_FIFO_WIDTHU{1'b0}} : rxf_rdusedw_i );
+end
+
+
+
+/* READ */
+always_ff @(posedge clk_i)
+begin
+ if (~read_waitrequest)
+ address_decode_pipe <= address_decode;
+
+ ad_en_reg <= ad_en;
+
+ ad_status <= address_decode_pipe[5:2];
+end
+
+
+always_ff @(posedge clk_i)
+begin
+ if (rxf_rdreq_reg)
+ begin
+ read_data <= rxf_rddata_i;
+ read_datavalid <= 1;
+ end
+ else if (ad_rxsl)
+ begin
+ read_data <= rxstatus[7:0];
+ read_datavalid <= 1;
+ end
+ else if (ad_rxsh)
+ begin
+ read_data <= rxstatus[15:8];
+ read_datavalid <= 1;
+ end
+ else if (ad_txsl)
+ begin
+ read_data <= txstatus[7:0];
+ read_datavalid <= 1;
+ end
+ else if (ad_txsh)
+ begin
+ read_data <= txstatus[15:8];
+ read_datavalid <= 1;
+ end
+ else
+ begin
+ read_data <= 0;
+ read_datavalid <= 0;
+ end
+end
+
+
+always_ff @(negedge rxf_rdclk_o or posedge reset_i)
+begin
+ if (reset_i)
+ begin
+ rxf_rdreq_o <= 1'b0;
+ end
+ else
+ begin
+ if (ad_rdata & ~rxf_rdempty_i)
+ rxf_rdreq_o <= 1'b1;
+ else
+ rxf_rdreq_o <= 1'b0;
+ end
+end
+
+
+always_ff @(posedge clk_i)
+begin
+ rxf_rdreq_reg <= rxf_rdreq_o;
+end
+/*==========================================*/
+
+
+
+
+/* ----=== WRITE ===---- */
+
+logic write_reg;
+logic write_data_request;
+logic write_ready;
+logic [7:0] write_data;
+logic write_datavalid;
+logic write_waitrequest;
+
+logic txf_wrfull_reg;
+
+logic [2:0] write_data_addr = WRDATA_ADDR;
+
+
+
+assign txf_wrclk_o = ~clk_i;
+
+assign write_ready = ~txf_wrfull_reg;
+assign write_datavalid = write_reg & write_data_request & write_ready;
+assign write_waitrequest = ~write_ready;
+
+
+
+lpm_compare LPM_COMPARE_component (
+ .clken (1'b1),
+ .clock (clk_i),
+ .dataa (address_i),
+ .datab (write_data_addr),
+ .aeb (write_data_request),
+ .aclr (reset_i),
+ .agb (),
+ .ageb (),
+ .alb (),
+ .aleb (),
+ .aneb ());
+ defparam
+ LPM_COMPARE_component.lpm_hint = "ONE_INPUT_IS_CONSTANT=YES",
+ LPM_COMPARE_component.lpm_pipeline = 1,
+ LPM_COMPARE_component.lpm_representation = "UNSIGNED",
+ LPM_COMPARE_component.lpm_type = "LPM_COMPARE",
+ LPM_COMPARE_component.lpm_width = 3;
+
+
+pipeline write_pipe_inst (
+ .clk_i (clk_i),
+ .reset_i (reset_i),
+ // data source side
+ .valid_i (write_datavalid),
+ .data_i (write_data),
+ .ready_o (),
+ // data destination side
+ .ready_i (write_ready),
+ .valid_o (txf_wrreq_o),
+ .data_o (txf_wrdata_o)
+ );
+ defparam
+ write_pipe_inst.LATENCY = WRITE_LATENCY;
+
+
+
+
+always_ff @(posedge clk_i)
+begin
+ txf_wrfull_reg <= txf_wrfull_i;
+end
+
+
+always_ff @(posedge clk_i or posedge reset_i)
+begin
+ if (reset_i)
+ begin
+ write_data <= '0;
+ write_reg <= 1'b0;
+ end
+ else
+ begin
+ if (write_i & write_ready)
+ write_data <= writedata_i;
+
+ if (~write_waitrequest)
+ write_reg <= write_i;
+ end
+end
+/*==========================================*/
+
+
+
+assign waitrequest_o = (read_waitrequest & read_i) | (write_i & write_waitrequest);
+
+
+endmodule
trunk/hw/usb_fifos_avalon_mm_interface.sv
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/hw/usb_ft232h.sv
===================================================================
--- trunk/hw/usb_ft232h.sv (revision 5)
+++ trunk/hw/usb_ft232h.sv (revision 6)
@@ -1,52 +1,60 @@
-/*
- * ЕÑли error Ñрабатывает на поÑледнем байте пакета, то он не будет отправлен, пока
- * не придет Ñледующий пакет
+/*!
+ * \brief UsB FT232H core module
+ * \version 1.8
*/
module usb_ft232h (
- //Avalon-MM Slave
- clk_i,
- reset_i,
- address_i,
- read_i,
- readdata_o,
- write_i,
- writedata_i,
+ clk_i,
+ reset_i,
+
+ //Avalon-MM Slave
+ address_i,
+ read_i,
+ readdata_o,
+ readdatavalid_o,
+ write_i,
+ writedata_i,
+ waitrequest_o,
- //FT232H
- usb_clk_i,
- usb_data_io,
- usb_rxf_n_i,
- usb_txe_n_i,
- usb_rd_n_o,
- usb_wr_n_o,
- usb_oe_n_o
+ //FT232H
+ usb_clk_i,
+ usb_data_io,
+ usb_rxf_n_i,
+ usb_txe_n_i,
+ usb_rd_n_o,
+ usb_wr_n_o,
+ usb_oe_n_o
);
-parameter TX_FIFO_DEPTH = 512;
-parameter TX_FIFO_WIDTHU = 9;
-parameter RX_FIFO_DEPTH = 512;
-parameter RX_FIFO_WIDTHU = 9;
-localparam WRDATA_ADDR = 4'd0;
-localparam RDDATA_ADDR = 4'd1;
-localparam TXSTATUSL_ADDR = 4'd2;
-localparam TXSTATUSH_ADDR = 4'd3;
-localparam RXSTATUSL_ADDR = 4'd4;
-localparam RXSTATUSH_ADDR = 4'd5;
+parameter TX_FIFO_NUMWORDS = 512;
+parameter TX_FIFO_WIDTHU = 9;
+parameter RX_FIFO_NUMWORDS = 512;
+parameter RX_FIFO_WIDTHU = 9;
+parameter FIFOS_DELAYPIPE = 11;
+parameter USB_READ_LATENCY = 1;
+parameter USB_WRITE_LATENCY = 1;
+parameter AVALON_CMD_LATENCY = 1;
+parameter AVALON_READ_LATENCY = 1;
+parameter AVALON_WRITE_LATENCY = 1;
+
+
+
input logic clk_i;
input logic reset_i;
-input logic [3:0] address_i;
+input logic [2:0] address_i;
input logic read_i;
output logic [7:0] readdata_o;
+output logic readdatavalid_o;
input logic write_i;
input logic [7:0] writedata_i;
+output logic waitrequest_o;
input logic usb_clk_i;
-inout logic [7:0] usb_data_io;
+inout wire [7:0] usb_data_io;
input logic usb_rxf_n_i;
input logic usb_txe_n_i;
output logic usb_rd_n_o;
@@ -55,27 +63,12 @@
-reg error;
-reg rxerror;
-reg [7:0] rxerrdata;
-logic [15:0] txstatus;
-logic [15:0] rxstatus;
-
-reg read_pipe;
-reg read_pipe2;
-
-reg adr_data;
-reg adr_txsl;
-reg adr_txsh;
-reg adr_rxsl;
-reg adr_rxsh;
-
-
logic [7:0] txf_wrdata;
logic txf_wrclk;
logic txf_wrreq;
logic txf_wrfull;
logic [TX_FIFO_WIDTHU-1:0] txf_wrusedw;
+
logic txf_rdclk;
logic txf_rdreq;
logic [7:0] txf_rddata;
@@ -85,6 +78,7 @@
logic rxf_wrclk;
logic rxf_wrreq;
logic rxf_wrfull;
+
logic [RX_FIFO_WIDTHU-1:0] rxf_rdusedw;
logic rxf_rdclk;
logic rxf_rdreq;
@@ -93,330 +87,129 @@
logic rxf_rdfull;
-assign usb_data_io = ( usb_oe_n_o ) ? ( txf_rddata ) : ( {8{1'bZ}} );
-assign rxf_wrclk = ~usb_clk_i;
-assign txf_rdclk = usb_clk_i;
-assign rxf_rdclk = clk_i;
-assign txf_wrclk = ~clk_i;
-assign txstatus[15] = ~txf_wrfull; //can write
-assign txstatus[14:TX_FIFO_WIDTHU+1] = 0;
-assign txstatus[TX_FIFO_WIDTHU] = txf_wrfull;
-assign txstatus[TX_FIFO_WIDTHU-1:0] = ( txf_wrfull ? {TX_FIFO_WIDTHU{1'b0}} : txf_wrusedw );
+ft232h_fifos_interface ffi (
+ .reset_i (reset_i),
+ // FT232H
+ .usb_clk_i (usb_clk_i),
+ .usb_data_io (usb_data_io),
+ .usb_rxf_n_i (usb_rxf_n_i),
+ .usb_txe_n_i (usb_txe_n_i),
+ .usb_rd_n_o (usb_rd_n_o),
+ .usb_wr_n_o (usb_wr_n_o),
+ .usb_oe_n_o (usb_oe_n_o),
+ // RX FIFO
+ .rxf_wrclk_o (rxf_wrclk),
+ .rxf_wrfull_i (rxf_wrfull),
+ .rxf_wrreq_o (rxf_wrreq),
+ .rxf_wrdata_o (rxf_wrdata),
+ // TX FIFO
+ .txf_rdclk_o (txf_rdclk),
+ .txf_rdempty_i (txf_rdempty),
+ .txf_rdreq_o (txf_rdreq),
+ .txf_rddata_i (txf_rddata)
+ );
+ defparam
+ ffi.READ_LATENCY = USB_READ_LATENCY,
+ ffi.WRITE_LATENCY = USB_WRITE_LATENCY;
-assign rxstatus[15] = ~rxf_rdempty; //can read
-assign rxstatus[14:RX_FIFO_WIDTHU+1] = 0;
-assign rxstatus[RX_FIFO_WIDTHU] = rxf_rdfull;
-assign rxstatus[RX_FIFO_WIDTHU-1:0] = ( rxf_rdempty ? {RX_FIFO_WIDTHU{1'b0}} : rxf_rdusedw );
-dcfifo txfifo (
- .aclr ( reset_i ),
- .data ( txf_wrdata ),
- .rdclk ( txf_rdclk ),
- .rdreq ( txf_rdreq ),
- .wrclk ( txf_wrclk ),
- .wrreq ( txf_wrreq ),
- .q ( txf_rddata ),
- .rdempty ( txf_rdempty ),
- .wrfull ( txf_wrfull ),
- .wrusedw ( txf_wrusedw ),
- .eccstatus (),
- .rdfull (),
- .rdusedw (),
- .wrempty ());
- defparam
- txfifo.intended_device_family = "Cyclone IV E",
- txfifo.lpm_numwords = TX_FIFO_DEPTH,
- txfifo.lpm_showahead = "OFF",
- txfifo.lpm_type = "dcfifo",
- txfifo.lpm_width = 8,
- txfifo.lpm_widthu = TX_FIFO_WIDTHU,
- txfifo.overflow_checking = "ON",
- txfifo.rdsync_delaypipe = 11,
- txfifo.read_aclr_synch = "ON",
- txfifo.underflow_checking = "ON",
- txfifo.use_eab = "ON",
- txfifo.write_aclr_synch = "ON",
- txfifo.wrsync_delaypipe = 11;
+dcfifo txfifo (
+ .aclr ( reset_i ),
+ .data ( txf_wrdata ),
+ .rdclk ( txf_rdclk ),
+ .rdreq ( txf_rdreq ),
+ .wrclk ( txf_wrclk ),
+ .wrreq ( txf_wrreq ),
+ .q ( txf_rddata ),
+ .rdempty ( txf_rdempty ),
+ .wrfull ( txf_wrfull ),
+ .wrusedw ( txf_wrusedw ),
+ .eccstatus (),
+ .rdfull (),
+ .rdusedw (),
+ .wrempty ());
+ defparam
+ txfifo.intended_device_family = "Cyclone IV E",
+ txfifo.lpm_numwords = TX_FIFO_NUMWORDS,
+ txfifo.lpm_showahead = "OFF",
+ txfifo.lpm_type = "dcfifo",
+ txfifo.lpm_width = 8,
+ txfifo.lpm_widthu = TX_FIFO_WIDTHU,
+ txfifo.overflow_checking = "ON",
+ txfifo.rdsync_delaypipe = FIFOS_DELAYPIPE,
+ txfifo.read_aclr_synch = "ON",
+ txfifo.underflow_checking = "ON",
+ txfifo.use_eab = "ON",
+ txfifo.write_aclr_synch = "ON",
+ txfifo.wrsync_delaypipe = FIFOS_DELAYPIPE;
-
-dcfifo rxfifo (
- .aclr ( reset_i ),
- .data ( rxf_wrdata ),
- .rdclk ( rxf_rdclk ),
- .rdreq ( rxf_rdreq ),
- .wrclk ( rxf_wrclk ),
- .wrreq ( rxf_wrreq ),
- .q ( rxf_rddata ),
- .rdempty ( rxf_rdempty ),
- .wrfull ( rxf_wrfull ),
- .wrusedw (),
- .eccstatus (),
- .rdfull ( rxf_rdfull ),
- .rdusedw ( rxf_rdusedw ),
- .wrempty ());
- defparam
- rxfifo.intended_device_family = "Cyclone IV E",
- rxfifo.lpm_numwords = RX_FIFO_DEPTH,
- rxfifo.lpm_showahead = "OFF",
- rxfifo.lpm_type = "dcfifo",
- rxfifo.lpm_width = 8,
- rxfifo.lpm_widthu = RX_FIFO_WIDTHU,
- rxfifo.overflow_checking = "ON",
- rxfifo.rdsync_delaypipe = 11,
- rxfifo.read_aclr_synch = "ON",
- rxfifo.underflow_checking = "ON",
- rxfifo.use_eab = "ON",
- rxfifo.write_aclr_synch = "ON",
- rxfifo.wrsync_delaypipe = 11;
-
+dcfifo rxfifo (
+ .aclr ( reset_i ),
+ .data ( rxf_wrdata ),
+ .rdclk ( rxf_rdclk ),
+ .rdreq ( rxf_rdreq ),
+ .wrclk ( rxf_wrclk ),
+ .wrreq ( rxf_wrreq ),
+ .q ( rxf_rddata ),
+ .rdempty ( rxf_rdempty ),
+ .wrfull ( rxf_wrfull ),
+ .wrusedw (),
+ .eccstatus (),
+ .rdfull ( rxf_rdfull ),
+ .rdusedw ( rxf_rdusedw ),
+ .wrempty ());
+ defparam
+ rxfifo.intended_device_family = "Cyclone IV E",
+ rxfifo.lpm_numwords = RX_FIFO_NUMWORDS,
+ rxfifo.lpm_showahead = "OFF",
+ rxfifo.lpm_type = "dcfifo",
+ rxfifo.lpm_width = 8,
+ rxfifo.lpm_widthu = RX_FIFO_WIDTHU,
+ rxfifo.overflow_checking = "ON",
+ rxfifo.rdsync_delaypipe = FIFOS_DELAYPIPE,
+ rxfifo.read_aclr_synch = "ON",
+ rxfifo.underflow_checking = "ON",
+ rxfifo.use_eab = "ON",
+ rxfifo.write_aclr_synch = "ON",
+ rxfifo.wrsync_delaypipe = FIFOS_DELAYPIPE;
-/* read usb data to rx fifo */
-always_ff @( negedge rxf_wrclk or posedge reset_i )
-begin
- if( reset_i )
- begin
- rxf_wrreq <= 1'b0;
- rxf_wrdata <= 8'b0;
- rxerror <= 1'b0;
- rxerrdata <= 8'b0;
- end
- else
- begin
- if( ~usb_rd_n_o & rxf_wrfull )
- begin
- rxerror <= 1'b1;
- rxerrdata <= usb_data_io;
- end
-
- if( ~rxf_wrfull & ((~usb_rd_n_o & ~usb_rxf_n_i) | rxerror) )
- begin
- rxf_wrreq <= 1'b1;
- if( rxerror )
- begin
- rxerror <= 1'b0;
- rxf_wrdata <= rxerrdata;
- end
- else
- rxf_wrdata <= usb_data_io;
- end
- else
- begin
- rxf_wrreq <= 1'b0;
- end
- end
-end
-always_ff @( posedge usb_clk_i or posedge reset_i )
-begin
- if( reset_i )
- begin
- usb_oe_n_o <= 1'b1;
- usb_rd_n_o <= 1'b1;
- end
- else
- begin
- if( ~usb_rxf_n_i & ~rxf_wrfull & ( usb_txe_n_i | ( ~txf_rdreq & ~error )) & ~rxerror )
- begin
- usb_oe_n_o <= 1'b0;
- if( ~usb_oe_n_o )
- usb_rd_n_o <= 1'b0;
- end
- else
- begin
- usb_oe_n_o <= 1'b1;
- usb_rd_n_o <= 1'b1;
- end
- end
-end
-/*---------------------------------*/
-/* write tx fifo data to usb */
-always_ff @( negedge txf_rdclk or posedge reset_i )
-begin
- if( reset_i )
- begin
- txf_rdreq <= 1'b0;
- end
- else
- begin
- if( ~usb_txe_n_i & ~txf_rdempty & ~error & usb_oe_n_o )
- begin
- txf_rdreq <= 1'b1;
- end
- else
- txf_rdreq <= 1'b0;
- end
-end
-always_ff @( posedge usb_clk_i or posedge reset_i )
-begin
- if( reset_i )
- begin
- usb_wr_n_o <= 1'b1;
- error <= 1'b0;
- end
- else
- begin
- if( usb_txe_n_i & ~usb_wr_n_o )
- begin
- error <= 1'b1;
- end
-
- if( ~usb_txe_n_i & ( txf_rdreq | error ) & usb_oe_n_o )
- begin
- usb_wr_n_o <= 1'b0;
- if( error )
- error <= 1'b0;
- end
- else
- begin
- usb_wr_n_o <= 1'b1;
- end
- end
-end
-/*-----------------------------*/
+usb_fifos_avalon_mm_interface ufai (
+ .reset_i (reset_i),
+ .clk_i (clk_i),
+ // Avalon-MM
+ .address_i (address_i),
+ .read_i (read_i),
+ .readdata_o (readdata_o),
+ .readdatavalid_o (readdatavalid_o),
+ .write_i (write_i),
+ .writedata_i (writedata_i),
+ .waitrequest_o (waitrequest_o),
+ // RX FIFO
+ .rxf_rdclk_o (rxf_rdclk),
+ .rxf_rdempty_i (rxf_rdempty),
+ .rxf_rdfull_i (rxf_rdfull),
+ .rxf_rdreq_o (rxf_rdreq),
+ .rxf_rddata_i (rxf_rddata),
+ .rxf_rdusedw_i (rxf_rdusedw),
+ // TX FIFO
+ .txf_wrclk_o (txf_wrclk),
+ .txf_wrfull_i (txf_wrfull),
+ .txf_wrreq_o (txf_wrreq),
+ .txf_wrdata_o (txf_wrdata),
+ .txf_wrusedw_i (txf_wrusedw)
+ );
+ defparam
+ ufai.TX_FIFO_WIDTHU = TX_FIFO_WIDTHU,
+ ufai.RX_FIFO_WIDTHU = RX_FIFO_WIDTHU,
+ ufai.CMD_LATENCY = AVALON_CMD_LATENCY,
+ ufai.READ_LATENCY = AVALON_READ_LATENCY,
+ ufai.WRITE_LATENCY = AVALON_WRITE_LATENCY;
-/* avalon data to tx fifo*/
-always_ff @( negedge txf_wrclk or posedge reset_i )
-begin
- if( reset_i )
- begin
- txf_wrreq <= 1'b0;
- txf_wrdata <= 8'b0;
- end
- else
- begin
- if( write_i & ( address_i == WRDATA_ADDR ) & ~txf_wrfull )
- begin
- txf_wrreq <= 1'b1;
- txf_wrdata <= writedata_i;
- end
- else
- begin
- txf_wrreq <= 1'b0;
- end
- end
-end
-/*------------------------------------*/
-
-/* rx fifo data to avalon */
-always_ff @( posedge clk_i or posedge reset_i )
-begin
- if( reset_i )
- begin
- adr_data <= 1'b0;
- adr_txsl <= 1'b0;
- adr_txsh <= 1'b0;
- adr_rxsl <= 1'b0;
- adr_rxsh <= 1'b0;
- end
- else
- begin
- if( read_i )
- begin
- if( address_i == RDDATA_ADDR )
- adr_data <= 1'b1;
- else
- adr_data <= 1'b0;
-
- if( address_i == TXSTATUSL_ADDR )
- adr_txsl <= 1'b1;
- else
- adr_txsl <= 1'b0;
-
- if( address_i == TXSTATUSH_ADDR )
- adr_txsh <= 1'b1;
- else
- adr_txsh <= 1'b0;
-
- if( address_i == RXSTATUSL_ADDR )
- adr_rxsl <= 1'b1;
- else
- adr_rxsl <= 1'b0;
-
- if( address_i == RXSTATUSH_ADDR )
- adr_rxsh <= 1'b1;
- else
- adr_rxsh <= 1'b0;
- end
- end
-end
-
-always_ff @( posedge clk_i or posedge reset_i )
-begin
- if( reset_i )
- begin
- read_pipe <= 1'b0;
- end
- else
- begin
- if( read_i )
- read_pipe <= 1'b1;
- else
- read_pipe <= 1'b0;
- end
-end
-
-always_ff @( negedge rxf_rdclk or posedge reset_i )
-begin
- if( reset_i )
- begin
- rxf_rdreq <= 1'b0;
- end
- else
- begin
- if( read_pipe & adr_data & ~rxf_rdempty )
- rxf_rdreq <= 1'b1;
- else
- rxf_rdreq <= 1'b0;
- end
-end
-
-always_ff @( posedge clk_i or posedge reset_i )
-begin
- if( reset_i )
- begin
- read_pipe2 <= 1'b0;
- end
- else
- begin
- if( read_pipe )
- read_pipe2 <= 1'b1;
- else
- read_pipe2 <= 1'b0;
- end
-end
-
-always_ff @( posedge clk_i or posedge reset_i )
-begin
- if( reset_i )
- begin
- readdata_o <= 8'b0;
- end
- else
- begin
- if( read_pipe2 )
- begin
- if( adr_data )
- readdata_o <= rxf_rddata;
- else if( adr_txsl )
- readdata_o <= txstatus[7:0];
- else if( adr_txsh )
- readdata_o <= txstatus[15:8];
- else if( adr_rxsl )
- readdata_o <= rxstatus[7:0];
- else if( adr_rxsh )
- readdata_o <= rxstatus[15:8];
- else
- readdata_o <= 8'b0;
- end
- end
-end
-/*------------------------------------*/
-
-
endmodule
/trunk/hw/usb_ft232h_hw.tcl
1,11 → 1,11
# TCL File Generated by Component Editor 16.0 |
# Wed Dec 07 11:31:54 BRT 2016 |
# Thu Apr 06 17:15:58 FET 2017 |
# DO NOT MODIFY |
|
|
# |
# usb_ft232h "USB FT232H" v1.3 |
# Dmitry Elmanov 2016.12.07.11:31:54 |
# usb_ft232h "USB FT232H" v1.8 |
# Dmitry Elmanov 2017.04.06.17:15:58 |
# |
# |
|
20,7 → 20,7
# |
set_module_property DESCRIPTION "" |
set_module_property NAME usb_ft232h |
set_module_property VERSION 1.3 |
set_module_property VERSION 1.8 |
set_module_property INTERNAL false |
set_module_property OPAQUE_ADDRESS_MAP true |
set_module_property GROUP USB |
46,39 → 46,98
# |
# parameters |
# |
add_parameter TX_FIFO_DEPTH INTEGER 512 |
set_parameter_property TX_FIFO_DEPTH DEFAULT_VALUE 512 |
set_parameter_property TX_FIFO_DEPTH DISPLAY_NAME TX_FIFO_DEPTH |
set_parameter_property TX_FIFO_DEPTH TYPE INTEGER |
set_parameter_property TX_FIFO_DEPTH UNITS None |
set_parameter_property TX_FIFO_DEPTH ALLOWED_RANGES -2147483648:2147483647 |
set_parameter_property TX_FIFO_DEPTH HDL_PARAMETER true |
add_parameter TX_FIFO_NUMWORDS INTEGER 512 "Size of tx FIFO" |
set_parameter_property TX_FIFO_NUMWORDS DEFAULT_VALUE 512 |
set_parameter_property TX_FIFO_NUMWORDS DISPLAY_NAME "Transmit buffer size" |
set_parameter_property TX_FIFO_NUMWORDS TYPE INTEGER |
set_parameter_property TX_FIFO_NUMWORDS UNITS None |
set_parameter_property TX_FIFO_NUMWORDS ALLOWED_RANGES -2147483648:2147483647 |
set_parameter_property TX_FIFO_NUMWORDS DESCRIPTION "Size of tx FIFO" |
set_parameter_property TX_FIFO_NUMWORDS HDL_PARAMETER true |
add_parameter TX_FIFO_WIDTHU INTEGER 9 |
set_parameter_property TX_FIFO_WIDTHU DEFAULT_VALUE 9 |
set_parameter_property TX_FIFO_WIDTHU DISPLAY_NAME TX_FIFO_WIDTHU |
set_parameter_property TX_FIFO_WIDTHU DISPLAY_NAME "Transmit buffer size width" |
set_parameter_property TX_FIFO_WIDTHU TYPE INTEGER |
set_parameter_property TX_FIFO_WIDTHU UNITS None |
set_parameter_property TX_FIFO_WIDTHU ALLOWED_RANGES -2147483648:2147483647 |
set_parameter_property TX_FIFO_WIDTHU HDL_PARAMETER true |
add_parameter RX_FIFO_DEPTH INTEGER 512 |
set_parameter_property RX_FIFO_DEPTH DEFAULT_VALUE 512 |
set_parameter_property RX_FIFO_DEPTH DISPLAY_NAME RX_FIFO_DEPTH |
set_parameter_property RX_FIFO_DEPTH TYPE INTEGER |
set_parameter_property RX_FIFO_DEPTH UNITS None |
set_parameter_property RX_FIFO_DEPTH ALLOWED_RANGES -2147483648:2147483647 |
set_parameter_property RX_FIFO_DEPTH HDL_PARAMETER true |
add_parameter RX_FIFO_NUMWORDS INTEGER 512 |
set_parameter_property RX_FIFO_NUMWORDS DEFAULT_VALUE 512 |
set_parameter_property RX_FIFO_NUMWORDS DISPLAY_NAME "Receive buffer size" |
set_parameter_property RX_FIFO_NUMWORDS TYPE INTEGER |
set_parameter_property RX_FIFO_NUMWORDS UNITS None |
set_parameter_property RX_FIFO_NUMWORDS ALLOWED_RANGES -2147483648:2147483647 |
set_parameter_property RX_FIFO_NUMWORDS HDL_PARAMETER true |
add_parameter RX_FIFO_WIDTHU INTEGER 9 |
set_parameter_property RX_FIFO_WIDTHU DEFAULT_VALUE 9 |
set_parameter_property RX_FIFO_WIDTHU DISPLAY_NAME RX_FIFO_WIDTHU |
set_parameter_property RX_FIFO_WIDTHU DISPLAY_NAME "Receive buffer size width" |
set_parameter_property RX_FIFO_WIDTHU TYPE INTEGER |
set_parameter_property RX_FIFO_WIDTHU UNITS None |
set_parameter_property RX_FIFO_WIDTHU ALLOWED_RANGES -2147483648:2147483647 |
set_parameter_property RX_FIFO_WIDTHU HDL_PARAMETER true |
add_parameter FIFOS_DELAYPIPE INTEGER 11 "" |
set_parameter_property FIFOS_DELAYPIPE DEFAULT_VALUE 11 |
set_parameter_property FIFOS_DELAYPIPE DISPLAY_NAME "FIFO's delaypipe" |
set_parameter_property FIFOS_DELAYPIPE WIDTH "" |
set_parameter_property FIFOS_DELAYPIPE TYPE INTEGER |
set_parameter_property FIFOS_DELAYPIPE UNITS None |
set_parameter_property FIFOS_DELAYPIPE ALLOWED_RANGES -2147483648:2147483647 |
set_parameter_property FIFOS_DELAYPIPE DESCRIPTION "" |
set_parameter_property FIFOS_DELAYPIPE HDL_PARAMETER true |
add_parameter USB_READ_LATENCY INTEGER 1 |
set_parameter_property USB_READ_LATENCY DEFAULT_VALUE 1 |
set_parameter_property USB_READ_LATENCY DISPLAY_NAME "USB read delaypipe" |
set_parameter_property USB_READ_LATENCY TYPE INTEGER |
set_parameter_property USB_READ_LATENCY UNITS None |
set_parameter_property USB_READ_LATENCY ALLOWED_RANGES -2147483648:2147483647 |
set_parameter_property USB_READ_LATENCY HDL_PARAMETER true |
add_parameter USB_WRITE_LATENCY INTEGER 1 |
set_parameter_property USB_WRITE_LATENCY DEFAULT_VALUE 1 |
set_parameter_property USB_WRITE_LATENCY DISPLAY_NAME "USB write delaypipe" |
set_parameter_property USB_WRITE_LATENCY TYPE INTEGER |
set_parameter_property USB_WRITE_LATENCY UNITS None |
set_parameter_property USB_WRITE_LATENCY ALLOWED_RANGES -2147483648:2147483647 |
set_parameter_property USB_WRITE_LATENCY HDL_PARAMETER true |
add_parameter AVALON_CMD_LATENCY INTEGER 1 |
set_parameter_property AVALON_CMD_LATENCY DEFAULT_VALUE 1 |
set_parameter_property AVALON_CMD_LATENCY DISPLAY_NAME "Command delaypipe" |
set_parameter_property AVALON_CMD_LATENCY TYPE INTEGER |
set_parameter_property AVALON_CMD_LATENCY UNITS None |
set_parameter_property AVALON_CMD_LATENCY ALLOWED_RANGES -2147483648:2147483647 |
set_parameter_property AVALON_CMD_LATENCY HDL_PARAMETER true |
add_parameter AVALON_READ_LATENCY INTEGER 1 |
set_parameter_property AVALON_READ_LATENCY DEFAULT_VALUE 1 |
set_parameter_property AVALON_READ_LATENCY DISPLAY_NAME "Read data delaypipe" |
set_parameter_property AVALON_READ_LATENCY TYPE INTEGER |
set_parameter_property AVALON_READ_LATENCY UNITS None |
set_parameter_property AVALON_READ_LATENCY ALLOWED_RANGES -2147483648:2147483647 |
set_parameter_property AVALON_READ_LATENCY HDL_PARAMETER true |
add_parameter AVALON_WRITE_LATENCY INTEGER 1 |
set_parameter_property AVALON_WRITE_LATENCY DEFAULT_VALUE 1 |
set_parameter_property AVALON_WRITE_LATENCY DISPLAY_NAME "Write data delaypipe" |
set_parameter_property AVALON_WRITE_LATENCY TYPE INTEGER |
set_parameter_property AVALON_WRITE_LATENCY UNITS None |
set_parameter_property AVALON_WRITE_LATENCY ALLOWED_RANGES -2147483648:2147483647 |
set_parameter_property AVALON_WRITE_LATENCY HDL_PARAMETER true |
|
|
# |
# display items |
# |
add_display_item "" FIFO GROUP "" |
add_display_item "" USB GROUP "" |
add_display_item "" "Avalon-MM Slave" GROUP "" |
add_display_item "" "FIFO's" GROUP "" |
add_display_item FIFO TX_FIFO_NUMWORDS PARAMETER "" |
add_display_item FIFO TX_FIFO_WIDTHU PARAMETER "" |
add_display_item FIFO RX_FIFO_NUMWORDS PARAMETER "" |
add_display_item FIFO RX_FIFO_WIDTHU PARAMETER "" |
add_display_item FIFO FIFOS_DELAYPIPE PARAMETER "" |
add_display_item USB USB_READ_LATENCY PARAMETER "" |
add_display_item USB USB_WRITE_LATENCY PARAMETER "" |
add_display_item "Avalon-MM Slave" AVALON_CMD_LATENCY PARAMETER "" |
add_display_item "Avalon-MM Slave" AVALON_READ_LATENCY PARAMETER "" |
add_display_item "Avalon-MM Slave" AVALON_WRITE_LATENCY PARAMETER "" |
|
|
# |
94,9 → 153,9
set_interface_property avalon_slave explicitAddressSpan 0 |
set_interface_property avalon_slave holdTime 0 |
set_interface_property avalon_slave linewrapBursts false |
set_interface_property avalon_slave maximumPendingReadTransactions 0 |
set_interface_property avalon_slave maximumPendingReadTransactions 64 |
set_interface_property avalon_slave maximumPendingWriteTransactions 0 |
set_interface_property avalon_slave readLatency 3 |
set_interface_property avalon_slave readLatency 0 |
set_interface_property avalon_slave readWaitStates 0 |
set_interface_property avalon_slave readWaitTime 0 |
set_interface_property avalon_slave setupTime 0 |
108,11 → 167,13
set_interface_property avalon_slave CMSIS_SVD_VARIABLES "" |
set_interface_property avalon_slave SVD_ADDRESS_GROUP "" |
|
add_interface_port avalon_slave address_i address Input 4 |
add_interface_port avalon_slave address_i address Input 3 |
add_interface_port avalon_slave read_i read Input 1 |
add_interface_port avalon_slave write_i write Input 1 |
add_interface_port avalon_slave writedata_i writedata Input 8 |
add_interface_port avalon_slave readdata_o readdata Output 8 |
add_interface_port avalon_slave waitrequest_o waitrequest Output 1 |
add_interface_port avalon_slave readdatavalid_o readdatavalid Output 1 |
set_interface_assignment avalon_slave embeddedsw.configuration.isFlash 0 |
set_interface_assignment avalon_slave embeddedsw.configuration.isMemoryDevice 0 |
set_interface_assignment avalon_slave embeddedsw.configuration.isNonVolatileStorage 0 |
/trunk/sw/usb_ft232h.h
0,0 → 1,33
/* |
* usb_ft232h.h |
* |
|
* Author: EDV |
*/ |
|
#include <io.h> |
|
#ifndef USB_FT232H_H_ |
#define USB_FT232H_H_ |
|
|
#define USB_FT232H_WRDATA_ADDR 0x0 |
#define USB_FT232H_RDDATA_ADDR 0x1 |
#define USB_FT232H_TXSTATUSL_ADDR 0x2 |
#define USB_FT232H_TXSTATUSH_ADDR 0x3 |
#define USB_FT232H_RXSTATUSL_ADDR 0x4 |
#define USB_FT232H_RXSTATUSH_ADDR 0x5 |
|
#define USB_FT232H_STATUS_READY_MSK 0x8000 |
#define USB_FT232H_STATUS_COUNT_MSK 0x7FFF |
|
|
#define IOWR_USB_FT232H_DATA(base, data) IOWR_8DIRECT(base, USB_FT232H_WRDATA_ADDR, data) |
#define IORD_USB_FT232H_DATA(base) IORD_8DIRECT(base, USB_FT232H_RDDATA_ADDR) |
#define IORD_USB_FT232H_TXSTATUS(base) (IORD_8DIRECT(base, USB_FT232H_TXSTATUSL_ADDR) | (IORD_8DIRECT(base, USB_FT232H_TXSTATUSH_ADDR) << 8)) |
#define IORD_USB_FT232H_RXSTATUS(base) (IORD_8DIRECT(base, USB_FT232H_RXSTATUSL_ADDR) | (IORD_8DIRECT(base, USB_FT232H_RXSTATUSH_ADDR) << 8)) |
#define IORD_USB_FT232H_TXDATA_COUNT(base) (IORD_USB_FT232H_TXSTATUS(base) & USB_FT232H_STATUS_COUNT_MSK) |
#define IORD_USB_FT232H_RXDATA_COUNT(base) (IORD_USB_FT232H_RXSTATUS(base) & USB_FT232H_STATUS_COUNT_MSK) |
|
|
#endif /* USB_FT232H_H_ */ |
trunk/sw/usb_ft232h.h
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/sw/usb_ft232h.hpp
===================================================================
--- trunk/sw/usb_ft232h.hpp (nonexistent)
+++ trunk/sw/usb_ft232h.hpp (revision 6)
@@ -0,0 +1,89 @@
+/*
+ * usb_ft232h.h
+ *
+ * Created on: 06 ��� 2016 �.
+ * Author: EDV
+ */
+
+#ifndef USB_FT232H_H_
+#define USB_FT232H_H_
+
+#include
+
+
+const alt_u8 USB_FT232H_WRDATA_ADDR = 0x0; //!< Address for write data
+const alt_u8 USB_FT232H_RDDATA_ADDR = 0x1; //!< Address for read data
+const alt_u8 USB_FT232H_TXSTATUSL_ADDR = 0x2; //!< Address for low byte of TX FIFO status register
+const alt_u8 USB_FT232H_TXSTATUSH_ADDR = 0x3; //!< Address for high byte of TX FIFO status register
+const alt_u8 USB_FT232H_RXSTATUSL_ADDR = 0x4; //!< Address for low byte of RX FIFO status register
+const alt_u8 USB_FT232H_RXSTATUSH_ADDR = 0x5; //!< Address for high byte of RX FIFO status register
+
+const alt_u16 USB_FT232H_STATUS_READY_MSK = 0x8000; //!< Ready bit mask of RX or TX FIFO status register
+const alt_u16 USB_FT232H_STATUS_DATA_SIZE_MSK = 0x7FFF; //!< Data size mask of RX or TX FIFO status register
+
+
+
+/*!
+ * \brief Request data of rx FIFO status register
+ * \param[in] base Module address
+ * \return Rx FIFO status register data.
+ */
+inline alt_u16 usbFT232HGetRxFifoStatus(alt_u32 base)
+{
+ return IORD_16DIRECT(base, USB_FT232H_RXSTATUSL_ADDR);
+// return (IORD_8DIRECT(base, USB_FT232H_RXSTATUSL_ADDR) | (IORD_8DIRECT(base, USB_FT232H_RXSTATUSH_ADDR) << 8));
+}
+
+/*!
+ * \brief Request data of tx FIFO status register
+ * \param[in] base Module address
+ * \return Tx FIFO status register data.
+ */
+inline alt_u16 usbFT232HGetTxFifoStatus(alt_u32 base)
+{
+ return IORD_16DIRECT(base, USB_FT232H_TXSTATUSL_ADDR);
+// return (IORD_8DIRECT(base, USB_FT232H_TXSTATUSL_ADDR) | (IORD_8DIRECT(base, USB_FT232H_TXSTATUSH_ADDR) << 8));
+}
+
+/*!
+ * \brief Request number of bytes stored in rx FIFO
+ * \param[in] base Module address
+ * \return Number of bytes stored in rx FIFO
+ */
+inline alt_u16 usbFT232HGetNumberOfDataInRxFifo(alt_u32 base)
+{
+ return (usbFT232HGetRxFifoStatus(base) & USB_FT232H_STATUS_DATA_SIZE_MSK);
+}
+
+/*!
+ * \brief Request number of bytes stored in tx FIFO
+ * \param[in] base Module address
+ * \return Number of bytes stored in tx FIFO
+ */
+inline alt_u16 usbFT232HGetNumberOfDataInTxFifo(alt_u32 base)
+{
+ return (usbFT232HGetTxFifoStatus(base) & USB_FT232H_STATUS_DATA_SIZE_MSK);
+}
+
+/*!
+ * \brief Write byte to module
+ * \param[in] base Module address
+ * \param[in] byte Byte for write to the FIFO
+ */
+inline void usbFT232HWriteByte(alt_u32 base, alt_u8 byte)
+{
+ IOWR_8DIRECT(base, USB_FT232H_WRDATA_ADDR, byte);
+}
+
+/*!
+ * \brief Read byte from the FIFO
+ * \param[in] base Module address
+ * \return Byte read from the FIFO
+ */
+inline alt_u8 usbFT232HReadByte(alt_u32 base)
+{
+ return IORD_8DIRECT(base, USB_FT232H_RDDATA_ADDR);
+}
+
+
+#endif /* USB_FT232H_H_ */
trunk/sw/usb_ft232h.hpp
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/.gitignore
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/.gitignore (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/.gitignore (revision 6)
@@ -0,0 +1,22 @@
+.qsys_edit/
+db/
+greybox_tmp/
+incremental_db/
+output_files/
+simulation/
+sopc/
+*.bak*
+software/usb_ft232h/obj/
+software/usb_ft232h_bsp/obj/
+software/*/obj/
+software/.metadata/
+software/RemoteSystemsTempFiles/
+software/usb_ft232h_bsp/drivers/
+software/usb_ft232h_bsp/HAL/
+*.objdump
+*.elf
+*.map
+*.qws
+*.tcl~
+*.*-*
+*.log
\ No newline at end of file
trunk/testbench/altera_project/test_usb_ft232h/.gitignore
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/48LC16M8A2.qprs
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/48LC16M8A2.qprs (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/48LC16M8A2.qprs (revision 6)
@@ -0,0 +1,26 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
trunk/testbench/altera_project/test_usb_ft232h/48LC16M8A2.qprs
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/ft232h_fifos_interface.sv
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/ft232h_fifos_interface.sv (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/ft232h_fifos_interface.sv (revision 6)
@@ -0,0 +1,137 @@
+module ft232h_fifos_interface (
+ reset_i,
+
+ // FT232H
+ usb_clk_i,
+ usb_data_io,
+ usb_rxf_n_i,
+ usb_txe_n_i,
+ usb_rd_n_o,
+ usb_wr_n_o,
+ usb_oe_n_o,
+
+ // RX FIFO
+ rxf_wrclk_o,
+ rxf_wrfull_i,
+ rxf_wrreq_o,
+ rxf_wrdata_o,
+
+ // TX FIFO
+ txf_rdclk_o,
+ txf_rdempty_i,
+ txf_rdreq_o,
+ txf_rddata_i
+);
+
+
+parameter READ_LATENCY = 1;
+parameter WRITE_LATENCY = 1;
+
+
+input logic reset_i;
+
+input logic usb_clk_i;
+inout logic [7:0] usb_data_io;
+input logic usb_rxf_n_i;
+input logic usb_txe_n_i;
+output logic usb_rd_n_o;
+output logic usb_wr_n_o;
+output logic usb_oe_n_o;
+
+output logic rxf_wrclk_o;
+input logic rxf_wrfull_i;
+output logic rxf_wrreq_o;
+output logic [7:0] rxf_wrdata_o;
+
+output logic txf_rdclk_o;
+input logic txf_rdempty_i;
+output logic txf_rdreq_o;
+input logic [7:0] txf_rddata_i;
+
+
+
+logic [7:0] usb_data_in;
+logic [7:0] usb_data_out;
+
+logic rx_ready;
+logic receiving;
+logic receive;
+
+logic tx_ready;
+logic sending;
+logic send;
+
+
+
+assign usb_data_io = usb_oe_n_o ? usb_data_out : {8{1'bZ}};
+assign usb_data_in = usb_data_io;
+
+
+
+ft232h_receiver rx_inst (
+ .reset_i (reset_i),
+ .ready_o (rx_ready),
+ .receive_i (receive),
+ .receiving_o (receiving),
+ // USB
+ .usb_clk_i (usb_clk_i),
+ .usb_rxf_n_i (usb_rxf_n_i),
+ .usb_rd_n_o (usb_rd_n_o),
+ .usb_oe_n_o (usb_oe_n_o),
+ .usb_data_i (usb_data_in),
+ // FIFO
+ .fifo_wrfull_i (rxf_wrfull_i),
+ .fifo_wrclk_o (rxf_wrclk_o),
+ .fifo_wrreq_o (rxf_wrreq_o),
+ .fifo_data_o (rxf_wrdata_o)
+ );
+ defparam
+ rx_inst.LATENCY = READ_LATENCY;
+
+
+
+ft232h_transmitter tx_inst (
+ .reset_i (reset_i),
+ .ready_o (tx_ready),
+ .transmit_i (send),
+ .sending_o (sending),
+ // FT232H
+ .usb_clk_i (usb_clk_i),
+ .usb_txe_n_i (usb_txe_n_i),
+ .usb_wr_n_o (usb_wr_n_o),
+ .usb_data_o (usb_data_out),
+ // FIFO
+ .fifo_rdclk_o (txf_rdclk_o),
+ .fifo_rdempty_i (txf_rdempty_i),
+ .fifo_rdreq_o (txf_rdreq_o),
+ .fifo_rddata_i (txf_rddata_i)
+ );
+ defparam
+ tx_inst.LATENCY = WRITE_LATENCY;
+
+
+
+always_ff @(posedge usb_clk_i or posedge reset_i)
+begin
+ if (reset_i)
+ begin
+ send <= 1'b0;
+ receive <= 1'b0;
+ end
+ else
+ begin
+ if (tx_ready & ~receiving & ~(receive & rx_ready))
+ begin
+ send <= 1'b1;
+ receive <= 1'b0;
+ end
+ else if (rx_ready & ~sending)
+ begin
+ send <= 1'b0;
+ receive <= 1'b1;
+ end
+ end
+end
+
+
+endmodule
trunk/testbench/altera_project/test_usb_ft232h/ft232h_fifos_interface.sv
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/ft232h_receiver.sv
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/ft232h_receiver.sv (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/ft232h_receiver.sv (revision 6)
@@ -0,0 +1,104 @@
+module ft232h_receiver (
+ reset_i,
+ ready_o,
+ receive_i,
+ receiving_o,
+
+ // USB
+ usb_clk_i,
+ usb_rxf_n_i,
+ usb_rd_n_o,
+ usb_oe_n_o,
+
+ usb_data_i,
+
+ // FIFO
+ fifo_wrfull_i,
+ fifo_wrclk_o,
+ fifo_wrreq_o,
+ fifo_data_o
+);
+
+
+parameter LATENCY = 1;
+
+
+input logic reset_i;
+output logic ready_o;
+input logic receive_i;
+output logic receiving_o;
+
+input logic usb_clk_i;
+input logic usb_rxf_n_i;
+output logic usb_rd_n_o;
+output logic usb_oe_n_o;
+
+input logic [7:0] usb_data_i;
+
+input logic fifo_wrfull_i;
+output logic fifo_wrclk_o;
+output logic fifo_wrreq_o;
+output logic [7:0] fifo_data_o;
+
+
+
+logic fifo_wrfull_reg;
+logic usb_datavalid;
+logic pipeline_ready;
+
+
+
+assign fifo_wrclk_o = ~usb_clk_i;
+assign ready_o = pipeline_ready & ~usb_rxf_n_i;
+assign receiving_o = ~usb_oe_n_o | ~usb_rd_n_o;
+
+assign usb_datavalid = ~usb_rd_n_o & ~usb_rxf_n_i;
+
+
+
+pipeline pipe_inst (
+ .clk_i (usb_clk_i),
+ .reset_i (reset_i),
+ // data source side
+ .valid_i (usb_datavalid),
+ .data_i (usb_data_i),
+ .ready_o (pipeline_ready),
+ // data destination side
+ .ready_i (~fifo_wrfull_reg),
+ .valid_o (fifo_wrreq_o),
+ .data_o (fifo_data_o)
+ );
+ defparam
+ pipe_inst.LATENCY = LATENCY;
+
+
+
+always_ff @(posedge usb_clk_i)
+begin
+ fifo_wrfull_reg <= fifo_wrfull_i;
+end
+
+
+always_ff @(posedge usb_clk_i or posedge reset_i)
+begin
+ if (reset_i)
+ begin
+ end
+ else
+ begin
+ if (receive_i & ready_o & ~fifo_wrfull_i)
+ begin
+ usb_oe_n_o <= 1'b0;
+ if (~usb_oe_n_o)
+ usb_rd_n_o <= 1'b0;
+ end
+ else
+ begin
+ usb_oe_n_o <= 1'b1;
+ usb_rd_n_o <= 1'b1;
+ end
+ end
+end
+
+
+endmodule
trunk/testbench/altera_project/test_usb_ft232h/ft232h_receiver.sv
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/ft232h_transmitter.sv
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/ft232h_transmitter.sv (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/ft232h_transmitter.sv (revision 6)
@@ -0,0 +1,120 @@
+module ft232h_transmitter (
+ reset_i,
+ ready_o,
+ transmit_i,
+ sending_o,
+
+ // FT232H
+ usb_clk_i,
+ usb_txe_n_i,
+ usb_wr_n_o,
+
+ usb_data_o,
+
+ // FIFO
+ fifo_rdclk_o,
+ fifo_rdempty_i,
+ fifo_rdreq_o,
+ fifo_rddata_i
+);
+
+
+parameter LATENCY = 1;
+
+
+input logic reset_i;
+output logic ready_o;
+input logic transmit_i;
+output logic sending_o;
+
+input logic usb_clk_i;
+input logic usb_txe_n_i;
+output logic usb_wr_n_o;
+
+output logic [7:0] usb_data_o;
+
+output logic fifo_rdclk_o;
+input logic fifo_rdempty_i;
+output logic fifo_rdreq_o;
+input logic [7:0] fifo_rddata_i;
+
+
+
+logic dest_ready;
+logic fifo_datavalid;
+reg fifo_datavalid_reg;
+logic pipeline_ready;
+logic usb_datavalid;
+logic usb_txe_n_reg;
+
+
+
+
+assign fifo_rdclk_o = usb_clk_i;
+assign dest_ready = transmit_i & ~usb_txe_n_i & ~usb_txe_n_reg;
+assign ready_o = ~usb_txe_n_i & (~fifo_rdempty_i | fifo_datavalid_reg);
+assign sending_o = fifo_rdreq_o | ~usb_wr_n_o;
+assign usb_wr_n_o = ~(usb_datavalid & dest_ready);
+
+assign fifo_datavalid = dest_ready ? fifo_datavalid_reg : 1'b0;
+
+
+
+pipeline pipe_inst (
+ .clk_i (usb_clk_i),
+ .reset_i (reset_i),
+ // data source side
+ .valid_i (fifo_datavalid),
+ .data_i (fifo_rddata_i),
+ .ready_o (pipeline_ready),
+ // data destination side
+ .ready_i (dest_ready),
+ .valid_o (usb_datavalid),
+ .data_o (usb_data_o)
+ );
+ defparam
+ pipe_inst.LATENCY = LATENCY;
+
+
+
+
+always_ff @(posedge usb_clk_i)
+begin
+ usb_txe_n_reg <= usb_txe_n_i;
+end
+
+
+always_ff @(negedge fifo_rdclk_o or posedge reset_i)
+begin
+ if (reset_i)
+ begin
+ fifo_rdreq_o <= 1'b0;
+ end
+ else
+ begin
+ if (transmit_i & ~fifo_rdempty_i & pipeline_ready)
+ fifo_rdreq_o <= 1'b1;
+ else
+ fifo_rdreq_o <= 1'b0;
+ end
+end
+
+always_ff @(posedge fifo_rdclk_o or posedge reset_i)
+begin
+ if (reset_i)
+ begin
+ fifo_datavalid_reg <= 1'b0;
+ end
+ else
+ begin
+ if (pipeline_ready)
+ begin
+ if (fifo_rdreq_o)
+ fifo_datavalid_reg <= 1'b1;
+ else
+ fifo_datavalid_reg <= 1'b0;
+ end
+ end
+end
+
+endmodule
trunk/testbench/altera_project/test_usb_ft232h/ft232h_transmitter.sv
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/pipeline.sv
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/pipeline.sv (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/pipeline.sv (revision 6)
@@ -0,0 +1,137 @@
+module pipeline_step (
+ clk_i,
+ reset_i,
+
+ // data source side
+ valid_i,
+ data_i,
+ ready_o,
+
+ // data destination side
+ ready_i,
+ valid_o,
+ data_o
+);
+
+
+parameter DATA_WIDTH = 8;
+
+
+input wire clk_i;
+input wire reset_i;
+
+input wire valid_i;
+input wire [DATA_WIDTH-1:0] data_i;
+output wire ready_o;
+
+input wire ready_i;
+output logic valid_o;
+output reg [DATA_WIDTH-1:0] data_o;
+
+
+
+reg valid_reg;
+
+
+
+assign ready_o = ready_i;
+assign valid_o = ready_i ? valid_reg : 1'b0;
+
+
+
+always_ff @(posedge clk_i or posedge reset_i)
+begin
+ if (reset_i)
+ begin
+ valid_reg <= 1'b0;
+ data_o <= '0;
+ end
+ else
+ begin
+ if (ready_i)
+ begin
+ valid_reg <= valid_i;
+ data_o <= data_i;
+ end
+ end
+end
+
+
+endmodule
+
+
+module pipeline (
+ clk_i,
+ reset_i,
+
+ // data source side
+ valid_i,
+ data_i,
+ ready_o,
+
+ // data destination side
+ ready_i,
+ valid_o,
+ data_o
+);
+
+
+parameter DATA_WIDTH = 8;
+parameter LATENCY = 1;
+
+
+localparam COUNT = LATENCY + 1;
+
+
+input wire clk_i;
+input wire reset_i;
+
+input wire valid_i;
+input wire [DATA_WIDTH-1:0] data_i;
+output wire ready_o;
+
+input wire ready_i;
+output logic valid_o;
+output reg [DATA_WIDTH-1:0] data_o;
+
+
+
+logic pl_ready [COUNT];
+logic pl_valid [COUNT];
+logic [DATA_WIDTH-1:0] pl_data [COUNT];
+
+
+
+assign ready_o = pl_ready[0];
+assign pl_valid[0] = valid_i;
+assign pl_data[0] = data_i;
+
+assign pl_ready[COUNT-1] = ready_i;
+assign valid_o = pl_valid[COUNT-1];
+assign data_o = pl_data[COUNT-1];
+
+
+genvar i;
+generate
+for ( i = 1; i < COUNT; i = i + 1 )
+begin: pipeline_generate
+ pipeline_step pl_step(
+ .clk_i (clk_i),
+ .reset_i (reset_i),
+
+ .valid_i (pl_valid[i-1]),
+ .data_i (pl_data[i-1]),
+ .ready_o (pl_ready[i-1]),
+
+ .ready_i (pl_ready[i]),
+ .valid_o (pl_valid[i]),
+ .data_o (pl_data[i])
+ );
+ defparam
+ pl_step.DATA_WIDTH = DATA_WIDTH;
+end
+endgenerate
+
+
+endmodule
+
trunk/testbench/altera_project/test_usb_ft232h/pipeline.sv
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/pll1.bsf
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/pll1.bsf (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/pll1.bsf (revision 6)
@@ -0,0 +1,70 @@
+/*
+WARNING: Do NOT edit the input and output ports in this file in a text
+editor if you plan to continue editing the block that represents it in
+the Block Editor! File corruption is VERY likely to occur.
+*/
+/*
+Copyright (C) 2016 Intel Corporation. All rights reserved.
+Your use of Intel Corporation's design tools, logic functions
+and other software and tools, and its AMPP partner logic
+functions, and any output files from any of the foregoing
+(including device programming or simulation files), and any
+associated documentation or information are expressly subject
+to the terms and conditions of the Intel Program License
+Subscription Agreement, the Intel Quartus Prime License Agreement,
+the Intel MegaCore Function License Agreement, or other
+applicable license agreement, including, without limitation,
+that your use is for the sole purpose of programming logic
+devices manufactured by Intel and sold by Intel or its
+authorized distributors. Please refer to the applicable
+agreement for further details.
+*/
+(header "symbol" (version "1.2"))
+(symbol
+ (rect 0 0 240 152)
+ (text "pll1" (rect 110 0 133 16)(font "Arial" (font_size 10)))
+ (text "inst" (rect 8 136 25 148)(font "Arial" ))
+ (port
+ (pt 0 64)
+ (input)
+ (text "inclk0" (rect 0 0 31 14)(font "Arial" (font_size 8)))
+ (text "inclk0" (rect 4 50 29 63)(font "Arial" (font_size 8)))
+ (line (pt 0 64)(pt 40 64))
+ )
+ (port
+ (pt 240 64)
+ (output)
+ (text "c0" (rect 0 0 14 14)(font "Arial" (font_size 8)))
+ (text "c0" (rect 224 50 234 63)(font "Arial" (font_size 8)))
+ )
+ (drawing
+ (text "Cyclone IV E" (rect 164 136 383 283)(font "Arial" ))
+ (text "inclk0 frequency: 16.384 MHz" (rect 50 59 223 129)(font "Arial" ))
+ (text "Operation Mode: Normal" (rect 50 72 199 155)(font "Arial" ))
+ (text "Clk " (rect 51 93 116 197)(font "Arial" ))
+ (text "Ratio" (rect 77 93 174 197)(font "Arial" ))
+ (text "Ph (dg)" (rect 109 93 247 197)(font "Arial" ))
+ (text "DC (%)" (rect 143 93 316 197)(font "Arial" ))
+ (text "c0" (rect 54 107 116 225)(font "Arial" ))
+ (text "125/128" (rect 72 107 175 225)(font "Arial" ))
+ (text "0.00" (rect 115 107 246 225)(font "Arial" ))
+ (text "50.00" (rect 147 107 315 225)(font "Arial" ))
+ (line (pt 0 0)(pt 241 0))
+ (line (pt 241 0)(pt 241 153))
+ (line (pt 0 153)(pt 241 153))
+ (line (pt 0 0)(pt 0 153))
+ (line (pt 48 91)(pt 175 91))
+ (line (pt 48 104)(pt 175 104))
+ (line (pt 48 118)(pt 175 118))
+ (line (pt 48 91)(pt 48 118))
+ (line (pt 69 91)(pt 69 118)(line_width 3))
+ (line (pt 106 91)(pt 106 118)(line_width 3))
+ (line (pt 140 91)(pt 140 118)(line_width 3))
+ (line (pt 174 91)(pt 174 118))
+ (line (pt 40 48)(pt 207 48))
+ (line (pt 207 48)(pt 207 135))
+ (line (pt 40 135)(pt 207 135))
+ (line (pt 40 48)(pt 40 135))
+ (line (pt 239 64)(pt 207 64))
+ )
+)
trunk/testbench/altera_project/test_usb_ft232h/pll1.bsf
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/pll1.ppf
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/pll1.ppf (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/pll1.ppf (revision 6)
@@ -0,0 +1,9 @@
+
+
+
+
+
+
+
+
+
trunk/testbench/altera_project/test_usb_ft232h/pll1.ppf
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/pll1.qip
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/pll1.qip (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/pll1.qip (revision 6)
@@ -0,0 +1,7 @@
+set_global_assignment -name IP_TOOL_NAME "ALTPLL"
+set_global_assignment -name IP_TOOL_VERSION "16.1"
+set_global_assignment -name IP_GENERATED_DEVICE_FAMILY "{Cyclone IV E}"
+set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) "pll1.v"]
+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "pll1.bsf"]
+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "pll1_bb.v"]
+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "pll1.ppf"]
trunk/testbench/altera_project/test_usb_ft232h/pll1.qip
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/pll1.v
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/pll1.v (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/pll1.v (revision 6)
@@ -0,0 +1,301 @@
+// megafunction wizard: %ALTPLL%
+// GENERATION: STANDARD
+// VERSION: WM1.0
+// MODULE: altpll
+
+// ============================================================
+// File Name: pll1.v
+// Megafunction Name(s):
+// altpll
+//
+// Simulation Library Files(s):
+//
+// ============================================================
+// ************************************************************
+// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
+//
+// 16.1.0 Build 196 10/24/2016 SJ Lite Edition
+// ************************************************************
+
+
+//Copyright (C) 2016 Intel Corporation. All rights reserved.
+//Your use of Intel Corporation's design tools, logic functions
+//and other software and tools, and its AMPP partner logic
+//functions, and any output files from any of the foregoing
+//(including device programming or simulation files), and any
+//associated documentation or information are expressly subject
+//to the terms and conditions of the Intel Program License
+//Subscription Agreement, the Intel Quartus Prime License Agreement,
+//the Intel MegaCore Function License Agreement, or other
+//applicable license agreement, including, without limitation,
+//that your use is for the sole purpose of programming logic
+//devices manufactured by Intel and sold by Intel or its
+//authorized distributors. Please refer to the applicable
+//agreement for further details.
+
+
+// synopsys translate_off
+`timescale 1 ps / 1 ps
+// synopsys translate_on
+module pll1 (
+ inclk0,
+ c0);
+
+ input inclk0;
+ output c0;
+
+ wire [0:0] sub_wire2 = 1'h0;
+ wire [4:0] sub_wire3;
+ wire sub_wire0 = inclk0;
+ wire [1:0] sub_wire1 = {sub_wire2, sub_wire0};
+ wire [0:0] sub_wire4 = sub_wire3[0:0];
+ wire c0 = sub_wire4;
+
+ altpll altpll_component (
+ .inclk (sub_wire1),
+ .clk (sub_wire3),
+ .activeclock (),
+ .areset (1'b0),
+ .clkbad (),
+ .clkena ({6{1'b1}}),
+ .clkloss (),
+ .clkswitch (1'b0),
+ .configupdate (1'b0),
+ .enable0 (),
+ .enable1 (),
+ .extclk (),
+ .extclkena ({4{1'b1}}),
+ .fbin (1'b1),
+ .fbmimicbidir (),
+ .fbout (),
+ .fref (),
+ .icdrclk (),
+ .locked (),
+ .pfdena (1'b1),
+ .phasecounterselect ({4{1'b1}}),
+ .phasedone (),
+ .phasestep (1'b1),
+ .phaseupdown (1'b1),
+ .pllena (1'b1),
+ .scanaclr (1'b0),
+ .scanclk (1'b0),
+ .scanclkena (1'b1),
+ .scandata (1'b0),
+ .scandataout (),
+ .scandone (),
+ .scanread (1'b0),
+ .scanwrite (1'b0),
+ .sclkout0 (),
+ .sclkout1 (),
+ .vcooverrange (),
+ .vcounderrange ());
+ defparam
+ altpll_component.bandwidth_type = "AUTO",
+ altpll_component.clk0_divide_by = 128,
+ altpll_component.clk0_duty_cycle = 50,
+ altpll_component.clk0_multiply_by = 125,
+ altpll_component.clk0_phase_shift = "0",
+ altpll_component.compensate_clock = "CLK0",
+ altpll_component.inclk0_input_frequency = 61035,
+ altpll_component.intended_device_family = "Cyclone IV E",
+ altpll_component.lpm_hint = "CBX_MODULE_PREFIX=pll1",
+ altpll_component.lpm_type = "altpll",
+ altpll_component.operation_mode = "NORMAL",
+ altpll_component.pll_type = "AUTO",
+ altpll_component.port_activeclock = "PORT_UNUSED",
+ altpll_component.port_areset = "PORT_UNUSED",
+ altpll_component.port_clkbad0 = "PORT_UNUSED",
+ altpll_component.port_clkbad1 = "PORT_UNUSED",
+ altpll_component.port_clkloss = "PORT_UNUSED",
+ altpll_component.port_clkswitch = "PORT_UNUSED",
+ altpll_component.port_configupdate = "PORT_UNUSED",
+ altpll_component.port_fbin = "PORT_UNUSED",
+ altpll_component.port_inclk0 = "PORT_USED",
+ altpll_component.port_inclk1 = "PORT_UNUSED",
+ altpll_component.port_locked = "PORT_UNUSED",
+ altpll_component.port_pfdena = "PORT_UNUSED",
+ altpll_component.port_phasecounterselect = "PORT_UNUSED",
+ altpll_component.port_phasedone = "PORT_UNUSED",
+ altpll_component.port_phasestep = "PORT_UNUSED",
+ altpll_component.port_phaseupdown = "PORT_UNUSED",
+ altpll_component.port_pllena = "PORT_UNUSED",
+ altpll_component.port_scanaclr = "PORT_UNUSED",
+ altpll_component.port_scanclk = "PORT_UNUSED",
+ altpll_component.port_scanclkena = "PORT_UNUSED",
+ altpll_component.port_scandata = "PORT_UNUSED",
+ altpll_component.port_scandataout = "PORT_UNUSED",
+ altpll_component.port_scandone = "PORT_UNUSED",
+ altpll_component.port_scanread = "PORT_UNUSED",
+ altpll_component.port_scanwrite = "PORT_UNUSED",
+ altpll_component.port_clk0 = "PORT_USED",
+ altpll_component.port_clk1 = "PORT_UNUSED",
+ altpll_component.port_clk2 = "PORT_UNUSED",
+ altpll_component.port_clk3 = "PORT_UNUSED",
+ altpll_component.port_clk4 = "PORT_UNUSED",
+ altpll_component.port_clk5 = "PORT_UNUSED",
+ altpll_component.port_clkena0 = "PORT_UNUSED",
+ altpll_component.port_clkena1 = "PORT_UNUSED",
+ altpll_component.port_clkena2 = "PORT_UNUSED",
+ altpll_component.port_clkena3 = "PORT_UNUSED",
+ altpll_component.port_clkena4 = "PORT_UNUSED",
+ altpll_component.port_clkena5 = "PORT_UNUSED",
+ altpll_component.port_extclk0 = "PORT_UNUSED",
+ altpll_component.port_extclk1 = "PORT_UNUSED",
+ altpll_component.port_extclk2 = "PORT_UNUSED",
+ altpll_component.port_extclk3 = "PORT_UNUSED",
+ altpll_component.width_clock = 5;
+
+
+endmodule
+
+// ============================================================
+// CNX file retrieval info
+// ============================================================
+// Retrieval info: PRIVATE: ACTIVECLK_CHECK STRING "0"
+// Retrieval info: PRIVATE: BANDWIDTH STRING "1.000"
+// Retrieval info: PRIVATE: BANDWIDTH_FEATURE_ENABLED STRING "1"
+// Retrieval info: PRIVATE: BANDWIDTH_FREQ_UNIT STRING "MHz"
+// Retrieval info: PRIVATE: BANDWIDTH_PRESET STRING "Low"
+// Retrieval info: PRIVATE: BANDWIDTH_USE_AUTO STRING "1"
+// Retrieval info: PRIVATE: BANDWIDTH_USE_PRESET STRING "0"
+// Retrieval info: PRIVATE: CLKBAD_SWITCHOVER_CHECK STRING "0"
+// Retrieval info: PRIVATE: CLKLOSS_CHECK STRING "0"
+// Retrieval info: PRIVATE: CLKSWITCH_CHECK STRING "0"
+// Retrieval info: PRIVATE: CNX_NO_COMPENSATE_RADIO STRING "0"
+// Retrieval info: PRIVATE: CREATE_CLKBAD_CHECK STRING "0"
+// Retrieval info: PRIVATE: CREATE_INCLK1_CHECK STRING "0"
+// Retrieval info: PRIVATE: CUR_DEDICATED_CLK STRING "c0"
+// Retrieval info: PRIVATE: CUR_FBIN_CLK STRING "c0"
+// Retrieval info: PRIVATE: DEVICE_SPEED_GRADE STRING "8"
+// Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC "1"
+// Retrieval info: PRIVATE: DUTY_CYCLE0 STRING "50.00000000"
+// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE0 STRING "16.000000"
+// Retrieval info: PRIVATE: EXPLICIT_SWITCHOVER_COUNTER STRING "0"
+// Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING "0"
+// Retrieval info: PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING "1"
+// Retrieval info: PRIVATE: GLOCKED_FEATURE_ENABLED STRING "0"
+// Retrieval info: PRIVATE: GLOCKED_MODE_CHECK STRING "0"
+// Retrieval info: PRIVATE: GLOCK_COUNTER_EDIT NUMERIC "1048575"
+// Retrieval info: PRIVATE: HAS_MANUAL_SWITCHOVER STRING "1"
+// Retrieval info: PRIVATE: INCLK0_FREQ_EDIT STRING "16.384"
+// Retrieval info: PRIVATE: INCLK0_FREQ_UNIT_COMBO STRING "MHz"
+// Retrieval info: PRIVATE: INCLK1_FREQ_EDIT STRING "100.000"
+// Retrieval info: PRIVATE: INCLK1_FREQ_EDIT_CHANGED STRING "1"
+// Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_CHANGED STRING "1"
+// Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_COMBO STRING "MHz"
+// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone IV E"
+// Retrieval info: PRIVATE: INT_FEEDBACK__MODE_RADIO STRING "1"
+// Retrieval info: PRIVATE: LOCKED_OUTPUT_CHECK STRING "0"
+// Retrieval info: PRIVATE: LONG_SCAN_RADIO STRING "1"
+// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE STRING "Not Available"
+// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE_DIRTY NUMERIC "0"
+// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING "deg"
+// Retrieval info: PRIVATE: MIG_DEVICE_SPEED_GRADE STRING "Any"
+// Retrieval info: PRIVATE: MIRROR_CLK0 STRING "0"
+// Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC "1"
+// Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING "1"
+// Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "16.00000000"
+// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING "1"
+// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT0 STRING "MHz"
+// Retrieval info: PRIVATE: PHASE_RECONFIG_FEATURE_ENABLED STRING "1"
+// Retrieval info: PRIVATE: PHASE_RECONFIG_INPUTS_CHECK STRING "0"
+// Retrieval info: PRIVATE: PHASE_SHIFT0 STRING "0.00000000"
+// Retrieval info: PRIVATE: PHASE_SHIFT_STEP_ENABLED_CHECK STRING "0"
+// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT0 STRING "deg"
+// Retrieval info: PRIVATE: PLL_ADVANCED_PARAM_CHECK STRING "0"
+// Retrieval info: PRIVATE: PLL_ARESET_CHECK STRING "0"
+// Retrieval info: PRIVATE: PLL_AUTOPLL_CHECK NUMERIC "1"
+// Retrieval info: PRIVATE: PLL_ENHPLL_CHECK NUMERIC "0"
+// Retrieval info: PRIVATE: PLL_FASTPLL_CHECK NUMERIC "0"
+// Retrieval info: PRIVATE: PLL_FBMIMIC_CHECK STRING "0"
+// Retrieval info: PRIVATE: PLL_LVDS_PLL_CHECK NUMERIC "0"
+// Retrieval info: PRIVATE: PLL_PFDENA_CHECK STRING "0"
+// Retrieval info: PRIVATE: PLL_TARGET_HARCOPY_CHECK NUMERIC "0"
+// Retrieval info: PRIVATE: PRIMARY_CLK_COMBO STRING "inclk0"
+// Retrieval info: PRIVATE: RECONFIG_FILE STRING "pll1.mif"
+// Retrieval info: PRIVATE: SACN_INPUTS_CHECK STRING "0"
+// Retrieval info: PRIVATE: SCAN_FEATURE_ENABLED STRING "1"
+// Retrieval info: PRIVATE: SELF_RESET_LOCK_LOSS STRING "0"
+// Retrieval info: PRIVATE: SHORT_SCAN_RADIO STRING "0"
+// Retrieval info: PRIVATE: SPREAD_FEATURE_ENABLED STRING "0"
+// Retrieval info: PRIVATE: SPREAD_FREQ STRING "50.000"
+// Retrieval info: PRIVATE: SPREAD_FREQ_UNIT STRING "KHz"
+// Retrieval info: PRIVATE: SPREAD_PERCENT STRING "0.500"
+// Retrieval info: PRIVATE: SPREAD_USE STRING "0"
+// Retrieval info: PRIVATE: SRC_SYNCH_COMP_RADIO STRING "0"
+// Retrieval info: PRIVATE: STICKY_CLK0 STRING "1"
+// Retrieval info: PRIVATE: SWITCHOVER_COUNT_EDIT NUMERIC "1"
+// Retrieval info: PRIVATE: SWITCHOVER_FEATURE_ENABLED STRING "1"
+// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0"
+// Retrieval info: PRIVATE: USE_CLK0 STRING "1"
+// Retrieval info: PRIVATE: USE_CLKENA0 STRING "0"
+// Retrieval info: PRIVATE: USE_MIL_SPEED_GRADE NUMERIC "0"
+// Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING "0"
+// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
+// Retrieval info: CONSTANT: BANDWIDTH_TYPE STRING "AUTO"
+// Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "128"
+// Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC "50"
+// Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "125"
+// Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING "0"
+// Retrieval info: CONSTANT: COMPENSATE_CLOCK STRING "CLK0"
+// Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC "61035"
+// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone IV E"
+// Retrieval info: CONSTANT: LPM_TYPE STRING "altpll"
+// Retrieval info: CONSTANT: OPERATION_MODE STRING "NORMAL"
+// Retrieval info: CONSTANT: PLL_TYPE STRING "AUTO"
+// Retrieval info: CONSTANT: PORT_ACTIVECLOCK STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_ARESET STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_CLKBAD0 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_CLKBAD1 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_CLKLOSS STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_CLKSWITCH STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_CONFIGUPDATE STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_FBIN STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_INCLK0 STRING "PORT_USED"
+// Retrieval info: CONSTANT: PORT_INCLK1 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_LOCKED STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_PFDENA STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_PHASECOUNTERSELECT STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_PHASEDONE STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_PHASESTEP STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_PHASEUPDOWN STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_PLLENA STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANACLR STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANCLK STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANCLKENA STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANDATA STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANDATAOUT STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANDONE STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANREAD STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANWRITE STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clk0 STRING "PORT_USED"
+// Retrieval info: CONSTANT: PORT_clk1 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clk2 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clk3 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clk4 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clk5 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clkena0 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clkena1 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clkena2 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clkena3 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clkena4 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clkena5 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_extclk0 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_extclk1 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_extclk2 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_extclk3 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: WIDTH_CLOCK NUMERIC "5"
+// Retrieval info: USED_PORT: @clk 0 0 5 0 OUTPUT_CLK_EXT VCC "@clk[4..0]"
+// Retrieval info: USED_PORT: c0 0 0 0 0 OUTPUT_CLK_EXT VCC "c0"
+// Retrieval info: USED_PORT: inclk0 0 0 0 0 INPUT_CLK_EXT GND "inclk0"
+// Retrieval info: CONNECT: @inclk 0 0 1 1 GND 0 0 0 0
+// Retrieval info: CONNECT: @inclk 0 0 1 0 inclk0 0 0 0 0
+// Retrieval info: CONNECT: c0 0 0 0 0 @clk 0 0 1 0
+// Retrieval info: GEN_FILE: TYPE_NORMAL pll1.v TRUE
+// Retrieval info: GEN_FILE: TYPE_NORMAL pll1.ppf TRUE
+// Retrieval info: GEN_FILE: TYPE_NORMAL pll1.inc FALSE
+// Retrieval info: GEN_FILE: TYPE_NORMAL pll1.cmp FALSE
+// Retrieval info: GEN_FILE: TYPE_NORMAL pll1.bsf TRUE
+// Retrieval info: GEN_FILE: TYPE_NORMAL pll1_inst.v FALSE
+// Retrieval info: GEN_FILE: TYPE_NORMAL pll1_bb.v TRUE
+// Retrieval info: CBX_MODULE_PREFIX: ON
trunk/testbench/altera_project/test_usb_ft232h/pll1.v
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/pll1_bb.v
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/pll1_bb.v (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/pll1_bb.v (revision 6)
@@ -0,0 +1,194 @@
+// megafunction wizard: %ALTPLL%VBB%
+// GENERATION: STANDARD
+// VERSION: WM1.0
+// MODULE: altpll
+
+// ============================================================
+// File Name: pll1.v
+// Megafunction Name(s):
+// altpll
+//
+// Simulation Library Files(s):
+//
+// ============================================================
+// ************************************************************
+// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
+//
+// 16.1.0 Build 196 10/24/2016 SJ Lite Edition
+// ************************************************************
+
+//Copyright (C) 2016 Intel Corporation. All rights reserved.
+//Your use of Intel Corporation's design tools, logic functions
+//and other software and tools, and its AMPP partner logic
+//functions, and any output files from any of the foregoing
+//(including device programming or simulation files), and any
+//associated documentation or information are expressly subject
+//to the terms and conditions of the Intel Program License
+//Subscription Agreement, the Intel Quartus Prime License Agreement,
+//the Intel MegaCore Function License Agreement, or other
+//applicable license agreement, including, without limitation,
+//that your use is for the sole purpose of programming logic
+//devices manufactured by Intel and sold by Intel or its
+//authorized distributors. Please refer to the applicable
+//agreement for further details.
+
+module pll1 (
+ inclk0,
+ c0);
+
+ input inclk0;
+ output c0;
+
+endmodule
+
+// ============================================================
+// CNX file retrieval info
+// ============================================================
+// Retrieval info: PRIVATE: ACTIVECLK_CHECK STRING "0"
+// Retrieval info: PRIVATE: BANDWIDTH STRING "1.000"
+// Retrieval info: PRIVATE: BANDWIDTH_FEATURE_ENABLED STRING "1"
+// Retrieval info: PRIVATE: BANDWIDTH_FREQ_UNIT STRING "MHz"
+// Retrieval info: PRIVATE: BANDWIDTH_PRESET STRING "Low"
+// Retrieval info: PRIVATE: BANDWIDTH_USE_AUTO STRING "1"
+// Retrieval info: PRIVATE: BANDWIDTH_USE_PRESET STRING "0"
+// Retrieval info: PRIVATE: CLKBAD_SWITCHOVER_CHECK STRING "0"
+// Retrieval info: PRIVATE: CLKLOSS_CHECK STRING "0"
+// Retrieval info: PRIVATE: CLKSWITCH_CHECK STRING "0"
+// Retrieval info: PRIVATE: CNX_NO_COMPENSATE_RADIO STRING "0"
+// Retrieval info: PRIVATE: CREATE_CLKBAD_CHECK STRING "0"
+// Retrieval info: PRIVATE: CREATE_INCLK1_CHECK STRING "0"
+// Retrieval info: PRIVATE: CUR_DEDICATED_CLK STRING "c0"
+// Retrieval info: PRIVATE: CUR_FBIN_CLK STRING "c0"
+// Retrieval info: PRIVATE: DEVICE_SPEED_GRADE STRING "8"
+// Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC "1"
+// Retrieval info: PRIVATE: DUTY_CYCLE0 STRING "50.00000000"
+// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE0 STRING "16.000000"
+// Retrieval info: PRIVATE: EXPLICIT_SWITCHOVER_COUNTER STRING "0"
+// Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING "0"
+// Retrieval info: PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING "1"
+// Retrieval info: PRIVATE: GLOCKED_FEATURE_ENABLED STRING "0"
+// Retrieval info: PRIVATE: GLOCKED_MODE_CHECK STRING "0"
+// Retrieval info: PRIVATE: GLOCK_COUNTER_EDIT NUMERIC "1048575"
+// Retrieval info: PRIVATE: HAS_MANUAL_SWITCHOVER STRING "1"
+// Retrieval info: PRIVATE: INCLK0_FREQ_EDIT STRING "16.384"
+// Retrieval info: PRIVATE: INCLK0_FREQ_UNIT_COMBO STRING "MHz"
+// Retrieval info: PRIVATE: INCLK1_FREQ_EDIT STRING "100.000"
+// Retrieval info: PRIVATE: INCLK1_FREQ_EDIT_CHANGED STRING "1"
+// Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_CHANGED STRING "1"
+// Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_COMBO STRING "MHz"
+// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone IV E"
+// Retrieval info: PRIVATE: INT_FEEDBACK__MODE_RADIO STRING "1"
+// Retrieval info: PRIVATE: LOCKED_OUTPUT_CHECK STRING "0"
+// Retrieval info: PRIVATE: LONG_SCAN_RADIO STRING "1"
+// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE STRING "Not Available"
+// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE_DIRTY NUMERIC "0"
+// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING "deg"
+// Retrieval info: PRIVATE: MIG_DEVICE_SPEED_GRADE STRING "Any"
+// Retrieval info: PRIVATE: MIRROR_CLK0 STRING "0"
+// Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC "1"
+// Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING "1"
+// Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "16.00000000"
+// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING "1"
+// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT0 STRING "MHz"
+// Retrieval info: PRIVATE: PHASE_RECONFIG_FEATURE_ENABLED STRING "1"
+// Retrieval info: PRIVATE: PHASE_RECONFIG_INPUTS_CHECK STRING "0"
+// Retrieval info: PRIVATE: PHASE_SHIFT0 STRING "0.00000000"
+// Retrieval info: PRIVATE: PHASE_SHIFT_STEP_ENABLED_CHECK STRING "0"
+// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT0 STRING "deg"
+// Retrieval info: PRIVATE: PLL_ADVANCED_PARAM_CHECK STRING "0"
+// Retrieval info: PRIVATE: PLL_ARESET_CHECK STRING "0"
+// Retrieval info: PRIVATE: PLL_AUTOPLL_CHECK NUMERIC "1"
+// Retrieval info: PRIVATE: PLL_ENHPLL_CHECK NUMERIC "0"
+// Retrieval info: PRIVATE: PLL_FASTPLL_CHECK NUMERIC "0"
+// Retrieval info: PRIVATE: PLL_FBMIMIC_CHECK STRING "0"
+// Retrieval info: PRIVATE: PLL_LVDS_PLL_CHECK NUMERIC "0"
+// Retrieval info: PRIVATE: PLL_PFDENA_CHECK STRING "0"
+// Retrieval info: PRIVATE: PLL_TARGET_HARCOPY_CHECK NUMERIC "0"
+// Retrieval info: PRIVATE: PRIMARY_CLK_COMBO STRING "inclk0"
+// Retrieval info: PRIVATE: RECONFIG_FILE STRING "pll1.mif"
+// Retrieval info: PRIVATE: SACN_INPUTS_CHECK STRING "0"
+// Retrieval info: PRIVATE: SCAN_FEATURE_ENABLED STRING "1"
+// Retrieval info: PRIVATE: SELF_RESET_LOCK_LOSS STRING "0"
+// Retrieval info: PRIVATE: SHORT_SCAN_RADIO STRING "0"
+// Retrieval info: PRIVATE: SPREAD_FEATURE_ENABLED STRING "0"
+// Retrieval info: PRIVATE: SPREAD_FREQ STRING "50.000"
+// Retrieval info: PRIVATE: SPREAD_FREQ_UNIT STRING "KHz"
+// Retrieval info: PRIVATE: SPREAD_PERCENT STRING "0.500"
+// Retrieval info: PRIVATE: SPREAD_USE STRING "0"
+// Retrieval info: PRIVATE: SRC_SYNCH_COMP_RADIO STRING "0"
+// Retrieval info: PRIVATE: STICKY_CLK0 STRING "1"
+// Retrieval info: PRIVATE: SWITCHOVER_COUNT_EDIT NUMERIC "1"
+// Retrieval info: PRIVATE: SWITCHOVER_FEATURE_ENABLED STRING "1"
+// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0"
+// Retrieval info: PRIVATE: USE_CLK0 STRING "1"
+// Retrieval info: PRIVATE: USE_CLKENA0 STRING "0"
+// Retrieval info: PRIVATE: USE_MIL_SPEED_GRADE NUMERIC "0"
+// Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING "0"
+// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
+// Retrieval info: CONSTANT: BANDWIDTH_TYPE STRING "AUTO"
+// Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "128"
+// Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC "50"
+// Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "125"
+// Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING "0"
+// Retrieval info: CONSTANT: COMPENSATE_CLOCK STRING "CLK0"
+// Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC "61035"
+// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone IV E"
+// Retrieval info: CONSTANT: LPM_TYPE STRING "altpll"
+// Retrieval info: CONSTANT: OPERATION_MODE STRING "NORMAL"
+// Retrieval info: CONSTANT: PLL_TYPE STRING "AUTO"
+// Retrieval info: CONSTANT: PORT_ACTIVECLOCK STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_ARESET STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_CLKBAD0 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_CLKBAD1 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_CLKLOSS STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_CLKSWITCH STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_CONFIGUPDATE STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_FBIN STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_INCLK0 STRING "PORT_USED"
+// Retrieval info: CONSTANT: PORT_INCLK1 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_LOCKED STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_PFDENA STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_PHASECOUNTERSELECT STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_PHASEDONE STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_PHASESTEP STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_PHASEUPDOWN STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_PLLENA STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANACLR STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANCLK STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANCLKENA STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANDATA STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANDATAOUT STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANDONE STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANREAD STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANWRITE STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clk0 STRING "PORT_USED"
+// Retrieval info: CONSTANT: PORT_clk1 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clk2 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clk3 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clk4 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clk5 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clkena0 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clkena1 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clkena2 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clkena3 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clkena4 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clkena5 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_extclk0 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_extclk1 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_extclk2 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_extclk3 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: WIDTH_CLOCK NUMERIC "5"
+// Retrieval info: USED_PORT: @clk 0 0 5 0 OUTPUT_CLK_EXT VCC "@clk[4..0]"
+// Retrieval info: USED_PORT: c0 0 0 0 0 OUTPUT_CLK_EXT VCC "c0"
+// Retrieval info: USED_PORT: inclk0 0 0 0 0 INPUT_CLK_EXT GND "inclk0"
+// Retrieval info: CONNECT: @inclk 0 0 1 1 GND 0 0 0 0
+// Retrieval info: CONNECT: @inclk 0 0 1 0 inclk0 0 0 0 0
+// Retrieval info: CONNECT: c0 0 0 0 0 @clk 0 0 1 0
+// Retrieval info: GEN_FILE: TYPE_NORMAL pll1.v TRUE
+// Retrieval info: GEN_FILE: TYPE_NORMAL pll1.ppf TRUE
+// Retrieval info: GEN_FILE: TYPE_NORMAL pll1.inc FALSE
+// Retrieval info: GEN_FILE: TYPE_NORMAL pll1.cmp FALSE
+// Retrieval info: GEN_FILE: TYPE_NORMAL pll1.bsf TRUE
+// Retrieval info: GEN_FILE: TYPE_NORMAL pll1_inst.v FALSE
+// Retrieval info: GEN_FILE: TYPE_NORMAL pll1_bb.v TRUE
+// Retrieval info: CBX_MODULE_PREFIX: ON
trunk/testbench/altera_project/test_usb_ft232h/pll1_bb.v
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/pll2.bsf
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/pll2.bsf (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/pll2.bsf (revision 6)
@@ -0,0 +1,82 @@
+/*
+WARNING: Do NOT edit the input and output ports in this file in a text
+editor if you plan to continue editing the block that represents it in
+the Block Editor! File corruption is VERY likely to occur.
+*/
+/*
+Copyright (C) 2016 Intel Corporation. All rights reserved.
+Your use of Intel Corporation's design tools, logic functions
+and other software and tools, and its AMPP partner logic
+functions, and any output files from any of the foregoing
+(including device programming or simulation files), and any
+associated documentation or information are expressly subject
+to the terms and conditions of the Intel Program License
+Subscription Agreement, the Intel Quartus Prime License Agreement,
+the Intel MegaCore Function License Agreement, or other
+applicable license agreement, including, without limitation,
+that your use is for the sole purpose of programming logic
+devices manufactured by Intel and sold by Intel or its
+authorized distributors. Please refer to the applicable
+agreement for further details.
+*/
+(header "symbol" (version "1.2"))
+(symbol
+ (rect 0 0 240 168)
+ (text "pll2" (rect 110 0 133 16)(font "Arial" (font_size 10)))
+ (text "inst" (rect 8 152 25 164)(font "Arial" ))
+ (port
+ (pt 0 64)
+ (input)
+ (text "inclk0" (rect 0 0 31 14)(font "Arial" (font_size 8)))
+ (text "inclk0" (rect 4 50 29 63)(font "Arial" (font_size 8)))
+ (line (pt 0 64)(pt 40 64))
+ )
+ (port
+ (pt 240 64)
+ (output)
+ (text "c0" (rect 0 0 14 14)(font "Arial" (font_size 8)))
+ (text "c0" (rect 224 50 234 63)(font "Arial" (font_size 8)))
+ )
+ (port
+ (pt 240 80)
+ (output)
+ (text "c1" (rect 0 0 14 14)(font "Arial" (font_size 8)))
+ (text "c1" (rect 224 66 232 79)(font "Arial" (font_size 8)))
+ )
+ (drawing
+ (text "Cyclone IV E" (rect 164 152 383 315)(font "Arial" ))
+ (text "inclk0 frequency: 16.000 MHz" (rect 50 59 223 129)(font "Arial" ))
+ (text "Operation Mode: Normal" (rect 50 72 199 155)(font "Arial" ))
+ (text "Clk " (rect 51 93 116 197)(font "Arial" ))
+ (text "Ratio" (rect 72 93 164 197)(font "Arial" ))
+ (text "Ph (dg)" (rect 98 93 225 197)(font "Arial" ))
+ (text "DC (%)" (rect 132 93 294 197)(font "Arial" ))
+ (text "c0" (rect 54 107 116 225)(font "Arial" ))
+ (text "25/4" (rect 74 107 165 225)(font "Arial" ))
+ (text "0.00" (rect 104 107 224 225)(font "Arial" ))
+ (text "50.00" (rect 136 107 293 225)(font "Arial" ))
+ (text "c1" (rect 54 121 115 253)(font "Arial" ))
+ (text "25/4" (rect 74 121 165 253)(font "Arial" ))
+ (text "-90.00" (rect 100 121 224 253)(font "Arial" ))
+ (text "50.00" (rect 136 121 293 253)(font "Arial" ))
+ (line (pt 0 0)(pt 241 0))
+ (line (pt 241 0)(pt 241 169))
+ (line (pt 0 169)(pt 241 169))
+ (line (pt 0 0)(pt 0 169))
+ (line (pt 48 91)(pt 164 91))
+ (line (pt 48 104)(pt 164 104))
+ (line (pt 48 118)(pt 164 118))
+ (line (pt 48 132)(pt 164 132))
+ (line (pt 48 91)(pt 48 132))
+ (line (pt 69 91)(pt 69 132)(line_width 3))
+ (line (pt 95 91)(pt 95 132)(line_width 3))
+ (line (pt 129 91)(pt 129 132)(line_width 3))
+ (line (pt 163 91)(pt 163 132))
+ (line (pt 40 48)(pt 207 48))
+ (line (pt 207 48)(pt 207 151))
+ (line (pt 40 151)(pt 207 151))
+ (line (pt 40 48)(pt 40 151))
+ (line (pt 239 64)(pt 207 64))
+ (line (pt 239 80)(pt 207 80))
+ )
+)
trunk/testbench/altera_project/test_usb_ft232h/pll2.bsf
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/pll2.ppf
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/pll2.ppf (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/pll2.ppf (revision 6)
@@ -0,0 +1,10 @@
+
+
+
+
+
+
+
+
+
+
trunk/testbench/altera_project/test_usb_ft232h/pll2.ppf
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/pll2.qip
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/pll2.qip (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/pll2.qip (revision 6)
@@ -0,0 +1,7 @@
+set_global_assignment -name IP_TOOL_NAME "ALTPLL"
+set_global_assignment -name IP_TOOL_VERSION "16.1"
+set_global_assignment -name IP_GENERATED_DEVICE_FAMILY "{Cyclone IV E}"
+set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) "pll2.v"]
+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "pll2.bsf"]
+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "pll2_bb.v"]
+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "pll2.ppf"]
trunk/testbench/altera_project/test_usb_ft232h/pll2.qip
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/pll2.v
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/pll2.v (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/pll2.v (revision 6)
@@ -0,0 +1,329 @@
+// megafunction wizard: %ALTPLL%
+// GENERATION: STANDARD
+// VERSION: WM1.0
+// MODULE: altpll
+
+// ============================================================
+// File Name: pll2.v
+// Megafunction Name(s):
+// altpll
+//
+// Simulation Library Files(s):
+//
+// ============================================================
+// ************************************************************
+// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
+//
+// 16.1.0 Build 196 10/24/2016 SJ Lite Edition
+// ************************************************************
+
+
+//Copyright (C) 2016 Intel Corporation. All rights reserved.
+//Your use of Intel Corporation's design tools, logic functions
+//and other software and tools, and its AMPP partner logic
+//functions, and any output files from any of the foregoing
+//(including device programming or simulation files), and any
+//associated documentation or information are expressly subject
+//to the terms and conditions of the Intel Program License
+//Subscription Agreement, the Intel Quartus Prime License Agreement,
+//the Intel MegaCore Function License Agreement, or other
+//applicable license agreement, including, without limitation,
+//that your use is for the sole purpose of programming logic
+//devices manufactured by Intel and sold by Intel or its
+//authorized distributors. Please refer to the applicable
+//agreement for further details.
+
+
+// synopsys translate_off
+`timescale 1 ps / 1 ps
+// synopsys translate_on
+module pll2 (
+ inclk0,
+ c0,
+ c1);
+
+ input inclk0;
+ output c0;
+ output c1;
+
+ wire [0:0] sub_wire2 = 1'h0;
+ wire [4:0] sub_wire3;
+ wire sub_wire0 = inclk0;
+ wire [1:0] sub_wire1 = {sub_wire2, sub_wire0};
+ wire [1:1] sub_wire5 = sub_wire3[1:1];
+ wire [0:0] sub_wire4 = sub_wire3[0:0];
+ wire c0 = sub_wire4;
+ wire c1 = sub_wire5;
+
+ altpll altpll_component (
+ .inclk (sub_wire1),
+ .clk (sub_wire3),
+ .activeclock (),
+ .areset (1'b0),
+ .clkbad (),
+ .clkena ({6{1'b1}}),
+ .clkloss (),
+ .clkswitch (1'b0),
+ .configupdate (1'b0),
+ .enable0 (),
+ .enable1 (),
+ .extclk (),
+ .extclkena ({4{1'b1}}),
+ .fbin (1'b1),
+ .fbmimicbidir (),
+ .fbout (),
+ .fref (),
+ .icdrclk (),
+ .locked (),
+ .pfdena (1'b1),
+ .phasecounterselect ({4{1'b1}}),
+ .phasedone (),
+ .phasestep (1'b1),
+ .phaseupdown (1'b1),
+ .pllena (1'b1),
+ .scanaclr (1'b0),
+ .scanclk (1'b0),
+ .scanclkena (1'b1),
+ .scandata (1'b0),
+ .scandataout (),
+ .scandone (),
+ .scanread (1'b0),
+ .scanwrite (1'b0),
+ .sclkout0 (),
+ .sclkout1 (),
+ .vcooverrange (),
+ .vcounderrange ());
+ defparam
+ altpll_component.bandwidth_type = "AUTO",
+ altpll_component.clk0_divide_by = 4,
+ altpll_component.clk0_duty_cycle = 50,
+ altpll_component.clk0_multiply_by = 25,
+ altpll_component.clk0_phase_shift = "0",
+ altpll_component.clk1_divide_by = 4,
+ altpll_component.clk1_duty_cycle = 50,
+ altpll_component.clk1_multiply_by = 25,
+ altpll_component.clk1_phase_shift = "-2500",
+ altpll_component.compensate_clock = "CLK0",
+ altpll_component.inclk0_input_frequency = 62500,
+ altpll_component.intended_device_family = "Cyclone IV E",
+ altpll_component.lpm_hint = "CBX_MODULE_PREFIX=pll2",
+ altpll_component.lpm_type = "altpll",
+ altpll_component.operation_mode = "NORMAL",
+ altpll_component.pll_type = "AUTO",
+ altpll_component.port_activeclock = "PORT_UNUSED",
+ altpll_component.port_areset = "PORT_UNUSED",
+ altpll_component.port_clkbad0 = "PORT_UNUSED",
+ altpll_component.port_clkbad1 = "PORT_UNUSED",
+ altpll_component.port_clkloss = "PORT_UNUSED",
+ altpll_component.port_clkswitch = "PORT_UNUSED",
+ altpll_component.port_configupdate = "PORT_UNUSED",
+ altpll_component.port_fbin = "PORT_UNUSED",
+ altpll_component.port_inclk0 = "PORT_USED",
+ altpll_component.port_inclk1 = "PORT_UNUSED",
+ altpll_component.port_locked = "PORT_UNUSED",
+ altpll_component.port_pfdena = "PORT_UNUSED",
+ altpll_component.port_phasecounterselect = "PORT_UNUSED",
+ altpll_component.port_phasedone = "PORT_UNUSED",
+ altpll_component.port_phasestep = "PORT_UNUSED",
+ altpll_component.port_phaseupdown = "PORT_UNUSED",
+ altpll_component.port_pllena = "PORT_UNUSED",
+ altpll_component.port_scanaclr = "PORT_UNUSED",
+ altpll_component.port_scanclk = "PORT_UNUSED",
+ altpll_component.port_scanclkena = "PORT_UNUSED",
+ altpll_component.port_scandata = "PORT_UNUSED",
+ altpll_component.port_scandataout = "PORT_UNUSED",
+ altpll_component.port_scandone = "PORT_UNUSED",
+ altpll_component.port_scanread = "PORT_UNUSED",
+ altpll_component.port_scanwrite = "PORT_UNUSED",
+ altpll_component.port_clk0 = "PORT_USED",
+ altpll_component.port_clk1 = "PORT_USED",
+ altpll_component.port_clk2 = "PORT_UNUSED",
+ altpll_component.port_clk3 = "PORT_UNUSED",
+ altpll_component.port_clk4 = "PORT_UNUSED",
+ altpll_component.port_clk5 = "PORT_UNUSED",
+ altpll_component.port_clkena0 = "PORT_UNUSED",
+ altpll_component.port_clkena1 = "PORT_UNUSED",
+ altpll_component.port_clkena2 = "PORT_UNUSED",
+ altpll_component.port_clkena3 = "PORT_UNUSED",
+ altpll_component.port_clkena4 = "PORT_UNUSED",
+ altpll_component.port_clkena5 = "PORT_UNUSED",
+ altpll_component.port_extclk0 = "PORT_UNUSED",
+ altpll_component.port_extclk1 = "PORT_UNUSED",
+ altpll_component.port_extclk2 = "PORT_UNUSED",
+ altpll_component.port_extclk3 = "PORT_UNUSED",
+ altpll_component.width_clock = 5;
+
+
+endmodule
+
+// ============================================================
+// CNX file retrieval info
+// ============================================================
+// Retrieval info: PRIVATE: ACTIVECLK_CHECK STRING "0"
+// Retrieval info: PRIVATE: BANDWIDTH STRING "1.000"
+// Retrieval info: PRIVATE: BANDWIDTH_FEATURE_ENABLED STRING "1"
+// Retrieval info: PRIVATE: BANDWIDTH_FREQ_UNIT STRING "MHz"
+// Retrieval info: PRIVATE: BANDWIDTH_PRESET STRING "Low"
+// Retrieval info: PRIVATE: BANDWIDTH_USE_AUTO STRING "1"
+// Retrieval info: PRIVATE: BANDWIDTH_USE_PRESET STRING "0"
+// Retrieval info: PRIVATE: CLKBAD_SWITCHOVER_CHECK STRING "0"
+// Retrieval info: PRIVATE: CLKLOSS_CHECK STRING "0"
+// Retrieval info: PRIVATE: CLKSWITCH_CHECK STRING "0"
+// Retrieval info: PRIVATE: CNX_NO_COMPENSATE_RADIO STRING "0"
+// Retrieval info: PRIVATE: CREATE_CLKBAD_CHECK STRING "0"
+// Retrieval info: PRIVATE: CREATE_INCLK1_CHECK STRING "0"
+// Retrieval info: PRIVATE: CUR_DEDICATED_CLK STRING "c0"
+// Retrieval info: PRIVATE: CUR_FBIN_CLK STRING "c0"
+// Retrieval info: PRIVATE: DEVICE_SPEED_GRADE STRING "8"
+// Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC "1"
+// Retrieval info: PRIVATE: DIV_FACTOR1 NUMERIC "1"
+// Retrieval info: PRIVATE: DUTY_CYCLE0 STRING "50.00000000"
+// Retrieval info: PRIVATE: DUTY_CYCLE1 STRING "50.00000000"
+// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE0 STRING "100.000000"
+// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE1 STRING "100.000000"
+// Retrieval info: PRIVATE: EXPLICIT_SWITCHOVER_COUNTER STRING "0"
+// Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING "0"
+// Retrieval info: PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING "1"
+// Retrieval info: PRIVATE: GLOCKED_FEATURE_ENABLED STRING "0"
+// Retrieval info: PRIVATE: GLOCKED_MODE_CHECK STRING "0"
+// Retrieval info: PRIVATE: GLOCK_COUNTER_EDIT NUMERIC "1048575"
+// Retrieval info: PRIVATE: HAS_MANUAL_SWITCHOVER STRING "1"
+// Retrieval info: PRIVATE: INCLK0_FREQ_EDIT STRING "16.000"
+// Retrieval info: PRIVATE: INCLK0_FREQ_UNIT_COMBO STRING "MHz"
+// Retrieval info: PRIVATE: INCLK1_FREQ_EDIT STRING "100.000"
+// Retrieval info: PRIVATE: INCLK1_FREQ_EDIT_CHANGED STRING "1"
+// Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_CHANGED STRING "1"
+// Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_COMBO STRING "MHz"
+// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone IV E"
+// Retrieval info: PRIVATE: INT_FEEDBACK__MODE_RADIO STRING "1"
+// Retrieval info: PRIVATE: LOCKED_OUTPUT_CHECK STRING "0"
+// Retrieval info: PRIVATE: LONG_SCAN_RADIO STRING "1"
+// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE STRING "Not Available"
+// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE_DIRTY NUMERIC "0"
+// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING "deg"
+// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT1 STRING "deg"
+// Retrieval info: PRIVATE: MIG_DEVICE_SPEED_GRADE STRING "Any"
+// Retrieval info: PRIVATE: MIRROR_CLK0 STRING "0"
+// Retrieval info: PRIVATE: MIRROR_CLK1 STRING "0"
+// Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC "1"
+// Retrieval info: PRIVATE: MULT_FACTOR1 NUMERIC "1"
+// Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING "1"
+// Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "100.00000000"
+// Retrieval info: PRIVATE: OUTPUT_FREQ1 STRING "100.00000000"
+// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING "1"
+// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE1 STRING "1"
+// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT0 STRING "MHz"
+// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT1 STRING "MHz"
+// Retrieval info: PRIVATE: PHASE_RECONFIG_FEATURE_ENABLED STRING "1"
+// Retrieval info: PRIVATE: PHASE_RECONFIG_INPUTS_CHECK STRING "0"
+// Retrieval info: PRIVATE: PHASE_SHIFT0 STRING "0.00000000"
+// Retrieval info: PRIVATE: PHASE_SHIFT1 STRING "-90.00000000"
+// Retrieval info: PRIVATE: PHASE_SHIFT_STEP_ENABLED_CHECK STRING "0"
+// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT0 STRING "deg"
+// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT1 STRING "deg"
+// Retrieval info: PRIVATE: PLL_ADVANCED_PARAM_CHECK STRING "0"
+// Retrieval info: PRIVATE: PLL_ARESET_CHECK STRING "0"
+// Retrieval info: PRIVATE: PLL_AUTOPLL_CHECK NUMERIC "1"
+// Retrieval info: PRIVATE: PLL_ENHPLL_CHECK NUMERIC "0"
+// Retrieval info: PRIVATE: PLL_FASTPLL_CHECK NUMERIC "0"
+// Retrieval info: PRIVATE: PLL_FBMIMIC_CHECK STRING "0"
+// Retrieval info: PRIVATE: PLL_LVDS_PLL_CHECK NUMERIC "0"
+// Retrieval info: PRIVATE: PLL_PFDENA_CHECK STRING "0"
+// Retrieval info: PRIVATE: PLL_TARGET_HARCOPY_CHECK NUMERIC "0"
+// Retrieval info: PRIVATE: PRIMARY_CLK_COMBO STRING "inclk0"
+// Retrieval info: PRIVATE: RECONFIG_FILE STRING "pll2.mif"
+// Retrieval info: PRIVATE: SACN_INPUTS_CHECK STRING "0"
+// Retrieval info: PRIVATE: SCAN_FEATURE_ENABLED STRING "1"
+// Retrieval info: PRIVATE: SELF_RESET_LOCK_LOSS STRING "0"
+// Retrieval info: PRIVATE: SHORT_SCAN_RADIO STRING "0"
+// Retrieval info: PRIVATE: SPREAD_FEATURE_ENABLED STRING "0"
+// Retrieval info: PRIVATE: SPREAD_FREQ STRING "50.000"
+// Retrieval info: PRIVATE: SPREAD_FREQ_UNIT STRING "KHz"
+// Retrieval info: PRIVATE: SPREAD_PERCENT STRING "0.500"
+// Retrieval info: PRIVATE: SPREAD_USE STRING "0"
+// Retrieval info: PRIVATE: SRC_SYNCH_COMP_RADIO STRING "0"
+// Retrieval info: PRIVATE: STICKY_CLK0 STRING "1"
+// Retrieval info: PRIVATE: STICKY_CLK1 STRING "1"
+// Retrieval info: PRIVATE: SWITCHOVER_COUNT_EDIT NUMERIC "1"
+// Retrieval info: PRIVATE: SWITCHOVER_FEATURE_ENABLED STRING "1"
+// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0"
+// Retrieval info: PRIVATE: USE_CLK0 STRING "1"
+// Retrieval info: PRIVATE: USE_CLK1 STRING "1"
+// Retrieval info: PRIVATE: USE_CLKENA0 STRING "0"
+// Retrieval info: PRIVATE: USE_CLKENA1 STRING "0"
+// Retrieval info: PRIVATE: USE_MIL_SPEED_GRADE NUMERIC "0"
+// Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING "0"
+// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
+// Retrieval info: CONSTANT: BANDWIDTH_TYPE STRING "AUTO"
+// Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "4"
+// Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC "50"
+// Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "25"
+// Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING "0"
+// Retrieval info: CONSTANT: CLK1_DIVIDE_BY NUMERIC "4"
+// Retrieval info: CONSTANT: CLK1_DUTY_CYCLE NUMERIC "50"
+// Retrieval info: CONSTANT: CLK1_MULTIPLY_BY NUMERIC "25"
+// Retrieval info: CONSTANT: CLK1_PHASE_SHIFT STRING "-2500"
+// Retrieval info: CONSTANT: COMPENSATE_CLOCK STRING "CLK0"
+// Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC "62500"
+// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone IV E"
+// Retrieval info: CONSTANT: LPM_TYPE STRING "altpll"
+// Retrieval info: CONSTANT: OPERATION_MODE STRING "NORMAL"
+// Retrieval info: CONSTANT: PLL_TYPE STRING "AUTO"
+// Retrieval info: CONSTANT: PORT_ACTIVECLOCK STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_ARESET STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_CLKBAD0 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_CLKBAD1 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_CLKLOSS STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_CLKSWITCH STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_CONFIGUPDATE STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_FBIN STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_INCLK0 STRING "PORT_USED"
+// Retrieval info: CONSTANT: PORT_INCLK1 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_LOCKED STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_PFDENA STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_PHASECOUNTERSELECT STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_PHASEDONE STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_PHASESTEP STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_PHASEUPDOWN STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_PLLENA STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANACLR STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANCLK STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANCLKENA STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANDATA STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANDATAOUT STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANDONE STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANREAD STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANWRITE STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clk0 STRING "PORT_USED"
+// Retrieval info: CONSTANT: PORT_clk1 STRING "PORT_USED"
+// Retrieval info: CONSTANT: PORT_clk2 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clk3 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clk4 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clk5 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clkena0 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clkena1 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clkena2 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clkena3 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clkena4 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clkena5 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_extclk0 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_extclk1 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_extclk2 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_extclk3 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: WIDTH_CLOCK NUMERIC "5"
+// Retrieval info: USED_PORT: @clk 0 0 5 0 OUTPUT_CLK_EXT VCC "@clk[4..0]"
+// Retrieval info: USED_PORT: c0 0 0 0 0 OUTPUT_CLK_EXT VCC "c0"
+// Retrieval info: USED_PORT: c1 0 0 0 0 OUTPUT_CLK_EXT VCC "c1"
+// Retrieval info: USED_PORT: inclk0 0 0 0 0 INPUT_CLK_EXT GND "inclk0"
+// Retrieval info: CONNECT: @inclk 0 0 1 1 GND 0 0 0 0
+// Retrieval info: CONNECT: @inclk 0 0 1 0 inclk0 0 0 0 0
+// Retrieval info: CONNECT: c0 0 0 0 0 @clk 0 0 1 0
+// Retrieval info: CONNECT: c1 0 0 0 0 @clk 0 0 1 1
+// Retrieval info: GEN_FILE: TYPE_NORMAL pll2.v TRUE
+// Retrieval info: GEN_FILE: TYPE_NORMAL pll2.ppf TRUE
+// Retrieval info: GEN_FILE: TYPE_NORMAL pll2.inc FALSE
+// Retrieval info: GEN_FILE: TYPE_NORMAL pll2.cmp FALSE
+// Retrieval info: GEN_FILE: TYPE_NORMAL pll2.bsf TRUE
+// Retrieval info: GEN_FILE: TYPE_NORMAL pll2_inst.v FALSE
+// Retrieval info: GEN_FILE: TYPE_NORMAL pll2_bb.v TRUE
+// Retrieval info: CBX_MODULE_PREFIX: ON
trunk/testbench/altera_project/test_usb_ft232h/pll2.v
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/pll2_bb.v
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/pll2_bb.v (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/pll2_bb.v (revision 6)
@@ -0,0 +1,216 @@
+// megafunction wizard: %ALTPLL%VBB%
+// GENERATION: STANDARD
+// VERSION: WM1.0
+// MODULE: altpll
+
+// ============================================================
+// File Name: pll2.v
+// Megafunction Name(s):
+// altpll
+//
+// Simulation Library Files(s):
+//
+// ============================================================
+// ************************************************************
+// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
+//
+// 16.1.0 Build 196 10/24/2016 SJ Lite Edition
+// ************************************************************
+
+//Copyright (C) 2016 Intel Corporation. All rights reserved.
+//Your use of Intel Corporation's design tools, logic functions
+//and other software and tools, and its AMPP partner logic
+//functions, and any output files from any of the foregoing
+//(including device programming or simulation files), and any
+//associated documentation or information are expressly subject
+//to the terms and conditions of the Intel Program License
+//Subscription Agreement, the Intel Quartus Prime License Agreement,
+//the Intel MegaCore Function License Agreement, or other
+//applicable license agreement, including, without limitation,
+//that your use is for the sole purpose of programming logic
+//devices manufactured by Intel and sold by Intel or its
+//authorized distributors. Please refer to the applicable
+//agreement for further details.
+
+module pll2 (
+ inclk0,
+ c0,
+ c1);
+
+ input inclk0;
+ output c0;
+ output c1;
+
+endmodule
+
+// ============================================================
+// CNX file retrieval info
+// ============================================================
+// Retrieval info: PRIVATE: ACTIVECLK_CHECK STRING "0"
+// Retrieval info: PRIVATE: BANDWIDTH STRING "1.000"
+// Retrieval info: PRIVATE: BANDWIDTH_FEATURE_ENABLED STRING "1"
+// Retrieval info: PRIVATE: BANDWIDTH_FREQ_UNIT STRING "MHz"
+// Retrieval info: PRIVATE: BANDWIDTH_PRESET STRING "Low"
+// Retrieval info: PRIVATE: BANDWIDTH_USE_AUTO STRING "1"
+// Retrieval info: PRIVATE: BANDWIDTH_USE_PRESET STRING "0"
+// Retrieval info: PRIVATE: CLKBAD_SWITCHOVER_CHECK STRING "0"
+// Retrieval info: PRIVATE: CLKLOSS_CHECK STRING "0"
+// Retrieval info: PRIVATE: CLKSWITCH_CHECK STRING "0"
+// Retrieval info: PRIVATE: CNX_NO_COMPENSATE_RADIO STRING "0"
+// Retrieval info: PRIVATE: CREATE_CLKBAD_CHECK STRING "0"
+// Retrieval info: PRIVATE: CREATE_INCLK1_CHECK STRING "0"
+// Retrieval info: PRIVATE: CUR_DEDICATED_CLK STRING "c0"
+// Retrieval info: PRIVATE: CUR_FBIN_CLK STRING "c0"
+// Retrieval info: PRIVATE: DEVICE_SPEED_GRADE STRING "8"
+// Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC "1"
+// Retrieval info: PRIVATE: DIV_FACTOR1 NUMERIC "1"
+// Retrieval info: PRIVATE: DUTY_CYCLE0 STRING "50.00000000"
+// Retrieval info: PRIVATE: DUTY_CYCLE1 STRING "50.00000000"
+// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE0 STRING "100.000000"
+// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE1 STRING "100.000000"
+// Retrieval info: PRIVATE: EXPLICIT_SWITCHOVER_COUNTER STRING "0"
+// Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING "0"
+// Retrieval info: PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING "1"
+// Retrieval info: PRIVATE: GLOCKED_FEATURE_ENABLED STRING "0"
+// Retrieval info: PRIVATE: GLOCKED_MODE_CHECK STRING "0"
+// Retrieval info: PRIVATE: GLOCK_COUNTER_EDIT NUMERIC "1048575"
+// Retrieval info: PRIVATE: HAS_MANUAL_SWITCHOVER STRING "1"
+// Retrieval info: PRIVATE: INCLK0_FREQ_EDIT STRING "16.000"
+// Retrieval info: PRIVATE: INCLK0_FREQ_UNIT_COMBO STRING "MHz"
+// Retrieval info: PRIVATE: INCLK1_FREQ_EDIT STRING "100.000"
+// Retrieval info: PRIVATE: INCLK1_FREQ_EDIT_CHANGED STRING "1"
+// Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_CHANGED STRING "1"
+// Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_COMBO STRING "MHz"
+// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone IV E"
+// Retrieval info: PRIVATE: INT_FEEDBACK__MODE_RADIO STRING "1"
+// Retrieval info: PRIVATE: LOCKED_OUTPUT_CHECK STRING "0"
+// Retrieval info: PRIVATE: LONG_SCAN_RADIO STRING "1"
+// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE STRING "Not Available"
+// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE_DIRTY NUMERIC "0"
+// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING "deg"
+// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT1 STRING "deg"
+// Retrieval info: PRIVATE: MIG_DEVICE_SPEED_GRADE STRING "Any"
+// Retrieval info: PRIVATE: MIRROR_CLK0 STRING "0"
+// Retrieval info: PRIVATE: MIRROR_CLK1 STRING "0"
+// Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC "1"
+// Retrieval info: PRIVATE: MULT_FACTOR1 NUMERIC "1"
+// Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING "1"
+// Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "100.00000000"
+// Retrieval info: PRIVATE: OUTPUT_FREQ1 STRING "100.00000000"
+// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING "1"
+// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE1 STRING "1"
+// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT0 STRING "MHz"
+// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT1 STRING "MHz"
+// Retrieval info: PRIVATE: PHASE_RECONFIG_FEATURE_ENABLED STRING "1"
+// Retrieval info: PRIVATE: PHASE_RECONFIG_INPUTS_CHECK STRING "0"
+// Retrieval info: PRIVATE: PHASE_SHIFT0 STRING "0.00000000"
+// Retrieval info: PRIVATE: PHASE_SHIFT1 STRING "-90.00000000"
+// Retrieval info: PRIVATE: PHASE_SHIFT_STEP_ENABLED_CHECK STRING "0"
+// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT0 STRING "deg"
+// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT1 STRING "deg"
+// Retrieval info: PRIVATE: PLL_ADVANCED_PARAM_CHECK STRING "0"
+// Retrieval info: PRIVATE: PLL_ARESET_CHECK STRING "0"
+// Retrieval info: PRIVATE: PLL_AUTOPLL_CHECK NUMERIC "1"
+// Retrieval info: PRIVATE: PLL_ENHPLL_CHECK NUMERIC "0"
+// Retrieval info: PRIVATE: PLL_FASTPLL_CHECK NUMERIC "0"
+// Retrieval info: PRIVATE: PLL_FBMIMIC_CHECK STRING "0"
+// Retrieval info: PRIVATE: PLL_LVDS_PLL_CHECK NUMERIC "0"
+// Retrieval info: PRIVATE: PLL_PFDENA_CHECK STRING "0"
+// Retrieval info: PRIVATE: PLL_TARGET_HARCOPY_CHECK NUMERIC "0"
+// Retrieval info: PRIVATE: PRIMARY_CLK_COMBO STRING "inclk0"
+// Retrieval info: PRIVATE: RECONFIG_FILE STRING "pll2.mif"
+// Retrieval info: PRIVATE: SACN_INPUTS_CHECK STRING "0"
+// Retrieval info: PRIVATE: SCAN_FEATURE_ENABLED STRING "1"
+// Retrieval info: PRIVATE: SELF_RESET_LOCK_LOSS STRING "0"
+// Retrieval info: PRIVATE: SHORT_SCAN_RADIO STRING "0"
+// Retrieval info: PRIVATE: SPREAD_FEATURE_ENABLED STRING "0"
+// Retrieval info: PRIVATE: SPREAD_FREQ STRING "50.000"
+// Retrieval info: PRIVATE: SPREAD_FREQ_UNIT STRING "KHz"
+// Retrieval info: PRIVATE: SPREAD_PERCENT STRING "0.500"
+// Retrieval info: PRIVATE: SPREAD_USE STRING "0"
+// Retrieval info: PRIVATE: SRC_SYNCH_COMP_RADIO STRING "0"
+// Retrieval info: PRIVATE: STICKY_CLK0 STRING "1"
+// Retrieval info: PRIVATE: STICKY_CLK1 STRING "1"
+// Retrieval info: PRIVATE: SWITCHOVER_COUNT_EDIT NUMERIC "1"
+// Retrieval info: PRIVATE: SWITCHOVER_FEATURE_ENABLED STRING "1"
+// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0"
+// Retrieval info: PRIVATE: USE_CLK0 STRING "1"
+// Retrieval info: PRIVATE: USE_CLK1 STRING "1"
+// Retrieval info: PRIVATE: USE_CLKENA0 STRING "0"
+// Retrieval info: PRIVATE: USE_CLKENA1 STRING "0"
+// Retrieval info: PRIVATE: USE_MIL_SPEED_GRADE NUMERIC "0"
+// Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING "0"
+// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
+// Retrieval info: CONSTANT: BANDWIDTH_TYPE STRING "AUTO"
+// Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "4"
+// Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC "50"
+// Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "25"
+// Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING "0"
+// Retrieval info: CONSTANT: CLK1_DIVIDE_BY NUMERIC "4"
+// Retrieval info: CONSTANT: CLK1_DUTY_CYCLE NUMERIC "50"
+// Retrieval info: CONSTANT: CLK1_MULTIPLY_BY NUMERIC "25"
+// Retrieval info: CONSTANT: CLK1_PHASE_SHIFT STRING "-2500"
+// Retrieval info: CONSTANT: COMPENSATE_CLOCK STRING "CLK0"
+// Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC "62500"
+// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone IV E"
+// Retrieval info: CONSTANT: LPM_TYPE STRING "altpll"
+// Retrieval info: CONSTANT: OPERATION_MODE STRING "NORMAL"
+// Retrieval info: CONSTANT: PLL_TYPE STRING "AUTO"
+// Retrieval info: CONSTANT: PORT_ACTIVECLOCK STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_ARESET STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_CLKBAD0 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_CLKBAD1 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_CLKLOSS STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_CLKSWITCH STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_CONFIGUPDATE STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_FBIN STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_INCLK0 STRING "PORT_USED"
+// Retrieval info: CONSTANT: PORT_INCLK1 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_LOCKED STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_PFDENA STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_PHASECOUNTERSELECT STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_PHASEDONE STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_PHASESTEP STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_PHASEUPDOWN STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_PLLENA STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANACLR STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANCLK STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANCLKENA STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANDATA STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANDATAOUT STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANDONE STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANREAD STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANWRITE STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clk0 STRING "PORT_USED"
+// Retrieval info: CONSTANT: PORT_clk1 STRING "PORT_USED"
+// Retrieval info: CONSTANT: PORT_clk2 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clk3 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clk4 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clk5 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clkena0 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clkena1 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clkena2 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clkena3 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clkena4 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clkena5 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_extclk0 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_extclk1 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_extclk2 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_extclk3 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: WIDTH_CLOCK NUMERIC "5"
+// Retrieval info: USED_PORT: @clk 0 0 5 0 OUTPUT_CLK_EXT VCC "@clk[4..0]"
+// Retrieval info: USED_PORT: c0 0 0 0 0 OUTPUT_CLK_EXT VCC "c0"
+// Retrieval info: USED_PORT: c1 0 0 0 0 OUTPUT_CLK_EXT VCC "c1"
+// Retrieval info: USED_PORT: inclk0 0 0 0 0 INPUT_CLK_EXT GND "inclk0"
+// Retrieval info: CONNECT: @inclk 0 0 1 1 GND 0 0 0 0
+// Retrieval info: CONNECT: @inclk 0 0 1 0 inclk0 0 0 0 0
+// Retrieval info: CONNECT: c0 0 0 0 0 @clk 0 0 1 0
+// Retrieval info: CONNECT: c1 0 0 0 0 @clk 0 0 1 1
+// Retrieval info: GEN_FILE: TYPE_NORMAL pll2.v TRUE
+// Retrieval info: GEN_FILE: TYPE_NORMAL pll2.ppf TRUE
+// Retrieval info: GEN_FILE: TYPE_NORMAL pll2.inc FALSE
+// Retrieval info: GEN_FILE: TYPE_NORMAL pll2.cmp FALSE
+// Retrieval info: GEN_FILE: TYPE_NORMAL pll2.bsf TRUE
+// Retrieval info: GEN_FILE: TYPE_NORMAL pll2_inst.v FALSE
+// Retrieval info: GEN_FILE: TYPE_NORMAL pll2_bb.v TRUE
+// Retrieval info: CBX_MODULE_PREFIX: ON
trunk/testbench/altera_project/test_usb_ft232h/pll2_bb.v
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/pll_stp.bsf
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/pll_stp.bsf (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/pll_stp.bsf (revision 6)
@@ -0,0 +1,70 @@
+/*
+WARNING: Do NOT edit the input and output ports in this file in a text
+editor if you plan to continue editing the block that represents it in
+the Block Editor! File corruption is VERY likely to occur.
+*/
+/*
+Copyright (C) 2017 Intel Corporation. All rights reserved.
+Your use of Intel Corporation's design tools, logic functions
+and other software and tools, and its AMPP partner logic
+functions, and any output files from any of the foregoing
+(including device programming or simulation files), and any
+associated documentation or information are expressly subject
+to the terms and conditions of the Intel Program License
+Subscription Agreement, the Intel Quartus Prime License Agreement,
+the Intel MegaCore Function License Agreement, or other
+applicable license agreement, including, without limitation,
+that your use is for the sole purpose of programming logic
+devices manufactured by Intel and sold by Intel or its
+authorized distributors. Please refer to the applicable
+agreement for further details.
+*/
+(header "symbol" (version "1.2"))
+(symbol
+ (rect 0 0 240 152)
+ (text "pll_stp" (rect 101 0 145 16)(font "Arial" (font_size 10)))
+ (text "inst" (rect 8 136 25 148)(font "Arial" ))
+ (port
+ (pt 0 64)
+ (input)
+ (text "inclk0" (rect 0 0 31 14)(font "Arial" (font_size 8)))
+ (text "inclk0" (rect 4 50 29 63)(font "Arial" (font_size 8)))
+ (line (pt 0 64)(pt 40 64))
+ )
+ (port
+ (pt 240 64)
+ (output)
+ (text "c0" (rect 0 0 14 14)(font "Arial" (font_size 8)))
+ (text "c0" (rect 224 50 234 63)(font "Arial" (font_size 8)))
+ )
+ (drawing
+ (text "Cyclone IV E" (rect 164 136 383 283)(font "Arial" ))
+ (text "inclk0 frequency: 60.000 MHz" (rect 50 59 223 129)(font "Arial" ))
+ (text "Operation Mode: Normal" (rect 50 72 199 155)(font "Arial" ))
+ (text "Clk " (rect 51 93 116 197)(font "Arial" ))
+ (text "Ratio" (rect 72 93 164 197)(font "Arial" ))
+ (text "Ph (dg)" (rect 98 93 225 197)(font "Arial" ))
+ (text "DC (%)" (rect 132 93 294 197)(font "Arial" ))
+ (text "c0" (rect 54 107 116 225)(font "Arial" ))
+ (text "4/1" (rect 77 107 164 225)(font "Arial" ))
+ (text "86.40" (rect 102 107 225 225)(font "Arial" ))
+ (text "50.00" (rect 136 107 293 225)(font "Arial" ))
+ (line (pt 0 0)(pt 241 0))
+ (line (pt 241 0)(pt 241 153))
+ (line (pt 0 153)(pt 241 153))
+ (line (pt 0 0)(pt 0 153))
+ (line (pt 48 91)(pt 164 91))
+ (line (pt 48 104)(pt 164 104))
+ (line (pt 48 118)(pt 164 118))
+ (line (pt 48 91)(pt 48 118))
+ (line (pt 69 91)(pt 69 118)(line_width 3))
+ (line (pt 95 91)(pt 95 118)(line_width 3))
+ (line (pt 129 91)(pt 129 118)(line_width 3))
+ (line (pt 163 91)(pt 163 118))
+ (line (pt 40 48)(pt 207 48))
+ (line (pt 207 48)(pt 207 135))
+ (line (pt 40 135)(pt 207 135))
+ (line (pt 40 48)(pt 40 135))
+ (line (pt 239 64)(pt 207 64))
+ )
+)
trunk/testbench/altera_project/test_usb_ft232h/pll_stp.bsf
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/pll_stp.ppf
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/pll_stp.ppf (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/pll_stp.ppf (revision 6)
@@ -0,0 +1,9 @@
+
+
+
+
+
+
+
+
+
trunk/testbench/altera_project/test_usb_ft232h/pll_stp.ppf
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/pll_stp.qip
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/pll_stp.qip (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/pll_stp.qip (revision 6)
@@ -0,0 +1,7 @@
+set_global_assignment -name IP_TOOL_NAME "ALTPLL"
+set_global_assignment -name IP_TOOL_VERSION "16.1"
+set_global_assignment -name IP_GENERATED_DEVICE_FAMILY "{Cyclone IV E}"
+set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) "pll_stp.v"]
+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "pll_stp.bsf"]
+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "pll_stp_bb.v"]
+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "pll_stp.ppf"]
trunk/testbench/altera_project/test_usb_ft232h/pll_stp.qip
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/pll_stp.v
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/pll_stp.v (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/pll_stp.v (revision 6)
@@ -0,0 +1,302 @@
+// megafunction wizard: %ALTPLL%
+// GENERATION: STANDARD
+// VERSION: WM1.0
+// MODULE: altpll
+
+// ============================================================
+// File Name: pll_stp.v
+// Megafunction Name(s):
+// altpll
+//
+// Simulation Library Files(s):
+// altera_mf
+// ============================================================
+// ************************************************************
+// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
+//
+// 16.1.2 Build 203 01/18/2017 SJ Lite Edition
+// ************************************************************
+
+
+//Copyright (C) 2017 Intel Corporation. All rights reserved.
+//Your use of Intel Corporation's design tools, logic functions
+//and other software and tools, and its AMPP partner logic
+//functions, and any output files from any of the foregoing
+//(including device programming or simulation files), and any
+//associated documentation or information are expressly subject
+//to the terms and conditions of the Intel Program License
+//Subscription Agreement, the Intel Quartus Prime License Agreement,
+//the Intel MegaCore Function License Agreement, or other
+//applicable license agreement, including, without limitation,
+//that your use is for the sole purpose of programming logic
+//devices manufactured by Intel and sold by Intel or its
+//authorized distributors. Please refer to the applicable
+//agreement for further details.
+
+
+// synopsys translate_off
+`timescale 1 ps / 1 ps
+// synopsys translate_on
+module pll_stp (
+ inclk0,
+ c0);
+
+ input inclk0;
+ output c0;
+
+ wire [0:0] sub_wire2 = 1'h0;
+ wire [4:0] sub_wire3;
+ wire sub_wire0 = inclk0;
+ wire [1:0] sub_wire1 = {sub_wire2, sub_wire0};
+ wire [0:0] sub_wire4 = sub_wire3[0:0];
+ wire c0 = sub_wire4;
+
+ altpll altpll_component (
+ .inclk (sub_wire1),
+ .clk (sub_wire3),
+ .activeclock (),
+ .areset (1'b0),
+ .clkbad (),
+ .clkena ({6{1'b1}}),
+ .clkloss (),
+ .clkswitch (1'b0),
+ .configupdate (1'b0),
+ .enable0 (),
+ .enable1 (),
+ .extclk (),
+ .extclkena ({4{1'b1}}),
+ .fbin (1'b1),
+ .fbmimicbidir (),
+ .fbout (),
+ .fref (),
+ .icdrclk (),
+ .locked (),
+ .pfdena (1'b1),
+ .phasecounterselect ({4{1'b1}}),
+ .phasedone (),
+ .phasestep (1'b1),
+ .phaseupdown (1'b1),
+ .pllena (1'b1),
+ .scanaclr (1'b0),
+ .scanclk (1'b0),
+ .scanclkena (1'b1),
+ .scandata (1'b0),
+ .scandataout (),
+ .scandone (),
+ .scanread (1'b0),
+ .scanwrite (1'b0),
+ .sclkout0 (),
+ .sclkout1 (),
+ .vcooverrange (),
+ .vcounderrange ());
+ defparam
+ altpll_component.bandwidth_type = "AUTO",
+ altpll_component.clk0_divide_by = 1,
+ altpll_component.clk0_duty_cycle = 50,
+ altpll_component.clk0_multiply_by = 4,
+ altpll_component.clk0_phase_shift = "1000",
+ altpll_component.compensate_clock = "CLK0",
+ altpll_component.inclk0_input_frequency = 16666,
+ altpll_component.intended_device_family = "Cyclone IV E",
+ altpll_component.lpm_hint = "CBX_MODULE_PREFIX=pll_stp",
+ altpll_component.lpm_type = "altpll",
+ altpll_component.operation_mode = "NORMAL",
+ altpll_component.pll_type = "AUTO",
+ altpll_component.port_activeclock = "PORT_UNUSED",
+ altpll_component.port_areset = "PORT_UNUSED",
+ altpll_component.port_clkbad0 = "PORT_UNUSED",
+ altpll_component.port_clkbad1 = "PORT_UNUSED",
+ altpll_component.port_clkloss = "PORT_UNUSED",
+ altpll_component.port_clkswitch = "PORT_UNUSED",
+ altpll_component.port_configupdate = "PORT_UNUSED",
+ altpll_component.port_fbin = "PORT_UNUSED",
+ altpll_component.port_inclk0 = "PORT_USED",
+ altpll_component.port_inclk1 = "PORT_UNUSED",
+ altpll_component.port_locked = "PORT_UNUSED",
+ altpll_component.port_pfdena = "PORT_UNUSED",
+ altpll_component.port_phasecounterselect = "PORT_UNUSED",
+ altpll_component.port_phasedone = "PORT_UNUSED",
+ altpll_component.port_phasestep = "PORT_UNUSED",
+ altpll_component.port_phaseupdown = "PORT_UNUSED",
+ altpll_component.port_pllena = "PORT_UNUSED",
+ altpll_component.port_scanaclr = "PORT_UNUSED",
+ altpll_component.port_scanclk = "PORT_UNUSED",
+ altpll_component.port_scanclkena = "PORT_UNUSED",
+ altpll_component.port_scandata = "PORT_UNUSED",
+ altpll_component.port_scandataout = "PORT_UNUSED",
+ altpll_component.port_scandone = "PORT_UNUSED",
+ altpll_component.port_scanread = "PORT_UNUSED",
+ altpll_component.port_scanwrite = "PORT_UNUSED",
+ altpll_component.port_clk0 = "PORT_USED",
+ altpll_component.port_clk1 = "PORT_UNUSED",
+ altpll_component.port_clk2 = "PORT_UNUSED",
+ altpll_component.port_clk3 = "PORT_UNUSED",
+ altpll_component.port_clk4 = "PORT_UNUSED",
+ altpll_component.port_clk5 = "PORT_UNUSED",
+ altpll_component.port_clkena0 = "PORT_UNUSED",
+ altpll_component.port_clkena1 = "PORT_UNUSED",
+ altpll_component.port_clkena2 = "PORT_UNUSED",
+ altpll_component.port_clkena3 = "PORT_UNUSED",
+ altpll_component.port_clkena4 = "PORT_UNUSED",
+ altpll_component.port_clkena5 = "PORT_UNUSED",
+ altpll_component.port_extclk0 = "PORT_UNUSED",
+ altpll_component.port_extclk1 = "PORT_UNUSED",
+ altpll_component.port_extclk2 = "PORT_UNUSED",
+ altpll_component.port_extclk3 = "PORT_UNUSED",
+ altpll_component.width_clock = 5;
+
+
+endmodule
+
+// ============================================================
+// CNX file retrieval info
+// ============================================================
+// Retrieval info: PRIVATE: ACTIVECLK_CHECK STRING "0"
+// Retrieval info: PRIVATE: BANDWIDTH STRING "1.000"
+// Retrieval info: PRIVATE: BANDWIDTH_FEATURE_ENABLED STRING "1"
+// Retrieval info: PRIVATE: BANDWIDTH_FREQ_UNIT STRING "MHz"
+// Retrieval info: PRIVATE: BANDWIDTH_PRESET STRING "Low"
+// Retrieval info: PRIVATE: BANDWIDTH_USE_AUTO STRING "1"
+// Retrieval info: PRIVATE: BANDWIDTH_USE_PRESET STRING "0"
+// Retrieval info: PRIVATE: CLKBAD_SWITCHOVER_CHECK STRING "0"
+// Retrieval info: PRIVATE: CLKLOSS_CHECK STRING "0"
+// Retrieval info: PRIVATE: CLKSWITCH_CHECK STRING "0"
+// Retrieval info: PRIVATE: CNX_NO_COMPENSATE_RADIO STRING "0"
+// Retrieval info: PRIVATE: CREATE_CLKBAD_CHECK STRING "0"
+// Retrieval info: PRIVATE: CREATE_INCLK1_CHECK STRING "0"
+// Retrieval info: PRIVATE: CUR_DEDICATED_CLK STRING "c0"
+// Retrieval info: PRIVATE: CUR_FBIN_CLK STRING "c0"
+// Retrieval info: PRIVATE: DEVICE_SPEED_GRADE STRING "8"
+// Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC "1"
+// Retrieval info: PRIVATE: DUTY_CYCLE0 STRING "50.00000000"
+// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE0 STRING "240.000000"
+// Retrieval info: PRIVATE: EXPLICIT_SWITCHOVER_COUNTER STRING "0"
+// Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING "0"
+// Retrieval info: PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING "1"
+// Retrieval info: PRIVATE: GLOCKED_FEATURE_ENABLED STRING "0"
+// Retrieval info: PRIVATE: GLOCKED_MODE_CHECK STRING "0"
+// Retrieval info: PRIVATE: GLOCK_COUNTER_EDIT NUMERIC "1048575"
+// Retrieval info: PRIVATE: HAS_MANUAL_SWITCHOVER STRING "1"
+// Retrieval info: PRIVATE: INCLK0_FREQ_EDIT STRING "60.000"
+// Retrieval info: PRIVATE: INCLK0_FREQ_UNIT_COMBO STRING "MHz"
+// Retrieval info: PRIVATE: INCLK1_FREQ_EDIT STRING "100.000"
+// Retrieval info: PRIVATE: INCLK1_FREQ_EDIT_CHANGED STRING "1"
+// Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_CHANGED STRING "1"
+// Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_COMBO STRING "MHz"
+// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone IV E"
+// Retrieval info: PRIVATE: INT_FEEDBACK__MODE_RADIO STRING "1"
+// Retrieval info: PRIVATE: LOCKED_OUTPUT_CHECK STRING "0"
+// Retrieval info: PRIVATE: LONG_SCAN_RADIO STRING "1"
+// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE STRING "Not Available"
+// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE_DIRTY NUMERIC "0"
+// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING "deg"
+// Retrieval info: PRIVATE: MIG_DEVICE_SPEED_GRADE STRING "Any"
+// Retrieval info: PRIVATE: MIRROR_CLK0 STRING "0"
+// Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC "1"
+// Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING "1"
+// Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "240.00000000"
+// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING "1"
+// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT0 STRING "MHz"
+// Retrieval info: PRIVATE: PHASE_RECONFIG_FEATURE_ENABLED STRING "1"
+// Retrieval info: PRIVATE: PHASE_RECONFIG_INPUTS_CHECK STRING "0"
+// Retrieval info: PRIVATE: PHASE_SHIFT0 STRING "1.00000000"
+// Retrieval info: PRIVATE: PHASE_SHIFT_STEP_ENABLED_CHECK STRING "0"
+// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT0 STRING "ns"
+// Retrieval info: PRIVATE: PLL_ADVANCED_PARAM_CHECK STRING "0"
+// Retrieval info: PRIVATE: PLL_ARESET_CHECK STRING "0"
+// Retrieval info: PRIVATE: PLL_AUTOPLL_CHECK NUMERIC "1"
+// Retrieval info: PRIVATE: PLL_ENHPLL_CHECK NUMERIC "0"
+// Retrieval info: PRIVATE: PLL_FASTPLL_CHECK NUMERIC "0"
+// Retrieval info: PRIVATE: PLL_FBMIMIC_CHECK STRING "0"
+// Retrieval info: PRIVATE: PLL_LVDS_PLL_CHECK NUMERIC "0"
+// Retrieval info: PRIVATE: PLL_PFDENA_CHECK STRING "0"
+// Retrieval info: PRIVATE: PLL_TARGET_HARCOPY_CHECK NUMERIC "0"
+// Retrieval info: PRIVATE: PRIMARY_CLK_COMBO STRING "inclk0"
+// Retrieval info: PRIVATE: RECONFIG_FILE STRING "pll_stp.mif"
+// Retrieval info: PRIVATE: SACN_INPUTS_CHECK STRING "0"
+// Retrieval info: PRIVATE: SCAN_FEATURE_ENABLED STRING "1"
+// Retrieval info: PRIVATE: SELF_RESET_LOCK_LOSS STRING "0"
+// Retrieval info: PRIVATE: SHORT_SCAN_RADIO STRING "0"
+// Retrieval info: PRIVATE: SPREAD_FEATURE_ENABLED STRING "0"
+// Retrieval info: PRIVATE: SPREAD_FREQ STRING "50.000"
+// Retrieval info: PRIVATE: SPREAD_FREQ_UNIT STRING "KHz"
+// Retrieval info: PRIVATE: SPREAD_PERCENT STRING "0.500"
+// Retrieval info: PRIVATE: SPREAD_USE STRING "0"
+// Retrieval info: PRIVATE: SRC_SYNCH_COMP_RADIO STRING "0"
+// Retrieval info: PRIVATE: STICKY_CLK0 STRING "1"
+// Retrieval info: PRIVATE: SWITCHOVER_COUNT_EDIT NUMERIC "1"
+// Retrieval info: PRIVATE: SWITCHOVER_FEATURE_ENABLED STRING "1"
+// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0"
+// Retrieval info: PRIVATE: USE_CLK0 STRING "1"
+// Retrieval info: PRIVATE: USE_CLKENA0 STRING "0"
+// Retrieval info: PRIVATE: USE_MIL_SPEED_GRADE NUMERIC "0"
+// Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING "0"
+// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
+// Retrieval info: CONSTANT: BANDWIDTH_TYPE STRING "AUTO"
+// Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "1"
+// Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC "50"
+// Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "4"
+// Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING "1000"
+// Retrieval info: CONSTANT: COMPENSATE_CLOCK STRING "CLK0"
+// Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC "16666"
+// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone IV E"
+// Retrieval info: CONSTANT: LPM_TYPE STRING "altpll"
+// Retrieval info: CONSTANT: OPERATION_MODE STRING "NORMAL"
+// Retrieval info: CONSTANT: PLL_TYPE STRING "AUTO"
+// Retrieval info: CONSTANT: PORT_ACTIVECLOCK STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_ARESET STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_CLKBAD0 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_CLKBAD1 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_CLKLOSS STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_CLKSWITCH STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_CONFIGUPDATE STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_FBIN STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_INCLK0 STRING "PORT_USED"
+// Retrieval info: CONSTANT: PORT_INCLK1 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_LOCKED STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_PFDENA STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_PHASECOUNTERSELECT STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_PHASEDONE STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_PHASESTEP STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_PHASEUPDOWN STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_PLLENA STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANACLR STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANCLK STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANCLKENA STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANDATA STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANDATAOUT STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANDONE STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANREAD STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANWRITE STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clk0 STRING "PORT_USED"
+// Retrieval info: CONSTANT: PORT_clk1 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clk2 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clk3 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clk4 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clk5 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clkena0 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clkena1 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clkena2 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clkena3 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clkena4 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clkena5 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_extclk0 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_extclk1 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_extclk2 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_extclk3 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: WIDTH_CLOCK NUMERIC "5"
+// Retrieval info: USED_PORT: @clk 0 0 5 0 OUTPUT_CLK_EXT VCC "@clk[4..0]"
+// Retrieval info: USED_PORT: c0 0 0 0 0 OUTPUT_CLK_EXT VCC "c0"
+// Retrieval info: USED_PORT: inclk0 0 0 0 0 INPUT_CLK_EXT GND "inclk0"
+// Retrieval info: CONNECT: @inclk 0 0 1 1 GND 0 0 0 0
+// Retrieval info: CONNECT: @inclk 0 0 1 0 inclk0 0 0 0 0
+// Retrieval info: CONNECT: c0 0 0 0 0 @clk 0 0 1 0
+// Retrieval info: GEN_FILE: TYPE_NORMAL pll_stp.v TRUE
+// Retrieval info: GEN_FILE: TYPE_NORMAL pll_stp.ppf TRUE
+// Retrieval info: GEN_FILE: TYPE_NORMAL pll_stp.inc FALSE
+// Retrieval info: GEN_FILE: TYPE_NORMAL pll_stp.cmp FALSE
+// Retrieval info: GEN_FILE: TYPE_NORMAL pll_stp.bsf TRUE
+// Retrieval info: GEN_FILE: TYPE_NORMAL pll_stp_inst.v FALSE
+// Retrieval info: GEN_FILE: TYPE_NORMAL pll_stp_bb.v TRUE
+// Retrieval info: LIB_FILE: altera_mf
+// Retrieval info: CBX_MODULE_PREFIX: ON
trunk/testbench/altera_project/test_usb_ft232h/pll_stp.v
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h/.cproject
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h/.cproject (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h/.cproject (revision 6)
@@ -0,0 +1,83 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ make
+
+ mem_init_install
+ true
+ false
+ false
+
+
+ make
+
+ mem_init_generate
+ true
+ false
+ false
+
+
+ make
+
+ help
+ true
+ false
+ false
+
+
+
+
trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h/.cproject
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h/.project
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h/.project (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h/.project (revision 6)
@@ -0,0 +1,40 @@
+
+
+ usb_ft232h
+
+
+
+
+
+ com.altera.sbtgui.project.makefileBuilder
+
+
+
+
+ com.altera.sbtgui.project.makefileBuilder
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.genmakebuilder
+ clean,full,incremental,
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder
+ full,incremental,
+
+
+
+
+
+ org.eclipse.cdt.core.cnature
+ org.eclipse.cdt.managedbuilder.core.managedBuildNature
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
+ org.eclipse.cdt.core.ccnature
+ com.altera.sbtgui.project.SBTGUINature
+ com.altera.sbtgui.project.SBTGUIAppNature
+ com.altera.sbtgui.project.SBTGUIManagedNature
+
+
trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h/.project
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h/.settings/language.settings.xml
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h/.settings/language.settings.xml (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h/.settings/language.settings.xml (revision 6)
@@ -0,0 +1,15 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h/.settings/language.settings.xml
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h/Makefile
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h/Makefile (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h/Makefile (revision 6)
@@ -0,0 +1,1078 @@
+#------------------------------------------------------------------------------
+# VARIABLES APPENDED TO BY INCLUDED MAKEFILE FRAGMENTS
+#------------------------------------------------------------------------------
+
+# List of include directories for -I compiler option (-I added when used).
+# Includes the BSP.
+ALT_INCLUDE_DIRS :=
+
+# List of library directories for -L linker option (-L added when used).
+# Includes the BSP.
+ALT_LIBRARY_DIRS :=
+
+# List of library names for -l linker option (-l added when used).
+# Includes the BSP.
+ALT_LIBRARY_NAMES :=
+
+# List of library names for -msys-lib linker option (-msys-lib added when used).
+# These are libraries that might be located in the BSP and depend on the BSP
+# library, or vice versa
+ALT_BSP_DEP_LIBRARY_NAMES :=
+
+# List of dependencies for the linker. This is usually the full pathname
+# of each library (*.a) file.
+# Includes the BSP.
+ALT_LDDEPS :=
+
+# List of root library directories that support running make to build them.
+# Includes the BSP and any ALT libraries.
+MAKEABLE_LIBRARY_ROOT_DIRS :=
+
+# Generic flags passed to the compiler for different types of input files.
+ALT_CFLAGS :=
+ALT_CXXFLAGS :=
+ALT_CPPFLAGS :=
+ALT_ASFLAGS :=
+ALT_LDFLAGS :=
+
+
+#------------------------------------------------------------------------------
+# The adjust-path macro
+#
+# If COMSPEC/ComSpec is defined, Make is launched from Windows through
+# Cygwin. The adjust-path macro converts absolute windows paths into
+# unix style paths (Example: c:/dir -> /c/dir). This will ensture
+# paths are readable by GNU Make.
+#
+# If COMSPEC/ComSpec is not defined, Make is launched from linux, and no
+# adjustment is necessary
+#
+#------------------------------------------------------------------------------
+
+ifndef COMSPEC
+ifdef ComSpec
+COMSPEC = $(ComSpec)
+endif # ComSpec
+endif # COMSPEC
+
+ifdef COMSPEC # if Windows OS
+
+ifeq ($(MAKE_VERSION),3.81)
+#
+# adjust-path/adjust-path-mixed for Mingw Gnu Make on Windows
+#
+# Example Usage:
+# $(call adjust-path,c:/aaa/bbb) => /c/aaa/bbb
+# $(call adjust-path-mixed,/c/aaa/bbb) => c:/aaa/bbb
+# $(call adjust-path-mixed,/cygdrive/c/aaa/bbb) => c:/aaa/bbb
+#
+
+#
+# adjust-path
+# - converts back slash characters into forward slashes
+# - if input arg ($1) is an empty string then return the empty string
+# - if input arg ($1) does not contain the string ":/", then return input arg
+# - using sed, convert mixed path [c:/...] into mingw path [/c/...]
+define adjust-path
+$(strip \
+$(if $1,\
+$(if $(findstring :/,$(subst \,/,$1)),\
+$(shell echo $(subst \,/,$1) | sed -e 's,^\([a-zA-Z]\):/,/\1/,'),\
+$(subst \,/,$1))))
+endef
+
+#
+# adjust-path-mixed
+# - converts back slash characters into forward slashes
+# - if input arg ($1) is an empty string then return the empty string
+# - if input arg ($1) does not begin with a forward slash '/' char, then
+# return input arg
+# - using sed, convert mingw path [/c/...] or cygwin path [/c/cygdrive/...]
+# into a mixed path [c:/...]
+define adjust-path-mixed
+$(strip \
+$(if $1,\
+$(if $(findstring $(subst \,/,$1),$(patsubst /%,%,$(subst \,/,$1))),\
+$(subst \,/,$1),\
+$(shell echo $(subst \,/,$1) | sed -e 's,^/cygdrive/\([a-zA-Z]\)/,\1:/,' -e 's,^/\([a-zA-Z]\)/,\1:/,'))))
+endef
+
+else # MAKE_VERSION != 3.81 (MAKE_VERSION == 3.80 or MAKE_VERSION == 3.79)
+#
+# adjust-path for Cygwin Gnu Make
+# $(call adjust-path,c:/aaa/bbb) = /cygdrive/c/aaa/bbb
+# $(call adjust-path-mixed,/cygdrive/c/aaa/bbb) = c:/aaa/bbb
+#
+adjust-path = $(if $1,$(shell cygpath -u "$1"),)
+adjust-path-mixed = $(if $1,$(shell cygpath -m "$1"),)
+endif
+
+else # !COMSPEC
+
+adjust-path = $1
+adjust-path-mixed = $1
+
+endif # COMSPEC
+
+
+#vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv
+# GENERATED SETTINGS START v
+#vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv
+
+#START GENERATED
+ACTIVE_BUILD_CONFIG := default
+BUILD_CONFIGS := default
+
+# The following TYPE comment allows tools to identify the 'type' of target this
+# makefile is associated with.
+# TYPE: APP_MAKEFILE
+
+# This following VERSION comment indicates the version of the tool used to
+# generate this makefile. A makefile variable is provided for VERSION as well.
+# ACDS_VERSION: 16.0
+ACDS_VERSION := 16.0
+
+# This following BUILD_NUMBER comment indicates the build number of the tool
+# used to generate this makefile.
+# BUILD_NUMBER: 222
+
+# Define path to the application ELF.
+# It may be used by the makefile fragments so is defined before including them.
+#
+ELF := usb_ft232h.elf
+
+# Paths to C, C++, and assembly source files.
+C_SRCS :=
+CXX_SRCS := main.cpp
+ASM_SRCS :=
+
+
+# Path to root of object file tree.
+OBJ_ROOT_DIR := obj
+
+# Options to control objdump.
+CREATE_OBJDUMP := 1
+OBJDUMP_INCLUDE_SOURCE := 1
+OBJDUMP_FULL_CONTENTS := 0
+
+# Options to enable/disable optional files.
+CREATE_ELF_DERIVED_FILES := 0
+CREATE_LINKER_MAP := 1
+
+# Common arguments for ALT_CFLAGSs
+APP_CFLAGS_DEFINED_SYMBOLS :=
+APP_CFLAGS_UNDEFINED_SYMBOLS :=
+APP_CFLAGS_OPTIMIZATION := -O0
+APP_CFLAGS_DEBUG_LEVEL := -g
+APP_CFLAGS_WARNINGS := -Wall
+APP_CFLAGS_USER_FLAGS :=
+
+APP_ASFLAGS_USER :=
+APP_LDFLAGS_USER :=
+
+# Linker options that have default values assigned later if not
+# assigned here.
+LINKER_SCRIPT :=
+CRT0 :=
+SYS_LIB :=
+
+# Define path to the root of the BSP.
+BSP_ROOT_DIR := ../usb_ft232h_bsp/
+
+# List of application specific include directories, library directories and library names
+APP_INCLUDE_DIRS :=
+APP_LIBRARY_DIRS :=
+APP_LIBRARY_NAMES :=
+
+# Pre- and post- processor settings.
+BUILD_PRE_PROCESS :=
+BUILD_POST_PROCESS :=
+
+QUARTUS_PROJECT_DIR := ../../
+
+
+#END GENERATED
+
+#^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+# GENERATED SETTINGS END ^
+#^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+
+#------------------------------------------------------------------------------
+# DEFAULT TARGET
+#------------------------------------------------------------------------------
+
+# Define the variable used to echo output if not already defined.
+ifeq ($(ECHO),)
+ECHO := echo
+endif
+
+# Put "all" rule before included makefile fragments because they may
+# define rules and we don't want one of those to become the default rule.
+.PHONY : all
+
+all:
+ @$(ECHO) [$(APP_NAME) build complete]
+
+all : build_pre_process libs app build_post_process
+
+
+#------------------------------------------------------------------------------
+# VARIABLES DEPENDENT ON GENERATED CONTENT
+#------------------------------------------------------------------------------
+
+# Define object file directory per build configuration
+CONFIG_OBJ_DIR := $(OBJ_ROOT_DIR)/$(ACTIVE_BUILD_CONFIG)
+
+ifeq ($(BSP_ROOT_DIR),)
+$(error Edit Makefile and provide a value for BSP_ROOT_DIR)
+endif
+
+ifeq ($(wildcard $(BSP_ROOT_DIR)),)
+$(error BSP directory does not exist: $(BSP_ROOT_DIR))
+endif
+
+# Define absolute path to the root of the BSP.
+ABS_BSP_ROOT_DIR := $(call adjust-path-mixed,$(shell cd "$(BSP_ROOT_DIR)"; pwd))
+
+# Include makefile fragments. Define variable ALT_LIBRARY_ROOT_DIR before
+# including each makefile fragment so that it knows the path to itself.
+BSP_INCLUDE_FILE := $(BSP_ROOT_DIR)/public.mk
+ALT_LIBRARY_ROOT_DIR := $(BSP_ROOT_DIR)
+include $(BSP_INCLUDE_FILE)
+# C2H will need this to touch the BSP public.mk and avoid the sopc file
+# out-of-date error during a BSP make
+ABS_BSP_INCLUDE_FILE := $(ABS_BSP_ROOT_DIR)/public.mk
+
+
+ifneq ($(WARNING.SMALL_STACK_SIZE),)
+# This WARNING is here to protect you from unknowingly using a very small stack
+# If the warning is set, increase your stack size or enable the BSP small stack
+# setting to eliminate the warning
+$(warning WARNING: $(WARNING.SMALL_STACK_SIZE))
+endif
+
+# If the BSP public.mk indicates that ALT_SIM_OPTIMIZE is set, rename the ELF
+# by prefixing it with RUN_ON_HDL_SIMULATOR_ONLY_.
+ifneq ($(filter -DALT_SIM_OPTIMIZE,$(ALT_CPPFLAGS)),)
+ELF := RUN_ON_HDL_SIMULATOR_ONLY_$(ELF)
+endif
+
+# If the BSP public.mk indicates that ALT_PROVIDE_GMON is set, add option to
+# download_elf target
+ifneq ($(filter -DALT_PROVIDE_GMON,$(ALT_CPPFLAGS)),)
+GMON_OUT_FILENAME := gmon.out
+WRITE_GMON_OPTION := --write-gmon $(GMON_OUT_FILENAME)
+endif
+
+# Name of ELF application.
+APP_NAME := $(basename $(ELF))
+
+# Set to defaults if variables not already defined in settings.
+ifeq ($(LINKER_SCRIPT),)
+LINKER_SCRIPT := $(BSP_LINKER_SCRIPT)
+endif
+ifeq ($(CRT0),)
+CRT0 := $(BSP_CRT0)
+endif
+ifeq ($(SYS_LIB),)
+SYS_LIB := $(BSP_SYS_LIB)
+endif
+
+OBJDUMP_NAME := $(APP_NAME).objdump
+OBJDUMP_FLAGS := --disassemble --syms --all-header
+ifeq ($(OBJDUMP_INCLUDE_SOURCE),1)
+OBJDUMP_FLAGS += --source
+endif
+ifeq ($(OBJDUMP_FULL_CONTENTS),1)
+OBJDUMP_FLAGS += --full-contents
+endif
+
+# Create list of linker dependencies (*.a files).
+APP_LDDEPS := $(ALT_LDDEPS) $(LDDEPS)
+
+# Take lists and add required prefixes.
+APP_INC_DIRS := $(addprefix -I, $(ALT_INCLUDE_DIRS) $(APP_INCLUDE_DIRS) $(INC_DIRS))
+ASM_INC_PREFIX := -Wa,-I
+APP_ASM_INC_DIRS := $(addprefix $(ASM_INC_PREFIX), $(ALT_INCLUDE_DIRS) $(APP_INCLUDE_DIRS) $(INC_DIRS))
+APP_LIB_DIRS := $(addprefix -L, $(ALT_LIBRARY_DIRS) $(APP_LIBRARY_DIRS) $(LIB_DIRS))
+APP_LIBS := $(addprefix -l, $(ALT_LIBRARY_NAMES) $(APP_LIBRARY_NAMES) $(LIBS))
+
+ifneq ($(AVOID_NIOS2_GCC3_OPTIONS),)
+
+#
+# Avoid Nios II GCC 3.X options.
+#
+
+# Detect if small newlib C library is requested.
+# If yes, remove the -msmallc option because it is
+# now handled by other means.
+ifneq ($(filter -msmallc,$(ALT_LDFLAGS)),)
+ ALT_LDFLAGS := $(filter-out -msmallc,$(ALT_LDFLAGS))
+ ALT_C_LIBRARY := smallc
+else
+ ALT_C_LIBRARY := c
+endif
+
+# Put each BSP dependent library in a group to avoid circular dependencies.
+APP_BSP_DEP_LIBS := $(foreach l,$(ALT_BSP_DEP_LIBRARY_NAMES),-Wl,--start-group -l$(ALT_C_LIBRARY) -lgcc -lm -l$(l) -Wl,--end-group)
+
+else # !AVOID_NIOS2_GCC3_OPTIONS
+
+#
+# Use Nios II GCC 3.X options.
+#
+ALT_BSP_DEP_LIBRARY_NAMES += $(ALT_BSP_DEP_LIBRARY_NAMES) m
+APP_BSP_DEP_LIBS := $(addprefix -msys-lib=, $(ALT_BSP_DEP_LIBRARY_NAMES))
+
+endif # !AVOID_NIOS2_GCC3_OPTIONS
+
+# Arguments for the C preprocessor, C/C++ compiler, assembler, and linker.
+APP_CFLAGS := $(APP_CFLAGS_DEFINED_SYMBOLS) \
+ $(APP_CFLAGS_UNDEFINED_SYMBOLS) \
+ $(APP_CFLAGS_OPTIMIZATION) \
+ $(APP_CFLAGS_DEBUG_LEVEL) \
+ $(APP_CFLAGS_WARNINGS) \
+ $(APP_CFLAGS_USER_FLAGS) \
+ $(ALT_CFLAGS) \
+ $(CFLAGS)
+
+# Arguments only for the C++ compiler.
+APP_CXXFLAGS := $(ALT_CXXFLAGS) $(CXXFLAGS)
+
+# Arguments only for the C preprocessor.
+# Prefix each include directory with -I.
+APP_CPPFLAGS := $(APP_INC_DIRS) \
+ $(ALT_CPPFLAGS) \
+ $(CPPFLAGS)
+
+# Arguments only for the assembler.
+APP_ASFLAGS := $(APP_ASM_INC_DIRS) \
+ $(ALT_ASFLAGS) \
+ $(APP_ASFLAGS_USER) \
+ $(ASFLAGS)
+
+# Arguments only for the linker.
+APP_LDFLAGS := $(APP_LDFLAGS_USER)
+
+ifneq ($(LINKER_SCRIPT),)
+APP_LDFLAGS += -T'$(LINKER_SCRIPT)'
+endif
+
+ifneq ($(AVOID_NIOS2_GCC3_OPTIONS),)
+
+# Avoid Nios II GCC 3.x options.
+ifneq ($(CRT0),)
+APP_LDFLAGS += $(CRT0)
+endif
+
+# The equivalent of the -msys-lib option is provided
+# by the GROUP() command in the linker script.
+# Note this means the SYS_LIB variable is now ignored.
+
+else # !AVOID_NIOS2_GCC3_OPTIONS
+
+# Use Nios II GCC 3.x options.
+ifneq ($(CRT0),)
+APP_LDFLAGS += -msys-crt0='$(CRT0)'
+endif
+ifneq ($(SYS_LIB),)
+APP_LDFLAGS += -msys-lib=$(SYS_LIB)
+endif
+
+endif # !AVOID_NIOS2_GCC3_OPTIONS
+
+APP_LDFLAGS += \
+ $(APP_LIB_DIRS) \
+ $(ALT_LDFLAGS) \
+ $(LDFLAGS)
+
+LINKER_MAP_NAME := $(APP_NAME).map
+ifeq ($(CREATE_LINKER_MAP), 1)
+APP_LDFLAGS += -Wl,-Map=$(LINKER_MAP_NAME)
+endif
+
+# QUARTUS_PROJECT_DIR and SOPC_NAME need to be defined if you want the
+# mem_init_install target of the mem_init.mk (located in the associated BSP)
+# to know how to copy memory initialization files (e.g. .dat, .hex) into
+# directories required for Quartus compilation or RTL simulation.
+
+# Defining QUARTUS_PROJECT_DIR causes mem_init_install to copy memory
+# initialization files into your Quartus project directory. This is required
+# to provide the initial memory contents of FPGA memories that can be
+# initialized by the programming file (.sof) or Hardcopy ROMs. It is also used
+# for VHDL simulation of on-chip memories.
+
+# Defining SOPC_NAME causes the mem_init_install target to copy memory
+# initialization files into your RTL simulation directory. This is required
+# to provide the initial memory contents of all memories that can be
+# initialized by RTL simulation. This variable should be set to the same name
+# as your SOPC Builder system name. For example, if you have a system called
+# "foo.sopc", this variable should be set to "foo".
+
+# If SOPC_NAME is not set and QUARTUS_PROJECT_DIR is set, then derive SOPC_NAME.
+ifeq ($(SOPC_NAME),)
+ifneq ($(QUARTUS_PROJECT_DIR),)
+SOPC_NAME := $(basename $(notdir $(wildcard $(QUARTUS_PROJECT_DIR)/*.sopcinfo)))
+endif
+endif
+
+# Defining JDI_FILE is required to specify the JTAG Debug Information File
+# path. This file is generated by Quartus, and is needed along with the
+# .sopcinfo file to resolve processor instance ID's from names in a multi-CPU
+# systems. For multi-CPU systems, the processor instance ID is used to select
+# from multiple CPU's during ELF download.
+
+# Both JDI_FILE and SOPCINFO_FILE are provided by the BSP if they found during
+# BSP creation. If JDI_FILE is not set and QUARTUS_PROJECT_DIR is set, then
+# derive JDI_FILE. We do not attempt to derive SOPCINFO_FILE since there may be
+# multiple .sopcinfo files in a Quartus project.
+ifeq ($(JDI_FILE),)
+ifneq ($(QUARTUS_PROJECT_DIR),)
+JDI_FILE := $(firstword $(wildcard $(QUARTUS_PROJECT_DIR)/output_files/*.jdi) $(wildcard $(QUARTUS_PROJECT_DIR)/*.jdi))
+endif
+endif
+
+# Path to root runtime directory used for hdl simulation
+RUNTIME_ROOT_DIR := $(CONFIG_OBJ_DIR)/runtime
+
+
+
+#------------------------------------------------------------------------------
+# MAKEFILE INCLUDES DEPENDENT ON GENERATED CONTENT
+#------------------------------------------------------------------------------
+# mem_init.mk is a generated makefile fragment. This file defines all targets
+# used to generate HDL initialization simulation files and pre-initialized
+# onchip memory files.
+MEM_INIT_FILE := $(BSP_ROOT_DIR)/mem_init.mk
+include $(MEM_INIT_FILE)
+
+# Create list of object files to be built using the list of source files.
+# The source file hierarchy is preserved in the object tree.
+# The supported file extensions are:
+#
+# .c - for C files
+# .cxx .cc .cpp - for C++ files
+# .S .s - for assembler files
+#
+# Handle source files specified by --src-dir & --src-rdir differently, to
+# save some processing time in calling the adjust-path macro.
+
+OBJ_LIST_C := $(patsubst %.c,%.o,$(filter %.c,$(C_SRCS)))
+OBJ_LIST_CPP := $(patsubst %.cpp,%.o,$(filter %.cpp,$(CXX_SRCS)))
+OBJ_LIST_CXX := $(patsubst %.cxx,%.o,$(filter %.cxx,$(CXX_SRCS)))
+OBJ_LIST_CC := $(patsubst %.cc,%.o,$(filter %.cc,$(CXX_SRCS)))
+OBJ_LIST_S := $(patsubst %.S,%.o,$(filter %.S,$(ASM_SRCS)))
+OBJ_LIST_SS := $(patsubst %.s,%.o,$(filter %.s,$(ASM_SRCS)))
+
+OBJ_LIST := $(sort $(OBJ_LIST_C) $(OBJ_LIST_CPP) $(OBJ_LIST_CXX) \
+ $(OBJ_LIST_CC) $(OBJ_LIST_S) $(OBJ_LIST_SS))
+
+SDIR_OBJ_LIST_C := $(patsubst %.c,%.o,$(filter %.c,$(SDIR_C_SRCS)))
+SDIR_OBJ_LIST_CPP := $(patsubst %.cpp,%.o,$(filter %.cpp,$(SDIR_CXX_SRCS)))
+SDIR_OBJ_LIST_CXX := $(patsubst %.cxx,%.o,$(filter %.cxx,$(SDIR_CXX_SRCS)))
+SDIR_OBJ_LIST_CC := $(patsubst %.cc,%.o,$(filter %.cc,$(SDIR_CXX_SRCS)))
+SDIR_OBJ_LIST_S := $(patsubst %.S,%.o,$(filter %.S,$(SDIR_ASM_SRCS)))
+SDIR_OBJ_LIST_SS := $(patsubst %.s,%.o,$(filter %.s,$(SDIR_ASM_SRCS)))
+
+SDIR_OBJ_LIST := $(sort $(SDIR_OBJ_LIST_C) $(SDIR_OBJ_LIST_CPP) \
+ $(SDIR_OBJ_LIST_CXX) $(SDIR_OBJ_LIST_CC) $(SDIR_OBJ_LIST_S) \
+ $(SDIR_OBJ_LIST_SS))
+
+# Relative-pathed objects that being with "../" are handled differently.
+#
+# Regular objects are created as
+# $(CONFIG_OBJ_DIR)/
/.o
+# where the path structure is maintained under the obj directory. This
+# applies for both absolute and relative paths; in the absolute path
+# case this means the entire source path will be recreated under the obj
+# directory. This is done to allow two source files with the same name
+# to be included as part of the project.
+#
+# Note: On Cygwin, the path recreated under the obj directory will be
+# the cygpath -u output path.
+#
+# Relative-path objects that begin with "../" cause problems under this
+# scheme, as $(CONFIG_OBJ_DIR)/..// can potentially put the object
+# files anywhere in the system, creating clutter and polluting the source tree.
+# As such, their paths are flattened - the object file created will be
+# $(CONFIG_OBJ_DIR)/.o. Due to this, two files specified with
+# "../" in the beginning cannot have the same name in the project. VPATH
+# will be set for these sources to allow make to relocate the source file
+# via %.o rules.
+#
+# The following lines separate the object list into the flatten and regular
+# lists, and then handles them as appropriate.
+
+FLATTEN_OBJ_LIST := $(filter ../%,$(OBJ_LIST))
+FLATTEN_APP_OBJS := $(addprefix $(CONFIG_OBJ_DIR)/,$(notdir $(FLATTEN_OBJ_LIST)))
+
+REGULAR_OBJ_LIST := $(filter-out $(FLATTEN_OBJ_LIST),$(OBJ_LIST))
+REGULAR_OBJ_LIST_C := $(filter $(OBJ_LIST_C),$(REGULAR_OBJ_LIST))
+REGULAR_OBJ_LIST_CPP := $(filter $(OBJ_LIST_CPP),$(REGULAR_OBJ_LIST))
+REGULAR_OBJ_LIST_CXX := $(filter $(OBJ_LIST_CXX),$(REGULAR_OBJ_LIST))
+REGULAR_OBJ_LIST_CC := $(filter $(OBJ_LIST_CC),$(REGULAR_OBJ_LIST))
+REGULAR_OBJ_LIST_S := $(filter $(OBJ_LIST_S),$(REGULAR_OBJ_LIST))
+REGULAR_OBJ_LIST_SS := $(filter $(OBJ_LIST_SS),$(REGULAR_OBJ_LIST))
+
+FLATTEN_SDIR_OBJ_LIST := $(filter ../%,$(SDIR_OBJ_LIST))
+FLATTEN_SDIR_APP_OBJS := $(addprefix $(CONFIG_OBJ_DIR)/,$(notdir $(FLATTEN_SDIR_OBJ_LIST)))
+
+REGULAR_SDIR_OBJ_LIST := $(filter-out $(FLATTEN_SDIR_OBJ_LIST),$(SDIR_OBJ_LIST))
+REGULAR_SDIR_OBJ_LIST_C := $(filter $(SDIR_OBJ_LIST_C),$(REGULAR_SDIR_OBJ_LIST))
+REGULAR_SDIR_OBJ_LIST_CPP := $(filter $(SDIR_OBJ_LIST_CPP),$(REGULAR_SDIR_OBJ_LIST))
+REGULAR_SDIR_OBJ_LIST_CXX := $(filter $(SDIR_OBJ_LIST_CXX),$(REGULAR_SDIR_OBJ_LIST))
+REGULAR_SDIR_OBJ_LIST_CC := $(filter $(SDIR_OBJ_LIST_CC),$(REGULAR_SDIR_OBJ_LIST))
+REGULAR_SDIR_OBJ_LIST_S := $(filter $(SDIR_OBJ_LIST_S),$(REGULAR_SDIR_OBJ_LIST))
+REGULAR_SDIR_OBJ_LIST_SS := $(filter $(SDIR_OBJ_LIST_SS),$(REGULAR_SDIR_OBJ_LIST))
+
+VPATH := $(sort $(dir $(FLATTEN_OBJ_LIST)) $(dir $(FLATTEN_SDIR_OBJ_LIST)))
+
+APP_OBJS_C := $(addprefix $(CONFIG_OBJ_DIR)/,\
+ $(REGULAR_SDIR_OBJ_LIST_C) \
+ $(foreach s,$(REGULAR_OBJ_LIST_C),$(call adjust-path,$s)))
+
+APP_OBJS_CPP := $(addprefix $(CONFIG_OBJ_DIR)/,\
+ $(REGULAR_SDIR_OBJ_LIST_CPP) \
+ $(foreach s,$(REGULAR_OBJ_LIST_CPP),$(call adjust-path,$s)))
+
+APP_OBJS_CXX := $(addprefix $(CONFIG_OBJ_DIR)/,\
+ $(REGULAR_SDIR_OBJ_LIST_CXX) \
+ $(foreach s,$(REGULAR_OBJ_LIST_CXX),$(call adjust-path,$s)))
+
+APP_OBJS_CC := $(addprefix $(CONFIG_OBJ_DIR)/,\
+ $(REGULAR_SDIR_OBJ_LIST_CC) \
+ $(foreach s,$(REGULAR_OBJ_LIST_CC),$(call adjust-path,$s)))
+
+APP_OBJS_S := $(addprefix $(CONFIG_OBJ_DIR)/,\
+ $(REGULAR_SDIR_OBJ_LIST_S) \
+ $(foreach s,$(REGULAR_OBJ_LIST_S),$(call adjust-path,$s)))
+
+APP_OBJS_SS := $(addprefix $(CONFIG_OBJ_DIR)/,\
+ $(REGULAR_SDIR_OBJ_LIST_SS) \
+ $(foreach s,$(REGULAR_OBJ_LIST_SS),$(call adjust-path,$s)))
+
+APP_OBJS := $(APP_OBJS_C) $(APP_OBJS_CPP) $(APP_OBJS_CXX) $(APP_OBJS_CC) \
+ $(APP_OBJS_S) $(APP_OBJS_SS) \
+ $(FLATTEN_APP_OBJS) $(FLATTEN_SDIR_APP_OBJS)
+
+# Add any extra user-provided object files.
+APP_OBJS += $(OBJS)
+
+# Create list of dependancy files for each object file.
+APP_DEPS := $(APP_OBJS:.o=.d)
+
+# Patch the Elf file with system specific information
+
+# Patch the Elf with the name of the sopc system
+ifneq ($(SOPC_NAME),)
+ELF_PATCH_FLAG += --sopc_system_name $(SOPC_NAME)
+endif
+
+# Patch the Elf with the absolute path to the Quartus Project Directory
+ifneq ($(QUARTUS_PROJECT_DIR),)
+ABS_QUARTUS_PROJECT_DIR := $(call adjust-path-mixed,$(shell cd "$(QUARTUS_PROJECT_DIR)"; pwd))
+ELF_PATCH_FLAG += --quartus_project_dir "$(ABS_QUARTUS_PROJECT_DIR)"
+endif
+
+# Patch the Elf and download args with the JDI_FILE if specified
+ifneq ($(wildcard $(JDI_FILE)),)
+ELF_PATCH_FLAG += --jdi $(JDI_FILE)
+DOWNLOAD_JDI_FLAG := --jdi $(JDI_FILE)
+endif
+
+# Patch the Elf with the SOPCINFO_FILE if specified
+ifneq ($(wildcard $(SOPCINFO_FILE)),)
+ELF_PATCH_FLAG += --sopcinfo $(SOPCINFO_FILE)
+endif
+
+# Use the DOWNLOAD_CABLE variable to specify which JTAG cable to use.
+# This is not needed if you only have one cable.
+ifneq ($(DOWNLOAD_CABLE),)
+DOWNLOAD_CABLE_FLAG := --cable '$(DOWNLOAD_CABLE)'
+endif
+
+
+#------------------------------------------------------------------------------
+# BUILD PRE/POST PROCESS
+#------------------------------------------------------------------------------
+build_pre_process :
+ $(BUILD_PRE_PROCESS)
+
+build_post_process :
+ $(BUILD_POST_PROCESS)
+
+.PHONY: build_pre_process build_post_process
+
+
+#------------------------------------------------------------------------------
+# TOOLS
+#------------------------------------------------------------------------------
+
+#
+# Set tool default variables if not already defined.
+# If these are defined, they would typically be defined in an
+# included makefile fragment.
+#
+ifeq ($(DEFAULT_CROSS_COMPILE),)
+DEFAULT_CROSS_COMPILE := nios2-elf-
+endif
+
+ifeq ($(DEFAULT_STACKREPORT),)
+DEFAULT_STACKREPORT := nios2-stackreport
+endif
+
+ifeq ($(DEFAULT_DOWNLOAD),)
+DEFAULT_DOWNLOAD := nios2-download
+endif
+
+ifeq ($(DEFAULT_FLASHPROG),)
+DEFAULT_FLASHPROG := nios2-flash-programmer
+endif
+
+ifeq ($(DEFAULT_ELFPATCH),)
+DEFAULT_ELFPATCH := nios2-elf-insert
+endif
+
+ifeq ($(DEFAULT_RM),)
+DEFAULT_RM := rm -f
+endif
+
+ifeq ($(DEFAULT_CP),)
+DEFAULT_CP := cp -f
+endif
+
+ifeq ($(DEFAULT_MKDIR),)
+DEFAULT_MKDIR := mkdir -p
+endif
+
+#
+# Set tool variables to defaults if not already defined.
+# If these are defined, they would typically be defined by a
+# setting in the generated portion of this makefile.
+#
+ifeq ($(CROSS_COMPILE),)
+CROSS_COMPILE := $(DEFAULT_CROSS_COMPILE)
+endif
+
+ifeq ($(origin CC),default)
+CC := $(CROSS_COMPILE)gcc -xc
+endif
+
+ifeq ($(origin CXX),default)
+CXX := $(CROSS_COMPILE)gcc -xc++
+endif
+
+ifeq ($(origin AS),default)
+AS := $(CROSS_COMPILE)gcc
+endif
+
+ifeq ($(origin AR),default)
+AR := $(CROSS_COMPILE)ar
+endif
+
+ifeq ($(origin LD),default)
+LD := $(CROSS_COMPILE)g++
+endif
+
+ifeq ($(origin RM),default)
+RM := $(DEFAULT_RM)
+endif
+
+ifeq ($(NM),)
+NM := $(CROSS_COMPILE)nm
+endif
+
+ifeq ($(CP),)
+CP := $(DEFAULT_CP)
+endif
+
+ifeq ($(OBJDUMP),)
+OBJDUMP := $(CROSS_COMPILE)objdump
+endif
+
+ifeq ($(OBJCOPY),)
+OBJCOPY := $(CROSS_COMPILE)objcopy
+endif
+
+ifeq ($(STACKREPORT),)
+STACKREPORT := $(DEFAULT_STACKREPORT) --prefix $(CROSS_COMPILE)
+else
+DISABLE_STACKREPORT := 1
+endif
+
+ifeq ($(DOWNLOAD),)
+DOWNLOAD := $(DEFAULT_DOWNLOAD)
+endif
+
+ifeq ($(FLASHPROG),)
+FLASHPROG := $(DEFAULT_FLASHPROG)
+endif
+
+ifeq ($(ELFPATCH),)
+ELFPATCH := $(DEFAULT_ELFPATCH)
+endif
+
+ifeq ($(MKDIR),)
+MKDIR := $(DEFAULT_MKDIR)
+endif
+
+#------------------------------------------------------------------------------
+# PATTERN RULES TO BUILD OBJECTS
+#------------------------------------------------------------------------------
+
+define compile.c
+@$(ECHO) Info: Compiling $< to $@
+@$(MKDIR) $(@D)
+$(CC) -MP -MMD -c $(APP_CPPFLAGS) $(APP_CFLAGS) -o $@ $<
+$(CC_POST_PROCESS)
+endef
+
+define compile.cpp
+@$(ECHO) Info: Compiling $< to $@
+@$(MKDIR) $(@D)
+$(CXX) -MP -MMD -c $(APP_CPPFLAGS) $(APP_CXXFLAGS) $(APP_CFLAGS) -o $@ $<
+$(CXX_POST_PROCESS)
+endef
+
+# If assembling with the compiler, ensure "-Wa," is prepended to all APP_ASFLAGS
+ifeq ($(AS),$(patsubst %as,%,$(AS)))
+COMMA := ,
+APP_ASFLAGS := $(filter-out $(APP_CFLAGS),$(addprefix -Wa$(COMMA),$(patsubst -Wa$(COMMA)%,%,$(APP_ASFLAGS))))
+endif
+
+define compile.s
+@$(ECHO) Info: Assembling $< to $@
+@$(MKDIR) $(@D)
+$(AS) -MP -MMD -c $(APP_CPPFLAGS) $(APP_CFLAGS) $(APP_ASFLAGS) -o $@ $<
+$(AS_POST_PROCESS)
+endef
+
+ifeq ($(MAKE_VERSION),3.81)
+.SECONDEXPANSION:
+
+$(APP_OBJS_C): $(CONFIG_OBJ_DIR)/%.o: $$(call adjust-path-mixed,%.c)
+ $(compile.c)
+
+$(APP_OBJS_CPP): $(CONFIG_OBJ_DIR)/%.o: $$(call adjust-path-mixed,%.cpp)
+ $(compile.cpp)
+
+$(APP_OBJS_CC): $(CONFIG_OBJ_DIR)/%.o: $$(call adjust-path-mixed,%.cc)
+ $(compile.cpp)
+
+$(APP_OBJS_CXX): $(CONFIG_OBJ_DIR)/%.o: $$(call adjust-path-mixed,%.cxx)
+ $(compile.cpp)
+
+$(APP_OBJS_S): $(CONFIG_OBJ_DIR)/%.o: $$(call adjust-path-mixed,%.S)
+ $(compile.s)
+
+$(APP_OBJS_SS): $(CONFIG_OBJ_DIR)/%.o: $$(call adjust-path-mixed,%.s)
+ $(compile.s)
+
+endif # MAKE_VERSION != 3.81
+
+$(CONFIG_OBJ_DIR)/%.o: %.c
+ $(compile.c)
+
+$(CONFIG_OBJ_DIR)/%.o: %.cpp
+ $(compile.cpp)
+
+$(CONFIG_OBJ_DIR)/%.o: %.cc
+ $(compile.cpp)
+
+$(CONFIG_OBJ_DIR)/%.o: %.cxx
+ $(compile.cpp)
+
+$(CONFIG_OBJ_DIR)/%.o: %.S
+ $(compile.s)
+
+$(CONFIG_OBJ_DIR)/%.o: %.s
+ $(compile.s)
+
+
+#------------------------------------------------------------------------------
+# PATTERN RULES TO INTERMEDIATE FILES
+#------------------------------------------------------------------------------
+
+$(CONFIG_OBJ_DIR)/%.s: %.c
+ @$(ECHO) Info: Compiling $< to $@
+ @$(MKDIR) $(@D)
+ $(CC) -S $(APP_CPPFLAGS) $(APP_CFLAGS) -o $@ $<
+
+$(CONFIG_OBJ_DIR)/%.s: %.cpp
+ @$(ECHO) Info: Compiling $< to $@
+ @$(MKDIR) $(@D)
+ $(CXX) -S $(APP_CPPFLAGS) $(APP_CXXFLAGS) $(APP_CFLAGS) -o $@ $<
+
+$(CONFIG_OBJ_DIR)/%.s: %.cc
+ @$(ECHO) Info: Compiling $< to $@
+ @$(MKDIR) $(@D)
+ $(CXX) -S $(APP_CPPFLAGS) $(APP_CXXFLAGS) $(APP_CFLAGS) -o $@ $<
+
+$(CONFIG_OBJ_DIR)/%.s: %.cxx
+ @$(ECHO) Info: Compiling $< to $@
+ @$(MKDIR) $(@D)
+ $(CXX) -S $(APP_CPPFLAGS) $(APP_CXXFLAGS) $(APP_CFLAGS) -o $@ $<
+
+$(CONFIG_OBJ_DIR)/%.i: %.c
+ @$(ECHO) Info: Compiling $< to $@
+ @$(MKDIR) $(@D)
+ $(CC) -E $(APP_CPPFLAGS) $(APP_CFLAGS) -o $@ $<
+
+$(CONFIG_OBJ_DIR)/%.i: %.cpp
+ @$(ECHO) Info: Compiling $< to $@
+ @$(MKDIR) $(@D)
+ $(CXX) -E $(APP_CPPFLAGS) $(APP_CXXFLAGS) $(APP_CFLAGS) -o $@ $<
+
+$(CONFIG_OBJ_DIR)/%.i: %.cc
+ @$(ECHO) Info: Compiling $< to $@
+ @$(MKDIR) $(@D)
+ $(CXX) -E $(APP_CPPFLAGS) $(APP_CXXFLAGS) $(APP_CFLAGS) -o $@ $<
+
+$(CONFIG_OBJ_DIR)/%.i: %.cxx
+ @$(ECHO) Info: Compiling $< to $@
+ @$(MKDIR) $(@D)
+ $(CXX) -E $(APP_CPPFLAGS) $(APP_CXXFLAGS) $(APP_CFLAGS) -o $@ $<
+
+
+#------------------------------------------------------------------------------
+# TARGET RULES
+#------------------------------------------------------------------------------
+
+.PHONY : help
+help :
+ @$(ECHO) "Summary of Makefile targets"
+ @$(ECHO) " Build targets:"
+ @$(ECHO) " all (default) - Application and all libraries (including BSP)"
+ @$(ECHO) " bsp - Just the BSP"
+ @$(ECHO) " libs - All libraries (including BSP)"
+ @$(ECHO) " flash - All flash files"
+ @$(ECHO) " mem_init_generate - All memory initialization files"
+ @$(ECHO)
+ @$(ECHO) " Clean targets:"
+ @$(ECHO) " clean_all - Application and all libraries (including BSP)"
+ @$(ECHO) " clean - Just the application"
+ @$(ECHO) " clean_bsp - Just the BSP"
+ @$(ECHO) " clean_libs - All libraries (including BSP)"
+ @$(ECHO)
+ @$(ECHO) " Run targets:"
+ @$(ECHO) " download-elf - Download and run your elf executable"
+ @$(ECHO) " program-flash - Program flash contents to the board"
+
+# Handy rule to skip making libraries and just make application.
+.PHONY : app
+app : $(ELF)
+
+ifeq ($(CREATE_OBJDUMP), 1)
+app : $(OBJDUMP_NAME)
+endif
+
+ifeq ($(CREATE_ELF_DERIVED_FILES),1)
+app : elf_derived_files
+endif
+
+.PHONY: elf_derived_files
+elf_derived_files: default_mem_init
+
+# Handy rule for making just the BSP.
+.PHONY : bsp
+bsp :
+ @$(ECHO) Info: Building $(BSP_ROOT_DIR)
+ @$(MAKE) --no-print-directory -C $(BSP_ROOT_DIR)
+
+
+# Make sure all makeable libraries (including the BSP) are up-to-date.
+LIB_TARGETS := $(patsubst %,%-recurs-make-lib,$(MAKEABLE_LIBRARY_ROOT_DIRS))
+
+.PHONY : libs
+libs : $(LIB_TARGETS)
+
+ifneq ($(strip $(LIB_TARGETS)),)
+$(LIB_TARGETS): %-recurs-make-lib:
+ @$(ECHO) Info: Building $*
+ $(MAKE) --no-print-directory -C $*
+endif
+
+ifneq ($(strip $(APP_LDDEPS)),)
+$(APP_LDDEPS): libs
+ @true
+endif
+
+# Rules to force your project to rebuild or relink
+# .force_relink file will cause any application that depends on this project to relink
+# .force_rebuild file will cause this project to rebuild object files
+# .force_rebuild_all file will cause this project and any project that depends on this project to rebuild object files
+
+FORCE_RELINK_DEP := .force_relink
+FORCE_REBUILD_DEP := .force_rebuild
+FORCE_REBUILD_ALL_DEP := .force_rebuild_all
+FORCE_REBUILD_DEP_LIST := $(CONFIG_OBJ_DIR)/$(FORCE_RELINK_DEP) $(CONFIG_OBJ_DIR)/$(FORCE_REBUILD_DEP) $(FORCE_REBUILD_ALL_DEP)
+
+$(FORCE_REBUILD_DEP_LIST):
+
+$(APP_OBJS): $(wildcard $(CONFIG_OBJ_DIR)/$(FORCE_REBUILD_DEP)) $(wildcard $(addsuffix /$(FORCE_REBUILD_ALL_DEP), . $(ALT_LIBRARY_DIRS)))
+
+$(ELF): $(wildcard $(addsuffix /$(FORCE_RELINK_DEP), $(CONFIG_OBJ_DIR) $(ALT_LIBRARY_DIRS)))
+
+
+# Clean just the application.
+.PHONY : clean
+ifeq ($(CREATE_ELF_DERIVED_FILES),1)
+clean : clean_elf_derived_files
+endif
+
+clean :
+ @$(RM) -r $(ELF) $(OBJDUMP_NAME) $(LINKER_MAP_NAME) $(OBJ_ROOT_DIR) $(RUNTIME_ROOT_DIR) $(FORCE_REBUILD_DEP_LIST)
+ @$(ECHO) [$(APP_NAME) clean complete]
+
+# Clean just the BSP.
+.PHONY : clean_bsp
+clean_bsp :
+ @$(ECHO) Info: Cleaning $(BSP_ROOT_DIR)
+ @$(MAKE) --no-print-directory -C $(BSP_ROOT_DIR) clean
+
+# Clean all makeable libraries including the BSP.
+LIB_CLEAN_TARGETS := $(patsubst %,%-recurs-make-clean-lib,$(MAKEABLE_LIBRARY_ROOT_DIRS))
+
+.PHONY : clean_libs
+clean_libs : $(LIB_CLEAN_TARGETS)
+
+ifneq ($(strip $(LIB_CLEAN_TARGETS)),)
+$(LIB_CLEAN_TARGETS): %-recurs-make-clean-lib:
+ @$(ECHO) Info: Cleaning $*
+ $(MAKE) --no-print-directory -C $* clean
+endif
+
+.PHONY: clean_elf_derived_files
+clean_elf_derived_files: mem_init_clean
+
+# Clean application and all makeable libraries including the BSP.
+.PHONY : clean_all
+clean_all : clean mem_init_clean clean_libs
+
+# Include the dependency files unless the make goal is performing a clean
+# of the application.
+ifneq ($(firstword $(MAKECMDGOALS)),clean)
+ifneq ($(firstword $(MAKECMDGOALS)),clean_all)
+-include $(APP_DEPS)
+endif
+endif
+
+.PHONY : download-elf
+download-elf : $(ELF)
+ @if [ "$(DOWNLOAD)" = "none" ]; \
+ then \
+ $(ECHO) Downloading $(ELF) not supported; \
+ else \
+ $(ECHO) Info: Downloading $(ELF); \
+ $(DOWNLOAD) --go --cpu_name=$(CPU_NAME) $(DOWNLOAD_CABLE_FLAG) $(SOPC_SYSID_FLAG) $(DOWNLOAD_JDI_FLAG) $(WRITE_GMON_OPTION) $(ELF); \
+ fi
+
+# Delete the target of a rule if it has changed and its commands exit
+# with a nonzero exit status.
+.DELETE_ON_ERROR:
+
+# Rules for flash programming commands
+PROGRAM_FLASH_SUFFIX := -program
+PROGRAM_FLASH_TARGET := $(addsuffix $(PROGRAM_FLASH_SUFFIX), $(FLASH_FILES))
+
+.PHONY : program-flash
+program-flash : $(PROGRAM_FLASH_TARGET)
+
+.PHONY : $(PROGRAM_FLASH_TARGET)
+$(PROGRAM_FLASH_TARGET) : flash
+ @if [ "$(FLASHPROG)" = "none" ]; \
+ then \
+ $(ECHO) Programming flash not supported; \
+ else \
+ $(ECHO) Info: Programming $(basename $@).flash; \
+ if [ -z "$($(basename $@)_EPCS_FLAGS)" ]; \
+ then \
+ $(ECHO) $(FLASHPROG) $(SOPC_SYSID_FLAG) --base=$($(basename $@)_START) $(basename $@).flash; \
+ $(FLASHPROG) $(DOWNLOAD_CABLE_FLAG) $(SOPC_SYSID_FLAG) --base=$($(basename $@)_START) $(basename $@).flash; \
+ else \
+ $(ECHO) $(FLASHPROG) $(SOPC_SYSID_FLAG) --epcs --base=$($(basename $@)_START) $(basename $@).flash; \
+ $(FLASHPROG) $(DOWNLOAD_CABLE_FLAG) $(SOPC_SYSID_FLAG) --epcs --base=$($(basename $@)_START) $(basename $@).flash; \
+ fi \
+ fi
+
+
+# Rules for simulating with an HDL Simulator [QSYS only]
+ifeq ($(QSYS),1)
+IP_MAKE_SIMSCRIPT := ip-make-simscript
+
+ifeq ($(VSIM),)
+VSIM_EXE := "$(if $(VSIM_DIR),$(VSIM_DIR)/,)vsim"
+ifeq ($(ENABLE_VSIM_GUI),1)
+VSIM := $(VSIM_EXE) -gui
+else
+VSIM := $(VSIM_EXE) -c
+endif # ENABLE_VSIM_GUI == 1
+endif # VSIM not set
+
+ifeq ($(SPD),)
+ifneq ($(ABS_QUARTUS_PROJECT_DIR),)
+ifneq ($(SOPC_NAME),)
+SPD_LOCATION = $(ABS_QUARTUS_PROJECT_DIR)/$(SOPC_NAME)_tb/$(SOPC_NAME)_tb/$(SOPC_NAME)_tb.spd
+LEGACY_SPD_LOCATION = $(ABS_QUARTUS_PROJECT_DIR)/$(SOPC_NAME)_tb.spd
+SPD = $(if $(wildcard $(SPD_LOCATION)),$(SPD_LOCATION),$(LEGACY_SPD_LOCATION))
+endif # SOPC_NAME set
+endif # ABS_QUARTUS_PROJECT_DIR set
+endif # SPD == empty string
+
+ifeq ($(MSIM_SCRIPT),)
+SIM_SCRIPT_DIR := $(RUNTIME_ROOT_DIR)/sim
+MSIM_SCRIPT := $(SIM_SCRIPT_DIR)/mentor/msim_setup.tcl
+endif # MSIM_SCRIPT == empty string
+
+ifeq ($(MAKE_VERSION),3.81)
+ABS_MEM_INIT_DESCRIPTOR_FILE := $(abspath $(MEM_INIT_DESCRIPTOR_FILE))
+else
+ABS_MEM_INIT_DESCRIPTOR_FILE := $(call adjust-path-mixed,$(shell pwd))/$(MEM_INIT_DESCRIPTOR_FILE)
+endif
+
+$(MSIM_SCRIPT): $(SPD) $(MEM_INIT_DESCRIPTOR_FILE)
+ifeq ($(SPD),)
+ $(error No SPD file specified. Ensure QUARTUS_PROJECT_DIR variable is set)
+endif
+ @$(MKDIR) $(SIM_SCRIPT_DIR)
+ $(IP_MAKE_SIMSCRIPT) --spd=$(SPD) --spd=$(MEM_INIT_DESCRIPTOR_FILE) --output-directory=$(SIM_SCRIPT_DIR)
+
+VSIM_COMMAND = \
+ cd $(dir $(MSIM_SCRIPT)) && \
+ $(VSIM) -do "do $(notdir $(MSIM_SCRIPT)); ld; $(if $(VSIM_RUN_TIME),run ${VSIM_RUN_TIME};quit;)"
+
+.PHONY: sim
+sim: $(MSIM_SCRIPT) mem_init_generate
+ifeq ($(MSIM_SCRIPT),)
+ $(error MSIM_SCRIPT not set)
+endif
+ $(VSIM_COMMAND)
+
+endif # QSYS == 1
+
+
+#------------------------------------------------------------------------------
+# ELF TARGET RULE
+#------------------------------------------------------------------------------
+# Rule for constructing the executable elf file.
+$(ELF) : $(APP_OBJS) $(LINKER_SCRIPT) $(APP_LDDEPS)
+ @$(ECHO) Info: Linking $@
+ $(LD) $(APP_LDFLAGS) $(APP_CFLAGS) -o $@ $(filter-out $(CRT0),$(APP_OBJS)) $(APP_LIBS) $(APP_BSP_DEP_LIBS)
+ifneq ($(DISABLE_ELFPATCH),1)
+ $(ELFPATCH) $@ $(ELF_PATCH_FLAG)
+endif
+ifneq ($(DISABLE_STACKREPORT),1)
+ @bash -c "$(STACKREPORT) $@"
+endif
+
+$(OBJDUMP_NAME) : $(ELF)
+ @$(ECHO) Info: Creating $@
+ $(OBJDUMP) $(OBJDUMP_FLAGS) $< >$@
+
+# Rule for printing the name of the elf file
+.PHONY: print-elf-name
+print-elf-name:
+ @$(ECHO) $(ELF)
+
+
trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h/Makefile
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h/create-this-app
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h/create-this-app (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h/create-this-app (revision 6)
@@ -0,0 +1,114 @@
+#!/bin/bash
+#
+# This script creates the blank_project application in this directory.
+
+
+BSP_DIR=../usb_ft232h_bsp
+QUARTUS_PROJECT_DIR=../../
+NIOS2_APP_GEN_ARGS="--elf-name usb_ft232h.elf --no-src --set OBJDUMP_INCLUDE_SOURCE 1"
+
+
+# First, check to see if $SOPC_KIT_NIOS2 environmental variable is set.
+# This variable is required for the command line tools to execute correctly.
+if [ -z "${SOPC_KIT_NIOS2}" ]
+then
+ echo Required \$SOPC_KIT_NIOS2 Environmental Variable is not set!
+ exit 1
+fi
+
+
+# Also make sure that the APP has not been created already. Check for
+# existence of Makefile in the app directory
+if [ -f ./Makefile ]
+then
+ echo Application has already been created! Delete Makefile if you want to create a new application makefile
+ exit 1
+fi
+
+
+# We are selecting hal_default bsp because it supports this application.
+# Check to see if the hal_default has already been generated by checking for
+# existence of the public.mk file. If not, we need to run
+# create-this-bsp file to generate the bsp.
+if [ ! -f ${BSP_DIR}/public.mk ]; then
+ # Since BSP doesn't exist, create the BSP
+ # Pass any command line arguments passed to this script to the BSP.
+ pushd ${BSP_DIR} >> /dev/null
+ ./create-this-bsp "$@" || {
+ echo "create-this-bsp failed"
+ exit 1
+ }
+ popd >> /dev/null
+fi
+
+
+# Don't run make if create-this-app script is called with --no-make arg
+SKIP_MAKE=
+while [ $# -gt 0 ]
+do
+ case "$1" in
+ --no-make)
+ SKIP_MAKE=1
+ ;;
+ esac
+ shift
+done
+
+
+# Now we also need to go copy the sources for this application to the
+# local directory.
+find "${SOPC_KIT_NIOS2}/examples/software/blank_project/" -name '*.c' -or -name '*.h' -or -name 'hostfs*' | xargs -i cp -L {} ./ || {
+ echo "failed during copying example source files"
+ exit 1
+}
+
+find "${SOPC_KIT_NIOS2}/examples/software/blank_project/" -name 'readme.txt' -or -name 'Readme.txt' | xargs -i cp -L {} ./ || {
+ echo "failed copying readme file"
+}
+
+if [ -d "${SOPC_KIT_NIOS2}/examples/software/blank_project/system" ]
+then
+ cp -RL "${SOPC_KIT_NIOS2}/examples/software/blank_project/system" . || {
+ echo "failed during copying project support files"
+ exit 1
+ }
+fi
+
+chmod -R +w . || {
+ echo "failed during changing file permissions"
+ exit 1
+}
+
+cmd="nios2-app-generate-makefile --bsp-dir ${BSP_DIR} --set QUARTUS_PROJECT_DIR=${QUARTUS_PROJECT_DIR} ${NIOS2_APP_GEN_ARGS}"
+
+echo "create-this-app: Running \"${cmd}\""
+$cmd || {
+ echo "nios2-app-generate-makefile failed"
+ exit 1
+}
+
+if [ -z "$SKIP_MAKE" ]; then
+ cmd="make"
+
+ echo "create-this-app: Running \"$cmd\""
+ $cmd || {
+ echo "make failed"
+ exit 1
+ }
+
+ echo
+ echo "To download and run the application:"
+ echo " 1. Make sure the board is connected to the system."
+ echo " 2. Run 'nios2-configure-sof
' to configure the FPGA with the hardware design."
+ echo " 3. If you have a stdio device, run 'nios2-terminal' in a different shell."
+ echo " 4. Run 'make download-elf' from the application directory."
+ echo
+ echo "To debug the application:"
+ echo " Import the project into Nios II Software Build Tools for Eclipse."
+ echo " Refer to Nios II Software Build Tools for Eclipse Documentation for more information."
+ echo
+ echo -e ""
+fi
+
+
+exit 0
trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h/create-this-app
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h/main.cpp
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h/main.cpp (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h/main.cpp (revision 6)
@@ -0,0 +1,251 @@
+/*
+ * main.cpp
+ *
+ * Created on: 14 ����� 2017 �.
+ * Author: EDV
+ */
+
+#include
+#include
+#include
+
+#include "system.h"
+#include "altera_avalon_dma_regs.h"
+#include "altera_avalon_pio_regs.h"
+
+#include "usb_ft232h.h"
+
+
+
+
+const alt_u32 DMA_USB_TX_BASE = DMA_TX_BASE;
+const alt_u32 DMA_USB_RX_BASE = DMA_RX_BASE;
+const alt_u32 USB_FT232H_BASE = USB_BASE;
+
+const alt_u16 USB_TX_FIFO_SIZE = 2048;
+const alt_u16 USB_RX_FIFO_SIZE = 1024;
+const alt_u16 BUFFER_SIZE = 2048;
+const alt_u16 MIN_TRANSACTION_SIZE = 128;
+const alt_u16 TRANSACTION_SIZE = 1024;
+
+
+enum TestMode {
+ TM_READ = 1,
+ TM_ECHO
+};
+
+
+uint8_t txBuffer[BUFFER_SIZE];
+uint16_t txBufferHead = 0;
+uint16_t txFree = 0;
+uint8_t rxBuffer[BUFFER_SIZE];
+uint16_t rxBufferTail = 0;
+uint16_t rxCount = 0;
+uint16_t ret = 0;
+
+uint32_t targetSize = 0;
+
+uint32_t receivedSize = 0;
+uint32_t sendedSize = 0;
+
+uint16_t bytesRead = 0, bytesWrite = 0;
+
+uint32_t ledDivider = 0;
+
+
+
+void init() {
+ IOWR_ALTERA_AVALON_DMA_RADDRESS(DMA_USB_RX_BASE, USB_FT232H_RDDATA_ADDR);
+ IOWR_ALTERA_AVALON_DMA_WADDRESS(DMA_USB_TX_BASE, USB_FT232H_WRDATA_ADDR);
+}
+
+
+uint16_t getRxDataCount() {
+ return IORD_USB_FT232H_RXDATA_COUNT(USB_FT232H_BASE);
+// return IORD_16DIRECT(USB_FT232H_BASE, USB_FT232H_RXSTATUSL_ADDR) & USB_FT232H_STATUS_COUNT_MSK;
+}
+
+uint16_t getTxFreeSpace() {
+ return (USB_TX_FIFO_SIZE - IORD_USB_FT232H_TXDATA_COUNT(USB_FT232H_BASE));
+}
+
+uint8_t readByte() {
+ return IORD_USB_FT232H_DATA(USB_FT232H_BASE);
+}
+
+void writeByte(uint8_t byte) {
+ IOWR_USB_FT232H_DATA(USB_FT232H_BASE, byte);
+}
+
+inline
+void readData(uint8_t *buffer, uint16_t size)
+{
+ for (uint16_t i = 0; i < size; ++i) {
+ buffer[i] = readByte();
+ }
+}
+
+inline
+uint16_t readDataDMA(void *buffer, uint16_t size) {
+ alt_u32 status;
+ IOWR_ALTERA_AVALON_DMA_STATUS(DMA_USB_RX_BASE, 0);
+ IOWR_ALTERA_AVALON_DMA_CONTROL(DMA_USB_RX_BASE, 0x1E1); //����� ��������� � �����������, � ����� ������, �� ���� ����� �����
+ IOWR_ALTERA_AVALON_DMA_WADDRESS(DMA_USB_RX_BASE, reinterpret_cast(buffer));
+ IOWR_ALTERA_AVALON_DMA_LENGTH(DMA_USB_RX_BASE, size);
+ IOWR_ALTERA_AVALON_DMA_CONTROL(DMA_USB_RX_BASE, 0x1E9); // ���������
+ do {
+ status = IORD_ALTERA_AVALON_DMA_STATUS(DMA_USB_RX_BASE);
+ } while (status & ALTERA_AVALON_DMA_STATUS_BUSY_MSK);
+ return IORD_ALTERA_AVALON_DMA_LENGTH(DMA_USB_RX_BASE);
+}
+
+inline
+void writeData(const uint8_t *data, uint16_t size)
+{
+ for (uint16_t i = 0; i < size; ++i)
+ writeByte(data[i]);
+}
+
+inline
+uint16_t writeDataDMA(void *data, uint16_t size) {
+ alt_u32 status;
+ IOWR_ALTERA_AVALON_DMA_STATUS(DMA_USB_TX_BASE, 0);
+ IOWR_ALTERA_AVALON_DMA_CONTROL(DMA_USB_TX_BASE, 0x2E1); //����� ��������� � �����������, � ����� ������, �� ���� ����� �����
+ IOWR_ALTERA_AVALON_DMA_RADDRESS(DMA_USB_TX_BASE, reinterpret_cast(data));
+ IOWR_ALTERA_AVALON_DMA_LENGTH(DMA_USB_TX_BASE, size);
+ IOWR_ALTERA_AVALON_DMA_CONTROL(DMA_USB_TX_BASE, 0x2E9);
+ do {
+ status = IORD_ALTERA_AVALON_DMA_STATUS(DMA_USB_TX_BASE);
+ } while (status & ALTERA_AVALON_DMA_STATUS_BUSY_MSK);
+ return IORD_ALTERA_AVALON_DMA_LENGTH(DMA_USB_TX_BASE);
+}
+
+void transmitMode() {
+ puts("Transmit mode");
+ while(true) {
+ txFree = getTxFreeSpace();
+ if(txFree >= TRANSACTION_SIZE) {
+ ret = writeDataDMA(&txBuffer[txBufferHead], TRANSACTION_SIZE);
+// writeData(&txBuffer[txBufferHead], TRANSACTION_SIZE);
+ txBufferHead += TRANSACTION_SIZE;
+ if(txBufferHead >= BUFFER_SIZE) {
+ txBufferHead = 0;
+ }
+ }
+ }
+}
+
+void echoMode() {
+ rxCount = 0;
+ receivedSize = 0;
+ sendedSize = 0;
+
+ readData(reinterpret_cast(&targetSize), 4);
+// printf("Echo mode. %ld\n", targetSize);
+
+ while ((receivedSize < targetSize) || (sendedSize < targetSize)) {
+ if (rxCount) {
+ txFree = getTxFreeSpace();
+ if (txFree >= rxCount) {
+// puts("send");
+// writeData(rxBuffer, rxCount);
+ bytesWrite = writeDataDMA(rxBuffer, rxCount);
+ if (bytesWrite) {
+ puts("Write error");
+ }
+ sendedSize += rxCount;
+ if (sendedSize > targetSize) {
+// printf("Too much tx data. %ld\n", sendedSize - targetSize);
+ }
+ rxCount = 0;
+ }
+ }
+ else {
+ rxCount = getRxDataCount();
+ if (rxCount >= TRANSACTION_SIZE) {
+// puts("get");
+ rxCount = TRANSACTION_SIZE;
+// readData(rxBuffer, rxCount);
+ bytesRead = readDataDMA(rxBuffer, rxCount);
+ if (bytesRead) {
+ puts("Read error");
+ }
+ receivedSize += rxCount;
+ if (receivedSize > targetSize) {
+// printf("Too much rx data. %ld\n", receivedSize - targetSize);
+// return;
+ }
+ }
+ else {
+ rxCount = 0;
+ }
+ }
+
+ ++ledDivider;
+ if (ledDivider == 50000) {
+ IOWR_ALTERA_AVALON_PIO_DATA(LED_BASE, 0x1);
+ }
+ else if (ledDivider == 100000) {
+ IOWR_ALTERA_AVALON_PIO_DATA(LED_BASE, 0x0);
+ ledDivider = 0;
+ }
+ }
+// printf("Finish. Target size: %ld Received size: %ld Sended size: %ld Rx FIFO status: %ld\n", targetSize, receivedSize, sendedSize, getRxDataCount());
+}
+
+int main() {
+ init();
+
+ uint8_t byte;
+
+ for(int i=0; i
trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h/main.cpp
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h/readme.txt
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h/readme.txt (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h/readme.txt (revision 6)
@@ -0,0 +1,11 @@
+This template is starting point for creating a project based on your custom C code.
+It will provide you a default project to which you can add your software files. To
+add files to a project, manually copy the file into the application directory (e.g.
+using Windows Explorer), then right click on your application project and select
+refresh.
+
+You can also add files to the project using the Nios II Software Build Tools for Eclipse import function.
+Select File -> Import.
+Expand General and select File System in the Import Window and click Next.
+Identify the appropriate source and destination directories.
+Check the files you want to add and click Finish.
trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h/readme.txt
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h/usb_ft232h.h
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h/usb_ft232h.h (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h/usb_ft232h.h (revision 6)
@@ -0,0 +1,33 @@
+/*
+ * usb_ft232h.h
+ *
+ * Created on: 06 ìàÿ 2016 ã.
+ * Author: EDV
+ */
+
+#include
+
+#ifndef USB_FT232H_H_
+#define USB_FT232H_H_
+
+
+#define USB_FT232H_WRDATA_ADDR 0x0
+#define USB_FT232H_RDDATA_ADDR 0x1
+#define USB_FT232H_TXSTATUSL_ADDR 0x2
+#define USB_FT232H_TXSTATUSH_ADDR 0x3
+#define USB_FT232H_RXSTATUSL_ADDR 0x4
+#define USB_FT232H_RXSTATUSH_ADDR 0x5
+
+#define USB_FT232H_STATUS_READY_MSK 0x8000
+#define USB_FT232H_STATUS_COUNT_MSK 0x7FFF
+
+
+#define IOWR_USB_FT232H_DATA(base, data) IOWR_8DIRECT(base, USB_FT232H_WRDATA_ADDR, data)
+#define IORD_USB_FT232H_DATA(base) IORD_8DIRECT(base, USB_FT232H_RDDATA_ADDR)
+#define IORD_USB_FT232H_TXSTATUS(base) (IORD_8DIRECT(base, USB_FT232H_TXSTATUSL_ADDR) | (IORD_8DIRECT(base, USB_FT232H_TXSTATUSH_ADDR) << 8))
+#define IORD_USB_FT232H_RXSTATUS(base) (IORD_8DIRECT(base, USB_FT232H_RXSTATUSL_ADDR) | (IORD_8DIRECT(base, USB_FT232H_RXSTATUSH_ADDR) << 8))
+#define IORD_USB_FT232H_TXDATA_COUNT(base) (IORD_USB_FT232H_TXSTATUS(base) & USB_FT232H_STATUS_COUNT_MSK)
+#define IORD_USB_FT232H_RXDATA_COUNT(base) (IORD_USB_FT232H_RXSTATUS(base) & USB_FT232H_STATUS_COUNT_MSK)
+
+
+#endif /* USB_FT232H_H_ */
trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h/usb_ft232h.h
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/.cproject
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/.cproject (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/.cproject (revision 6)
@@ -0,0 +1,56 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/.cproject
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/.force_rebuild_all
===================================================================
Index: trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/.force_rebuild_all
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/.force_rebuild_all (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/.force_rebuild_all (revision 6)
trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/.force_rebuild_all
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/.force_relink
===================================================================
Index: trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/.force_relink
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/.force_relink (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/.force_relink (revision 6)
trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/.force_relink
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/.project
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/.project (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/.project (revision 6)
@@ -0,0 +1,29 @@
+
+
+ usb_ft232h_bsp
+
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.genmakebuilder
+ clean,full,incremental,
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder
+ full,incremental,
+
+
+
+
+
+ org.eclipse.cdt.core.cnature
+ org.eclipse.cdt.managedbuilder.core.managedBuildNature
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
+ org.eclipse.cdt.core.ccnature
+ com.altera.sbtgui.project.SBTGUINature
+ com.altera.sbtgui.project.SBTGUIBspNature
+
+
trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/.project
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/.settings/language.settings.xml
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/.settings/language.settings.xml (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/.settings/language.settings.xml (revision 6)
@@ -0,0 +1,15 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/.settings/language.settings.xml
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/Makefile
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/Makefile (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/Makefile (revision 6)
@@ -0,0 +1,779 @@
+#------------------------------------------------------------------------------
+# BSP MAKEFILE
+#
+# This makefile was automatically generated by the nios2-bsp-generate-files
+# command. Its purpose is to build a custom Board Support Package (BSP)
+# targeting a specific Nios II processor in an SOPC Builder-based design.
+#
+# To create an application or library Makefile which uses this BSP, try the
+# nios2-app-generate-makefile or nios2-lib-generate-makefile commands.
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# TOOLS
+#------------------------------------------------------------------------------
+
+MKDIR := mkdir -p
+ECHO := echo
+SPACE := $(empty) $(empty)
+
+#------------------------------------------------------------------------------
+# The adjust-path macro
+#
+# If COMSPEC is defined, Make is launched from Windows through
+# Cygwin. This adjust-path macro will call 'cygpath -u' on all
+# paths to ensure they are readable by Make.
+#
+# If COMSPEC is not defined, Make is launched from *nix, and no adjustment
+# is necessary
+#------------------------------------------------------------------------------
+
+ifndef COMSPEC
+ifdef ComSpec
+COMSPEC = $(ComSpec)
+endif # ComSpec
+endif # !COMSPEC
+
+ifdef COMSPEC
+ adjust-path = $(subst $(SPACE),\$(SPACE),$(shell cygpath -u "$1"))
+ adjust-path-mixed = $(subst $(SPACE),\$(SPACE),$(shell cygpath -m "$1"))
+else
+ adjust-path = $(subst $(SPACE),\$(SPACE),$1)
+ adjust-path-mixed = $(subst $(SPACE),\$(SPACE),$1)
+endif
+
+#------------------------------------------------------------------------------
+# DEFAULT TARGET
+#
+# The default target, "all", must appear before any other target in the
+# Makefile. Note that extra prerequisites are added to the "all" rule later.
+#------------------------------------------------------------------------------
+.PHONY: all
+all:
+ @$(ECHO) [BSP build complete]
+
+
+#------------------------------------------------------------------------------
+# PATHS & DIRECTORY NAMES
+#
+# Explicitly locate absolute path of the BSP root
+#------------------------------------------------------------------------------
+
+BSP_ROOT_DIR := .
+
+# Define absolute path to the root of the BSP.
+ABS_BSP_ROOT := $(call adjust-path-mixed,$(shell pwd))
+
+# Stash all BSP object files here
+OBJ_DIR := ./obj
+
+
+#------------------------------------------------------------------------------
+# MANAGED CONTENT
+#
+# All content between the lines "START MANAGED" and "END MANAGED" below is
+# generated based on variables in the BSP settings file when the
+# nios2-bsp-generate-files command is invoked. If you wish to persist any
+# information pertaining to the build process, it is recomended that you
+# utilize the BSP settings mechanism to do so.
+#
+# Note that most variable assignments in this section have a corresponding BSP
+# setting that can be changed by using the nios2-bsp-create-settings or
+# nios2-bsp-update-settings command before nios2-bsp-generate-files; if you
+# want any variable set to a specific value when this Makefile is re-generated
+# (to prevent hand-edits from being over-written), use the BSP settings
+# facilities above.
+#------------------------------------------------------------------------------
+
+#START MANAGED
+
+# The following TYPE comment allows tools to identify the 'type' of target this
+# makefile is associated with.
+# TYPE: BSP_PRIVATE_MAKEFILE
+
+# This following VERSION comment indicates the version of the tool used to
+# generate this makefile. A makefile variable is provided for VERSION as well.
+# ACDS_VERSION: 16.1
+ACDS_VERSION := 16.1
+
+# This following BUILD_NUMBER comment indicates the build number of the tool
+# used to generate this makefile.
+# BUILD_NUMBER: 203
+
+SETTINGS_FILE := settings.bsp
+SOPC_FILE := ../../sopc.sopcinfo
+
+#-------------------------------------------------------------------------------
+# TOOL & COMMAND DEFINITIONS
+#
+# The base command for each build operation are expressed here. Additional
+# switches may be expressed here. They will run for all instances of the
+# utility.
+#-------------------------------------------------------------------------------
+
+# Archiver command. Creates library files.
+AR = nios2-elf-ar
+
+# Assembler command. Note that CC is used for .S files.
+AS = nios2-elf-gcc
+
+# Custom flags only passed to the archiver. This content of this variable is
+# directly passed to the archiver rather than the more standard "ARFLAGS". The
+# reason for this is that GNU Make assumes some default content in ARFLAGS.
+# This setting defines the value of BSP_ARFLAGS in Makefile.
+BSP_ARFLAGS = -src
+
+# Custom flags only passed to the assembler. This setting defines the value of
+# BSP_ASFLAGS in Makefile.
+BSP_ASFLAGS = -Wa,-gdwarf2
+
+# C/C++ compiler debug level. '-g' provides the default set of debug symbols
+# typically required to debug a typical application. Omitting '-g' removes
+# debug symbols from the ELF. This setting defines the value of
+# BSP_CFLAGS_DEBUG in Makefile.
+BSP_CFLAGS_DEBUG = -g
+
+# C/C++ compiler optimization level. "-O0" = no optimization,"-O2" = "normal"
+# optimization, etc. "-O0" is recommended for code that you want to debug since
+# compiler optimization can remove variables and produce non-sequential
+# execution of code while debugging. This setting defines the value of
+# BSP_CFLAGS_OPTIMIZATION in Makefile.
+BSP_CFLAGS_OPTIMIZATION = -O0
+
+# C/C++ compiler warning level. "-Wall" is commonly used.This setting defines
+# the value of BSP_CFLAGS_WARNINGS in Makefile.
+BSP_CFLAGS_WARNINGS = -Wall
+
+# C compiler command.
+CC = nios2-elf-gcc -xc
+
+# C++ compiler command.
+CXX = nios2-elf-gcc -xc++
+
+# Command used to remove files during 'clean' target.
+RM = rm -f
+
+
+#-------------------------------------------------------------------------------
+# BUILD PRE & POST PROCESS COMMANDS
+#
+# The following variables are treated as shell commands in the rule
+# definitions for each file-type associated with the BSP build, as well as
+# commands run at the beginning and end of the entire BSP build operation.
+# Pre-process commands are executed before the relevant command (for example,
+# a command defined in the "CC_PRE_PROCESS" variable executes before the C
+# compiler for building .c files), while post-process commands are executed
+# immediately afterwards.
+#
+# You can view each pre/post-process command in the "Build Rules: All &
+# Clean", "Pattern Rules to Build Objects", and "Library Rules" sections of
+# this Makefile.
+#-------------------------------------------------------------------------------
+
+
+#-------------------------------------------------------------------------------
+# BSP SOURCE BUILD SETTINGS (FLAG GENERATION)
+#
+# Software build settings such as compiler optimization, debug level, warning
+# flags, etc., may be defined in the following variables. The variables below
+# are concatenated together in the 'Flags' section of this Makefile to form
+# final variables of flags passed to the build tools.
+#
+# These settings are considered private to the BSP and apply to all library &
+# driver files in it; they do NOT automatically propagate to, for example, the
+# build settings for an application.
+# # For additional detail and syntax requirements, please refer to GCC help
+# (example: "nios2-elf-gcc --help --verbose").
+#
+# Unless indicated otherwise, multiple entries in each variable should be
+# space-separated.
+#-------------------------------------------------------------------------------
+
+# Altera HAL alt_sys_init.c generated source file
+GENERATED_C_FILES := $(ABS_BSP_ROOT)/alt_sys_init.c
+GENERATED_C_LIB_SRCS += alt_sys_init.c
+
+
+#-------------------------------------------------------------------------------
+# BSP SOURCE FILE LISTING
+#
+# All source files that comprise the BSP are listed here, along with path
+# information to each file expressed relative to the BSP root. The precise
+# list and location of each file is derived from the driver, operating system,
+# or software package source file declarations.
+#
+# Following specification of the source files for each component, driver, etc.,
+# each source file type (C, assembly, etc.) is concatenated together and used
+# to construct a list of objects. Pattern rules to build each object are then
+# used to build each file.
+#-------------------------------------------------------------------------------
+
+# altera_avalon_dma_driver sources root
+altera_avalon_dma_driver_SRCS_ROOT := drivers
+
+# altera_avalon_dma_driver sources
+altera_avalon_dma_driver_C_LIB_SRCS := \
+ $(altera_avalon_dma_driver_SRCS_ROOT)/src/altera_avalon_dma.c
+
+# altera_avalon_jtag_uart_driver sources root
+altera_avalon_jtag_uart_driver_SRCS_ROOT := drivers
+
+# altera_avalon_jtag_uart_driver sources
+altera_avalon_jtag_uart_driver_C_LIB_SRCS := \
+ $(altera_avalon_jtag_uart_driver_SRCS_ROOT)/src/altera_avalon_jtag_uart_init.c \
+ $(altera_avalon_jtag_uart_driver_SRCS_ROOT)/src/altera_avalon_jtag_uart_read.c \
+ $(altera_avalon_jtag_uart_driver_SRCS_ROOT)/src/altera_avalon_jtag_uart_write.c \
+ $(altera_avalon_jtag_uart_driver_SRCS_ROOT)/src/altera_avalon_jtag_uart_ioctl.c \
+ $(altera_avalon_jtag_uart_driver_SRCS_ROOT)/src/altera_avalon_jtag_uart_fd.c
+
+# altera_avalon_pio_driver sources root
+altera_avalon_pio_driver_SRCS_ROOT := drivers
+
+# altera_avalon_pio_driver sources
+# altera_avalon_sysid_qsys_driver sources root
+altera_avalon_sysid_qsys_driver_SRCS_ROOT := drivers
+
+# altera_avalon_sysid_qsys_driver sources
+altera_avalon_sysid_qsys_driver_C_LIB_SRCS := \
+ $(altera_avalon_sysid_qsys_driver_SRCS_ROOT)/src/altera_avalon_sysid_qsys.c
+
+# altera_nios2_gen2_hal_driver sources root
+altera_nios2_gen2_hal_driver_SRCS_ROOT := HAL
+
+# altera_nios2_gen2_hal_driver sources
+altera_nios2_gen2_hal_driver_C_LIB_SRCS := \
+ $(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/altera_nios2_gen2_irq.c \
+ $(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_usleep.c \
+ $(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_busy_sleep.c \
+ $(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_irq_vars.c \
+ $(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_icache_flush.c \
+ $(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_icache_flush_all.c \
+ $(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_dcache_flush.c \
+ $(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_dcache_flush_all.c \
+ $(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_dcache_flush_no_writeback.c \
+ $(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_ecc_fatal_exception.c \
+ $(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_instruction_exception_entry.c \
+ $(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_irq_register.c \
+ $(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_iic.c \
+ $(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_remap_cached.c \
+ $(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_remap_uncached.c \
+ $(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_uncached_free.c \
+ $(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_uncached_malloc.c \
+ $(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_do_ctors.c \
+ $(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_do_dtors.c \
+ $(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_gmon.c
+
+altera_nios2_gen2_hal_driver_ASM_LIB_SRCS := \
+ $(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_ecc_fatal_entry.S \
+ $(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_exception_entry.S \
+ $(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_exception_trap.S \
+ $(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_exception_muldiv.S \
+ $(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_irq_entry.S \
+ $(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_software_exception.S \
+ $(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_mcount.S \
+ $(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/alt_log_macro.S \
+ $(altera_nios2_gen2_hal_driver_SRCS_ROOT)/src/crt0.S
+
+# hal sources root
+hal_SRCS_ROOT := HAL
+
+# hal sources
+hal_C_LIB_SRCS := \
+ $(hal_SRCS_ROOT)/src/alt_alarm_start.c \
+ $(hal_SRCS_ROOT)/src/alt_close.c \
+ $(hal_SRCS_ROOT)/src/alt_dev.c \
+ $(hal_SRCS_ROOT)/src/alt_dev_llist_insert.c \
+ $(hal_SRCS_ROOT)/src/alt_dma_rxchan_open.c \
+ $(hal_SRCS_ROOT)/src/alt_dma_txchan_open.c \
+ $(hal_SRCS_ROOT)/src/alt_environ.c \
+ $(hal_SRCS_ROOT)/src/alt_env_lock.c \
+ $(hal_SRCS_ROOT)/src/alt_errno.c \
+ $(hal_SRCS_ROOT)/src/alt_execve.c \
+ $(hal_SRCS_ROOT)/src/alt_exit.c \
+ $(hal_SRCS_ROOT)/src/alt_fcntl.c \
+ $(hal_SRCS_ROOT)/src/alt_fd_lock.c \
+ $(hal_SRCS_ROOT)/src/alt_fd_unlock.c \
+ $(hal_SRCS_ROOT)/src/alt_find_dev.c \
+ $(hal_SRCS_ROOT)/src/alt_find_file.c \
+ $(hal_SRCS_ROOT)/src/alt_flash_dev.c \
+ $(hal_SRCS_ROOT)/src/alt_fork.c \
+ $(hal_SRCS_ROOT)/src/alt_fs_reg.c \
+ $(hal_SRCS_ROOT)/src/alt_fstat.c \
+ $(hal_SRCS_ROOT)/src/alt_get_fd.c \
+ $(hal_SRCS_ROOT)/src/alt_getchar.c \
+ $(hal_SRCS_ROOT)/src/alt_getpid.c \
+ $(hal_SRCS_ROOT)/src/alt_gettod.c \
+ $(hal_SRCS_ROOT)/src/alt_iic_isr_register.c \
+ $(hal_SRCS_ROOT)/src/alt_instruction_exception_register.c \
+ $(hal_SRCS_ROOT)/src/alt_ioctl.c \
+ $(hal_SRCS_ROOT)/src/alt_io_redirect.c \
+ $(hal_SRCS_ROOT)/src/alt_irq_handler.c \
+ $(hal_SRCS_ROOT)/src/alt_isatty.c \
+ $(hal_SRCS_ROOT)/src/alt_kill.c \
+ $(hal_SRCS_ROOT)/src/alt_link.c \
+ $(hal_SRCS_ROOT)/src/alt_load.c \
+ $(hal_SRCS_ROOT)/src/alt_log_printf.c \
+ $(hal_SRCS_ROOT)/src/alt_lseek.c \
+ $(hal_SRCS_ROOT)/src/alt_main.c \
+ $(hal_SRCS_ROOT)/src/alt_malloc_lock.c \
+ $(hal_SRCS_ROOT)/src/alt_open.c \
+ $(hal_SRCS_ROOT)/src/alt_printf.c \
+ $(hal_SRCS_ROOT)/src/alt_putchar.c \
+ $(hal_SRCS_ROOT)/src/alt_putcharbuf.c \
+ $(hal_SRCS_ROOT)/src/alt_putstr.c \
+ $(hal_SRCS_ROOT)/src/alt_read.c \
+ $(hal_SRCS_ROOT)/src/alt_release_fd.c \
+ $(hal_SRCS_ROOT)/src/alt_rename.c \
+ $(hal_SRCS_ROOT)/src/alt_sbrk.c \
+ $(hal_SRCS_ROOT)/src/alt_settod.c \
+ $(hal_SRCS_ROOT)/src/alt_stat.c \
+ $(hal_SRCS_ROOT)/src/alt_tick.c \
+ $(hal_SRCS_ROOT)/src/alt_times.c \
+ $(hal_SRCS_ROOT)/src/alt_unlink.c \
+ $(hal_SRCS_ROOT)/src/alt_wait.c \
+ $(hal_SRCS_ROOT)/src/alt_write.c
+
+
+# Assemble all component C source files
+COMPONENT_C_LIB_SRCS += \
+ $(altera_avalon_dma_driver_C_LIB_SRCS) \
+ $(altera_avalon_jtag_uart_driver_C_LIB_SRCS) \
+ $(altera_avalon_sysid_qsys_driver_C_LIB_SRCS) \
+ $(altera_nios2_gen2_hal_driver_C_LIB_SRCS) \
+ $(hal_C_LIB_SRCS)
+
+# Assemble all component assembly source files
+COMPONENT_ASM_LIB_SRCS += \
+ $(altera_nios2_gen2_hal_driver_ASM_LIB_SRCS)
+
+# Assemble all component C++ source files
+COMPONENT_CPP_LIB_SRCS += \
+
+#END MANAGED
+
+#------------------------------------------------------------------------------
+# PUBLIC.MK
+#
+# The generated public.mk file contains BSP information that is shared with
+# other external makefiles, such as a Nios II application makefile. System-
+# dependent information such as hardware-specific compiler flags and
+# simulation file generation are stored here.
+#
+# In addition, public.mk contains include paths that various software,
+# such as a device driver, may need for the C compiler. These paths are
+# written to public.mk with respect to the BSP root. In public.mk, each
+# path is prefixed with a special variable, $(ALT_LIBRARY_ROOT_DIR). The
+# purpose of this variable is to allow an external Makefile to append on
+# path information to precisely locate paths expressed in public.mk
+# Since this is the BSP Makefile, we set ALT_LIBRARY_ROOT_DIR to point right
+# here ("."), at the BSP root.
+#
+# ALT_LIBRARY_ROOT_DIR must always be set before public.mk is included.
+#------------------------------------------------------------------------------
+ALT_LIBRARY_ROOT_DIR := .
+include public.mk
+
+
+#------------------------------------------------------------------------------
+# FLAGS
+#
+# Include paths for BSP files are written into the public.mk file and must
+# be added to the existing list of pre-processor flags. In addition, "hooks"
+# for standard flags left intentionally empty (CFLAGS, CPPFLAGS, ASFLAGS,
+# and CXXFLAGS) are provided for conveniently adding to the relevant flags
+# on the command-line or via script that calls make.
+#------------------------------------------------------------------------------
+# Assemble final list of compiler flags from generated content
+BSP_CFLAGS += \
+ $(BSP_CFLAGS_DEFINED_SYMBOLS) \
+ $(BSP_CFLAGS_UNDEFINED_SYMBOLS) \
+ $(BSP_CFLAGS_OPTIMIZATION) \
+ $(BSP_CFLAGS_DEBUG) \
+ $(BSP_CFLAGS_WARNINGS) \
+ $(BSP_CFLAGS_USER_FLAGS) \
+ $(ALT_CFLAGS) \
+ $(CFLAGS)
+
+# Make ready the final list of include directories and other C pre-processor
+# flags. Each include path is made ready by prefixing it with "-I".
+BSP_CPPFLAGS += \
+ $(addprefix -I, $(BSP_INC_DIRS)) \
+ $(addprefix -I, $(ALT_INCLUDE_DIRS)) \
+ $(ALT_CPPFLAGS) \
+ $(CPPFLAGS)
+
+# Finish off assembler flags with any user-provided flags
+BSP_ASFLAGS += $(ASFLAGS)
+
+# Finish off C++ flags with any user-provided flags
+BSP_CXXFLAGS += $(CXXFLAGS)
+
+# And finally, the ordered list
+C_SRCS += $(GENERATED_C_LIB_SRCS) \
+ $(COMPONENT_C_LIB_SRCS)
+
+CXX_SRCS += $(GENERATED_CPP_LIB_SRCS) \
+ $(COMPONENT_CPP_LIB_SRCS)
+
+ASM_SRCS += $(GENERATED_ASM_LIB_SRCS) \
+ $(COMPONENT_ASM_LIB_SRCS)
+
+
+#------------------------------------------------------------------------------
+# LIST OF GENERATED FILES
+#
+# A Nios II BSP relies on the generation of several source files used
+# by both the BSP and any applications referencing the BSP.
+#------------------------------------------------------------------------------
+
+
+GENERATED_H_FILES := $(ABS_BSP_ROOT)/system.h
+
+GENERATED_LINKER_SCRIPT := $(ABS_BSP_ROOT)/linker.x
+
+GENERATED_FILES += $(GENERATED_H_FILES) \
+ $(GENERATED_LINKER_SCRIPT)
+
+
+#------------------------------------------------------------------------------
+# SETUP TO BUILD OBJECTS
+#
+# List of object files which are to be built. This is constructed from the input
+# list of C source files (C_SRCS), C++ source files (CXX_SRCS), and assembler
+# source file (ASM_SRCS). The permitted file extensions are:
+#
+# .c .C - for C files
+# .cxx .cc .cpp .CXX .CC .CPP - for C++ files
+# .S .s - for assembly files
+#
+# Extended description: The list of objects is a sorted list (duplicates
+# removed) of all possible objects, placed beneath the ./obj directory,
+# including any path information stored in the "*_SRCS" variable. The
+# "patsubst" commands are used to concatenate together multiple file suffix
+# types for common files (i.e. c++ as .cxx, .cc, .cpp).
+#
+# File extensions are case-insensitive in build rules with the exception of
+# assembly sources. Nios II assembly sources with the ".S" extension are first
+# run through the C preprocessor. Sources with the ".s" extension are not.
+#------------------------------------------------------------------------------
+OBJS = $(sort $(addprefix $(OBJ_DIR)/, \
+ $(patsubst %.c, %.o, $(patsubst %.C, %.o, $(C_SRCS))) \
+ $(patsubst %.cxx, %.o, $(patsubst %.CXX, %.o, \
+ $(patsubst %.cc, %.o, $(patsubst %.CC, %.o, \
+ $(patsubst %.cpp, %.o, $(patsubst %.CPP, %.o, \
+ $(CXX_SRCS) )))))) \
+ $(patsubst %.S, %.o, $(patsubst %.s, %.o, $(ASM_SRCS))) ))
+
+# List of dependancy files for each object file.
+DEPS = $(OBJS:.o=.d)
+
+
+# Rules to force your project to rebuild or relink
+# .force_relink file will cause any application that depends on this project to relink
+# .force_rebuild file will cause this project to rebuild object files
+# .force_rebuild_all file will cause this project and any project that depends on this project to rebuild object files
+
+FORCE_RELINK_DEP := .force_relink
+FORCE_REBUILD_DEP := .force_rebuild
+FORCE_REBUILD_ALL_DEP := .force_rebuild_all
+FORCE_REBUILD_DEP_LIST := $(FORCE_RELINK_DEP) $(FORCE_REBUILD_DEP) $(FORCE_REBUILD_ALL_DEP)
+
+$(FORCE_REBUILD_DEP_LIST):
+
+$(OBJS): $(wildcard $(FORCE_REBUILD_DEP)) $(wildcard $(FORCE_REBUILD_ALL_DEP))
+
+
+#------------------------------------------------------------------------------
+# BUILD RULES: ALL & CLEAN
+#------------------------------------------------------------------------------
+.DELETE_ON_ERROR:
+
+.PHONY: all
+all: build_pre_process
+all: Makefile $(GENERATED_FILES) $(BSP_LIB) $(NEWLIB_DIR)
+all: build_post_process
+
+
+# clean: remove .o/.a/.d
+.PHONY: clean
+clean:
+ @$(RM) -r $(BSP_LIB) $(OBJ_DIR) $(FORCE_REBUILD_DEP_LIST)
+ifneq ($(wildcard $(NEWLIB_DIR)),)
+ @$(RM) -r $(NEWLIB_DIR)
+endif
+ @$(ECHO) [BSP clean complete]
+
+
+#------------------------------------------------------------------------------
+# BUILD PRE/POST PROCESS
+#------------------------------------------------------------------------------
+build_pre_process :
+ $(BUILD_PRE_PROCESS)
+
+build_post_process :
+ $(BUILD_POST_PROCESS)
+
+.PHONY: build_pre_process build_post_process
+
+
+
+#------------------------------------------------------------------------------
+# MAKEFILE UP TO DATE?
+#
+# Is this very Makefile up to date? Someone may have changed the BSP settings
+# file or the associated target hardware.
+#------------------------------------------------------------------------------
+# Skip this check when clean is the only target
+ifneq ($(MAKECMDGOALS),clean)
+
+ifneq ($(wildcard $(SETTINGS_FILE)),$(SETTINGS_FILE))
+$(warning Warning: BSP Settings File $(SETTINGS_FILE) could not be found.)
+endif
+
+Makefile: $(wildcard $(SETTINGS_FILE))
+ @$(ECHO) Makefile not up to date.
+ @$(ECHO) $(SETTINGS_FILE) has been modified since the BSP Makefile was generated.
+ @$(ECHO)
+ @$(ECHO) Generate the BSP to update the Makefile, and then build again.
+ @$(ECHO)
+ @$(ECHO) To generate from Eclipse:
+ @$(ECHO) " 1. Right-click the BSP project."
+ @$(ECHO) " 2. In the Nios II Menu, click Generate BSP."
+ @$(ECHO)
+ @$(ECHO) To generate from the command line:
+ @$(ECHO) " nios2-bsp-generate-files --settings=
--bsp-dir="
+ @$(ECHO)
+ @exit 1
+
+ifneq ($(wildcard $(SOPC_FILE)),$(SOPC_FILE))
+$(warning Warning: SOPC File $(SOPC_FILE) could not be found.)
+endif
+
+public.mk: $(wildcard $(SOPC_FILE))
+ @$(ECHO) Makefile not up to date.
+ @$(ECHO) $(SOPC_FILE) has been modified since the BSP was generated.
+ @$(ECHO)
+ @$(ECHO) Generate the BSP to update the Makefile, and then build again.
+ @$(ECHO)
+ @$(ECHO) To generate from Eclipse:
+ @$(ECHO) " 1. Right-click the BSP project."
+ @$(ECHO) " 2. In the Nios II Menu, click Generate BSP."
+ @$(ECHO)
+ @$(ECHO) To generate from the command line:
+ @$(ECHO) " nios2-bsp-generate-files --settings= --bsp-dir="
+ @$(ECHO)
+ @exit 1
+
+endif # $(MAKECMDGOALS) != clean
+
+#------------------------------------------------------------------------------
+# PATTERN RULES TO BUILD OBJECTS
+#------------------------------------------------------------------------------
+$(OBJ_DIR)/%.o: %.c
+ @$(ECHO) Compiling $(
trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/Makefile
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/alt_sys_init.c
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/alt_sys_init.c (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/alt_sys_init.c (revision 6)
@@ -0,0 +1,101 @@
+/*
+ * alt_sys_init.c - HAL initialization source
+ *
+ * Machine generated for CPU 'cpu' in SOPC Builder design 'sopc'
+ * SOPC Builder design path: ../../sopc.sopcinfo
+ *
+ * Generated: Fri Mar 17 06:26:33 BRT 2017
+ */
+
+/*
+ * DO NOT MODIFY THIS FILE
+ *
+ * Changing this file will have subtle consequences
+ * which will almost certainly lead to a nonfunctioning
+ * system. If you do modify this file, be aware that your
+ * changes will be overwritten and lost when this file
+ * is generated again.
+ *
+ * DO NOT MODIFY THIS FILE
+ */
+
+/*
+ * License Agreement
+ *
+ * Copyright (c) 2008
+ * Altera Corporation, San Jose, California, USA.
+ * All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * This agreement shall be governed in all respects by the laws of the State
+ * of California and by the laws of the United States of America.
+ */
+
+#include "system.h"
+#include "sys/alt_irq.h"
+#include "sys/alt_sys_init.h"
+
+#include
+
+/*
+ * Device headers
+ */
+
+#include "altera_nios2_gen2_irq.h"
+#include "altera_avalon_dma.h"
+#include "altera_avalon_jtag_uart.h"
+#include "altera_avalon_sysid_qsys.h"
+
+/*
+ * Allocate the device storage
+ */
+
+ALTERA_NIOS2_GEN2_IRQ_INSTANCE ( CPU, cpu);
+ALTERA_AVALON_DMA_INSTANCE ( DMA_RX, dma_rx);
+ALTERA_AVALON_DMA_INSTANCE ( DMA_TX, dma_tx);
+ALTERA_AVALON_JTAG_UART_INSTANCE ( JTAG_UART, jtag_uart);
+ALTERA_AVALON_SYSID_QSYS_INSTANCE ( SYSID, sysid);
+
+/*
+ * Initialize the interrupt controller devices
+ * and then enable interrupts in the CPU.
+ * Called before alt_sys_init().
+ * The "base" parameter is ignored and only
+ * present for backwards-compatibility.
+ */
+
+void alt_irq_init ( const void* base )
+{
+ ALTERA_NIOS2_GEN2_IRQ_INIT ( CPU, cpu);
+ alt_irq_cpu_enable_interrupts();
+}
+
+/*
+ * Initialize the non-interrupt controller devices.
+ * Called after alt_irq_init().
+ */
+
+void alt_sys_init( void )
+{
+ ALTERA_AVALON_DMA_INIT ( DMA_RX, dma_rx);
+ ALTERA_AVALON_DMA_INIT ( DMA_TX, dma_tx);
+ ALTERA_AVALON_JTAG_UART_INIT ( JTAG_UART, jtag_uart);
+ ALTERA_AVALON_SYSID_QSYS_INIT ( SYSID, sysid);
+}
trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/alt_sys_init.c
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/linker.h
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/linker.h (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/linker.h (revision 6)
@@ -0,0 +1,101 @@
+/*
+ * linker.h - Linker script mapping information
+ *
+ * Machine generated for CPU 'cpu' in SOPC Builder design 'sopc'
+ * SOPC Builder design path: ../../sopc.sopcinfo
+ *
+ * Generated: Fri Mar 17 06:26:33 BRT 2017
+ */
+
+/*
+ * DO NOT MODIFY THIS FILE
+ *
+ * Changing this file will have subtle consequences
+ * which will almost certainly lead to a nonfunctioning
+ * system. If you do modify this file, be aware that your
+ * changes will be overwritten and lost when this file
+ * is generated again.
+ *
+ * DO NOT MODIFY THIS FILE
+ */
+
+/*
+ * License Agreement
+ *
+ * Copyright (c) 2008
+ * Altera Corporation, San Jose, California, USA.
+ * All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * This agreement shall be governed in all respects by the laws of the State
+ * of California and by the laws of the United States of America.
+ */
+
+#ifndef __LINKER_H_
+#define __LINKER_H_
+
+
+/*
+ * BSP controls alt_load() behavior in crt0.
+ *
+ */
+
+#define ALT_LOAD_EXPLICITLY_CONTROLLED
+
+
+/*
+ * Base address and span (size in bytes) of each linker region
+ *
+ */
+
+#define RESET_REGION_BASE 0x800000
+#define RESET_REGION_SPAN 32
+#define SDRAM_REGION_BASE 0x800020
+#define SDRAM_REGION_SPAN 8388576
+
+
+/*
+ * Devices associated with code sections
+ *
+ */
+
+#define ALT_EXCEPTIONS_DEVICE SDRAM
+#define ALT_RESET_DEVICE SDRAM
+#define ALT_RODATA_DEVICE SDRAM
+#define ALT_RWDATA_DEVICE SDRAM
+#define ALT_TEXT_DEVICE SDRAM
+
+
+/*
+ * Initialization code at the reset address is allowed (e.g. no external bootloader).
+ *
+ */
+
+#define ALT_ALLOW_CODE_AT_RESET
+
+
+/*
+ * The alt_load() facility is called from crt0 to copy sections into RAM.
+ *
+ */
+
+#define ALT_LOAD_COPY_RWDATA
+
+#endif /* __LINKER_H_ */
trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/linker.h
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/linker.x
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/linker.x (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/linker.x (revision 6)
@@ -0,0 +1,386 @@
+/*
+ * linker.x - Linker script
+ *
+ * Machine generated for CPU 'cpu' in SOPC Builder design 'sopc'
+ * SOPC Builder design path: ../../sopc.sopcinfo
+ *
+ * Generated: Fri Mar 17 06:26:33 BRT 2017
+ */
+
+/*
+ * DO NOT MODIFY THIS FILE
+ *
+ * Changing this file will have subtle consequences
+ * which will almost certainly lead to a nonfunctioning
+ * system. If you do modify this file, be aware that your
+ * changes will be overwritten and lost when this file
+ * is generated again.
+ *
+ * DO NOT MODIFY THIS FILE
+ */
+
+/*
+ * License Agreement
+ *
+ * Copyright (c) 2008
+ * Altera Corporation, San Jose, California, USA.
+ * All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * This agreement shall be governed in all respects by the laws of the State
+ * of California and by the laws of the United States of America.
+ */
+
+MEMORY
+{
+ reset : ORIGIN = 0x800000, LENGTH = 32
+ sdram : ORIGIN = 0x800020, LENGTH = 8388576
+}
+
+/* Define symbols for each memory base-address */
+__alt_mem_sdram = 0x800000;
+
+OUTPUT_FORMAT( "elf32-littlenios2",
+ "elf32-littlenios2",
+ "elf32-littlenios2" )
+OUTPUT_ARCH( nios2 )
+ENTRY( _start )
+
+/*
+ * The alt_load() facility is enabled. This typically happens when there isn't
+ * an external bootloader (e.g. flash bootloader).
+ * The LMA (aka physical address) of each loaded section is
+ * set to the .text memory device.
+ * The HAL alt_load() routine called from crt0 copies sections from
+ * the .text memory to RAM as needed.
+ */
+
+SECTIONS
+{
+
+ /*
+ * Output sections associated with reset and exceptions (they have to be first)
+ */
+
+ .entry :
+ {
+ KEEP (*(.entry))
+ } > reset
+
+ .exceptions :
+ {
+ PROVIDE (__ram_exceptions_start = ABSOLUTE(.));
+ . = ALIGN(0x20);
+ KEEP (*(.irq));
+ KEEP (*(.exceptions.entry.label));
+ KEEP (*(.exceptions.entry.user));
+ KEEP (*(.exceptions.entry.ecc_fatal));
+ KEEP (*(.exceptions.entry));
+ KEEP (*(.exceptions.irqtest.user));
+ KEEP (*(.exceptions.irqtest));
+ KEEP (*(.exceptions.irqhandler.user));
+ KEEP (*(.exceptions.irqhandler));
+ KEEP (*(.exceptions.irqreturn.user));
+ KEEP (*(.exceptions.irqreturn));
+ KEEP (*(.exceptions.notirq.label));
+ KEEP (*(.exceptions.notirq.user));
+ KEEP (*(.exceptions.notirq));
+ KEEP (*(.exceptions.soft.user));
+ KEEP (*(.exceptions.soft));
+ KEEP (*(.exceptions.unknown.user));
+ KEEP (*(.exceptions.unknown));
+ KEEP (*(.exceptions.exit.label));
+ KEEP (*(.exceptions.exit.user));
+ KEEP (*(.exceptions.exit));
+ KEEP (*(.exceptions));
+ PROVIDE (__ram_exceptions_end = ABSOLUTE(.));
+ } > sdram
+
+ PROVIDE (__flash_exceptions_start = LOADADDR(.exceptions));
+
+ .text :
+ {
+ /*
+ * All code sections are merged into the text output section, along with
+ * the read only data sections.
+ *
+ */
+
+ PROVIDE (stext = ABSOLUTE(.));
+
+ *(.interp)
+ *(.hash)
+ *(.dynsym)
+ *(.dynstr)
+ *(.gnu.version)
+ *(.gnu.version_d)
+ *(.gnu.version_r)
+ *(.rel.init)
+ *(.rela.init)
+ *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*)
+ *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*)
+ *(.rel.fini)
+ *(.rela.fini)
+ *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*)
+ *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*)
+ *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*)
+ *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*)
+ *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*)
+ *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*)
+ *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*)
+ *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*)
+ *(.rel.ctors)
+ *(.rela.ctors)
+ *(.rel.dtors)
+ *(.rela.dtors)
+ *(.rel.got)
+ *(.rela.got)
+ *(.rel.sdata .rel.sdata.* .rel.gnu.linkonce.s.*)
+ *(.rela.sdata .rela.sdata.* .rela.gnu.linkonce.s.*)
+ *(.rel.sbss .rel.sbss.* .rel.gnu.linkonce.sb.*)
+ *(.rela.sbss .rela.sbss.* .rela.gnu.linkonce.sb.*)
+ *(.rel.sdata2 .rel.sdata2.* .rel.gnu.linkonce.s2.*)
+ *(.rela.sdata2 .rela.sdata2.* .rela.gnu.linkonce.s2.*)
+ *(.rel.sbss2 .rel.sbss2.* .rel.gnu.linkonce.sb2.*)
+ *(.rela.sbss2 .rela.sbss2.* .rela.gnu.linkonce.sb2.*)
+ *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*)
+ *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*)
+ *(.rel.plt)
+ *(.rela.plt)
+ *(.rel.dyn)
+
+ KEEP (*(.init))
+ *(.plt)
+ *(.text .stub .text.* .gnu.linkonce.t.*)
+
+ /* .gnu.warning sections are handled specially by elf32.em. */
+
+ *(.gnu.warning.*)
+ KEEP (*(.fini))
+ PROVIDE (__etext = ABSOLUTE(.));
+ PROVIDE (_etext = ABSOLUTE(.));
+ PROVIDE (etext = ABSOLUTE(.));
+
+ *(.eh_frame_hdr)
+ /* Ensure the __preinit_array_start label is properly aligned. We
+ could instead move the label definition inside the section, but
+ the linker would then create the section even if it turns out to
+ be empty, which isn't pretty. */
+ . = ALIGN(4);
+ PROVIDE (__preinit_array_start = ABSOLUTE(.));
+ *(.preinit_array)
+ PROVIDE (__preinit_array_end = ABSOLUTE(.));
+ PROVIDE (__init_array_start = ABSOLUTE(.));
+ *(.init_array)
+ PROVIDE (__init_array_end = ABSOLUTE(.));
+ PROVIDE (__fini_array_start = ABSOLUTE(.));
+ *(.fini_array)
+ PROVIDE (__fini_array_end = ABSOLUTE(.));
+ SORT(CONSTRUCTORS)
+ KEEP (*(.eh_frame))
+ *(.gcc_except_table .gcc_except_table.*)
+ *(.dynamic)
+ PROVIDE (__CTOR_LIST__ = ABSOLUTE(.));
+ KEEP (*(.ctors))
+ KEEP (*(SORT(.ctors.*)))
+ PROVIDE (__CTOR_END__ = ABSOLUTE(.));
+ PROVIDE (__DTOR_LIST__ = ABSOLUTE(.));
+ KEEP (*(.dtors))
+ KEEP (*(SORT(.dtors.*)))
+ PROVIDE (__DTOR_END__ = ABSOLUTE(.));
+ KEEP (*(.jcr))
+ . = ALIGN(4);
+ } > sdram = 0x3a880100 /* NOP instruction (always in big-endian byte ordering) */
+
+ .rodata :
+ {
+ PROVIDE (__ram_rodata_start = ABSOLUTE(.));
+ . = ALIGN(4);
+ *(.rodata .rodata.* .gnu.linkonce.r.*)
+ *(.rodata1)
+ . = ALIGN(4);
+ PROVIDE (__ram_rodata_end = ABSOLUTE(.));
+ } > sdram
+
+ PROVIDE (__flash_rodata_start = LOADADDR(.rodata));
+
+ /*
+ *
+ * This section's LMA is set to the .text region.
+ * crt0 will copy to this section's specified mapped region virtual memory address (VMA)
+ *
+ * .rwdata region equals the .text region, and is set to be loaded into .text region.
+ * This requires two copies of .rwdata in the .text region. One read writable at VMA.
+ * and one read-only at LMA. crt0 will copy from LMA to VMA on reset
+ *
+ */
+
+ .rwdata LOADADDR (.rodata) + SIZEOF (.rodata) : AT ( LOADADDR (.rodata) + SIZEOF (.rodata)+ SIZEOF (.rwdata) )
+ {
+ PROVIDE (__ram_rwdata_start = ABSOLUTE(.));
+ . = ALIGN(4);
+ *(.got.plt) *(.got)
+ *(.data1)
+ *(.data .data.* .gnu.linkonce.d.*)
+
+ _gp = ABSOLUTE(. + 0x8000);
+ PROVIDE(gp = _gp);
+
+ *(.rwdata .rwdata.*)
+ *(.sdata .sdata.* .gnu.linkonce.s.*)
+ *(.sdata2 .sdata2.* .gnu.linkonce.s2.*)
+
+ . = ALIGN(4);
+ _edata = ABSOLUTE(.);
+ PROVIDE (edata = ABSOLUTE(.));
+ PROVIDE (__ram_rwdata_end = ABSOLUTE(.));
+ } > sdram
+
+ PROVIDE (__flash_rwdata_start = LOADADDR(.rwdata));
+
+ /*
+ *
+ * This section's LMA is set to the .text region.
+ * crt0 will copy to this section's specified mapped region virtual memory address (VMA)
+ *
+ */
+
+ .bss LOADADDR (.rwdata) + SIZEOF (.rwdata) : AT ( LOADADDR (.rwdata) + SIZEOF (.rwdata) )
+ {
+ __bss_start = ABSOLUTE(.);
+ PROVIDE (__sbss_start = ABSOLUTE(.));
+ PROVIDE (___sbss_start = ABSOLUTE(.));
+
+ *(.dynsbss)
+ *(.sbss .sbss.* .gnu.linkonce.sb.*)
+ *(.sbss2 .sbss2.* .gnu.linkonce.sb2.*)
+ *(.scommon)
+
+ PROVIDE (__sbss_end = ABSOLUTE(.));
+ PROVIDE (___sbss_end = ABSOLUTE(.));
+
+ *(.dynbss)
+ *(.bss .bss.* .gnu.linkonce.b.*)
+ *(COMMON)
+
+ . = ALIGN(4);
+ __bss_end = ABSOLUTE(.);
+ } > sdram
+
+ /*
+ *
+ * One output section mapped to the associated memory device for each of
+ * the available memory devices. These are not used by default, but can
+ * be used by user applications by using the .section directive.
+ *
+ * The output section used for the heap is treated in a special way,
+ * i.e. the symbols "end" and "_end" are added to point to the heap start.
+ *
+ * Because alt_load() is enabled, these sections have
+ * their LMA set to be loaded into the .text memory region.
+ * However, the alt_load() code will NOT automatically copy
+ * these sections into their mapped memory region.
+ *
+ */
+
+ /*
+ *
+ * This section's LMA is set to the .text region.
+ * crt0 will copy to this section's specified mapped region virtual memory address (VMA)
+ *
+ */
+
+ .sdram LOADADDR (.bss) + SIZEOF (.bss) : AT ( LOADADDR (.bss) + SIZEOF (.bss) )
+ {
+ PROVIDE (_alt_partition_sdram_start = ABSOLUTE(.));
+ *(.sdram .sdram. sdram.*)
+ . = ALIGN(4);
+ PROVIDE (_alt_partition_sdram_end = ABSOLUTE(.));
+ _end = ABSOLUTE(.);
+ end = ABSOLUTE(.);
+ __alt_stack_base = ABSOLUTE(.);
+ } > sdram
+
+ PROVIDE (_alt_partition_sdram_load_addr = LOADADDR(.sdram));
+
+ /*
+ * Stabs debugging sections.
+ *
+ */
+
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ /* DWARF debug sections.
+ Symbols in the DWARF debugging sections are relative to the beginning
+ of the section so we begin them at 0. */
+ /* DWARF 1 */
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+ /* GNU DWARF 1 extensions */
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ /* DWARF 1.1 and DWARF 2 */
+ .debug_aranges 0 : { *(.debug_aranges) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ /* DWARF 2 */
+ .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_frame 0 : { *(.debug_frame) }
+ .debug_str 0 : { *(.debug_str) }
+ .debug_loc 0 : { *(.debug_loc) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+ /* SGI/MIPS DWARF 2 extensions */
+ .debug_weaknames 0 : { *(.debug_weaknames) }
+ .debug_funcnames 0 : { *(.debug_funcnames) }
+ .debug_typenames 0 : { *(.debug_typenames) }
+ .debug_varnames 0 : { *(.debug_varnames) }
+
+ /* Altera debug extensions */
+ .debug_alt_sim_info 0 : { *(.debug_alt_sim_info) }
+}
+
+/* provide a pointer for the stack */
+
+/*
+ * Don't override this, override the __alt_stack_* symbols instead.
+ */
+__alt_data_end = 0x1000000;
+
+/*
+ * The next two symbols define the location of the default stack. You can
+ * override them to move the stack to a different memory.
+ */
+PROVIDE( __alt_stack_pointer = __alt_data_end );
+PROVIDE( __alt_stack_limit = __alt_stack_base );
+
+/*
+ * This symbol controls where the start of the heap is. If the stack is
+ * contiguous with the heap then the stack will contract as memory is
+ * allocated to the heap.
+ * Override this symbol to put the heap in a different memory.
+ */
+PROVIDE( __alt_heap_start = end );
+PROVIDE( __alt_heap_limit = 0x1000000 );
trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/linker.x
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/mem_init.mk
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/mem_init.mk (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/mem_init.mk (revision 6)
@@ -0,0 +1,341 @@
+
+#########################################################################
+####### M E M I N I T M A K E F I L E C O N T E N T ######
+#########################################################################
+
+#########################################################################
+# This file is intended to be included by public.mk
+#
+#
+# The following variables must be defined before including this file:
+# - ELF
+#
+# The following variables may be defined to override the default behavior:
+# - HDL_SIM_DIR
+# - HDL_SIM_INSTALL_DIR
+# - MEM_INIT_DIR
+# - MEM_INIT_INSTALL_DIR
+# - QUARTUS_PROJECT_DIR
+# - SOPC_NAME
+# - SIM_OPTIMIZE
+# - RESET_ADDRESS
+#
+#########################################################################
+
+ifeq ($(MEM_INIT_FILE),)
+# MEM_INIT_FILE should be set equal to the working relative path to this
+# mem_init.mk makefile fragment
+MEM_INIT_FILE := $(wildcard $(word $(words $(MAKEFILE_LIST)),$(MAKEFILE_LIST)))
+endif
+
+ifeq ($(ELF2DAT),)
+ELF2DAT := elf2dat
+endif
+
+ifeq ($(ELF2HEX),)
+ELF2HEX := elf2hex
+endif
+
+ifeq ($(ELF2FLASH),)
+ELF2FLASH := elf2flash
+endif
+
+ifeq ($(FLASH2DAT),)
+FLASH2DAT := flash2dat
+endif
+
+ifeq ($(ALT_FILE_CONVERT),)
+ALT_FILE_CONVERT := alt-file-convert
+endif
+
+ifeq ($(NM),)
+NM := nios2-elf-nm
+endif
+
+ifeq ($(MKDIR),)
+MKDIR := mkdir -p
+endif
+
+ifeq ($(RM),)
+RM := rm -f
+endif
+
+ifeq ($(CP),)
+CP := cp
+endif
+
+ifeq ($(ECHO),)
+ECHO := echo
+endif
+
+MEM_INIT_DIR ?= mem_init
+HDL_SIM_DIR ?= $(MEM_INIT_DIR)/hdl_sim
+
+ifdef QUARTUS_PROJECT_DIR
+MEM_INIT_INSTALL_DIR ?= $(patsubst %/,%,$(QUARTUS_PROJECT_DIR))
+ifdef SOPC_NAME
+HDL_SIM_INSTALL_DIR ?= $(patsubst %/,%,$(QUARTUS_PROJECT_DIR))/$(SOPC_NAME)_sim
+endif
+endif
+
+MEM_INIT_DESCRIPTOR_FILE ?= $(MEM_INIT_DIR)/meminit.spd
+
+MEM_INIT_QIP_FILE ?= $(MEM_INIT_DIR)/meminit.qip
+
+#-------------------------------------
+# Default Flash Boot Loaders
+#-------------------------------------
+
+BOOT_LOADER_PATH ?= $(SOPC_KIT_NIOS2)/components/altera_nios2
+BOOT_LOADER_CFI ?= $(BOOT_LOADER_PATH)/boot_loader_cfi.srec
+BOOT_LOADER_CFI_BE ?= $(BOOT_LOADER_PATH)/boot_loader_cfi_be.srec
+
+
+#-------------------------------------
+# Default Target
+#-------------------------------------
+
+.PHONY: default_mem_init
+ifeq ($(QSYS),1)
+default_mem_init: mem_init_generate
+else
+default_mem_init: mem_init_install
+endif
+#-------------------------------------
+# Runtime Macros
+#-------------------------------------
+
+define post-process-info
+ @echo Post-processing to create $@...
+endef
+
+target_stem = $(notdir $(basename $@))
+
+mem_start_address = $($(target_stem)_START)
+mem_end_address = $($(target_stem)_END)
+mem_span = $($(target_stem)_SPAN)
+mem_width = $($(target_stem)_WIDTH)
+mem_hex_width = $($(target_stem)_HEX_DATA_WIDTH)
+mem_endianness = $($(target_stem)_ENDIANNESS)
+mem_create_lanes = $($(target_stem)_CREATE_LANES)
+
+mem_pad_flag = $($(target_stem)_PAD_FLAG)
+mem_reloc_input_flag = $($(target_stem)_RELOC_INPUT_FLAG)
+mem_no_zero_fill_flag = $($(target_stem)_NO_ZERO_FILL_FLAG)
+
+flash_mem_epcs_flag = $($(target_stem)_EPCS_FLAGS)
+flash_mem_cfi_flag = $($(target_stem)_CFI_FLAGS)
+flash_mem_boot_loader_flag = $($(target_stem)_BOOT_LOADER_FLAG)
+
+elf2dat_extra_args = $(mem_pad_flag)
+elf2hex_extra_args = $(mem_no_zero_fill_flag)
+elf2flash_extra_args = $(flash_mem_cfi_flag) $(flash_mem_epcs_flag) $(flash_mem_boot_loader_flag)
+flash2dat_extra_args = $(mem_pad_flag) $(mem_reloc_input_flag)
+
+#------------------------------------------------------------------------------
+# BSP SPECIFIC CONTENT
+#
+# The content below is controlled by the BSP and SOPC System
+#------------------------------------------------------------------------------
+#START OF BSP SPECIFIC
+
+#-------------------------------------
+# Global Settings
+#-------------------------------------
+
+
+# The following TYPE comment allows tools to identify the 'type' of target this
+# makefile is associated with.
+# TYPE: BSP_MEMINIT_MAKEFILE
+
+# This following VERSION comment indicates the version of the tool used to
+# generate this makefile. A makefile variable is provided for VERSION as well.
+# ACDS_VERSION: 16.1
+ACDS_VERSION := 16.1
+
+# This following BUILD_NUMBER comment indicates the build number of the tool
+# used to generate this makefile.
+# BUILD_NUMBER: 203
+
+# Optimize for simulation
+SIM_OPTIMIZE ?= 0
+
+# The CPU reset address as needed by elf2flash
+RESET_ADDRESS ?= 0x00800000
+
+# The specific Nios II ELF file format to use.
+NIOS2_ELF_FORMAT ?= elf32-littlenios2
+
+#-------------------------------------
+# Pre-Initialized Memory Descriptions
+#-------------------------------------
+
+# Memory: sdram
+MEM_0 := sdram
+$(MEM_0)_NAME := sdram
+DAT_FILES += $(HDL_SIM_DIR)/$(MEM_0).dat
+HDL_SIM_INSTALL_FILES += $(HDL_SIM_INSTALL_DIR)/$(MEM_0).dat
+SYM_FILES += $(HDL_SIM_DIR)/$(MEM_0).sym
+HDL_SIM_INSTALL_FILES += $(HDL_SIM_INSTALL_DIR)/$(MEM_0).sym
+$(MEM_0)_START := 0x00800000
+$(MEM_0)_END := 0x00ffffff
+$(MEM_0)_SPAN := 0x00800000
+$(MEM_0)_HIERARCHICAL_PATH := sdram
+$(MEM_0)_WIDTH := 8
+$(MEM_0)_HEX_DATA_WIDTH := 8
+$(MEM_0)_ENDIANNESS := --little-endian-mem
+$(MEM_0)_CREATE_LANES := 0
+
+.PHONY: sdram
+sdram: check_elf_exists $(HDL_SIM_DIR)/$(MEM_0).dat $(HDL_SIM_DIR)/$(MEM_0).sym
+
+
+#END OF BSP SPECIFIC
+
+#-------------------------------------
+# Pre-Initialized Memory Targets
+#-------------------------------------
+
+.PHONY: mem_init_install mem_init_generate mem_init_clean
+
+ifeq ($(QSYS),1)
+# Target mem_init_install is deprecated for QSys based systems
+# To initialize onchip memories for Quartus II Synthesis with Qsys based systems:
+# 1) Use "make mem_init_genearate"
+# 2) Add the generated mem_init/meminit.qip file to your Quartus II Project
+#
+mem_init_install:
+ $(error Deprecated Makefile Target: '$@'. Use target 'mem_init_generate' and then add $(MEM_INIT_QIP_FILE) to your Quartus II Project)
+
+else # QSYS != 1, if SopcBuilder based system
+
+ifneq ($(MEM_INIT_INSTALL_DIR),)
+mem_init_install: $(MEM_INIT_INSTALL_FILES)
+endif
+
+ifneq ($(HDL_SIM_INSTALL_DIR),)
+mem_init_install: $(HDL_SIM_INSTALL_FILES)
+endif
+
+mem_init_install: mem_init_generate
+ifeq ($(MEM_INIT_INSTALL_DIR),)
+ @echo "WARNING: MEM_INIT_INSTALL_DIR not set. Set your QUARTUS_PROJECT_DIR environment variable."
+endif
+ifeq ($(HDL_SIM_INSTALL_DIR),)
+ @echo "WARNING: HDL_SIM_INSTALL_DIR not set. Set your QUARTUS_PROJECT_DIR and SOPC_NAME environment variable."
+endif
+
+$(MEM_INIT_INSTALL_FILES): $(MEM_INIT_INSTALL_DIR)/%: $(MEM_INIT_DIR)/%
+ @$(MKDIR) $(@D)
+ @$(CP) -v $< $@
+
+$(HDL_SIM_INSTALL_FILES): $(HDL_SIM_INSTALL_DIR)/%: $(HDL_SIM_DIR)/%
+ @$(MKDIR) $(@D)
+ @$(CP) -v $< $@
+
+endif # QSYS == 1
+
+
+mem_init_generate: hex dat sym flash $(MEM_INIT_DESCRIPTOR_FILE) $(MEM_INIT_QIP_FILE)
+
+mem_init_clean:
+ @$(RM) -r $(MEM_INIT_DIR) $(HDL_SIM_DIR) $(FLASH_FILES)
+
+.PHONY: hex dat sym flash
+
+hex: check_elf_exists $(HEX_FILES)
+
+dat: check_elf_exists $(DAT_FILES)
+
+sym: check_elf_exists $(SYM_FILES)
+
+flash: check_elf_exists $(FLASH_FILES)
+
+#-------------------------------------
+# Pre-Initialized Memory Rules
+#-------------------------------------
+
+.PHONY: check_elf_exists
+check_elf_exists: $(ELF)
+ifeq ($(ELF),)
+ $(error ELF var not set in mem_init.mk)
+endif
+
+$(filter-out $(FLASH_DAT_FILES),$(DAT_FILES)): %.dat: $(ELF)
+ $(post-process-info)
+ @$(MKDIR) $(@D)
+ $(ELF2DAT) --infile=$< --outfile=$@ \
+ --base=$(mem_start_address) --end=$(mem_end_address) --width=$(mem_width) \
+ $(mem_endianness) --create-lanes=$(mem_create_lanes) $(elf2dat_extra_args)
+
+$(foreach i,0 1 2 3 4 5 6 7,%_lane$(i).dat): %.dat
+ @true
+
+ELF_TO_HEX_CMD_NO_BOOTLOADER = $(ELF2HEX) $< $(mem_start_address) $(mem_end_address) --width=$(mem_hex_width) \
+ $(mem_endianness) --create-lanes=$(mem_create_lanes) $(elf2hex_extra_args) $@
+
+ELF_TO_HEX_CMD_WITH_BOOTLOADER = $(ALT_FILE_CONVERT) -I $(NIOS2_ELF_FORMAT) -O hex --input=$< --output=$@ \
+ --base=$(mem_start_address) --end=$(mem_end_address) --reset=$(RESET_ADDRESS) \
+ --out-data-width=$(mem_hex_width) $(flash_mem_boot_loader_flag)
+
+ELF_TO_HEX_CMD = $(strip $(if $(flash_mem_boot_loader_flag), \
+ $(ELF_TO_HEX_CMD_WITH_BOOTLOADER), \
+ $(ELF_TO_HEX_CMD_NO_BOOTLOADER) \
+ ))
+
+$(HEX_FILES): %.hex: $(ELF)
+ $(post-process-info)
+ @$(MKDIR) $(@D)
+ $(ELF_TO_HEX_CMD)
+
+$(SYM_FILES): %.sym: $(ELF)
+ $(post-process-info)
+ @$(MKDIR) $(@D)
+ $(NM) -n $< > $@
+
+$(FLASH_FILES): %.flash: $(ELF)
+ $(post-process-info)
+ @$(MKDIR) $(@D)
+ $(ELF2FLASH) --input=$< --outfile=$@ --sim_optimize=$(SIM_OPTIMIZE) $(mem_endianness) \
+ $(elf2flash_extra_args)
+
+#
+# Function generate_spd_entry
+# Arg1: path to the memory initialization file
+# Arg2: Type HEX or DAT
+# Arg3: Output spd file to append
+gen_spd_entry.BASE_FILE = $(basename $(notdir $1))
+gen_spd_entry.PARAM_NAME = $($(gen_spd_entry.BASE_FILE)_MEM_INIT_FILE_PARAM_NAME)
+gen_spd_entry.MEM_PATH = $($(gen_spd_entry.BASE_FILE)_HIERARCHICAL_PATH)
+gen_spd_entry.SETTINGS = $(strip \
+ path=\"$1\" \
+ type=\"$2\" \
+ $(if $(gen_spd_entry.PARAM_NAME),initParamName=\"$(gen_spd_entry.PARAM_NAME)\") \
+ $(if $(gen_spd_entry.MEM_PATH),memoryPath=\"$(gen_spd_entry.MEM_PATH)\") \
+)
+define gen_spd_entry
+$(ECHO) "
" >> $3
+endef
+
+$(MEM_INIT_DESCRIPTOR_FILE).DAT_FILESET := $(patsubst $(dir $(MEM_INIT_DESCRIPTOR_FILE))%,%,$(DAT_FILES))
+$(MEM_INIT_DESCRIPTOR_FILE).HEX_FILESET := $(patsubst $(dir $(MEM_INIT_DESCRIPTOR_FILE))%,%,$(HEX_FILES))
+
+$(MEM_INIT_DESCRIPTOR_FILE): %.spd: $(MEM_INIT_FILE)
+ $(post-process-info)
+ @$(MKDIR) $(@D)
+ @$(RM) $@
+ @$(ECHO) "" > $@
+ @$(ECHO) "
" >> $@
+ @$(foreach dat_file,$($@.DAT_FILESET),$(call gen_spd_entry,$(dat_file),DAT,$@) &&)true
+ @$(foreach hex_file,$($@.HEX_FILESET),$(call gen_spd_entry,$(hex_file),HEX,$@) &&)true
+ @$(ECHO) "" >> $@
+
+.DELETE_ON_ERROR: $(MEM_INIT_DESCRIPTOR_FILE)
+
+$(MEM_INIT_QIP_FILE): %.qip: $(MEM_INIT_FILE)
+ $(post-process-info)
+ @$(MKDIR) $(@D)
+ @$(RM) $@
+ @$(ECHO) "set_global_assignment -name SEARCH_PATH $$::quartus(qip_path)" > $@
+
+.DELETE_ON_ERROR: $(MEM_INIT_QIP_FILE)
trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/mem_init.mk
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/memory.gdb
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/memory.gdb (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/memory.gdb (revision 6)
@@ -0,0 +1,50 @@
+# memory.gdb - GDB memory region definitions
+#
+# Machine generated for CPU 'cpu' in SOPC Builder design 'sopc'
+# SOPC Builder design path: ../../sopc.sopcinfo
+#
+# Generated: Fri Mar 17 06:26:33 BRT 2017
+
+# DO NOT MODIFY THIS FILE
+#
+# Changing this file will have subtle consequences
+# which will almost certainly lead to a nonfunctioning
+# system. If you do modify this file, be aware that your
+# changes will be overwritten and lost when this file
+# is generated again.
+#
+# DO NOT MODIFY THIS FILE
+
+# License Agreement
+#
+# Copyright (c) 2008
+# Altera Corporation, San Jose, California, USA.
+# All rights reserved.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a
+# copy of this software and associated documentation files (the "Software"),
+# to deal in the Software without restriction, including without limitation
+# the rights to use, copy, modify, merge, publish, distribute, sublicense,
+# and/or sell copies of the Software, and to permit persons to whom the
+# Software is furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+# DEALINGS IN THE SOFTWARE.
+#
+# This agreement shall be governed in all respects by the laws of the State
+# of California and by the laws of the United States of America.
+
+# Define memory regions for each memory connected to the CPU.
+# The cache attribute is specified which improves GDB performance
+# by allowing GDB to cache memory contents on the host.
+
+# sdram
+memory 0x800000 0x1000000 cache
trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/memory.gdb
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/public.mk
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/public.mk (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/public.mk (revision 6)
@@ -0,0 +1,415 @@
+#------------------------------------------------------------------------------
+# BSP "PUBLIC" MAKEFILE CONTENT
+#
+# This file is intended to be included in an application or library
+# Makefile that is using this BSP. You can create such a Makefile with
+# the nios2-app-generate-makefile or nios2-lib-generate-makefile
+# commands.
+#
+# The following variables must be defined before including this file:
+#
+# ALT_LIBRARY_ROOT_DIR
+# Contains the path to the BSP top-level (aka root) directory
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# PATHS
+#------------------------------------------------------------------------------
+
+
+
+# Path to the provided linker script.
+BSP_LINKER_SCRIPT := $(ALT_LIBRARY_ROOT_DIR)/linker.x
+
+# Include paths:
+# The path to root of all header files that a library wishes to make
+# available for an application's use is specified here. Note that this
+# may not be *all* folders within a hierarchy. For example, if it is
+# desired that the application developer type:
+# #include
+# #include
+# With files laid out like this:
+# /inc/sockets.h
+# /inc/ip/tcpip.h
+#
+# Then, only /inc need be added to the list of include
+# directories. Alternatively, if you wish to be able to directly include
+# all files in a hierarchy, separate paths to each folder in that
+# hierarchy must be defined.
+
+# The following are the "base" set of include paths for a BSP.
+# These paths are appended to the list that individual software
+# components, drivers, etc., add in the generated portion of this
+# file (below).
+ALT_INCLUDE_DIRS_TO_APPEND += \
+ $(ALT_LIBRARY_ROOT_DIR) \
+ $(ALT_LIBRARY_ROOT_DIR)/drivers/inc
+
+# Additions to linker library search-path:
+# Here we provide a path to "our self" for the application to construct a
+# "-L " out of. This should contain a list of directories,
+# relative to the library root, of all directories with .a files to link
+# against.
+ALT_LIBRARY_DIRS += $(ALT_LIBRARY_ROOT_DIR)
+
+
+#------------------------------------------------------------------------------
+# COMPILATION FLAGS
+#------------------------------------------------------------------------------
+# Default C pre-processor flags for a BSP:
+ALT_CPPFLAGS += -pipe
+
+
+#------------------------------------------------------------------------------
+# MANAGED CONTENT
+#
+# All content between the lines "START MANAGED" and "END MANAGED" below is
+# generated based on variables in the BSP settings file when the
+# nios2-bsp-generate-files command is invoked. If you wish to persist any
+# information pertaining to the build process, it is recomended that you
+# utilize the BSP settings mechanism to do so.
+#------------------------------------------------------------------------------
+#START MANAGED
+
+# The following TYPE comment allows tools to identify the 'type' of target this
+# makefile is associated with.
+# TYPE: BSP_PUBLIC_MAKEFILE
+
+# This following VERSION comment indicates the version of the tool used to
+# generate this makefile. A makefile variable is provided for VERSION as well.
+# ACDS_VERSION: 16.1
+ACDS_VERSION := 16.1
+
+# This following BUILD_NUMBER comment indicates the build number of the tool
+# used to generate this makefile.
+# BUILD_NUMBER: 203
+
+# Qsys--generated SOPCINFO file. Required for resolving node instance ID's with
+# design component names.
+SOPCINFO_FILE := $(ABS_BSP_ROOT_DIR)/../../sopc.sopcinfo
+
+# Big-Endian operation.
+# setting BIG_ENDIAN is false
+
+
+# BMX present.
+# setting BMX is false
+
+# Path to the provided C language runtime initialization code.
+BSP_CRT0 := $(ALT_LIBRARY_ROOT_DIR)/obj/HAL/src/crt0.o
+
+# Name of BSP library as provided to linker using the "-msys-lib" flag or
+# linker script GROUP command.
+# setting BSP_SYS_LIB is hal_bsp
+BSP_SYS_LIB := hal_bsp
+ELF_PATCH_FLAG += --thread_model hal
+
+# Type identifier of the BSP library
+# setting BSP_TYPE is hal
+ALT_CPPFLAGS += -D__hal__
+BSP_TYPE := hal
+
+# CDX present.
+# setting CDX is false
+
+# CPU Name
+# setting CPU_NAME is cpu
+CPU_NAME = cpu
+ELF_PATCH_FLAG += --cpu_name $(CPU_NAME)
+
+# Hardware Divider present.
+# setting HARDWARE_DIVIDE is false
+ALT_CFLAGS += -mno-hw-div
+
+# Hardware Multiplier present.
+# setting HARDWARE_MULTIPLY is false
+ALT_CFLAGS += -mno-hw-mul
+
+# Hardware Mulx present.
+# setting HARDWARE_MULX is false
+ALT_CFLAGS += -mno-hw-mulx
+
+# Debug Core present.
+# setting HAS_DEBUG_CORE is true
+CPU_HAS_DEBUG_CORE = 1
+
+# Qsys generated design
+# setting QSYS is 1
+QSYS := 1
+ELF_PATCH_FLAG += --qsys true
+
+# Design Name
+# setting SOPC_NAME is sopc
+SOPC_NAME := sopc
+
+# SopcBuilder Simulation Enabled
+# setting SOPC_SIMULATION_ENABLED is false
+ELF_PATCH_FLAG += --simulation_enabled false
+
+# The SOPC System ID
+# setting SOPC_SYSID is 14303232
+SOPC_SYSID_FLAG += --id=14303232
+ELF_PATCH_FLAG += --id 14303232
+
+# The SOPC System ID Base Address
+# setting SOPC_SYSID_BASE_ADDRESS is 0x1001048
+SOPC_SYSID_FLAG += --sidp=0x1001048
+ELF_PATCH_FLAG += --sidp 0x1001048
+
+# The SOPC Timestamp
+# setting SOPC_TIMESTAMP is 1491576696
+SOPC_SYSID_FLAG += --timestamp=1491576696
+ELF_PATCH_FLAG += --timestamp 1491576696
+
+# Enable JTAG UART driver to recover when host is inactive causing buffer to
+# full without returning error. Printf will not fail with this recovery. none
+# setting altera_avalon_jtag_uart_driver.enable_jtag_uart_ignore_fifo_full_error is false
+
+# Small-footprint (polled mode) driver none
+# setting altera_avalon_jtag_uart_driver.enable_small_driver is false
+
+# Build a custom version of newlib with the specified space-separated compiler
+# flags. The custom newlib build will be placed in the /newlib
+# directory, and will be used only for applications that utilize this BSP.
+# setting hal.custom_newlib_flags is none
+
+# Enable support for a subset of the C++ language. This option increases code
+# footprint by adding support for C++ constructors. Certain features, such as
+# multiple inheritance and exceptions are not supported. If false, adds
+# -DALT_NO_C_PLUS_PLUS to ALT_CPPFLAGS in public.mk, and reduces code
+# footprint. none
+# setting hal.enable_c_plus_plus is true
+
+# When your application exits, close file descriptors, call C++ destructors,
+# etc. Code footprint can be reduced by disabling clean exit. If disabled, adds
+# -DALT_NO_CLEAN_EXIT to ALT_CPPFLAGS -D'exit(a)=_exit(a)' in public.mk. none
+# setting hal.enable_clean_exit is true
+
+# Add exit() support. This option increases code footprint if your "main()"
+# routine does "return" or call "exit()". If false, adds -DALT_NO_EXIT to
+# ALT_CPPFLAGS in public.mk, and reduces footprint none
+# setting hal.enable_exit is true
+
+# Causes code to be compiled with gprof profiling enabled and the application
+# ELF to be linked with the GPROF library. If true, adds -DALT_PROVIDE_GMON to
+# ALT_CPPFLAGS and -pg to ALT_CFLAGS in public.mk. none
+# setting hal.enable_gprof is false
+
+# Enables lightweight device driver API. This reduces code and data footprint
+# by removing the HAL layer that maps device names (e.g. /dev/uart0) to file
+# descriptors. Instead, driver routines are called directly. The open(),
+# close(), and lseek() routines will always fail if called. The read(),
+# write(), fstat(), ioctl(), and isatty() routines only work for the stdio
+# devices. If true, adds -DALT_USE_DIRECT_DRIVERS to ALT_CPPFLAGS in public.mk.
+# The Altera Host and read-only ZIP file systems can't be used if
+# hal.enable_lightweight_device_driver_api is true.
+# setting hal.enable_lightweight_device_driver_api is false
+
+# Adds code to emulate multiply and divide instructions in case they are
+# executed but aren't present in the CPU. Normally this isn't required because
+# the compiler won't use multiply and divide instructions that aren't present
+# in the CPU. If false, adds -DALT_NO_INSTRUCTION_EMULATION to ALT_CPPFLAGS in
+# public.mk. none
+# setting hal.enable_mul_div_emulation is false
+ALT_CPPFLAGS += -DALT_NO_INSTRUCTION_EMULATION
+
+# Certain drivers are compiled with reduced functionality to reduce code
+# footprint. Not all drivers observe this setting. The altera_avalon_uart and
+# altera_avalon_jtag_uart drivers switch from interrupt-driven to polled
+# operation. CAUTION: Several device drivers are disabled entirely. These
+# include the altera_avalon_cfi_flash, altera_avalon_epcs_flash_controller, and
+# altera_avalon_lcd_16207 drivers. This can result in certain API (HAL flash
+# access routines) to fail. You can define a symbol provided by each driver to
+# prevent it from being removed. If true, adds -DALT_USE_SMALL_DRIVERS to
+# ALT_CPPFLAGS in public.mk. none
+# setting hal.enable_reduced_device_drivers is false
+
+# Turns on HAL runtime stack checking feature. Enabling this setting causes
+# additional code to be placed into each subroutine call to generate an
+# exception if a stack collision occurs with the heap or statically allocated
+# data. If true, adds -DALT_STACK_CHECK and -fstack-limit-register=et to
+# ALT_CPPFLAGS in public.mk. none
+# setting hal.enable_runtime_stack_checking is false
+
+# The BSP is compiled with optimizations to speedup HDL simulation such as
+# initializing the cache, clearing the .bss section, and skipping long delay
+# loops. If true, adds -DALT_SIM_OPTIMIZE to ALT_CPPFLAGS in public.mk. When
+# this setting is true, the BSP shouldn't be used to build applications that
+# are expected to run real hardware.
+# setting hal.enable_sim_optimize is false
+
+# Causes the small newlib (C library) to be used. This reduces code and data
+# footprint at the expense of reduced functionality. Several newlib features
+# are removed such as floating-point support in printf(), stdin input routines,
+# and buffered I/O. The small C library is not compatible with Micrium
+# MicroC/OS-II. If true, adds -msmallc to ALT_LDFLAGS in public.mk. none
+# setting hal.enable_small_c_library is false
+
+# Enable SOPC Builder System ID. If a System ID SOPC Builder component is
+# connected to the CPU associated with this BSP, it will be enabled in the
+# creation of command-line arguments to download an ELF to the target.
+# Otherwise, system ID and timestamp values are left out of public.mk for
+# application Makefile "download-elf" target definition. With the system ID
+# check disabled, the Nios II EDS tools will not automatically ensure that the
+# application .elf file (and BSP it is linked against) corresponds to the
+# hardware design on the target. If false, adds --accept-bad-sysid to
+# SOPC_SYSID_FLAG in public.mk. none
+# setting hal.enable_sopc_sysid_check is true
+
+# C/C++ compiler to generate (do not generate) GP-relative accesses. 'none'
+# tells the compilter not to generate GP-relative accesses. 'local' will
+# generate GP-relative accesses for small data objects that are not external,
+# weak, or uninitialized common symbols. Also use GP-relative addressing for
+# objects that have been explicitly placed in a small data section via a
+# section attribute. provides the default set of debug symbols typically
+# required to debug a typical application. 'global' is same as 'local' but also
+# generate GP-relative accesses for small data objects that are external, weak,
+# or common. none
+# setting hal.make.cflags_mgpopt is -mgpopt=local
+ALT_CFLAGS += -mgpopt=local
+
+# Enable BSP generation to query if SOPC system is big endian. If true ignores
+# export of 'ALT_CFLAGS += -meb' to public.mk if big endian system. none
+# setting hal.make.ignore_system_derived.big_endian is false
+
+# If true, prevents GCC from using BMX instructions. If false, GCC uses BMX
+# instructions if present in the CPU. none
+# setting hal.make.ignore_system_derived.bmx_present is false
+
+# If true, prevents GCC from using CDX instructions. If false, GCC uses CDX
+# instructions if present in the CPU. none
+# setting hal.make.ignore_system_derived.cdx_present is false
+
+# Enable BSP generation to query if SOPC system has a debug core present. If
+# true ignores export of 'CPU_HAS_DEBUG_CORE = 1' to public.mk if a debug core
+# is found in the system. If true ignores export of 'CPU_HAS_DEBUG_CORE = 0' if
+# no debug core is found in the system. none
+# setting hal.make.ignore_system_derived.debug_core_present is false
+
+# Enable BSP generation to query if SOPC system has FPU present. If true
+# ignores export of 'ALT_CFLAGS += -mhard-float' to public.mk if FPU is found
+# in the system. If true ignores export of 'ALT_CFLAGS += -mhard-soft' if FPU
+# is not found in the system. none
+# setting hal.make.ignore_system_derived.fpu_present is false
+
+# Enable BSP generation to query if SOPC system has hardware divide present. If
+# true ignores export of 'ALT_CFLAGS += -mno-hw-div' to public.mk if no
+# division is found in system. If true ignores export of 'ALT_CFLAGS +=
+# -mhw-div' if division is found in the system. none
+# setting hal.make.ignore_system_derived.hardware_divide_present is false
+
+# Enable BSP generation to query if SOPC system floating point custom
+# instruction with a divider is present. If true ignores export of 'ALT_CFLAGS
+# += -mcustom-fpu-cfg=60-2' and 'ALT_LDFLAGS += -mcustom-fpu-cfg=60-2' to
+# public.mk if the custom instruction is found in the system. none
+# setting hal.make.ignore_system_derived.hardware_fp_cust_inst_divider_present is false
+
+# Enable BSP generation to query if SOPC system floating point custom
+# instruction without a divider is present. If true ignores export of
+# 'ALT_CFLAGS += -mcustom-fpu-cfg=60-1' and 'ALT_LDFLAGS +=
+# -mcustom-fpu-cfg=60-1' to public.mk if the custom instruction is found in the
+# system. none
+# setting hal.make.ignore_system_derived.hardware_fp_cust_inst_no_divider_present is false
+
+# Enable BSP generation to query if SOPC system has multiplier present. If true
+# ignores export of 'ALT_CFLAGS += -mno-hw-mul' to public.mk if no multiplier
+# is found in the system. If true ignores export of 'ALT_CFLAGS += -mhw-mul' if
+# multiplier is found in the system. none
+# setting hal.make.ignore_system_derived.hardware_multiplier_present is false
+
+# Enable BSP generation to query if SOPC system has hardware mulx present. If
+# true ignores export of 'ALT_CFLAGS += -mno-hw-mulx' to public.mk if no mulx
+# is found in the system. If true ignores export of 'ALT_CFLAGS += -mhw-mulx'
+# if mulx is found in the system. none
+# setting hal.make.ignore_system_derived.hardware_mulx_present is false
+
+# Enable BSP generation to query if SOPC system has simulation enabled. If true
+# ignores export of 'ELF_PATCH_FLAG += --simulation_enabled' to public.mk. none
+# setting hal.make.ignore_system_derived.sopc_simulation_enabled is false
+
+# Enable BSP generation to query SOPC system for system ID base address. If
+# true ignores export of 'SOPC_SYSID_FLAG += --sidp=' and
+# 'ELF_PATCH_FLAG += --sidp=' to public.mk. none
+# setting hal.make.ignore_system_derived.sopc_system_base_address is false
+
+# Enable BSP generation to query SOPC system for system ID. If true ignores
+# export of 'SOPC_SYSID_FLAG += --id=' and 'ELF_PATCH_FLAG +=
+# --id=' to public.mk. none
+# setting hal.make.ignore_system_derived.sopc_system_id is false
+
+# Enable BSP generation to query SOPC system for system timestamp. If true
+# ignores export of 'SOPC_SYSID_FLAG += --timestamp=' and
+# 'ELF_PATCH_FLAG += --timestamp=' to public.mk. none
+# setting hal.make.ignore_system_derived.sopc_system_timestamp is false
+
+# Slave descriptor of STDERR character-mode device. This setting is used by the
+# ALT_STDERR family of defines in system.h. none
+# setting hal.stderr is jtag_uart
+ELF_PATCH_FLAG += --stderr_dev jtag_uart
+
+# Slave descriptor of STDIN character-mode device. This setting is used by the
+# ALT_STDIN family of defines in system.h. none
+# setting hal.stdin is jtag_uart
+ELF_PATCH_FLAG += --stdin_dev jtag_uart
+
+# Slave descriptor of STDOUT character-mode device. This setting is used by the
+# ALT_STDOUT family of defines in system.h. none
+# setting hal.stdout is jtag_uart
+ELF_PATCH_FLAG += --stdout_dev jtag_uart
+
+
+#------------------------------------------------------------------------------
+# SOFTWARE COMPONENT & DRIVER INCLUDE PATHS
+#------------------------------------------------------------------------------
+
+ALT_INCLUDE_DIRS += $(ALT_LIBRARY_ROOT_DIR)/HAL/inc
+
+#------------------------------------------------------------------------------
+# SOFTWARE COMPONENT & DRIVER PRODUCED ALT_CPPFLAGS ADDITIONS
+#------------------------------------------------------------------------------
+
+ALT_CPPFLAGS += -DALT_SINGLE_THREADED
+
+#END MANAGED
+
+
+#------------------------------------------------------------------------------
+# LIBRARY INFORMATION
+#------------------------------------------------------------------------------
+# Assemble the name of the BSP *.a file using the BSP library name
+# (BSP_SYS_LIB) in generated content above.
+BSP_LIB := lib$(BSP_SYS_LIB).a
+
+# Additional libraries to link against:
+# An application including this file will prefix each library with "-l".
+# For example, to include the Newlib math library "m" is included, which
+# becomes "-lm" when linking the application.
+ALT_LIBRARY_NAMES += m
+
+# Additions to linker dependencies:
+# An application Makefile will typically add these directly to the list
+# of dependencies required to build the executable target(s). The BSP
+# library (*.a) file is specified here.
+ALT_LDDEPS += $(ALT_LIBRARY_ROOT_DIR)/$(BSP_LIB)
+
+# Is this library "Makeable"?
+# Add to list of root library directories that support running 'make'
+# to build them. Because libraries may or may not have a Makefile in their
+# root, appending to this variable tells an application to run 'make' in
+# the library root to build/update this library.
+MAKEABLE_LIBRARY_ROOT_DIRS += $(ALT_LIBRARY_ROOT_DIR)
+
+# Additional Assembler Flags
+# -gdwarf2 flag is required for stepping through assembly code
+ALT_ASFLAGS += -gdwarf2
+
+#------------------------------------------------------------------------------
+# FINAL INCLUDE PATH LIST
+#------------------------------------------------------------------------------
+# Append static include paths to paths specified by OS/driver/sw package
+# additions to the BSP thus giving them precedence in case a BSP addition
+# is attempting to override BSP sources.
+ALT_INCLUDE_DIRS += $(ALT_INCLUDE_DIRS_TO_APPEND)
+
+
+
trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/public.mk
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/settings.bsp
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/settings.bsp (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/settings.bsp (revision 6)
@@ -0,0 +1,967 @@
+
+
+ hal
+ default
+ Apr 7, 2017 5:55:28 PM
+ 1491576928819
+ /mnt/2E8816D588169B81/edv/workspace/usb_ft232h/altera/test_usb_ft232h/software/usb_ft232h_bsp
+ settings.bsp
+ ../../sopc.sopcinfo
+ default
+ cpu
+ 1.9
+
+ hal.sys_clk_timer
+ ALT_SYS_CLK
+ UnquotedString
+ none
+ none
+ system_h_define
+ Slave descriptor of the system clock timer device. This device provides a periodic interrupt ("tick") and is typically required for RTOS use. This setting defines the value of ALT_SYS_CLK in system.h.
+ none
+ false
+ common
+
+
+ hal.timestamp_timer
+ ALT_TIMESTAMP_CLK
+ UnquotedString
+ none
+ none
+ system_h_define
+ Slave descriptor of timestamp timer device. This device is used by Altera HAL timestamp drivers for high-resolution time measurement. This setting defines the value of ALT_TIMESTAMP_CLK in system.h.
+ none
+ false
+ common
+
+
+ hal.max_file_descriptors
+ ALT_MAX_FD
+ DecimalNumber
+ 32
+ 32
+ system_h_define
+ Determines the number of file descriptors statically allocated. This setting defines the value of ALT_MAX_FD in system.h.
+ If hal.enable_lightweight_device_driver_api is true, there are no file descriptors so this setting is ignored. If hal.enable_lightweight_device_driver_api is false, this setting must be at least 4 because HAL needs a file descriptor for /dev/null, /dev/stdin, /dev/stdout, and /dev/stderr.
+ false
+
+
+
+ hal.enable_instruction_related_exceptions_api
+ ALT_INCLUDE_INSTRUCTION_RELATED_EXCEPTION_API
+ BooleanDefineOnly
+ true
+ false
+ system_h_define
+ Enables API for registering handlers to service instruction-related exceptions. Enabling this setting increases the size of the exception entry code.
+ These exception types can be generated if various processor options are enabled, such as the MMU, MPU, or other advanced exception types.
+ false
+
+
+
+ hal.linker.allow_code_at_reset
+ ALT_ALLOW_CODE_AT_RESET
+ Boolean
+ 1
+ 0
+ none
+ Indicates if initialization code is allowed at the reset address. If true, defines the macro ALT_ALLOW_CODE_AT_RESET in linker.h.
+ If true, defines the macro ALT_ALLOW_CODE_AT_RESET in linker.h. This setting is typically false if an external bootloader (e.g. flash bootloader) is present.
+ false
+
+
+
+ hal.linker.enable_alt_load
+ none
+ Boolean
+ 1
+ 0
+ none
+ Enables the alt_load() facility. The alt_load() facility copies data sections (.rodata, .rwdata, or .exceptions) from boot memory to RAM. If true, this setting sets up the VMA/LMA of sections in linker.x to allow them to be loaded into the .text memory.
+ This setting is typically false if an external bootloader (e.g. flash bootloader) is present.
+ false
+
+
+
+ hal.linker.enable_alt_load_copy_rodata
+ none
+ Boolean
+ 0
+ 0
+ none
+ Causes the alt_load() facility to copy the .rodata section. If true, this setting defines the macro ALT_LOAD_COPY_RODATA in linker.h.
+ none
+ false
+
+
+
+ hal.linker.enable_alt_load_copy_rwdata
+ none
+ Boolean
+ 1
+ 0
+ none
+ Causes the alt_load() facility to copy the .rwdata section. If true, this setting defines the macro ALT_LOAD_COPY_RWDATA in linker.h.
+ none
+ false
+
+
+
+ hal.linker.enable_alt_load_copy_exceptions
+ none
+ Boolean
+ 0
+ 0
+ none
+ Causes the alt_load() facility to copy the .exceptions section. If true, this setting defines the macro ALT_LOAD_COPY_EXCEPTIONS in linker.h.
+ none
+ false
+
+
+
+ hal.linker.enable_exception_stack
+ none
+ Boolean
+ 0
+ 0
+ none
+ Enables use of a separate exception stack. If true, defines the macro ALT_EXCEPTION_STACK in linker.h, adds a memory region called exception_stack to linker.x, and provides the symbols __alt_exception_stack_pointer and __alt_exception_stack_limit in linker.x.
+ The hal.linker.exception_stack_size and hal.linker.exception_stack_memory_region_name settings must also be valid. This setting must be false for MicroC/OS-II BSPs. The exception stack can be used to improve interrupt and other exception performance if the EIC is *not* used.
+ false
+ common
+
+
+ hal.linker.exception_stack_size
+ none
+ DecimalNumber
+ 1024
+ 1024
+ none
+ Size of the exception stack in bytes.
+ Only used if hal.linker.enable_exception_stack is true.
+ false
+ common
+
+
+ hal.linker.exception_stack_memory_region_name
+ none
+ UnquotedString
+ sdram
+ none
+ none
+ Name of the existing memory region that will be divided up to create the 'exception_stack' memory region. The selected region name will be adjusted automatically when the BSP is generated to create the 'exception_stack' memory region.
+ Only used if hal.linker.enable_exception_stack is true.
+ false
+ common
+
+
+ hal.linker.enable_interrupt_stack
+ none
+ Boolean
+ 0
+ 0
+ none
+ Enables use of a separate interrupt stack. If true, defines the macro ALT_INTERRUPT_STACK in linker.h, adds a memory region called interrupt_stack to linker.x, and provides the symbols __alt_interrupt_stack_pointer and __alt_interrupt_stack_limit in linker.x.
+ The hal.linker.interrupt_stack_size and hal.linker.interrupt_stack_memory_region_name settings must also be valid. This setting must be false for MicroC/OS-II BSPs. Only enable if the EIC is used exclusively. The exception stack can be used to improve interrupt and other exception performance if the EIC is *not* used.
+ false
+ common
+
+
+ hal.linker.interrupt_stack_size
+ none
+ DecimalNumber
+ 1024
+ 1024
+ none
+ Size of the interrupt stack in bytes.
+ Only used if hal.linker.enable_interrupt_stack is true.
+ false
+ common
+
+
+ hal.linker.interrupt_stack_memory_region_name
+ none
+ UnquotedString
+ sdram
+ none
+ none
+ Name of the existing memory region that will be divided up to create the 'interrupt_stack' memory region. The selected region name will be adjusted automatically when the BSP is generated to create the 'interrupt_stack' memory region.
+ Only used if hal.linker.enable_interrupt_stack is true.
+ false
+ common
+
+
+ hal.stdin
+ none
+ UnquotedString
+ jtag_uart
+ none
+ system_h_define
+ Slave descriptor of STDIN character-mode device. This setting is used by the ALT_STDIN family of defines in system.h.
+ none
+ false
+ common
+
+
+ hal.stdout
+ none
+ UnquotedString
+ jtag_uart
+ none
+ system_h_define
+ Slave descriptor of STDOUT character-mode device. This setting is used by the ALT_STDOUT family of defines in system.h.
+ none
+ false
+ common
+
+
+ hal.stderr
+ none
+ UnquotedString
+ jtag_uart
+ none
+ system_h_define
+ Slave descriptor of STDERR character-mode device. This setting is used by the ALT_STDERR family of defines in system.h.
+ none
+ false
+ common
+
+
+ hal.log_port
+ none
+ UnquotedString
+ none
+ none
+ public_mk_define
+ Slave descriptor of debug logging character-mode device. If defined, it enables extra debug messages in the HAL source. This setting is used by the ALT_LOG_PORT family of defines in system.h.
+ none
+ false
+ none
+
+
+ hal.make.build_pre_process
+ BUILD_PRE_PROCESS
+ UnquotedString
+ none
+ none
+ makefile_variable
+ Command executed before BSP built.
+ none
+ false
+ none
+
+
+ hal.make.ar_pre_process
+ AR_PRE_PROCESS
+ UnquotedString
+ none
+ none
+ makefile_variable
+ Command executed before archiver execution.
+ none
+ false
+ none
+
+
+ hal.make.bsp_cflags_defined_symbols
+ BSP_CFLAGS_DEFINED_SYMBOLS
+ UnquotedString
+ none
+ none
+ makefile_variable
+ Preprocessor macros to define. A macro definition in this setting has the same effect as a "#define" in source code. Adding "-DALT_DEBUG" to this setting has the same effect as "#define ALT_DEBUG" in a souce file. Adding "-DFOO=1" to this setting is equivalent to the macro "#define FOO 1" in a source file. Macros defined with this setting are applied to all .S, .c, and C++ files in the BSP. This setting defines the value of BSP_CFLAGS_DEFINED_SYMBOLS in the BSP Makefile.
+ none
+ false
+ none
+
+
+ hal.make.ar_post_process
+ AR_POST_PROCESS
+ UnquotedString
+ none
+ none
+ makefile_variable
+ Command executed after archiver execution.
+ none
+ false
+ none
+
+
+ hal.make.as
+ AS
+ UnquotedString
+ nios2-elf-gcc
+ nios2-elf-gcc
+ makefile_variable
+ Assembler command. Note that CC is used for .S files.
+ none
+ false
+ none
+
+
+ hal.make.build_post_process
+ BUILD_POST_PROCESS
+ UnquotedString
+ none
+ none
+ makefile_variable
+ Command executed after BSP built.
+ none
+ false
+ none
+
+
+ hal.make.bsp_cflags_debug
+ BSP_CFLAGS_DEBUG
+ UnquotedString
+ -g
+ -g
+ makefile_variable
+ C/C++ compiler debug level. '-g' provides the default set of debug symbols typically required to debug a typical application. Omitting '-g' removes debug symbols from the ELF. This setting defines the value of BSP_CFLAGS_DEBUG in Makefile.
+ none
+ false
+ common
+
+
+ hal.make.ar
+ AR
+ UnquotedString
+ nios2-elf-ar
+ nios2-elf-ar
+ makefile_variable
+ Archiver command. Creates library files.
+ none
+ false
+ none
+
+
+ hal.make.rm
+ RM
+ UnquotedString
+ rm -f
+ rm -f
+ makefile_variable
+ Command used to remove files during 'clean' target.
+ none
+ false
+ none
+
+
+ hal.make.cxx_pre_process
+ CXX_PRE_PROCESS
+ UnquotedString
+ none
+ none
+ makefile_variable
+ Command executed before each C++ file is compiled.
+ none
+ false
+ none
+
+
+ hal.make.bsp_cflags_warnings
+ BSP_CFLAGS_WARNINGS
+ UnquotedString
+ -Wall
+ -Wall
+ makefile_variable
+ C/C++ compiler warning level. "-Wall" is commonly used.This setting defines the value of BSP_CFLAGS_WARNINGS in Makefile.
+ none
+ false
+ none
+
+
+ hal.make.bsp_arflags
+ BSP_ARFLAGS
+ UnquotedString
+ -src
+ -src
+ makefile_variable
+ Custom flags only passed to the archiver. This content of this variable is directly passed to the archiver rather than the more standard "ARFLAGS". The reason for this is that GNU Make assumes some default content in ARFLAGS. This setting defines the value of BSP_ARFLAGS in Makefile.
+ none
+ false
+ none
+
+
+ hal.make.bsp_cflags_optimization
+ BSP_CFLAGS_OPTIMIZATION
+ UnquotedString
+ -O0
+ -O0
+ makefile_variable
+ C/C++ compiler optimization level. "-O0" = no optimization,"-O2" = "normal" optimization, etc. "-O0" is recommended for code that you want to debug since compiler optimization can remove variables and produce non-sequential execution of code while debugging. This setting defines the value of BSP_CFLAGS_OPTIMIZATION in Makefile.
+ none
+ false
+ common
+
+
+ hal.make.as_post_process
+ AS_POST_PROCESS
+ UnquotedString
+ none
+ none
+ makefile_variable
+ Command executed after each assembly file is compiled.
+ none
+ false
+ none
+
+
+ hal.make.cc_pre_process
+ CC_PRE_PROCESS
+ UnquotedString
+ none
+ none
+ makefile_variable
+ Command executed before each .c/.S file is compiled.
+ none
+ false
+ none
+
+
+ hal.make.bsp_asflags
+ BSP_ASFLAGS
+ UnquotedString
+ -Wa,-gdwarf2
+ -Wa,-gdwarf2
+ makefile_variable
+ Custom flags only passed to the assembler. This setting defines the value of BSP_ASFLAGS in Makefile.
+ none
+ false
+ none
+
+
+ hal.make.as_pre_process
+ AS_PRE_PROCESS
+ UnquotedString
+ none
+ none
+ makefile_variable
+ Command executed before each assembly file is compiled.
+ none
+ false
+ none
+
+
+ hal.make.bsp_cflags_undefined_symbols
+ BSP_CFLAGS_UNDEFINED_SYMBOLS
+ UnquotedString
+ none
+ none
+ makefile_variable
+ Preprocessor macros to undefine. Undefined macros are similar to defined macros, but replicate the "#undef" directive in source code. To undefine the macro FOO use the syntax "-u FOO" in this setting. This is equivalent to "#undef FOO" in a source file. Note: the syntax differs from macro definition (there is a space, i.e. "-u FOO" versus "-DFOO"). Macros defined with this setting are applied to all .S, .c, and C++ files in the BSP. This setting defines the value of BSP_CFLAGS_UNDEFINED_SYMBOLS in the BSP Makefile.
+ none
+ false
+ none
+
+
+ hal.make.cc_post_process
+ CC_POST_PROCESS
+ UnquotedString
+ none
+ none
+ makefile_variable
+ Command executed after each .c/.S file is compiled.
+ none
+ false
+ none
+
+
+ hal.make.cxx_post_process
+ CXX_POST_PROCESS
+ UnquotedString
+ none
+ none
+ makefile_variable
+ Command executed before each C++ file is compiled.
+ none
+ false
+ none
+
+
+ hal.make.cc
+ CC
+ UnquotedString
+ nios2-elf-gcc -xc
+ nios2-elf-gcc -xc
+ makefile_variable
+ C compiler command.
+ none
+ false
+ none
+
+
+ hal.make.bsp_cxx_flags
+ BSP_CXXFLAGS
+ UnquotedString
+ none
+ none
+ makefile_variable
+ Custom flags only passed to the C++ compiler. This setting defines the value of BSP_CXXFLAGS in Makefile.
+ none
+ false
+ none
+
+
+ hal.make.bsp_inc_dirs
+ BSP_INC_DIRS
+ UnquotedString
+ none
+ none
+ makefile_variable
+ Space separated list of extra include directories to scan for header files. Directories are relative to the top-level BSP directory. The -I prefix's added by the makefile so don't add it here. This setting defines the value of BSP_INC_DIRS in Makefile.
+ none
+ false
+ none
+
+
+ hal.make.cxx
+ CXX
+ UnquotedString
+ nios2-elf-gcc -xc++
+ nios2-elf-gcc -xc++
+ makefile_variable
+ C++ compiler command.
+ none
+ false
+ none
+
+
+ hal.make.bsp_cflags_user_flags
+ BSP_CFLAGS_USER_FLAGS
+ UnquotedString
+ none
+ none
+ makefile_variable
+ Custom flags passed to the compiler when compiling C, C++, and .S files. This setting defines the value of BSP_CFLAGS_USER_FLAGS in Makefile.
+ none
+ false
+ none
+
+
+ hal.make.cflags_mgpopt
+ CFLAGS_MGPOPT
+ UnquotedString
+ -mgpopt=local
+ -mgpopt=global
+ public_mk_define
+ C/C++ compiler to generate (do not generate) GP-relative accesses. 'none' tells the compilter not to generate GP-relative accesses. 'local' will generate GP-relative accesses for small data objects that are not external, weak, or uninitialized common symbols. Also use GP-relative addressing for objects that have been explicitly placed in a small data section via a section attribute. provides the default set of debug symbols typically required to debug a typical application. 'global' is same as 'local' but also generate GP-relative accesses for small data objects that are external, weak, or common.
+ none
+ false
+ common
+
+
+ hal.make.ignore_system_derived.sopc_system_id
+ none
+ Boolean
+ 0
+ 0
+ public_mk_define
+ Enable BSP generation to query SOPC system for system ID. If true ignores export of 'SOPC_SYSID_FLAG += --id=<sysid>' and 'ELF_PATCH_FLAG += --id=<sysid>' to public.mk.
+ none
+ false
+ none
+
+
+ hal.make.ignore_system_derived.sopc_system_timestamp
+ none
+ Boolean
+ 0
+ 0
+ public_mk_define
+ Enable BSP generation to query SOPC system for system timestamp. If true ignores export of 'SOPC_SYSID_FLAG += --timestamp=<timestamp>' and 'ELF_PATCH_FLAG += --timestamp=<timestamp>' to public.mk.
+ none
+ false
+ none
+
+
+ hal.make.ignore_system_derived.sopc_system_base_address
+ none
+ Boolean
+ 0
+ 0
+ public_mk_define
+ Enable BSP generation to query SOPC system for system ID base address. If true ignores export of 'SOPC_SYSID_FLAG += --sidp=<address>' and 'ELF_PATCH_FLAG += --sidp=<address>' to public.mk.
+ none
+ false
+ none
+
+
+ hal.make.ignore_system_derived.sopc_simulation_enabled
+ none
+ Boolean
+ 0
+ 0
+ public_mk_define
+ Enable BSP generation to query if SOPC system has simulation enabled. If true ignores export of 'ELF_PATCH_FLAG += --simulation_enabled' to public.mk.
+ none
+ false
+ none
+
+
+ hal.make.ignore_system_derived.fpu_present
+ none
+ Boolean
+ 0
+ 0
+ public_mk_define
+ Enable BSP generation to query if SOPC system has FPU present. If true ignores export of 'ALT_CFLAGS += -mhard-float' to public.mk if FPU is found in the system. If true ignores export of 'ALT_CFLAGS += -mhard-soft' if FPU is not found in the system.
+ none
+ false
+ none
+
+
+ hal.make.ignore_system_derived.cdx_present
+ none
+ Boolean
+ 0
+ 0
+ public_mk_define
+ If true, prevents GCC from using CDX instructions. If false, GCC uses CDX instructions if present in the CPU.
+ none
+ false
+ none
+
+
+ hal.make.ignore_system_derived.bmx_present
+ none
+ Boolean
+ 0
+ 0
+ public_mk_define
+ If true, prevents GCC from using BMX instructions. If false, GCC uses BMX instructions if present in the CPU.
+ none
+ false
+ none
+
+
+ hal.make.ignore_system_derived.hardware_multiplier_present
+ none
+ Boolean
+ 0
+ 0
+ public_mk_define
+ Enable BSP generation to query if SOPC system has multiplier present. If true ignores export of 'ALT_CFLAGS += -mno-hw-mul' to public.mk if no multiplier is found in the system. If true ignores export of 'ALT_CFLAGS += -mhw-mul' if multiplier is found in the system.
+ none
+ false
+ none
+
+
+ hal.make.ignore_system_derived.hardware_mulx_present
+ none
+ Boolean
+ 0
+ 0
+ public_mk_define
+ Enable BSP generation to query if SOPC system has hardware mulx present. If true ignores export of 'ALT_CFLAGS += -mno-hw-mulx' to public.mk if no mulx is found in the system. If true ignores export of 'ALT_CFLAGS += -mhw-mulx' if mulx is found in the system.
+ none
+ false
+ none
+
+
+ hal.make.ignore_system_derived.hardware_divide_present
+ none
+ Boolean
+ 0
+ 0
+ public_mk_define
+ Enable BSP generation to query if SOPC system has hardware divide present. If true ignores export of 'ALT_CFLAGS += -mno-hw-div' to public.mk if no division is found in system. If true ignores export of 'ALT_CFLAGS += -mhw-div' if division is found in the system.
+ none
+ false
+ none
+
+
+ hal.make.ignore_system_derived.debug_core_present
+ none
+ Boolean
+ 0
+ 0
+ public_mk_define
+ Enable BSP generation to query if SOPC system has a debug core present. If true ignores export of 'CPU_HAS_DEBUG_CORE = 1' to public.mk if a debug core is found in the system. If true ignores export of 'CPU_HAS_DEBUG_CORE = 0' if no debug core is found in the system.
+ none
+ false
+ none
+
+
+ hal.make.ignore_system_derived.big_endian
+ none
+ Boolean
+ 0
+ 0
+ public_mk_define
+ Enable BSP generation to query if SOPC system is big endian. If true ignores export of 'ALT_CFLAGS += -meb' to public.mk if big endian system.
+ none
+ false
+ none
+
+
+ hal.make.ignore_system_derived.hardware_fp_cust_inst_divider_present
+ none
+ Boolean
+ 0
+ 0
+ public_mk_define
+ Enable BSP generation to query if SOPC system floating point custom instruction with a divider is present. If true ignores export of 'ALT_CFLAGS += -mcustom-fpu-cfg=60-2' and 'ALT_LDFLAGS += -mcustom-fpu-cfg=60-2' to public.mk if the custom instruction is found in the system.
+ none
+ false
+ none
+
+
+ hal.make.ignore_system_derived.hardware_fp_cust_inst_no_divider_present
+ none
+ Boolean
+ 0
+ 0
+ public_mk_define
+ Enable BSP generation to query if SOPC system floating point custom instruction without a divider is present. If true ignores export of 'ALT_CFLAGS += -mcustom-fpu-cfg=60-1' and 'ALT_LDFLAGS += -mcustom-fpu-cfg=60-1' to public.mk if the custom instruction is found in the system.
+ none
+ false
+ none
+
+
+ hal.enable_exit
+ ALT_NO_EXIT
+ Boolean
+ 1
+ 1
+ public_mk_define
+ Add exit() support. This option increases code footprint if your "main()" routine does "return" or call "exit()". If false, adds -DALT_NO_EXIT to ALT_CPPFLAGS in public.mk, and reduces footprint
+ none
+ false
+ none
+
+
+ hal.enable_small_c_library
+ none
+ Boolean
+ 0
+ 0
+ public_mk_define
+ Causes the small newlib (C library) to be used. This reduces code and data footprint at the expense of reduced functionality. Several newlib features are removed such as floating-point support in printf(), stdin input routines, and buffered I/O. The small C library is not compatible with Micrium MicroC/OS-II. If true, adds -msmallc to ALT_LDFLAGS in public.mk.
+ none
+ false
+ common
+
+
+ hal.enable_clean_exit
+ ALT_NO_CLEAN_EXIT
+ Boolean
+ 1
+ 1
+ public_mk_define
+ When your application exits, close file descriptors, call C++ destructors, etc. Code footprint can be reduced by disabling clean exit. If disabled, adds -DALT_NO_CLEAN_EXIT to ALT_CPPFLAGS -D'exit(a)=_exit(a)' in public.mk.
+ none
+ false
+ none
+
+
+ hal.enable_runtime_stack_checking
+ ALT_STACK_CHECK
+ Boolean
+ 0
+ 0
+ public_mk_define
+ Turns on HAL runtime stack checking feature. Enabling this setting causes additional code to be placed into each subroutine call to generate an exception if a stack collision occurs with the heap or statically allocated data. If true, adds -DALT_STACK_CHECK and -fstack-limit-register=et to ALT_CPPFLAGS in public.mk.
+ none
+ false
+ none
+
+
+ hal.enable_gprof
+ ALT_PROVIDE_GMON
+ Boolean
+ 0
+ 0
+ public_mk_define
+ Causes code to be compiled with gprof profiling enabled and the application ELF to be linked with the GPROF library. If true, adds -DALT_PROVIDE_GMON to ALT_CPPFLAGS and -pg to ALT_CFLAGS in public.mk.
+ none
+ false
+ common
+
+
+ hal.enable_c_plus_plus
+ ALT_NO_C_PLUS_PLUS
+ Boolean
+ 1
+ 1
+ public_mk_define
+ Enable support for a subset of the C++ language. This option increases code footprint by adding support for C++ constructors. Certain features, such as multiple inheritance and exceptions are not supported. If false, adds -DALT_NO_C_PLUS_PLUS to ALT_CPPFLAGS in public.mk, and reduces code footprint.
+ none
+ false
+ none
+
+
+ hal.enable_reduced_device_drivers
+ ALT_USE_SMALL_DRIVERS
+ Boolean
+ 0
+ 0
+ public_mk_define
+ Certain drivers are compiled with reduced functionality to reduce code footprint. Not all drivers observe this setting. The altera_avalon_uart and altera_avalon_jtag_uart drivers switch from interrupt-driven to polled operation. CAUTION: Several device drivers are disabled entirely. These include the altera_avalon_cfi_flash, altera_avalon_epcs_flash_controller, and altera_avalon_lcd_16207 drivers. This can result in certain API (HAL flash access routines) to fail. You can define a symbol provided by each driver to prevent it from being removed. If true, adds -DALT_USE_SMALL_DRIVERS to ALT_CPPFLAGS in public.mk.
+ none
+ false
+ common
+
+
+ hal.enable_lightweight_device_driver_api
+ ALT_USE_DIRECT_DRIVERS
+ Boolean
+ 0
+ 0
+ public_mk_define
+ Enables lightweight device driver API. This reduces code and data footprint by removing the HAL layer that maps device names (e.g. /dev/uart0) to file descriptors. Instead, driver routines are called directly. The open(), close(), and lseek() routines will always fail if called. The read(), write(), fstat(), ioctl(), and isatty() routines only work for the stdio devices. If true, adds -DALT_USE_DIRECT_DRIVERS to ALT_CPPFLAGS in public.mk.
+ The Altera Host and read-only ZIP file systems can't be used if hal.enable_lightweight_device_driver_api is true.
+ false
+ none
+
+
+ hal.enable_mul_div_emulation
+ ALT_NO_INSTRUCTION_EMULATION
+ Boolean
+ 0
+ 0
+ public_mk_define
+ Adds code to emulate multiply and divide instructions in case they are executed but aren't present in the CPU. Normally this isn't required because the compiler won't use multiply and divide instructions that aren't present in the CPU. If false, adds -DALT_NO_INSTRUCTION_EMULATION to ALT_CPPFLAGS in public.mk.
+ none
+ false
+ none
+
+
+ hal.enable_sim_optimize
+ ALT_SIM_OPTIMIZE
+ Boolean
+ 0
+ 0
+ public_mk_define
+ The BSP is compiled with optimizations to speedup HDL simulation such as initializing the cache, clearing the .bss section, and skipping long delay loops. If true, adds -DALT_SIM_OPTIMIZE to ALT_CPPFLAGS in public.mk.
+ When this setting is true, the BSP shouldn't be used to build applications that are expected to run real hardware.
+ false
+ common
+
+
+ hal.enable_sopc_sysid_check
+ none
+ Boolean
+ 1
+ 1
+ public_mk_define
+ Enable SOPC Builder System ID. If a System ID SOPC Builder component is connected to the CPU associated with this BSP, it will be enabled in the creation of command-line arguments to download an ELF to the target. Otherwise, system ID and timestamp values are left out of public.mk for application Makefile "download-elf" target definition. With the system ID check disabled, the Nios II EDS tools will not automatically ensure that the application .elf file (and BSP it is linked against) corresponds to the hardware design on the target. If false, adds --accept-bad-sysid to SOPC_SYSID_FLAG in public.mk.
+ none
+ false
+ none
+
+
+ hal.custom_newlib_flags
+ CUSTOM_NEWLIB_FLAGS
+ UnquotedString
+ none
+ none
+ public_mk_define
+ Build a custom version of newlib with the specified space-separated compiler flags.
+ The custom newlib build will be placed in the <bsp root>/newlib directory, and will be used only for applications that utilize this BSP.
+ false
+ none
+
+
+ hal.log_flags
+ ALT_LOG_FLAGS
+ DecimalNumber
+ 0
+ 0
+ public_mk_define
+ The value is assigned to ALT_LOG_FLAGS in the generated public.mk. See hal.log_port setting description. Values can be -1 through 3.
+ hal.log_port must be set for this to be used.
+ false
+ none
+
+
+ altera_avalon_jtag_uart_driver.enable_small_driver
+ ALTERA_AVALON_JTAG_UART_SMALL
+ BooleanDefineOnly
+ false
+ false
+ public_mk_define
+ Small-footprint (polled mode) driver
+ none
+ false
+
+
+
+ altera_avalon_jtag_uart_driver.enable_jtag_uart_ignore_fifo_full_error
+ ALTERA_AVALON_JTAG_UART_IGNORE_FIFO_FULL_ERROR
+ BooleanDefineOnly
+ false
+ false
+ public_mk_define
+ Enable JTAG UART driver to recover when host is inactive causing buffer to full without returning error. Printf will not fail with this recovery.
+ none
+ false
+
+
+
+ led
+ 0x00000000 - 0x0000000F
+ 16
+
+
+
+ sdram
+ 0x00800000 - 0x00FFFFFF
+ 8388608
+ memory
+
+
+ dma_rx
+ 0x01001000 - 0x0100101F
+ 32
+
+
+
+ dma_tx
+ 0x01001020 - 0x0100103F
+ 32
+
+
+
+ sysid
+ 0x01001048 - 0x0100104F
+ 8
+
+
+
+ usb
+ 0x01001050 - 0x01001057
+ 8
+
+
+
+ jtag_uart
+ 0x01001058 - 0x0100105F
+ 8
+ printable
+
+
+ .text
+ sdram
+
+
+ .rodata
+ sdram
+
+
+ .rwdata
+ sdram
+
+
+ .bss
+ sdram
+
+
+ .heap
+ sdram
+
+
+ .stack
+ sdram
+
+
\ No newline at end of file
trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/settings.bsp
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/summary.html
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/summary.html (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/summary.html (revision 6)
@@ -0,0 +1,2098 @@
+
+
Altera Nios II BSP Summary
+
+
BSP Description
+
+
+| BSP Type: | hal |
+
+
+| SOPC Design File: | ../../sopc.sopcinfo |
+
+
+| Quartus JDI File: | default |
+
+
+| CPU: | cpu |
+
+
+| BSP Settings File: | settings.bsp |
+
+
+| BSP Version: | default |
+
+
+| BSP Generated On: | Apr 7, 2017 5:55:28 PM |
+
+
+| BSP Generated Timestamp: | 1491576928819 |
+
+
+| BSP Generated Location: | /mnt/2E8816D588169B81/edv/workspace/usb_ft232h/altera/test_usb_ft232h/software/usb_ft232h_bsp |
+
+
+
+
Nios II Memory Map
+
+
+| Slave Descriptor | Address Range | Size | Attributes |
+
+
+| jtag_uart | 0x01001058 - 0x0100105F | 8 | printable |
+
+
+| usb | 0x01001050 - 0x01001057 | 8 | |
+
+
+| sysid | 0x01001048 - 0x0100104F | 8 | |
+
+
+| dma_tx | 0x01001020 - 0x0100103F | 32 | |
+
+
+| dma_rx | 0x01001000 - 0x0100101F | 32 | |
+
+
+| sdram | 0x00800000 - 0x00FFFFFF | 8388608 | memory |
+
+
+| led | 0x00000000 - 0x0000000F | 16 | |
+
+
+
+
+
Linker Regions
+
+
+| Region | Address Range | Size | Memory | Offset |
+
+
+
+
+
Linker Section Mappings
+
+
+| Section | Region |
+
+
+| .text | sdram |
+
+
+| .rodata | sdram |
+
+
+| .rwdata | sdram |
+
+
+| .bss | sdram |
+
+
+| .heap | sdram |
+
+
+| .stack | sdram |
+
+
+
Settings
+
+
+| Setting Name: | altera_avalon_jtag_uart_driver.enable_jtag_uart_ignore_fifo_full_error |
+
+
+| Identifier: | ALTERA_AVALON_JTAG_UART_IGNORE_FIFO_FULL_ERROR |
+
+
+| Default Value: | false |
+
+
+| Value: | false |
+
+
+| Type: | BooleanDefineOnly |
+
+
+| Destination: | public_mk_define |
+
+
+| Description: | Enable JTAG UART driver to recover when host is inactive causing buffer to full without returning error. Printf will not fail with this recovery. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | altera_avalon_jtag_uart_driver.enable_small_driver |
+
+
+| Identifier: | ALTERA_AVALON_JTAG_UART_SMALL |
+
+
+| Default Value: | false |
+
+
+| Value: | false |
+
+
+| Type: | BooleanDefineOnly |
+
+
+| Destination: | public_mk_define |
+
+
+| Description: | Small-footprint (polled mode) driver |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.custom_newlib_flags |
+
+
+| Identifier: | CUSTOM_NEWLIB_FLAGS |
+
+
+| Default Value: | none |
+
+
+| Value: | none |
+
+
+| Type: | UnquotedString |
+
+
+| Destination: | public_mk_define |
+
+
+| Description: | Build a custom version of newlib with the specified space-separated compiler flags. |
+
+
+| Restrictions: | The custom newlib build will be placed in the <bsp root>/newlib directory, and will be used only for applications that utilize this BSP. |
+
+
+
+
+
+| Setting Name: | hal.enable_c_plus_plus |
+
+
+| Identifier: | ALT_NO_C_PLUS_PLUS |
+
+
+| Default Value: | 1 |
+
+
+| Value: | 1 |
+
+
+| Type: | Boolean |
+
+
+| Destination: | public_mk_define |
+
+
+| Description: | Enable support for a subset of the C++ language. This option increases code footprint by adding support for C++ constructors. Certain features, such as multiple inheritance and exceptions are not supported. If false, adds -DALT_NO_C_PLUS_PLUS to ALT_CPPFLAGS in public.mk, and reduces code footprint. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.enable_clean_exit |
+
+
+| Identifier: | ALT_NO_CLEAN_EXIT |
+
+
+| Default Value: | 1 |
+
+
+| Value: | 1 |
+
+
+| Type: | Boolean |
+
+
+| Destination: | public_mk_define |
+
+
+| Description: | When your application exits, close file descriptors, call C++ destructors, etc. Code footprint can be reduced by disabling clean exit. If disabled, adds -DALT_NO_CLEAN_EXIT to ALT_CPPFLAGS -D'exit(a)=_exit(a)' in public.mk. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.enable_exit |
+
+
+| Identifier: | ALT_NO_EXIT |
+
+
+| Default Value: | 1 |
+
+
+| Value: | 1 |
+
+
+| Type: | Boolean |
+
+
+| Destination: | public_mk_define |
+
+
+| Description: | Add exit() support. This option increases code footprint if your "main()" routine does "return" or call "exit()". If false, adds -DALT_NO_EXIT to ALT_CPPFLAGS in public.mk, and reduces footprint |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.enable_gprof |
+
+
+| Identifier: | ALT_PROVIDE_GMON |
+
+
+| Default Value: | 0 |
+
+
+| Value: | 0 |
+
+
+| Type: | Boolean |
+
+
+| Destination: | public_mk_define |
+
+
+| Description: | Causes code to be compiled with gprof profiling enabled and the application ELF to be linked with the GPROF library. If true, adds -DALT_PROVIDE_GMON to ALT_CPPFLAGS and -pg to ALT_CFLAGS in public.mk. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.enable_instruction_related_exceptions_api |
+
+
+| Identifier: | ALT_INCLUDE_INSTRUCTION_RELATED_EXCEPTION_API |
+
+
+| Default Value: | false |
+
+
+| Value: | true |
+
+
+| Type: | BooleanDefineOnly |
+
+
+| Destination: | system_h_define |
+
+
+| Description: | Enables API for registering handlers to service instruction-related exceptions. Enabling this setting increases the size of the exception entry code. |
+
+
+| Restrictions: | These exception types can be generated if various processor options are enabled, such as the MMU, MPU, or other advanced exception types. |
+
+
+
+
+
+| Setting Name: | hal.enable_lightweight_device_driver_api |
+
+
+| Identifier: | ALT_USE_DIRECT_DRIVERS |
+
+
+| Default Value: | 0 |
+
+
+| Value: | 0 |
+
+
+| Type: | Boolean |
+
+
+| Destination: | public_mk_define |
+
+
+| Description: | Enables lightweight device driver API. This reduces code and data footprint by removing the HAL layer that maps device names (e.g. /dev/uart0) to file descriptors. Instead, driver routines are called directly. The open(), close(), and lseek() routines will always fail if called. The read(), write(), fstat(), ioctl(), and isatty() routines only work for the stdio devices. If true, adds -DALT_USE_DIRECT_DRIVERS to ALT_CPPFLAGS in public.mk. |
+
+
+| Restrictions: | The Altera Host and read-only ZIP file systems can't be used if hal.enable_lightweight_device_driver_api is true. |
+
+
+
+
+
+| Setting Name: | hal.enable_mul_div_emulation |
+
+
+| Identifier: | ALT_NO_INSTRUCTION_EMULATION |
+
+
+| Default Value: | 0 |
+
+
+| Value: | 0 |
+
+
+| Type: | Boolean |
+
+
+| Destination: | public_mk_define |
+
+
+| Description: | Adds code to emulate multiply and divide instructions in case they are executed but aren't present in the CPU. Normally this isn't required because the compiler won't use multiply and divide instructions that aren't present in the CPU. If false, adds -DALT_NO_INSTRUCTION_EMULATION to ALT_CPPFLAGS in public.mk. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.enable_reduced_device_drivers |
+
+
+| Identifier: | ALT_USE_SMALL_DRIVERS |
+
+
+| Default Value: | 0 |
+
+
+| Value: | 0 |
+
+
+| Type: | Boolean |
+
+
+| Destination: | public_mk_define |
+
+
+| Description: | Certain drivers are compiled with reduced functionality to reduce code footprint. Not all drivers observe this setting. The altera_avalon_uart and altera_avalon_jtag_uart drivers switch from interrupt-driven to polled operation. CAUTION: Several device drivers are disabled entirely. These include the altera_avalon_cfi_flash, altera_avalon_epcs_flash_controller, and altera_avalon_lcd_16207 drivers. This can result in certain API (HAL flash access routines) to fail. You can define a symbol provided by each driver to prevent it from being removed. If true, adds -DALT_USE_SMALL_DRIVERS to ALT_CPPFLAGS in public.mk. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.enable_runtime_stack_checking |
+
+
+| Identifier: | ALT_STACK_CHECK |
+
+
+| Default Value: | 0 |
+
+
+| Value: | 0 |
+
+
+| Type: | Boolean |
+
+
+| Destination: | public_mk_define |
+
+
+| Description: | Turns on HAL runtime stack checking feature. Enabling this setting causes additional code to be placed into each subroutine call to generate an exception if a stack collision occurs with the heap or statically allocated data. If true, adds -DALT_STACK_CHECK and -fstack-limit-register=et to ALT_CPPFLAGS in public.mk. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.enable_sim_optimize |
+
+
+| Identifier: | ALT_SIM_OPTIMIZE |
+
+
+| Default Value: | 0 |
+
+
+| Value: | 0 |
+
+
+| Type: | Boolean |
+
+
+| Destination: | public_mk_define |
+
+
+| Description: | The BSP is compiled with optimizations to speedup HDL simulation such as initializing the cache, clearing the .bss section, and skipping long delay loops. If true, adds -DALT_SIM_OPTIMIZE to ALT_CPPFLAGS in public.mk. |
+
+
+| Restrictions: | When this setting is true, the BSP shouldn't be used to build applications that are expected to run real hardware. |
+
+
+
+
+
+| Setting Name: | hal.enable_small_c_library |
+
+
+| Identifier: | none |
+
+
+| Default Value: | 0 |
+
+
+| Value: | 0 |
+
+
+| Type: | Boolean |
+
+
+| Destination: | public_mk_define |
+
+
+| Description: | Causes the small newlib (C library) to be used. This reduces code and data footprint at the expense of reduced functionality. Several newlib features are removed such as floating-point support in printf(), stdin input routines, and buffered I/O. The small C library is not compatible with Micrium MicroC/OS-II. If true, adds -msmallc to ALT_LDFLAGS in public.mk. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.enable_sopc_sysid_check |
+
+
+| Identifier: | none |
+
+
+| Default Value: | 1 |
+
+
+| Value: | 1 |
+
+
+| Type: | Boolean |
+
+
+| Destination: | public_mk_define |
+
+
+| Description: | Enable SOPC Builder System ID. If a System ID SOPC Builder component is connected to the CPU associated with this BSP, it will be enabled in the creation of command-line arguments to download an ELF to the target. Otherwise, system ID and timestamp values are left out of public.mk for application Makefile "download-elf" target definition. With the system ID check disabled, the Nios II EDS tools will not automatically ensure that the application .elf file (and BSP it is linked against) corresponds to the hardware design on the target. If false, adds --accept-bad-sysid to SOPC_SYSID_FLAG in public.mk. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.linker.allow_code_at_reset |
+
+
+| Identifier: | ALT_ALLOW_CODE_AT_RESET |
+
+
+| Default Value: | 0 |
+
+
+| Value: | 1 |
+
+
+| Type: | Boolean |
+
+
+| Destination: | none |
+
+
+| Description: | Indicates if initialization code is allowed at the reset address. If true, defines the macro ALT_ALLOW_CODE_AT_RESET in linker.h. |
+
+
+| Restrictions: | If true, defines the macro ALT_ALLOW_CODE_AT_RESET in linker.h. This setting is typically false if an external bootloader (e.g. flash bootloader) is present. |
+
+
+
+
+
+| Setting Name: | hal.linker.enable_alt_load |
+
+
+| Identifier: | none |
+
+
+| Default Value: | 0 |
+
+
+| Value: | 1 |
+
+
+| Type: | Boolean |
+
+
+| Destination: | none |
+
+
+| Description: | Enables the alt_load() facility. The alt_load() facility copies data sections (.rodata, .rwdata, or .exceptions) from boot memory to RAM. If true, this setting sets up the VMA/LMA of sections in linker.x to allow them to be loaded into the .text memory. |
+
+
+| Restrictions: | This setting is typically false if an external bootloader (e.g. flash bootloader) is present. |
+
+
+
+
+
+| Setting Name: | hal.linker.enable_alt_load_copy_exceptions |
+
+
+| Identifier: | none |
+
+
+| Default Value: | 0 |
+
+
+| Value: | 0 |
+
+
+| Type: | Boolean |
+
+
+| Destination: | none |
+
+
+| Description: | Causes the alt_load() facility to copy the .exceptions section. If true, this setting defines the macro ALT_LOAD_COPY_EXCEPTIONS in linker.h. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.linker.enable_alt_load_copy_rodata |
+
+
+| Identifier: | none |
+
+
+| Default Value: | 0 |
+
+
+| Value: | 0 |
+
+
+| Type: | Boolean |
+
+
+| Destination: | none |
+
+
+| Description: | Causes the alt_load() facility to copy the .rodata section. If true, this setting defines the macro ALT_LOAD_COPY_RODATA in linker.h. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.linker.enable_alt_load_copy_rwdata |
+
+
+| Identifier: | none |
+
+
+| Default Value: | 0 |
+
+
+| Value: | 1 |
+
+
+| Type: | Boolean |
+
+
+| Destination: | none |
+
+
+| Description: | Causes the alt_load() facility to copy the .rwdata section. If true, this setting defines the macro ALT_LOAD_COPY_RWDATA in linker.h. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.linker.enable_exception_stack |
+
+
+| Identifier: | none |
+
+
+| Default Value: | 0 |
+
+
+| Value: | 0 |
+
+
+| Type: | Boolean |
+
+
+| Destination: | none |
+
+
+| Description: | Enables use of a separate exception stack. If true, defines the macro ALT_EXCEPTION_STACK in linker.h, adds a memory region called exception_stack to linker.x, and provides the symbols __alt_exception_stack_pointer and __alt_exception_stack_limit in linker.x. |
+
+
+| Restrictions: | The hal.linker.exception_stack_size and hal.linker.exception_stack_memory_region_name settings must also be valid. This setting must be false for MicroC/OS-II BSPs. The exception stack can be used to improve interrupt and other exception performance if the EIC is *not* used. |
+
+
+
+
+
+| Setting Name: | hal.linker.enable_interrupt_stack |
+
+
+| Identifier: | none |
+
+
+| Default Value: | 0 |
+
+
+| Value: | 0 |
+
+
+| Type: | Boolean |
+
+
+| Destination: | none |
+
+
+| Description: | Enables use of a separate interrupt stack. If true, defines the macro ALT_INTERRUPT_STACK in linker.h, adds a memory region called interrupt_stack to linker.x, and provides the symbols __alt_interrupt_stack_pointer and __alt_interrupt_stack_limit in linker.x. |
+
+
+| Restrictions: | The hal.linker.interrupt_stack_size and hal.linker.interrupt_stack_memory_region_name settings must also be valid. This setting must be false for MicroC/OS-II BSPs. Only enable if the EIC is used exclusively. The exception stack can be used to improve interrupt and other exception performance if the EIC is *not* used. |
+
+
+
+
+
+| Setting Name: | hal.linker.exception_stack_memory_region_name |
+
+
+| Identifier: | none |
+
+
+| Default Value: | none |
+
+
+| Value: | sdram |
+
+
+| Type: | UnquotedString |
+
+
+| Destination: | none |
+
+
+| Description: | Name of the existing memory region that will be divided up to create the 'exception_stack' memory region. The selected region name will be adjusted automatically when the BSP is generated to create the 'exception_stack' memory region. |
+
+
+| Restrictions: | Only used if hal.linker.enable_exception_stack is true. |
+
+
+
+
+
+| Setting Name: | hal.linker.exception_stack_size |
+
+
+| Identifier: | none |
+
+
+| Default Value: | 1024 |
+
+
+| Value: | 1024 |
+
+
+| Type: | DecimalNumber |
+
+
+| Destination: | none |
+
+
+| Description: | Size of the exception stack in bytes. |
+
+
+| Restrictions: | Only used if hal.linker.enable_exception_stack is true. |
+
+
+
+
+
+| Setting Name: | hal.linker.interrupt_stack_memory_region_name |
+
+
+| Identifier: | none |
+
+
+| Default Value: | none |
+
+
+| Value: | sdram |
+
+
+| Type: | UnquotedString |
+
+
+| Destination: | none |
+
+
+| Description: | Name of the existing memory region that will be divided up to create the 'interrupt_stack' memory region. The selected region name will be adjusted automatically when the BSP is generated to create the 'interrupt_stack' memory region. |
+
+
+| Restrictions: | Only used if hal.linker.enable_interrupt_stack is true. |
+
+
+
+
+
+| Setting Name: | hal.linker.interrupt_stack_size |
+
+
+| Identifier: | none |
+
+
+| Default Value: | 1024 |
+
+
+| Value: | 1024 |
+
+
+| Type: | DecimalNumber |
+
+
+| Destination: | none |
+
+
+| Description: | Size of the interrupt stack in bytes. |
+
+
+| Restrictions: | Only used if hal.linker.enable_interrupt_stack is true. |
+
+
+
+
+
+| Setting Name: | hal.log_flags |
+
+
+| Identifier: | ALT_LOG_FLAGS |
+
+
+| Default Value: | 0 |
+
+
+| Value: | 0 |
+
+
+| Type: | DecimalNumber |
+
+
+| Destination: | public_mk_define |
+
+
+| Description: | The value is assigned to ALT_LOG_FLAGS in the generated public.mk. See hal.log_port setting description. Values can be -1 through 3. |
+
+
+| Restrictions: | hal.log_port must be set for this to be used. |
+
+
+
+
+
+| Setting Name: | hal.log_port |
+
+
+| Identifier: | none |
+
+
+| Default Value: | none |
+
+
+| Value: | none |
+
+
+| Type: | UnquotedString |
+
+
+| Destination: | public_mk_define |
+
+
+| Description: | Slave descriptor of debug logging character-mode device. If defined, it enables extra debug messages in the HAL source. This setting is used by the ALT_LOG_PORT family of defines in system.h. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.make.ar |
+
+
+| Identifier: | AR |
+
+
+| Default Value: | nios2-elf-ar |
+
+
+| Value: | nios2-elf-ar |
+
+
+| Type: | UnquotedString |
+
+
+| Destination: | makefile_variable |
+
+
+| Description: | Archiver command. Creates library files. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.make.ar_post_process |
+
+
+| Identifier: | AR_POST_PROCESS |
+
+
+| Default Value: | none |
+
+
+| Value: | none |
+
+
+| Type: | UnquotedString |
+
+
+| Destination: | makefile_variable |
+
+
+| Description: | Command executed after archiver execution. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.make.ar_pre_process |
+
+
+| Identifier: | AR_PRE_PROCESS |
+
+
+| Default Value: | none |
+
+
+| Value: | none |
+
+
+| Type: | UnquotedString |
+
+
+| Destination: | makefile_variable |
+
+
+| Description: | Command executed before archiver execution. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.make.as |
+
+
+| Identifier: | AS |
+
+
+| Default Value: | nios2-elf-gcc |
+
+
+| Value: | nios2-elf-gcc |
+
+
+| Type: | UnquotedString |
+
+
+| Destination: | makefile_variable |
+
+
+| Description: | Assembler command. Note that CC is used for .S files. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.make.as_post_process |
+
+
+| Identifier: | AS_POST_PROCESS |
+
+
+| Default Value: | none |
+
+
+| Value: | none |
+
+
+| Type: | UnquotedString |
+
+
+| Destination: | makefile_variable |
+
+
+| Description: | Command executed after each assembly file is compiled. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.make.as_pre_process |
+
+
+| Identifier: | AS_PRE_PROCESS |
+
+
+| Default Value: | none |
+
+
+| Value: | none |
+
+
+| Type: | UnquotedString |
+
+
+| Destination: | makefile_variable |
+
+
+| Description: | Command executed before each assembly file is compiled. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.make.bsp_arflags |
+
+
+| Identifier: | BSP_ARFLAGS |
+
+
+| Default Value: | -src |
+
+
+| Value: | -src |
+
+
+| Type: | UnquotedString |
+
+
+| Destination: | makefile_variable |
+
+
+| Description: | Custom flags only passed to the archiver. This content of this variable is directly passed to the archiver rather than the more standard "ARFLAGS". The reason for this is that GNU Make assumes some default content in ARFLAGS. This setting defines the value of BSP_ARFLAGS in Makefile. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.make.bsp_asflags |
+
+
+| Identifier: | BSP_ASFLAGS |
+
+
+| Default Value: | -Wa,-gdwarf2 |
+
+
+| Value: | -Wa,-gdwarf2 |
+
+
+| Type: | UnquotedString |
+
+
+| Destination: | makefile_variable |
+
+
+| Description: | Custom flags only passed to the assembler. This setting defines the value of BSP_ASFLAGS in Makefile. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.make.bsp_cflags_debug |
+
+
+| Identifier: | BSP_CFLAGS_DEBUG |
+
+
+| Default Value: | -g |
+
+
+| Value: | -g |
+
+
+| Type: | UnquotedString |
+
+
+| Destination: | makefile_variable |
+
+
+| Description: | C/C++ compiler debug level. '-g' provides the default set of debug symbols typically required to debug a typical application. Omitting '-g' removes debug symbols from the ELF. This setting defines the value of BSP_CFLAGS_DEBUG in Makefile. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.make.bsp_cflags_defined_symbols |
+
+
+| Identifier: | BSP_CFLAGS_DEFINED_SYMBOLS |
+
+
+| Default Value: | none |
+
+
+| Value: | none |
+
+
+| Type: | UnquotedString |
+
+
+| Destination: | makefile_variable |
+
+
+| Description: | Preprocessor macros to define. A macro definition in this setting has the same effect as a "#define" in source code. Adding "-DALT_DEBUG" to this setting has the same effect as "#define ALT_DEBUG" in a souce file. Adding "-DFOO=1" to this setting is equivalent to the macro "#define FOO 1" in a source file. Macros defined with this setting are applied to all .S, .c, and C++ files in the BSP. This setting defines the value of BSP_CFLAGS_DEFINED_SYMBOLS in the BSP Makefile. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.make.bsp_cflags_optimization |
+
+
+| Identifier: | BSP_CFLAGS_OPTIMIZATION |
+
+
+| Default Value: | -O0 |
+
+
+| Value: | -O0 |
+
+
+| Type: | UnquotedString |
+
+
+| Destination: | makefile_variable |
+
+
+| Description: | C/C++ compiler optimization level. "-O0" = no optimization,"-O2" = "normal" optimization, etc. "-O0" is recommended for code that you want to debug since compiler optimization can remove variables and produce non-sequential execution of code while debugging. This setting defines the value of BSP_CFLAGS_OPTIMIZATION in Makefile. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.make.bsp_cflags_undefined_symbols |
+
+
+| Identifier: | BSP_CFLAGS_UNDEFINED_SYMBOLS |
+
+
+| Default Value: | none |
+
+
+| Value: | none |
+
+
+| Type: | UnquotedString |
+
+
+| Destination: | makefile_variable |
+
+
+| Description: | Preprocessor macros to undefine. Undefined macros are similar to defined macros, but replicate the "#undef" directive in source code. To undefine the macro FOO use the syntax "-u FOO" in this setting. This is equivalent to "#undef FOO" in a source file. Note: the syntax differs from macro definition (there is a space, i.e. "-u FOO" versus "-DFOO"). Macros defined with this setting are applied to all .S, .c, and C++ files in the BSP. This setting defines the value of BSP_CFLAGS_UNDEFINED_SYMBOLS in the BSP Makefile. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.make.bsp_cflags_user_flags |
+
+
+| Identifier: | BSP_CFLAGS_USER_FLAGS |
+
+
+| Default Value: | none |
+
+
+| Value: | none |
+
+
+| Type: | UnquotedString |
+
+
+| Destination: | makefile_variable |
+
+
+| Description: | Custom flags passed to the compiler when compiling C, C++, and .S files. This setting defines the value of BSP_CFLAGS_USER_FLAGS in Makefile. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.make.bsp_cflags_warnings |
+
+
+| Identifier: | BSP_CFLAGS_WARNINGS |
+
+
+| Default Value: | -Wall |
+
+
+| Value: | -Wall |
+
+
+| Type: | UnquotedString |
+
+
+| Destination: | makefile_variable |
+
+
+| Description: | C/C++ compiler warning level. "-Wall" is commonly used.This setting defines the value of BSP_CFLAGS_WARNINGS in Makefile. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.make.bsp_cxx_flags |
+
+
+| Identifier: | BSP_CXXFLAGS |
+
+
+| Default Value: | none |
+
+
+| Value: | none |
+
+
+| Type: | UnquotedString |
+
+
+| Destination: | makefile_variable |
+
+
+| Description: | Custom flags only passed to the C++ compiler. This setting defines the value of BSP_CXXFLAGS in Makefile. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.make.bsp_inc_dirs |
+
+
+| Identifier: | BSP_INC_DIRS |
+
+
+| Default Value: | none |
+
+
+| Value: | none |
+
+
+| Type: | UnquotedString |
+
+
+| Destination: | makefile_variable |
+
+
+| Description: | Space separated list of extra include directories to scan for header files. Directories are relative to the top-level BSP directory. The -I prefix's added by the makefile so don't add it here. This setting defines the value of BSP_INC_DIRS in Makefile. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.make.build_post_process |
+
+
+| Identifier: | BUILD_POST_PROCESS |
+
+
+| Default Value: | none |
+
+
+| Value: | none |
+
+
+| Type: | UnquotedString |
+
+
+| Destination: | makefile_variable |
+
+
+| Description: | Command executed after BSP built. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.make.build_pre_process |
+
+
+| Identifier: | BUILD_PRE_PROCESS |
+
+
+| Default Value: | none |
+
+
+| Value: | none |
+
+
+| Type: | UnquotedString |
+
+
+| Destination: | makefile_variable |
+
+
+| Description: | Command executed before BSP built. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.make.cc |
+
+
+| Identifier: | CC |
+
+
+| Default Value: | nios2-elf-gcc -xc |
+
+
+| Value: | nios2-elf-gcc -xc |
+
+
+| Type: | UnquotedString |
+
+
+| Destination: | makefile_variable |
+
+
+| Description: | C compiler command. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.make.cc_post_process |
+
+
+| Identifier: | CC_POST_PROCESS |
+
+
+| Default Value: | none |
+
+
+| Value: | none |
+
+
+| Type: | UnquotedString |
+
+
+| Destination: | makefile_variable |
+
+
+| Description: | Command executed after each .c/.S file is compiled. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.make.cc_pre_process |
+
+
+| Identifier: | CC_PRE_PROCESS |
+
+
+| Default Value: | none |
+
+
+| Value: | none |
+
+
+| Type: | UnquotedString |
+
+
+| Destination: | makefile_variable |
+
+
+| Description: | Command executed before each .c/.S file is compiled. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.make.cflags_mgpopt |
+
+
+| Identifier: | CFLAGS_MGPOPT |
+
+
+| Default Value: | -mgpopt=global |
+
+
+| Value: | -mgpopt=local |
+
+
+| Type: | UnquotedString |
+
+
+| Destination: | public_mk_define |
+
+
+| Description: | C/C++ compiler to generate (do not generate) GP-relative accesses. 'none' tells the compilter not to generate GP-relative accesses. 'local' will generate GP-relative accesses for small data objects that are not external, weak, or uninitialized common symbols. Also use GP-relative addressing for objects that have been explicitly placed in a small data section via a section attribute. provides the default set of debug symbols typically required to debug a typical application. 'global' is same as 'local' but also generate GP-relative accesses for small data objects that are external, weak, or common. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.make.cxx |
+
+
+| Identifier: | CXX |
+
+
+| Default Value: | nios2-elf-gcc -xc++ |
+
+
+| Value: | nios2-elf-gcc -xc++ |
+
+
+| Type: | UnquotedString |
+
+
+| Destination: | makefile_variable |
+
+
+| Description: | C++ compiler command. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.make.cxx_post_process |
+
+
+| Identifier: | CXX_POST_PROCESS |
+
+
+| Default Value: | none |
+
+
+| Value: | none |
+
+
+| Type: | UnquotedString |
+
+
+| Destination: | makefile_variable |
+
+
+| Description: | Command executed before each C++ file is compiled. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.make.cxx_pre_process |
+
+
+| Identifier: | CXX_PRE_PROCESS |
+
+
+| Default Value: | none |
+
+
+| Value: | none |
+
+
+| Type: | UnquotedString |
+
+
+| Destination: | makefile_variable |
+
+
+| Description: | Command executed before each C++ file is compiled. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.make.ignore_system_derived.big_endian |
+
+
+| Identifier: | none |
+
+
+| Default Value: | 0 |
+
+
+| Value: | 0 |
+
+
+| Type: | Boolean |
+
+
+| Destination: | public_mk_define |
+
+
+| Description: | Enable BSP generation to query if SOPC system is big endian. If true ignores export of 'ALT_CFLAGS += -meb' to public.mk if big endian system. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.make.ignore_system_derived.bmx_present |
+
+
+| Identifier: | none |
+
+
+| Default Value: | 0 |
+
+
+| Value: | 0 |
+
+
+| Type: | Boolean |
+
+
+| Destination: | public_mk_define |
+
+
+| Description: | If true, prevents GCC from using BMX instructions. If false, GCC uses BMX instructions if present in the CPU. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.make.ignore_system_derived.cdx_present |
+
+
+| Identifier: | none |
+
+
+| Default Value: | 0 |
+
+
+| Value: | 0 |
+
+
+| Type: | Boolean |
+
+
+| Destination: | public_mk_define |
+
+
+| Description: | If true, prevents GCC from using CDX instructions. If false, GCC uses CDX instructions if present in the CPU. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.make.ignore_system_derived.debug_core_present |
+
+
+| Identifier: | none |
+
+
+| Default Value: | 0 |
+
+
+| Value: | 0 |
+
+
+| Type: | Boolean |
+
+
+| Destination: | public_mk_define |
+
+
+| Description: | Enable BSP generation to query if SOPC system has a debug core present. If true ignores export of 'CPU_HAS_DEBUG_CORE = 1' to public.mk if a debug core is found in the system. If true ignores export of 'CPU_HAS_DEBUG_CORE = 0' if no debug core is found in the system. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.make.ignore_system_derived.fpu_present |
+
+
+| Identifier: | none |
+
+
+| Default Value: | 0 |
+
+
+| Value: | 0 |
+
+
+| Type: | Boolean |
+
+
+| Destination: | public_mk_define |
+
+
+| Description: | Enable BSP generation to query if SOPC system has FPU present. If true ignores export of 'ALT_CFLAGS += -mhard-float' to public.mk if FPU is found in the system. If true ignores export of 'ALT_CFLAGS += -mhard-soft' if FPU is not found in the system. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.make.ignore_system_derived.hardware_divide_present |
+
+
+| Identifier: | none |
+
+
+| Default Value: | 0 |
+
+
+| Value: | 0 |
+
+
+| Type: | Boolean |
+
+
+| Destination: | public_mk_define |
+
+
+| Description: | Enable BSP generation to query if SOPC system has hardware divide present. If true ignores export of 'ALT_CFLAGS += -mno-hw-div' to public.mk if no division is found in system. If true ignores export of 'ALT_CFLAGS += -mhw-div' if division is found in the system. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.make.ignore_system_derived.hardware_fp_cust_inst_divider_present |
+
+
+| Identifier: | none |
+
+
+| Default Value: | 0 |
+
+
+| Value: | 0 |
+
+
+| Type: | Boolean |
+
+
+| Destination: | public_mk_define |
+
+
+| Description: | Enable BSP generation to query if SOPC system floating point custom instruction with a divider is present. If true ignores export of 'ALT_CFLAGS += -mcustom-fpu-cfg=60-2' and 'ALT_LDFLAGS += -mcustom-fpu-cfg=60-2' to public.mk if the custom instruction is found in the system. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.make.ignore_system_derived.hardware_fp_cust_inst_no_divider_present |
+
+
+| Identifier: | none |
+
+
+| Default Value: | 0 |
+
+
+| Value: | 0 |
+
+
+| Type: | Boolean |
+
+
+| Destination: | public_mk_define |
+
+
+| Description: | Enable BSP generation to query if SOPC system floating point custom instruction without a divider is present. If true ignores export of 'ALT_CFLAGS += -mcustom-fpu-cfg=60-1' and 'ALT_LDFLAGS += -mcustom-fpu-cfg=60-1' to public.mk if the custom instruction is found in the system. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.make.ignore_system_derived.hardware_multiplier_present |
+
+
+| Identifier: | none |
+
+
+| Default Value: | 0 |
+
+
+| Value: | 0 |
+
+
+| Type: | Boolean |
+
+
+| Destination: | public_mk_define |
+
+
+| Description: | Enable BSP generation to query if SOPC system has multiplier present. If true ignores export of 'ALT_CFLAGS += -mno-hw-mul' to public.mk if no multiplier is found in the system. If true ignores export of 'ALT_CFLAGS += -mhw-mul' if multiplier is found in the system. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.make.ignore_system_derived.hardware_mulx_present |
+
+
+| Identifier: | none |
+
+
+| Default Value: | 0 |
+
+
+| Value: | 0 |
+
+
+| Type: | Boolean |
+
+
+| Destination: | public_mk_define |
+
+
+| Description: | Enable BSP generation to query if SOPC system has hardware mulx present. If true ignores export of 'ALT_CFLAGS += -mno-hw-mulx' to public.mk if no mulx is found in the system. If true ignores export of 'ALT_CFLAGS += -mhw-mulx' if mulx is found in the system. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.make.ignore_system_derived.sopc_simulation_enabled |
+
+
+| Identifier: | none |
+
+
+| Default Value: | 0 |
+
+
+| Value: | 0 |
+
+
+| Type: | Boolean |
+
+
+| Destination: | public_mk_define |
+
+
+| Description: | Enable BSP generation to query if SOPC system has simulation enabled. If true ignores export of 'ELF_PATCH_FLAG += --simulation_enabled' to public.mk. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.make.ignore_system_derived.sopc_system_base_address |
+
+
+| Identifier: | none |
+
+
+| Default Value: | 0 |
+
+
+| Value: | 0 |
+
+
+| Type: | Boolean |
+
+
+| Destination: | public_mk_define |
+
+
+| Description: | Enable BSP generation to query SOPC system for system ID base address. If true ignores export of 'SOPC_SYSID_FLAG += --sidp=<address>' and 'ELF_PATCH_FLAG += --sidp=<address>' to public.mk. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.make.ignore_system_derived.sopc_system_id |
+
+
+| Identifier: | none |
+
+
+| Default Value: | 0 |
+
+
+| Value: | 0 |
+
+
+| Type: | Boolean |
+
+
+| Destination: | public_mk_define |
+
+
+| Description: | Enable BSP generation to query SOPC system for system ID. If true ignores export of 'SOPC_SYSID_FLAG += --id=<sysid>' and 'ELF_PATCH_FLAG += --id=<sysid>' to public.mk. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.make.ignore_system_derived.sopc_system_timestamp |
+
+
+| Identifier: | none |
+
+
+| Default Value: | 0 |
+
+
+| Value: | 0 |
+
+
+| Type: | Boolean |
+
+
+| Destination: | public_mk_define |
+
+
+| Description: | Enable BSP generation to query SOPC system for system timestamp. If true ignores export of 'SOPC_SYSID_FLAG += --timestamp=<timestamp>' and 'ELF_PATCH_FLAG += --timestamp=<timestamp>' to public.mk. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.make.rm |
+
+
+| Identifier: | RM |
+
+
+| Default Value: | rm -f |
+
+
+| Value: | rm -f |
+
+
+| Type: | UnquotedString |
+
+
+| Destination: | makefile_variable |
+
+
+| Description: | Command used to remove files during 'clean' target. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.max_file_descriptors |
+
+
+| Identifier: | ALT_MAX_FD |
+
+
+| Default Value: | 32 |
+
+
+| Value: | 32 |
+
+
+| Type: | DecimalNumber |
+
+
+| Destination: | system_h_define |
+
+
+| Description: | Determines the number of file descriptors statically allocated. This setting defines the value of ALT_MAX_FD in system.h. |
+
+
+| Restrictions: | If hal.enable_lightweight_device_driver_api is true, there are no file descriptors so this setting is ignored. If hal.enable_lightweight_device_driver_api is false, this setting must be at least 4 because HAL needs a file descriptor for /dev/null, /dev/stdin, /dev/stdout, and /dev/stderr. |
+
+
+
+
+
+| Setting Name: | hal.stderr |
+
+
+| Identifier: | none |
+
+
+| Default Value: | none |
+
+
+| Value: | jtag_uart |
+
+
+| Type: | UnquotedString |
+
+
+| Destination: | system_h_define |
+
+
+| Description: | Slave descriptor of STDERR character-mode device. This setting is used by the ALT_STDERR family of defines in system.h. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.stdin |
+
+
+| Identifier: | none |
+
+
+| Default Value: | none |
+
+
+| Value: | jtag_uart |
+
+
+| Type: | UnquotedString |
+
+
+| Destination: | system_h_define |
+
+
+| Description: | Slave descriptor of STDIN character-mode device. This setting is used by the ALT_STDIN family of defines in system.h. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.stdout |
+
+
+| Identifier: | none |
+
+
+| Default Value: | none |
+
+
+| Value: | jtag_uart |
+
+
+| Type: | UnquotedString |
+
+
+| Destination: | system_h_define |
+
+
+| Description: | Slave descriptor of STDOUT character-mode device. This setting is used by the ALT_STDOUT family of defines in system.h. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.sys_clk_timer |
+
+
+| Identifier: | ALT_SYS_CLK |
+
+
+| Default Value: | none |
+
+
+| Value: | none |
+
+
+| Type: | UnquotedString |
+
+
+| Destination: | system_h_define |
+
+
+| Description: | Slave descriptor of the system clock timer device. This device provides a periodic interrupt ("tick") and is typically required for RTOS use. This setting defines the value of ALT_SYS_CLK in system.h. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+| Setting Name: | hal.timestamp_timer |
+
+
+| Identifier: | ALT_TIMESTAMP_CLK |
+
+
+| Default Value: | none |
+
+
+| Value: | none |
+
+
+| Type: | UnquotedString |
+
+
+| Destination: | system_h_define |
+
+
+| Description: | Slave descriptor of timestamp timer device. This device is used by Altera HAL timestamp drivers for high-resolution time measurement. This setting defines the value of ALT_TIMESTAMP_CLK in system.h. |
+
+
+| Restrictions: | none |
+
+
+
+
+
+
+
trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/summary.html
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/system.h
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/system.h (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/system.h (revision 6)
@@ -0,0 +1,449 @@
+/*
+ * system.h - SOPC Builder system and BSP software package information
+ *
+ * Machine generated for CPU 'cpu' in SOPC Builder design 'sopc'
+ * SOPC Builder design path: ../../sopc.sopcinfo
+ *
+ * Generated: Fri Apr 07 17:55:30 FET 2017
+ */
+
+/*
+ * DO NOT MODIFY THIS FILE
+ *
+ * Changing this file will have subtle consequences
+ * which will almost certainly lead to a nonfunctioning
+ * system. If you do modify this file, be aware that your
+ * changes will be overwritten and lost when this file
+ * is generated again.
+ *
+ * DO NOT MODIFY THIS FILE
+ */
+
+/*
+ * License Agreement
+ *
+ * Copyright (c) 2008
+ * Altera Corporation, San Jose, California, USA.
+ * All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * This agreement shall be governed in all respects by the laws of the State
+ * of California and by the laws of the United States of America.
+ */
+
+#ifndef __SYSTEM_H_
+#define __SYSTEM_H_
+
+/* Include definitions from linker script generator */
+#include "linker.h"
+
+
+/*
+ * CPU configuration
+ *
+ */
+
+#define ALT_CPU_ARCHITECTURE "altera_nios2_gen2"
+#define ALT_CPU_BIG_ENDIAN 0
+#define ALT_CPU_BREAK_ADDR 0x01000820
+#define ALT_CPU_CPU_ARCH_NIOS2_R1
+#define ALT_CPU_CPU_FREQ 100000000u
+#define ALT_CPU_CPU_ID_SIZE 1
+#define ALT_CPU_CPU_ID_VALUE 0x00000000
+#define ALT_CPU_CPU_IMPLEMENTATION "tiny"
+#define ALT_CPU_DATA_ADDR_WIDTH 0x19
+#define ALT_CPU_DCACHE_LINE_SIZE 0
+#define ALT_CPU_DCACHE_LINE_SIZE_LOG2 0
+#define ALT_CPU_DCACHE_SIZE 0
+#define ALT_CPU_EXCEPTION_ADDR 0x00800020
+#define ALT_CPU_FLASH_ACCELERATOR_LINES 0
+#define ALT_CPU_FLASH_ACCELERATOR_LINE_SIZE 0
+#define ALT_CPU_FLUSHDA_SUPPORTED
+#define ALT_CPU_FREQ 100000000
+#define ALT_CPU_HARDWARE_DIVIDE_PRESENT 0
+#define ALT_CPU_HARDWARE_MULTIPLY_PRESENT 0
+#define ALT_CPU_HARDWARE_MULX_PRESENT 0
+#define ALT_CPU_HAS_DEBUG_CORE 1
+#define ALT_CPU_HAS_DEBUG_STUB
+#define ALT_CPU_HAS_ILLEGAL_INSTRUCTION_EXCEPTION
+#define ALT_CPU_HAS_JMPI_INSTRUCTION
+#define ALT_CPU_ICACHE_LINE_SIZE 0
+#define ALT_CPU_ICACHE_LINE_SIZE_LOG2 0
+#define ALT_CPU_ICACHE_SIZE 0
+#define ALT_CPU_INST_ADDR_WIDTH 0x19
+#define ALT_CPU_NAME "cpu"
+#define ALT_CPU_OCI_VERSION 1
+#define ALT_CPU_RESET_ADDR 0x00800000
+
+
+/*
+ * CPU configuration (with legacy prefix - don't use these anymore)
+ *
+ */
+
+#define NIOS2_BIG_ENDIAN 0
+#define NIOS2_BREAK_ADDR 0x01000820
+#define NIOS2_CPU_ARCH_NIOS2_R1
+#define NIOS2_CPU_FREQ 100000000u
+#define NIOS2_CPU_ID_SIZE 1
+#define NIOS2_CPU_ID_VALUE 0x00000000
+#define NIOS2_CPU_IMPLEMENTATION "tiny"
+#define NIOS2_DATA_ADDR_WIDTH 0x19
+#define NIOS2_DCACHE_LINE_SIZE 0
+#define NIOS2_DCACHE_LINE_SIZE_LOG2 0
+#define NIOS2_DCACHE_SIZE 0
+#define NIOS2_EXCEPTION_ADDR 0x00800020
+#define NIOS2_FLASH_ACCELERATOR_LINES 0
+#define NIOS2_FLASH_ACCELERATOR_LINE_SIZE 0
+#define NIOS2_FLUSHDA_SUPPORTED
+#define NIOS2_HARDWARE_DIVIDE_PRESENT 0
+#define NIOS2_HARDWARE_MULTIPLY_PRESENT 0
+#define NIOS2_HARDWARE_MULX_PRESENT 0
+#define NIOS2_HAS_DEBUG_CORE 1
+#define NIOS2_HAS_DEBUG_STUB
+#define NIOS2_HAS_ILLEGAL_INSTRUCTION_EXCEPTION
+#define NIOS2_HAS_JMPI_INSTRUCTION
+#define NIOS2_ICACHE_LINE_SIZE 0
+#define NIOS2_ICACHE_LINE_SIZE_LOG2 0
+#define NIOS2_ICACHE_SIZE 0
+#define NIOS2_INST_ADDR_WIDTH 0x19
+#define NIOS2_OCI_VERSION 1
+#define NIOS2_RESET_ADDR 0x00800000
+
+
+/*
+ * Define for each module class mastered by the CPU
+ *
+ */
+
+#define __ALTERA_AVALON_DMA
+#define __ALTERA_AVALON_JTAG_UART
+#define __ALTERA_AVALON_NEW_SDRAM_CONTROLLER
+#define __ALTERA_AVALON_PIO
+#define __ALTERA_AVALON_SYSID_QSYS
+#define __ALTERA_NIOS2_GEN2
+#define __USB_FT232H
+
+
+/*
+ * System configuration
+ *
+ */
+
+#define ALT_DEVICE_FAMILY "Cyclone IV E"
+#define ALT_ENHANCED_INTERRUPT_API_PRESENT
+#define ALT_IRQ_BASE NULL
+#define ALT_LOG_PORT "/dev/null"
+#define ALT_LOG_PORT_BASE 0x0
+#define ALT_LOG_PORT_DEV null
+#define ALT_LOG_PORT_TYPE ""
+#define ALT_NUM_EXTERNAL_INTERRUPT_CONTROLLERS 0
+#define ALT_NUM_INTERNAL_INTERRUPT_CONTROLLERS 1
+#define ALT_NUM_INTERRUPT_CONTROLLERS 1
+#define ALT_STDERR "/dev/jtag_uart"
+#define ALT_STDERR_BASE 0x1001058
+#define ALT_STDERR_DEV jtag_uart
+#define ALT_STDERR_IS_JTAG_UART
+#define ALT_STDERR_PRESENT
+#define ALT_STDERR_TYPE "altera_avalon_jtag_uart"
+#define ALT_STDIN "/dev/jtag_uart"
+#define ALT_STDIN_BASE 0x1001058
+#define ALT_STDIN_DEV jtag_uart
+#define ALT_STDIN_IS_JTAG_UART
+#define ALT_STDIN_PRESENT
+#define ALT_STDIN_TYPE "altera_avalon_jtag_uart"
+#define ALT_STDOUT "/dev/jtag_uart"
+#define ALT_STDOUT_BASE 0x1001058
+#define ALT_STDOUT_DEV jtag_uart
+#define ALT_STDOUT_IS_JTAG_UART
+#define ALT_STDOUT_PRESENT
+#define ALT_STDOUT_TYPE "altera_avalon_jtag_uart"
+#define ALT_SYSTEM_NAME "sopc"
+
+
+/*
+ * dma_rx configuration
+ *
+ */
+
+#define ALT_MODULE_CLASS_dma_rx altera_avalon_dma
+#define DMA_RX_ALLOW_BYTE_TRANSACTIONS 1
+#define DMA_RX_ALLOW_DOUBLEWORD_TRANSACTIONS 0
+#define DMA_RX_ALLOW_HW_TRANSACTIONS 0
+#define DMA_RX_ALLOW_QUADWORD_TRANSACTIONS 0
+#define DMA_RX_ALLOW_WORD_TRANSACTIONS 0
+#define DMA_RX_BASE 0x1001000
+#define DMA_RX_IRQ 0
+#define DMA_RX_IRQ_INTERRUPT_CONTROLLER_ID 0
+#define DMA_RX_LENGTHWIDTH 13
+#define DMA_RX_MAX_BURST_SIZE 128
+#define DMA_RX_NAME "/dev/dma_rx"
+#define DMA_RX_SPAN 32
+#define DMA_RX_TYPE "altera_avalon_dma"
+
+
+/*
+ * dma_tx configuration
+ *
+ */
+
+#define ALT_MODULE_CLASS_dma_tx altera_avalon_dma
+#define DMA_TX_ALLOW_BYTE_TRANSACTIONS 1
+#define DMA_TX_ALLOW_DOUBLEWORD_TRANSACTIONS 0
+#define DMA_TX_ALLOW_HW_TRANSACTIONS 0
+#define DMA_TX_ALLOW_QUADWORD_TRANSACTIONS 0
+#define DMA_TX_ALLOW_WORD_TRANSACTIONS 0
+#define DMA_TX_BASE 0x1001020
+#define DMA_TX_IRQ 1
+#define DMA_TX_IRQ_INTERRUPT_CONTROLLER_ID 0
+#define DMA_TX_LENGTHWIDTH 13
+#define DMA_TX_MAX_BURST_SIZE 128
+#define DMA_TX_NAME "/dev/dma_tx"
+#define DMA_TX_SPAN 32
+#define DMA_TX_TYPE "altera_avalon_dma"
+
+
+/*
+ * hal configuration
+ *
+ */
+
+#define ALT_INCLUDE_INSTRUCTION_RELATED_EXCEPTION_API
+#define ALT_MAX_FD 32
+#define ALT_SYS_CLK none
+#define ALT_TIMESTAMP_CLK none
+
+
+/*
+ * jtag_uart configuration
+ *
+ */
+
+#define ALT_MODULE_CLASS_jtag_uart altera_avalon_jtag_uart
+#define JTAG_UART_BASE 0x1001058
+#define JTAG_UART_IRQ 2
+#define JTAG_UART_IRQ_INTERRUPT_CONTROLLER_ID 0
+#define JTAG_UART_NAME "/dev/jtag_uart"
+#define JTAG_UART_READ_DEPTH 64
+#define JTAG_UART_READ_THRESHOLD 8
+#define JTAG_UART_SPAN 8
+#define JTAG_UART_TYPE "altera_avalon_jtag_uart"
+#define JTAG_UART_WRITE_DEPTH 64
+#define JTAG_UART_WRITE_THRESHOLD 8
+
+
+/*
+ * led configuration
+ *
+ */
+
+#define ALT_MODULE_CLASS_led altera_avalon_pio
+#define LED_BASE 0x0
+#define LED_BIT_CLEARING_EDGE_REGISTER 0
+#define LED_BIT_MODIFYING_OUTPUT_REGISTER 0
+#define LED_CAPTURE 0
+#define LED_DATA_WIDTH 1
+#define LED_DO_TEST_BENCH_WIRING 0
+#define LED_DRIVEN_SIM_VALUE 0
+#define LED_EDGE_TYPE "NONE"
+#define LED_FREQ 100000000
+#define LED_HAS_IN 0
+#define LED_HAS_OUT 1
+#define LED_HAS_TRI 0
+#define LED_IRQ -1
+#define LED_IRQ_INTERRUPT_CONTROLLER_ID -1
+#define LED_IRQ_TYPE "NONE"
+#define LED_NAME "/dev/led"
+#define LED_RESET_VALUE 0
+#define LED_SPAN 16
+#define LED_TYPE "altera_avalon_pio"
+
+
+/*
+ * sdram configuration
+ *
+ */
+
+#define ALT_MODULE_CLASS_sdram altera_avalon_new_sdram_controller
+#define SDRAM_BASE 0x800000
+#define SDRAM_CAS_LATENCY 2
+#define SDRAM_CONTENTS_INFO
+#define SDRAM_INIT_NOP_DELAY 0.0
+#define SDRAM_INIT_REFRESH_COMMANDS 2
+#define SDRAM_IRQ -1
+#define SDRAM_IRQ_INTERRUPT_CONTROLLER_ID -1
+#define SDRAM_IS_INITIALIZED 1
+#define SDRAM_NAME "/dev/sdram"
+#define SDRAM_POWERUP_DELAY 100.0
+#define SDRAM_REFRESH_PERIOD 15.625
+#define SDRAM_REGISTER_DATA_IN 1
+#define SDRAM_SDRAM_ADDR_WIDTH 0x17
+#define SDRAM_SDRAM_BANK_WIDTH 2
+#define SDRAM_SDRAM_COL_WIDTH 9
+#define SDRAM_SDRAM_DATA_WIDTH 8
+#define SDRAM_SDRAM_NUM_BANKS 4
+#define SDRAM_SDRAM_NUM_CHIPSELECTS 1
+#define SDRAM_SDRAM_ROW_WIDTH 12
+#define SDRAM_SHARED_DATA 0
+#define SDRAM_SIM_MODEL_BASE 0
+#define SDRAM_SPAN 8388608
+#define SDRAM_STARVATION_INDICATOR 0
+#define SDRAM_TRISTATE_BRIDGE_SLAVE ""
+#define SDRAM_TYPE "altera_avalon_new_sdram_controller"
+#define SDRAM_T_AC 6.0
+#define SDRAM_T_MRD 3
+#define SDRAM_T_RCD 20.0
+#define SDRAM_T_RFC 70.0
+#define SDRAM_T_RP 20.0
+#define SDRAM_T_WR 15.0
+
+
+/*
+ * sdram configuration as viewed by dma_rx_write_master
+ *
+ */
+
+#define DMA_RX_WRITE_MASTER_SDRAM_BASE 0x800000
+#define DMA_RX_WRITE_MASTER_SDRAM_CAS_LATENCY 2
+#define DMA_RX_WRITE_MASTER_SDRAM_CONTENTS_INFO
+#define DMA_RX_WRITE_MASTER_SDRAM_INIT_NOP_DELAY 0.0
+#define DMA_RX_WRITE_MASTER_SDRAM_INIT_REFRESH_COMMANDS 2
+#define DMA_RX_WRITE_MASTER_SDRAM_IRQ -1
+#define DMA_RX_WRITE_MASTER_SDRAM_IRQ_INTERRUPT_CONTROLLER_ID -1
+#define DMA_RX_WRITE_MASTER_SDRAM_IS_INITIALIZED 1
+#define DMA_RX_WRITE_MASTER_SDRAM_NAME "/dev/sdram"
+#define DMA_RX_WRITE_MASTER_SDRAM_POWERUP_DELAY 100.0
+#define DMA_RX_WRITE_MASTER_SDRAM_REFRESH_PERIOD 15.625
+#define DMA_RX_WRITE_MASTER_SDRAM_REGISTER_DATA_IN 1
+#define DMA_RX_WRITE_MASTER_SDRAM_SDRAM_ADDR_WIDTH 0x17
+#define DMA_RX_WRITE_MASTER_SDRAM_SDRAM_BANK_WIDTH 2
+#define DMA_RX_WRITE_MASTER_SDRAM_SDRAM_COL_WIDTH 9
+#define DMA_RX_WRITE_MASTER_SDRAM_SDRAM_DATA_WIDTH 8
+#define DMA_RX_WRITE_MASTER_SDRAM_SDRAM_NUM_BANKS 4
+#define DMA_RX_WRITE_MASTER_SDRAM_SDRAM_NUM_CHIPSELECTS 1
+#define DMA_RX_WRITE_MASTER_SDRAM_SDRAM_ROW_WIDTH 12
+#define DMA_RX_WRITE_MASTER_SDRAM_SHARED_DATA 0
+#define DMA_RX_WRITE_MASTER_SDRAM_SIM_MODEL_BASE 0
+#define DMA_RX_WRITE_MASTER_SDRAM_SPAN 8388608
+#define DMA_RX_WRITE_MASTER_SDRAM_STARVATION_INDICATOR 0
+#define DMA_RX_WRITE_MASTER_SDRAM_TRISTATE_BRIDGE_SLAVE ""
+#define DMA_RX_WRITE_MASTER_SDRAM_TYPE "altera_avalon_new_sdram_controller"
+#define DMA_RX_WRITE_MASTER_SDRAM_T_AC 6.0
+#define DMA_RX_WRITE_MASTER_SDRAM_T_MRD 3
+#define DMA_RX_WRITE_MASTER_SDRAM_T_RCD 20.0
+#define DMA_RX_WRITE_MASTER_SDRAM_T_RFC 70.0
+#define DMA_RX_WRITE_MASTER_SDRAM_T_RP 20.0
+#define DMA_RX_WRITE_MASTER_SDRAM_T_WR 15.0
+
+
+/*
+ * sdram configuration as viewed by dma_tx_read_master
+ *
+ */
+
+#define DMA_TX_READ_MASTER_SDRAM_BASE 0x800000
+#define DMA_TX_READ_MASTER_SDRAM_CAS_LATENCY 2
+#define DMA_TX_READ_MASTER_SDRAM_CONTENTS_INFO
+#define DMA_TX_READ_MASTER_SDRAM_INIT_NOP_DELAY 0.0
+#define DMA_TX_READ_MASTER_SDRAM_INIT_REFRESH_COMMANDS 2
+#define DMA_TX_READ_MASTER_SDRAM_IRQ -1
+#define DMA_TX_READ_MASTER_SDRAM_IRQ_INTERRUPT_CONTROLLER_ID -1
+#define DMA_TX_READ_MASTER_SDRAM_IS_INITIALIZED 1
+#define DMA_TX_READ_MASTER_SDRAM_NAME "/dev/sdram"
+#define DMA_TX_READ_MASTER_SDRAM_POWERUP_DELAY 100.0
+#define DMA_TX_READ_MASTER_SDRAM_REFRESH_PERIOD 15.625
+#define DMA_TX_READ_MASTER_SDRAM_REGISTER_DATA_IN 1
+#define DMA_TX_READ_MASTER_SDRAM_SDRAM_ADDR_WIDTH 0x17
+#define DMA_TX_READ_MASTER_SDRAM_SDRAM_BANK_WIDTH 2
+#define DMA_TX_READ_MASTER_SDRAM_SDRAM_COL_WIDTH 9
+#define DMA_TX_READ_MASTER_SDRAM_SDRAM_DATA_WIDTH 8
+#define DMA_TX_READ_MASTER_SDRAM_SDRAM_NUM_BANKS 4
+#define DMA_TX_READ_MASTER_SDRAM_SDRAM_NUM_CHIPSELECTS 1
+#define DMA_TX_READ_MASTER_SDRAM_SDRAM_ROW_WIDTH 12
+#define DMA_TX_READ_MASTER_SDRAM_SHARED_DATA 0
+#define DMA_TX_READ_MASTER_SDRAM_SIM_MODEL_BASE 0
+#define DMA_TX_READ_MASTER_SDRAM_SPAN 8388608
+#define DMA_TX_READ_MASTER_SDRAM_STARVATION_INDICATOR 0
+#define DMA_TX_READ_MASTER_SDRAM_TRISTATE_BRIDGE_SLAVE ""
+#define DMA_TX_READ_MASTER_SDRAM_TYPE "altera_avalon_new_sdram_controller"
+#define DMA_TX_READ_MASTER_SDRAM_T_AC 6.0
+#define DMA_TX_READ_MASTER_SDRAM_T_MRD 3
+#define DMA_TX_READ_MASTER_SDRAM_T_RCD 20.0
+#define DMA_TX_READ_MASTER_SDRAM_T_RFC 70.0
+#define DMA_TX_READ_MASTER_SDRAM_T_RP 20.0
+#define DMA_TX_READ_MASTER_SDRAM_T_WR 15.0
+
+
+/*
+ * sysid configuration
+ *
+ */
+
+#define ALT_MODULE_CLASS_sysid altera_avalon_sysid_qsys
+#define SYSID_BASE 0x1001048
+#define SYSID_ID 14303232
+#define SYSID_IRQ -1
+#define SYSID_IRQ_INTERRUPT_CONTROLLER_ID -1
+#define SYSID_NAME "/dev/sysid"
+#define SYSID_SPAN 8
+#define SYSID_TIMESTAMP 1491576696
+#define SYSID_TYPE "altera_avalon_sysid_qsys"
+
+
+/*
+ * usb configuration
+ *
+ */
+
+#define ALT_MODULE_CLASS_usb usb_ft232h
+#define USB_BASE 0x1001050
+#define USB_IRQ -1
+#define USB_IRQ_INTERRUPT_CONTROLLER_ID -1
+#define USB_NAME "/dev/usb"
+#define USB_SPAN 8
+#define USB_TYPE "usb_ft232h"
+
+
+/*
+ * usb configuration as viewed by dma_rx_read_master
+ *
+ */
+
+#define DMA_RX_READ_MASTER_USB_BASE 0x1001050
+#define DMA_RX_READ_MASTER_USB_IRQ -1
+#define DMA_RX_READ_MASTER_USB_IRQ_INTERRUPT_CONTROLLER_ID -1
+#define DMA_RX_READ_MASTER_USB_NAME "/dev/usb"
+#define DMA_RX_READ_MASTER_USB_SPAN 8
+#define DMA_RX_READ_MASTER_USB_TYPE "usb_ft232h"
+
+
+/*
+ * usb configuration as viewed by dma_tx_write_master
+ *
+ */
+
+#define DMA_TX_WRITE_MASTER_USB_BASE 0x1001050
+#define DMA_TX_WRITE_MASTER_USB_IRQ -1
+#define DMA_TX_WRITE_MASTER_USB_IRQ_INTERRUPT_CONTROLLER_ID -1
+#define DMA_TX_WRITE_MASTER_USB_NAME "/dev/usb"
+#define DMA_TX_WRITE_MASTER_USB_SPAN 8
+#define DMA_TX_WRITE_MASTER_USB_TYPE "usb_ft232h"
+
+#endif /* __SYSTEM_H_ */
trunk/testbench/altera_project/test_usb_ft232h/software/usb_ft232h_bsp/system.h
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/stp1.stp
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/stp1.stp (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/stp1.stp (revision 6)
@@ -0,0 +1,567 @@
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trunk/testbench/altera_project/test_usb_ft232h/stp1.stp
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/test_usb_ft232h.bdf
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/test_usb_ft232h.bdf (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/test_usb_ft232h.bdf (revision 6)
@@ -0,0 +1,828 @@
+/*
+WARNING: Do NOT edit the input and output ports in this file in a text
+editor if you plan to continue editing the block that represents it in
+the Block Editor! File corruption is VERY likely to occur.
+*/
+/*
+Copyright (C) 2017 Intel Corporation. All rights reserved.
+Your use of Intel Corporation's design tools, logic functions
+and other software and tools, and its AMPP partner logic
+functions, and any output files from any of the foregoing
+(including device programming or simulation files), and any
+associated documentation or information are expressly subject
+to the terms and conditions of the Intel Program License
+Subscription Agreement, the Intel Quartus Prime License Agreement,
+the Intel MegaCore Function License Agreement, or other
+applicable license agreement, including, without limitation,
+that your use is for the sole purpose of programming logic
+devices manufactured by Intel and sold by Intel or its
+authorized distributors. Please refer to the applicable
+agreement for further details.
+*/
+(header "graphic" (version "1.4"))
+(pin
+ (input)
+ (rect 576 8 744 24)
+ (text "INPUT" (rect 125 0 154 9)(font "Arial" (font_size 6)))
+ (text "RESET_N" (rect 5 0 54 10)(font "Arial" ))
+ (pt 168 8)
+ (drawing
+ (line (pt 84 12)(pt 109 12))
+ (line (pt 84 4)(pt 109 4))
+ (line (pt 113 8)(pt 168 8))
+ (line (pt 84 12)(pt 84 4))
+ (line (pt 109 4)(pt 113 8))
+ (line (pt 109 12)(pt 113 8))
+ )
+ (text "VCC" (rect 128 7 149 16)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 496 24 576 56))
+)
+(pin
+ (input)
+ (rect 96 176 264 192)
+ (text "INPUT" (rect 125 0 154 9)(font "Arial" (font_size 6)))
+ (text "CLOCK_IN" (rect 5 0 58 10)(font "Arial" ))
+ (pt 168 8)
+ (drawing
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+ )
+ (text "VCC" (rect 128 7 149 16)(font "Arial" (font_size 6)))
+ (annotation_block (location)(rect 16 192 96 224))
+)
+(pin
+ (input)
+ (rect 1152 232 1320 248)
+ (text "INPUT" (rect 125 0 154 9)(font "Arial" (font_size 6)))
+ (text "USB_RXF_N" (rect 5 0 67 10)(font "Arial" ))
+ (pt 168 8)
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+ (annotation_block (location)(rect 1024 232 1080 248))
+)
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+ (rect 1152 312 1320 328)
+ (text "INPUT" (rect 125 0 154 9)(font "Arial" (font_size 6)))
+ (text "USB_TXE_N" (rect 5 0 67 10)(font "Arial" ))
+ (pt 168 8)
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+)
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+ (rect 1152 216 1320 232)
+ (text "INPUT" (rect 125 0 154 9)(font "Arial" (font_size 6)))
+ (text "USB_CLK" (rect 5 0 54 10)(font "Arial" ))
+ (pt 168 8)
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+ (annotation_block (location)(rect 1024 216 1080 232))
+)
+(pin
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+ (text "OUTPUT" (rect 1 0 41 9)(font "Arial" (font_size 6)))
+ (text "DRAM_CLK" (rect 90 0 149 10)(font "Arial" ))
+ (pt 0 8)
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+)
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+ (pt 176 8)
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+)
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+)
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trunk/testbench/altera_project/test_usb_ft232h/test_usb_ft232h.bdf
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/test_usb_ft232h.cdf
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/test_usb_ft232h.cdf (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/test_usb_ft232h.cdf (revision 6)
@@ -0,0 +1,13 @@
+/* Quartus Prime Version 16.1.2 Build 203 01/18/2017 SJ Lite Edition */
+JedecChain;
+ FileRevision(JESD32A);
+ DefaultMfr(6E);
+
+ P ActionCode(Cfg)
+ Device PartName(EP4CE22E22) Path("/home/edv/workspace/usb_ft232h/altera/test_usb_ft232h/output_files/") File("test_usb_ft232h.sof") MfrSpec(OpMask(1));
+
+ChainEnd;
+
+AlteraBegin;
+ ChainType(JTAG);
+AlteraEnd;
trunk/testbench/altera_project/test_usb_ft232h/test_usb_ft232h.cdf
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/test_usb_ft232h.ipregen.rpt
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/test_usb_ft232h.ipregen.rpt (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/test_usb_ft232h.ipregen.rpt (revision 6)
@@ -0,0 +1,56 @@
+IP Upgrade report for test_usb_ft232h
+Wed Mar 29 14:39:06 2017
+Quartus Prime Version 16.1.2 Build 203 01/18/2017 SJ Lite Edition
+
+
+---------------------
+; Table of Contents ;
+---------------------
+ 1. Legal Notice
+ 2. IP Upgrade Summary
+ 3. IP Upgrade Messages
+
+
+
+----------------
+; Legal Notice ;
+----------------
+Copyright (C) 2017 Intel Corporation. All rights reserved.
+Your use of Intel Corporation's design tools, logic functions
+and other software and tools, and its AMPP partner logic
+functions, and any output files from any of the foregoing
+(including device programming or simulation files), and any
+associated documentation or information are expressly subject
+to the terms and conditions of the Intel Program License
+Subscription Agreement, the Intel Quartus Prime License Agreement,
+the Intel MegaCore Function License Agreement, or other
+applicable license agreement, including, without limitation,
+that your use is for the sole purpose of programming logic
+devices manufactured by Intel and sold by Intel or its
+authorized distributors. Please refer to the applicable
+agreement for further details.
+
+
+
++----------------------------------------------------------------------------+
+; IP Upgrade Summary ;
++------------------------------+---------------------------------------------+
+; IP Components Upgrade Status ; Failed - Wed Mar 29 14:39:06 2017 ;
+; Quartus Prime Version ; 16.1.2 Build 203 01/18/2017 SJ Lite Edition ;
+; Revision Name ; test_usb_ft232h ;
+; Top-level Entity Name ; test_usb_ft232h ;
+; Family ; Cyclone IV E ;
++------------------------------+---------------------------------------------+
+
+
++---------------------+
+; IP Upgrade Messages ;
++---------------------+
+Info (23030): Evaluation of Tcl script /home/edv/intelFPGA_lite/16.1/quartus/common/tcl/internal/ip_regen/ip_regen.tcl was successful
+Info: Quartus Prime Shell was successful. 0 errors, 0 warnings
+ Info: Peak virtual memory: 1068 megabytes
+ Info: Processing ended: Wed Mar 29 14:39:06 2017
+ Info: Elapsed time: 00:00:10
+ Info: Total CPU time (on all processors): 00:00:22
+
+
trunk/testbench/altera_project/test_usb_ft232h/test_usb_ft232h.ipregen.rpt
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/test_usb_ft232h.out.sdc
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/test_usb_ft232h.out.sdc (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/test_usb_ft232h.out.sdc (revision 6)
@@ -0,0 +1,156 @@
+## Generated SDC file "test_usb_ft232h.out.sdc"
+
+## Copyright (C) 2017 Intel Corporation. All rights reserved.
+## Your use of Intel Corporation's design tools, logic functions
+## and other software and tools, and its AMPP partner logic
+## functions, and any output files from any of the foregoing
+## (including device programming or simulation files), and any
+## associated documentation or information are expressly subject
+## to the terms and conditions of the Intel Program License
+## Subscription Agreement, the Intel Quartus Prime License Agreement,
+## the Intel MegaCore Function License Agreement, or other
+## applicable license agreement, including, without limitation,
+## that your use is for the sole purpose of programming logic
+## devices manufactured by Intel and sold by Intel or its
+## authorized distributors. Please refer to the applicable
+## agreement for further details.
+
+
+## VENDOR "Altera"
+## PROGRAM "Quartus Prime"
+## VERSION "Version 16.1.2 Build 203 01/18/2017 SJ Lite Edition"
+
+## DATE "Thu Apr 6 13:43:18 2017"
+
+##
+## DEVICE "EP4CE22E22C8"
+##
+
+
+#**************************************************************
+# Time Information
+#**************************************************************
+
+set_time_format -unit ns -decimal_places 3
+
+
+
+#**************************************************************
+# Create Clock
+#**************************************************************
+
+create_clock -name {altera_reserved_tck} -period 100.000 -waveform { 0.000 50.000 } [get_ports {altera_reserved_tck}]
+create_clock -name {CLOCK_IN} -period 61.035 -waveform { 0.000 30.517 } [get_ports {CLOCK_IN}]
+create_clock -name {USB_CLK} -period 16.666 -waveform { 0.000 8.333 } [get_ports {USB_CLK}]
+
+
+#**************************************************************
+# Create Generated Clock
+#**************************************************************
+
+create_generated_clock -name {inst1|altpll_component|auto_generated|pll1|clk[0]} -source [get_pins {inst1|altpll_component|auto_generated|pll1|inclk[0]}] -duty_cycle 50/1 -multiply_by 25 -divide_by 4 -master_clock {inst|altpll_component|auto_generated|pll1|clk[0]} [get_pins {inst1|altpll_component|auto_generated|pll1|clk[0]}]
+create_generated_clock -name {inst1|altpll_component|auto_generated|pll1|clk[1]} -source [get_pins {inst1|altpll_component|auto_generated|pll1|inclk[0]}] -duty_cycle 50/1 -multiply_by 25 -divide_by 4 -phase -90.000 -master_clock {inst|altpll_component|auto_generated|pll1|clk[0]} [get_pins {inst1|altpll_component|auto_generated|pll1|clk[1]}]
+create_generated_clock -name {inst|altpll_component|auto_generated|pll1|clk[0]} -source [get_pins {inst|altpll_component|auto_generated|pll1|inclk[0]}] -duty_cycle 50/1 -multiply_by 125 -divide_by 128 -master_clock {CLOCK_IN} [get_pins {inst|altpll_component|auto_generated|pll1|clk[0]}]
+
+
+#**************************************************************
+# Set Clock Latency
+#**************************************************************
+
+
+
+#**************************************************************
+# Set Clock Uncertainty
+#**************************************************************
+
+set_clock_uncertainty -rise_from [get_clocks {inst1|altpll_component|auto_generated|pll1|clk[0]}] -rise_to [get_clocks {inst1|altpll_component|auto_generated|pll1|clk[0]}] 0.020
+set_clock_uncertainty -rise_from [get_clocks {inst1|altpll_component|auto_generated|pll1|clk[0]}] -fall_to [get_clocks {inst1|altpll_component|auto_generated|pll1|clk[0]}] 0.020
+set_clock_uncertainty -fall_from [get_clocks {inst1|altpll_component|auto_generated|pll1|clk[0]}] -rise_to [get_clocks {inst1|altpll_component|auto_generated|pll1|clk[0]}] 0.020
+set_clock_uncertainty -fall_from [get_clocks {inst1|altpll_component|auto_generated|pll1|clk[0]}] -fall_to [get_clocks {inst1|altpll_component|auto_generated|pll1|clk[0]}] 0.020
+set_clock_uncertainty -rise_from [get_clocks {USB_CLK}] -rise_to [get_clocks {USB_CLK}] 0.020
+set_clock_uncertainty -rise_from [get_clocks {USB_CLK}] -fall_to [get_clocks {USB_CLK}] 0.020
+set_clock_uncertainty -fall_from [get_clocks {USB_CLK}] -rise_to [get_clocks {USB_CLK}] 0.020
+set_clock_uncertainty -fall_from [get_clocks {USB_CLK}] -fall_to [get_clocks {USB_CLK}] 0.020
+set_clock_uncertainty -rise_from [get_clocks {altera_reserved_tck}] -rise_to [get_clocks {altera_reserved_tck}] 0.020
+set_clock_uncertainty -rise_from [get_clocks {altera_reserved_tck}] -fall_to [get_clocks {altera_reserved_tck}] 0.020
+set_clock_uncertainty -fall_from [get_clocks {altera_reserved_tck}] -rise_to [get_clocks {altera_reserved_tck}] 0.020
+set_clock_uncertainty -fall_from [get_clocks {altera_reserved_tck}] -fall_to [get_clocks {altera_reserved_tck}] 0.020
+
+
+#**************************************************************
+# Set Input Delay
+#**************************************************************
+
+
+
+#**************************************************************
+# Set Output Delay
+#**************************************************************
+
+
+
+#**************************************************************
+# Set Clock Groups
+#**************************************************************
+
+set_clock_groups -asynchronous -group [get_clocks {altera_reserved_tck}]
+set_clock_groups -asynchronous -group [get_clocks {altera_reserved_tck}]
+set_clock_groups -physically_exclusive -group [get_clocks {USB_CLK}]
+set_clock_groups -logically_exclusive -group [get_clocks {CLOCK_IN}]
+set_clock_groups -logically_exclusive -group [get_clocks {inst|altpll_component|auto_generated|pll1|clk[0]}]
+
+
+#**************************************************************
+# Set False Path
+#**************************************************************
+
+set_false_path -from [get_registers {*|alt_jtag_atlantic:*|jupdate}] -to [get_registers {*|alt_jtag_atlantic:*|jupdate1*}]
+set_false_path -from [get_registers {*|alt_jtag_atlantic:*|rdata[*]}] -to [get_registers {*|alt_jtag_atlantic*|td_shift[*]}]
+set_false_path -from [get_registers {*|alt_jtag_atlantic:*|read}] -to [get_registers {*|alt_jtag_atlantic:*|read1*}]
+set_false_path -from [get_registers {*|alt_jtag_atlantic:*|read_req}]
+set_false_path -from [get_registers {*|alt_jtag_atlantic:*|rvalid}] -to [get_registers {*|alt_jtag_atlantic*|td_shift[*]}]
+set_false_path -from [get_registers {*|t_dav}] -to [get_registers {*|alt_jtag_atlantic:*|tck_t_dav}]
+set_false_path -from [get_registers {*|alt_jtag_atlantic:*|user_saw_rvalid}] -to [get_registers {*|alt_jtag_atlantic:*|rvalid0*}]
+set_false_path -from [get_registers {*|alt_jtag_atlantic:*|wdata[*]}] -to [get_registers *]
+set_false_path -from [get_registers {*|alt_jtag_atlantic:*|write}] -to [get_registers {*|alt_jtag_atlantic:*|write1*}]
+set_false_path -from [get_registers {*|alt_jtag_atlantic:*|write_stalled}] -to [get_registers {*|alt_jtag_atlantic:*|t_ena*}]
+set_false_path -from [get_registers {*|alt_jtag_atlantic:*|write_stalled}] -to [get_registers {*|alt_jtag_atlantic:*|t_pause*}]
+set_false_path -from [get_registers {*|alt_jtag_atlantic:*|write_valid}]
+set_false_path -to [get_keepers {*altera_std_synchronizer:*|din_s1}]
+set_false_path -from [get_keepers {*rdptr_g*}] -to [get_keepers {*ws_dgrp|dffpipe_3f9:dffpipe22|dffe23a*}]
+set_false_path -from [get_keepers {*delayed_wrptr_g*}] -to [get_keepers {*rs_dgwp|dffpipe_0f9:dffpipe13|dffe14a*}]
+set_false_path -from [get_keepers {*rdptr_g*}] -to [get_keepers {*ws_dgrp|dffpipe_2f9:dffpipe14|dffe15a*}]
+set_false_path -from [get_keepers {*delayed_wrptr_g*}] -to [get_keepers {*rs_dgwp|dffpipe_1f9:dffpipe5|dffe6a*}]
+set_false_path -to [get_pins -nocase -compatibility_mode {*|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain*|clrn}]
+set_false_path -from [get_keepers {*sopc_cpu_cpu:*|sopc_cpu_cpu_nios2_oci:the_sopc_cpu_cpu_nios2_oci|sopc_cpu_cpu_nios2_oci_break:the_sopc_cpu_cpu_nios2_oci_break|break_readreg*}] -to [get_keepers {*sopc_cpu_cpu:*|sopc_cpu_cpu_nios2_oci:the_sopc_cpu_cpu_nios2_oci|sopc_cpu_cpu_debug_slave_wrapper:the_sopc_cpu_cpu_debug_slave_wrapper|sopc_cpu_cpu_debug_slave_tck:the_sopc_cpu_cpu_debug_slave_tck|*sr*}]
+set_false_path -from [get_keepers {*sopc_cpu_cpu:*|sopc_cpu_cpu_nios2_oci:the_sopc_cpu_cpu_nios2_oci|sopc_cpu_cpu_nios2_oci_debug:the_sopc_cpu_cpu_nios2_oci_debug|*resetlatch}] -to [get_keepers {*sopc_cpu_cpu:*|sopc_cpu_cpu_nios2_oci:the_sopc_cpu_cpu_nios2_oci|sopc_cpu_cpu_debug_slave_wrapper:the_sopc_cpu_cpu_debug_slave_wrapper|sopc_cpu_cpu_debug_slave_tck:the_sopc_cpu_cpu_debug_slave_tck|*sr[33]}]
+set_false_path -from [get_keepers {*sopc_cpu_cpu:*|sopc_cpu_cpu_nios2_oci:the_sopc_cpu_cpu_nios2_oci|sopc_cpu_cpu_nios2_oci_debug:the_sopc_cpu_cpu_nios2_oci_debug|monitor_ready}] -to [get_keepers {*sopc_cpu_cpu:*|sopc_cpu_cpu_nios2_oci:the_sopc_cpu_cpu_nios2_oci|sopc_cpu_cpu_debug_slave_wrapper:the_sopc_cpu_cpu_debug_slave_wrapper|sopc_cpu_cpu_debug_slave_tck:the_sopc_cpu_cpu_debug_slave_tck|*sr[0]}]
+set_false_path -from [get_keepers {*sopc_cpu_cpu:*|sopc_cpu_cpu_nios2_oci:the_sopc_cpu_cpu_nios2_oci|sopc_cpu_cpu_nios2_oci_debug:the_sopc_cpu_cpu_nios2_oci_debug|monitor_error}] -to [get_keepers {*sopc_cpu_cpu:*|sopc_cpu_cpu_nios2_oci:the_sopc_cpu_cpu_nios2_oci|sopc_cpu_cpu_debug_slave_wrapper:the_sopc_cpu_cpu_debug_slave_wrapper|sopc_cpu_cpu_debug_slave_tck:the_sopc_cpu_cpu_debug_slave_tck|*sr[34]}]
+set_false_path -from [get_keepers {*sopc_cpu_cpu:*|sopc_cpu_cpu_nios2_oci:the_sopc_cpu_cpu_nios2_oci|sopc_cpu_cpu_nios2_ocimem:the_sopc_cpu_cpu_nios2_ocimem|*MonDReg*}] -to [get_keepers {*sopc_cpu_cpu:*|sopc_cpu_cpu_nios2_oci:the_sopc_cpu_cpu_nios2_oci|sopc_cpu_cpu_debug_slave_wrapper:the_sopc_cpu_cpu_debug_slave_wrapper|sopc_cpu_cpu_debug_slave_tck:the_sopc_cpu_cpu_debug_slave_tck|*sr*}]
+set_false_path -from [get_keepers {*sopc_cpu_cpu:*|sopc_cpu_cpu_nios2_oci:the_sopc_cpu_cpu_nios2_oci|sopc_cpu_cpu_debug_slave_wrapper:the_sopc_cpu_cpu_debug_slave_wrapper|sopc_cpu_cpu_debug_slave_tck:the_sopc_cpu_cpu_debug_slave_tck|*sr*}] -to [get_keepers {*sopc_cpu_cpu:*|sopc_cpu_cpu_nios2_oci:the_sopc_cpu_cpu_nios2_oci|sopc_cpu_cpu_debug_slave_wrapper:the_sopc_cpu_cpu_debug_slave_wrapper|sopc_cpu_cpu_debug_slave_sysclk:the_sopc_cpu_cpu_debug_slave_sysclk|*jdo*}]
+set_false_path -from [get_keepers {sld_hub:*|irf_reg*}] -to [get_keepers {*sopc_cpu_cpu:*|sopc_cpu_cpu_nios2_oci:the_sopc_cpu_cpu_nios2_oci|sopc_cpu_cpu_debug_slave_wrapper:the_sopc_cpu_cpu_debug_slave_wrapper|sopc_cpu_cpu_debug_slave_sysclk:the_sopc_cpu_cpu_debug_slave_sysclk|ir*}]
+set_false_path -from [get_keepers {sld_hub:*|sld_shadow_jsm:shadow_jsm|state[1]}] -to [get_keepers {*sopc_cpu_cpu:*|sopc_cpu_cpu_nios2_oci:the_sopc_cpu_cpu_nios2_oci|sopc_cpu_cpu_nios2_oci_debug:the_sopc_cpu_cpu_nios2_oci_debug|monitor_go}]
+
+
+#**************************************************************
+# Set Multicycle Path
+#**************************************************************
+
+
+
+#**************************************************************
+# Set Maximum Delay
+#**************************************************************
+
+
+
+#**************************************************************
+# Set Minimum Delay
+#**************************************************************
+
+
+
+#**************************************************************
+# Set Input Transition
+#**************************************************************
+
trunk/testbench/altera_project/test_usb_ft232h/test_usb_ft232h.out.sdc
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/test_usb_ft232h.qpf
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/test_usb_ft232h.qpf (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/test_usb_ft232h.qpf (revision 6)
@@ -0,0 +1,31 @@
+# -------------------------------------------------------------------------- #
+#
+# Copyright (C) 1991-2016 Altera Corporation. All rights reserved.
+# Your use of Altera Corporation's design tools, logic functions
+# and other software and tools, and its AMPP partner logic
+# functions, and any output files from any of the foregoing
+# (including device programming or simulation files), and any
+# associated documentation or information are expressly subject
+# to the terms and conditions of the Altera Program License
+# Subscription Agreement, the Altera Quartus Prime License Agreement,
+# the Altera MegaCore Function License Agreement, or other
+# applicable license agreement, including, without limitation,
+# that your use is for the sole purpose of programming logic
+# devices manufactured by Altera and sold by Altera or its
+# authorized distributors. Please refer to the applicable
+# agreement for further details.
+#
+# -------------------------------------------------------------------------- #
+#
+# Quartus Prime
+# Version 16.0.2 Build 222 07/20/2016 SJ Lite Edition
+# Date created = 15:14:21 March 14, 2017
+#
+# -------------------------------------------------------------------------- #
+
+QUARTUS_VERSION = "16.0"
+DATE = "15:14:21 March 14, 2017"
+
+# Revisions
+
+PROJECT_REVISION = "test_usb_ft232h"
trunk/testbench/altera_project/test_usb_ft232h/test_usb_ft232h.qpf
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/test_usb_ft232h.qsf
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/test_usb_ft232h.qsf (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/test_usb_ft232h.qsf (revision 6)
@@ -0,0 +1,164 @@
+# -------------------------------------------------------------------------- #
+#
+# Copyright (C) 1991-2016 Altera Corporation. All rights reserved.
+# Your use of Altera Corporation's design tools, logic functions
+# and other software and tools, and its AMPP partner logic
+# functions, and any output files from any of the foregoing
+# (including device programming or simulation files), and any
+# associated documentation or information are expressly subject
+# to the terms and conditions of the Altera Program License
+# Subscription Agreement, the Altera Quartus Prime License Agreement,
+# the Altera MegaCore Function License Agreement, or other
+# applicable license agreement, including, without limitation,
+# that your use is for the sole purpose of programming logic
+# devices manufactured by Altera and sold by Altera or its
+# authorized distributors. Please refer to the applicable
+# agreement for further details.
+#
+# -------------------------------------------------------------------------- #
+#
+# Quartus Prime
+# Version 16.0.2 Build 222 07/20/2016 SJ Lite Edition
+# Date created = 15:14:22 March 14, 2017
+#
+# -------------------------------------------------------------------------- #
+#
+# Notes:
+#
+# 1) The default values for assignments are stored in the file:
+# test_usb_ft232h_assignment_defaults.qdf
+# If this file doesn't exist, see file:
+# assignment_defaults.qdf
+#
+# 2) Altera recommends that you do not modify this file. This
+# file is updated automatically by the Quartus Prime software
+# and any changes you make may be lost or overwritten.
+#
+# -------------------------------------------------------------------------- #
+
+
+set_global_assignment -name FAMILY "Cyclone IV E"
+set_global_assignment -name DEVICE EP4CE22E22C8
+set_global_assignment -name TOP_LEVEL_ENTITY test_usb_ft232h
+set_global_assignment -name ORIGINAL_QUARTUS_VERSION 16.0.2
+set_global_assignment -name PROJECT_CREATION_TIME_DATE "15:14:22 MARCH 14, 2017"
+set_global_assignment -name LAST_QUARTUS_VERSION "16.1.2 Lite Edition"
+set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
+set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
+set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
+set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1
+set_global_assignment -name NOMINAL_CORE_SUPPLY_VOLTAGE 1.2V
+set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (Verilog)"
+set_global_assignment -name EDA_TIME_SCALE "1 ps" -section_id eda_simulation
+set_global_assignment -name EDA_OUTPUT_DATA_FORMAT "VERILOG HDL" -section_id eda_simulation
+set_location_assignment PIN_114 -to USB_DATA[0]
+set_location_assignment PIN_115 -to USB_DATA[1]
+set_location_assignment PIN_120 -to USB_DATA[2]
+set_location_assignment PIN_121 -to USB_DATA[3]
+set_location_assignment PIN_132 -to USB_DATA[4]
+set_location_assignment PIN_133 -to USB_DATA[5]
+set_location_assignment PIN_135 -to USB_DATA[6]
+set_location_assignment PIN_137 -to USB_DATA[7]
+set_location_assignment PIN_49 -to DRAM_DQ[0]
+set_location_assignment PIN_50 -to DRAM_DQ[1]
+set_location_assignment PIN_51 -to DRAM_DQ[2]
+set_location_assignment PIN_58 -to DRAM_DQ[3]
+set_location_assignment PIN_59 -to DRAM_DQ[4]
+set_location_assignment PIN_60 -to DRAM_DQ[5]
+set_location_assignment PIN_66 -to DRAM_DQ[6]
+set_location_assignment PIN_67 -to DRAM_DQ[7]
+set_location_assignment PIN_126 -to USB_CLK
+set_location_assignment PIN_136 -to USB_OE_N
+set_location_assignment PIN_127 -to USB_RXF_N
+set_location_assignment PIN_128 -to USB_TXE_N
+set_location_assignment PIN_125 -to USB_RD_N
+set_location_assignment PIN_141 -to USB_WR_N
+set_location_assignment PIN_119 -to USB_SIWU_N
+set_location_assignment PIN_129 -to USB_PWREN_N
+set_location_assignment PIN_52 -to CLOCK_IN
+set_location_assignment PIN_68 -to DRAM_ADDR[1]
+set_location_assignment PIN_69 -to DRAM_ADDR[2]
+set_location_assignment PIN_71 -to DRAM_ADDR[3]
+set_location_assignment PIN_72 -to DRAM_ADDR[4]
+set_location_assignment PIN_76 -to DRAM_ADDR[5]
+set_location_assignment PIN_77 -to DRAM_ADDR[6]
+set_location_assignment PIN_80 -to DRAM_ADDR[7]
+set_location_assignment PIN_83 -to DRAM_ADDR[8]
+set_location_assignment PIN_85 -to DRAM_ADDR[9]
+set_location_assignment PIN_86 -to DRAM_ADDR[10]
+set_location_assignment PIN_87 -to DRAM_ADDR[11]
+set_location_assignment PIN_65 -to DRAM_ADDR[0]
+set_location_assignment PIN_42 -to DRAM_CKE
+set_location_assignment PIN_43 -to DRAM_CLK
+set_location_assignment PIN_44 -to DRAM_CS_N
+set_location_assignment PIN_64 -to DRAM_RAS_N
+set_location_assignment PIN_46 -to DRAM_DQM
+set_location_assignment PIN_31 -to DRAM_WE_N
+set_location_assignment PIN_39 -to DRAM_CAS_N
+set_location_assignment PIN_32 -to DRAM_BA[0]
+set_location_assignment PIN_33 -to DRAM_BA[1]
+set_location_assignment PIN_53 -to RESET_N
+set_location_assignment PIN_100 -to DAC_SPI_CS_N[1]
+set_location_assignment PIN_106 -to DAC_SPI_CS_N[2]
+set_location_assignment PIN_105 -to DAC_SPI_CS_N[3]
+set_location_assignment PIN_104 -to DAC_SPI_CS_N[4]
+set_location_assignment PIN_103 -to DAC_SPI_CS_N[5]
+set_location_assignment PIN_98 -to DAC_SPI_MOSI
+set_location_assignment PIN_99 -to DAC_SPI_CS_N[0]
+set_location_assignment PIN_91 -to MCU_MISO
+set_location_assignment PIN_111 -to MCU_MOSI
+set_location_assignment PIN_112 -to MCU_SCLK
+set_location_assignment PIN_110 -to MCU_SS_N
+set_location_assignment PIN_28 -to ADC_SDI
+set_location_assignment PIN_25 -to ADC_SDO
+set_location_assignment PIN_24 -to ADC_SDOFS
+set_location_assignment PIN_23 -to ADC_SCLK
+set_location_assignment PIN_113 -to MCU_CLOCK
+set_location_assignment PIN_144 -to FLASH_SCLK
+set_location_assignment PIN_143 -to FLASH_MOSI
+set_location_assignment PIN_142 -to FLASH_MISO
+set_location_assignment PIN_7 -to FLASH_CS_N
+set_location_assignment PIN_10 -to STATUS_LED
+set_location_assignment PIN_54 -to AD_DATA[0]
+set_location_assignment PIN_55 -to AD_DATA[1]
+set_location_assignment PIN_88 -to AD_DATA[2]
+set_location_assignment PIN_89 -to AD_DATA[3]
+set_location_assignment PIN_90 -to AD_DATA[4]
+set_location_assignment PIN_11 -to AD_DATA[5]
+set_location_assignment PIN_101 -to AD_CS_N
+set_location_assignment PIN_30 -to AD_SCK
+set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
+set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
+set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
+set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
+set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
+set_instance_assignment -name FAST_INPUT_REGISTER ON -to USB_DATA -disable
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to USB_DATA -disable
+set_instance_assignment -name FAST_INPUT_REGISTER ON -to USB_RXF_N -disable
+set_instance_assignment -name FAST_INPUT_REGISTER ON -to USB_TXE_N -disable
+set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to USB_OE_N -disable
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to USB_RD_N -disable
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to USB_WR_N -disable
+set_instance_assignment -name GLOBAL_SIGNAL GLOBAL_CLOCK -to USB_CLK
+set_instance_assignment -name GLOBAL_SIGNAL GLOBAL_CLOCK -to "pll2:inst1|c1"
+set_instance_assignment -name GLOBAL_SIGNAL GLOBAL_CLOCK -to "pll2:inst1|c0"
+set_global_assignment -name VERILOG_INPUT_VERSION SYSTEMVERILOG_2005
+set_global_assignment -name VERILOG_SHOW_LMF_MAPPING_MESSAGES OFF
+set_global_assignment -name ENABLE_SIGNALTAP OFF
+set_global_assignment -name USE_SIGNALTAP_FILE stp1.stp
+set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS ON
+set_global_assignment -name QSYS_FILE sopc.qsys
+set_global_assignment -name SYSTEMVERILOG_FILE usb_fifos_avalon_mm_interface.sv
+set_global_assignment -name SYSTEMVERILOG_FILE ft232h_transmitter.sv
+set_global_assignment -name SYSTEMVERILOG_FILE ft232h_receiver.sv
+set_global_assignment -name SYSTEMVERILOG_FILE pipeline.sv
+set_global_assignment -name SYSTEMVERILOG_FILE ft232h_fifos_interface.sv
+set_global_assignment -name SIGNALTAP_FILE stp1.stp
+set_global_assignment -name SYSTEMVERILOG_FILE usb_ft232h.sv
+set_global_assignment -name SDC_FILE test_usb_ft232h.out.sdc
+set_global_assignment -name BDF_FILE test_usb_ft232h.bdf
+set_global_assignment -name QIP_FILE pll1.qip
+set_global_assignment -name QIP_FILE pll2.qip
+set_global_assignment -name CDF_FILE test_usb_ft232h.cdf
+set_global_assignment -name QIP_FILE pll_stp.qip
+set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
\ No newline at end of file
trunk/testbench/altera_project/test_usb_ft232h/test_usb_ft232h.qsf
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/usb.qsys
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/usb.qsys (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/usb.qsys (revision 6)
@@ -0,0 +1,97 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
trunk/testbench/altera_project/test_usb_ft232h/usb.qsys
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/usb.sopcinfo
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/usb.sopcinfo (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/usb.sopcinfo (revision 6)
@@ -0,0 +1,784 @@
+
+
+
+
+
+
+ java.lang.Integer
+ 1490780048
+ false
+ true
+ false
+ true
+ GENERATION_ID
+
+
+ java.lang.String
+
+ false
+ true
+ false
+ true
+ UNIQUE_ID
+
+
+ java.lang.String
+ CYCLONEIVE
+ false
+ true
+ false
+ true
+ DEVICE_FAMILY
+
+
+ java.lang.String
+ EP4CE22E22C8
+ false
+ true
+ false
+ true
+ DEVICE
+
+
+ java.lang.String
+ 8
+ false
+ true
+ false
+ true
+ DEVICE_SPEEDGRADE
+
+
+ java.lang.Long
+ -1
+ false
+ true
+ false
+ true
+ CLOCK_RATE
+ clock_sink
+
+
+ java.lang.Integer
+ -1
+ false
+ true
+ false
+ true
+ CLOCK_DOMAIN
+ clock_sink
+
+
+ java.lang.Integer
+ -1
+ false
+ true
+ false
+ true
+ RESET_DOMAIN
+ clock_sink
+
+
+ java.lang.String
+ Cyclone IV E
+ false
+ true
+ false
+ true
+ DEVICE_FAMILY
+
+
+ boolean
+ false
+ false
+ true
+ true
+ true
+
+
+
+
+ int
+ 2048
+ false
+ true
+ true
+ true
+
+
+ int
+ 11
+ false
+ true
+ true
+ true
+
+
+ int
+ 2048
+ false
+ true
+ true
+ true
+
+
+ int
+ 11
+ false
+ true
+ true
+ true
+
+
+ int
+ 3
+ false
+ true
+ true
+ true
+
+
+ int
+ 1
+ false
+ true
+ true
+ true
+
+
+ int
+ 1
+ false
+ true
+ true
+ true
+
+
+ int
+ 1
+ false
+ true
+ true
+ true
+
+
+ int
+ 1
+ false
+ true
+ true
+ true
+
+
+ java.lang.String
+ UNKNOWN
+ false
+ true
+ true
+ true
+
+
+ boolean
+ false
+ false
+ true
+ true
+ true
+
+
+
+
+ embeddedsw.configuration.isFlash
+ 0
+
+
+ embeddedsw.configuration.isMemoryDevice
+ 0
+
+
+ embeddedsw.configuration.isNonVolatileStorage
+ 0
+
+
+ embeddedsw.configuration.isPrintableDevice
+ 0
+
+
+ com.altera.sopcmodel.avalon.AvalonConnectionPoint$AddressAlignment
+ DYNAMIC
+ false
+ true
+ false
+ true
+
+
+ int
+ 0
+ false
+ true
+ false
+ true
+
+
+ java.math.BigInteger
+ 8
+ true
+ true
+ false
+ true
+
+
+ com.altera.sopcmodel.avalon.EAddrBurstUnits
+ SYMBOLS
+ false
+ true
+ true
+ true
+
+
+ boolean
+ false
+ false
+ true
+ false
+ true
+
+
+ java.lang.String
+ clock_sink
+ false
+ true
+ true
+ true
+
+
+ java.lang.String
+ reset_sink
+ false
+ true
+ true
+ true
+
+
+ int
+ 8
+ false
+ true
+ true
+ true
+
+
+ java.math.BigInteger
+
+ false
+ true
+ false
+ true
+
+
+ com.altera.entityinterfaces.IConnectionPoint
+
+ false
+ true
+ false
+ true
+
+
+ boolean
+ false
+ false
+ true
+ true
+ true
+
+
+ com.altera.sopcmodel.avalon.EAddrBurstUnits
+ SYMBOLS
+ false
+ true
+ true
+ true
+
+
+ boolean
+ false
+ false
+ true
+ false
+ true
+
+
+ java.math.BigInteger
+ 0
+ false
+ true
+ true
+ true
+
+
+ int
+ 0
+ false
+ false
+ true
+ true
+
+
+ boolean
+ false
+ false
+ true
+ false
+ true
+
+
+ boolean
+ false
+ false
+ true
+ false
+ true
+
+
+ boolean
+ false
+ false
+ true
+ false
+ true
+
+
+ boolean
+ false
+ false
+ true
+ false
+ true
+
+
+ boolean
+ false
+ false
+ true
+ false
+ true
+
+
+ boolean
+ false
+ false
+ true
+ true
+ true
+
+
+ int
+ 64
+ false
+ true
+ true
+ true
+
+
+ int
+ 0
+ false
+ false
+ true
+ true
+
+
+ int
+ 1
+ false
+ true
+ false
+ true
+
+
+ boolean
+ false
+ false
+ true
+ false
+ true
+
+
+ int
+ 0
+ false
+ false
+ true
+ true
+
+
+ int
+ 0
+ false
+ true
+ false
+ true
+
+
+ int
+ 0
+ false
+ false
+ true
+ true
+
+
+ boolean
+ false
+ false
+ true
+ false
+ true
+
+
+ boolean
+ false
+ false
+ true
+ false
+ true
+
+
+ int
+ 0
+ false
+ false
+ true
+ true
+
+
+ com.altera.sopcmodel.avalon.TimingUnits
+ Cycles
+ false
+ false
+ true
+ true
+
+
+ boolean
+ false
+ false
+ true
+ false
+ true
+
+
+ boolean
+ false
+ false
+ true
+ false
+ true
+
+
+ int
+ 0
+ false
+ true
+ false
+ true
+
+
+ int
+ 0
+ false
+ true
+ false
+ true
+
+
+ int
+ 0
+ false
+ false
+ true
+ true
+
+
+ java.lang.String
+ UNKNOWN
+ false
+ true
+ true
+ true
+
+
+ boolean
+ false
+ false
+ true
+ true
+ true
+
+ avalon
+ false
+
+ address_i
+ Input
+ 3
+ address
+
+
+ read_i
+ Input
+ 1
+ read
+
+
+ write_i
+ Input
+ 1
+ write
+
+
+ writedata_i
+ Input
+ 8
+ writedata
+
+
+ readdata_o
+ Output
+ 8
+ readdata
+
+
+ waitrequest_o
+ Output
+ 1
+ waitrequest
+
+
+ readdatavalid_o
+ Output
+ 1
+ readdatavalid
+
+
+
+
+
+ boolean
+ false
+ false
+ true
+ false
+ true
+
+
+ java.lang.String
+
+ false
+ true
+ false
+ true
+
+
+ java.lang.String
+ UNKNOWN
+ false
+ true
+ true
+ true
+
+
+ boolean
+ false
+ false
+ true
+ true
+ true
+
+ clock
+ false
+
+ clk_i
+ Input
+ 1
+ clk
+
+
+
+
+
+ java.lang.String
+ clock_sink
+ false
+ true
+ true
+ true
+
+
+ java.lang.String
+ reset_sink
+ false
+ true
+ true
+ true
+
+
+ java.lang.String
+ UNKNOWN
+ false
+ true
+ true
+ true
+
+
+ boolean
+ false
+ false
+ true
+ true
+ true
+
+ conduit
+ false
+
+ usb_clk_i
+ Input
+ 1
+ usb_clk
+
+
+ usb_rxf_n_i
+ Input
+ 1
+ usb_rxf_n
+
+
+ usb_oe_n_o
+ Output
+ 1
+ usb_oe_n
+
+
+ usb_wr_n_o
+ Output
+ 1
+ usb_wr_n
+
+
+ usb_rd_n_o
+ Output
+ 1
+ usb_rd_n
+
+
+ usb_data_io
+ Bidir
+ 8
+ usb_data
+
+
+ usb_txe_n_i
+ Input
+ 1
+ usb_txe_n
+
+
+
+
+
+ java.lang.String
+ clock_sink
+ false
+ true
+ true
+ true
+
+
+ com.altera.sopcmodel.reset.Reset$Edges
+ DEASSERT
+ false
+ true
+ true
+ true
+
+
+ java.lang.String
+ UNKNOWN
+ false
+ true
+ true
+ true
+
+
+ boolean
+ false
+ false
+ true
+ true
+ true
+
+ reset
+ false
+
+ reset_i
+ Input
+ 1
+ reset
+
+
+
+
+ 1
+ usb_ft232h
+ com.altera.entityinterfaces.IElementClass
+ com.altera.entityinterfaces.IModule
+ USB FT232H
+ 1.5
+
+
+ 1
+ avalon_slave
+ com.altera.entityinterfaces.IElementClass
+ com.altera.entityinterfaces.IMutableConnectionPoint
+ Avalon Memory Mapped Slave
+ 16.1
+
+
+ 1
+ clock_sink
+ com.altera.entityinterfaces.IElementClass
+ com.altera.entityinterfaces.IMutableConnectionPoint
+ Clock Input
+ 16.1
+
+
+ 1
+ conduit_end
+ com.altera.entityinterfaces.IElementClass
+ com.altera.entityinterfaces.IMutableConnectionPoint
+ Conduit
+ 16.1
+
+
+ 1
+ reset_sink
+ com.altera.entityinterfaces.IElementClass
+ com.altera.entityinterfaces.IMutableConnectionPoint
+ Reset Input
+ 16.1
+
+ 16.1 203
+
+
trunk/testbench/altera_project/test_usb_ft232h/usb.sopcinfo
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/usb_ft232h.sv
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/usb_ft232h.sv (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/usb_ft232h.sv (revision 6)
@@ -0,0 +1,215 @@
+/*!
+ * \brief UsB FT232H core module
+ * \version 1.8
+ */
+
+
+module usb_ft232h (
+ clk_i,
+ reset_i,
+
+ //Avalon-MM Slave
+ address_i,
+ read_i,
+ readdata_o,
+ readdatavalid_o,
+ write_i,
+ writedata_i,
+ waitrequest_o,
+
+ //FT232H
+ usb_clk_i,
+ usb_data_io,
+ usb_rxf_n_i,
+ usb_txe_n_i,
+ usb_rd_n_o,
+ usb_wr_n_o,
+ usb_oe_n_o
+);
+
+
+parameter TX_FIFO_NUMWORDS = 512;
+parameter TX_FIFO_WIDTHU = 9;
+parameter RX_FIFO_NUMWORDS = 512;
+parameter RX_FIFO_WIDTHU = 9;
+parameter FIFOS_DELAYPIPE = 11;
+
+parameter USB_READ_LATENCY = 1;
+parameter USB_WRITE_LATENCY = 1;
+
+parameter AVALON_CMD_LATENCY = 1;
+parameter AVALON_READ_LATENCY = 1;
+parameter AVALON_WRITE_LATENCY = 1;
+
+
+
+input logic clk_i;
+input logic reset_i;
+input logic [2:0] address_i;
+input logic read_i;
+output logic [7:0] readdata_o;
+output logic readdatavalid_o;
+input logic write_i;
+input logic [7:0] writedata_i;
+output logic waitrequest_o;
+
+input logic usb_clk_i;
+inout wire [7:0] usb_data_io;
+input logic usb_rxf_n_i;
+input logic usb_txe_n_i;
+output logic usb_rd_n_o;
+output logic usb_wr_n_o;
+output logic usb_oe_n_o;
+
+
+
+logic [7:0] txf_wrdata;
+logic txf_wrclk;
+logic txf_wrreq;
+logic txf_wrfull;
+logic [TX_FIFO_WIDTHU-1:0] txf_wrusedw;
+
+logic txf_rdclk;
+logic txf_rdreq;
+logic [7:0] txf_rddata;
+logic txf_rdempty;
+
+logic [7:0] rxf_wrdata;
+logic rxf_wrclk;
+logic rxf_wrreq;
+logic rxf_wrfull;
+
+logic [RX_FIFO_WIDTHU-1:0] rxf_rdusedw;
+logic rxf_rdclk;
+logic rxf_rdreq;
+logic [7:0] rxf_rddata;
+logic rxf_rdempty;
+logic rxf_rdfull;
+
+
+
+
+ft232h_fifos_interface ffi (
+ .reset_i (reset_i),
+ // FT232H
+ .usb_clk_i (usb_clk_i),
+ .usb_data_io (usb_data_io),
+ .usb_rxf_n_i (usb_rxf_n_i),
+ .usb_txe_n_i (usb_txe_n_i),
+ .usb_rd_n_o (usb_rd_n_o),
+ .usb_wr_n_o (usb_wr_n_o),
+ .usb_oe_n_o (usb_oe_n_o),
+ // RX FIFO
+ .rxf_wrclk_o (rxf_wrclk),
+ .rxf_wrfull_i (rxf_wrfull),
+ .rxf_wrreq_o (rxf_wrreq),
+ .rxf_wrdata_o (rxf_wrdata),
+ // TX FIFO
+ .txf_rdclk_o (txf_rdclk),
+ .txf_rdempty_i (txf_rdempty),
+ .txf_rdreq_o (txf_rdreq),
+ .txf_rddata_i (txf_rddata)
+ );
+ defparam
+ ffi.READ_LATENCY = USB_READ_LATENCY,
+ ffi.WRITE_LATENCY = USB_WRITE_LATENCY;
+
+
+
+dcfifo txfifo (
+ .aclr ( reset_i ),
+ .data ( txf_wrdata ),
+ .rdclk ( txf_rdclk ),
+ .rdreq ( txf_rdreq ),
+ .wrclk ( txf_wrclk ),
+ .wrreq ( txf_wrreq ),
+ .q ( txf_rddata ),
+ .rdempty ( txf_rdempty ),
+ .wrfull ( txf_wrfull ),
+ .wrusedw ( txf_wrusedw ),
+ .eccstatus (),
+ .rdfull (),
+ .rdusedw (),
+ .wrempty ());
+ defparam
+ txfifo.intended_device_family = "Cyclone IV E",
+ txfifo.lpm_numwords = TX_FIFO_NUMWORDS,
+ txfifo.lpm_showahead = "OFF",
+ txfifo.lpm_type = "dcfifo",
+ txfifo.lpm_width = 8,
+ txfifo.lpm_widthu = TX_FIFO_WIDTHU,
+ txfifo.overflow_checking = "ON",
+ txfifo.rdsync_delaypipe = FIFOS_DELAYPIPE,
+ txfifo.read_aclr_synch = "ON",
+ txfifo.underflow_checking = "ON",
+ txfifo.use_eab = "ON",
+ txfifo.write_aclr_synch = "ON",
+ txfifo.wrsync_delaypipe = FIFOS_DELAYPIPE;
+
+
+dcfifo rxfifo (
+ .aclr ( reset_i ),
+ .data ( rxf_wrdata ),
+ .rdclk ( rxf_rdclk ),
+ .rdreq ( rxf_rdreq ),
+ .wrclk ( rxf_wrclk ),
+ .wrreq ( rxf_wrreq ),
+ .q ( rxf_rddata ),
+ .rdempty ( rxf_rdempty ),
+ .wrfull ( rxf_wrfull ),
+ .wrusedw (),
+ .eccstatus (),
+ .rdfull ( rxf_rdfull ),
+ .rdusedw ( rxf_rdusedw ),
+ .wrempty ());
+ defparam
+ rxfifo.intended_device_family = "Cyclone IV E",
+ rxfifo.lpm_numwords = RX_FIFO_NUMWORDS,
+ rxfifo.lpm_showahead = "OFF",
+ rxfifo.lpm_type = "dcfifo",
+ rxfifo.lpm_width = 8,
+ rxfifo.lpm_widthu = RX_FIFO_WIDTHU,
+ rxfifo.overflow_checking = "ON",
+ rxfifo.rdsync_delaypipe = FIFOS_DELAYPIPE,
+ rxfifo.read_aclr_synch = "ON",
+ rxfifo.underflow_checking = "ON",
+ rxfifo.use_eab = "ON",
+ rxfifo.write_aclr_synch = "ON",
+ rxfifo.wrsync_delaypipe = FIFOS_DELAYPIPE;
+
+
+
+usb_fifos_avalon_mm_interface ufai (
+ .reset_i (reset_i),
+ .clk_i (clk_i),
+ // Avalon-MM
+ .address_i (address_i),
+ .read_i (read_i),
+ .readdata_o (readdata_o),
+ .readdatavalid_o (readdatavalid_o),
+ .write_i (write_i),
+ .writedata_i (writedata_i),
+ .waitrequest_o (waitrequest_o),
+ // RX FIFO
+ .rxf_rdclk_o (rxf_rdclk),
+ .rxf_rdempty_i (rxf_rdempty),
+ .rxf_rdfull_i (rxf_rdfull),
+ .rxf_rdreq_o (rxf_rdreq),
+ .rxf_rddata_i (rxf_rddata),
+ .rxf_rdusedw_i (rxf_rdusedw),
+ // TX FIFO
+ .txf_wrclk_o (txf_wrclk),
+ .txf_wrfull_i (txf_wrfull),
+ .txf_wrreq_o (txf_wrreq),
+ .txf_wrdata_o (txf_wrdata),
+ .txf_wrusedw_i (txf_wrusedw)
+ );
+ defparam
+ ufai.TX_FIFO_WIDTHU = TX_FIFO_WIDTHU,
+ ufai.RX_FIFO_WIDTHU = RX_FIFO_WIDTHU,
+ ufai.CMD_LATENCY = AVALON_CMD_LATENCY,
+ ufai.READ_LATENCY = AVALON_READ_LATENCY,
+ ufai.WRITE_LATENCY = AVALON_WRITE_LATENCY;
+
+
+endmodule
trunk/testbench/altera_project/test_usb_ft232h/usb_ft232h.sv
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/altera_project/test_usb_ft232h/usb_ft232h_hw.tcl
===================================================================
--- trunk/testbench/altera_project/test_usb_ft232h/usb_ft232h_hw.tcl (nonexistent)
+++ trunk/testbench/altera_project/test_usb_ft232h/usb_ft232h_hw.tcl (revision 6)
@@ -0,0 +1,231 @@
+# TCL File Generated by Component Editor 16.0
+# Thu Apr 06 17:15:58 FET 2017
+# DO NOT MODIFY
+
+
+#
+# usb_ft232h "USB FT232H" v1.8
+# Dmitry Elmanov 2017.04.06.17:15:58
+#
+#
+
+#
+# request TCL package from ACDS 16.0
+#
+package require -exact qsys 16.0
+
+
+#
+# module usb_ft232h
+#
+set_module_property DESCRIPTION ""
+set_module_property NAME usb_ft232h
+set_module_property VERSION 1.8
+set_module_property INTERNAL false
+set_module_property OPAQUE_ADDRESS_MAP true
+set_module_property GROUP USB
+set_module_property AUTHOR "Dmitry Elmanov"
+set_module_property DISPLAY_NAME "USB FT232H"
+set_module_property INSTANTIATE_IN_SYSTEM_MODULE true
+set_module_property EDITABLE true
+set_module_property REPORT_TO_TALKBACK false
+set_module_property ALLOW_GREYBOX_GENERATION false
+set_module_property REPORT_HIERARCHY false
+
+
+#
+# file sets
+#
+add_fileset QUARTUS_SYNTH QUARTUS_SYNTH "" ""
+set_fileset_property QUARTUS_SYNTH TOP_LEVEL usb_ft232h
+set_fileset_property QUARTUS_SYNTH ENABLE_RELATIVE_INCLUDE_PATHS false
+set_fileset_property QUARTUS_SYNTH ENABLE_FILE_OVERWRITE_MODE false
+add_fileset_file usb_ft232h.sv SYSTEM_VERILOG PATH usb_ft232h.sv TOP_LEVEL_FILE
+
+
+#
+# parameters
+#
+add_parameter TX_FIFO_NUMWORDS INTEGER 512 "Size of tx FIFO"
+set_parameter_property TX_FIFO_NUMWORDS DEFAULT_VALUE 512
+set_parameter_property TX_FIFO_NUMWORDS DISPLAY_NAME "Transmit buffer size"
+set_parameter_property TX_FIFO_NUMWORDS TYPE INTEGER
+set_parameter_property TX_FIFO_NUMWORDS UNITS None
+set_parameter_property TX_FIFO_NUMWORDS ALLOWED_RANGES -2147483648:2147483647
+set_parameter_property TX_FIFO_NUMWORDS DESCRIPTION "Size of tx FIFO"
+set_parameter_property TX_FIFO_NUMWORDS HDL_PARAMETER true
+add_parameter TX_FIFO_WIDTHU INTEGER 9
+set_parameter_property TX_FIFO_WIDTHU DEFAULT_VALUE 9
+set_parameter_property TX_FIFO_WIDTHU DISPLAY_NAME "Transmit buffer size width"
+set_parameter_property TX_FIFO_WIDTHU TYPE INTEGER
+set_parameter_property TX_FIFO_WIDTHU UNITS None
+set_parameter_property TX_FIFO_WIDTHU ALLOWED_RANGES -2147483648:2147483647
+set_parameter_property TX_FIFO_WIDTHU HDL_PARAMETER true
+add_parameter RX_FIFO_NUMWORDS INTEGER 512
+set_parameter_property RX_FIFO_NUMWORDS DEFAULT_VALUE 512
+set_parameter_property RX_FIFO_NUMWORDS DISPLAY_NAME "Receive buffer size"
+set_parameter_property RX_FIFO_NUMWORDS TYPE INTEGER
+set_parameter_property RX_FIFO_NUMWORDS UNITS None
+set_parameter_property RX_FIFO_NUMWORDS ALLOWED_RANGES -2147483648:2147483647
+set_parameter_property RX_FIFO_NUMWORDS HDL_PARAMETER true
+add_parameter RX_FIFO_WIDTHU INTEGER 9
+set_parameter_property RX_FIFO_WIDTHU DEFAULT_VALUE 9
+set_parameter_property RX_FIFO_WIDTHU DISPLAY_NAME "Receive buffer size width"
+set_parameter_property RX_FIFO_WIDTHU TYPE INTEGER
+set_parameter_property RX_FIFO_WIDTHU UNITS None
+set_parameter_property RX_FIFO_WIDTHU ALLOWED_RANGES -2147483648:2147483647
+set_parameter_property RX_FIFO_WIDTHU HDL_PARAMETER true
+add_parameter FIFOS_DELAYPIPE INTEGER 11 ""
+set_parameter_property FIFOS_DELAYPIPE DEFAULT_VALUE 11
+set_parameter_property FIFOS_DELAYPIPE DISPLAY_NAME "FIFO's delaypipe"
+set_parameter_property FIFOS_DELAYPIPE WIDTH ""
+set_parameter_property FIFOS_DELAYPIPE TYPE INTEGER
+set_parameter_property FIFOS_DELAYPIPE UNITS None
+set_parameter_property FIFOS_DELAYPIPE ALLOWED_RANGES -2147483648:2147483647
+set_parameter_property FIFOS_DELAYPIPE DESCRIPTION ""
+set_parameter_property FIFOS_DELAYPIPE HDL_PARAMETER true
+add_parameter USB_READ_LATENCY INTEGER 1
+set_parameter_property USB_READ_LATENCY DEFAULT_VALUE 1
+set_parameter_property USB_READ_LATENCY DISPLAY_NAME "USB read delaypipe"
+set_parameter_property USB_READ_LATENCY TYPE INTEGER
+set_parameter_property USB_READ_LATENCY UNITS None
+set_parameter_property USB_READ_LATENCY ALLOWED_RANGES -2147483648:2147483647
+set_parameter_property USB_READ_LATENCY HDL_PARAMETER true
+add_parameter USB_WRITE_LATENCY INTEGER 1
+set_parameter_property USB_WRITE_LATENCY DEFAULT_VALUE 1
+set_parameter_property USB_WRITE_LATENCY DISPLAY_NAME "USB write delaypipe"
+set_parameter_property USB_WRITE_LATENCY TYPE INTEGER
+set_parameter_property USB_WRITE_LATENCY UNITS None
+set_parameter_property USB_WRITE_LATENCY ALLOWED_RANGES -2147483648:2147483647
+set_parameter_property USB_WRITE_LATENCY HDL_PARAMETER true
+add_parameter AVALON_CMD_LATENCY INTEGER 1
+set_parameter_property AVALON_CMD_LATENCY DEFAULT_VALUE 1
+set_parameter_property AVALON_CMD_LATENCY DISPLAY_NAME "Command delaypipe"
+set_parameter_property AVALON_CMD_LATENCY TYPE INTEGER
+set_parameter_property AVALON_CMD_LATENCY UNITS None
+set_parameter_property AVALON_CMD_LATENCY ALLOWED_RANGES -2147483648:2147483647
+set_parameter_property AVALON_CMD_LATENCY HDL_PARAMETER true
+add_parameter AVALON_READ_LATENCY INTEGER 1
+set_parameter_property AVALON_READ_LATENCY DEFAULT_VALUE 1
+set_parameter_property AVALON_READ_LATENCY DISPLAY_NAME "Read data delaypipe"
+set_parameter_property AVALON_READ_LATENCY TYPE INTEGER
+set_parameter_property AVALON_READ_LATENCY UNITS None
+set_parameter_property AVALON_READ_LATENCY ALLOWED_RANGES -2147483648:2147483647
+set_parameter_property AVALON_READ_LATENCY HDL_PARAMETER true
+add_parameter AVALON_WRITE_LATENCY INTEGER 1
+set_parameter_property AVALON_WRITE_LATENCY DEFAULT_VALUE 1
+set_parameter_property AVALON_WRITE_LATENCY DISPLAY_NAME "Write data delaypipe"
+set_parameter_property AVALON_WRITE_LATENCY TYPE INTEGER
+set_parameter_property AVALON_WRITE_LATENCY UNITS None
+set_parameter_property AVALON_WRITE_LATENCY ALLOWED_RANGES -2147483648:2147483647
+set_parameter_property AVALON_WRITE_LATENCY HDL_PARAMETER true
+
+
+#
+# display items
+#
+add_display_item "" FIFO GROUP ""
+add_display_item "" USB GROUP ""
+add_display_item "" "Avalon-MM Slave" GROUP ""
+add_display_item "" "FIFO's" GROUP ""
+add_display_item FIFO TX_FIFO_NUMWORDS PARAMETER ""
+add_display_item FIFO TX_FIFO_WIDTHU PARAMETER ""
+add_display_item FIFO RX_FIFO_NUMWORDS PARAMETER ""
+add_display_item FIFO RX_FIFO_WIDTHU PARAMETER ""
+add_display_item FIFO FIFOS_DELAYPIPE PARAMETER ""
+add_display_item USB USB_READ_LATENCY PARAMETER ""
+add_display_item USB USB_WRITE_LATENCY PARAMETER ""
+add_display_item "Avalon-MM Slave" AVALON_CMD_LATENCY PARAMETER ""
+add_display_item "Avalon-MM Slave" AVALON_READ_LATENCY PARAMETER ""
+add_display_item "Avalon-MM Slave" AVALON_WRITE_LATENCY PARAMETER ""
+
+
+#
+# connection point avalon_slave
+#
+add_interface avalon_slave avalon end
+set_interface_property avalon_slave addressUnits SYMBOLS
+set_interface_property avalon_slave associatedClock clock_sink
+set_interface_property avalon_slave associatedReset reset_sink
+set_interface_property avalon_slave bitsPerSymbol 8
+set_interface_property avalon_slave burstOnBurstBoundariesOnly false
+set_interface_property avalon_slave burstcountUnits SYMBOLS
+set_interface_property avalon_slave explicitAddressSpan 0
+set_interface_property avalon_slave holdTime 0
+set_interface_property avalon_slave linewrapBursts false
+set_interface_property avalon_slave maximumPendingReadTransactions 64
+set_interface_property avalon_slave maximumPendingWriteTransactions 0
+set_interface_property avalon_slave readLatency 0
+set_interface_property avalon_slave readWaitStates 0
+set_interface_property avalon_slave readWaitTime 0
+set_interface_property avalon_slave setupTime 0
+set_interface_property avalon_slave timingUnits Cycles
+set_interface_property avalon_slave writeWaitTime 0
+set_interface_property avalon_slave ENABLED true
+set_interface_property avalon_slave EXPORT_OF ""
+set_interface_property avalon_slave PORT_NAME_MAP ""
+set_interface_property avalon_slave CMSIS_SVD_VARIABLES ""
+set_interface_property avalon_slave SVD_ADDRESS_GROUP ""
+
+add_interface_port avalon_slave address_i address Input 3
+add_interface_port avalon_slave read_i read Input 1
+add_interface_port avalon_slave write_i write Input 1
+add_interface_port avalon_slave writedata_i writedata Input 8
+add_interface_port avalon_slave readdata_o readdata Output 8
+add_interface_port avalon_slave waitrequest_o waitrequest Output 1
+add_interface_port avalon_slave readdatavalid_o readdatavalid Output 1
+set_interface_assignment avalon_slave embeddedsw.configuration.isFlash 0
+set_interface_assignment avalon_slave embeddedsw.configuration.isMemoryDevice 0
+set_interface_assignment avalon_slave embeddedsw.configuration.isNonVolatileStorage 0
+set_interface_assignment avalon_slave embeddedsw.configuration.isPrintableDevice 0
+
+
+#
+# connection point clock_sink
+#
+add_interface clock_sink clock end
+set_interface_property clock_sink clockRate 0
+set_interface_property clock_sink ENABLED true
+set_interface_property clock_sink EXPORT_OF ""
+set_interface_property clock_sink PORT_NAME_MAP ""
+set_interface_property clock_sink CMSIS_SVD_VARIABLES ""
+set_interface_property clock_sink SVD_ADDRESS_GROUP ""
+
+add_interface_port clock_sink clk_i clk Input 1
+
+
+#
+# connection point ft232h
+#
+add_interface ft232h conduit end
+set_interface_property ft232h associatedClock clock_sink
+set_interface_property ft232h associatedReset reset_sink
+set_interface_property ft232h ENABLED true
+set_interface_property ft232h EXPORT_OF ""
+set_interface_property ft232h PORT_NAME_MAP ""
+set_interface_property ft232h CMSIS_SVD_VARIABLES ""
+set_interface_property ft232h SVD_ADDRESS_GROUP ""
+
+add_interface_port ft232h usb_clk_i usb_clk Input 1
+add_interface_port ft232h usb_rxf_n_i usb_rxf_n Input 1
+add_interface_port ft232h usb_oe_n_o usb_oe_n Output 1
+add_interface_port ft232h usb_wr_n_o usb_wr_n Output 1
+add_interface_port ft232h usb_rd_n_o usb_rd_n Output 1
+add_interface_port ft232h usb_data_io usb_data Bidir 8
+add_interface_port ft232h usb_txe_n_i usb_txe_n Input 1
+
+
+#
+# connection point reset_sink
+#
+add_interface reset_sink reset end
+set_interface_property reset_sink associatedClock clock_sink
+set_interface_property reset_sink synchronousEdges DEASSERT
+set_interface_property reset_sink ENABLED true
+set_interface_property reset_sink EXPORT_OF ""
+set_interface_property reset_sink PORT_NAME_MAP ""
+set_interface_property reset_sink CMSIS_SVD_VARIABLES ""
+set_interface_property reset_sink SVD_ADDRESS_GROUP ""
+
+add_interface_port reset_sink reset_i reset Input 1
+
trunk/testbench/altera_project/test_usb_ft232h/usb_ft232h_hw.tcl
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/qt/test_usb_ft232h/WinTypes.h
===================================================================
--- trunk/testbench/qt/test_usb_ft232h/WinTypes.h (nonexistent)
+++ trunk/testbench/qt/test_usb_ft232h/WinTypes.h (revision 6)
@@ -0,0 +1,136 @@
+#ifndef __WINDOWS_TYPES__
+#define __WINDOWS_TYPES__
+
+#define WINAPI
+
+typedef unsigned int DWORD;
+typedef unsigned int ULONG;
+typedef unsigned short USHORT;
+typedef unsigned short SHORT;
+typedef unsigned char UCHAR;
+typedef unsigned short WORD;
+typedef unsigned char BYTE;
+typedef BYTE *LPBYTE;
+typedef unsigned int BOOL;
+typedef unsigned char BOOLEAN;
+typedef unsigned char CHAR;
+typedef BOOL *LPBOOL;
+typedef UCHAR *PUCHAR;
+typedef const char *LPCSTR;
+typedef char *PCHAR;
+typedef void *PVOID;
+typedef void *HANDLE;
+typedef unsigned int LONG;
+typedef int INT;
+typedef unsigned int UINT;
+typedef char *LPSTR;
+typedef char *LPTSTR;
+typedef const char *LPCTSTR;
+typedef DWORD *LPDWORD;
+typedef WORD *LPWORD;
+typedef ULONG *PULONG;
+typedef LONG *LPLONG;
+typedef PVOID LPVOID;
+typedef void VOID;
+typedef unsigned long long int ULONGLONG;
+
+typedef struct _OVERLAPPED {
+ DWORD Internal;
+ DWORD InternalHigh;
+ DWORD Offset;
+ DWORD OffsetHigh;
+ HANDLE hEvent;
+} OVERLAPPED, *LPOVERLAPPED;
+
+typedef struct _SECURITY_ATTRIBUTES {
+ DWORD nLength;
+ LPVOID lpSecurityDescriptor;
+ BOOL bInheritHandle;
+} SECURITY_ATTRIBUTES , *LPSECURITY_ATTRIBUTES;
+
+#include
+// Substitute for HANDLE returned by Windows CreateEvent API.
+// FT_SetEventNotification expects parameter 3 to be the address
+// of one of these structures.
+typedef struct _EVENT_HANDLE
+{
+ pthread_cond_t eCondVar;
+ pthread_mutex_t eMutex;
+ int iVar;
+} EVENT_HANDLE;
+
+typedef struct timeval SYSTEMTIME;
+typedef struct timeval FILETIME;
+#ifndef TRUE
+#define TRUE 1
+#endif
+#ifndef FALSE
+#define FALSE 0
+#endif
+
+//
+// Modem Status Flags
+//
+#define MS_CTS_ON ((DWORD)0x0010)
+#define MS_DSR_ON ((DWORD)0x0020)
+#define MS_RING_ON ((DWORD)0x0040)
+#define MS_RLSD_ON ((DWORD)0x0080)
+
+//
+// Error Flags
+//
+#define CE_RXOVER 0x0001 // Receive Queue overflow
+#define CE_OVERRUN 0x0002 // Receive Overrun Error
+#define CE_RXPARITY 0x0004 // Receive Parity Error
+#define CE_FRAME 0x0008 // Receive Framing error
+#define CE_BREAK 0x0010 // Break Detected
+#define CE_TXFULL 0x0100 // TX Queue is full
+#define CE_PTO 0x0200 // LPTx Timeout
+#define CE_IOE 0x0400 // LPTx I/O Error
+#define CE_DNS 0x0800 // LPTx Device not selected
+#define CE_OOP 0x1000 // LPTx Out-Of-Paper
+#define CE_MODE 0x8000 // Requested mode unsupported
+
+//
+// Events
+//
+#define EV_RXCHAR 0x0001 // Any Character received
+#define EV_RXFLAG 0x0002 // Received certain character
+#define EV_TXEMPTY 0x0004 // Transmit Queue Empty
+#define EV_CTS 0x0008 // CTS changed state
+#define EV_DSR 0x0010 // DSR changed state
+#define EV_RLSD 0x0020 // RLSD changed state
+#define EV_BREAK 0x0040 // BREAK received
+#define EV_ERR 0x0080 // Line status error occurred
+#define EV_RING 0x0100 // Ring signal detected
+#define EV_PERR 0x0200 // Printer error occured
+#define EV_RX80FULL 0x0400 // Receive buffer is 80 percent full
+#define EV_EVENT1 0x0800 // Provider specific event 1
+#define EV_EVENT2 0x1000 // Provider specific event 2
+
+//
+// Escape Functions
+//
+#define SETXOFF 1 // Simulate XOFF received
+#define SETXON 2 // Simulate XON received
+#define SETRTS 3 // Set RTS high
+#define CLRRTS 4 // Set RTS low
+#define SETDTR 5 // Set DTR high
+#define CLRDTR 6 // Set DTR low
+#define RESETDEV 7 // Reset device if possible
+#define SETBREAK 8 // Set the device break line.
+#define CLRBREAK 9 // Clear the device break line.
+
+//
+// PURGE function flags.
+//
+#define PURGE_TXABORT 0x0001 // Kill the pending/current writes to the comm port.
+#define PURGE_RXABORT 0x0002 // Kill the pending/current reads to the comm port.
+#define PURGE_TXCLEAR 0x0004 // Kill the transmit queue if there.
+#define PURGE_RXCLEAR 0x0008 // Kill the typeahead buffer if there.
+
+#ifndef INVALID_HANDLE_VALUE
+#define INVALID_HANDLE_VALUE 0xFFFFFFFF
+#endif
+
+#endif /* __WINDOWS_TYPES__ */
trunk/testbench/qt/test_usb_ft232h/WinTypes.h
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/qt/test_usb_ft232h/ftd2xx.h
===================================================================
--- trunk/testbench/qt/test_usb_ft232h/ftd2xx.h (nonexistent)
+++ trunk/testbench/qt/test_usb_ft232h/ftd2xx.h (revision 6)
@@ -0,0 +1,1446 @@
+/*++
+
+Copyright © 2001-2011 Future Technology Devices International Limited
+
+THIS SOFTWARE IS PROVIDED BY FUTURE TECHNOLOGY DEVICES INTERNATIONAL LIMITED "AS IS"
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
+FUTURE TECHNOLOGY DEVICES INTERNATIONAL LIMITED BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+OF SUBSTITUTE GOODS OR SERVICES LOSS OF USE, DATA, OR PROFITS OR BUSINESS INTERRUPTION)
+HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+FTDI DRIVERS MAY BE USED ONLY IN CONJUNCTION WITH PRODUCTS BASED ON FTDI PARTS.
+
+FTDI DRIVERS MAY BE DISTRIBUTED IN ANY FORM AS LONG AS LICENSE INFORMATION IS NOT MODIFIED.
+
+IF A CUSTOM VENDOR ID AND/OR PRODUCT ID OR DESCRIPTION STRING ARE USED, IT IS THE
+RESPONSIBILITY OF THE PRODUCT MANUFACTURER TO MAINTAIN ANY CHANGES AND SUBSEQUENT WHQL
+RE-CERTIFICATION AS A RESULT OF MAKING THESE CHANGES.
+
+
+Module Name:
+
+ftd2xx.h
+
+Abstract:
+
+Native USB device driver for FTDI FT232x, FT245x, FT2232x and FT4232x devices
+FTD2XX library definitions
+
+Environment:
+
+kernel & user mode
+
+
+--*/
+
+
+#ifndef FTD2XX_H
+#define FTD2XX_H
+
+#ifdef _WIN32
+// Compiling on Windows
+#include
+
+// The following ifdef block is the standard way of creating macros
+// which make exporting from a DLL simpler. All files within this DLL
+// are compiled with the FTD2XX_EXPORTS symbol defined on the command line.
+// This symbol should not be defined on any project that uses this DLL.
+// This way any other project whose source files include this file see
+// FTD2XX_API functions as being imported from a DLL, whereas this DLL
+// sees symbols defined with this macro as being exported.
+
+#ifdef FTD2XX_EXPORTS
+#define FTD2XX_API __declspec(dllexport)
+#elif defined(FTD2XX_STATIC)
+// Avoid decorations when linking statically to D2XX.
+#define FTD2XX_API
+// Static D2XX depends on these Windows libs:
+#pragma comment(lib, "setupapi.lib")
+#pragma comment(lib, "advapi32.lib")
+#pragma comment(lib, "user32.lib")
+#else
+#define FTD2XX_API __declspec(dllimport)
+#endif
+
+#else // _WIN32
+// Compiling on non-Windows platform.
+#include "WinTypes.h"
+// No decorations needed.
+#define FTD2XX_API
+
+#endif // _WIN32
+
+typedef PVOID FT_HANDLE;
+typedef ULONG FT_STATUS;
+
+//
+// Device status
+//
+enum {
+ FT_OK,
+ FT_INVALID_HANDLE,
+ FT_DEVICE_NOT_FOUND,
+ FT_DEVICE_NOT_OPENED,
+ FT_IO_ERROR,
+ FT_INSUFFICIENT_RESOURCES,
+ FT_INVALID_PARAMETER,
+ FT_INVALID_BAUD_RATE,
+
+ FT_DEVICE_NOT_OPENED_FOR_ERASE,
+ FT_DEVICE_NOT_OPENED_FOR_WRITE,
+ FT_FAILED_TO_WRITE_DEVICE,
+ FT_EEPROM_READ_FAILED,
+ FT_EEPROM_WRITE_FAILED,
+ FT_EEPROM_ERASE_FAILED,
+ FT_EEPROM_NOT_PRESENT,
+ FT_EEPROM_NOT_PROGRAMMED,
+ FT_INVALID_ARGS,
+ FT_NOT_SUPPORTED,
+ FT_OTHER_ERROR,
+ FT_DEVICE_LIST_NOT_READY,
+};
+
+
+#define FT_SUCCESS(status) ((status) == FT_OK)
+
+//
+// FT_OpenEx Flags
+//
+
+#define FT_OPEN_BY_SERIAL_NUMBER 1
+#define FT_OPEN_BY_DESCRIPTION 2
+#define FT_OPEN_BY_LOCATION 4
+
+#define FT_OPEN_MASK (FT_OPEN_BY_SERIAL_NUMBER | \
+ FT_OPEN_BY_DESCRIPTION | \
+ FT_OPEN_BY_LOCATION)
+
+//
+// FT_ListDevices Flags (used in conjunction with FT_OpenEx Flags
+//
+
+#define FT_LIST_NUMBER_ONLY 0x80000000
+#define FT_LIST_BY_INDEX 0x40000000
+#define FT_LIST_ALL 0x20000000
+
+#define FT_LIST_MASK (FT_LIST_NUMBER_ONLY|FT_LIST_BY_INDEX|FT_LIST_ALL)
+
+//
+// Baud Rates
+//
+
+#define FT_BAUD_300 300
+#define FT_BAUD_600 600
+#define FT_BAUD_1200 1200
+#define FT_BAUD_2400 2400
+#define FT_BAUD_4800 4800
+#define FT_BAUD_9600 9600
+#define FT_BAUD_14400 14400
+#define FT_BAUD_19200 19200
+#define FT_BAUD_38400 38400
+#define FT_BAUD_57600 57600
+#define FT_BAUD_115200 115200
+#define FT_BAUD_230400 230400
+#define FT_BAUD_460800 460800
+#define FT_BAUD_921600 921600
+
+//
+// Word Lengths
+//
+
+#define FT_BITS_8 (UCHAR) 8
+#define FT_BITS_7 (UCHAR) 7
+
+//
+// Stop Bits
+//
+
+#define FT_STOP_BITS_1 (UCHAR) 0
+#define FT_STOP_BITS_2 (UCHAR) 2
+
+//
+// Parity
+//
+
+#define FT_PARITY_NONE (UCHAR) 0
+#define FT_PARITY_ODD (UCHAR) 1
+#define FT_PARITY_EVEN (UCHAR) 2
+#define FT_PARITY_MARK (UCHAR) 3
+#define FT_PARITY_SPACE (UCHAR) 4
+
+//
+// Flow Control
+//
+
+#define FT_FLOW_NONE 0x0000
+#define FT_FLOW_RTS_CTS 0x0100
+#define FT_FLOW_DTR_DSR 0x0200
+#define FT_FLOW_XON_XOFF 0x0400
+
+//
+// Purge rx and tx buffers
+//
+#define FT_PURGE_RX 1
+#define FT_PURGE_TX 2
+
+//
+// Events
+//
+
+typedef void (*PFT_EVENT_HANDLER)(DWORD,DWORD);
+
+#define FT_EVENT_RXCHAR 1
+#define FT_EVENT_MODEM_STATUS 2
+#define FT_EVENT_LINE_STATUS 4
+
+//
+// Timeouts
+//
+
+#define FT_DEFAULT_RX_TIMEOUT 300
+#define FT_DEFAULT_TX_TIMEOUT 300
+
+//
+// Device types
+//
+
+typedef ULONG FT_DEVICE;
+
+enum {
+ FT_DEVICE_BM,
+ FT_DEVICE_AM,
+ FT_DEVICE_100AX,
+ FT_DEVICE_UNKNOWN,
+ FT_DEVICE_2232C,
+ FT_DEVICE_232R,
+ FT_DEVICE_2232H,
+ FT_DEVICE_4232H,
+ FT_DEVICE_232H,
+ FT_DEVICE_X_SERIES,
+ FT_DEVICE_4222H_0,
+ FT_DEVICE_4222H_1_2,
+ FT_DEVICE_4222H_3,
+ FT_DEVICE_4222_PROG,
+ FT_DEVICE_900,
+ FT_DEVICE_930,
+ FT_DEVICE_UMFTPD3A,
+};
+
+//
+// Bit Modes
+//
+
+#define FT_BITMODE_RESET 0x00
+#define FT_BITMODE_ASYNC_BITBANG 0x01
+#define FT_BITMODE_MPSSE 0x02
+#define FT_BITMODE_SYNC_BITBANG 0x04
+#define FT_BITMODE_MCU_HOST 0x08
+#define FT_BITMODE_FAST_SERIAL 0x10
+#define FT_BITMODE_CBUS_BITBANG 0x20
+#define FT_BITMODE_SYNC_FIFO 0x40
+
+//
+// FT232R CBUS Options EEPROM values
+//
+
+#define FT_232R_CBUS_TXDEN 0x00 // Tx Data Enable
+#define FT_232R_CBUS_PWRON 0x01 // Power On
+#define FT_232R_CBUS_RXLED 0x02 // Rx LED
+#define FT_232R_CBUS_TXLED 0x03 // Tx LED
+#define FT_232R_CBUS_TXRXLED 0x04 // Tx and Rx LED
+#define FT_232R_CBUS_SLEEP 0x05 // Sleep
+#define FT_232R_CBUS_CLK48 0x06 // 48MHz clock
+#define FT_232R_CBUS_CLK24 0x07 // 24MHz clock
+#define FT_232R_CBUS_CLK12 0x08 // 12MHz clock
+#define FT_232R_CBUS_CLK6 0x09 // 6MHz clock
+#define FT_232R_CBUS_IOMODE 0x0A // IO Mode for CBUS bit-bang
+#define FT_232R_CBUS_BITBANG_WR 0x0B // Bit-bang write strobe
+#define FT_232R_CBUS_BITBANG_RD 0x0C // Bit-bang read strobe
+
+//
+// FT232H CBUS Options EEPROM values
+//
+
+#define FT_232H_CBUS_TRISTATE 0x00 // Tristate
+#define FT_232H_CBUS_TXLED 0x01 // Tx LED
+#define FT_232H_CBUS_RXLED 0x02 // Rx LED
+#define FT_232H_CBUS_TXRXLED 0x03 // Tx and Rx LED
+#define FT_232H_CBUS_PWREN 0x04 // Power Enable
+#define FT_232H_CBUS_SLEEP 0x05 // Sleep
+#define FT_232H_CBUS_DRIVE_0 0x06 // Drive pin to logic 0
+#define FT_232H_CBUS_DRIVE_1 0x07 // Drive pin to logic 1
+#define FT_232H_CBUS_IOMODE 0x08 // IO Mode for CBUS bit-bang
+#define FT_232H_CBUS_TXDEN 0x09 // Tx Data Enable
+#define FT_232H_CBUS_CLK30 0x0A // 30MHz clock
+#define FT_232H_CBUS_CLK15 0x0B // 15MHz clock
+#define FT_232H_CBUS_CLK7_5 0x0C // 7.5MHz clock
+
+//
+// FT X Series CBUS Options EEPROM values
+//
+
+#define FT_X_SERIES_CBUS_TRISTATE 0x00 // Tristate
+#define FT_X_SERIES_CBUS_TXLED 0x01 // Tx LED
+#define FT_X_SERIES_CBUS_RXLED 0x02 // Rx LED
+#define FT_X_SERIES_CBUS_TXRXLED 0x03 // Tx and Rx LED
+#define FT_X_SERIES_CBUS_PWREN 0x04 // Power Enable
+#define FT_X_SERIES_CBUS_SLEEP 0x05 // Sleep
+#define FT_X_SERIES_CBUS_DRIVE_0 0x06 // Drive pin to logic 0
+#define FT_X_SERIES_CBUS_DRIVE_1 0x07 // Drive pin to logic 1
+#define FT_X_SERIES_CBUS_IOMODE 0x08 // IO Mode for CBUS bit-bang
+#define FT_X_SERIES_CBUS_TXDEN 0x09 // Tx Data Enable
+#define FT_X_SERIES_CBUS_CLK24 0x0A // 24MHz clock
+#define FT_X_SERIES_CBUS_CLK12 0x0B // 12MHz clock
+#define FT_X_SERIES_CBUS_CLK6 0x0C // 6MHz clock
+#define FT_X_SERIES_CBUS_BCD_CHARGER 0x0D // Battery charger detected
+#define FT_X_SERIES_CBUS_BCD_CHARGER_N 0x0E // Battery charger detected inverted
+#define FT_X_SERIES_CBUS_I2C_TXE 0x0F // I2C Tx empty
+#define FT_X_SERIES_CBUS_I2C_RXF 0x10 // I2C Rx full
+#define FT_X_SERIES_CBUS_VBUS_SENSE 0x11 // Detect VBUS
+#define FT_X_SERIES_CBUS_BITBANG_WR 0x12 // Bit-bang write strobe
+#define FT_X_SERIES_CBUS_BITBANG_RD 0x13 // Bit-bang read strobe
+#define FT_X_SERIES_CBUS_TIMESTAMP 0x14 // Toggle output when a USB SOF token is received
+#define FT_X_SERIES_CBUS_KEEP_AWAKE 0x15 //
+
+
+// Driver types
+#define FT_DRIVER_TYPE_D2XX 0
+#define FT_DRIVER_TYPE_VCP 1
+
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+#ifdef FTD2XX_STATIC
+ FTD2XX_API
+ FT_STATUS WINAPI FT_Initialise(
+ void
+ );
+
+ FTD2XX_API
+ void WINAPI FT_Finalise(
+ void
+ );
+#endif // FTD2XX_STATIC
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_Open(
+ int deviceNumber,
+ FT_HANDLE *pHandle
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_OpenEx(
+ PVOID pArg1,
+ DWORD Flags,
+ FT_HANDLE *pHandle
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_ListDevices(
+ PVOID pArg1,
+ PVOID pArg2,
+ DWORD Flags
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_Close(
+ FT_HANDLE ftHandle
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_Read(
+ FT_HANDLE ftHandle,
+ LPVOID lpBuffer,
+ DWORD dwBytesToRead,
+ LPDWORD lpBytesReturned
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_Write(
+ FT_HANDLE ftHandle,
+ LPVOID lpBuffer,
+ DWORD dwBytesToWrite,
+ LPDWORD lpBytesWritten
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_IoCtl(
+ FT_HANDLE ftHandle,
+ DWORD dwIoControlCode,
+ LPVOID lpInBuf,
+ DWORD nInBufSize,
+ LPVOID lpOutBuf,
+ DWORD nOutBufSize,
+ LPDWORD lpBytesReturned,
+ LPOVERLAPPED lpOverlapped
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_SetBaudRate(
+ FT_HANDLE ftHandle,
+ ULONG BaudRate
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_SetDivisor(
+ FT_HANDLE ftHandle,
+ USHORT Divisor
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_SetDataCharacteristics(
+ FT_HANDLE ftHandle,
+ UCHAR WordLength,
+ UCHAR StopBits,
+ UCHAR Parity
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_SetFlowControl(
+ FT_HANDLE ftHandle,
+ USHORT FlowControl,
+ UCHAR XonChar,
+ UCHAR XoffChar
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_ResetDevice(
+ FT_HANDLE ftHandle
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_SetDtr(
+ FT_HANDLE ftHandle
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_ClrDtr(
+ FT_HANDLE ftHandle
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_SetRts(
+ FT_HANDLE ftHandle
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_ClrRts(
+ FT_HANDLE ftHandle
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_GetModemStatus(
+ FT_HANDLE ftHandle,
+ ULONG *pModemStatus
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_SetChars(
+ FT_HANDLE ftHandle,
+ UCHAR EventChar,
+ UCHAR EventCharEnabled,
+ UCHAR ErrorChar,
+ UCHAR ErrorCharEnabled
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_Purge(
+ FT_HANDLE ftHandle,
+ ULONG Mask
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_SetTimeouts(
+ FT_HANDLE ftHandle,
+ ULONG ReadTimeout,
+ ULONG WriteTimeout
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_GetQueueStatus(
+ FT_HANDLE ftHandle,
+ DWORD *dwRxBytes
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_SetEventNotification(
+ FT_HANDLE ftHandle,
+ DWORD Mask,
+ PVOID Param
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_GetStatus(
+ FT_HANDLE ftHandle,
+ DWORD *dwRxBytes,
+ DWORD *dwTxBytes,
+ DWORD *dwEventDWord
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_SetBreakOn(
+ FT_HANDLE ftHandle
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_SetBreakOff(
+ FT_HANDLE ftHandle
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_SetWaitMask(
+ FT_HANDLE ftHandle,
+ DWORD Mask
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_WaitOnMask(
+ FT_HANDLE ftHandle,
+ DWORD *Mask
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_GetEventStatus(
+ FT_HANDLE ftHandle,
+ DWORD *dwEventDWord
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_ReadEE(
+ FT_HANDLE ftHandle,
+ DWORD dwWordOffset,
+ LPWORD lpwValue
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_WriteEE(
+ FT_HANDLE ftHandle,
+ DWORD dwWordOffset,
+ WORD wValue
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_EraseEE(
+ FT_HANDLE ftHandle
+ );
+
+ //
+ // structure to hold program data for FT_EE_Program, FT_EE_ProgramEx, FT_EE_Read
+ // and FT_EE_ReadEx functions
+ //
+ typedef struct ft_program_data {
+
+ DWORD Signature1; // Header - must be 0x00000000
+ DWORD Signature2; // Header - must be 0xffffffff
+ DWORD Version; // Header - FT_PROGRAM_DATA version
+ // 0 = original
+ // 1 = FT2232 extensions
+ // 2 = FT232R extensions
+ // 3 = FT2232H extensions
+ // 4 = FT4232H extensions
+ // 5 = FT232H extensions
+
+ WORD VendorId; // 0x0403
+ WORD ProductId; // 0x6001
+ char *Manufacturer; // "FTDI"
+ char *ManufacturerId; // "FT"
+ char *Description; // "USB HS Serial Converter"
+ char *SerialNumber; // "FT000001" if fixed, or NULL
+ WORD MaxPower; // 0 < MaxPower <= 500
+ WORD PnP; // 0 = disabled, 1 = enabled
+ WORD SelfPowered; // 0 = bus powered, 1 = self powered
+ WORD RemoteWakeup; // 0 = not capable, 1 = capable
+ //
+ // Rev4 (FT232B) extensions
+ //
+ UCHAR Rev4; // non-zero if Rev4 chip, zero otherwise
+ UCHAR IsoIn; // non-zero if in endpoint is isochronous
+ UCHAR IsoOut; // non-zero if out endpoint is isochronous
+ UCHAR PullDownEnable; // non-zero if pull down enabled
+ UCHAR SerNumEnable; // non-zero if serial number to be used
+ UCHAR USBVersionEnable; // non-zero if chip uses USBVersion
+ WORD USBVersion; // BCD (0x0200 => USB2)
+ //
+ // Rev 5 (FT2232) extensions
+ //
+ UCHAR Rev5; // non-zero if Rev5 chip, zero otherwise
+ UCHAR IsoInA; // non-zero if in endpoint is isochronous
+ UCHAR IsoInB; // non-zero if in endpoint is isochronous
+ UCHAR IsoOutA; // non-zero if out endpoint is isochronous
+ UCHAR IsoOutB; // non-zero if out endpoint is isochronous
+ UCHAR PullDownEnable5; // non-zero if pull down enabled
+ UCHAR SerNumEnable5; // non-zero if serial number to be used
+ UCHAR USBVersionEnable5; // non-zero if chip uses USBVersion
+ WORD USBVersion5; // BCD (0x0200 => USB2)
+ UCHAR AIsHighCurrent; // non-zero if interface is high current
+ UCHAR BIsHighCurrent; // non-zero if interface is high current
+ UCHAR IFAIsFifo; // non-zero if interface is 245 FIFO
+ UCHAR IFAIsFifoTar; // non-zero if interface is 245 FIFO CPU target
+ UCHAR IFAIsFastSer; // non-zero if interface is Fast serial
+ UCHAR AIsVCP; // non-zero if interface is to use VCP drivers
+ UCHAR IFBIsFifo; // non-zero if interface is 245 FIFO
+ UCHAR IFBIsFifoTar; // non-zero if interface is 245 FIFO CPU target
+ UCHAR IFBIsFastSer; // non-zero if interface is Fast serial
+ UCHAR BIsVCP; // non-zero if interface is to use VCP drivers
+ //
+ // Rev 6 (FT232R) extensions
+ //
+ UCHAR UseExtOsc; // Use External Oscillator
+ UCHAR HighDriveIOs; // High Drive I/Os
+ UCHAR EndpointSize; // Endpoint size
+ UCHAR PullDownEnableR; // non-zero if pull down enabled
+ UCHAR SerNumEnableR; // non-zero if serial number to be used
+ UCHAR InvertTXD; // non-zero if invert TXD
+ UCHAR InvertRXD; // non-zero if invert RXD
+ UCHAR InvertRTS; // non-zero if invert RTS
+ UCHAR InvertCTS; // non-zero if invert CTS
+ UCHAR InvertDTR; // non-zero if invert DTR
+ UCHAR InvertDSR; // non-zero if invert DSR
+ UCHAR InvertDCD; // non-zero if invert DCD
+ UCHAR InvertRI; // non-zero if invert RI
+ UCHAR Cbus0; // Cbus Mux control
+ UCHAR Cbus1; // Cbus Mux control
+ UCHAR Cbus2; // Cbus Mux control
+ UCHAR Cbus3; // Cbus Mux control
+ UCHAR Cbus4; // Cbus Mux control
+ UCHAR RIsD2XX; // non-zero if using D2XX driver
+ //
+ // Rev 7 (FT2232H) Extensions
+ //
+ UCHAR PullDownEnable7; // non-zero if pull down enabled
+ UCHAR SerNumEnable7; // non-zero if serial number to be used
+ UCHAR ALSlowSlew; // non-zero if AL pins have slow slew
+ UCHAR ALSchmittInput; // non-zero if AL pins are Schmitt input
+ UCHAR ALDriveCurrent; // valid values are 4mA, 8mA, 12mA, 16mA
+ UCHAR AHSlowSlew; // non-zero if AH pins have slow slew
+ UCHAR AHSchmittInput; // non-zero if AH pins are Schmitt input
+ UCHAR AHDriveCurrent; // valid values are 4mA, 8mA, 12mA, 16mA
+ UCHAR BLSlowSlew; // non-zero if BL pins have slow slew
+ UCHAR BLSchmittInput; // non-zero if BL pins are Schmitt input
+ UCHAR BLDriveCurrent; // valid values are 4mA, 8mA, 12mA, 16mA
+ UCHAR BHSlowSlew; // non-zero if BH pins have slow slew
+ UCHAR BHSchmittInput; // non-zero if BH pins are Schmitt input
+ UCHAR BHDriveCurrent; // valid values are 4mA, 8mA, 12mA, 16mA
+ UCHAR IFAIsFifo7; // non-zero if interface is 245 FIFO
+ UCHAR IFAIsFifoTar7; // non-zero if interface is 245 FIFO CPU target
+ UCHAR IFAIsFastSer7; // non-zero if interface is Fast serial
+ UCHAR AIsVCP7; // non-zero if interface is to use VCP drivers
+ UCHAR IFBIsFifo7; // non-zero if interface is 245 FIFO
+ UCHAR IFBIsFifoTar7; // non-zero if interface is 245 FIFO CPU target
+ UCHAR IFBIsFastSer7; // non-zero if interface is Fast serial
+ UCHAR BIsVCP7; // non-zero if interface is to use VCP drivers
+ UCHAR PowerSaveEnable; // non-zero if using BCBUS7 to save power for self-powered designs
+ //
+ // Rev 8 (FT4232H) Extensions
+ //
+ UCHAR PullDownEnable8; // non-zero if pull down enabled
+ UCHAR SerNumEnable8; // non-zero if serial number to be used
+ UCHAR ASlowSlew; // non-zero if A pins have slow slew
+ UCHAR ASchmittInput; // non-zero if A pins are Schmitt input
+ UCHAR ADriveCurrent; // valid values are 4mA, 8mA, 12mA, 16mA
+ UCHAR BSlowSlew; // non-zero if B pins have slow slew
+ UCHAR BSchmittInput; // non-zero if B pins are Schmitt input
+ UCHAR BDriveCurrent; // valid values are 4mA, 8mA, 12mA, 16mA
+ UCHAR CSlowSlew; // non-zero if C pins have slow slew
+ UCHAR CSchmittInput; // non-zero if C pins are Schmitt input
+ UCHAR CDriveCurrent; // valid values are 4mA, 8mA, 12mA, 16mA
+ UCHAR DSlowSlew; // non-zero if D pins have slow slew
+ UCHAR DSchmittInput; // non-zero if D pins are Schmitt input
+ UCHAR DDriveCurrent; // valid values are 4mA, 8mA, 12mA, 16mA
+ UCHAR ARIIsTXDEN; // non-zero if port A uses RI as RS485 TXDEN
+ UCHAR BRIIsTXDEN; // non-zero if port B uses RI as RS485 TXDEN
+ UCHAR CRIIsTXDEN; // non-zero if port C uses RI as RS485 TXDEN
+ UCHAR DRIIsTXDEN; // non-zero if port D uses RI as RS485 TXDEN
+ UCHAR AIsVCP8; // non-zero if interface is to use VCP drivers
+ UCHAR BIsVCP8; // non-zero if interface is to use VCP drivers
+ UCHAR CIsVCP8; // non-zero if interface is to use VCP drivers
+ UCHAR DIsVCP8; // non-zero if interface is to use VCP drivers
+ //
+ // Rev 9 (FT232H) Extensions
+ //
+ UCHAR PullDownEnableH; // non-zero if pull down enabled
+ UCHAR SerNumEnableH; // non-zero if serial number to be used
+ UCHAR ACSlowSlewH; // non-zero if AC pins have slow slew
+ UCHAR ACSchmittInputH; // non-zero if AC pins are Schmitt input
+ UCHAR ACDriveCurrentH; // valid values are 4mA, 8mA, 12mA, 16mA
+ UCHAR ADSlowSlewH; // non-zero if AD pins have slow slew
+ UCHAR ADSchmittInputH; // non-zero if AD pins are Schmitt input
+ UCHAR ADDriveCurrentH; // valid values are 4mA, 8mA, 12mA, 16mA
+ UCHAR Cbus0H; // Cbus Mux control
+ UCHAR Cbus1H; // Cbus Mux control
+ UCHAR Cbus2H; // Cbus Mux control
+ UCHAR Cbus3H; // Cbus Mux control
+ UCHAR Cbus4H; // Cbus Mux control
+ UCHAR Cbus5H; // Cbus Mux control
+ UCHAR Cbus6H; // Cbus Mux control
+ UCHAR Cbus7H; // Cbus Mux control
+ UCHAR Cbus8H; // Cbus Mux control
+ UCHAR Cbus9H; // Cbus Mux control
+ UCHAR IsFifoH; // non-zero if interface is 245 FIFO
+ UCHAR IsFifoTarH; // non-zero if interface is 245 FIFO CPU target
+ UCHAR IsFastSerH; // non-zero if interface is Fast serial
+ UCHAR IsFT1248H; // non-zero if interface is FT1248
+ UCHAR FT1248CpolH; // FT1248 clock polarity - clock idle high (1) or clock idle low (0)
+ UCHAR FT1248LsbH; // FT1248 data is LSB (1) or MSB (0)
+ UCHAR FT1248FlowControlH; // FT1248 flow control enable
+ UCHAR IsVCPH; // non-zero if interface is to use VCP drivers
+ UCHAR PowerSaveEnableH; // non-zero if using ACBUS7 to save power for self-powered designs
+
+ } FT_PROGRAM_DATA, *PFT_PROGRAM_DATA;
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_EE_Program(
+ FT_HANDLE ftHandle,
+ PFT_PROGRAM_DATA pData
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_EE_ProgramEx(
+ FT_HANDLE ftHandle,
+ PFT_PROGRAM_DATA pData,
+ char *Manufacturer,
+ char *ManufacturerId,
+ char *Description,
+ char *SerialNumber
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_EE_Read(
+ FT_HANDLE ftHandle,
+ PFT_PROGRAM_DATA pData
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_EE_ReadEx(
+ FT_HANDLE ftHandle,
+ PFT_PROGRAM_DATA pData,
+ char *Manufacturer,
+ char *ManufacturerId,
+ char *Description,
+ char *SerialNumber
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_EE_UASize(
+ FT_HANDLE ftHandle,
+ LPDWORD lpdwSize
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_EE_UAWrite(
+ FT_HANDLE ftHandle,
+ PUCHAR pucData,
+ DWORD dwDataLen
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_EE_UARead(
+ FT_HANDLE ftHandle,
+ PUCHAR pucData,
+ DWORD dwDataLen,
+ LPDWORD lpdwBytesRead
+ );
+
+
+ typedef struct ft_eeprom_header {
+ FT_DEVICE deviceType; // FTxxxx device type to be programmed
+ // Device descriptor options
+ WORD VendorId; // 0x0403
+ WORD ProductId; // 0x6001
+ UCHAR SerNumEnable; // non-zero if serial number to be used
+ // Config descriptor options
+ WORD MaxPower; // 0 < MaxPower <= 500
+ UCHAR SelfPowered; // 0 = bus powered, 1 = self powered
+ UCHAR RemoteWakeup; // 0 = not capable, 1 = capable
+ // Hardware options
+ UCHAR PullDownEnable; // non-zero if pull down in suspend enabled
+ } FT_EEPROM_HEADER, *PFT_EEPROM_HEADER;
+
+
+ // FT232B EEPROM structure for use with FT_EEPROM_Read and FT_EEPROM_Program
+ typedef struct ft_eeprom_232b {
+ // Common header
+ FT_EEPROM_HEADER common; // common elements for all device EEPROMs
+ } FT_EEPROM_232B, *PFT_EEPROM_232B;
+
+
+ // FT2232 EEPROM structure for use with FT_EEPROM_Read and FT_EEPROM_Program
+ typedef struct ft_eeprom_2232 {
+ // Common header
+ FT_EEPROM_HEADER common; // common elements for all device EEPROMs
+ // Drive options
+ UCHAR AIsHighCurrent; // non-zero if interface is high current
+ UCHAR BIsHighCurrent; // non-zero if interface is high current
+ // Hardware options
+ UCHAR AIsFifo; // non-zero if interface is 245 FIFO
+ UCHAR AIsFifoTar; // non-zero if interface is 245 FIFO CPU target
+ UCHAR AIsFastSer; // non-zero if interface is Fast serial
+ UCHAR BIsFifo; // non-zero if interface is 245 FIFO
+ UCHAR BIsFifoTar; // non-zero if interface is 245 FIFO CPU target
+ UCHAR BIsFastSer; // non-zero if interface is Fast serial
+ // Driver option
+ UCHAR ADriverType; //
+ UCHAR BDriverType; //
+ } FT_EEPROM_2232, *PFT_EEPROM_2232;
+
+
+ // FT232R EEPROM structure for use with FT_EEPROM_Read and FT_EEPROM_Program
+ typedef struct ft_eeprom_232r {
+ // Common header
+ FT_EEPROM_HEADER common; // common elements for all device EEPROMs
+ // Drive options
+ UCHAR IsHighCurrent; // non-zero if interface is high current
+ // Hardware options
+ UCHAR UseExtOsc; // Use External Oscillator
+ UCHAR InvertTXD; // non-zero if invert TXD
+ UCHAR InvertRXD; // non-zero if invert RXD
+ UCHAR InvertRTS; // non-zero if invert RTS
+ UCHAR InvertCTS; // non-zero if invert CTS
+ UCHAR InvertDTR; // non-zero if invert DTR
+ UCHAR InvertDSR; // non-zero if invert DSR
+ UCHAR InvertDCD; // non-zero if invert DCD
+ UCHAR InvertRI; // non-zero if invert RI
+ UCHAR Cbus0; // Cbus Mux control
+ UCHAR Cbus1; // Cbus Mux control
+ UCHAR Cbus2; // Cbus Mux control
+ UCHAR Cbus3; // Cbus Mux control
+ UCHAR Cbus4; // Cbus Mux control
+ // Driver option
+ UCHAR DriverType; //
+ } FT_EEPROM_232R, *PFT_EEPROM_232R;
+
+
+ // FT2232H EEPROM structure for use with FT_EEPROM_Read and FT_EEPROM_Program
+ typedef struct ft_eeprom_2232h {
+ // Common header
+ FT_EEPROM_HEADER common; // common elements for all device EEPROMs
+ // Drive options
+ UCHAR ALSlowSlew; // non-zero if AL pins have slow slew
+ UCHAR ALSchmittInput; // non-zero if AL pins are Schmitt input
+ UCHAR ALDriveCurrent; // valid values are 4mA, 8mA, 12mA, 16mA
+ UCHAR AHSlowSlew; // non-zero if AH pins have slow slew
+ UCHAR AHSchmittInput; // non-zero if AH pins are Schmitt input
+ UCHAR AHDriveCurrent; // valid values are 4mA, 8mA, 12mA, 16mA
+ UCHAR BLSlowSlew; // non-zero if BL pins have slow slew
+ UCHAR BLSchmittInput; // non-zero if BL pins are Schmitt input
+ UCHAR BLDriveCurrent; // valid values are 4mA, 8mA, 12mA, 16mA
+ UCHAR BHSlowSlew; // non-zero if BH pins have slow slew
+ UCHAR BHSchmittInput; // non-zero if BH pins are Schmitt input
+ UCHAR BHDriveCurrent; // valid values are 4mA, 8mA, 12mA, 16mA
+ // Hardware options
+ UCHAR AIsFifo; // non-zero if interface is 245 FIFO
+ UCHAR AIsFifoTar; // non-zero if interface is 245 FIFO CPU target
+ UCHAR AIsFastSer; // non-zero if interface is Fast serial
+ UCHAR BIsFifo; // non-zero if interface is 245 FIFO
+ UCHAR BIsFifoTar; // non-zero if interface is 245 FIFO CPU target
+ UCHAR BIsFastSer; // non-zero if interface is Fast serial
+ UCHAR PowerSaveEnable; // non-zero if using BCBUS7 to save power for self-powered designs
+ // Driver option
+ UCHAR ADriverType; //
+ UCHAR BDriverType; //
+ } FT_EEPROM_2232H, *PFT_EEPROM_2232H;
+
+
+ // FT4232H EEPROM structure for use with FT_EEPROM_Read and FT_EEPROM_Program
+ typedef struct ft_eeprom_4232h {
+ // Common header
+ FT_EEPROM_HEADER common; // common elements for all device EEPROMs
+ // Drive options
+ UCHAR ASlowSlew; // non-zero if A pins have slow slew
+ UCHAR ASchmittInput; // non-zero if A pins are Schmitt input
+ UCHAR ADriveCurrent; // valid values are 4mA, 8mA, 12mA, 16mA
+ UCHAR BSlowSlew; // non-zero if B pins have slow slew
+ UCHAR BSchmittInput; // non-zero if B pins are Schmitt input
+ UCHAR BDriveCurrent; // valid values are 4mA, 8mA, 12mA, 16mA
+ UCHAR CSlowSlew; // non-zero if C pins have slow slew
+ UCHAR CSchmittInput; // non-zero if C pins are Schmitt input
+ UCHAR CDriveCurrent; // valid values are 4mA, 8mA, 12mA, 16mA
+ UCHAR DSlowSlew; // non-zero if D pins have slow slew
+ UCHAR DSchmittInput; // non-zero if D pins are Schmitt input
+ UCHAR DDriveCurrent; // valid values are 4mA, 8mA, 12mA, 16mA
+ // Hardware options
+ UCHAR ARIIsTXDEN; // non-zero if port A uses RI as RS485 TXDEN
+ UCHAR BRIIsTXDEN; // non-zero if port B uses RI as RS485 TXDEN
+ UCHAR CRIIsTXDEN; // non-zero if port C uses RI as RS485 TXDEN
+ UCHAR DRIIsTXDEN; // non-zero if port D uses RI as RS485 TXDEN
+ // Driver option
+ UCHAR ADriverType; //
+ UCHAR BDriverType; //
+ UCHAR CDriverType; //
+ UCHAR DDriverType; //
+ } FT_EEPROM_4232H, *PFT_EEPROM_4232H;
+
+
+ // FT232H EEPROM structure for use with FT_EEPROM_Read and FT_EEPROM_Program
+ typedef struct ft_eeprom_232h {
+ // Common header
+ FT_EEPROM_HEADER common; // common elements for all device EEPROMs
+ // Drive options
+ UCHAR ACSlowSlew; // non-zero if AC bus pins have slow slew
+ UCHAR ACSchmittInput; // non-zero if AC bus pins are Schmitt input
+ UCHAR ACDriveCurrent; // valid values are 4mA, 8mA, 12mA, 16mA
+ UCHAR ADSlowSlew; // non-zero if AD bus pins have slow slew
+ UCHAR ADSchmittInput; // non-zero if AD bus pins are Schmitt input
+ UCHAR ADDriveCurrent; // valid values are 4mA, 8mA, 12mA, 16mA
+ // CBUS options
+ UCHAR Cbus0; // Cbus Mux control
+ UCHAR Cbus1; // Cbus Mux control
+ UCHAR Cbus2; // Cbus Mux control
+ UCHAR Cbus3; // Cbus Mux control
+ UCHAR Cbus4; // Cbus Mux control
+ UCHAR Cbus5; // Cbus Mux control
+ UCHAR Cbus6; // Cbus Mux control
+ UCHAR Cbus7; // Cbus Mux control
+ UCHAR Cbus8; // Cbus Mux control
+ UCHAR Cbus9; // Cbus Mux control
+ // FT1248 options
+ UCHAR FT1248Cpol; // FT1248 clock polarity - clock idle high (1) or clock idle low (0)
+ UCHAR FT1248Lsb; // FT1248 data is LSB (1) or MSB (0)
+ UCHAR FT1248FlowControl; // FT1248 flow control enable
+ // Hardware options
+ UCHAR IsFifo; // non-zero if interface is 245 FIFO
+ UCHAR IsFifoTar; // non-zero if interface is 245 FIFO CPU target
+ UCHAR IsFastSer; // non-zero if interface is Fast serial
+ UCHAR IsFT1248 ; // non-zero if interface is FT1248
+ UCHAR PowerSaveEnable; //
+ // Driver option
+ UCHAR DriverType; //
+ } FT_EEPROM_232H, *PFT_EEPROM_232H;
+
+
+ // FT X Series EEPROM structure for use with FT_EEPROM_Read and FT_EEPROM_Program
+ typedef struct ft_eeprom_x_series {
+ // Common header
+ FT_EEPROM_HEADER common; // common elements for all device EEPROMs
+ // Drive options
+ UCHAR ACSlowSlew; // non-zero if AC bus pins have slow slew
+ UCHAR ACSchmittInput; // non-zero if AC bus pins are Schmitt input
+ UCHAR ACDriveCurrent; // valid values are 4mA, 8mA, 12mA, 16mA
+ UCHAR ADSlowSlew; // non-zero if AD bus pins have slow slew
+ UCHAR ADSchmittInput; // non-zero if AD bus pins are Schmitt input
+ UCHAR ADDriveCurrent; // valid values are 4mA, 8mA, 12mA, 16mA
+ // CBUS options
+ UCHAR Cbus0; // Cbus Mux control
+ UCHAR Cbus1; // Cbus Mux control
+ UCHAR Cbus2; // Cbus Mux control
+ UCHAR Cbus3; // Cbus Mux control
+ UCHAR Cbus4; // Cbus Mux control
+ UCHAR Cbus5; // Cbus Mux control
+ UCHAR Cbus6; // Cbus Mux control
+ // UART signal options
+ UCHAR InvertTXD; // non-zero if invert TXD
+ UCHAR InvertRXD; // non-zero if invert RXD
+ UCHAR InvertRTS; // non-zero if invert RTS
+ UCHAR InvertCTS; // non-zero if invert CTS
+ UCHAR InvertDTR; // non-zero if invert DTR
+ UCHAR InvertDSR; // non-zero if invert DSR
+ UCHAR InvertDCD; // non-zero if invert DCD
+ UCHAR InvertRI; // non-zero if invert RI
+ // Battery Charge Detect options
+ UCHAR BCDEnable; // Enable Battery Charger Detection
+ UCHAR BCDForceCbusPWREN; // asserts the power enable signal on CBUS when charging port detected
+ UCHAR BCDDisableSleep; // forces the device never to go into sleep mode
+ // I2C options
+ WORD I2CSlaveAddress; // I2C slave device address
+ DWORD I2CDeviceId; // I2C device ID
+ UCHAR I2CDisableSchmitt; // Disable I2C Schmitt trigger
+ // FT1248 options
+ UCHAR FT1248Cpol; // FT1248 clock polarity - clock idle high (1) or clock idle low (0)
+ UCHAR FT1248Lsb; // FT1248 data is LSB (1) or MSB (0)
+ UCHAR FT1248FlowControl; // FT1248 flow control enable
+ // Hardware options
+ UCHAR RS485EchoSuppress; //
+ UCHAR PowerSaveEnable; //
+ // Driver option
+ UCHAR DriverType; //
+ } FT_EEPROM_X_SERIES, *PFT_EEPROM_X_SERIES;
+
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_EEPROM_Read(
+ FT_HANDLE ftHandle,
+ void *eepromData,
+ DWORD eepromDataSize,
+ char *Manufacturer,
+ char *ManufacturerId,
+ char *Description,
+ char *SerialNumber
+ );
+
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_EEPROM_Program(
+ FT_HANDLE ftHandle,
+ void *eepromData,
+ DWORD eepromDataSize,
+ char *Manufacturer,
+ char *ManufacturerId,
+ char *Description,
+ char *SerialNumber
+ );
+
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_SetLatencyTimer(
+ FT_HANDLE ftHandle,
+ UCHAR ucLatency
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_GetLatencyTimer(
+ FT_HANDLE ftHandle,
+ PUCHAR pucLatency
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_SetBitMode(
+ FT_HANDLE ftHandle,
+ UCHAR ucMask,
+ UCHAR ucEnable
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_GetBitMode(
+ FT_HANDLE ftHandle,
+ PUCHAR pucMode
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_SetUSBParameters(
+ FT_HANDLE ftHandle,
+ ULONG ulInTransferSize,
+ ULONG ulOutTransferSize
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_SetDeadmanTimeout(
+ FT_HANDLE ftHandle,
+ ULONG ulDeadmanTimeout
+ );
+
+#ifndef _WIN32
+ // Extra functions for non-Windows platforms to compensate
+ // for lack of .INF file to specify Vendor and Product IDs.
+
+ FTD2XX_API
+ FT_STATUS FT_SetVIDPID(
+ DWORD dwVID,
+ DWORD dwPID
+ );
+
+ FTD2XX_API
+ FT_STATUS FT_GetVIDPID(
+ DWORD * pdwVID,
+ DWORD * pdwPID
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_GetDeviceLocId(
+ FT_HANDLE ftHandle,
+ LPDWORD lpdwLocId
+ );
+#endif // _WIN32
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_GetDeviceInfo(
+ FT_HANDLE ftHandle,
+ FT_DEVICE *lpftDevice,
+ LPDWORD lpdwID,
+ PCHAR SerialNumber,
+ PCHAR Description,
+ LPVOID Dummy
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_StopInTask(
+ FT_HANDLE ftHandle
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_RestartInTask(
+ FT_HANDLE ftHandle
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_SetResetPipeRetryCount(
+ FT_HANDLE ftHandle,
+ DWORD dwCount
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_ResetPort(
+ FT_HANDLE ftHandle
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_CyclePort(
+ FT_HANDLE ftHandle
+ );
+
+
+ //
+ // Win32-type functions
+ //
+
+ FTD2XX_API
+ FT_HANDLE WINAPI FT_W32_CreateFile(
+ LPCTSTR lpszName,
+ DWORD dwAccess,
+ DWORD dwShareMode,
+ LPSECURITY_ATTRIBUTES lpSecurityAttributes,
+ DWORD dwCreate,
+ DWORD dwAttrsAndFlags,
+ HANDLE hTemplate
+ );
+
+ FTD2XX_API
+ BOOL WINAPI FT_W32_CloseHandle(
+ FT_HANDLE ftHandle
+ );
+
+ FTD2XX_API
+ BOOL WINAPI FT_W32_ReadFile(
+ FT_HANDLE ftHandle,
+ LPVOID lpBuffer,
+ DWORD nBufferSize,
+ LPDWORD lpBytesReturned,
+ LPOVERLAPPED lpOverlapped
+ );
+
+ FTD2XX_API
+ BOOL WINAPI FT_W32_WriteFile(
+ FT_HANDLE ftHandle,
+ LPVOID lpBuffer,
+ DWORD nBufferSize,
+ LPDWORD lpBytesWritten,
+ LPOVERLAPPED lpOverlapped
+ );
+
+ FTD2XX_API
+ DWORD WINAPI FT_W32_GetLastError(
+ FT_HANDLE ftHandle
+ );
+
+ FTD2XX_API
+ BOOL WINAPI FT_W32_GetOverlappedResult(
+ FT_HANDLE ftHandle,
+ LPOVERLAPPED lpOverlapped,
+ LPDWORD lpdwBytesTransferred,
+ BOOL bWait
+ );
+
+ FTD2XX_API
+ BOOL WINAPI FT_W32_CancelIo(
+ FT_HANDLE ftHandle
+ );
+
+
+ //
+ // Win32 COMM API type functions
+ //
+ typedef struct _FTCOMSTAT {
+ DWORD fCtsHold : 1;
+ DWORD fDsrHold : 1;
+ DWORD fRlsdHold : 1;
+ DWORD fXoffHold : 1;
+ DWORD fXoffSent : 1;
+ DWORD fEof : 1;
+ DWORD fTxim : 1;
+ DWORD fReserved : 25;
+ DWORD cbInQue;
+ DWORD cbOutQue;
+ } FTCOMSTAT, *LPFTCOMSTAT;
+
+ typedef struct _FTDCB {
+ DWORD DCBlength; /* sizeof(FTDCB) */
+ DWORD BaudRate; /* Baudrate at which running */
+ DWORD fBinary: 1; /* Binary Mode (skip EOF check) */
+ DWORD fParity: 1; /* Enable parity checking */
+ DWORD fOutxCtsFlow:1; /* CTS handshaking on output */
+ DWORD fOutxDsrFlow:1; /* DSR handshaking on output */
+ DWORD fDtrControl:2; /* DTR Flow control */
+ DWORD fDsrSensitivity:1; /* DSR Sensitivity */
+ DWORD fTXContinueOnXoff: 1; /* Continue TX when Xoff sent */
+ DWORD fOutX: 1; /* Enable output X-ON/X-OFF */
+ DWORD fInX: 1; /* Enable input X-ON/X-OFF */
+ DWORD fErrorChar: 1; /* Enable Err Replacement */
+ DWORD fNull: 1; /* Enable Null stripping */
+ DWORD fRtsControl:2; /* Rts Flow control */
+ DWORD fAbortOnError:1; /* Abort all reads and writes on Error */
+ DWORD fDummy2:17; /* Reserved */
+ WORD wReserved; /* Not currently used */
+ WORD XonLim; /* Transmit X-ON threshold */
+ WORD XoffLim; /* Transmit X-OFF threshold */
+ BYTE ByteSize; /* Number of bits/byte, 4-8 */
+ BYTE Parity; /* 0-4=None,Odd,Even,Mark,Space */
+ BYTE StopBits; /* FT_STOP_BITS_1 or FT_STOP_BITS_2 */
+ char XonChar; /* Tx and Rx X-ON character */
+ char XoffChar; /* Tx and Rx X-OFF character */
+ char ErrorChar; /* Error replacement char */
+ char EofChar; /* End of Input character */
+ char EvtChar; /* Received Event character */
+ WORD wReserved1; /* Fill for now. */
+ } FTDCB, *LPFTDCB;
+
+ typedef struct _FTTIMEOUTS {
+ DWORD ReadIntervalTimeout; /* Maximum time between read chars. */
+ DWORD ReadTotalTimeoutMultiplier; /* Multiplier of characters. */
+ DWORD ReadTotalTimeoutConstant; /* Constant in milliseconds. */
+ DWORD WriteTotalTimeoutMultiplier; /* Multiplier of characters. */
+ DWORD WriteTotalTimeoutConstant; /* Constant in milliseconds. */
+ } FTTIMEOUTS,*LPFTTIMEOUTS;
+
+
+ FTD2XX_API
+ BOOL WINAPI FT_W32_ClearCommBreak(
+ FT_HANDLE ftHandle
+ );
+
+ FTD2XX_API
+ BOOL WINAPI FT_W32_ClearCommError(
+ FT_HANDLE ftHandle,
+ LPDWORD lpdwErrors,
+ LPFTCOMSTAT lpftComstat
+ );
+
+ FTD2XX_API
+ BOOL WINAPI FT_W32_EscapeCommFunction(
+ FT_HANDLE ftHandle,
+ DWORD dwFunc
+ );
+
+ FTD2XX_API
+ BOOL WINAPI FT_W32_GetCommModemStatus(
+ FT_HANDLE ftHandle,
+ LPDWORD lpdwModemStatus
+ );
+
+ FTD2XX_API
+ BOOL WINAPI FT_W32_GetCommState(
+ FT_HANDLE ftHandle,
+ LPFTDCB lpftDcb
+ );
+
+ FTD2XX_API
+ BOOL WINAPI FT_W32_GetCommTimeouts(
+ FT_HANDLE ftHandle,
+ FTTIMEOUTS *pTimeouts
+ );
+
+ FTD2XX_API
+ BOOL WINAPI FT_W32_PurgeComm(
+ FT_HANDLE ftHandle,
+ DWORD dwMask
+ );
+
+ FTD2XX_API
+ BOOL WINAPI FT_W32_SetCommBreak(
+ FT_HANDLE ftHandle
+ );
+
+ FTD2XX_API
+ BOOL WINAPI FT_W32_SetCommMask(
+ FT_HANDLE ftHandle,
+ ULONG ulEventMask
+ );
+
+ FTD2XX_API
+ BOOL WINAPI FT_W32_GetCommMask(
+ FT_HANDLE ftHandle,
+ LPDWORD lpdwEventMask
+ );
+
+ FTD2XX_API
+ BOOL WINAPI FT_W32_SetCommState(
+ FT_HANDLE ftHandle,
+ LPFTDCB lpftDcb
+ );
+
+ FTD2XX_API
+ BOOL WINAPI FT_W32_SetCommTimeouts(
+ FT_HANDLE ftHandle,
+ FTTIMEOUTS *pTimeouts
+ );
+
+ FTD2XX_API
+ BOOL WINAPI FT_W32_SetupComm(
+ FT_HANDLE ftHandle,
+ DWORD dwReadBufferSize,
+ DWORD dwWriteBufferSize
+ );
+
+ FTD2XX_API
+ BOOL WINAPI FT_W32_WaitCommEvent(
+ FT_HANDLE ftHandle,
+ PULONG pulEvent,
+ LPOVERLAPPED lpOverlapped
+ );
+
+
+ //
+ // Device information
+ //
+
+ typedef struct _ft_device_list_info_node {
+ ULONG Flags;
+ ULONG Type;
+ ULONG ID;
+ DWORD LocId;
+ char SerialNumber[16];
+ char Description[64];
+ FT_HANDLE ftHandle;
+ } FT_DEVICE_LIST_INFO_NODE;
+
+ // Device information flags
+ enum {
+ FT_FLAGS_OPENED = 1,
+ FT_FLAGS_HISPEED = 2
+ };
+
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_CreateDeviceInfoList(
+ LPDWORD lpdwNumDevs
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_GetDeviceInfoList(
+ FT_DEVICE_LIST_INFO_NODE *pDest,
+ LPDWORD lpdwNumDevs
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_GetDeviceInfoDetail(
+ DWORD dwIndex,
+ LPDWORD lpdwFlags,
+ LPDWORD lpdwType,
+ LPDWORD lpdwID,
+ LPDWORD lpdwLocId,
+ LPVOID lpSerialNumber,
+ LPVOID lpDescription,
+ FT_HANDLE *pftHandle
+ );
+
+
+ //
+ // Version information
+ //
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_GetDriverVersion(
+ FT_HANDLE ftHandle,
+ LPDWORD lpdwVersion
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_GetLibraryVersion(
+ LPDWORD lpdwVersion
+ );
+
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_Rescan(
+ void
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_Reload(
+ WORD wVid,
+ WORD wPid
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_GetComPortNumber(
+ FT_HANDLE ftHandle,
+ LPLONG lpdwComPortNumber
+ );
+
+
+ //
+ // FT232H additional EEPROM functions
+ //
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_EE_ReadConfig(
+ FT_HANDLE ftHandle,
+ UCHAR ucAddress,
+ PUCHAR pucValue
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_EE_WriteConfig(
+ FT_HANDLE ftHandle,
+ UCHAR ucAddress,
+ UCHAR ucValue
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_EE_ReadECC(
+ FT_HANDLE ftHandle,
+ UCHAR ucOption,
+ LPWORD lpwValue
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_GetQueueStatusEx(
+ FT_HANDLE ftHandle,
+ DWORD *dwRxBytes
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_ComPortIdle(
+ FT_HANDLE ftHandle
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_ComPortCancelIdle(
+ FT_HANDLE ftHandle
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_VendorCmdGet(
+ FT_HANDLE ftHandle,
+ UCHAR Request,
+ UCHAR *Buf,
+ USHORT Len
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_VendorCmdSet(
+ FT_HANDLE ftHandle,
+ UCHAR Request,
+ UCHAR *Buf,
+ USHORT Len
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_VendorCmdGetEx(
+ FT_HANDLE ftHandle,
+ USHORT wValue,
+ UCHAR *Buf,
+ USHORT Len
+ );
+
+ FTD2XX_API
+ FT_STATUS WINAPI FT_VendorCmdSetEx(
+ FT_HANDLE ftHandle,
+ USHORT wValue,
+ UCHAR *Buf,
+ USHORT Len
+ );
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* FTD2XX_H */
+
trunk/testbench/qt/test_usb_ft232h/ftd2xx.h
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## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/qt/test_usb_ft232h/libs/win32/x64/ftd2xx.lib
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Index: trunk/testbench/qt/test_usb_ft232h/libs/win32/x64/ftd2xx.lib
===================================================================
--- trunk/testbench/qt/test_usb_ft232h/libs/win32/x64/ftd2xx.lib (nonexistent)
+++ trunk/testbench/qt/test_usb_ft232h/libs/win32/x64/ftd2xx.lib (revision 6)
trunk/testbench/qt/test_usb_ft232h/libs/win32/x64/ftd2xx.lib
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: trunk/testbench/qt/test_usb_ft232h/libs/win32/x86/ftd2xx.lib
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Index: trunk/testbench/qt/test_usb_ft232h/libs/win32/x86/ftd2xx.lib
===================================================================
--- trunk/testbench/qt/test_usb_ft232h/libs/win32/x86/ftd2xx.lib (nonexistent)
+++ trunk/testbench/qt/test_usb_ft232h/libs/win32/x86/ftd2xx.lib (revision 6)
trunk/testbench/qt/test_usb_ft232h/libs/win32/x86/ftd2xx.lib
Property changes :
Added: svn:executable
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+*
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Added: svn:mime-type
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+application/octet-stream
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Index: trunk/testbench/qt/test_usb_ft232h/main.cpp
===================================================================
--- trunk/testbench/qt/test_usb_ft232h/main.cpp (nonexistent)
+++ trunk/testbench/qt/test_usb_ft232h/main.cpp (revision 6)
@@ -0,0 +1,424 @@
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "ftd2xx.h"
+
+
+using namespace std;
+
+
+const int DEV_TYPE = 8;
+const int DEV_VID = 0x0403;
+const int DEV_PID = 0x75D8;
+const int DEV_ID = (DEV_VID << 16) | DEV_PID;
+
+const int BUFFER_SIZE = 524288;
+const int MAX_TRANSACTION_SIZE = 65536 * 2;
+
+
+enum TestMode {
+ TM_READ = 1,
+ TM_ECHO
+};
+
+
+FT_HANDLE ftHandle = 0;
+FT_STATUS ftStatus = 0;
+
+vector devList;
+
+uint8_t rxBuffer[BUFFER_SIZE] = {0};
+uint8_t txBuffer[BUFFER_SIZE] = {0};
+int txBufferHead = 0;
+int rxBufferTail = 0;
+
+DWORD readedBytesCount = 0;
+DWORD writtenBytesCount = 0;
+DWORD lastPortionSize = 0;
+int errorsCount = 0;
+
+DWORD targetSize = 524288 * 100;//262144;//524288;
+int iterationCount = 5;
+
+//DWORD startTime = 0, currentTime = 0, prevTime = 0;
+double maxSpeed = 0, avgSpeed = 0, currentSpeed = 0;
+double minSpeed = std::numeric_limits::max();
+
+chrono::steady_clock::time_point timeBegin, timeCurrent, timePrev;
+
+
+vector errorsVector;
+
+
+
+inline
+void findDevice()
+{
+#ifdef linux
+ ftStatus = FT_SetVIDPID(0x0403, 0x75d8);
+#endif
+ DWORD devCount = 0;
+ devList.clear();
+ ftStatus = FT_CreateDeviceInfoList(&devCount);
+ if (!devCount)
+ return;
+ FT_DEVICE_LIST_INFO_NODE *ftDevInfo =
+ (FT_DEVICE_LIST_INFO_NODE*)malloc(sizeof(FT_DEVICE_LIST_INFO_NODE)*devCount);
+ FT_GetDeviceInfoList(ftDevInfo, &devCount);
+ for (uint32_t i = 0; i < devCount; ++i) {
+ if (ftDevInfo[i].ID == DEV_ID) {
+ devList.push_back(i);
+ cout << "Dev flags: " << ftDevInfo[i].Flags << endl;
+ }
+ }
+ free(ftDevInfo);
+}
+
+inline
+bool openDevice(int index)
+{
+ ftStatus = FT_Open(index, &ftHandle);
+ if (!FT_SUCCESS(ftStatus)) {
+ cout << "Unable to open USB device. " << ftStatus << endl;
+ return false;
+ }
+ if (ftHandle == NULL) {
+ cout << "No device found" << endl;
+ return false;
+ }
+ //configure
+ uint8_t mask=0xff, mode=0x0, latency=2;
+ mode = 0x0; //reset mode
+ ftStatus = FT_SetBitMode(ftHandle, mask, mode);
+ usleep(1000000);
+ mode = 0x40;
+ ftStatus = FT_SetBitMode(ftHandle, mask, mode);
+ if (!FT_SUCCESS(ftStatus)) {
+ cout << "Set bit mode failed. " << ftStatus << endl;
+ return false;
+ }
+ FT_SetLatencyTimer(ftHandle, latency);
+ FT_SetUSBParameters(ftHandle, 0x10000, 0x10000);
+ FT_SetFlowControl(ftHandle, FT_FLOW_RTS_CTS, 0x0, 0x0);
+ FT_Purge(ftHandle, FT_PURGE_RX | FT_PURGE_TX);
+ return true;
+}
+
+inline
+void closeDevice()
+{
+ FT_Close(ftHandle);
+}
+
+
+inline
+DWORD availableData()
+{
+ DWORD queue;
+ ftStatus = FT_GetQueueStatus(ftHandle, &queue);
+ if (!FT_SUCCESS(ftStatus)) {
+ cout << "Get available data failed. " << ftStatus << endl;
+ return 0;
+ }
+ return queue;
+}
+
+inline
+bool readData(void *buffer, DWORD size, DWORD &bytesReaded)
+{
+ ftStatus = FT_Read(ftHandle, buffer, size, &bytesReaded);
+ if (!FT_SUCCESS(ftStatus)) {
+ cout << "Read data failed. " << ftStatus << endl;
+ return false;
+ }
+ return true;
+}
+
+inline
+bool writeData(void *data, DWORD size, DWORD &bytesWritten)
+{
+ ftStatus = FT_Write(ftHandle, data, size, &bytesWritten);
+ if (!FT_SUCCESS(ftStatus)) {
+ cout << "Write data failed. " << ftStatus << endl;
+ return false;
+ }
+ return true;
+}
+
+
+void calcSpeed(bool force = false)
+{
+ timeCurrent = chrono::steady_clock::now();
+ double time = chrono::duration_cast(timeCurrent - timePrev).count();
+ if (( time >= 500 ) || force) {
+ double dataSize = lastPortionSize * 1.0 / 1000;
+ time /= 1000;
+ currentSpeed = dataSize / time;
+ dataSize = (readedBytesCount + writtenBytesCount) * 1.0 / 1000;
+ time = chrono::duration_cast(timeCurrent - timeBegin).count();
+ time /= 1000;
+ avgSpeed = dataSize / time;
+ if (currentSpeed > maxSpeed)
+ maxSpeed = currentSpeed;
+ if (currentSpeed < minSpeed)
+ minSpeed = currentSpeed;
+ timePrev = timeCurrent;
+ lastPortionSize = 0;
+
+ cout << "Time: " << floor(time) << " Size(w/r): " << fixed << setprecision(3)
+ << writtenBytesCount * 1.0 / 1000 << "/"
+ << readedBytesCount * 1.0 / 1000 << defaultfloat
+ << " kB \tRate (min/max/avg/current): " << int(floor(minSpeed)) << "/"
+ << int(floor(maxSpeed)) << "/" << int(floor(avgSpeed)) << "/"
+ << int(floor(currentSpeed)) << " kB/s \tErrors: " << errorsCount << endl;
+ flush(cout);
+ }
+}
+
+inline
+void checkData(int offset, int size)
+{
+ for (int i = offset; (i < BUFFER_SIZE) && (i < offset + size); ++i) {
+ if (rxBuffer[i] != txBuffer[i]) {
+ if (errorsCount == 0) {
+ int pi = i - 1;
+ if (pi < 0)
+ pi = targetSize - 1;
+ while (pi > BUFFER_SIZE) {
+ pi -= BUFFER_SIZE;
+ }
+ int ni = i + 1;
+ if (ni >= BUFFER_SIZE)
+ ni = 0;
+
+ cout << i << " " << int(txBuffer[i]) << " - " << int(rxBuffer[i])
+ << " \t" << pi << " " << int(txBuffer[pi]) << " - "
+ << int(rxBuffer[pi]) << " \t" << ni << " "
+ << int(txBuffer[ni]) << " I: ";
+
+ /*for (int j = 0; (j < targetSize) && (j < BUFFER_SIZE); ++j) {
+ if (txBuffer[j] == rxBuffer[i]) {
+// cout << j << " ";
+ auto fit = find(begin(errorsVector), end(errorsVector), j);
+ if ( fit != errorsVector.end()) {
+ cout << j << " ";
+ }
+ }
+ }*/
+ cout << endl;
+ }
+ ++errorsCount;
+ }
+ }
+}
+
+
+inline
+void readMode()
+{
+ DWORD available = 0;
+ DWORD bytesRead = 0;
+ uint8_t value = 0;
+
+ readedBytesCount = 0;
+ writtenBytesCount = 0;
+ lastPortionSize = 0;
+ txBufferHead = 0;
+ rxBufferTail = 0;
+ errorsCount = 0;
+ maxSpeed = 0;
+ minSpeed = std::numeric_limits::max();
+ avgSpeed = 0;
+ currentSpeed = 0;
+
+ txBuffer[0] = TM_READ;
+ if (!writeData(txBuffer, 1, bytesRead)) {
+ return;
+ }
+ timePrev = timeCurrent = timeBegin = chrono::steady_clock::now();
+ while (true) {
+ available = availableData();
+ if (!available)
+ continue;
+ if (available > BUFFER_SIZE)
+ available = BUFFER_SIZE;
+ if (!readData(rxBuffer, available, bytesRead)) {
+ return;
+ }
+ if (!bytesRead)
+ continue;
+ if (!readedBytesCount) {
+ value = rxBuffer[0];
+ }
+ for (DWORD i = 0; i < bytesRead; ++i) {
+ if (value != rxBuffer[i]) {
+ ++errorsCount;
+ value = rxBuffer[i];
+ }
+ ++value &= 0xFF;
+ }
+ readedBytesCount += bytesRead;
+ lastPortionSize += bytesRead;
+
+ calcSpeed();
+ }
+}
+
+inline
+void echoMode()
+{
+ DWORD available = 0;
+ DWORD bytesRead = 0;
+ DWORD bytesWrite = 0;
+ DWORD writeSize = 0;
+
+ readedBytesCount = 0;
+ writtenBytesCount = 0;
+ lastPortionSize = 0;
+ txBufferHead = 0;
+ rxBufferTail = 0;
+ errorsCount = 0;
+ maxSpeed = 0;
+ minSpeed = std::numeric_limits::max();
+ avgSpeed = 0;
+ currentSpeed = 0;
+
+ uint8_t mode = TM_ECHO;
+ /*if (!writeData(&mode, 1, bytesRead)) {
+ return;
+ }
+ if (!writeData(&targetSize, 4, bytesRead)) {
+ return;
+ }*/
+
+// prevTime = currentTime = startTime = GetTickCount();
+ timePrev = timeCurrent = timeBegin = chrono::steady_clock::now();
+
+ cout << "Start loop" << endl;
+ while ((writtenBytesCount < targetSize) || (readedBytesCount < targetSize)) {
+ // send
+ if ((writtenBytesCount < targetSize)
+ && ((writtenBytesCount - readedBytesCount) < MAX_TRANSACTION_SIZE)) {
+ writeSize = BUFFER_SIZE - txBufferHead;
+ if (writeSize > (targetSize - writtenBytesCount))
+ writeSize = targetSize - writtenBytesCount;
+ if (writeSize > MAX_TRANSACTION_SIZE)
+ writeSize = MAX_TRANSACTION_SIZE;
+ if (!writeData(&txBuffer[txBufferHead], writeSize, bytesWrite)) {
+ return;
+ }
+// cout << "write " << txBufferHead << " " << int(txBuffer[txBufferHead])
+// << " " << bytesWrite << endl;
+ writtenBytesCount += bytesWrite;
+ lastPortionSize += bytesWrite;
+ txBufferHead += bytesWrite;
+ if (txBufferHead == BUFFER_SIZE) {
+ txBufferHead = 0;
+ }
+ else if (txBufferHead > BUFFER_SIZE) {
+ cout << "Tx buffer range error" << endl;
+ return;
+ }
+ }
+
+ // read
+ available = availableData();
+ if ((readedBytesCount < targetSize) && available) {
+ if (available > (BUFFER_SIZE - rxBufferTail))
+ available = BUFFER_SIZE - rxBufferTail;
+ if (available > (targetSize - readedBytesCount)) {
+ cout << "More data then need " << available << "/"
+ << targetSize - readedBytesCount << endl;
+ available = targetSize - readedBytesCount;
+ }
+ if (!readData(&rxBuffer[rxBufferTail], available, bytesRead)) {
+ return;
+ }
+// cout << "read " << rxBufferTail << " " << bytesRead
+// << " " << rxBufferTail + bytesRead << endl;
+ readedBytesCount += bytesRead;
+ lastPortionSize += bytesRead;
+ checkData(rxBufferTail, bytesRead);
+ rxBufferTail += bytesRead;
+ if (rxBufferTail == BUFFER_SIZE) {
+ rxBufferTail = 0;
+ }
+ else if (rxBufferTail > BUFFER_SIZE) {
+ cout << "Rx buffer range error" << endl;
+ return;
+ }
+ }
+
+ calcSpeed();
+ }
+ calcSpeed(true);
+ cout << endl << availableData() << endl;
+}
+
+
+int main(int argc, char *argv[])
+{
+ cout << "Hello World!" << endl;
+
+ for (int i = 0; i < BUFFER_SIZE; ++i) {
+ txBuffer[i] = rand() & 0xFF;
+ if (txBuffer[i] == 94) {
+ errorsVector.push_back(i);
+ --i;
+ }
+ }
+
+ findDevice();
+ cout << devList.size() << " devices found" << endl;
+ if (!devList.size())
+ return 0;
+ DWORD index;
+ cout << "Put device index (from 0 to devices count): ";
+ cin >> index;
+ cout << endl;
+ if (index >= devList.size()) {
+ cout << "You fool!" << endl;
+ return 0;
+ }
+ cout << "Open device " << index << " ... ";
+ if (!openDevice(index)) {
+ cout << "[FAIL]" << endl;
+ return 0;
+ }
+ cout << "[ OK ]" << endl;
+
+ cout << "Select mode:\n\t" << TM_READ << " - read\n\t"
+ << TM_ECHO << " - echo\n\t* - exit" << endl;
+ cout<< "Enter your choice: ";
+ cin >> index;
+ cout << endl;
+ switch (index) {
+ case TM_READ:
+ cout << "Start read mode" << endl;
+ readMode();
+ break;
+ case TM_ECHO:
+ cout << "Start echo mode" << endl;
+ while (iterationCount-- && (errorsCount == 0)) {
+ echoMode();
+// cout << "Data:" << endl;
+// for (int i = 0; i < targetSize; ++i) {
+// cout << int(txBuffer[i]) << " = " << int(rxBuffer[i]) << endl;
+// }
+// ++targetSize;
+ }
+ break;
+ default:
+ break;
+ }
+
+ closeDevice();
+ cout << "Finish" << endl;
+ return 0;
+}
trunk/testbench/qt/test_usb_ft232h/main.cpp
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/testbench/qt/test_usb_ft232h/test_usb_ft232h.pro
===================================================================
--- trunk/testbench/qt/test_usb_ft232h/test_usb_ft232h.pro (nonexistent)
+++ trunk/testbench/qt/test_usb_ft232h/test_usb_ft232h.pro (revision 6)
@@ -0,0 +1,26 @@
+TEMPLATE = app
+CONFIG += console c++11
+CONFIG -= app_bundle
+CONFIG -= qt
+
+SOURCES += main.cpp
+
+
+win32 {
+ contains(QT_ARCH, i386) {
+ LIBS += -L$$PWD/libs/win32/x86/ -lftd2xx
+ }
+ else {
+ LIBS += -L$$PWD/libs/win32/x64/ -lftd2xx
+ }
+}
+
+linux {
+ contains(QT_ARCH, i386) {
+ LIBS += -L$$PWD/libs/linux/x86/ -lftd2xx
+ }
+ else {
+ LIBS += -L$$PWD/libs/linux/x64/ -lftd2xx
+ }
+ LIBS += -ldl -lpthread
+}
