URL
https://opencores.org/ocsvn/versatile_io/versatile_io/trunk
Subversion Repositories versatile_io
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- This comparison shows the changes necessary to convert path
/versatile_io
- from Rev 12 to Rev 13
- ↔ Reverse comparison
Rev 12 → Rev 13
/trunk/rtl/verilog/versatile_io.v
1450,6 → 1450,8
end |
endfunction |
|
wire [31:0] uart0_dat_o; |
|
`ifdef UART0 |
wire uart0_cs; |
assign uart0_cs = wbs_adr_i[uart0_mem_map_hi:uart0_mem_map_lo] == uart0_base_adr[uart0_mem_map_hi:uart0_mem_map_lo]; |
1462,7 → 1464,7
.int_o(uart0_irq), // interrupt request |
// UART signals |
// serial input/output |
.stx_pad_o(uart0_tx_pad_i), .srx_pad_i(uart0_rx_pad_i), |
.stx_pad_o(uart0_tx_pad_o), .srx_pad_i(uart0_rx_pad_i), |
// modem signals |
.rts_pad_o(), .cts_pad_i(1'b0), .dtr_pad_o(), .dsr_pad_i(1'b0), .ri_pad_i(1'b0), .dcd_pad_i(1'b0) ); |
assign uart0_dat_o = mask( toword(uart0_temp), uart0_ack_o); |