OpenCores
URL https://opencores.org/ocsvn/virtex7_pcie_dma/virtex7_pcie_dma/trunk

Subversion Repositories virtex7_pcie_dma

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  • This comparison shows the changes necessary to convert path 
    /virtex7_pcie_dma/trunk
    from Rev 28 to Rev 29
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  •

Rev 28 → Rev 29

/firmware/sources/pcie/dma_control.vhd
694,8 → 694,12
---- Application specific registers BEGIN 🂱 ----
------------------------------------------------
register_map_control_s.STATUS_LEDS <= STATUS_LEDS_C;
register_map_control_s.INT_TEST_2 <= "0";
register_map_control_s.INT_TEST_3 <= "0";
register_map_control_s.INT_TEST_2 <= INT_TEST_2_C;
register_map_control_s.INT_TEST_3 <= INT_TEST_3_C;
register_map_control_s.LFSR_SEED <= LFSR_SEED_C;
register_map_control_s.APP_MUX <= APP_MUX_C;
register_map_control_s.LFSR_LOAD_SEED <= LFSR_LOAD_SEED_C;
register_map_control_s.APP_ENABLE <= APP_ENABLE_C;
------------------------------------------------
---- Application specific registers END 🂱 ----
------------------------------------------------
872,6 → 876,15
when REG_CARD_TYPE => register_read_data_40_s <= x"0000000000000000"&std_logic_vector(to_unsigned(CARD_TYPE,64));
-- Monitor Registers
when REG_PLL_LOCK => register_read_data_40_s <= x"0000000000000000000000000000000"&"000"&register_map_monitor_s.PLL_LOCK;
when REG_CORE_TEMPERATURE => register_read_data_40_s <= x"0000_0000_0000_0000_0000_0000_0000_0"&register_map_monitor_s.CORE_TEMPERATURE;
-- Application Control Registers
when REG_LFSR_SEED_0 => register_read_data_40_s <= register_map_control_s.LFSR_SEED(127 downto 0);
when REG_LFSR_SEED_1 => register_read_data_40_s <= register_map_control_s.LFSR_SEED(255 downto 128);
when REG_APP_MUX => register_read_data_40_s <= x"0000_0000_0000_0000_0000_0000_0000_000"&"000"&register_map_control_s.APP_MUX;
when REG_LFSR_LOAD_SEED => register_read_data_40_s <= x"0000_0000_0000_0000_0000_0000_0000_000"&"000"&register_map_control_s.LFSR_LOAD_SEED;
when REG_APP_ENABLE => register_read_data_40_s <= x"0000_0000_0000_0000_0000_0000_0000_000"&"00"&register_map_control_s.APP_ENABLE;
------------------------------------------------
---- Application specific registers END 🂱 ----
------------------------------------------------
995,6 → 1008,14
when REG_STATUS_LEDS => register_map_control_s.STATUS_LEDS <= register_write_data_40_s(7 downto 0);
when REG_INT_TEST_2 => register_map_control_s.INT_TEST_2 <= "1";
when REG_INT_TEST_3 => register_map_control_s.INT_TEST_3 <= "1";
--! Example Application Register
when REG_LFSR_SEED_0 => register_map_control_s.LFSR_SEED(127 downto 0) <= register_write_data_40_s(127 downto 0);
when REG_LFSR_SEED_1 => register_map_control_s.LFSR_SEED(255 downto 128) <= register_write_data_40_s(127 downto 0);
when REG_APP_MUX => register_map_control_s.APP_MUX <= register_write_data_40_s(0 downto 0);
when REG_LFSR_LOAD_SEED => register_map_control_s.LFSR_LOAD_SEED <= register_write_data_40_s(0 downto 0);
when REG_APP_ENABLE => register_map_control_s.APP_ENABLE <= register_write_data_40_s(1 downto 0);
------------------------------------------------
---- Application specific registers END 🂱 ----
------------------------------------------------
/firmware/sources/application/fifo_256x512.xci
0,0 → 1,395
<?xml version="1.0" encoding="UTF-8"?>
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<spirit:vendor>xilinx.com</spirit:vendor>
<spirit:library>xci</spirit:library>
<spirit:name>unknown</spirit:name>
<spirit:version>1.0</spirit:version>
<spirit:componentInstances>
<spirit:componentInstance>
<spirit:instanceName>fifo_256x512</spirit:instanceName>
<spirit:componentRef spirit:vendor="xilinx.com" spirit:library="ip" spirit:name="fifo_generator" spirit:version="12.0"/>
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<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.asymmetric_port_width">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Write_Clock_Frequency">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Programmable_Full_Type">Single_Programmable_Full_Threshold_Constant</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PROTOCOL">AXI4</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Clock_Type_AXI">Common_Clock</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.HAS_ACLKEN">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Clock_Enable_Type">Slave_Interface_Clock_Enable</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.READ_WRITE_MODE">READ_WRITE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ID_WIDTH">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ADDRESS_WIDTH">32</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.DATA_WIDTH">64</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.AWUSER_Width">0</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Enable_TREADY">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Enable_TLAST">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.HAS_TSTRB">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.FIFO_Implementation_wach">Common_Clock_Block_RAM</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Enable_ECC_wach">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Inject_Sbit_Error_wach">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Inject_Dbit_Error_wach">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Enable_Data_Counts_wach">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Programmable_Full_Type_wach">No_Programmable_Full_Threshold</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Full_Threshold_Assert_Value_wach">1023</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Programmable_Empty_Type_wach">No_Programmable_Empty_Threshold</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Empty_Threshold_Assert_Value_wach">1022</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.wdch_type">FIFO</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.FIFO_Implementation_wdch">Common_Clock_Block_RAM</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.FIFO_Application_Type_wdch">Data_FIFO</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Enable_ECC_wdch">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Inject_Sbit_Error_wdch">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Inject_Dbit_Error_wdch">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Enable_ECC_wrch">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Inject_Sbit_Error_wrch">false</spirit:configurableElementValue>
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/firmware/sources/application/application.vhd
10,16 → 10,18
--!
--!
--! @author Andrea Borga (andrea.borga@nikhef.nl)<br>
--! Frans Schreuder (frans.schreuder@nikhef.nl)
--! Frans Schreuder (frans.schreuder@nikhef.nl)<br>
--! Oussama el Kharraz Alami<br>
--!
--!
--! @date 07/01/2015 created
--! @date 05/10/2015 created
--!
--! @version 1.0
--!
--! @brief
--! This example application fills a fifo with constand values and a 32 bit counter
--! value. The DMA core will take care of the data and writes it into PC memory
--! This example application fills the downfifo (PCIe -> PC) with pseudo random data by using
--! a LFSR and multiplies the data from upfifo (PC -> PCIe) back to the downfifo. The size
--! of the randomdata is 256 bits. The DMA core will take care of the data and writes it into PC memory
--! according to the DMA descriptors.
--!
--! @detail
64,116 → 66,357
generic(
NUMBER_OF_INTERRUPTS : integer := 8);
port (
appreg_clk : in std_logic;
downfifo_dout : out std_logic_vector(255 downto 0);
downfifo_empty_thresh : in std_logic_vector(7 downto 0);
downfifo_prog_empty : out std_logic;
downfifo_re : in std_logic;
fifo_rd_clk : in std_logic;
fifo_wr_clk : in std_logic;
flush_fifo : in std_logic;
interrupt_call : out std_logic_vector(NUMBER_OF_INTERRUPTS-1 downto 4);
leds : out std_logic_vector(7 downto 0);
pll_locked : in std_logic;
register_map_control : in register_map_control_type; --! contains all read/write registers that control the application. The record members are described in pcie_package.vhd
register_map_monitor : out register_map_monitor_type; --! contains all status (read only) signals from the application. The record members are described in pcie_package.vhd
reset_hard : in std_logic;
reset_soft : in std_logic;
upfifo_din : in std_logic_vector(255 downto 0);
upfifo_prog_full : out std_logic;
upfifo_we : in std_logic);
appreg_clk : in std_logic;
upfifo_din : in std_logic_vector(255 downto 0);
downfifo_dout : out std_logic_vector(255 downto 0);
downfifo_prog_empty : out std_logic;
downfifo_empty_thresh: in STD_LOGIC_VECTOR(7 downto 0);
upfifo_prog_full : out std_logic;
fifo_rd_clk : in std_logic;
downfifo_re : in std_logic;
upfifo_we : in std_logic;
fifo_wr_clk : in std_logic;
flush_fifo : in std_logic;
interrupt_call : out std_logic_vector(NUMBER_OF_INTERRUPTS-1 downto 4);
leds : out std_logic_vector(7 downto 0);
pll_locked : in std_logic;
register_map_control : in register_map_control_type; --! contains all read/write registers that control the application. The record members are described in pcie_package.vhd
register_map_monitor : out register_map_monitor_type; --! contains all status (read only) signals from the application. The record members are described in pcie_package.vhd
reset_hard : in std_logic;
reset_soft : in std_logic);
end entity application;
 
architecture rtl of application is
 
COMPONENT xadc_wiz_0
PORT (
m_axis_tvalid : OUT STD_LOGIC;
m_axis_tready : IN STD_LOGIC;
m_axis_tdata : OUT STD_LOGIC_VECTOR(15 DOWNTO 0);
m_axis_tid : OUT STD_LOGIC_VECTOR(4 DOWNTO 0);
m_axis_aclk : IN STD_LOGIC;
s_axis_aclk : IN STD_LOGIC;
m_axis_resetn : IN STD_LOGIC;
vp_in : IN STD_LOGIC;
vn_in : IN STD_LOGIC;
channel_out : OUT STD_LOGIC_VECTOR(4 DOWNTO 0);
eoc_out : OUT STD_LOGIC;
alarm_out : OUT STD_LOGIC;
eos_out : OUT STD_LOGIC;
busy_out : OUT STD_LOGIC;
temp_out : OUT STD_LOGIC_VECTOR(11 DOWNTO 0)
);
END COMPONENT;
 
architecture rtl of application is
 
COMPONENT fifo_256x256
PORT (
clk : IN STD_LOGIC;
rst : IN STD_LOGIC;
din : IN STD_LOGIC_VECTOR(255 DOWNTO 0);
wr_en : IN STD_LOGIC;
rd_en : IN STD_LOGIC;
dout : OUT STD_LOGIC_VECTOR(255 DOWNTO 0);
full : OUT STD_LOGIC;
prog_empty : OUT STD_LOGIC;
prog_empty_thresh: IN STD_LOGIC_VECTOR(7 downto 0);
empty : OUT STD_LOGIC
rst : IN STD_LOGIC;
-- wr_clk : IN STD_LOGIC;
-- rd_clk : IN STD_LOGIC;
clk : IN STD_LOGIC;
din : IN STD_LOGIC_VECTOR(255 DOWNTO 0);
wr_en : IN STD_LOGIC;
rd_en : IN STD_LOGIC;
--prog_empty_thresh : IN STD_LOGIC_VECTOR (7 DOWNTO 0);
prog_empty_thresh : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
dout : OUT STD_LOGIC_VECTOR(255 DOWNTO 0);
full : OUT STD_LOGIC;
empty : OUT STD_LOGIC;
prog_full : OUT STD_LOGIC;
prog_empty : OUT STD_LOGIC
);
END COMPONENT;
ATTRIBUTE SYN_BLACK_BOX : BOOLEAN;
ATTRIBUTE SYN_BLACK_BOX OF fifo_256x256 : COMPONENT IS TRUE;
ATTRIBUTE BLACK_BOX_PAD_PIN : STRING;
ATTRIBUTE BLACK_BOX_PAD_PIN OF fifo_256x256 : COMPONENT IS "clk,rst,din[255:0],wr_en,rd_en,dout[255:0],full,empty";
 
COMPONENT fifo_256x512
PORT (
rst : IN STD_LOGIC;
clk : IN STD_LOGIC;
din : IN STD_LOGIC_VECTOR(255 DOWNTO 0);
wr_en : IN STD_LOGIC;
rd_en : IN STD_LOGIC;
dout : OUT STD_LOGIC_VECTOR(255 DOWNTO 0);
full : OUT STD_LOGIC;
empty : OUT STD_LOGIC;
almost_full : OUT STD_LOGIC;
prog_full : OUT STD_LOGIC
 
);
END COMPONENT;
 
COMPONENT LFSR
PORT (
clk : in STD_LOGIC;
load_seed : in STD_LOGIC_VECTOR (0 downto 0);
enable : in STD_LOGIC;
rndmdata : out STD_LOGIC_VECTOR (255 downto 0);
seed : in STD_LOGIC_VECTOR (255 downto 0)
);
END COMPONENT;
COMPONENT multiplier
PORT (
clk : IN STD_LOGIC;
A : IN STD_LOGIC_VECTOR(63 DOWNTO 0);
B : IN STD_LOGIC_VECTOR(63 DOWNTO 0);
SCLR : IN STD_LOGIC;
P : OUT STD_LOGIC_VECTOR(127 DOWNTO 0)
);
END COMPONENT;
 
signal register_map_monitor_s : register_map_monitor_type;
signal register_map_control_s : register_map_control_type;
attribute dont_touch : string;
--attribute dont_touch of register_map_monitor_s : signal is "true";
attribute dont_touch of register_map_control_s : signal is "true";
signal s_fifo_we: std_logic;
signal s_fifo_full: std_logic;
signal s_fifo_din: std_logic_vector(255 downto 0);
signal cnt: std_logic_vector(31 downto 0);
--! This signal below is for PCIe -> PC.
signal s_downfifo_we : std_logic;
signal s_downfifo_full : std_logic;
signal s_downfifo_din : std_logic_vector(255 downto 0);
signal s_downfifo_prog_full : std_logic;
signal reset: std_logic;
signal s_flush_fifo: std_logic;
--! This signal below is for PC-> PCIe.
signal s_upfifo_re : std_logic;
signal s_upfifo_empty : std_logic;
-- signal s_fifo_empty_thresh : std_logic_vector( 9 downto 0);
signal s_upfifo_dout : std_logic_vector(255 downto 0);
signal reset : std_logic;
signal s_flush_fifo : std_logic;
--! These signals belong to the multipliers
signal mul0_A :std_logic_vector(63 downto 0);
signal mul0_B :std_logic_vector(63 downto 0);
signal mul0_P :std_logic_vector(127 downto 0);
signal mul1_A :std_logic_vector(63 downto 0);
signal mul1_B :std_logic_vector(63 downto 0);
signal mul1_P :std_logic_vector(127 downto 0);
signal mul_out :std_logic_vector(255 downto 0);
signal mul_sclr : std_logic;
--! These signals belong to the LFSR
signal lfsr_enable :std_logic;
signal lfsr_load_seed_latch :std_logic;
signal lfsr_data :std_logic_vector(255 downto 0);
--! This signal start the write process
signal start_write :std_logic;
--! Enable application enable
signal enable_app_write :std_logic;
signal start_lfsr :std_logic;
signal start_mul :std_logic;
--! for xadc
signal reset_n: std_logic;
signal vp_in: std_logic;
signal vn_in: std_logic;
signal APP_MUX : std_logic;
signal LFSR_LOAD_SEED : std_logic;
signal APP_ENABLE : std_logic_vector(1 downto 0);
signal LFSR_SEED : std_logic_vector(255 downto 0);
begin
 
reset <= reset_hard or reset_soft;
reset_n <= not reset;
 
register_map_monitor <= register_map_monitor_s;
register_map_monitor_s.PLL_LOCK(0) <= pll_locked;
register_map_control_s <= register_map_control;
 
leds <= register_map_control_s.STATUS_LEDS(7 downto 0);
register_map_monitor <= register_map_monitor_s;
register_map_monitor_s.PLL_LOCK(0) <= pll_locked;
register_map_control_s <= register_map_control;
leds <= register_map_control_s.STATUS_LEDS(7 downto 0);
 
upfifo_prog_full <= '0';
xadc : xadc_wiz_0
PORT MAP (
m_axis_tvalid => open,
m_axis_tready => '1',
m_axis_tdata => open,
m_axis_tid => open,
m_axis_aclk => appreg_clk,
s_axis_aclk => appreg_clk,
m_axis_resetn => reset_n,
vp_in => vp_in,
vn_in => vn_in,
channel_out => open,
eoc_out => open,
alarm_out => open,
eos_out => open,
busy_out => open,
temp_out => register_map_monitor_s.CORE_TEMPERATURE
);
s_flush_fifo <= flush_fifo or reset;
--!
--! Instantiation of the fifo (PCIe => PC)
fifo0 : fifo_256x256
downfifo : fifo_256x256
PORT MAP (
clk => fifo_rd_clk,
rst => s_flush_fifo,
-- Towards DMA core
rd_en => downfifo_re,
dout => downfifo_dout,
prog_empty => downfifo_prog_empty,
prog_empty_thresh => downfifo_empty_thresh,
empty => open,
-- Application signals
wr_en => s_fifo_we,
din => s_fifo_din,
full => s_fifo_full
clk => fifo_rd_clk,
rst => s_flush_fifo,
din => s_downfifo_din,
wr_en => s_downfifo_we,
rd_en => downfifo_re,
dout => downfifo_dout,
full => s_downfifo_full,
empty => open,
prog_full => s_downfifo_prog_full,
prog_empty => downfifo_prog_empty,
prog_empty_thresh => downfifo_empty_thresh
);
 
 
 
--! Instantiation of the fifo (PC => PCIe)
upfifo : fifo_256x512
PORT MAP (
clk => fifo_wr_clk,
rst => s_flush_fifo,
din => upfifo_din,
wr_en => upfifo_we,
rd_en => s_upfifo_re,
dout => s_upfifo_dout,
full => open,
almost_full => open,
empty => s_upfifo_empty,
prog_full => upfifo_prog_full
);
 
--! Write the fifo if it's not full
s_fifo_we <= not s_fifo_full;
--! Add some constants and mix it with the counter value.
s_fifo_din <= x"DEADBEEF"&cnt&x"00001111"&cnt&x"22223333"&cnt&x"44445555"&cnt;
LFSR1 : LFSR
PORT MAP(
clk => fifo_rd_clk,
load_seed(0) => LFSR_LOAD_SEED,
enable => lfsr_enable,
rndmdata => lfsr_data,
seed => LFSR_SEED
);
--! write fifo with a counter and a constant at 250MHz
process(fifo_rd_clk, reset)
mul0 : multiplier
PORT MAP (
CLK => fifo_rd_clk,
A => mul0_A,
B => mul0_B,
SCLR => mul_sclr,
P => mul0_P
);
mul1 : multiplier
PORT MAP (
CLK => fifo_rd_clk,
A => mul1_A,
B => mul1_B,
SCLR => mul_sclr,
P => mul1_P
);
process(fifo_rd_clk, reset, s_downfifo_prog_full )
variable s_upfifo_re_pipe : std_logic_vector(18 downto 0);
begin
if(reset = '1') then
cnt <= (others => '0');
elsif (rising_edge(fifo_rd_clk)) then
if(s_fifo_full = '0') then
-- Make a 32 bit counter, it will be mixed with some constants and written into the fifo.
cnt <= cnt + 1;
else
cnt <= cnt;
end if;
end if;
end process;
if(rising_edge(fifo_rd_clk)) then
if (APP_MUX = '0') then
if (s_downfifo_prog_full = '0' and start_lfsr = '1') then
-- Write data from fifo to PC
s_downfifo_we <= '1';
else
s_downfifo_we <= '0';
end if;
s_downfifo_din <= lfsr_data;
else
s_downfifo_din <= mul_out;
if(s_upfifo_re_pipe(18) = '1') then
s_downfifo_we <= '1';
else
s_downfifo_we <= '0';
end if;
end if;
s_upfifo_re_pipe := s_upfifo_re_pipe(17 downto 0) & s_upfifo_re;
end if;
end process;
 
regsync: process(fifo_rd_clk)
variable APP_MUX_P1, APP_MUX_P2 : std_logic;
variable LFSR_LOAD_SEED_P1, LFSR_LOAD_SEED_P2 : std_logic;
variable APP_ENABLE_P1, APP_ENABLE_P2 : std_logic_vector(1 downto 0);
variable LFSR_SEED_P1, LFSR_SEED_P2 : std_logic_vector(255 downto 0);
begin
APP_MUX <= APP_MUX_P2;
LFSR_LOAD_SEED <= LFSR_LOAD_SEED_P2;
APP_ENABLE <= APP_ENABLE_P2;
LFSR_SEED <= LFSR_SEED_P2;
APP_MUX_P2 := APP_MUX_P1;
LFSR_LOAD_SEED_P2 := LFSR_LOAD_SEED_P1;
APP_ENABLE_P2 := APP_ENABLE_P1;
LFSR_SEED_P2 := LFSR_SEED_P1;
APP_MUX_P1 := register_map_control_s.APP_MUX(0);
LFSR_LOAD_SEED_P1 := register_map_control_s.LFSR_LOAD_SEED(0);
APP_ENABLE_P1 := register_map_control_s.APP_ENABLE;
LFSR_SEED_P1 := register_map_control_s.LFSR_SEED;
end process;
 
--process(APP_MUX, s_downfifo_prog_full ,s_upfifo_empty)
-- begin
-- if (APP_MUX = '0') then
-- if (s_downfifo_prog_full = '0' ) then
-- -- Enable LFSR for random data
-- lfsr_enable <= '1';
-- else
-- lfsr_enable <= '0';
-- end if;
-- s_upfifo_re <= '0';
-- else
-- --if (s_upfifo_empty = '0' and s_downfifo_full = '0') then
-- if (s_upfifo_empty = '0' and (s_downfifo_prog_full = '0' and start_mul = '1')) then
-- s_upfifo_re <= '1';
-- else
-- s_upfifo_re <= '0';
-- end if;
-- lfsr_enable <= '0';
-- end if;
--end process;
s_upfifo_re <= (APP_MUX and (not s_upfifo_empty)) and ((not s_downfifo_prog_full) and start_mul);
lfsr_enable <= (not APP_MUX) and (not s_downfifo_prog_full);
process(fifo_rd_clk, reset )
variable lfsr_load_seed_p1: std_logic;
begin
if(reset ='1') then
lfsr_load_seed_latch <= '0';
elsif(rising_edge(fifo_rd_clk)) then
if(lfsr_load_seed_p1 = '1' and LFSR_LOAD_SEED = '0') then
lfsr_load_seed_latch <= '1';
else
lfsr_load_seed_latch <= lfsr_load_seed_latch;
end if;
lfsr_load_seed_p1 := LFSR_LOAD_SEED;
end if;
end process;
start_lfsr <= '1' when ( lfsr_load_seed_latch = '1') and (APP_ENABLE(0) ='1') else '0';
start_mul <= APP_ENABLE(1);
mul_sclr <= not start_mul;
 
-- mulitpliers
mul0_A <= s_upfifo_dout (63 downto 0) ;
mul0_B <= s_upfifo_dout (127 downto 64 ) ;
mul_out (127 downto 0) <= mul0_P ;
 
mul1_A <= s_upfifo_dout (191 downto 128) ;
mul1_B <= s_upfifo_dout (255 downto 192) ;
mul_out (255 downto 128) <= mul1_P ;
 
g0: if(NUMBER_OF_INTERRUPTS>4) generate
interrupt_call(4 downto 4) <= register_map_control_s.INT_TEST_2;
184,8 → 427,5
end generate;
end architecture rtl ; -- of application
 
/firmware/sources/application/fifo_256x256.xci
52,9 → 52,9
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Disable_Timing_Violations">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Read_Clock_Frequency">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Write_Clock_Frequency">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Programmable_Full_Type">No_Programmable_Full_Threshold</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Full_Threshold_Assert_Value">254</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Full_Threshold_Negate_Value">253</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Programmable_Full_Type">Single_Programmable_Full_Threshold_Constant</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Full_Threshold_Assert_Value">225</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Full_Threshold_Negate_Value">224</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Programmable_Empty_Type">Single_Programmable_Empty_Threshold_Input_Port</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Empty_Threshold_Assert_Value">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Empty_Threshold_Negate_Value">3</spirit:configurableElementValue>
209,9 → 209,9
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PROG_EMPTY_THRESH_ASSERT_VAL">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PROG_EMPTY_THRESH_NEGATE_VAL">3</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PROG_EMPTY_TYPE">3</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PROG_FULL_THRESH_ASSERT_VAL">254</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PROG_FULL_THRESH_NEGATE_VAL">253</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PROG_FULL_TYPE">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PROG_FULL_THRESH_ASSERT_VAL">225</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PROG_FULL_THRESH_NEGATE_VAL">224</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PROG_FULL_TYPE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_RD_DATA_COUNT_WIDTH">8</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_RD_DEPTH">256</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_RD_FREQ">1</spirit:configurableElementValue>
/firmware/sources/application/LFSR.vhd
0,0 → 1,71
----------------------------------------------------------------------------------
-- Company:
-- Engineer:
--
-- Create Date: 09/10/2015 11:21:34 AM
-- Design Name:
-- Module Name: LFSR - Behavioral
-- Project Name:
-- Target Devices:
-- Tool Versions:
-- Description:
--
-- Dependencies:
--
-- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
--
----------------------------------------------------------------------------------
 
 
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
 
-- Uncomment the following library declaration if using
-- arithmetic functions with Signed or Unsigned values
--use IEEE.NUMERIC_STD.ALL;
 
-- Uncomment the following library declaration if instantiating
-- any Xilinx leaf cells in this code.
--library UNISIM;
--use UNISIM.VComponents.all;
 
entity LFSR is
Port (
clk : in STD_LOGIC;
load_seed : in STD_LOGIC_VECTOR (0 downto 0);
enable : in STD_LOGIC;
rndmdata : out STD_LOGIC_VECTOR (255 downto 0);
seed : in STD_LOGIC_VECTOR (255 downto 0)
);
end LFSR;
 
architecture Behavioral of LFSR is
 
signal vector :STD_LOGIC_VECTOR (255 downto 0);
 
begin
 
-- Linear feedback shift registers
LFSR: process(clk) is
begin
if rising_edge(clk) then
if (load_seed = "1") then
vector(255 downto 0)<= seed;
else
if(enable = '1') then
vector <= vector(0)& vector(255 downto 1) ;
vector(253) <= vector(254) xor vector(0);
vector(250) <= vector(251) xor vector(0);
vector(245) <= vector(246) xor vector(0);
else
vector <= vector;
end if;
end if;
end if;
end process LFSR;
rndmdata <= vector;
 
end Behavioral;
/firmware/sources/application/multiplier.xci
0,0 → 1,75
<?xml version="1.0" encoding="UTF-8"?>
<spirit:design xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
<spirit:vendor>xilinx.com</spirit:vendor>
<spirit:library>xci</spirit:library>
<spirit:name>unknown</spirit:name>
<spirit:version>1.0</spirit:version>
<spirit:componentInstances>
<spirit:componentInstance>
<spirit:instanceName>multiplier</spirit:instanceName>
<spirit:componentRef spirit:vendor="xilinx.com" spirit:library="ip" spirit:name="mult_gen" spirit:version="12.0"/>
<spirit:configurableElementValues>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.InternalUser">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Component_Name">multiplier</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MultType">Parallel_Multiplier</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PortAType">Unsigned</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PortAWidth">64</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PortBType">Unsigned</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PortBWidth">64</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ConstValue">129</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CcmImp">Distributed_Memory</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Multiplier_Construction">Use_Mults</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.OptGoal">Speed</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Use_Custom_Output_Width">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.OutputWidthHigh">127</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.OutputWidthLow">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.UseRounding">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RoundPoint">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PipeStages">18</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ClockEnable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.SyncClear">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.SclrCePriority">SCLR_Overrides_CE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ZeroDetect">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_VERBOSITY">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MODEL_TYPE">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_OPTIMIZE_GOAL">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_XDEVICEFAMILY">virtex7</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_HAS_CE">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_HAS_SCLR">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_LATENCY">18</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_A_WIDTH">64</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_OUT_LOW">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MULT_TYPE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CE_OVERRIDES_SCLR">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CCM_IMP">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_B_VALUE">10000001</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_HAS_ZERO_DETECT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_ROUND_OUTPUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_ROUND_PT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.CLK_INTF.FREQ_HZ">10000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.ARCHITECTURE">virtex7</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.DEVICE">xc7vx690t</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.PACKAGE">ffg1761</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SPEEDGRADE">-2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.TEMPERATURE_GRADE">C</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SILICON_REVISION"/>
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.PREFHDL">VHDL</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SIMULATOR_LANGUAGE">MIXED</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.USE_RDI_CUSTOMIZATION">TRUE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.USE_RDI_GENERATION">TRUE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.BOARD"/>
<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.MANAGED">TRUE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SWVERSION">2014.4</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.IPREVISION">6</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SYNTHESISFLOW">OUT_OF_CONTEXT</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SELECTEDSIMMODEL"/>
<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.OUTPUTDIR">.</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SHAREDDIR">.</spirit:configurableElementValue>
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</spirit:componentInstance>
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</spirit:design>
/firmware/sources/application/xadc_wiz_0.xci
0,0 → 1,271
<?xml version="1.0" encoding="UTF-8"?>
<spirit:design xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
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<spirit:componentInstance>
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<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.XADC_STARUP_SELECTION">single_channel</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_DCLK">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INCREASE_ACQUISITION_TIME">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.DCLK_FREQUENCY">100</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ADC_CONVERSION_RATE">1000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.SEQUENCER_MODE">Off</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_CALIBRATION_AVERAGING">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_DRP">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_CONVST">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_CONVSTCLK">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_CHANNEL">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_EOC">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_EOS">true</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.USER_TEMP_ALARM">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VCCINT_ALARM">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VCCAUX_ALARM">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_VBRAM_ALARM">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.TEMPERATURE_ALARM_OT_TRIGGER">125.0</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VCCINT_ALARM_LOWER">0.97</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VCCINT_ALARM_UPPER">1.03</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VCCAUX_ALARM_LOWER">1.75</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VCCAUX_ALARM_UPPER">1.89</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VBRAM_ALARM_LOWER">0.95</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_VCCPINT_ALARM">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_VCCPAUX_ALARM">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_VCCDDRO_ALARM">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VCCDDRO_VOLT">1_2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VCCPINT_ALARM_LOWER">0.95</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VCCDDRO_ALARM_LOWER">1.15</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VCCDDRO_ALARM_UPPER">1.25</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.SINGLE_CHANNEL_SELECTION">TEMPERATURE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.SINGLE_CHANNEL_ENABLE_CALIBRATION">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.BIPOLAR_OPERATION">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.SINGLE_CHANNEL_ACQUISITION_TIME">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CHANNEL_AVERAGING">None</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ADC_OFFSET_CALIBRATION">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ADC_OFFSET_AND_GAIN_CALIBRATION">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.SENSOR_OFFSET_CALIBRATION">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.SENSOR_OFFSET_AND_GAIN_CALIBRATION">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_EXTERNAL_MUX">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.EXTERNAL_MUX_CHANNEL">VP_VN</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.EXTERNAL_MUXADDR_ENABLE">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CHANNEL_ENABLE_CALIBRATION">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CHANNEL_ENABLE_VCCINT">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CHANNEL_ENABLE_VCCAUX">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CHANNEL_ENABLE_VP_VN">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CHANNEL_ENABLE_VREFP">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CHANNEL_ENABLE_VREFN">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CHANNEL_ENABLE_VBRAM">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.AVERAGE_ENABLE_VBRAM">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CHANNEL_ENABLE_VCCPINT">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.AVERAGE_ENABLE_VCCPINT">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CHANNEL_ENABLE_VCCPAUX">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.AVERAGE_ENABLE_VCCPAUX">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CHANNEL_ENABLE_VCCDDRO">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.AVERAGE_ENABLE_VCCDDRO">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CHANNEL_ENABLE_VAUXP0_VAUXN0">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CHANNEL_ENABLE_VAUXP1_VAUXN1">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CHANNEL_ENABLE_VAUXP2_VAUXN2">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CHANNEL_ENABLE_VAUXP3_VAUXN3">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CHANNEL_ENABLE_VAUXP4_VAUXN4">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CHANNEL_ENABLE_VAUXP5_VAUXN5">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CHANNEL_ENABLE_VAUXP6_VAUXN6">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CHANNEL_ENABLE_VAUXP7_VAUXN7">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CHANNEL_ENABLE_VAUXP8_VAUXN8">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CHANNEL_ENABLE_VAUXP9_VAUXN9">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CHANNEL_ENABLE_VAUXP10_VAUXN10">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CHANNEL_ENABLE_VAUXP11_VAUXN11">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CHANNEL_ENABLE_VAUXP12_VAUXN12">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CHANNEL_ENABLE_VAUXP13_VAUXN13">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CHANNEL_ENABLE_VAUXP14_VAUXN14">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CHANNEL_ENABLE_VAUXP15_VAUXN15">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.AVERAGE_ENABLE_VP_VN">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.AVERAGE_ENABLE_VAUXP0_VAUXN0">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.AVERAGE_ENABLE_VAUXP1_VAUXN1">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.AVERAGE_ENABLE_VAUXP2_VAUXN2">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.AVERAGE_ENABLE_VAUXP3_VAUXN3">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.AVERAGE_ENABLE_VAUXP4_VAUXN4">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.AVERAGE_ENABLE_VAUXP5_VAUXN5">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.AVERAGE_ENABLE_VAUXP6_VAUXN6">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.AVERAGE_ENABLE_VAUXP7_VAUXN7">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.AVERAGE_ENABLE_VAUXP8_VAUXN8">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.AVERAGE_ENABLE_VAUXP9_VAUXN9">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.AVERAGE_ENABLE_VAUXP10_VAUXN10">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.AVERAGE_ENABLE_VAUXP11_VAUXN11">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.AVERAGE_ENABLE_VAUXP12_VAUXN12">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.AVERAGE_ENABLE_VAUXP13_VAUXN13">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.AVERAGE_ENABLE_VAUXP14_VAUXN14">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.AVERAGE_ENABLE_VAUXP15_VAUXN15">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.AVERAGE_ENABLE_TEMPERATURE">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.AVERAGE_ENABLE_VCCINT">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.AVERAGE_ENABLE_VCCAUX">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.BIPOLAR_VP_VN">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.BIPOLAR_VAUXP0_VAUXN0">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.BIPOLAR_VAUXP1_VAUXN1">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.BIPOLAR_VAUXP2_VAUXN2">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.BIPOLAR_VAUXP3_VAUXN3">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.BIPOLAR_VAUXP4_VAUXN4">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.BIPOLAR_VAUXP5_VAUXN5">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.BIPOLAR_VAUXP6_VAUXN6">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.BIPOLAR_VAUXP8_VAUXN8">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.BIPOLAR_VAUXP9_VAUXN9">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.BIPOLAR_VAUXP10_VAUXN10">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.BIPOLAR_VAUXP11_VAUXN11">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.BIPOLAR_VAUXP12_VAUXN12">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.BIPOLAR_VAUXP13_VAUXN13">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.BIPOLAR_VAUXP14_VAUXN14">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.BIPOLAR_VAUXP15_VAUXN15">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ACQUISITION_TIME_VP_VN">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ACQUISITION_TIME_VAUXP0_VAUXN0">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ACQUISITION_TIME_VAUXP1_VAUXN1">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ACQUISITION_TIME_VAUXP2_VAUXN2">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ACQUISITION_TIME_VAUXP3_VAUXN3">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ACQUISITION_TIME_VAUXP4_VAUXN4">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ACQUISITION_TIME_VAUXP5_VAUXN5">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ACQUISITION_TIME_VAUXP6_VAUXN6">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ACQUISITION_TIME_VAUXP7_VAUXN7">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ACQUISITION_TIME_VAUXP8_VAUXN8">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ACQUISITION_TIME_VAUXP9_VAUXN9">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ACQUISITION_TIME_VAUXP10_VAUXN10">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ACQUISITION_TIME_VAUXP11_VAUXN11">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ACQUISITION_TIME_VAUXP12_VAUXN12">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ACQUISITION_TIME_VAUXP13_VAUXN13">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ACQUISITION_TIME_VAUXP14_VAUXN14">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ACQUISITION_TIME_VAUXP15_VAUXN15">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ADDR_WIDTH">32</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.DATA_WIDTH">32</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_JTAG_ARBITER">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ACQUISITION_TIME">4</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_TEMP_BUS">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_AXI4STREAM">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.FIFO_DEPTH">7</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.POWER_DOWN_ADCA">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.POWER_DOWN_ADCB">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.c_component_name">xadc_wiz_0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_SIM_FILE_SEL">Default</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_SIM_FILE_REL_PATH">./</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_SIM_FILE_NAME">design</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_HAS_DCLK">1</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_HAS_CONVST">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_HAS_CONVSTCLK">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_HAS_VP">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_HAS_VN">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_HAS_CHANNEL">1</spirit:configurableElementValue>
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/firmware/sources/application/pcie_x8_gen3_3_0.xci
0,0 → 1,677
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<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar2_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar2_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar2_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar2_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_class_code_interface">00</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar1_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar4_type">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_base_class_menu">Network_controller</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sub_class_interface_menu">Other_network_controller</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar0_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_expansion_rom_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar0_enabled">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar0_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar5_type">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar5_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar1_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_class_code_interface">00</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar2_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_msix_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar5_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_rbar_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_pb_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar1_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar3_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar2_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar3_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar2_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar1_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar3_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar1_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.alignment_mode">DWORD_Aligned</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar4_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.silicon_rev">Production</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar2_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar3_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar0_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar2_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar4_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar1_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar0_enabled">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar0_type">Memory</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar0_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar0_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar0_scale">Megabytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar0_size">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar1_enabled">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar1_type">Memory</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar1_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar1_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar1_scale">Megabytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar1_size">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar2_enabled">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar2_type">Memory</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar2_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar2_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar2_scale">Megabytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar2_size">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar3_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar3_type">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar3_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar3_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar3_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar3_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar4_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar4_type">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar4_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar4_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar4_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar4_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar5_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar5_type">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar5_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar5_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_bar5_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar3_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar4_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar1_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar2_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar2_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar4_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar3_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar2_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_dev_cap_max_payload">1024_bytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.gen_x0y0">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar4_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.gen_x0y1">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.gen_x0y2">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.gen_x0y3">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_expansion_rom_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_expansion_rom_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_rbar_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_tphr_enable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar3_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar4_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar5_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar3_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar3_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_expansion_rom_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar4_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_base_class_menu">Simple_communication_controllers</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sub_class_interface_menu">Generic_XT_compatible_serial_controller</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar0_type">Memory</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar5_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar3_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar0_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar3_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar5_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_class_code_sub">80</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.extended_tag_field">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar1_type">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar0_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_expansion_rom_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_expansion_rom_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar1_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_ari_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar3_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar5_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar2_type">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.vendor_id">10EE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_tphr_enable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar2_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar3_type">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar3_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar0_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar0_type">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar0_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar0_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar0_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar0_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar1_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar1_type">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar1_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar1_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar1_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar1_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar4_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_aer_enabled">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_dsn_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar4_type">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar4_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar2_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_cap_ver">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar4_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_msi_enabled">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar5_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_dpa_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar5_type">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ext_pcie_cfg_space_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar4_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar5_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_ari_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.perf_level">Extreme</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_class_code_base">07</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.axisten_if_width">256_bit</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar4_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar0_type">Memory</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar3_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar4_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_aer_enabled">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_dsn_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar1_type">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar0_64bit">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar4_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_msi_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar5_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_dpa_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar2_type">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_msix_enabled">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar5_size">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_bar4_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar0_scale">Kilobytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_dev_cap_max_payload">512_bytes</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_sriov_bar1_prefetchable">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf1_sriov_bar3_type">N/A</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pf0_ltr_enabled">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.mode_selection">Advanced</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pipe_sim">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.shared_logic_in_core">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.en_ext_clk">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.en_ext_gt_common">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.en_ext_ch_gt_drp">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.en_transceiver_status_ports">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.tx_fc_if">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.cfg_fc_if">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.cfg_ext_if">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.cfg_status_if">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.per_func_status_if">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.cfg_mgmt_if">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.rcv_msg_if">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.cfg_tx_msg_if">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.cfg_ctl_if">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.en_pcie_drp">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.en_ext_pipe_interface">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.en_msi_per_vec_masking">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.en_ext_startup">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.tandem_mode">None</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.axisten_freq">250</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.aspm_support">No_ASPM</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.USE_BOARD_FLOW">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RESET_BOARD_INTERFACE">Custom</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.SRIOV_CAP_ENABLE_EXT">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.axisten_if_enable_msg_route">2FFFF</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.axisten_if_enable_rx_msg_intfc">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.pipe_mode_sim">None</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.en_powerdown">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PL_LINK_CAP_MAX_LINK_SPEED">4</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PL_LINK_CAP_MAX_LINK_WIDTH">8</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.USER_CLK2_FREQ">4</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_LINK_CAP_ASPM_SUPPORT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_DATA_WIDTH">256</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.REF_CLK_FREQ">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PCIE_LINK_SPEED">3</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.ARI_CAP_ENABLE">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF0_ARI_CAP_NEXT_FUNC">0x00</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.AXISTEN_IF_CC_ALIGNMENT_MODE">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.AXISTEN_IF_CQ_ALIGNMENT_MODE">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.AXISTEN_IF_RC_ALIGNMENT_MODE">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.AXISTEN_IF_RC_STRADDLE">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.AXISTEN_IF_RQ_ALIGNMENT_MODE">FALSE</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_EXPANSION_ROM_ENABLE">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_INTERRUPT_PIN">0x0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_MSIX_CAP_NEXTPTR">0x00</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_MSIX_CAP_PBA_BIR">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_MSIX_CAP_PBA_OFFSET">0x00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_MSIX_CAP_TABLE_BIR">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_MSIX_CAP_TABLE_OFFSET">0x00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_MSIX_CAP_TABLE_SIZE">0x000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_MSI_CAP_MULTIMSGCAP">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_MSI_CAP_NEXTPTR">0x00</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_PB_CAP_NEXTPTR">0x000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_PM_CAP_NEXTPTR">0x00</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_RBAR_CAP_ENABLE">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_RBAR_CAP_NEXTPTR">0x000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_REVISION_ID">0x00</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_SRIOV_BAR0_APERTURE_SIZE">0b00000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_SRIOV_BAR0_CONTROL">0b000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_SRIOV_BAR1_APERTURE_SIZE">0b00000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_SRIOV_BAR1_CONTROL">0b000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_SRIOV_BAR2_APERTURE_SIZE">0b00000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_SRIOV_BAR2_CONTROL">0b000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_SRIOV_BAR3_APERTURE_SIZE">0b00000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_SRIOV_BAR3_CONTROL">0b000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_SRIOV_BAR4_APERTURE_SIZE">0b00000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_SRIOV_BAR4_CONTROL">0b000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_SRIOV_BAR5_APERTURE_SIZE">0b00000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_SRIOV_BAR5_CONTROL">0b000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_SRIOV_CAP_INITIAL_VF">0x0000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_SRIOV_CAP_NEXTPTR">0x000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_SRIOV_CAP_TOTAL_VF">0x0000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_SRIOV_CAP_VER">0x0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_SRIOV_FIRST_VF_OFFSET">0x0000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_SRIOV_FUNC_DEP_LINK">0x0001</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_SRIOV_SUPPORTED_PAGE_SIZE">0x00000553</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_SRIOV_VF_DEVICE_ID">0x0000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_SUBSYSTEM_ID">0x0007</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_TPHR_CAP_ENABLE">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PF1_TPHR_CAP_NEXTPTR">0x000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PL_UPSTREAM_FACING">TRUE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.SRIOV_CAP_ENABLE">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.TL_CREDITS_CD">0x000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.TL_CREDITS_CH">0x00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.TL_CREDITS_NPD">0x028</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.TL_CREDITS_NPH">0x20</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.TL_CREDITS_PD">0x198</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.TL_CREDITS_PH">0x20</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.TL_EXTENDED_CFG_EXTEND_INTERFACE_ENABLE">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.TL_LEGACY_MODE_ENABLE">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.TL_PF_ENABLE_REG">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF0_CAPABILITY_POINTER">0x80</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF0_MSIX_CAP_PBA_BIR">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF0_MSIX_CAP_PBA_OFFSET">0x00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF0_MSIX_CAP_TABLE_BIR">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF0_MSIX_CAP_TABLE_OFFSET">0x00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF0_MSIX_CAP_TABLE_SIZE">0x000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF0_MSI_CAP_MULTIMSGCAP">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF0_PM_CAP_NEXTPTR">&quot;00000000&quot;</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF1_MSIX_CAP_PBA_BIR">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF1_MSIX_CAP_PBA_OFFSET">0x00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF1_MSIX_CAP_TABLE_BIR">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF1_MSIX_CAP_TABLE_OFFSET">0x00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF1_MSIX_CAP_TABLE_SIZE">0x000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF1_MSI_CAP_MULTIMSGCAP">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF1_PM_CAP_NEXTPTR">&quot;00000000&quot;</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF2_MSIX_CAP_PBA_BIR">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF2_MSIX_CAP_PBA_OFFSET">0x00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF2_MSIX_CAP_TABLE_BIR">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF2_MSIX_CAP_TABLE_OFFSET">0x00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF2_MSIX_CAP_TABLE_SIZE">0x000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF2_MSI_CAP_MULTIMSGCAP">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF2_PM_CAP_NEXTPTR">&quot;00000000&quot;</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF3_MSIX_CAP_PBA_BIR">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF3_MSIX_CAP_PBA_OFFSET">0x00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF3_MSIX_CAP_TABLE_BIR">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF3_MSIX_CAP_TABLE_OFFSET">0x00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF3_MSIX_CAP_TABLE_SIZE">0x000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF3_MSI_CAP_MULTIMSGCAP">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF3_PM_CAP_NEXTPTR">&quot;00000000&quot;</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF4_MSIX_CAP_PBA_BIR">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF4_MSIX_CAP_PBA_OFFSET">0x00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF4_MSIX_CAP_TABLE_BIR">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF4_MSIX_CAP_TABLE_OFFSET">0x00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF4_MSIX_CAP_TABLE_SIZE">0x000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF4_MSI_CAP_MULTIMSGCAP">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF4_PM_CAP_NEXTPTR">&quot;00000000&quot;</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF5_MSIX_CAP_PBA_BIR">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF5_MSIX_CAP_PBA_OFFSET">0x00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF5_MSIX_CAP_TABLE_BIR">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF5_MSIX_CAP_TABLE_OFFSET">0x00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF5_MSIX_CAP_TABLE_SIZE">0x000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF5_MSI_CAP_MULTIMSGCAP">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.VF5_PM_CAP_NEXTPTR">&quot;00000000&quot;</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.COMPLETION_SPACE">16KB</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.gen_x0y0_ucf">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.gen_x0y3_ucf">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.gen_x0y2_ucf">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.gen_x0y1_ucf">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.silicon_revision">Production</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.xlnx_ref_board">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.pcie_blk_locn">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.SHARED_LOGIC_IN_CORE">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PIPE_SIM">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.MSI_EN">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.MSIX_EN">TRUE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PCIE_EXT_CLK">TRUE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PCIE_EXT_GT_COMMON">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.EXT_CH_GT_DRP">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.CFG_STATUS_IF">TRUE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.TX_FC_IF">TRUE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.CFG_EXT_IF">TRUE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.CFG_FC_IF">TRUE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PER_FUNC_STATUS_IF">TRUE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.CFG_MGMT_IF">TRUE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.RCV_MSG_IF">TRUE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.CFG_TX_MSG_IF">TRUE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.CFG_CTL_IF">TRUE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PCIE_DRP">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.TRANSCEIVER_CTRL_STATUS_PORTS">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.AXISTEN_IF_ENABLE_CLIENT_TAG">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PCIE_USE_MODE">2.1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PCIE_FAST_CONFIG">NONE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.EXT_STARTUP_PRIMITIVE">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.EXT_PIPE_INTERFACE">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.AXISTEN_IF_ENABLE_MSG_ROUTE">0x00000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.AXISTEN_IF_ENABLE_RX_MSG_INTFC">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.POWER_DOWN">FALSE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.ARCHITECTURE">virtex7</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.DEVICE">xc7vx690t</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.PACKAGE">ffg1761</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SPEEDGRADE">-2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.TEMPERATURE_GRADE">C</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SILICON_REVISION"/>
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.PREFHDL">VHDL</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SIMULATOR_LANGUAGE">MIXED</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.USE_RDI_CUSTOMIZATION">TRUE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.USE_RDI_GENERATION">TRUE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.BOARD"/>
<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.MANAGED">TRUE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SWVERSION">2014.4</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.IPREVISION">4</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SYNTHESISFLOW">OUT_OF_CONTEXT</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SELECTEDSIMMODEL"/>
<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.OUTPUTDIR">.</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SHAREDDIR">.</spirit:configurableElementValue>
</spirit:configurableElementValues>
</spirit:componentInstance>
</spirit:componentInstances>
</spirit:design>
/firmware/sources/packages/pcie_package.vhd
192,9 → 192,19
constant REG_CARD_TYPE : std_logic_vector(19 downto 0) := x"00040";
-- Monitor Registers
constant REG_PLL_LOCK : std_logic_vector(19 downto 0) := x"00300";
constant REG_CORE_TEMPERATURE : std_logic_vector(19 downto 0) := x"00310";
-- Test interrupt registers.
constant REG_INT_TEST_2 : std_logic_vector(19 downto 0) := x"01060";
constant REG_INT_TEST_3 : std_logic_vector(19 downto 0) := x"01070";
constant REG_INT_TEST_3 : std_logic_vector(19 downto 0) := x"01070";
-- Example application register
constant REG_LFSR_SEED_0 : std_logic_vector(19 downto 0) := x"02000";
constant REG_LFSR_SEED_1 : std_logic_vector(19 downto 0) := x"02010";
constant REG_APP_MUX : std_logic_vector(19 downto 0) := x"02020";
constant REG_LFSR_LOAD_SEED : std_logic_vector(19 downto 0) := x"02030";
constant REG_APP_ENABLE : std_logic_vector(19 downto 0) := x"02040";
------------------------------------------------
---- Application specific registers END 🂱 ----
------------------------------------------------
206,7 → 216,14
type register_map_control_type is record
STATUS_LEDS : std_logic_vector(7 downto 0);
INT_TEST_2 : std_logic_vector(0 downto 0);
INT_TEST_3 : std_logic_vector(0 downto 0);
INT_TEST_3 : std_logic_vector(0 downto 0);
LFSR_SEED : std_logic_vector(255 downto 0);
APP_MUX : std_logic_vector(0 downto 0 );
LFSR_LOAD_SEED : std_logic_vector(0 downto 0 );
APP_ENABLE : std_logic_vector(1 downto 0 );
 
end record;
------------------------------------------------
217,8 → 234,15
------------------------------------------------
---- Application specific registers BEGIN 🂱 ----
------------------------------------------------
constant BOARD_ID_C : std_logic_vector(63 downto 0) := x"0000000000FE71CE";
constant STATUS_LEDS_C : std_logic_vector(7 downto 0) := x"AA";
constant BOARD_ID_C : std_logic_vector(63 downto 0) := x"0000000000FE71CE";
constant STATUS_LEDS_C : std_logic_vector(7 downto 0) := x"AA";
constant INT_TEST_2_C : std_logic_vector(0 downto 0) := "0";
constant INT_TEST_3_C : std_logic_vector(0 downto 0) := "0";
constant LFSR_SEED_C : std_logic_vector(255 downto 0):= (others=>'0');
constant APP_MUX_C : std_logic_vector(0 downto 0) := "0";
constant LFSR_LOAD_SEED_C : std_logic_vector(0 downto 0):= "0";
constant APP_ENABLE_C : std_logic_vector(1 downto 0):= "00";
------------------------------------------------
---- Application specific registers END 🂱 ----
------------------------------------------------
228,8 → 252,9
---- Application specific registers BEGIN 🂱 ----
------------------------------------------------
type register_map_monitor_type is record
READ_ONLY : std_logic_vector(0 downto 0);
PLL_LOCK : std_logic_vector(0 downto 0);
READ_ONLY : std_logic_vector(0 downto 0);
PLL_LOCK : std_logic_vector(0 downto 0);
CORE_TEMPERATURE : std_logic_vector(11 downto 0);
end record;
------------------------------------------------
---- Application specific registers END 🂱 ----
/firmware/simulation/Wupper/VSim_Functional.tcl
1,7 → 1,10
### start simulation
 
vsim -t ps -novopt +notimingchecks -L unisim work.virtex7_dma_top
 
vsim -t ps -novopt +notimingchecks -L unisim work.wupper_oc_top
 
 
 
onerror {resume}
#Log all the objects in design. These will appear in .wlf file#
log -r /*
/firmware/simulation/Wupper/wave.do
1,235 → 1,379
onerror {resume}
quietly WaveActivateNextPane {} 0
add wave -noupdate -group application /virtex7_dma_top/u0/appreg_clk
add wave -noupdate -group application /virtex7_dma_top/u0/fifo_din
add wave -noupdate -group application /virtex7_dma_top/u0/fifo_dout
add wave -noupdate -group application /virtex7_dma_top/u0/fifo_empty
add wave -noupdate -group application /virtex7_dma_top/u0/fifo_full
add wave -noupdate -group application /virtex7_dma_top/u0/fifo_rd_clk
add wave -noupdate -group application /virtex7_dma_top/u0/fifo_re
add wave -noupdate -group application /virtex7_dma_top/u0/fifo_we
add wave -noupdate -group application /virtex7_dma_top/u0/fifo_wr_clk
add wave -noupdate -group application /virtex7_dma_top/u0/flush_fifo
add wave -noupdate -group application /virtex7_dma_top/u0/interrupt_call
add wave -noupdate -group application /virtex7_dma_top/u0/leds
add wave -noupdate -group application /virtex7_dma_top/u0/pll_locked
add wave -noupdate -group application /virtex7_dma_top/u0/register_map_control
add wave -noupdate -group application /virtex7_dma_top/u0/register_map_monitor
add wave -noupdate -group application /virtex7_dma_top/u0/reset_hard
add wave -noupdate -group application /virtex7_dma_top/u0/reset_soft
add wave -noupdate -group application /virtex7_dma_top/u0/register_map_monitor_s
add wave -noupdate -group application /virtex7_dma_top/u0/register_map_control_s
add wave -noupdate -group application /virtex7_dma_top/u0/s_fifo_we
add wave -noupdate -group application /virtex7_dma_top/u0/s_fifo_full
add wave -noupdate -group application /virtex7_dma_top/u0/s_fifo_din
add wave -noupdate -group application /virtex7_dma_top/u0/cnt
add wave -noupdate -group application /virtex7_dma_top/u0/reset
add wave -noupdate -group application /virtex7_dma_top/u0/appreg_clk
add wave -noupdate -group application /virtex7_dma_top/u0/fifo_din
add wave -noupdate -group application /virtex7_dma_top/u0/fifo_dout
add wave -noupdate -group application /virtex7_dma_top/u0/fifo_empty
add wave -noupdate -group application /virtex7_dma_top/u0/fifo_full
add wave -noupdate -group application /virtex7_dma_top/u0/fifo_rd_clk
add wave -noupdate -group application /virtex7_dma_top/u0/fifo_re
add wave -noupdate -group application /virtex7_dma_top/u0/fifo_we
add wave -noupdate -group application /virtex7_dma_top/u0/fifo_wr_clk
add wave -noupdate -group application /virtex7_dma_top/u0/flush_fifo
add wave -noupdate -group application /virtex7_dma_top/u0/interrupt_call
add wave -noupdate -group application /virtex7_dma_top/u0/leds
add wave -noupdate -group application /virtex7_dma_top/u0/pll_locked
add wave -noupdate -group application /virtex7_dma_top/u0/register_map_control
add wave -noupdate -group application /virtex7_dma_top/u0/register_map_monitor
add wave -noupdate -group application /virtex7_dma_top/u0/reset_hard
add wave -noupdate -group application /virtex7_dma_top/u0/reset_soft
add wave -noupdate -group application /virtex7_dma_top/u0/register_map_monitor_s
add wave -noupdate -group application /virtex7_dma_top/u0/register_map_control_s
add wave -noupdate -group application /virtex7_dma_top/u0/s_fifo_we
add wave -noupdate -group application /virtex7_dma_top/u0/s_fifo_full
add wave -noupdate -group application /virtex7_dma_top/u0/s_fifo_din
add wave -noupdate -group application /virtex7_dma_top/u0/cnt
add wave -noupdate -group application /virtex7_dma_top/u0/reset
add wave -noupdate -group slowclock /virtex7_dma_top/u1/u3/clk
add wave -noupdate -group slowclock /virtex7_dma_top/u1/u3/pll_locked
add wave -noupdate -group slowclock /virtex7_dma_top/u1/u3/reset_n
add wave -noupdate -group slowclock /virtex7_dma_top/u1/u3/reset_out
add wave -noupdate -group slowclock /virtex7_dma_top/u1/u3/reset_s
add wave -noupdate -group slowclock /virtex7_dma_top/u1/u3/locked_s
add wave -noupdate -group slowclock /virtex7_dma_top/u1/u3/reset_cnt
add wave -noupdate -group slowclock /virtex7_dma_top/u1/u3/clk
add wave -noupdate -group slowclock /virtex7_dma_top/u1/u3/pll_locked
add wave -noupdate -group slowclock /virtex7_dma_top/u1/u3/reset_n
add wave -noupdate -group slowclock /virtex7_dma_top/u1/u3/reset_out
add wave -noupdate -group slowclock /virtex7_dma_top/u1/u3/reset_s
add wave -noupdate -group slowclock /virtex7_dma_top/u1/u3/locked_s
add wave -noupdate -group slowclock /virtex7_dma_top/u1/u3/reset_cnt
add wave -noupdate -group clk_wiz /virtex7_dma_top/u1/u3/clk0/U0/clk_in250
add wave -noupdate -group clk_wiz /virtex7_dma_top/u1/u3/clk0/U0/clk_out40
add wave -noupdate -group clk_wiz /virtex7_dma_top/u1/u3/clk0/U0/reset
add wave -noupdate -group clk_wiz /virtex7_dma_top/u1/u3/clk0/U0/locked
add wave -noupdate -group clk_wiz /virtex7_dma_top/u1/u3/clk0/U0/clk_in250_clk_wiz_40
add wave -noupdate -group clk_wiz /virtex7_dma_top/u1/u3/clk0/U0/clk_out40_clk_wiz_40
add wave -noupdate -group clk_wiz /virtex7_dma_top/u1/u3/clk0/U0/clkfbout_buf_clk_wiz_40
add wave -noupdate -group clk_wiz /virtex7_dma_top/u1/u3/clk0/U0/clkfbout_clk_wiz_40
add wave -noupdate -group clk_wiz /virtex7_dma_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_CLKFBOUTB_UNCONNECTED
add wave -noupdate -group clk_wiz /virtex7_dma_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_CLKFBSTOPPED_UNCONNECTED
add wave -noupdate -group clk_wiz /virtex7_dma_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_CLKINSTOPPED_UNCONNECTED
add wave -noupdate -group clk_wiz /virtex7_dma_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_CLKOUT0B_UNCONNECTED
add wave -noupdate -group clk_wiz /virtex7_dma_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_CLKOUT1_UNCONNECTED
add wave -noupdate -group clk_wiz /virtex7_dma_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_CLKOUT1B_UNCONNECTED
add wave -noupdate -group clk_wiz /virtex7_dma_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_CLKOUT2_UNCONNECTED
add wave -noupdate -group clk_wiz /virtex7_dma_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_CLKOUT2B_UNCONNECTED
add wave -noupdate -group clk_wiz /virtex7_dma_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_CLKOUT3_UNCONNECTED
add wave -noupdate -group clk_wiz /virtex7_dma_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_CLKOUT3B_UNCONNECTED
add wave -noupdate -group clk_wiz /virtex7_dma_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_CLKOUT4_UNCONNECTED
add wave -noupdate -group clk_wiz /virtex7_dma_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_CLKOUT5_UNCONNECTED
add wave -noupdate -group clk_wiz /virtex7_dma_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_CLKOUT6_UNCONNECTED
add wave -noupdate -group clk_wiz /virtex7_dma_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_DRDY_UNCONNECTED
add wave -noupdate -group clk_wiz /virtex7_dma_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_PSDONE_UNCONNECTED
add wave -noupdate -group clk_wiz /virtex7_dma_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_DO_UNCONNECTED
add wave -noupdate -group clk_wiz /virtex7_dma_top/u1/u3/clk0/U0/clk_in250
add wave -noupdate -group clk_wiz /virtex7_dma_top/u1/u3/clk0/U0/clk_out40
add wave -noupdate -group clk_wiz /virtex7_dma_top/u1/u3/clk0/U0/reset
add wave -noupdate -group clk_wiz /virtex7_dma_top/u1/u3/clk0/U0/locked
add wave -noupdate -group clk_wiz /virtex7_dma_top/u1/u3/clk0/U0/clk_in250_clk_wiz_40
add wave -noupdate -group clk_wiz /virtex7_dma_top/u1/u3/clk0/U0/clk_out40_clk_wiz_40
add wave -noupdate -group clk_wiz /virtex7_dma_top/u1/u3/clk0/U0/clkfbout_buf_clk_wiz_40
add wave -noupdate -group clk_wiz /virtex7_dma_top/u1/u3/clk0/U0/clkfbout_clk_wiz_40
add wave -noupdate -group clk_wiz /virtex7_dma_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_CLKFBOUTB_UNCONNECTED
add wave -noupdate -group clk_wiz /virtex7_dma_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_CLKFBSTOPPED_UNCONNECTED
add wave -noupdate -group clk_wiz /virtex7_dma_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_CLKINSTOPPED_UNCONNECTED
add wave -noupdate -group clk_wiz /virtex7_dma_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_CLKOUT0B_UNCONNECTED
add wave -noupdate -group clk_wiz /virtex7_dma_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_CLKOUT1_UNCONNECTED
add wave -noupdate -group clk_wiz /virtex7_dma_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_CLKOUT1B_UNCONNECTED
add wave -noupdate -group clk_wiz /virtex7_dma_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_CLKOUT2_UNCONNECTED
add wave -noupdate -group clk_wiz /virtex7_dma_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_CLKOUT2B_UNCONNECTED
add wave -noupdate -group clk_wiz /virtex7_dma_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_CLKOUT3_UNCONNECTED
add wave -noupdate -group clk_wiz /virtex7_dma_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_CLKOUT3B_UNCONNECTED
add wave -noupdate -group clk_wiz /virtex7_dma_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_CLKOUT4_UNCONNECTED
add wave -noupdate -group clk_wiz /virtex7_dma_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_CLKOUT5_UNCONNECTED
add wave -noupdate -group clk_wiz /virtex7_dma_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_CLKOUT6_UNCONNECTED
add wave -noupdate -group clk_wiz /virtex7_dma_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_DRDY_UNCONNECTED
add wave -noupdate -group clk_wiz /virtex7_dma_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_PSDONE_UNCONNECTED
add wave -noupdate -group clk_wiz /virtex7_dma_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_DO_UNCONNECTED
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/bar0
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/bar1
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/bar2
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/clk
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/clkDiv6
add wave -noupdate -expand -group dma_control -expand -subitemconfig {/virtex7_dma_top/u1/dma0/u1/dma_descriptors(0) -expand} /virtex7_dma_top/u1/dma0/u1/dma_descriptors
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/dma_soft_reset
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/dma_status
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/flush_fifo
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/interrupt_table_en
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/interrupt_vector
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/m_axis_cc
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/m_axis_r_cc
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/register_map_monitor
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/register_map_control
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/reset
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/reset_global_soft
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/s_axis_cq
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/s_axis_r_cq
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/fifo_full
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/fifo_empty
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/dma_interrupt_call
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/completer_state
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/completer_state_slv
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/dma_descriptors_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/dma_descriptors_40_r_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/dma_descriptors_40_w_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/dma_descriptors_w_250_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/dma_status_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/dma_status_40_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/int_vector_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/int_vector_40_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/int_table_en_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/register_address_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/address_type_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/dword_count_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/request_type_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/requester_id_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/tag_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/target_function_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/bar_id_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/bar_aperture_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/bar0_valid
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/transaction_class_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/attributes_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/seen_tlast_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/register_data_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/register_data_r
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/register_map_monitor_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/register_map_control_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/tlast_timer_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/register_read_address_250_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/register_read_address_40_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/register_read_enable_250_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/register_read_enable1_250_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/register_read_enable_40_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/register_read_done_250_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/register_read_done_40_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/register_read_data_250_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/register_read_data_40_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/register_write_address_250_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/register_write_address_40_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/register_write_enable_250_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/register_write_enable1_250_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/register_write_enable_40_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/register_write_done_250_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/register_write_done_40_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/register_write_data_250_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/register_write_data_40_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/bar0_40_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/bar1_40_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/bar2_40_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/fifo_full_interrupt_40_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/data_available_interrupt_40_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/flush_fifo_40_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/dma_soft_reset_40_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/reset_global_soft_40_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/write_interrupt_40_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/read_interrupt_40_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/write_interrupt_250_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/read_interrupt_250_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/next_current_address_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/last_current_address_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/last_pc_pointer_s
add wave -noupdate -expand -group dma_control /virtex7_dma_top/u1/dma0/u1/dma_wait
add wave -noupdate -group dma_read_write /virtex7_dma_top/u1/dma0/u0/cache_tready
add wave -noupdate -group dma_read_write /virtex7_dma_top/u1/dma0/u0/clk
add wave -noupdate -group dma_read_write /virtex7_dma_top/u1/dma0/u0/dma_descriptors
add wave -noupdate -group dma_read_write /virtex7_dma_top/u1/dma0/u0/dma_soft_reset
add wave -noupdate -group dma_read_write /virtex7_dma_top/u1/dma0/u0/dma_status
add wave -noupdate -group dma_read_write /virtex7_dma_top/u1/dma0/u0/fifo_din
add wave -noupdate -group dma_read_write /virtex7_dma_top/u1/dma0/u0/fifo_dout
add wave -noupdate -group dma_read_write /virtex7_dma_top/u1/dma0/u0/fifo_empty
add wave -noupdate -group dma_read_write /virtex7_dma_top/u1/dma0/u0/fifo_full
add wave -noupdate -group dma_read_write /virtex7_dma_top/u1/dma0/u0/fifo_re
add wave -noupdate -group dma_read_write /virtex7_dma_top/u1/dma0/u0/fifo_we
add wave -noupdate -group dma_read_write /virtex7_dma_top/u1/dma0/u0/m_axis_r_rq
add wave -noupdate -group dma_read_write /virtex7_dma_top/u1/dma0/u0/m_axis_rq
add wave -noupdate -group dma_read_write /virtex7_dma_top/u1/dma0/u0/reset
add wave -noupdate -group dma_read_write /virtex7_dma_top/u1/dma0/u0/s_axis_r_rc
add wave -noupdate -group dma_read_write /virtex7_dma_top/u1/dma0/u0/s_axis_rc
add wave -noupdate -group dma_read_write /virtex7_dma_top/u1/dma0/u0/rw_state
add wave -noupdate -group dma_read_write /virtex7_dma_top/u1/dma0/u0/rw_state_slv
add wave -noupdate -group dma_read_write /virtex7_dma_top/u1/dma0/u0/strip_state
add wave -noupdate -group dma_read_write /virtex7_dma_top/u1/dma0/u0/strip_state_slv
add wave -noupdate -group dma_read_write /virtex7_dma_top/u1/dma0/u0/current_descriptor
add wave -noupdate -group dma_read_write /virtex7_dma_top/u1/dma0/u0/fifo_dout_pipe
add wave -noupdate -group dma_read_write /virtex7_dma_top/u1/dma0/u0/fifo_din_pipe
add wave -noupdate -group dma_read_write /virtex7_dma_top/u1/dma0/u0/req_tag
add wave -noupdate -group dma_read_write /virtex7_dma_top/u1/dma0/u0/descriptor_done_s
add wave -noupdate -group dma_read_write /virtex7_dma_top/u1/dma0/u0/s_axis_rc_tlast_pipe
add wave -noupdate -group dma_read_write /virtex7_dma_top/u1/dma0/u0/s_axis_rc_tvalid_pipe
add wave -noupdate -group dma_read_write /virtex7_dma_top/u1/dma0/u0/fifo_full_pipe
add wave -noupdate -group dma_read_write /virtex7_dma_top/u1/dma0/u0/receive_word_count
add wave -noupdate -group dma_read_write /virtex7_dma_top/u1/dma0/u0/active_descriptor_s
add wave -noupdate -group dma_read_write /virtex7_dma_top/u1/dma0/u0/receive_tags_s
add wave -noupdate -group dma_read_write /virtex7_dma_top/u1/dma0/u0/receive_tag_status_s
add wave -noupdate -group dma_read_write /virtex7_dma_top/u1/dma0/u0/current_receive_tag_s
add wave -noupdate -expand -group application -expand -group mul1 /wupper_oc_top/u0/mul1/CLK
add wave -noupdate -expand -group application -expand -group mul1 /wupper_oc_top/u0/mul1/A
add wave -noupdate -expand -group application -expand -group mul1 /wupper_oc_top/u0/mul1/B
add wave -noupdate -expand -group application -expand -group mul1 /wupper_oc_top/u0/mul1/P
add wave -noupdate -expand -group application -expand -group mul1 /wupper_oc_top/u0/mul1/NLW_U0_PCASC_UNCONNECTED
add wave -noupdate -expand -group application -expand -group mul1 /wupper_oc_top/u0/mul1/NLW_U0_ZERO_DETECT_UNCONNECTED
add wave -noupdate -expand -group application -expand -group mul0 /wupper_oc_top/u0/mul0/CLK
add wave -noupdate -expand -group application -expand -group mul0 /wupper_oc_top/u0/mul0/A
add wave -noupdate -expand -group application -expand -group mul0 /wupper_oc_top/u0/mul0/B
add wave -noupdate -expand -group application -expand -group mul0 /wupper_oc_top/u0/mul0/P
add wave -noupdate -expand -group application -expand -group mul0 /wupper_oc_top/u0/mul0/NLW_U0_PCASC_UNCONNECTED
add wave -noupdate -expand -group application -expand -group mul0 /wupper_oc_top/u0/mul0/NLW_U0_ZERO_DETECT_UNCONNECTED
add wave -noupdate -expand -group application /wupper_oc_top/u0/appreg_clk
add wave -noupdate -expand -group application /wupper_oc_top/u0/fifo_din
add wave -noupdate -expand -group application /wupper_oc_top/u0/fifo_dout
add wave -noupdate -expand -group application /wupper_oc_top/u0/fifo_empty
add wave -noupdate -expand -group application /wupper_oc_top/u0/fifo_full
add wave -noupdate -expand -group application /wupper_oc_top/u0/fifo_rd_clk
add wave -noupdate -expand -group application /wupper_oc_top/u0/fifo_re
add wave -noupdate -expand -group application /wupper_oc_top/u0/fifo_we
add wave -noupdate -expand -group application /wupper_oc_top/u0/fifo_wr_clk
add wave -noupdate -expand -group application /wupper_oc_top/u0/flush_fifo
add wave -noupdate -expand -group application /wupper_oc_top/u0/interrupt_call
add wave -noupdate -expand -group application /wupper_oc_top/u0/leds
add wave -noupdate -expand -group application /wupper_oc_top/u0/pll_locked
add wave -noupdate -expand -group application -expand /wupper_oc_top/u0/register_map_control
add wave -noupdate -expand -group application /wupper_oc_top/u0/register_map_monitor
add wave -noupdate -expand -group application /wupper_oc_top/u0/reset_hard
add wave -noupdate -expand -group application /wupper_oc_top/u0/reset_soft
add wave -noupdate -expand -group application /wupper_oc_top/u0/register_map_monitor_s
add wave -noupdate -expand -group application /wupper_oc_top/u0/register_map_control_s
add wave -noupdate -expand -group application /wupper_oc_top/u0/reset
add wave -noupdate -expand -group application /wupper_oc_top/u0/appreg_clk
add wave -noupdate -expand -group application /wupper_oc_top/u0/fifo_din
add wave -noupdate -expand -group application /wupper_oc_top/u0/fifo_we
add wave -noupdate -expand -group application /wupper_oc_top/u0/fifo_dout
add wave -noupdate -expand -group application /wupper_oc_top/u0/fifo_empty
add wave -noupdate -expand -group application /wupper_oc_top/u0/fifo_full
add wave -noupdate -expand -group application /wupper_oc_top/u0/fifo_rd_clk
add wave -noupdate -expand -group application /wupper_oc_top/u0/fifo_re
add wave -noupdate -expand -group application /wupper_oc_top/u0/fifo_wr_clk
add wave -noupdate -expand -group application /wupper_oc_top/u0/flush_fifo
add wave -noupdate -expand -group application /wupper_oc_top/u0/interrupt_call
add wave -noupdate -expand -group application /wupper_oc_top/u0/leds
add wave -noupdate -expand -group application /wupper_oc_top/u0/pll_locked
add wave -noupdate -expand -group application /wupper_oc_top/u0/register_map_control
add wave -noupdate -expand -group application /wupper_oc_top/u0/register_map_monitor
add wave -noupdate -expand -group application /wupper_oc_top/u0/reset_hard
add wave -noupdate -expand -group application /wupper_oc_top/u0/reset_soft
add wave -noupdate -expand -group application /wupper_oc_top/u0/register_map_monitor_s
add wave -noupdate -expand -group application -expand -subitemconfig {/wupper_oc_top/u0/register_map_control_s.APP_MUX -expand} /wupper_oc_top/u0/register_map_control_s
add wave -noupdate -expand -group application /wupper_oc_top/u0/reset
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/rst
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/din
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/wr_en
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/rd_en
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/dout
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/full
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/empty
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_almost_empty_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_almost_full_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axi_ar_dbiterr_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axi_ar_overflow_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axi_ar_prog_empty_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axi_ar_prog_full_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axi_ar_sbiterr_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axi_ar_underflow_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axi_aw_dbiterr_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axi_aw_overflow_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axi_aw_prog_empty_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axi_aw_prog_full_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axi_aw_sbiterr_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axi_aw_underflow_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axi_b_dbiterr_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axi_b_overflow_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axi_b_prog_empty_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axi_b_prog_full_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axi_b_sbiterr_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axi_b_underflow_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axi_r_dbiterr_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axi_r_overflow_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axi_r_prog_empty_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axi_r_prog_full_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axi_r_sbiterr_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axi_r_underflow_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axi_w_dbiterr_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axi_w_overflow_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axi_w_prog_empty_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axi_w_prog_full_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axi_w_sbiterr_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axi_w_underflow_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axis_dbiterr_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axis_overflow_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axis_prog_empty_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axis_prog_full_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axis_sbiterr_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axis_underflow_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_dbiterr_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_m_axi_arvalid_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_m_axi_awvalid_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_m_axi_bready_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_m_axi_rready_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_m_axi_wlast_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_m_axi_wvalid_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_m_axis_tlast_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_m_axis_tvalid_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_overflow_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_prog_full_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_rd_rst_busy_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_s_axi_arready_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_s_axi_awready_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_s_axi_bvalid_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_s_axi_rlast_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_s_axi_rvalid_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_s_axi_wready_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_s_axis_tready_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_sbiterr_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_underflow_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_valid_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_wr_ack_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_wr_rst_busy_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axi_ar_data_count_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axi_ar_rd_data_count_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axi_ar_wr_data_count_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axi_aw_data_count_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axi_aw_rd_data_count_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axi_aw_wr_data_count_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axi_b_data_count_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axi_b_rd_data_count_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axi_b_wr_data_count_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axi_r_data_count_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axi_r_rd_data_count_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axi_r_wr_data_count_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axi_w_data_count_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axi_w_rd_data_count_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axi_w_wr_data_count_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axis_data_count_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axis_rd_data_count_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_axis_wr_data_count_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_data_count_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_m_axi_araddr_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_m_axi_arburst_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_m_axi_arcache_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_m_axi_arid_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_m_axi_arlen_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_m_axi_arlock_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_m_axi_arprot_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_m_axi_arqos_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_m_axi_arregion_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_m_axi_arsize_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_m_axi_aruser_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_m_axi_awaddr_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_m_axi_awburst_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_m_axi_awcache_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_m_axi_awid_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_m_axi_awlen_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_m_axi_awlock_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_m_axi_awprot_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_m_axi_awqos_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_m_axi_awregion_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_m_axi_awsize_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_m_axi_awuser_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_m_axi_wdata_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_m_axi_wid_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_m_axi_wstrb_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_m_axi_wuser_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_m_axis_tdata_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_m_axis_tdest_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_m_axis_tid_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_m_axis_tkeep_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_m_axis_tstrb_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_m_axis_tuser_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_rd_data_count_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_s_axi_bid_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_s_axi_bresp_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_s_axi_buser_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_s_axi_rdata_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_s_axi_rid_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_s_axi_rresp_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_s_axi_ruser_UNCONNECTED
add wave -noupdate -expand -group application -expand -group upfifo /wupper_oc_top/u0/upfifo/NLW_U0_wr_data_count_UNCONNECTED
add wave -noupdate -expand -group application -expand -group LFSR /wupper_oc_top/u0/LFSR1/clk
add wave -noupdate -expand -group application -expand -group LFSR /wupper_oc_top/u0/LFSR1/load_seed
add wave -noupdate -expand -group application -expand -group LFSR /wupper_oc_top/u0/LFSR1/enable
add wave -noupdate -expand -group application -expand -group LFSR /wupper_oc_top/u0/LFSR1/rndmdata
add wave -noupdate -expand -group application -expand -group LFSR /wupper_oc_top/u0/LFSR1/seed
add wave -noupdate -expand -group application -expand -group LFSR /wupper_oc_top/u0/LFSR1/vector
add wave -noupdate -expand -group application /wupper_oc_top/u0/s_downfifo_we
add wave -noupdate -expand -group application /wupper_oc_top/u0/s_downfifo_full
add wave -noupdate -expand -group application /wupper_oc_top/u0/s_downfifo_din
add wave -noupdate -expand -group application /wupper_oc_top/u0/s_upfifo_re
add wave -noupdate -expand -group application /wupper_oc_top/u0/s_upfifo_empty
add wave -noupdate -expand -group application /wupper_oc_top/u0/s_upfifo_dout
add wave -noupdate -expand -group application /wupper_oc_top/u0/s_flush_fifo
add wave -noupdate -expand -group slowclock /wupper_oc_top/u1/u3/clk
add wave -noupdate -expand -group slowclock /wupper_oc_top/u1/u3/pll_locked
add wave -noupdate -expand -group slowclock /wupper_oc_top/u1/u3/reset_n
add wave -noupdate -expand -group slowclock /wupper_oc_top/u1/u3/reset_out
add wave -noupdate -expand -group slowclock /wupper_oc_top/u1/u3/reset_s
add wave -noupdate -expand -group slowclock /wupper_oc_top/u1/u3/locked_s
add wave -noupdate -expand -group slowclock /wupper_oc_top/u1/u3/reset_cnt
add wave -noupdate -expand -group slowclock /wupper_oc_top/u1/u3/clk
add wave -noupdate -expand -group slowclock /wupper_oc_top/u1/u3/pll_locked
add wave -noupdate -expand -group slowclock /wupper_oc_top/u1/u3/reset_n
add wave -noupdate -expand -group slowclock /wupper_oc_top/u1/u3/reset_out
add wave -noupdate -expand -group slowclock /wupper_oc_top/u1/u3/reset_s
add wave -noupdate -expand -group slowclock /wupper_oc_top/u1/u3/locked_s
add wave -noupdate -expand -group slowclock /wupper_oc_top/u1/u3/reset_cnt
add wave -noupdate -group clk_wiz /wupper_oc_top/u1/u3/clk0/U0/clk_in250
add wave -noupdate -group clk_wiz /wupper_oc_top/u1/u3/clk0/U0/clk_out40
add wave -noupdate -group clk_wiz /wupper_oc_top/u1/u3/clk0/U0/reset
add wave -noupdate -group clk_wiz /wupper_oc_top/u1/u3/clk0/U0/locked
add wave -noupdate -group clk_wiz /wupper_oc_top/u1/u3/clk0/U0/clk_in250_clk_wiz_40
add wave -noupdate -group clk_wiz /wupper_oc_top/u1/u3/clk0/U0/clk_out40_clk_wiz_40
add wave -noupdate -group clk_wiz /wupper_oc_top/u1/u3/clk0/U0/clkfbout_buf_clk_wiz_40
add wave -noupdate -group clk_wiz /wupper_oc_top/u1/u3/clk0/U0/clkfbout_clk_wiz_40
add wave -noupdate -group clk_wiz /wupper_oc_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_CLKFBOUTB_UNCONNECTED
add wave -noupdate -group clk_wiz /wupper_oc_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_CLKFBSTOPPED_UNCONNECTED
add wave -noupdate -group clk_wiz /wupper_oc_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_CLKINSTOPPED_UNCONNECTED
add wave -noupdate -group clk_wiz /wupper_oc_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_CLKOUT0B_UNCONNECTED
add wave -noupdate -group clk_wiz /wupper_oc_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_CLKOUT1_UNCONNECTED
add wave -noupdate -group clk_wiz /wupper_oc_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_CLKOUT1B_UNCONNECTED
add wave -noupdate -group clk_wiz /wupper_oc_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_CLKOUT2_UNCONNECTED
add wave -noupdate -group clk_wiz /wupper_oc_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_CLKOUT2B_UNCONNECTED
add wave -noupdate -group clk_wiz /wupper_oc_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_CLKOUT3_UNCONNECTED
add wave -noupdate -group clk_wiz /wupper_oc_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_CLKOUT3B_UNCONNECTED
add wave -noupdate -group clk_wiz /wupper_oc_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_CLKOUT4_UNCONNECTED
add wave -noupdate -group clk_wiz /wupper_oc_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_CLKOUT5_UNCONNECTED
add wave -noupdate -group clk_wiz /wupper_oc_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_CLKOUT6_UNCONNECTED
add wave -noupdate -group clk_wiz /wupper_oc_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_DRDY_UNCONNECTED
add wave -noupdate -group clk_wiz /wupper_oc_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_PSDONE_UNCONNECTED
add wave -noupdate -group clk_wiz /wupper_oc_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_DO_UNCONNECTED
add wave -noupdate -group clk_wiz /wupper_oc_top/u1/u3/clk0/U0/clk_in250
add wave -noupdate -group clk_wiz /wupper_oc_top/u1/u3/clk0/U0/clk_out40
add wave -noupdate -group clk_wiz /wupper_oc_top/u1/u3/clk0/U0/reset
add wave -noupdate -group clk_wiz /wupper_oc_top/u1/u3/clk0/U0/locked
add wave -noupdate -group clk_wiz /wupper_oc_top/u1/u3/clk0/U0/clk_in250_clk_wiz_40
add wave -noupdate -group clk_wiz /wupper_oc_top/u1/u3/clk0/U0/clk_out40_clk_wiz_40
add wave -noupdate -group clk_wiz /wupper_oc_top/u1/u3/clk0/U0/clkfbout_buf_clk_wiz_40
add wave -noupdate -group clk_wiz /wupper_oc_top/u1/u3/clk0/U0/clkfbout_clk_wiz_40
add wave -noupdate -group clk_wiz /wupper_oc_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_CLKFBOUTB_UNCONNECTED
add wave -noupdate -group clk_wiz /wupper_oc_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_CLKFBSTOPPED_UNCONNECTED
add wave -noupdate -group clk_wiz /wupper_oc_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_CLKINSTOPPED_UNCONNECTED
add wave -noupdate -group clk_wiz /wupper_oc_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_CLKOUT0B_UNCONNECTED
add wave -noupdate -group clk_wiz /wupper_oc_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_CLKOUT1_UNCONNECTED
add wave -noupdate -group clk_wiz /wupper_oc_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_CLKOUT1B_UNCONNECTED
add wave -noupdate -group clk_wiz /wupper_oc_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_CLKOUT2_UNCONNECTED
add wave -noupdate -group clk_wiz /wupper_oc_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_CLKOUT2B_UNCONNECTED
add wave -noupdate -group clk_wiz /wupper_oc_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_CLKOUT3_UNCONNECTED
add wave -noupdate -group clk_wiz /wupper_oc_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_CLKOUT3B_UNCONNECTED
add wave -noupdate -group clk_wiz /wupper_oc_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_CLKOUT4_UNCONNECTED
add wave -noupdate -group clk_wiz /wupper_oc_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_CLKOUT5_UNCONNECTED
add wave -noupdate -group clk_wiz /wupper_oc_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_CLKOUT6_UNCONNECTED
add wave -noupdate -group clk_wiz /wupper_oc_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_DRDY_UNCONNECTED
add wave -noupdate -group clk_wiz /wupper_oc_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_PSDONE_UNCONNECTED
add wave -noupdate -group clk_wiz /wupper_oc_top/u1/u3/clk0/U0/NLW_mmcm_adv_inst_DO_UNCONNECTED
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/bar0
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/bar1
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/bar2
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/clk
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/clkDiv6
add wave -noupdate -group dma_control -expand -subitemconfig {/wupper_oc_top/u1/dma0/u1/dma_descriptors(0) -expand} /wupper_oc_top/u1/dma0/u1/dma_descriptors
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/dma_soft_reset
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/dma_status
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/flush_fifo
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/interrupt_table_en
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/interrupt_vector
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/m_axis_cc
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/m_axis_r_cc
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/register_map_monitor
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/register_map_control
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/reset
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/reset_global_soft
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/s_axis_cq
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/s_axis_r_cq
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/fifo_full
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/fifo_empty
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/dma_interrupt_call
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/completer_state
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/completer_state_slv
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/dma_descriptors_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/dma_descriptors_40_r_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/dma_descriptors_40_w_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/dma_descriptors_w_250_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/dma_status_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/dma_status_40_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/int_vector_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/int_vector_40_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/int_table_en_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/register_address_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/address_type_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/dword_count_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/request_type_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/requester_id_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/tag_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/target_function_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/bar_id_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/bar_aperture_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/bar0_valid
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/transaction_class_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/attributes_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/register_data_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/register_data_r
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/register_map_monitor_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/register_map_control_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/tlast_timer_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/register_read_address_250_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/register_read_address_40_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/register_read_enable_250_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/register_read_enable1_250_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/register_read_enable_40_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/register_read_done_250_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/register_read_done_40_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/register_read_data_250_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/register_read_data_40_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/register_write_address_250_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/register_write_address_40_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/register_write_enable_250_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/register_write_enable1_250_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/register_write_enable_40_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/register_write_done_250_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/register_write_done_40_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/register_write_data_250_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/register_write_data_40_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/bar0_40_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/bar1_40_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/bar2_40_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/fifo_full_interrupt_40_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/data_available_interrupt_40_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/flush_fifo_40_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/dma_soft_reset_40_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/reset_global_soft_40_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/write_interrupt_40_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/read_interrupt_40_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/write_interrupt_250_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/read_interrupt_250_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/next_current_address_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/last_current_address_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/last_pc_pointer_s
add wave -noupdate -group dma_control /wupper_oc_top/u1/dma0/u1/dma_wait
add wave -noupdate -group dma_read_write /wupper_oc_top/u1/dma0/u0/clk
add wave -noupdate -group dma_read_write /wupper_oc_top/u1/dma0/u0/dma_descriptors
add wave -noupdate -group dma_read_write /wupper_oc_top/u1/dma0/u0/dma_soft_reset
add wave -noupdate -group dma_read_write /wupper_oc_top/u1/dma0/u0/dma_status
add wave -noupdate -group dma_read_write /wupper_oc_top/u1/dma0/u0/fifo_din
add wave -noupdate -group dma_read_write /wupper_oc_top/u1/dma0/u0/fifo_dout
add wave -noupdate -group dma_read_write /wupper_oc_top/u1/dma0/u0/fifo_empty
add wave -noupdate -group dma_read_write /wupper_oc_top/u1/dma0/u0/fifo_full
add wave -noupdate -group dma_read_write /wupper_oc_top/u1/dma0/u0/fifo_re
add wave -noupdate -group dma_read_write /wupper_oc_top/u1/dma0/u0/fifo_we
add wave -noupdate -group dma_read_write /wupper_oc_top/u1/dma0/u0/m_axis_r_rq
add wave -noupdate -group dma_read_write /wupper_oc_top/u1/dma0/u0/m_axis_rq
add wave -noupdate -group dma_read_write /wupper_oc_top/u1/dma0/u0/reset
add wave -noupdate -group dma_read_write /wupper_oc_top/u1/dma0/u0/s_axis_r_rc
add wave -noupdate -group dma_read_write /wupper_oc_top/u1/dma0/u0/s_axis_rc
add wave -noupdate -group dma_read_write /wupper_oc_top/u1/dma0/u0/rw_state
add wave -noupdate -group dma_read_write /wupper_oc_top/u1/dma0/u0/rw_state_slv
add wave -noupdate -group dma_read_write /wupper_oc_top/u1/dma0/u0/strip_state
add wave -noupdate -group dma_read_write /wupper_oc_top/u1/dma0/u0/strip_state_slv
add wave -noupdate -group dma_read_write /wupper_oc_top/u1/dma0/u0/current_descriptor
add wave -noupdate -group dma_read_write /wupper_oc_top/u1/dma0/u0/fifo_dout_pipe
add wave -noupdate -group dma_read_write /wupper_oc_top/u1/dma0/u0/fifo_din_pipe
add wave -noupdate -group dma_read_write /wupper_oc_top/u1/dma0/u0/req_tag
add wave -noupdate -group dma_read_write /wupper_oc_top/u1/dma0/u0/descriptor_done_s
add wave -noupdate -group dma_read_write /wupper_oc_top/u1/dma0/u0/s_axis_rc_tlast_pipe
add wave -noupdate -group dma_read_write /wupper_oc_top/u1/dma0/u0/s_axis_rc_tvalid_pipe
add wave -noupdate -group dma_read_write /wupper_oc_top/u1/dma0/u0/fifo_full_pipe
add wave -noupdate -group dma_read_write /wupper_oc_top/u1/dma0/u0/receive_word_count
add wave -noupdate -group dma_read_write /wupper_oc_top/u1/dma0/u0/active_descriptor_s
add wave -noupdate -group dma_read_write /wupper_oc_top/u1/dma0/u0/receive_tags_s
add wave -noupdate -group dma_read_write /wupper_oc_top/u1/dma0/u0/receive_tag_status_s
add wave -noupdate -group dma_read_write /wupper_oc_top/u1/dma0/u0/current_receive_tag_s
TreeUpdate [SetDefaultTree]
WaveRestoreCursors {{Cursor 1} {1952634 ps} 0}
WaveRestoreCursors {{Cursor 1} {2638518 ps} 0}
quietly wave cursor active 1
configure wave -namecolwidth 269
configure wave -valuecolwidth 449
245,4 → 389,4
configure wave -timeline 0
configure wave -timelineunits ps
update
WaveRestoreZoom {1685218 ps} {2184484 ps}
WaveRestoreZoom {2599784 ps} {2862745 ps}
/firmware/simulation/Wupper/project.do
44,6 → 44,9
# ----------------------------------------------------------
 
project addfile ../../sources/application/application.vhd
project addfile ../../sources/application/LFSR.vhd
project addfile ../../sources/application/fifo.vhd
project addfile ../../Projects/pcie_dma_top/pcie_dma_top.srcs/sources_1/ip/fifo_256x256/fifo_256x256_funcsim.vhdl
project addfile ../../Projects/pcie_dma_top/pcie_dma_top.srcs/sources_1/ip/multiplier/multiplier_funcsim.vhdl
 
project compileall
/firmware/simulation/Wupper/start.do
4,25 → 4,25
 
proc write_reg32 { addr val } {
puts "Write 32 $addr $val"
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_cq.tvalid 1 0
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_cq.tlast 1 0
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_cq.tkeep 8'h1F 0
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_cq.tdata(63 downto 0) $addr 0
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_cq.tdata(74 downto 64) 11'h1 0
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_cq.tdata(78 downto 75) 4'h1 0
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_cq.tdata(95 downto 79) 16'h0 0
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_cq.tdata(102 downto 96) 8'h6 0
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_cq.tdata(127 downto 103) 24'h0 0
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_cq.tdata(255 downto 128) $val
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_cq.tvalid 1 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_cq.tlast 1 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_cq.tkeep 8'h1F 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_cq.tdata(63 downto 0) $addr 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_cq.tdata(74 downto 64) 11'h1 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_cq.tdata(78 downto 75) 4'h1 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_cq.tdata(95 downto 79) 16'h0 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_cq.tdata(102 downto 96) 8'h6 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_cq.tdata(127 downto 103) 24'h0 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_cq.tdata(255 downto 128) $val
run 4ns
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_cq.tvalid 0 0
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_cq.tlast 0 0
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_cq.tkeep 8'h00 0
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_cq.tdata(255 downto 0) 256'h0 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_cq.tvalid 0 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_cq.tlast 0 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_cq.tkeep 8'h00 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_cq.tdata(255 downto 0) 256'h0 0
run 8ns
set tready [examine -value sim:/virtex7_dma_top/u1/dma0/s_axis_r_cq.tready]
set tready [examine -value sim:/wupper_oc_top/u1/dma0/s_axis_r_cq.tready]
while {$tready < 1} {
set tready [examine -value sim:/virtex7_dma_top/u1/dma0/s_axis_r_cq.tready]
set tready [examine -value sim:/wupper_oc_top/u1/dma0/s_axis_r_cq.tready]
run 8ns
}
30,25 → 30,25
proc write_reg128 { addr val } {
puts "Write 128 $addr $val"
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_cq.tvalid 1 0
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_cq.tlast 1 0
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_cq.tkeep 8'hFF 0
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_cq.tdata(63 downto 0) $addr 0
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_cq.tdata(74 downto 64) 11'h4 0
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_cq.tdata(78 downto 75) 4'h1 0
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_cq.tdata(95 downto 79) 16'h0 0
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_cq.tdata(102 downto 96) 8'h6 0
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_cq.tdata(127 downto 103) 24'h0 0
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_cq.tdata(255 downto 128) $val
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_cq.tvalid 1 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_cq.tlast 1 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_cq.tkeep 8'hFF 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_cq.tdata(63 downto 0) $addr 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_cq.tdata(74 downto 64) 11'h4 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_cq.tdata(78 downto 75) 4'h1 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_cq.tdata(95 downto 79) 16'h0 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_cq.tdata(102 downto 96) 8'h6 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_cq.tdata(127 downto 103) 24'h0 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_cq.tdata(255 downto 128) $val
run 4ns
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_cq.tvalid 0 0
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_cq.tlast 0 0
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_cq.tkeep 8'h00 0
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_cq.tdata(255 downto 0) 256'h0 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_cq.tvalid 0 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_cq.tlast 0 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_cq.tkeep 8'h00 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_cq.tdata(255 downto 0) 256'h0 0
run 8ns
set tready [examine -value sim:/virtex7_dma_top/u1/dma0/s_axis_r_cq.tready]
set tready [examine -value sim:/wupper_oc_top/u1/dma0/s_axis_r_cq.tready]
while {$tready < 1} {
set tready [examine -value sim:/virtex7_dma_top/u1/dma0/s_axis_r_cq.tready]
set tready [examine -value sim:/wupper_oc_top/u1/dma0/s_axis_r_cq.tready]
run 8ns
}
}
59,63 → 59,63
set wordcount [format "%X" [expr $size * 8]]
# address
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_rc.tdata(11 downto 0) $addr 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_rc.tdata(11 downto 0) $addr 0
#Error code, no error
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_rc.tdata(15 downto 12) 4'h0 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_rc.tdata(15 downto 12) 4'h0 0
#byte count
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_rc.tdata(28 downto 16) 13'h0 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_rc.tdata(28 downto 16) 13'h0 0
#locked read completion
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_rc.tdata(29) 1'h0 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_rc.tdata(29) 1'h0 0
#request completed
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_rc.tdata(30) 1'h0 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_rc.tdata(30) 1'h0 0
#unimplemented
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_rc.tdata(31) 1'h0 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_rc.tdata(31) 1'h0 0
#Dword count
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_rc.tdata(42 downto 32) $wordcount 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_rc.tdata(42 downto 32) $wordcount 0
#Completion status
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_rc.tdata(45 downto 43) 3'h0 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_rc.tdata(45 downto 43) 3'h0 0
#Poinsoned Completion
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_rc.tdata(46) 1'h0 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_rc.tdata(46) 1'h0 0
#Reserved
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_rc.tdata(47) 1'h0 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_rc.tdata(47) 1'h0 0
#Req ID
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_rc.tdata(63 downto 48) 16'hDEAD 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_rc.tdata(63 downto 48) 16'hDEAD 0
#Tag
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_rc.tdata(71 downto 64) $tag 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_rc.tdata(71 downto 64) $tag 0
#Com ID
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_rc.tdata(87 downto 72) 16'hBEEF 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_rc.tdata(87 downto 72) 16'hBEEF 0
#Reserved
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_rc.tdata(88) 1'h0 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_rc.tdata(88) 1'h0 0
#TC
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_rc.tdata(91 downto 89) 3'h0 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_rc.tdata(91 downto 89) 3'h0 0
#Attr
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_rc.tdata(94 downto 92) 3'h0 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_rc.tdata(94 downto 92) 3'h0 0
#Reserved
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_rc.tdata(95) 1'h0 0
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_rc.tdata(255 downto 96) $dL(0) 0
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_rc.tkeep 8'hFF 0
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_rc.tlast 0 0
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_rc.tvalid 1 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_rc.tdata(95) 1'h0 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_rc.tdata(255 downto 96) $dL(0) 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_rc.tkeep 8'hFF 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_rc.tlast 0 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_rc.tvalid 1 0
run 4ns
for {set i 0} {$i < [expr $size - 1]} {incr i} {
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_rc.tdata(95 downto 0) $dH($i) 0
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_rc.tdata(255 downto 96) $dL([expr $i + 1]) 0
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_rc.tkeep 8'hFF 0
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_rc.tlast 0 0
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_rc.tvalid 1 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_rc.tdata(95 downto 0) $dH($i) 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_rc.tdata(255 downto 96) $dL([expr $i + 1]) 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_rc.tkeep 8'hFF 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_rc.tlast 0 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_rc.tvalid 1 0
run 4ns
}
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_rc.tdata(95 downto 0) $dH($i) 0
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_rc.tdata(255 downto 96) 16'h0 0
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_rc.tkeep 8'h07 0
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_rc.tlast 1 0
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_rc.tvalid 1 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_rc.tdata(95 downto 0) $dH($i) 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_rc.tdata(255 downto 96) 16'h0 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_rc.tkeep 8'h07 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_rc.tlast 1 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_rc.tvalid 1 0
run 4ns
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_rc.tdata 256'h0 0
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_rc.tkeep 8'h00 0
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_rc.tlast 0 0
force -freeze sim:/virtex7_dma_top/u1/dma0/s_axis_rc.tvalid 0 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_rc.tdata 256'h0 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_rc.tkeep 8'h00 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_rc.tlast 0 0
force -freeze sim:/wupper_oc_top/u1/dma0/s_axis_rc.tvalid 0 0
run 4ns
}
## -- end
126,31 → 126,46
restart -force
set StdArithNoWarnings 1
set NumericStdNoWarnings 1
force -freeze sim:/virtex7_dma_top/u1/dma0/u1/bar0 fbb00000 0
force -freeze sim:/virtex7_dma_top/u1/dma0/u1/bar1 fba00000 0
force -freeze sim:/virtex7_dma_top/u1/dma0/u1/bar2 fb900000 0
force -freeze sim:/wupper_oc_top/u1/dma0/u1/bar0 fbb00000 0
force -freeze sim:/wupper_oc_top/u1/dma0/u1/bar1 fba00000 0
force -freeze sim:/wupper_oc_top/u1/dma0/u1/bar2 fb900000 0
 
force -freeze sim:/virtex7_dma_top/sys_reset_n 0 0
force -freeze sim:/virtex7_dma_top/sys_clk_p 1 0, 0 {5 ns} -r 10 ns
force -freeze sim:/virtex7_dma_top/sys_clk_n 0 0, 1 {5 ns} -r 10 ns
force -freeze sim:/wupper_oc_top/sys_reset_n 0 0
force -freeze sim:/wupper_oc_top/u1/u1/clk 1 0, 0 {2 ns} -r 4 ns
force -freeze sim:/wupper_oc_top/sys_clk_p 1 0, 0 {5 ns} -r 10 ns
force -freeze sim:/wupper_oc_top/sys_clk_n 0 0, 1 {5 ns} -r 10 ns
 
#force -freeze sim:/virtex7_dma_top/clk_200_in_n 1 0, 0 {2.5 ns} -r 5 ns
#force -freeze sim:/virtex7_dma_top/clk_200_in_p 0 0, 1 {2.5 ns} -r 5 ns
#force -freeze sim:/wupper_oc_top/clk_200_in_n 1 0, 0 {2.5 ns} -r 5 ns
#force -freeze sim:/wupper_oc_top/clk_200_in_p 0 0, 1 {2.5 ns} -r 5 ns
# forced signals
force -freeze sim:/virtex7_dma_top/u1/dma0/m_axis_r_rq.tready 1 0
force -freeze sim:/virtex7_dma_top/u1/dma0/m_axis_r_cc.tready 1 0
force -freeze sim:/virtex7_dma_top/u1/u2/cfg_interrupt_msix_enable 1 0
force -freeze sim:/virtex7_dma_top/u1/u2/interrupt_vector_s(0).int_vec_add 16'h00000000000000AA 0
force -freeze sim:/virtex7_dma_top/u1/u2/interrupt_vector_s(0).int_vec_data 16'h0000C1A0 0
force -freeze sim:/virtex7_dma_top/u1/u2/interrupt_vector_s(0).int_vec_ctrl 16'h00000000 0
force -freeze sim:/virtex7_dma_top/u1/u2/interrupt_vector_s(1).int_vec_add 16'h00000000000000BB 0
force -freeze sim:/virtex7_dma_top/u1/u2/interrupt_vector_s(1).int_vec_data 16'h0000CA70 0
force -freeze sim:/virtex7_dma_top/u1/u2/interrupt_vector_s(1).int_vec_ctrl 16'h00000000 0
force -freeze sim:/wupper_oc_top/u1/dma0/m_axis_r_rq.tready 1 0
force -freeze sim:/wupper_oc_top/u1/dma0/m_axis_r_cc.tready 1 0
force -freeze sim:/wupper_oc_top/u1/u2/cfg_interrupt_msix_enable 1 0
force -freeze sim:/wupper_oc_top/u1/u2/interrupt_vector_s(0).int_vec_add 16'h00000000000000AA 0
force -freeze sim:/wupper_oc_top/u1/u2/interrupt_vector_s(0).int_vec_data 16'h0000C1A0 0
force -freeze sim:/wupper_oc_top/u1/u2/interrupt_vector_s(0).int_vec_ctrl 16'h00000000 0
force -freeze sim:/wupper_oc_top/u1/u2/interrupt_vector_s(1).int_vec_add 16'h00000000000000BB 0
force -freeze sim:/wupper_oc_top/u1/u2/interrupt_vector_s(1).int_vec_data 16'h0000CA70 0
force -freeze sim:/wupper_oc_top/u1/u2/interrupt_vector_s(1).int_vec_ctrl 16'h00000000 0
run 100 ns
force -freeze sim:/virtex7_dma_top/sys_reset_n 1 0
force -freeze sim:/virtex7_dma_top/u1/reset 0 0
force -freeze sim:/wupper_oc_top/sys_reset_n 1 0
force -freeze sim:/wupper_oc_top/u1/reset 0 0
run 102ns
run 800ns
 
#initialize some app registers
 
# PCIe -> PC
write_reg128 64'hfb902030 128'h1
run 10ns
write_reg128 64'hfb902030 128'h0
run 100ns
# PC-> PCIe
write_reg128 64'hfb902020 128'h1
#write_reg128 64'hfb902000 128'hABCD
#write_reg128 64'hfb902010 128'h1234
 
 
## emulated register writes
write_reg128 64'hfbb00000 128'h0000_0004_5600_0400_0000_0004_5600_0000
write_reg128 64'hfbb00010 128'h0000_0004_5600_0000_0000_0000_0000_1040
164,74 → 179,76
write_reg32 64'hfbb00400 128'h3
#enable interrupt table
run 15ns
force -freeze sim:/virtex7_dma_top/u1/dma0/m_axis_r_rq.tready 0 0
force -freeze sim:/wupper_oc_top/u1/dma0/m_axis_r_rq.tready 0 0
run 12ns
force -freeze sim:/virtex7_dma_top/u1/dma0/m_axis_r_rq.tready 1 0
#write_reg32 64'hfba0100 32'h1
force -freeze sim:/wupper_oc_top/u1/dma0/m_axis_r_rq.tready 1 0
#write_reg32 64'hfba0100 32'hff
 
run 100ns
 
#### emulated PCIe read to drive the AXI interface from the Core side
##
#set dmadataL(0) 160'h131211100f0e0d0c0b0a09080706050403020100
#set dmadataH(0) 96'h1f1e1d1c1b1a191817161514
#set dmadataL(1) 160'h333231302f2e2d2c2b2a29282726252423222120
#set dmadataH(1) 96'h3f3e3d3c3b3a393837363534
#set dmadataL(2) 160'h535251504f4e4d4c4b4a49484746454443424140
#set dmadataH(2) 96'h5f5e5d5c5b5a595857565554
#set dmadataL(3) 160'h737271706f6e6d6c6b6a69686766656463626160
#set dmadataH(3) 96'h7f7e7d7c7b7a797877767574
#set dmadataL(4) 160'h939291908f8e8d8c8b8a89888786858483828180
#set dmadataH(4) 96'h9f9e9d9c9b9a999897969594
#set dmadataL(5) 160'hB3B2B1B0AfAeAdAcAbAaA9A8A7A6A5A4A3A2A1A0
#set dmadataH(5) 96'hBfBeBdBcBbBaB9B8B7B6B5B4
#set dmadataL(6) 160'hD3D2D1D0CfCeCdCcCbCaC9C8C7C6C5C4C3C2C1C0
#set dmadataH(6) 96'hDfDeDdDcDbDaD9D8D7D6D5D4
#set dmadataL(7) 160'hF3F2F1F0EfEeEdEcEbEaE9E8E7E6E5E4E3E2E1E0
#set dmadataH(7) 96'hFfFeFdFcFbFaF9F8F7F6F5F4
#
#write_dma 12'hABC dmadataL dmadataH 8'h10 8
set dmadataL(0) 160'h131211100f0e0d0c0b0a09080706050403020100
set dmadataH(0) 96'h1f1e1d1c1b1a191817161514
set dmadataL(0) 160'h131211100f0e0d0c0b0a09080706050403020100
set dmadataH(0) 96'h1f1e1d1c1b1a191817161514
set dmadataL(1) 160'h333231302f2e2d2c2b2a29282726252423222120
set dmadataH(1) 96'h3f3e3d3c3b3a393837363534
set dmadataL(2) 160'h535251504f4e4d4c4b4a49484746454443424140
set dmadataH(2) 96'h5f5e5d5c5b5a595857565554
set dmadataL(3) 160'h737271706f6e6d6c6b6a69686766656463626160
set dmadataH(3) 96'h7f7e7d7c7b7a797877767574
set dmadataL(4) 160'h939291908f8e8d8c8b8a89888786858483828180
set dmadataH(4) 96'h9f9e9d9c9b9a999897969594
set dmadataL(5) 160'hB3B2B1B0AfAeAdAcAbAaA9A8A7A6A5A4A3A2A1A0
set dmadataH(5) 96'hBfBeBdBcBbBaB9B8B7B6B5B4
set dmadataL(6) 160'hD3D2D1D0CfCeCdCcCbCaC9C8C7C6C5C4C3C2C1C0
set dmadataH(6) 96'hDfDeDdDcDbDaD9D8D7D6D5D4
set dmadataL(7) 160'hF3F2F1F0EfEeEdEcEbEaE9E8E7E6E5E4E3E2E1E0
set dmadataH(7) 96'hFfFeFdFcFbFaF9F8F7F6F5F4
 
write_dma 12'hABC dmadataL dmadataH 8'h10 8
 
run 100ns
write_dma 12'hABC dmadataL dmadataH 8'h11 8
run 100ns
write_dma 12'hABC dmadataL dmadataH 8'h12 8
run 100ns
write_dma 12'hABC dmadataL dmadataH 8'h13 8
run 100ns
write_dma 12'hABC dmadataL dmadataH 8'h14 8
run 100ns
write_dma 12'hABC dmadataL dmadataH 8'h15 8
run 100ns
write_dma 12'hABC dmadataL dmadataH 8'h15 8
run 100ns
write_dma 12'hABC dmadataL dmadataH 8'h16 8
run 100ns
write_dma 12'hABC dmadataL dmadataH 8'h17 8
run 100ns
write_dma 12'hABC dmadataL dmadataH 8'h18 8
run 100ns
write_dma 12'hABC dmadataL dmadataH 8'h19 8
run 100ns
write_dma 12'hABC dmadataL dmadataH 8'h1A 8
run 100ns
 
#run 100ns
#write_dma 12'hABC dmadataL dmadataH 8'h11 8
#run 100ns
#write_dma 12'hABC dmadataL dmadataH 8'h12 8
#run 100ns
#write_dma 12'hABC dmadataL dmadataH 8'h13 8
#run 100ns
#write_dma 12'hABC dmadataL dmadataH 8'h14 8
#run 100ns
#write_dma 12'hABC dmadataL dmadataH 8'h15 8
#run 100ns
#write_dma 12'hABC dmadataL dmadataH 8'h15 8
#run 100ns
#write_dma 12'hABC dmadataL dmadataH 8'h16 8
#run 100ns
#write_dma 12'hABC dmadataL dmadataH 8'h17 8
#run 100ns
#write_dma 12'hABC dmadataL dmadataH 8'h18 8
#run 100ns
#write_dma 12'hABC dmadataL dmadataH 8'h19 8
#run 100ns
#write_dma 12'hABC dmadataL dmadataH 8'h1A 8
#run 100ns
 
#write_reg32 64'hfbb00400 128'h1
write_reg32 64'hfbb00400 128'h1
run 100ns
force -freeze sim:/virtex7_dma_top/u1/dma0/u2/m_axis_r_rq.tready 0 0
force -freeze sim:/wupper_oc_top/u1/dma0/u0/m_axis_r_rq.tready 0 0
run 80ns
force -freeze sim:/virtex7_dma_top/u1/dma0/u2/m_axis_r_rq.tready 1 0
force -freeze sim:/wupper_oc_top/u1/dma0/u0/m_axis_r_rq.tready 1 0
run 100ns
#run 12us
write_reg128 64'hfbb00010 128'h0000_0004_5600_0400_0000_0000_0000_1040
run 100ns
write_reg128 64'hfbb00010 128'h0000_0004_5600_0000_0000_0000_0000_1040
run 200ns
write_reg128 64'hfbb00010 128'h0000_0004_5600_0200_0000_0000_0000_1040
run 200ns
write_reg128 64'hfbb00010 128'h0000_0004_5600_0300_0000_0000_0000_1040
run 200ns
write_reg128 64'hfbb00010 128'h0000_0004_5600_0400_0000_0000_0000_1040
#write_reg128 64'hfbb00010 128'h0000_0004_5600_0400_0000_0000_0000_1040
#run 100ns
#write_reg128 64'hfbb00010 128'h0000_0004_5600_0000_0000_0000_0000_1040
#run 200ns
#write_reg128 64'hfbb00010 128'h0000_0004_5600_0200_0000_0000_0000_1040
#run 200ns
#write_reg128 64'hfbb00010 128'h0000_0004_5600_0300_0000_0000_0000_1040
#run 200ns
#write_reg128 64'hfbb00010 128'h0000_0004_5600_0400_0000_0000_0000_1040
 
 
/firmware/scripts/Wupper/vivado_import.tcl
53,7 → 53,11
# ----------------------------------------------------------
 
read_vhdl -library work $proj_dir/sources/application/application.vhd
read_vhdl -library work $proj_dir/sources/application/LFSR.vhd
import_ip $proj_dir/sources/application/fifo_256x256.xci
import_ip $proj_dir/sources/application/fifo_256x512.xci
import_ip $proj_dir/sources/application/xadc_wiz_0.xci
import_ip $proj_dir/sources/application/multiplier.xci
 
upgrade_ip [get_ips {pcie_x8_gen3_3_0 clk_wiz_40 fifo_256x256}]
 

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